VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMAll/TRPMAll.cpp@ 8863

Last change on this file since 8863 was 8818, checked in by vboxsync, 17 years ago

Pushed some very noisy logging into Log4 (was LogFlow).

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File size: 31.6 KB
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1/* $Id: TRPMAll.cpp 8818 2008-05-14 19:44:56Z vboxsync $ */
2/** @file
3 * TRPM - Trap Monitor - Any Context.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22
23/*******************************************************************************
24* Header Files *
25*******************************************************************************/
26#define LOG_GROUP LOG_GROUP_TRPM
27#include <VBox/trpm.h>
28#include <VBox/pgm.h>
29#include <VBox/mm.h>
30#include <VBox/patm.h>
31#include <VBox/selm.h>
32#include "TRPMInternal.h"
33#include <VBox/vm.h>
34#include <VBox/err.h>
35#include <VBox/x86.h>
36#include <VBox/em.h>
37
38#include <VBox/log.h>
39#include <iprt/assert.h>
40#include <iprt/asm.h>
41#include <iprt/param.h>
42
43
44
45/**
46 * Query info about the current active trap/interrupt.
47 * If no trap is active active an error code is returned.
48 *
49 * @returns VBox status code.
50 * @param pVM The virtual machine.
51 * @param pu8TrapNo Where to store the trap number.
52 * @param pEnmType Where to store the trap type
53 */
54TRPMDECL(int) TRPMQueryTrap(PVM pVM, uint8_t *pu8TrapNo, TRPMEVENT *pEnmType)
55{
56 /*
57 * Check if we have a trap at present.
58 */
59 if (pVM->trpm.s.uActiveVector != ~0U)
60 {
61 if (pu8TrapNo)
62 *pu8TrapNo = (uint8_t)pVM->trpm.s.uActiveVector;
63 if (pEnmType)
64 *pEnmType = pVM->trpm.s.enmActiveType;
65 return VINF_SUCCESS;
66 }
67
68 return VERR_TRPM_NO_ACTIVE_TRAP;
69}
70
71
72/**
73 * Gets the trap number for the current trap.
74 *
75 * The caller is responsible for making sure there is an active trap which
76 * takes an error code when making this request.
77 *
78 * @returns The current trap number.
79 * @param pVM VM handle.
80 */
81TRPMDECL(uint8_t) TRPMGetTrapNo(PVM pVM)
82{
83 AssertMsg(pVM->trpm.s.uActiveVector != ~0U, ("No active trap!\n"));
84 return (uint8_t)pVM->trpm.s.uActiveVector;
85}
86
87
88/**
89 * Gets the error code for the current trap.
90 *
91 * The caller is responsible for making sure there is an active trap which
92 * takes an error code when making this request.
93 *
94 * @returns Error code.
95 * @param pVM VM handle.
96 */
97TRPMDECL(RTGCUINT) TRPMGetErrorCode(PVM pVM)
98{
99 AssertMsg(pVM->trpm.s.uActiveVector != ~0U, ("No active trap!\n"));
100#ifdef VBOX_STRICT
101 switch (pVM->trpm.s.uActiveVector)
102 {
103 case 0x0a:
104 case 0x0b:
105 case 0x0c:
106 case 0x0d:
107 case 0x0e:
108 case 0x11:
109 case 0x08:
110 break;
111 default:
112 AssertMsgFailed(("This trap (%#x) doesn't have any error code\n", pVM->trpm.s.uActiveVector));
113 break;
114 }
115#endif
116 return pVM->trpm.s.uActiveErrorCode;
117}
118
119
120/**
121 * Gets the fault address for the current trap.
122 *
123 * The caller is responsible for making sure there is an active trap 0x0e when
124 * making this request.
125 *
126 * @returns Fault address associated with the trap.
127 * @param pVM VM handle.
128 */
129TRPMDECL(RTGCUINTPTR) TRPMGetFaultAddress(PVM pVM)
130{
131 AssertMsg(pVM->trpm.s.uActiveVector != ~0U, ("No active trap!\n"));
132 AssertMsg(pVM->trpm.s.uActiveVector == 0xe, ("Not trap 0e!\n"));
133 return pVM->trpm.s.uActiveCR2;
134}
135
136
137/**
138 * Clears the current active trap/exception/interrupt.
139 *
140 * The caller is responsible for making sure there is an active trap
141 * when making this request.
142 *
143 * @returns VBox status code.
144 * @param pVM The virtual machine handle.
145 */
146TRPMDECL(int) TRPMResetTrap(PVM pVM)
147{
148 /*
149 * Cannot reset non-existing trap!
150 */
151 if (pVM->trpm.s.uActiveVector == ~0U)
152 {
153 AssertMsgFailed(("No active trap!\n"));
154 return VERR_TRPM_NO_ACTIVE_TRAP;
155 }
156
157 /*
158 * Reset it.
159 */
160 pVM->trpm.s.uActiveVector = ~0U;
161 return VINF_SUCCESS;
162}
163
164
165/**
166 * Assert trap/exception/interrupt.
167 *
168 * The caller is responsible for making sure there is no active trap
169 * when making this request.
170 *
171 * @returns VBox status code.
172 * @param pVM The virtual machine.
173 * @param u8TrapNo The trap vector to assert.
174 * @param enmType Trap type.
175 */
176TRPMDECL(int) TRPMAssertTrap(PVM pVM, uint8_t u8TrapNo, TRPMEVENT enmType)
177{
178 Log2(("TRPMAssertTrap: u8TrapNo=%02x type=%d\n", u8TrapNo, enmType));
179
180 /*
181 * Cannot assert a trap when one is already active.
182 */
183 if (pVM->trpm.s.uActiveVector != ~0U)
184 {
185 AssertMsgFailed(("Active trap %#x\n", pVM->trpm.s.uActiveVector));
186 return VERR_TRPM_ACTIVE_TRAP;
187 }
188
189 pVM->trpm.s.uActiveVector = u8TrapNo;
190 pVM->trpm.s.enmActiveType = enmType;
191 pVM->trpm.s.uActiveErrorCode = ~0;
192 pVM->trpm.s.uActiveCR2 = 0xdeadface;
193 return VINF_SUCCESS;
194}
195
196
197/**
198 * Sets the error code of the current trap.
199 * (This function is for use in trap handlers and such.)
200 *
201 * The caller is responsible for making sure there is an active trap
202 * which takes an errorcode when making this request.
203 *
204 * @param pVM The virtual machine.
205 * @param uErrorCode The new error code.
206 */
207TRPMDECL(void) TRPMSetErrorCode(PVM pVM, RTGCUINT uErrorCode)
208{
209 Log2(("TRPMSetErrorCode: uErrorCode=%VGv\n", uErrorCode));
210 AssertMsg(pVM->trpm.s.uActiveVector != ~0U, ("No active trap!\n"));
211 pVM->trpm.s.uActiveErrorCode = uErrorCode;
212#ifdef VBOX_STRICT
213 switch (pVM->trpm.s.uActiveVector)
214 {
215 case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e:
216 AssertMsg(uErrorCode != ~(RTGCUINT)0, ("Invalid uErrorCode=%#x u8TrapNo=%d\n", uErrorCode, pVM->trpm.s.uActiveVector));
217 break;
218 case 0x11: case 0x08:
219 AssertMsg(uErrorCode == 0, ("Invalid uErrorCode=%#x u8TrapNo=%d\n", uErrorCode, pVM->trpm.s.uActiveVector));
220 break;
221 default:
222 AssertMsg(uErrorCode == ~(RTGCUINT)0, ("Invalid uErrorCode=%#x u8TrapNo=%d\n", uErrorCode, pVM->trpm.s.uActiveVector));
223 break;
224 }
225#endif
226}
227
228
229/**
230 * Sets the error code of the current trap.
231 * (This function is for use in trap handlers and such.)
232 *
233 * The caller is responsible for making sure there is an active trap 0e
234 * when making this request.
235 *
236 * @param pVM The virtual machine.
237 * @param uCR2 The new fault address (cr2 register).
238 */
239TRPMDECL(void) TRPMSetFaultAddress(PVM pVM, RTGCUINTPTR uCR2)
240{
241 Log2(("TRPMSetFaultAddress: uCR2=%VGv\n", uCR2));
242 AssertMsg(pVM->trpm.s.uActiveVector != ~0U, ("No active trap!\n"));
243 AssertMsg(pVM->trpm.s.uActiveVector == 0xe, ("Not trap 0e!\n"));
244 pVM->trpm.s.uActiveCR2 = uCR2;
245}
246
247
248/**
249 * Checks if the current active trap/interrupt/exception/fault/whatever is a software
250 * interrupt or not.
251 *
252 * The caller is responsible for making sure there is an active trap
253 * when making this request.
254 *
255 * @returns true if software interrupt, false if not.
256 *
257 * @param pVM VM handle.
258 */
259TRPMDECL(bool) TRPMIsSoftwareInterrupt(PVM pVM)
260{
261 AssertMsg(pVM->trpm.s.uActiveVector != ~0U, ("No active trap!\n"));
262 return (pVM->trpm.s.enmActiveType == TRPM_SOFTWARE_INT);
263}
264
265
266/**
267 * Check if there is an active trap.
268 *
269 * @returns true if trap active, false if not.
270 * @param pVM The virtual machine.
271 */
272TRPMDECL(bool) TRPMHasTrap(PVM pVM)
273{
274 return pVM->trpm.s.uActiveVector != ~0U;
275}
276
277
278/**
279 * Query all info about the current active trap/interrupt.
280 * If no trap is active active an error code is returned.
281 *
282 * @returns VBox status code.
283 * @param pVM The virtual machine.
284 * @param pu8TrapNo Where to store the trap number.
285 * @param pEnmType Where to store the trap type
286 * @param puErrorCode Where to store the error code associated with some traps.
287 * ~0U is stored if the trap has no error code.
288 * @param puCR2 Where to store the CR2 associated with a trap 0E.
289 */
290TRPMDECL(int) TRPMQueryTrapAll(PVM pVM, uint8_t *pu8TrapNo, TRPMEVENT *pEnmType, PRTGCUINT puErrorCode, PRTGCUINTPTR puCR2)
291{
292 /*
293 * Check if we have a trap at present.
294 */
295 if (pVM->trpm.s.uActiveVector == ~0U)
296 return VERR_TRPM_NO_ACTIVE_TRAP;
297
298 if (pu8TrapNo)
299 *pu8TrapNo = (uint8_t)pVM->trpm.s.uActiveVector;
300 if (pEnmType)
301 *pEnmType = pVM->trpm.s.enmActiveType;
302 if (puErrorCode)
303 *puErrorCode = pVM->trpm.s.uActiveErrorCode;
304 if (puCR2)
305 *puCR2 = pVM->trpm.s.uActiveCR2;
306
307 return VINF_SUCCESS;
308}
309
310
311/**
312 * Save the active trap.
313 *
314 * This routine useful when doing try/catch in the hypervisor.
315 * Any function which uses temporary trap handlers should
316 * probably also use this facility to save the original trap.
317 *
318 * @param pVM VM handle.
319 */
320TRPMDECL(void) TRPMSaveTrap(PVM pVM)
321{
322 pVM->trpm.s.uSavedVector = pVM->trpm.s.uActiveVector;
323 pVM->trpm.s.enmSavedType = pVM->trpm.s.enmActiveType;
324 pVM->trpm.s.uSavedErrorCode = pVM->trpm.s.uActiveErrorCode;
325 pVM->trpm.s.uSavedCR2 = pVM->trpm.s.uActiveCR2;
326}
327
328
329/**
330 * Restore a saved trap.
331 *
332 * Multiple restores of a saved trap is possible.
333 *
334 * @param pVM VM handle.
335 */
336TRPMDECL(void) TRPMRestoreTrap(PVM pVM)
337{
338 pVM->trpm.s.uActiveVector = pVM->trpm.s.uSavedVector;
339 pVM->trpm.s.enmActiveType = pVM->trpm.s.enmSavedType;
340 pVM->trpm.s.uActiveErrorCode = pVM->trpm.s.uSavedErrorCode;
341 pVM->trpm.s.uActiveCR2 = pVM->trpm.s.uSavedCR2;
342}
343
344#ifndef IN_RING0
345/**
346 * Forward trap or interrupt to the guest's handler
347 *
348 *
349 * @returns VBox status code.
350 * or does not return at all (when the trap is actually forwarded)
351 *
352 * @param pVM The VM to operate on.
353 * @param pRegFrame Pointer to the register frame for the trap.
354 * @param iGate Trap or interrupt gate number
355 * @param opsize Instruction size (only relevant for software interrupts)
356 * @param enmError TRPM_TRAP_HAS_ERRORCODE or TRPM_TRAP_NO_ERRORCODE.
357 * @param enmType TRPM event type
358 * @internal
359 */
360TRPMDECL(int) TRPMForwardTrap(PVM pVM, PCPUMCTXCORE pRegFrame, uint32_t iGate, uint32_t opsize, TRPMERRORCODE enmError, TRPMEVENT enmType)
361{
362#ifdef TRPM_FORWARD_TRAPS_IN_GC
363 X86EFLAGS eflags;
364
365 STAM_PROFILE_ADV_START(CTXSUFF(&pVM->trpm.s.StatForwardProf), a);
366
367#ifdef DEBUG
368 if (pRegFrame->eflags.Bits.u1VM)
369 Log(("TRPMForwardTrap-VM: eip=%04X:%04X iGate=%d\n", pRegFrame->cs, pRegFrame->eip, iGate));
370 else
371 Log(("TRPMForwardTrap: eip=%04X:%VGv iGate=%d\n", pRegFrame->cs, pRegFrame->eip, iGate));
372
373 switch (iGate) {
374 case 14:
375 if (pRegFrame->eip == pVM->trpm.s.uActiveCR2)
376 {
377 int rc;
378 RTGCPTR pCallerGC;
379#ifdef IN_GC
380 rc = MMGCRamRead(pVM, &pCallerGC, (RTGCPTR)pRegFrame->esp, sizeof(pCallerGC));
381#else
382 rc = PGMPhysReadGCPtr(pVM, &pCallerGC, (RTGCPTR)pRegFrame->esp, sizeof(pCallerGC));
383#endif
384 if (VBOX_SUCCESS(rc))
385 {
386 Log(("TRPMForwardTrap: caller=%VGv\n", pCallerGC));
387 }
388 }
389 /* no break */
390 case 8:
391 case 10:
392 case 11:
393 case 12:
394 case 13:
395 case 17:
396 Assert(enmError == TRPM_TRAP_HAS_ERRORCODE || enmType == TRPM_SOFTWARE_INT);
397 break;
398
399 default:
400 Assert(enmError == TRPM_TRAP_NO_ERRORCODE);
401 break;
402 }
403#endif /* DEBUG */
404
405 /* Retrieve the eflags including the virtualized bits. */
406 /* Note: hackish as the cpumctxcore structure doesn't contain the right value */
407 eflags.u32 = CPUMRawGetEFlags(pVM, pRegFrame);
408
409 /* VM_FF_INHIBIT_INTERRUPTS should be cleared upfront or don't call this function at all for dispatching hardware interrupts. */
410 Assert(enmType != TRPM_HARDWARE_INT || !VM_FF_ISSET(pVM, VM_FF_INHIBIT_INTERRUPTS));
411
412 /*
413 * If it's a real guest trap and the guest's page fault handler is marked as safe for GC execution, then we call it directly.
414 * Well, only if the IF flag is set.
415 */
416 /*
417 * @todo if the trap handler was modified and marked invalid, then we should *now* go back to the host context and install a new patch.
418 *
419 */
420 if ( pVM->trpm.s.aGuestTrapHandler[iGate]
421 && (eflags.Bits.u1IF)
422#ifndef VBOX_RAW_V86
423 && !(eflags.Bits.u1VM) /* @todo implement when needed (illegal for same privilege level transfers). */
424#endif
425 && !PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip)
426 )
427 {
428 uint16_t cbIDT;
429 RTGCPTR GCPtrIDT = (RTGCPTR)CPUMGetGuestIDTR(pVM, &cbIDT);
430 uint32_t cpl;
431 VBOXIDTE GuestIdte;
432 RTGCPTR pIDTEntry;
433 int rc;
434
435 Assert(PATMAreInterruptsEnabledByCtxCore(pVM, pRegFrame));
436 Assert(!VM_FF_ISPENDING(pVM, VM_FF_SELM_SYNC_GDT | VM_FF_SELM_SYNC_LDT | VM_FF_TRPM_SYNC_IDT | VM_FF_SELM_SYNC_TSS));
437
438 /* Get the current privilege level. */
439 cpl = CPUMGetGuestCPL(pVM, pRegFrame);
440
441 if (GCPtrIDT && iGate * sizeof(VBOXIDTE) >= cbIDT)
442 goto failure;
443
444 /*
445 * BIG TODO: The checks are not complete. see trap and interrupt dispatching section in Intel docs for details
446 * All very obscure, but still necessary.
447 * Currently only some CS & TSS selector checks are missing.
448 *
449 */
450 pIDTEntry = (RTGCPTR)((RTGCUINTPTR)GCPtrIDT + sizeof(VBOXIDTE) * iGate);
451#ifdef IN_GC
452 rc = MMGCRamRead(pVM, &GuestIdte, pIDTEntry, sizeof(GuestIdte));
453#else
454 rc = PGMPhysReadGCPtr(pVM, &GuestIdte, pIDTEntry, sizeof(GuestIdte));
455#endif
456 if (VBOX_FAILURE(rc))
457 {
458 /* The page might be out of sync. (@todo might cross a page boundary) */
459 Log(("Page %VGv out of sync -> prefetch and try again\n", pIDTEntry));
460 rc = PGMPrefetchPage(pVM, pIDTEntry); /** @todo r=bird: rainy day: this isn't entirely safe because of access bit virtualiziation and CSAM. */
461 if (rc != VINF_SUCCESS)
462 {
463 Log(("TRPMForwardTrap: PGMPrefetchPage failed with rc=%Vrc\n", rc));
464 goto failure;
465 }
466#ifdef IN_GC
467 rc = MMGCRamRead(pVM, &GuestIdte, pIDTEntry, sizeof(GuestIdte));
468#else
469 rc = PGMPhysReadGCPtr(pVM, &GuestIdte, pIDTEntry, sizeof(GuestIdte));
470#endif
471 }
472 if ( VBOX_SUCCESS(rc)
473 && GuestIdte.Gen.u1Present
474 && (GuestIdte.Gen.u5Type2 == VBOX_IDTE_TYPE2_TRAP_32 || GuestIdte.Gen.u5Type2 == VBOX_IDTE_TYPE2_INT_32)
475 && (GuestIdte.Gen.u2DPL == 3 || GuestIdte.Gen.u2DPL == 0)
476 && (GuestIdte.Gen.u16SegSel & 0xfffc) /* must not be zero */
477 && (enmType == TRPM_TRAP || enmType == TRPM_HARDWARE_INT || cpl <= GuestIdte.Gen.u2DPL) /* CPL <= DPL if software int */
478 )
479 {
480 RTGCPTR pHandler, dummy;
481 GCPTRTYPE(uint32_t *) pTrapStackGC;
482
483 pHandler = (RTGCPTR)((GuestIdte.Gen.u16OffsetHigh << 16) | GuestIdte.Gen.u16OffsetLow);
484
485 /* Note: SELMValidateAndConvertCSAddr checks for code type, memory type, selector validity. */
486 /** @todo dpl <= cpl else GPF */
487
488 /* Note: don't use current eflags as we might be in V86 mode and the IDT always contains protected mode selectors */
489 X86EFLAGS fakeflags;
490 fakeflags.u32 = 0;
491
492 rc = SELMValidateAndConvertCSAddr(pVM, fakeflags, 0, GuestIdte.Gen.u16SegSel, NULL, pHandler, &dummy);
493 if (rc == VINF_SUCCESS)
494 {
495 VBOXGDTR gdtr = {0};
496 bool fConforming = false;
497 int idx = 0;
498 uint32_t dpl;
499 uint32_t ss_r0;
500 uint32_t esp_r0;
501 VBOXDESC Desc;
502 RTGCPTR pGdtEntry;
503
504 CPUMGetGuestGDTR(pVM, &gdtr);
505 Assert(gdtr.pGdt && gdtr.cbGdt > GuestIdte.Gen.u16SegSel);
506
507 if (!gdtr.pGdt)
508 goto failure;
509
510 pGdtEntry = (RTGCPTR)(uintptr_t)&((VBOXDESC *)gdtr.pGdt)[GuestIdte.Gen.u16SegSel >> X86_SEL_SHIFT]; /// @todo fix this
511#ifdef IN_GC
512 rc = MMGCRamRead(pVM, &Desc, pGdtEntry, sizeof(Desc));
513#else
514 rc = PGMPhysReadGCPtr(pVM, &Desc, pGdtEntry, sizeof(Desc));
515#endif
516 if (VBOX_FAILURE(rc))
517 {
518 /* The page might be out of sync. (@todo might cross a page boundary) */
519 Log(("Page %VGv out of sync -> prefetch and try again\n", pGdtEntry));
520 rc = PGMPrefetchPage(pVM, pGdtEntry); /** @todo r=bird: rainy day: this isn't entirely safe because of access bit virtualiziation and CSAM. */
521 if (rc != VINF_SUCCESS)
522 {
523 Log(("PGMPrefetchPage failed with rc=%Vrc\n", rc));
524 goto failure;
525 }
526#ifdef IN_GC
527 rc = MMGCRamRead(pVM, &Desc, pGdtEntry, sizeof(Desc));
528#else
529 rc = PGMPhysReadGCPtr(pVM, &Desc, pGdtEntry, sizeof(Desc));
530#endif
531 if (VBOX_FAILURE(rc))
532 {
533 Log(("MMGCRamRead failed with %Vrc\n", rc));
534 goto failure;
535 }
536 }
537
538 if (Desc.Gen.u4Type & X86_SEL_TYPE_CONF)
539 {
540 Log(("Conforming code selector\n"));
541 fConforming = true;
542 }
543 /** @todo check descriptor type!! */
544
545 dpl = Desc.Gen.u2Dpl;
546
547 if (!fConforming && dpl < cpl) /* to inner privilege level */
548 {
549 rc = SELMGetRing1Stack(pVM, &ss_r0, &esp_r0);
550 if (VBOX_FAILURE(rc))
551 goto failure;
552
553 Assert((ss_r0 & X86_SEL_RPL) == 1);
554
555 if ( !esp_r0
556 || !ss_r0
557 || (ss_r0 & X86_SEL_RPL) != ((dpl == 0) ? 1 : dpl)
558 || SELMToFlatEx(pVM, fakeflags, ss_r0, (RTGCPTR)esp_r0, NULL, SELMTOFLAT_FLAGS_CPL1, (PRTGCPTR)&pTrapStackGC, NULL) != VINF_SUCCESS
559 )
560 {
561 Log(("Invalid ring 0 stack %04X:%VGv\n", ss_r0, esp_r0));
562 goto failure;
563 }
564 }
565 else
566 if (fConforming || dpl == cpl) /* to the same privilege level */
567 {
568 ss_r0 = pRegFrame->ss;
569 esp_r0 = pRegFrame->esp;
570
571 if ( eflags.Bits.u1VM /* illegal */
572 || SELMToFlatEx(pVM, fakeflags, ss_r0, (RTGCPTR)esp_r0, NULL, SELMTOFLAT_FLAGS_CPL1, (PRTGCPTR)&pTrapStackGC, NULL) != VINF_SUCCESS)
573 {
574 AssertMsgFailed(("Invalid stack %04X:%VGv??? (VM=%d)\n", ss_r0, esp_r0, eflags.Bits.u1VM));
575 goto failure;
576 }
577 }
578 else
579 {
580 Log(("Invalid cpl-dpl combo %d vs %d\n", cpl, dpl));
581 goto failure;
582 }
583 /*
584 * Build trap stack frame on guest handler's stack
585 */
586 uint32_t *pTrapStack;
587#ifdef IN_GC
588 Assert(eflags.Bits.u1VM || (pRegFrame->ss & X86_SEL_RPL) != 0);
589 /* Check maximum amount we need (10 when executing in V86 mode) */
590 rc = PGMVerifyAccess(pVM, (RTGCUINTPTR)pTrapStackGC - 10*sizeof(uint32_t), 10 * sizeof(uint32_t), X86_PTE_RW);
591 pTrapStack = pTrapStackGC;
592#else
593 Assert(eflags.Bits.u1VM || (pRegFrame->ss & X86_SEL_RPL) == 0 || (pRegFrame->ss & X86_SEL_RPL) == 3);
594 /* Check maximum amount we need (10 when executing in V86 mode) */
595 if ((pTrapStackGC >> PAGE_SHIFT) != ((pTrapStackGC - 10*sizeof(uint32_t)) >> PAGE_SHIFT)) /* fail if we cross a page boundary */
596 goto failure;
597 PGMPAGEMAPLOCK PageMappingLock;
598 rc = PGMPhysGCPtr2CCPtr(pVM, pTrapStackGC, (void **)&pTrapStack, &PageMappingLock);
599 if (VBOX_FAILURE(rc))
600 {
601 AssertRC(rc);
602 goto failure;
603 }
604#endif
605 if (rc == VINF_SUCCESS)
606 {
607 /** if eflags.Bits.u1VM then push gs, fs, ds, es */
608 if (eflags.Bits.u1VM)
609 {
610 Log(("TRAP%02X: (VM) Handler %04X:%08X Stack %04X:%08X RPL=%d CR2=%08X\n", iGate, GuestIdte.Gen.u16SegSel, pHandler, ss_r0, esp_r0, (pRegFrame->ss & X86_SEL_RPL), pVM->trpm.s.uActiveCR2));
611 pTrapStack[--idx] = pRegFrame->gs;
612 pTrapStack[--idx] = pRegFrame->fs;
613 pTrapStack[--idx] = pRegFrame->ds;
614 pTrapStack[--idx] = pRegFrame->es;
615
616 /* clear ds, es, fs & gs in current context */
617 pRegFrame->ds = pRegFrame->es = pRegFrame->fs = pRegFrame->gs = 0;
618 }
619 else
620 Log(("TRAP%02X: Handler %04X:%08X Stack %04X:%08X RPL=%d CR2=%08X\n", iGate, GuestIdte.Gen.u16SegSel, pHandler, ss_r0, esp_r0, (pRegFrame->ss & X86_SEL_RPL), pVM->trpm.s.uActiveCR2));
621
622 if (!fConforming && dpl < cpl)
623 {
624 if ((pRegFrame->ss & X86_SEL_RPL) == 1 && !eflags.Bits.u1VM)
625 pTrapStack[--idx] = pRegFrame->ss & ~1; /* Mask away traces of raw ring execution (ring 1). */
626 else
627 pTrapStack[--idx] = pRegFrame->ss;
628
629 pTrapStack[--idx] = pRegFrame->esp;
630 }
631
632 /* Note: We use the eflags copy, that includes the virtualized bits! */
633 /* Note: Not really necessary as we grab include those bits in the trap/irq handler trampoline */
634 pTrapStack[--idx] = eflags.u32;
635
636 if ((pRegFrame->cs & X86_SEL_RPL) == 1 && !eflags.Bits.u1VM)
637 pTrapStack[--idx] = pRegFrame->cs & ~1; /* Mask away traces of raw ring execution (ring 1). */
638 else
639 pTrapStack[--idx] = pRegFrame->cs;
640
641 if (enmType == TRPM_SOFTWARE_INT)
642 {
643 Assert(opsize);
644 pTrapStack[--idx] = pRegFrame->eip + opsize; /* return address = next instruction */
645 }
646 else
647 pTrapStack[--idx] = pRegFrame->eip;
648
649 if (enmError == TRPM_TRAP_HAS_ERRORCODE)
650 {
651 pTrapStack[--idx] = pVM->trpm.s.uActiveErrorCode;
652 }
653
654 Assert(esp_r0 > -idx*sizeof(uint32_t));
655 /* Adjust ESP accordingly */
656 esp_r0 += idx*sizeof(uint32_t);
657
658 /* Mask away dangerous flags for the trap/interrupt handler. */
659 eflags.u32 &= ~(X86_EFL_TF | X86_EFL_VM | X86_EFL_RF | X86_EFL_NT);
660#ifdef DEBUG
661 for (int j=idx;j<0;j++)
662 Log4(("Stack %VGv pos %02d: %08x\n", &pTrapStack[j], j, pTrapStack[j]));
663
664 const char *pszPrefix = "";
665 const char *szEFlags = "";
666
667 Log4(("eax=%08x ebx=%08x ecx=%08x edx=%08x esi=%08x edi=%08x\n"
668 "eip=%08x esp=%08x ebp=%08x iopl=%d\n"
669 "cs=%04x ds=%04x es=%04x fs=%04x gs=%04x eflags=%08x\n",
670 pRegFrame->eax, pRegFrame->ebx, pRegFrame->ecx, pRegFrame->edx, pRegFrame->esi, pRegFrame->edi,
671 pRegFrame->eip, pRegFrame->esp, pRegFrame->ebp, eflags.Bits.u2IOPL,
672 (RTSEL)pRegFrame->cs, (RTSEL)pRegFrame->ds, (RTSEL)pRegFrame->es,
673 (RTSEL)pRegFrame->fs, (RTSEL)pRegFrame->gs, eflags.u32));
674#endif
675
676 Log(("PATM Handler %VGv Adjusted stack %08X new EFLAGS=%08X idx=%d dpl=%d cpl=%d\n", pVM->trpm.s.aGuestTrapHandler[iGate], esp_r0, eflags.u32, idx, dpl, cpl));
677
678 /* Make sure the internal guest context structure is up-to-date. */
679 CPUMSetGuestCR2(pVM, pVM->trpm.s.uActiveCR2);
680
681#ifdef IN_GC
682 /* Note: shouldn't be necessary */
683 ASMSetCR2(pVM->trpm.s.uActiveCR2);
684
685 /* Turn off interrupts for interrupt gates. */
686 if (GuestIdte.Gen.u5Type2 == VBOX_IDTE_TYPE2_INT_32)
687 CPUMRawSetEFlags(pVM, pRegFrame, eflags.u32 & ~X86_EFL_IF);
688
689 /* The virtualized bits must be removed again!! */
690 eflags.Bits.u1IF = 1;
691 eflags.Bits.u2IOPL = 0;
692
693 Assert(eflags.Bits.u1IF);
694 Assert(eflags.Bits.u2IOPL == 0);
695 STAM_COUNTER_INC(&pVM->trpm.s.CTXALLSUFF(paStatForwardedIRQ)[iGate]);
696 STAM_PROFILE_ADV_STOP(CTXSUFF(&pVM->trpm.s.StatForwardProf), a);
697
698 CPUMGCCallGuestTrapHandler(pRegFrame, GuestIdte.Gen.u16SegSel | 1, pVM->trpm.s.aGuestTrapHandler[iGate], eflags.u32, ss_r0, (RTGCPTR)esp_r0);
699 /* does not return */
700#else
701 /* Turn off interrupts for interrupt gates. */
702 if (GuestIdte.Gen.u5Type2 == VBOX_IDTE_TYPE2_INT_32)
703 eflags.Bits.u1IF = 0;
704
705 pRegFrame->eflags.u32 = eflags.u32;
706
707 pRegFrame->eip = pVM->trpm.s.aGuestTrapHandler[iGate];
708 pRegFrame->cs = GuestIdte.Gen.u16SegSel;
709 pRegFrame->esp = esp_r0;
710 pRegFrame->ss = ss_r0 & ~X86_SEL_RPL; /* set rpl to ring 0 */
711 STAM_PROFILE_ADV_STOP(CTXSUFF(&pVM->trpm.s.StatForwardProf), a);
712 PGMPhysReleasePageMappingLock(pVM, &PageMappingLock);
713 return VINF_SUCCESS;
714#endif
715 }
716 else
717 Log(("TRAP%02X: PGMVerifyAccess %VGv failed with %Vrc -> forward to REM\n", iGate, pTrapStackGC, rc));
718 }
719 else
720 Log(("SELMValidateAndConvertCSAddr failed with %Vrc\n", rc));
721 }
722 else
723 Log(("MMRamRead %VGv size %d failed with %Vrc\n", (RTGCUINTPTR)GCPtrIDT + sizeof(VBOXIDTE) * iGate, sizeof(GuestIdte), rc));
724 }
725 else
726 {
727 Log(("Refused to forward trap: eflags=%08x IF=%d\n", eflags.u32, eflags.Bits.u1IF));
728#ifdef VBOX_WITH_STATISTICS
729 if (pVM->trpm.s.aGuestTrapHandler[iGate] == TRPM_INVALID_HANDLER)
730 STAM_COUNTER_INC(&pVM->trpm.s.StatForwardFailNoHandler);
731 else
732 if (PATMIsPatchGCAddr(pVM, (RTGCPTR)pRegFrame->eip))
733 STAM_COUNTER_INC(&pVM->trpm.s.StatForwardFailPatchAddr);
734#endif
735 }
736failure:
737 STAM_COUNTER_INC(&CTXSUFF(pVM->trpm.s.StatForwardFail));
738 STAM_PROFILE_ADV_STOP(CTXSUFF(&pVM->trpm.s.StatForwardProf), a);
739
740 Log(("TRAP%02X: forwarding to REM (ss rpl=%d eflags=%08X VMIF=%d handler=%08X\n", iGate, pRegFrame->ss & X86_SEL_RPL, pRegFrame->eflags.u32, PATMAreInterruptsEnabledByCtxCore(pVM, pRegFrame), pVM->trpm.s.aGuestTrapHandler[iGate]));
741#endif
742 return VINF_EM_RAW_GUEST_TRAP;
743}
744#endif /* !IN_RING0 */
745
746/**
747 * Raises a cpu exception which doesn't take an error code.
748 *
749 * This function may or may not dispatch the exception before returning.
750 *
751 * @returns VBox status code fit for scheduling.
752 * @retval VINF_EM_RAW_GUEST_TRAP if the exception was left pending.
753 * @retval VINF_TRPM_XCPT_DISPATCHED if the exception was raised and dispatched for raw-mode execution.
754 * @retval VINF_EM_RESCHEDULE_REM if the exception was dispatched and cannot be executed in raw-mode.
755 *
756 * @param pVM The VM handle.
757 * @param pCtxCore The CPU context core.
758 * @param enmXcpt The exception.
759 */
760TRPMDECL(int) TRPMRaiseXcpt(PVM pVM, PCPUMCTXCORE pCtxCore, X86XCPT enmXcpt)
761{
762 LogFlow(("TRPMRaiseXcptErr: cs:eip=%RTsel:%RX32 enmXcpt=%#x\n", pCtxCore->cs, pCtxCore->eip, enmXcpt));
763/** @todo dispatch the trap. */
764 pVM->trpm.s.uActiveVector = enmXcpt;
765 pVM->trpm.s.enmActiveType = TRPM_TRAP;
766 pVM->trpm.s.uActiveErrorCode = 0xdeadbeef;
767 pVM->trpm.s.uActiveCR2 = 0xdeadface;
768 return VINF_EM_RAW_GUEST_TRAP;
769}
770
771
772/**
773 * Raises a cpu exception with an errorcode.
774 *
775 * This function may or may not dispatch the exception before returning.
776 *
777 * @returns VBox status code fit for scheduling.
778 * @retval VINF_EM_RAW_GUEST_TRAP if the exception was left pending.
779 * @retval VINF_TRPM_XCPT_DISPATCHED if the exception was raised and dispatched for raw-mode execution.
780 * @retval VINF_EM_RESCHEDULE_REM if the exception was dispatched and cannot be executed in raw-mode.
781 *
782 * @param pVM The VM handle.
783 * @param pCtxCore The CPU context core.
784 * @param enmXcpt The exception.
785 * @param uErr The error code.
786 */
787TRPMDECL(int) TRPMRaiseXcptErr(PVM pVM, PCPUMCTXCORE pCtxCore, X86XCPT enmXcpt, uint32_t uErr)
788{
789 LogFlow(("TRPMRaiseXcptErr: cs:eip=%RTsel:%RX32 enmXcpt=%#x uErr=%RX32\n", pCtxCore->cs, pCtxCore->eip, enmXcpt, uErr));
790/** @todo dispatch the trap. */
791 pVM->trpm.s.uActiveVector = enmXcpt;
792 pVM->trpm.s.enmActiveType = TRPM_TRAP;
793 pVM->trpm.s.uActiveErrorCode = uErr;
794 pVM->trpm.s.uActiveCR2 = 0xdeadface;
795 return VINF_EM_RAW_GUEST_TRAP;
796}
797
798
799/**
800 * Raises a cpu exception with an errorcode and CR2.
801 *
802 * This function may or may not dispatch the exception before returning.
803 *
804 * @returns VBox status code fit for scheduling.
805 * @retval VINF_EM_RAW_GUEST_TRAP if the exception was left pending.
806 * @retval VINF_TRPM_XCPT_DISPATCHED if the exception was raised and dispatched for raw-mode execution.
807 * @retval VINF_EM_RESCHEDULE_REM if the exception was dispatched and cannot be executed in raw-mode.
808 *
809 * @param pVM The VM handle.
810 * @param pCtxCore The CPU context core.
811 * @param enmXcpt The exception.
812 * @param uErr The error code.
813 * @param uCR2 The CR2 value.
814 */
815TRPMDECL(int) TRPMRaiseXcptErrCR2(PVM pVM, PCPUMCTXCORE pCtxCore, X86XCPT enmXcpt, uint32_t uErr, RTGCUINTPTR uCR2)
816{
817 LogFlow(("TRPMRaiseXcptErr: cs:eip=%RTsel:%RX32 enmXcpt=%#x uErr=%RX32 uCR2=%RGv\n", pCtxCore->cs, pCtxCore->eip, enmXcpt, uErr, uCR2));
818/** @todo dispatch the trap. */
819 pVM->trpm.s.uActiveVector = enmXcpt;
820 pVM->trpm.s.enmActiveType = TRPM_TRAP;
821 pVM->trpm.s.uActiveErrorCode = uErr;
822 pVM->trpm.s.uActiveCR2 = uCR2;
823 return VINF_EM_RAW_GUEST_TRAP;
824}
825
826
827/**
828 * Clear guest trap/interrupt gate handler
829 *
830 * @returns VBox status code.
831 * @param pVM The VM to operate on.
832 * @param iTrap Interrupt/trap number.
833 */
834TRPMDECL(int) trpmClearGuestTrapHandler(PVM pVM, unsigned iTrap)
835{
836 /*
837 * Validate.
838 */
839 if (iTrap >= ELEMENTS(pVM->trpm.s.aIdt))
840 {
841 AssertMsg(iTrap < TRPM_HANDLER_INT_BASE, ("Illegal gate number %d!\n", iTrap));
842 return VERR_INVALID_PARAMETER;
843 }
844
845 if (ASMBitTest(&pVM->trpm.s.au32IdtPatched[0], iTrap))
846#ifdef IN_RING3
847 trpmR3ClearPassThroughHandler(pVM, iTrap);
848#else
849 AssertFailed();
850#endif
851
852 pVM->trpm.s.aGuestTrapHandler[iTrap] = TRPM_INVALID_HANDLER;
853 return VINF_SUCCESS;
854}
855
856
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