TMAllCpu.cpp@ 87778

Last change on this file since 87778 was 87634, checked in by vboxsync, 4 years ago
VMM/TM,VMM/HMVMX: Try avoid calling TMCpuTickGetDeadlineAndTscOffset as it is expensive. Current approach is a bit erratic wrt CPUID benchmark results, but it's generally better than before. [build fix]
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1	/* $Id: TMAllCpu.cpp 87634 2021-02-05 21:52:24Z vboxsync $ */
2	/** @file
3	* TM - Timeout Manager, CPU Time, All Contexts.
4	*/
5
6	/*
7	* Copyright (C) 2006-2020 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18
19	/*********************************************************************************************************************************
20	* Header Files *
21	*********************************************************************************************************************************/
22	#define LOG_GROUP LOG_GROUP_TM
23	#include <VBox/vmm/tm.h>
24	#include <VBox/vmm/gim.h>
25	#include <VBox/vmm/dbgf.h>
26	#include <VBox/vmm/nem.h>
27	#if defined(RT_ARCH_AMD64) \|\| defined(RT_ARCH_X86)
28	# include <iprt/asm-amd64-x86.h> /* for SUPGetCpuHzFromGIP; ASMReadTSC */
29	#elif defined(RT_ARCH_ARM64) \|\| defined(RT_ARCH_ARM32)
30	# include <iprt/asm-arm.h>
31	#endif
32	#include "TMInternal.h"
33	#include <VBox/vmm/vmcc.h>
34	#include <VBox/sup.h>
35
36	#include <VBox/param.h>
37	#include <VBox/err.h>
38	#include <iprt/asm-math.h>
39	#include <iprt/assert.h>
40	#include <VBox/log.h>
41
42
43
44	/**
45	* Converts from virtual time to raw CPU ticks.
46	*
47	* Mainly to have the ASMMultU64ByU32DivByU32 overflow trickery in one place.
48	*
49	* @returns raw CPU ticks.
50	* @param pVM The cross context VM structure.
51	* @param u64VirtualTime The virtual time to convert.
52	*/
53	DECLINLINE(uint64_t) tmCpuTickCalcFromVirtual(PVMCC pVM, uint64_t u64VirtualTime)
54	{
55	if (pVM->tm.s.cTSCTicksPerSecond <= UINT32_MAX)
56	return ASMMultU64ByU32DivByU32(u64VirtualTime, (uint32_t)pVM->tm.s.cTSCTicksPerSecond, TMCLOCK_FREQ_VIRTUAL);
57	Assert(pVM->tm.s.cTSCTicksPerSecond <= ((uint64_t)UINT32_MAX << 2)); /* <= 15.99 GHz */
58	return ASMMultU64ByU32DivByU32(u64VirtualTime, (uint32_t)(pVM->tm.s.cTSCTicksPerSecond >> 2), TMCLOCK_FREQ_VIRTUAL >> 2);
59	}
60
61
62	/**
63	* Gets the raw cpu tick from current virtual time.
64	*
65	* @param pVM The cross context VM structure.
66	* @param fCheckTimers Whether to check timers.
67	*/
68	DECLINLINE(uint64_t) tmCpuTickGetRawVirtual(PVMCC pVM, bool fCheckTimers)
69	{
70	if (fCheckTimers)
71	return tmCpuTickCalcFromVirtual(pVM, TMVirtualSyncGet(pVM));
72	return tmCpuTickCalcFromVirtual(pVM, TMVirtualSyncGetNoCheck(pVM));
73	}
74
75
76	#ifdef IN_RING3
77	/**
78	* Used by tmR3CpuTickParavirtEnable and tmR3CpuTickParavirtDisable.
79	*
80	* @param pVM The cross context VM structure.
81	*/
82	uint64_t tmR3CpuTickGetRawVirtualNoCheck(PVM pVM)
83	{
84	return tmCpuTickGetRawVirtual(pVM, false /fCheckTimers/);
85	}
86	#endif
87
88
89	/**
90	* Resumes the CPU timestamp counter ticking.
91	*
92	* @returns VBox status code.
93	* @param pVM The cross context VM structure.
94	* @param pVCpu The cross context virtual CPU structure.
95	* @internal
96	*/
97	int tmCpuTickResume(PVMCC pVM, PVMCPUCC pVCpu)
98	{
99	if (!pVCpu->tm.s.fTSCTicking)
100	{
101	pVCpu->tm.s.fTSCTicking = true;
102
103	/** @todo Test that pausing and resuming doesn't cause lag! (I.e. that we're
104	* unpaused before the virtual time and stopped after it. */
105	switch (pVM->tm.s.enmTSCMode)
106	{
107	case TMTSCMODE_REAL_TSC_OFFSET:
108	pVCpu->tm.s.offTSCRawSrc = SUPReadTsc() - pVCpu->tm.s.u64TSC;
109	break;
110	case TMTSCMODE_VIRT_TSC_EMULATED:
111	case TMTSCMODE_DYNAMIC:
112	pVCpu->tm.s.offTSCRawSrc = tmCpuTickGetRawVirtual(pVM, false /* don't check for pending timers */)
113	- pVCpu->tm.s.u64TSC;
114	break;
115	case TMTSCMODE_NATIVE_API:
116	pVCpu->tm.s.offTSCRawSrc = 0; /** @todo ?? */
117	/* Looks like this is only used by weird modes and MSR TSC writes. We cannot support either on NEM/win. */
118	break;
119	default:
120	AssertFailedReturn(VERR_IPE_NOT_REACHED_DEFAULT_CASE);
121	}
122	return VINF_SUCCESS;
123	}
124	AssertFailed();
125	return VERR_TM_TSC_ALREADY_TICKING;
126	}
127
128
129	/**
130	* Resumes the CPU timestamp counter ticking.
131	*
132	* @returns VINF_SUCCESS or VERR_TM_VIRTUAL_TICKING_IPE (asserted).
133	* @param pVM The cross context VM structure.
134	* @param pVCpu The cross context virtual CPU structure.
135	*/
136	int tmCpuTickResumeLocked(PVMCC pVM, PVMCPUCC pVCpu)
137	{
138	if (!pVCpu->tm.s.fTSCTicking)
139	{
140	/* TSC must be ticking before calling tmCpuTickGetRawVirtual()! */
141	pVCpu->tm.s.fTSCTicking = true;
142	uint32_t c = ASMAtomicIncU32(&pVM->tm.s.cTSCsTicking);
143	AssertMsgReturn(c <= pVM->cCpus, ("%u vs %u\n", c, pVM->cCpus), VERR_TM_VIRTUAL_TICKING_IPE);
144	if (c == 1)
145	{
146	/* The first VCPU to resume. */
147	uint64_t offTSCRawSrcOld = pVCpu->tm.s.offTSCRawSrc;
148
149	STAM_COUNTER_INC(&pVM->tm.s.StatTSCResume);
150
151	/* When resuming, use the TSC value of the last stopped VCPU to avoid the TSC going back. */
152	switch (pVM->tm.s.enmTSCMode)
153	{
154	case TMTSCMODE_REAL_TSC_OFFSET:
155	pVCpu->tm.s.offTSCRawSrc = SUPReadTsc() - pVM->tm.s.u64LastPausedTSC;
156	break;
157	case TMTSCMODE_VIRT_TSC_EMULATED:
158	case TMTSCMODE_DYNAMIC:
159	pVCpu->tm.s.offTSCRawSrc = tmCpuTickGetRawVirtual(pVM, false /* don't check for pending timers */)
160	- pVM->tm.s.u64LastPausedTSC;
161	break;
162	case TMTSCMODE_NATIVE_API:
163	{
164	int rc = NEMHCResumeCpuTickOnAll(pVM, pVCpu, pVM->tm.s.u64LastPausedTSC);
165	AssertRCReturn(rc, rc);
166	pVCpu->tm.s.offTSCRawSrc = offTSCRawSrcOld = 0;
167	break;
168	}
169	default:
170	AssertFailedReturn(VERR_IPE_NOT_REACHED_DEFAULT_CASE);
171	}
172
173	/* Calculate the offset addendum for other VCPUs to use. */
174	pVM->tm.s.offTSCPause = pVCpu->tm.s.offTSCRawSrc - offTSCRawSrcOld;
175	}
176	else
177	{
178	/* All other VCPUs (if any). */
179	pVCpu->tm.s.offTSCRawSrc += pVM->tm.s.offTSCPause;
180	}
181	}
182	return VINF_SUCCESS;
183	}
184
185
186	/**
187	* Pauses the CPU timestamp counter ticking.
188	*
189	* @returns VBox status code.
190	* @param pVCpu The cross context virtual CPU structure.
191	* @internal
192	*/
193	int tmCpuTickPause(PVMCPUCC pVCpu)
194	{
195	if (pVCpu->tm.s.fTSCTicking)
196	{
197	pVCpu->tm.s.u64TSC = TMCpuTickGetNoCheck(pVCpu);
198	pVCpu->tm.s.fTSCTicking = false;
199	return VINF_SUCCESS;
200	}
201	AssertFailed();
202	return VERR_TM_TSC_ALREADY_PAUSED;
203	}
204
205
206	/**
207	* Pauses the CPU timestamp counter ticking.
208	*
209	* @returns VBox status code.
210	* @param pVM The cross context VM structure.
211	* @param pVCpu The cross context virtual CPU structure.
212	* @internal
213	*/
214	int tmCpuTickPauseLocked(PVMCC pVM, PVMCPUCC pVCpu)
215	{
216	if (pVCpu->tm.s.fTSCTicking)
217	{
218	pVCpu->tm.s.u64TSC = TMCpuTickGetNoCheck(pVCpu);
219	pVCpu->tm.s.fTSCTicking = false;
220
221	uint32_t c = ASMAtomicDecU32(&pVM->tm.s.cTSCsTicking);
222	AssertMsgReturn(c < pVM->cCpus, ("%u vs %u\n", c, pVM->cCpus), VERR_TM_VIRTUAL_TICKING_IPE);
223	if (c == 0)
224	{
225	/* When the last TSC stops, remember the value. */
226	STAM_COUNTER_INC(&pVM->tm.s.StatTSCPause);
227	pVM->tm.s.u64LastPausedTSC = pVCpu->tm.s.u64TSC;
228	}
229	return VINF_SUCCESS;
230	}
231	AssertFailed();
232	return VERR_TM_TSC_ALREADY_PAUSED;
233	}
234
235
236	#ifdef IN_RING0 /* Only used in ring-0 at present (AMD-V and VT-x). */
237
238	# ifdef VBOX_WITH_STATISTICS
239	/**
240	* Record why we refused to use offsetted TSC.
241	*
242	* Used by TMCpuTickCanUseRealTSC() and TMCpuTickGetDeadlineAndTscOffset().
243	*
244	* @param pVM The cross context VM structure.
245	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
246	*/
247	DECLINLINE(void) tmCpuTickRecordOffsettedTscRefusal(PVM pVM, PVMCPU pVCpu)
248	{
249	/* Sample the reason for refusing. */
250	if (pVM->tm.s.enmTSCMode != TMTSCMODE_DYNAMIC)
251	STAM_COUNTER_INC(&pVM->tm.s.StatTSCNotFixed);
252	else if (!pVCpu->tm.s.fTSCTicking)
253	STAM_COUNTER_INC(&pVM->tm.s.StatTSCNotTicking);
254	else if (pVM->tm.s.enmTSCMode != TMTSCMODE_REAL_TSC_OFFSET)
255	{
256	if (pVM->tm.s.fVirtualSyncCatchUp)
257	{
258	if (pVM->tm.s.u32VirtualSyncCatchUpPercentage <= 10)
259	STAM_COUNTER_INC(&pVM->tm.s.StatTSCCatchupLE010);
260	else if (pVM->tm.s.u32VirtualSyncCatchUpPercentage <= 25)
261	STAM_COUNTER_INC(&pVM->tm.s.StatTSCCatchupLE025);
262	else if (pVM->tm.s.u32VirtualSyncCatchUpPercentage <= 100)
263	STAM_COUNTER_INC(&pVM->tm.s.StatTSCCatchupLE100);
264	else
265	STAM_COUNTER_INC(&pVM->tm.s.StatTSCCatchupOther);
266	}
267	else if (!pVM->tm.s.fVirtualSyncTicking)
268	STAM_COUNTER_INC(&pVM->tm.s.StatTSCSyncNotTicking);
269	else if (pVM->tm.s.fVirtualWarpDrive)
270	STAM_COUNTER_INC(&pVM->tm.s.StatTSCWarp);
271	}
272	}
273	# endif /* VBOX_WITH_STATISTICS */
274
275	/**
276	* Checks if AMD-V / VT-x can use an offsetted hardware TSC or not.
277	*
278	* @returns true/false accordingly.
279	* @param pVM The cross context VM structure.
280	* @param pVCpu The cross context virtual CPU structure.
281	* @param poffRealTsc The offset against the TSC of the current host CPU,
282	* if pfOffsettedTsc is set to true.
283	* @param pfParavirtTsc Where to return whether paravirt TSC is enabled.
284	*
285	* @thread EMT(pVCpu).
286	* @see TMCpuTickGetDeadlineAndTscOffset().
287	*/
288	VMM_INT_DECL(bool) TMCpuTickCanUseRealTSC(PVMCC pVM, PVMCPUCC pVCpu, uint64_t poffRealTsc, bool pfParavirtTsc)
289	{
290	Assert(pVCpu->tm.s.fTSCTicking \|\| DBGFIsStepping(pVCpu));
291
292	*pfParavirtTsc = pVM->tm.s.fParavirtTscEnabled;
293
294	/*
295	* In real TSC mode it's easy, we just need the delta & offTscRawSrc and
296	* the CPU will add them to RDTSC and RDTSCP at runtime.
297	*
298	* In tmCpuTickGetInternal we do:
299	* SUPReadTsc() - pVCpu->tm.s.offTSCRawSrc;
300	* Where SUPReadTsc() does:
301	* ASMReadTSC() - pGipCpu->i64TscDelta;
302	* Which means tmCpuTickGetInternal actually does:
303	* ASMReadTSC() - pGipCpu->i64TscDelta - pVCpu->tm.s.offTSCRawSrc;
304	* So, the offset to be ADDED to RDTSC[P] is:
305	* offRealTsc = -(pGipCpu->i64TscDelta + pVCpu->tm.s.offTSCRawSrc)
306	*/
307	if (pVM->tm.s.enmTSCMode == TMTSCMODE_REAL_TSC_OFFSET)
308	{
309	/** @todo We should negate both deltas! It's soo weird that we do the
310	* exact opposite of what the hardware implements. */
311	# ifdef IN_RING3
312	*poffRealTsc = (uint64_t)0 - pVCpu->tm.s.offTSCRawSrc - (uint64_t)SUPGetTscDelta();
313	# else
314	*poffRealTsc = (uint64_t)0 - pVCpu->tm.s.offTSCRawSrc - (uint64_t)SUPGetTscDeltaByCpuSetIndex(pVCpu->iHostCpuSet);
315	# endif
316	return true;
317	}
318
319	/*
320	* We require:
321	* 1. A fixed TSC, this is checked at init time.
322	* 2. That the TSC is ticking (we shouldn't be here if it isn't)
323	* 3. Either that we're using the real TSC as time source or
324	* a) we don't have any lag to catch up, and
325	* b) the virtual sync clock hasn't been halted by an expired timer, and
326	* c) we're not using warp drive (accelerated virtual guest time).
327	*/
328	if ( pVM->tm.s.enmTSCMode == TMTSCMODE_DYNAMIC
329	&& !pVM->tm.s.fVirtualSyncCatchUp
330	&& RT_LIKELY(pVM->tm.s.fVirtualSyncTicking)
331	&& !pVM->tm.s.fVirtualWarpDrive)
332	{
333	/* The source is the timer synchronous virtual clock. */
334	uint64_t uTscNow;
335	uint64_t u64Now = tmCpuTickCalcFromVirtual(pVM, TMVirtualSyncGetNoCheckWithTsc(pVM, &uTscNow))
336	- pVCpu->tm.s.offTSCRawSrc;
337	/** @todo When we start collecting statistics on how much time we spend executing
338	* guest code before exiting, we should check this against the next virtual sync
339	* timer timeout. If it's lower than the avg. length, we should trap rdtsc to increase
340	* the chance that we'll get interrupted right after the timer expired. */
341	if (u64Now >= pVCpu->tm.s.u64TSCLastSeen)
342	{
343	# ifdef IN_RING3
344	*poffRealTsc = u64Now - (uTscNow + (uint64_t)SUPGetTscDelta();
345	# else
346	*poffRealTsc = u64Now - (uTscNow + (uint64_t)SUPGetTscDeltaByCpuSetIndex(pVCpu->iHostCpuSet));
347	# endif
348	return true; /** @todo count this? */
349	}
350	}
351
352	# ifdef VBOX_WITH_STATISTICS
353	tmCpuTickRecordOffsettedTscRefusal(pVM, pVCpu);
354	# endif
355	return false;
356	}
357
358
359	/**
360	* Calculates the number of host CPU ticks till the next virtual sync deadline.
361	*
362	* @note To save work, this function will not bother calculating the accurate
363	* tick count for deadlines that are more than a second ahead.
364	*
365	* @returns The number of host cpu ticks to the next deadline. Max one second.
366	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
367	* @param cNsToDeadline The number of nano seconds to the next virtual
368	* sync deadline.
369	*/
370	DECLINLINE(uint64_t) tmCpuCalcTicksToDeadline(PVMCPU pVCpu, uint64_t cNsToDeadline)
371	{
372	AssertCompile(TMCLOCK_FREQ_VIRTUAL <= _4G);
373	# ifdef IN_RING3
374	RT_NOREF_PV(pVCpu);
375	uint64_t uCpuHz = SUPGetCpuHzFromGip(g_pSUPGlobalInfoPage);
376	# else
377	uint64_t uCpuHz = SUPGetCpuHzFromGipBySetIndex(g_pSUPGlobalInfoPage, pVCpu->iHostCpuSet);
378	# endif
379	if (RT_UNLIKELY(cNsToDeadline >= TMCLOCK_FREQ_VIRTUAL))
380	return uCpuHz;
381	AssertCompile(TMCLOCK_FREQ_VIRTUAL <= UINT32_MAX);
382	uint64_t cTicks = ASMMultU64ByU32DivByU32(uCpuHz, (uint32_t)cNsToDeadline, TMCLOCK_FREQ_VIRTUAL);
383	if (cTicks > 4000)
384	cTicks -= 4000; /* fudge to account for overhead */
385	else
386	cTicks >>= 1;
387	return cTicks;
388	}
389
390
391	/**
392	* Gets the next deadline in host CPU clock ticks and the TSC offset if we can
393	* use the raw TSC.
394	*
395	* @returns The number of host CPU clock ticks to the next timer deadline.
396	* @param pVM The cross context VM structure.
397	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
398	* @param poffRealTsc The offset against the TSC of the current host CPU,
399	* if pfOffsettedTsc is set to true.
400	* @param pfOffsettedTsc Where to return whether TSC offsetting can be used.
401	* @param pfParavirtTsc Where to return whether paravirt TSC is enabled.
402	* @param puTscNow Where to return the TSC value that the return
403	* value is relative to. This is delta adjusted.
404	* @param puDeadlineVersion Where to return the deadline "version" number.
405	* Use with TMVirtualSyncIsCurrentDeadlineVersion()
406	* to check if the absolute deadline is still up to
407	* date and the caller can skip calling this
408	* function.
409	*
410	* @thread EMT(pVCpu).
411	* @see TMCpuTickCanUseRealTSC().
412	*/
413	VMM_INT_DECL(uint64_t) TMCpuTickGetDeadlineAndTscOffset(PVMCC pVM, PVMCPUCC pVCpu, uint64_t *poffRealTsc,
414	bool pfOffsettedTsc, bool pfParavirtTsc,
415	uint64_t puTscNow, uint64_t puDeadlineVersion)
416	{
417	Assert(pVCpu->tm.s.fTSCTicking \|\| DBGFIsStepping(pVCpu));
418
419	*pfParavirtTsc = pVM->tm.s.fParavirtTscEnabled;
420
421	/*
422	* Same logic as in TMCpuTickCanUseRealTSC.
423	*/
424	if (pVM->tm.s.enmTSCMode == TMTSCMODE_REAL_TSC_OFFSET)
425	{
426	/** @todo We should negate both deltas! It's soo weird that we do the
427	* exact opposite of what the hardware implements. */
428	# ifdef IN_RING3
429	*poffRealTsc = (uint64_t)0 - pVCpu->tm.s.offTSCRawSrc - (uint64_t)SUPGetTscDelta();
430	# else
431	*poffRealTsc = (uint64_t)0 - pVCpu->tm.s.offTSCRawSrc - (uint64_t)SUPGetTscDeltaByCpuSetIndex(pVCpu->iHostCpuSet);
432	# endif
433	*pfOffsettedTsc = true;
434	return tmCpuCalcTicksToDeadline(pVCpu, TMVirtualSyncGetNsToDeadline(pVM, puDeadlineVersion, puTscNow));
435	}
436
437	/*
438	* Same logic as in TMCpuTickCanUseRealTSC.
439	*/
440	if ( pVM->tm.s.enmTSCMode == TMTSCMODE_DYNAMIC
441	&& !pVM->tm.s.fVirtualSyncCatchUp
442	&& RT_LIKELY(pVM->tm.s.fVirtualSyncTicking)
443	&& !pVM->tm.s.fVirtualWarpDrive)
444	{
445	/* The source is the timer synchronous virtual clock. */
446	uint64_t cNsToDeadline;
447	uint64_t u64NowVirtSync = TMVirtualSyncGetWithDeadlineNoCheck(pVM, &cNsToDeadline, puDeadlineVersion, puTscNow);
448	uint64_t u64Now = tmCpuTickCalcFromVirtual(pVM, u64NowVirtSync);
449	u64Now -= pVCpu->tm.s.offTSCRawSrc;
450
451	# ifdef IN_RING3
452	poffRealTsc = u64Now - (puTscNow + (uint64_t)SUPGetTscDelta()); /* undoing delta */
453	# else
454	poffRealTsc = u64Now - (puTscNow + (uint64_t)SUPGetTscDeltaByCpuSetIndex(pVCpu->iHostCpuSet)); /* undoing delta */
455	# endif
456	*pfOffsettedTsc = u64Now >= pVCpu->tm.s.u64TSCLastSeen;
457	return tmCpuCalcTicksToDeadline(pVCpu, cNsToDeadline);
458	}
459
460	# ifdef VBOX_WITH_STATISTICS
461	tmCpuTickRecordOffsettedTscRefusal(pVM, pVCpu);
462	# endif
463	*pfOffsettedTsc = false;
464	*poffRealTsc = 0;
465	return tmCpuCalcTicksToDeadline(pVCpu, TMVirtualSyncGetNsToDeadline(pVM, puDeadlineVersion, puTscNow));
466	}
467
468	#endif /* IN_RING0 - at the moment */
469
470	/**
471	* Read the current CPU timestamp counter.
472	*
473	* @returns Gets the CPU tsc.
474	* @param pVCpu The cross context virtual CPU structure.
475	* @param fCheckTimers Whether to check timers.
476	*/
477	DECLINLINE(uint64_t) tmCpuTickGetInternal(PVMCPUCC pVCpu, bool fCheckTimers)
478	{
479	uint64_t u64;
480
481	if (RT_LIKELY(pVCpu->tm.s.fTSCTicking))
482	{
483	PVMCC pVM = pVCpu->CTX_SUFF(pVM);
484	switch (pVM->tm.s.enmTSCMode)
485	{
486	case TMTSCMODE_REAL_TSC_OFFSET:
487	u64 = SUPReadTsc();
488	break;
489	case TMTSCMODE_VIRT_TSC_EMULATED:
490	case TMTSCMODE_DYNAMIC:
491	u64 = tmCpuTickGetRawVirtual(pVM, fCheckTimers);
492	break;
493	case TMTSCMODE_NATIVE_API:
494	{
495	u64 = 0;
496	int rcNem = NEMHCQueryCpuTick(pVCpu, &u64, NULL);
497	AssertLogRelRCReturn(rcNem, SUPReadTsc());
498	break;
499	}
500	default:
501	AssertFailedBreakStmt(u64 = SUPReadTsc());
502	}
503	u64 -= pVCpu->tm.s.offTSCRawSrc;
504
505	/* Always return a value higher than what the guest has already seen. */
506	if (RT_LIKELY(u64 > pVCpu->tm.s.u64TSCLastSeen))
507	pVCpu->tm.s.u64TSCLastSeen = u64;
508	else
509	{
510	STAM_COUNTER_INC(&pVM->tm.s.StatTSCUnderflow);
511	pVCpu->tm.s.u64TSCLastSeen += 64; /** @todo choose a good increment here */
512	u64 = pVCpu->tm.s.u64TSCLastSeen;
513	}
514	}
515	else
516	u64 = pVCpu->tm.s.u64TSC;
517	return u64;
518	}
519
520
521	/**
522	* Read the current CPU timestamp counter.
523	*
524	* @returns Gets the CPU tsc.
525	* @param pVCpu The cross context virtual CPU structure.
526	*/
527	VMMDECL(uint64_t) TMCpuTickGet(PVMCPUCC pVCpu)
528	{
529	return tmCpuTickGetInternal(pVCpu, true /* fCheckTimers */);
530	}
531
532
533	/**
534	* Read the current CPU timestamp counter, don't check for expired timers.
535	*
536	* @returns Gets the CPU tsc.
537	* @param pVCpu The cross context virtual CPU structure.
538	*/
539	VMM_INT_DECL(uint64_t) TMCpuTickGetNoCheck(PVMCPUCC pVCpu)
540	{
541	return tmCpuTickGetInternal(pVCpu, false /* fCheckTimers */);
542	}
543
544
545	/**
546	* Sets the current CPU timestamp counter.
547	*
548	* @returns VBox status code.
549	* @param pVM The cross context VM structure.
550	* @param pVCpu The cross context virtual CPU structure.
551	* @param u64Tick The new timestamp value.
552	*
553	* @thread EMT which TSC is to be set.
554	*/
555	VMM_INT_DECL(int) TMCpuTickSet(PVMCC pVM, PVMCPUCC pVCpu, uint64_t u64Tick)
556	{
557	VMCPU_ASSERT_EMT(pVCpu);
558	STAM_COUNTER_INC(&pVM->tm.s.StatTSCSet);
559
560	/*
561	* This is easier to do when the TSC is paused since resume will
562	* do all the calculations for us. Actually, we don't need to
563	* call tmCpuTickPause here since we overwrite u64TSC anyway.
564	*/
565	bool fTSCTicking = pVCpu->tm.s.fTSCTicking;
566	pVCpu->tm.s.fTSCTicking = false;
567	pVCpu->tm.s.u64TSC = u64Tick;
568	pVCpu->tm.s.u64TSCLastSeen = u64Tick;
569	if (fTSCTicking)
570	tmCpuTickResume(pVM, pVCpu);
571	/** @todo Try help synchronizing it better among the virtual CPUs? */
572
573	return VINF_SUCCESS;
574	}
575
576	/**
577	* Sets the last seen CPU timestamp counter.
578	*
579	* @returns VBox status code.
580	* @param pVCpu The cross context virtual CPU structure.
581	* @param u64LastSeenTick The last seen timestamp value.
582	*
583	* @thread EMT which TSC is to be set.
584	*/
585	VMM_INT_DECL(int) TMCpuTickSetLastSeen(PVMCPUCC pVCpu, uint64_t u64LastSeenTick)
586	{
587	VMCPU_ASSERT_EMT(pVCpu);
588
589	LogFlow(("TMCpuTickSetLastSeen %RX64\n", u64LastSeenTick));
590	if (pVCpu->tm.s.u64TSCLastSeen < u64LastSeenTick)
591	pVCpu->tm.s.u64TSCLastSeen = u64LastSeenTick;
592	return VINF_SUCCESS;
593	}
594
595	/**
596	* Gets the last seen CPU timestamp counter of the guest.
597	*
598	* @returns the last seen TSC.
599	* @param pVCpu The cross context virtual CPU structure.
600	*
601	* @thread EMT(pVCpu).
602	*/
603	VMM_INT_DECL(uint64_t) TMCpuTickGetLastSeen(PVMCPUCC pVCpu)
604	{
605	VMCPU_ASSERT_EMT(pVCpu);
606
607	return pVCpu->tm.s.u64TSCLastSeen;
608	}
609
610
611	/**
612	* Get the timestamp frequency.
613	*
614	* @returns Number of ticks per second.
615	* @param pVM The cross context VM structure.
616	*/
617	VMMDECL(uint64_t) TMCpuTicksPerSecond(PVMCC pVM)
618	{
619	if ( pVM->tm.s.enmTSCMode == TMTSCMODE_REAL_TSC_OFFSET
620	&& g_pSUPGlobalInfoPage->u32Mode != SUPGIPMODE_INVARIANT_TSC)
621	{
622	#ifdef IN_RING3
623	uint64_t cTSCTicksPerSecond = SUPGetCpuHzFromGip(g_pSUPGlobalInfoPage);
624	#elif defined(IN_RING0)
625	uint64_t cTSCTicksPerSecond = SUPGetCpuHzFromGipBySetIndex(g_pSUPGlobalInfoPage, (uint32_t)RTMpCpuIdToSetIndex(RTMpCpuId()));
626	#else
627	uint64_t cTSCTicksPerSecond = SUPGetCpuHzFromGipBySetIndex(g_pSUPGlobalInfoPage, VMMGetCpu(pVM)->iHostCpuSet);
628	#endif
629	if (RT_LIKELY(cTSCTicksPerSecond != ~(uint64_t)0))
630	return cTSCTicksPerSecond;
631	}
632	return pVM->tm.s.cTSCTicksPerSecond;
633	}
634
635
636	/**
637	* Whether the TSC is ticking for the VCPU.
638	*
639	* @returns true if ticking, false otherwise.
640	* @param pVCpu The cross context virtual CPU structure.
641	*/
642	VMM_INT_DECL(bool) TMCpuTickIsTicking(PVMCPUCC pVCpu)
643	{
644	return pVCpu->tm.s.fTSCTicking;
645	}
646

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source: vbox/trunk/src/VBox/VMM/VMMAll/TMAllCpu.cpp@ 87778

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