TMAllCpu.cpp@ 80161

Last change on this file since 80161 was 80161, checked in by vboxsync, 5 years ago
VMM,REM: Kicking out raw-mode. bugref:9517
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1	/* $Id: TMAllCpu.cpp 80161 2019-08-06 18:10:51Z vboxsync $ */
2	/** @file
3	* TM - Timeout Manager, CPU Time, All Contexts.
4	*/
5
6	/*
7	* Copyright (C) 2006-2019 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18
19	/*********************************************************************************************************************************
20	* Header Files *
21	*********************************************************************************************************************************/
22	#define LOG_GROUP LOG_GROUP_TM
23	#include <VBox/vmm/tm.h>
24	#include <VBox/vmm/gim.h>
25	#include <VBox/vmm/dbgf.h>
26	#include <VBox/vmm/nem.h>
27	#include <iprt/asm-amd64-x86.h> /* for SUPGetCpuHzFromGIP */
28	#include "TMInternal.h"
29	#include <VBox/vmm/vm.h>
30	#include <VBox/sup.h>
31
32	#include <VBox/param.h>
33	#include <VBox/err.h>
34	#include <iprt/asm-math.h>
35	#include <iprt/assert.h>
36	#include <VBox/log.h>
37
38
39	/**
40	* Gets the raw cpu tick from current virtual time.
41	*
42	* @param pVM The cross context VM structure.
43	* @param fCheckTimers Whether to check timers.
44	*/
45	DECLINLINE(uint64_t) tmCpuTickGetRawVirtual(PVM pVM, bool fCheckTimers)
46	{
47	uint64_t u64;
48	if (fCheckTimers)
49	u64 = TMVirtualSyncGet(pVM);
50	else
51	u64 = TMVirtualSyncGetNoCheck(pVM);
52	return ASMMultU64ByU32DivByU32(u64, pVM->tm.s.cTSCTicksPerSecond, TMCLOCK_FREQ_VIRTUAL);
53	}
54
55
56	#ifdef IN_RING3
57	/**
58	* Used by tmR3CpuTickParavirtEnable and tmR3CpuTickParavirtDisable.
59	*
60	* @param pVM The cross context VM structure.
61	*/
62	uint64_t tmR3CpuTickGetRawVirtualNoCheck(PVM pVM)
63	{
64	return tmCpuTickGetRawVirtual(pVM, false /fCheckTimers/);
65	}
66	#endif
67
68
69	/**
70	* Resumes the CPU timestamp counter ticking.
71	*
72	* @returns VBox status code.
73	* @param pVM The cross context VM structure.
74	* @param pVCpu The cross context virtual CPU structure.
75	* @internal
76	*/
77	int tmCpuTickResume(PVM pVM, PVMCPU pVCpu)
78	{
79	if (!pVCpu->tm.s.fTSCTicking)
80	{
81	pVCpu->tm.s.fTSCTicking = true;
82
83	/** @todo Test that pausing and resuming doesn't cause lag! (I.e. that we're
84	* unpaused before the virtual time and stopped after it. */
85	switch (pVM->tm.s.enmTSCMode)
86	{
87	case TMTSCMODE_REAL_TSC_OFFSET:
88	pVCpu->tm.s.offTSCRawSrc = SUPReadTsc() - pVCpu->tm.s.u64TSC;
89	break;
90	case TMTSCMODE_VIRT_TSC_EMULATED:
91	case TMTSCMODE_DYNAMIC:
92	pVCpu->tm.s.offTSCRawSrc = tmCpuTickGetRawVirtual(pVM, false /* don't check for pending timers */)
93	- pVCpu->tm.s.u64TSC;
94	break;
95	case TMTSCMODE_NATIVE_API:
96	pVCpu->tm.s.offTSCRawSrc = 0; /** @todo ?? */
97	/* Looks like this is only used by weird modes and MSR TSC writes. We cannot support either on NEM/win. */
98	break;
99	default:
100	AssertFailedReturn(VERR_IPE_NOT_REACHED_DEFAULT_CASE);
101	}
102	return VINF_SUCCESS;
103	}
104	AssertFailed();
105	return VERR_TM_TSC_ALREADY_TICKING;
106	}
107
108
109	/**
110	* Resumes the CPU timestamp counter ticking.
111	*
112	* @returns VINF_SUCCESS or VERR_TM_VIRTUAL_TICKING_IPE (asserted).
113	* @param pVM The cross context VM structure.
114	* @param pVCpu The cross context virtual CPU structure.
115	*/
116	int tmCpuTickResumeLocked(PVM pVM, PVMCPU pVCpu)
117	{
118	if (!pVCpu->tm.s.fTSCTicking)
119	{
120	/* TSC must be ticking before calling tmCpuTickGetRawVirtual()! */
121	pVCpu->tm.s.fTSCTicking = true;
122	uint32_t c = ASMAtomicIncU32(&pVM->tm.s.cTSCsTicking);
123	AssertMsgReturn(c <= pVM->cCpus, ("%u vs %u\n", c, pVM->cCpus), VERR_TM_VIRTUAL_TICKING_IPE);
124	if (c == 1)
125	{
126	/* The first VCPU to resume. */
127	uint64_t offTSCRawSrcOld = pVCpu->tm.s.offTSCRawSrc;
128
129	STAM_COUNTER_INC(&pVM->tm.s.StatTSCResume);
130
131	/* When resuming, use the TSC value of the last stopped VCPU to avoid the TSC going back. */
132	switch (pVM->tm.s.enmTSCMode)
133	{
134	case TMTSCMODE_REAL_TSC_OFFSET:
135	pVCpu->tm.s.offTSCRawSrc = SUPReadTsc() - pVM->tm.s.u64LastPausedTSC;
136	break;
137	case TMTSCMODE_VIRT_TSC_EMULATED:
138	case TMTSCMODE_DYNAMIC:
139	pVCpu->tm.s.offTSCRawSrc = tmCpuTickGetRawVirtual(pVM, false /* don't check for pending timers */)
140	- pVM->tm.s.u64LastPausedTSC;
141	break;
142	case TMTSCMODE_NATIVE_API:
143	{
144	int rc = NEMHCResumeCpuTickOnAll(pVM, pVCpu, pVM->tm.s.u64LastPausedTSC);
145	AssertRCReturn(rc, rc);
146	pVCpu->tm.s.offTSCRawSrc = offTSCRawSrcOld = 0;
147	break;
148	}
149	default:
150	AssertFailedReturn(VERR_IPE_NOT_REACHED_DEFAULT_CASE);
151	}
152
153	/* Calculate the offset addendum for other VCPUs to use. */
154	pVM->tm.s.offTSCPause = pVCpu->tm.s.offTSCRawSrc - offTSCRawSrcOld;
155	}
156	else
157	{
158	/* All other VCPUs (if any). */
159	pVCpu->tm.s.offTSCRawSrc += pVM->tm.s.offTSCPause;
160	}
161	}
162	return VINF_SUCCESS;
163	}
164
165
166	/**
167	* Pauses the CPU timestamp counter ticking.
168	*
169	* @returns VBox status code.
170	* @param pVCpu The cross context virtual CPU structure.
171	* @internal
172	*/
173	int tmCpuTickPause(PVMCPU pVCpu)
174	{
175	if (pVCpu->tm.s.fTSCTicking)
176	{
177	pVCpu->tm.s.u64TSC = TMCpuTickGetNoCheck(pVCpu);
178	pVCpu->tm.s.fTSCTicking = false;
179	return VINF_SUCCESS;
180	}
181	AssertFailed();
182	return VERR_TM_TSC_ALREADY_PAUSED;
183	}
184
185
186	/**
187	* Pauses the CPU timestamp counter ticking.
188	*
189	* @returns VBox status code.
190	* @param pVM The cross context VM structure.
191	* @param pVCpu The cross context virtual CPU structure.
192	* @internal
193	*/
194	int tmCpuTickPauseLocked(PVM pVM, PVMCPU pVCpu)
195	{
196	if (pVCpu->tm.s.fTSCTicking)
197	{
198	pVCpu->tm.s.u64TSC = TMCpuTickGetNoCheck(pVCpu);
199	pVCpu->tm.s.fTSCTicking = false;
200
201	uint32_t c = ASMAtomicDecU32(&pVM->tm.s.cTSCsTicking);
202	AssertMsgReturn(c < pVM->cCpus, ("%u vs %u\n", c, pVM->cCpus), VERR_TM_VIRTUAL_TICKING_IPE);
203	if (c == 0)
204	{
205	/* When the last TSC stops, remember the value. */
206	STAM_COUNTER_INC(&pVM->tm.s.StatTSCPause);
207	pVM->tm.s.u64LastPausedTSC = pVCpu->tm.s.u64TSC;
208	}
209	return VINF_SUCCESS;
210	}
211	AssertFailed();
212	return VERR_TM_TSC_ALREADY_PAUSED;
213	}
214
215
216	#ifdef VBOX_WITH_STATISTICS
217	/**
218	* Record why we refused to use offsetted TSC.
219	*
220	* Used by TMCpuTickCanUseRealTSC() and TMCpuTickGetDeadlineAndTscOffset().
221	*
222	* @param pVM The cross context VM structure.
223	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
224	*/
225	DECLINLINE(void) tmCpuTickRecordOffsettedTscRefusal(PVM pVM, PVMCPU pVCpu)
226	{
227	/* Sample the reason for refusing. */
228	if (pVM->tm.s.enmTSCMode != TMTSCMODE_DYNAMIC)
229	STAM_COUNTER_INC(&pVM->tm.s.StatTSCNotFixed);
230	else if (!pVCpu->tm.s.fTSCTicking)
231	STAM_COUNTER_INC(&pVM->tm.s.StatTSCNotTicking);
232	else if (pVM->tm.s.enmTSCMode != TMTSCMODE_REAL_TSC_OFFSET)
233	{
234	if (pVM->tm.s.fVirtualSyncCatchUp)
235	{
236	if (pVM->tm.s.u32VirtualSyncCatchUpPercentage <= 10)
237	STAM_COUNTER_INC(&pVM->tm.s.StatTSCCatchupLE010);
238	else if (pVM->tm.s.u32VirtualSyncCatchUpPercentage <= 25)
239	STAM_COUNTER_INC(&pVM->tm.s.StatTSCCatchupLE025);
240	else if (pVM->tm.s.u32VirtualSyncCatchUpPercentage <= 100)
241	STAM_COUNTER_INC(&pVM->tm.s.StatTSCCatchupLE100);
242	else
243	STAM_COUNTER_INC(&pVM->tm.s.StatTSCCatchupOther);
244	}
245	else if (!pVM->tm.s.fVirtualSyncTicking)
246	STAM_COUNTER_INC(&pVM->tm.s.StatTSCSyncNotTicking);
247	else if (pVM->tm.s.fVirtualWarpDrive)
248	STAM_COUNTER_INC(&pVM->tm.s.StatTSCWarp);
249	}
250	}
251	#endif /* VBOX_WITH_STATISTICS */
252
253
254	/**
255	* Checks if AMD-V / VT-x can use an offsetted hardware TSC or not.
256	*
257	* @returns true/false accordingly.
258	* @param pVM The cross context VM structure.
259	* @param pVCpu The cross context virtual CPU structure.
260	* @param poffRealTsc The offset against the TSC of the current host CPU,
261	* if pfOffsettedTsc is set to true.
262	* @param pfParavirtTsc Where to return whether paravirt TSC is enabled.
263	*
264	* @thread EMT(pVCpu).
265	* @see TMCpuTickGetDeadlineAndTscOffset().
266	*/
267	VMM_INT_DECL(bool) TMCpuTickCanUseRealTSC(PVM pVM, PVMCPU pVCpu, uint64_t poffRealTsc, bool pfParavirtTsc)
268	{
269	Assert(pVCpu->tm.s.fTSCTicking \|\| DBGFIsStepping(pVCpu));
270
271	*pfParavirtTsc = pVM->tm.s.fParavirtTscEnabled;
272
273	/*
274	* In real TSC mode it's easy, we just need the delta & offTscRawSrc and
275	* the CPU will add them to RDTSC and RDTSCP at runtime.
276	*
277	* In tmCpuTickGetInternal we do:
278	* SUPReadTsc() - pVCpu->tm.s.offTSCRawSrc;
279	* Where SUPReadTsc() does:
280	* ASMReadTSC() - pGipCpu->i64TscDelta;
281	* Which means tmCpuTickGetInternal actually does:
282	* ASMReadTSC() - pGipCpu->i64TscDelta - pVCpu->tm.s.offTSCRawSrc;
283	* So, the offset to be ADDED to RDTSC[P] is:
284	* offRealTsc = -(pGipCpu->i64TscDelta + pVCpu->tm.s.offTSCRawSrc)
285	*/
286	if (pVM->tm.s.enmTSCMode == TMTSCMODE_REAL_TSC_OFFSET)
287	{
288	/** @todo We should negate both deltas! It's soo weird that we do the
289	* exact opposite of what the hardware implements. */
290	#ifdef IN_RING3
291	*poffRealTsc = 0 - pVCpu->tm.s.offTSCRawSrc - SUPGetTscDelta();
292	#else
293	*poffRealTsc = 0 - pVCpu->tm.s.offTSCRawSrc - SUPGetTscDeltaByCpuSetIndex(pVCpu->iHostCpuSet);
294	#endif
295	return true;
296	}
297
298	/*
299	* We require:
300	* 1. A fixed TSC, this is checked at init time.
301	* 2. That the TSC is ticking (we shouldn't be here if it isn't)
302	* 3. Either that we're using the real TSC as time source or
303	* a) we don't have any lag to catch up, and
304	* b) the virtual sync clock hasn't been halted by an expired timer, and
305	* c) we're not using warp drive (accelerated virtual guest time).
306	*/
307	if ( pVM->tm.s.enmTSCMode == TMTSCMODE_DYNAMIC
308	&& !pVM->tm.s.fVirtualSyncCatchUp
309	&& RT_LIKELY(pVM->tm.s.fVirtualSyncTicking)
310	&& !pVM->tm.s.fVirtualWarpDrive)
311	{
312	/* The source is the timer synchronous virtual clock. */
313	uint64_t u64Now = tmCpuTickGetRawVirtual(pVM, false /* don't check for pending timers */)
314	- pVCpu->tm.s.offTSCRawSrc;
315	/** @todo When we start collecting statistics on how much time we spend executing
316	* guest code before exiting, we should check this against the next virtual sync
317	* timer timeout. If it's lower than the avg. length, we should trap rdtsc to increase
318	* the chance that we'll get interrupted right after the timer expired. */
319	if (u64Now >= pVCpu->tm.s.u64TSCLastSeen)
320	{
321	*poffRealTsc = u64Now - ASMReadTSC();
322	return true; /** @todo count this? */
323	}
324	}
325
326	#ifdef VBOX_WITH_STATISTICS
327	tmCpuTickRecordOffsettedTscRefusal(pVM, pVCpu);
328	#endif
329	return false;
330	}
331
332
333	/**
334	* Calculates the number of host CPU ticks till the next virtual sync deadline.
335	*
336	* @note To save work, this function will not bother calculating the accurate
337	* tick count for deadlines that are more than a second ahead.
338	*
339	* @returns The number of host cpu ticks to the next deadline. Max one second.
340	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
341	* @param cNsToDeadline The number of nano seconds to the next virtual
342	* sync deadline.
343	*/
344	DECLINLINE(uint64_t) tmCpuCalcTicksToDeadline(PVMCPU pVCpu, uint64_t cNsToDeadline)
345	{
346	AssertCompile(TMCLOCK_FREQ_VIRTUAL <= _4G);
347	#ifdef IN_RING3
348	RT_NOREF_PV(pVCpu);
349	uint64_t uCpuHz = SUPGetCpuHzFromGip(g_pSUPGlobalInfoPage);
350	#else
351	uint64_t uCpuHz = SUPGetCpuHzFromGipBySetIndex(g_pSUPGlobalInfoPage, pVCpu->iHostCpuSet);
352	#endif
353	if (RT_UNLIKELY(cNsToDeadline >= TMCLOCK_FREQ_VIRTUAL))
354	return uCpuHz;
355	uint64_t cTicks = ASMMultU64ByU32DivByU32(uCpuHz, cNsToDeadline, TMCLOCK_FREQ_VIRTUAL);
356	if (cTicks > 4000)
357	cTicks -= 4000; /* fudge to account for overhead */
358	else
359	cTicks >>= 1;
360	return cTicks;
361	}
362
363
364	/**
365	* Gets the next deadline in host CPU clock ticks and the TSC offset if we can
366	* use the raw TSC.
367	*
368	* @returns The number of host CPU clock ticks to the next timer deadline.
369	* @param pVM The cross context VM structure.
370	* @param pVCpu The cross context virtual CPU structure of the calling EMT.
371	* @param poffRealTsc The offset against the TSC of the current host CPU,
372	* if pfOffsettedTsc is set to true.
373	* @param pfOffsettedTsc Where to return whether TSC offsetting can be used.
374	* @param pfParavirtTsc Where to return whether paravirt TSC is enabled.
375	*
376	* @thread EMT(pVCpu).
377	* @see TMCpuTickCanUseRealTSC().
378	*/
379	VMM_INT_DECL(uint64_t) TMCpuTickGetDeadlineAndTscOffset(PVM pVM, PVMCPU pVCpu, uint64_t *poffRealTsc,
380	bool pfOffsettedTsc, bool pfParavirtTsc)
381	{
382	Assert(pVCpu->tm.s.fTSCTicking \|\| DBGFIsStepping(pVCpu));
383
384	*pfParavirtTsc = pVM->tm.s.fParavirtTscEnabled;
385
386	/*
387	* Same logic as in TMCpuTickCanUseRealTSC.
388	*/
389	if (pVM->tm.s.enmTSCMode == TMTSCMODE_REAL_TSC_OFFSET)
390	{
391	/** @todo We should negate both deltas! It's soo weird that we do the
392	* exact opposite of what the hardware implements. */
393	#ifdef IN_RING3
394	*poffRealTsc = 0 - pVCpu->tm.s.offTSCRawSrc - SUPGetTscDelta();
395	#else
396	*poffRealTsc = 0 - pVCpu->tm.s.offTSCRawSrc - SUPGetTscDeltaByCpuSetIndex(pVCpu->iHostCpuSet);
397	#endif
398	*pfOffsettedTsc = true;
399	return tmCpuCalcTicksToDeadline(pVCpu, TMVirtualSyncGetNsToDeadline(pVM));
400	}
401
402	/*
403	* Same logic as in TMCpuTickCanUseRealTSC.
404	*/
405	if ( pVM->tm.s.enmTSCMode == TMTSCMODE_DYNAMIC
406	&& !pVM->tm.s.fVirtualSyncCatchUp
407	&& RT_LIKELY(pVM->tm.s.fVirtualSyncTicking)
408	&& !pVM->tm.s.fVirtualWarpDrive)
409	{
410	/* The source is the timer synchronous virtual clock. */
411	uint64_t cNsToDeadline;
412	uint64_t u64NowVirtSync = TMVirtualSyncGetWithDeadlineNoCheck(pVM, &cNsToDeadline);
413	uint64_t u64Now = ASMMultU64ByU32DivByU32(u64NowVirtSync, pVM->tm.s.cTSCTicksPerSecond, TMCLOCK_FREQ_VIRTUAL);
414	u64Now -= pVCpu->tm.s.offTSCRawSrc;
415	*poffRealTsc = u64Now - ASMReadTSC();
416	*pfOffsettedTsc = u64Now >= pVCpu->tm.s.u64TSCLastSeen;
417	return tmCpuCalcTicksToDeadline(pVCpu, cNsToDeadline);
418	}
419
420	#ifdef VBOX_WITH_STATISTICS
421	tmCpuTickRecordOffsettedTscRefusal(pVM, pVCpu);
422	#endif
423	*pfOffsettedTsc = false;
424	*poffRealTsc = 0;
425	return tmCpuCalcTicksToDeadline(pVCpu, TMVirtualSyncGetNsToDeadline(pVM));
426	}
427
428
429	/**
430	* Read the current CPU timestamp counter.
431	*
432	* @returns Gets the CPU tsc.
433	* @param pVCpu The cross context virtual CPU structure.
434	* @param fCheckTimers Whether to check timers.
435	*/
436	DECLINLINE(uint64_t) tmCpuTickGetInternal(PVMCPU pVCpu, bool fCheckTimers)
437	{
438	uint64_t u64;
439
440	if (RT_LIKELY(pVCpu->tm.s.fTSCTicking))
441	{
442	PVM pVM = pVCpu->CTX_SUFF(pVM);
443	switch (pVM->tm.s.enmTSCMode)
444	{
445	case TMTSCMODE_REAL_TSC_OFFSET:
446	u64 = SUPReadTsc();
447	break;
448	case TMTSCMODE_VIRT_TSC_EMULATED:
449	case TMTSCMODE_DYNAMIC:
450	u64 = tmCpuTickGetRawVirtual(pVM, fCheckTimers);
451	break;
452	case TMTSCMODE_NATIVE_API:
453	{
454	u64 = 0;
455	int rcNem = NEMHCQueryCpuTick(pVCpu, &u64, NULL);
456	AssertLogRelRCReturn(rcNem, SUPReadTsc());
457	break;
458	}
459	default:
460	AssertFailedBreakStmt(u64 = SUPReadTsc());
461	}
462	u64 -= pVCpu->tm.s.offTSCRawSrc;
463
464	/* Always return a value higher than what the guest has already seen. */
465	if (RT_LIKELY(u64 > pVCpu->tm.s.u64TSCLastSeen))
466	pVCpu->tm.s.u64TSCLastSeen = u64;
467	else
468	{
469	STAM_COUNTER_INC(&pVM->tm.s.StatTSCUnderflow);
470	pVCpu->tm.s.u64TSCLastSeen += 64; /** @todo choose a good increment here */
471	u64 = pVCpu->tm.s.u64TSCLastSeen;
472	}
473	}
474	else
475	u64 = pVCpu->tm.s.u64TSC;
476	return u64;
477	}
478
479
480	/**
481	* Read the current CPU timestamp counter.
482	*
483	* @returns Gets the CPU tsc.
484	* @param pVCpu The cross context virtual CPU structure.
485	*/
486	VMMDECL(uint64_t) TMCpuTickGet(PVMCPU pVCpu)
487	{
488	return tmCpuTickGetInternal(pVCpu, true /* fCheckTimers */);
489	}
490
491
492	/**
493	* Read the current CPU timestamp counter, don't check for expired timers.
494	*
495	* @returns Gets the CPU tsc.
496	* @param pVCpu The cross context virtual CPU structure.
497	*/
498	VMM_INT_DECL(uint64_t) TMCpuTickGetNoCheck(PVMCPU pVCpu)
499	{
500	return tmCpuTickGetInternal(pVCpu, false /* fCheckTimers */);
501	}
502
503
504	/**
505	* Sets the current CPU timestamp counter.
506	*
507	* @returns VBox status code.
508	* @param pVM The cross context VM structure.
509	* @param pVCpu The cross context virtual CPU structure.
510	* @param u64Tick The new timestamp value.
511	*
512	* @thread EMT which TSC is to be set.
513	*/
514	VMM_INT_DECL(int) TMCpuTickSet(PVM pVM, PVMCPU pVCpu, uint64_t u64Tick)
515	{
516	VMCPU_ASSERT_EMT(pVCpu);
517	STAM_COUNTER_INC(&pVM->tm.s.StatTSCSet);
518
519	/*
520	* This is easier to do when the TSC is paused since resume will
521	* do all the calculations for us. Actually, we don't need to
522	* call tmCpuTickPause here since we overwrite u64TSC anyway.
523	*/
524	bool fTSCTicking = pVCpu->tm.s.fTSCTicking;
525	pVCpu->tm.s.fTSCTicking = false;
526	pVCpu->tm.s.u64TSC = u64Tick;
527	pVCpu->tm.s.u64TSCLastSeen = u64Tick;
528	if (fTSCTicking)
529	tmCpuTickResume(pVM, pVCpu);
530	/** @todo Try help synchronizing it better among the virtual CPUs? */
531
532	return VINF_SUCCESS;
533	}
534
535	/**
536	* Sets the last seen CPU timestamp counter.
537	*
538	* @returns VBox status code.
539	* @param pVCpu The cross context virtual CPU structure.
540	* @param u64LastSeenTick The last seen timestamp value.
541	*
542	* @thread EMT which TSC is to be set.
543	*/
544	VMM_INT_DECL(int) TMCpuTickSetLastSeen(PVMCPU pVCpu, uint64_t u64LastSeenTick)
545	{
546	VMCPU_ASSERT_EMT(pVCpu);
547
548	LogFlow(("TMCpuTickSetLastSeen %RX64\n", u64LastSeenTick));
549	if (pVCpu->tm.s.u64TSCLastSeen < u64LastSeenTick)
550	pVCpu->tm.s.u64TSCLastSeen = u64LastSeenTick;
551	return VINF_SUCCESS;
552	}
553
554	/**
555	* Gets the last seen CPU timestamp counter of the guest.
556	*
557	* @returns the last seen TSC.
558	* @param pVCpu The cross context virtual CPU structure.
559	*
560	* @thread EMT(pVCpu).
561	*/
562	VMM_INT_DECL(uint64_t) TMCpuTickGetLastSeen(PVMCPU pVCpu)
563	{
564	VMCPU_ASSERT_EMT(pVCpu);
565
566	return pVCpu->tm.s.u64TSCLastSeen;
567	}
568
569
570	/**
571	* Get the timestamp frequency.
572	*
573	* @returns Number of ticks per second.
574	* @param pVM The cross context VM structure.
575	*/
576	VMMDECL(uint64_t) TMCpuTicksPerSecond(PVM pVM)
577	{
578	if ( pVM->tm.s.enmTSCMode == TMTSCMODE_REAL_TSC_OFFSET
579	&& g_pSUPGlobalInfoPage->u32Mode != SUPGIPMODE_INVARIANT_TSC)
580	{
581	#ifdef IN_RING3
582	uint64_t cTSCTicksPerSecond = SUPGetCpuHzFromGip(g_pSUPGlobalInfoPage);
583	#elif defined(IN_RING0)
584	uint64_t cTSCTicksPerSecond = SUPGetCpuHzFromGipBySetIndex(g_pSUPGlobalInfoPage, RTMpCpuIdToSetIndex(RTMpCpuId()));
585	#else
586	uint64_t cTSCTicksPerSecond = SUPGetCpuHzFromGipBySetIndex(g_pSUPGlobalInfoPage, VMMGetCpu(pVM)->iHostCpuSet);
587	#endif
588	if (RT_LIKELY(cTSCTicksPerSecond != ~(uint64_t)0))
589	return cTSCTicksPerSecond;
590	}
591	return pVM->tm.s.cTSCTicksPerSecond;
592	}
593
594
595	/**
596	* Whether the TSC is ticking for the VCPU.
597	*
598	* @returns true if ticking, false otherwise.
599	* @param pVCpu The cross context virtual CPU structure.
600	*/
601	VMM_INT_DECL(bool) TMCpuTickIsTicking(PVMCPU pVCpu)
602	{
603	return pVCpu->tm.s.fTSCTicking;
604	}
605

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source: vbox/trunk/src/VBox/VMM/VMMAll/TMAllCpu.cpp@ 80161

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