1 | /* $Id: TMAllCpu.cpp 96407 2022-08-22 17:43:14Z vboxsync $ */
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2 | /** @file
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3 | * TM - Timeout Manager, CPU Time, All Contexts.
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4 | */
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5 |
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6 | /*
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7 | * Copyright (C) 2006-2022 Oracle and/or its affiliates.
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8 | *
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9 | * This file is part of VirtualBox base platform packages, as
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10 | * available from https://www.virtualbox.org.
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11 | *
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12 | * This program is free software; you can redistribute it and/or
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13 | * modify it under the terms of the GNU General Public License
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14 | * as published by the Free Software Foundation, in version 3 of the
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15 | * License.
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16 | *
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17 | * This program is distributed in the hope that it will be useful, but
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18 | * WITHOUT ANY WARRANTY; without even the implied warranty of
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19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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20 | * General Public License for more details.
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21 | *
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22 | * You should have received a copy of the GNU General Public License
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23 | * along with this program; if not, see <https://www.gnu.org/licenses>.
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24 | *
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25 | * SPDX-License-Identifier: GPL-3.0-only
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26 | */
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27 |
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28 |
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29 | /*********************************************************************************************************************************
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30 | * Header Files *
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31 | *********************************************************************************************************************************/
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32 | #define LOG_GROUP LOG_GROUP_TM
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33 | #include <VBox/vmm/tm.h>
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34 | #include <VBox/vmm/gim.h>
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35 | #include <VBox/vmm/dbgf.h>
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36 | #include <VBox/vmm/nem.h>
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37 | #if defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86)
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38 | # include <iprt/asm-amd64-x86.h> /* for SUPGetCpuHzFromGIP; ASMReadTSC */
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39 | #elif defined(RT_ARCH_ARM64) || defined(RT_ARCH_ARM32)
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40 | # include <iprt/asm-arm.h>
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41 | #endif
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42 | #include "TMInternal.h"
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43 | #include <VBox/vmm/vmcc.h>
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44 | #include <VBox/sup.h>
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45 |
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46 | #include <VBox/param.h>
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47 | #include <VBox/err.h>
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48 | #include <iprt/asm-math.h>
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49 | #include <iprt/assert.h>
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50 | #include <VBox/log.h>
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51 |
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52 |
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53 |
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54 | /**
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55 | * Converts from virtual time to raw CPU ticks.
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56 | *
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57 | * Mainly to have the ASMMultU64ByU32DivByU32 overflow trickery in one place.
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58 | *
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59 | * @returns raw CPU ticks.
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60 | * @param pVM The cross context VM structure.
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61 | * @param u64VirtualTime The virtual time to convert.
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62 | */
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63 | DECLINLINE(uint64_t) tmCpuTickCalcFromVirtual(PVMCC pVM, uint64_t u64VirtualTime)
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64 | {
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65 | if (pVM->tm.s.cTSCTicksPerSecond <= UINT32_MAX)
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66 | return ASMMultU64ByU32DivByU32(u64VirtualTime, (uint32_t)pVM->tm.s.cTSCTicksPerSecond, TMCLOCK_FREQ_VIRTUAL);
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67 | Assert(pVM->tm.s.cTSCTicksPerSecond <= ((uint64_t)UINT32_MAX << 2)); /* <= 15.99 GHz */
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68 | return ASMMultU64ByU32DivByU32(u64VirtualTime, (uint32_t)(pVM->tm.s.cTSCTicksPerSecond >> 2), TMCLOCK_FREQ_VIRTUAL >> 2);
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69 | }
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70 |
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71 |
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72 | /**
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73 | * Gets the raw cpu tick from current virtual time.
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74 | *
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75 | * @param pVM The cross context VM structure.
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76 | * @param fCheckTimers Whether to check timers.
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77 | */
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78 | DECLINLINE(uint64_t) tmCpuTickGetRawVirtual(PVMCC pVM, bool fCheckTimers)
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79 | {
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80 | if (fCheckTimers)
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81 | return tmCpuTickCalcFromVirtual(pVM, TMVirtualSyncGet(pVM));
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82 | return tmCpuTickCalcFromVirtual(pVM, TMVirtualSyncGetNoCheck(pVM));
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83 | }
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84 |
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85 |
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86 | #ifdef IN_RING3
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87 | /**
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88 | * Used by tmR3CpuTickParavirtEnable and tmR3CpuTickParavirtDisable.
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89 | *
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90 | * @param pVM The cross context VM structure.
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91 | */
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92 | uint64_t tmR3CpuTickGetRawVirtualNoCheck(PVM pVM)
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93 | {
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94 | return tmCpuTickGetRawVirtual(pVM, false /*fCheckTimers*/);
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95 | }
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96 | #endif
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97 |
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98 |
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99 | /**
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100 | * Resumes the CPU timestamp counter ticking.
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101 | *
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102 | * @returns VBox status code.
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103 | * @param pVM The cross context VM structure.
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104 | * @param pVCpu The cross context virtual CPU structure.
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105 | * @internal
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106 | */
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107 | int tmCpuTickResume(PVMCC pVM, PVMCPUCC pVCpu)
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108 | {
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109 | if (!pVCpu->tm.s.fTSCTicking)
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110 | {
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111 | pVCpu->tm.s.fTSCTicking = true;
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112 |
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113 | /** @todo Test that pausing and resuming doesn't cause lag! (I.e. that we're
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114 | * unpaused before the virtual time and stopped after it. */
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115 | switch (pVM->tm.s.enmTSCMode)
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116 | {
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117 | case TMTSCMODE_REAL_TSC_OFFSET:
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118 | pVCpu->tm.s.offTSCRawSrc = SUPReadTsc() - pVCpu->tm.s.u64TSC;
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119 | break;
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120 | case TMTSCMODE_VIRT_TSC_EMULATED:
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121 | case TMTSCMODE_DYNAMIC:
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122 | pVCpu->tm.s.offTSCRawSrc = tmCpuTickGetRawVirtual(pVM, false /* don't check for pending timers */)
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123 | - pVCpu->tm.s.u64TSC;
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124 | break;
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125 | case TMTSCMODE_NATIVE_API:
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126 | pVCpu->tm.s.offTSCRawSrc = 0; /** @todo ?? */
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127 | /* Looks like this is only used by weird modes and MSR TSC writes. We cannot support either on NEM/win. */
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128 | break;
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129 | default:
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130 | AssertFailedReturn(VERR_IPE_NOT_REACHED_DEFAULT_CASE);
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131 | }
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132 | return VINF_SUCCESS;
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133 | }
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134 | AssertFailed();
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135 | return VERR_TM_TSC_ALREADY_TICKING;
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136 | }
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137 |
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138 |
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139 | /**
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140 | * Resumes the CPU timestamp counter ticking.
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141 | *
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142 | * @returns VINF_SUCCESS or VERR_TM_VIRTUAL_TICKING_IPE (asserted).
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143 | * @param pVM The cross context VM structure.
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144 | * @param pVCpu The cross context virtual CPU structure.
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145 | */
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146 | int tmCpuTickResumeLocked(PVMCC pVM, PVMCPUCC pVCpu)
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147 | {
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148 | if (!pVCpu->tm.s.fTSCTicking)
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149 | {
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150 | /* TSC must be ticking before calling tmCpuTickGetRawVirtual()! */
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151 | pVCpu->tm.s.fTSCTicking = true;
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152 | uint32_t c = ASMAtomicIncU32(&pVM->tm.s.cTSCsTicking);
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153 | AssertMsgReturn(c <= pVM->cCpus, ("%u vs %u\n", c, pVM->cCpus), VERR_TM_VIRTUAL_TICKING_IPE);
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154 | if (c == 1)
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155 | {
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156 | /* The first VCPU to resume. */
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157 | uint64_t offTSCRawSrcOld = pVCpu->tm.s.offTSCRawSrc;
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158 |
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159 | STAM_COUNTER_INC(&pVM->tm.s.StatTSCResume);
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160 |
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161 | /* When resuming, use the TSC value of the last stopped VCPU to avoid the TSC going back. */
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162 | switch (pVM->tm.s.enmTSCMode)
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163 | {
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164 | case TMTSCMODE_REAL_TSC_OFFSET:
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165 | pVCpu->tm.s.offTSCRawSrc = SUPReadTsc() - pVM->tm.s.u64LastPausedTSC;
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166 | break;
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167 | case TMTSCMODE_VIRT_TSC_EMULATED:
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168 | case TMTSCMODE_DYNAMIC:
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169 | pVCpu->tm.s.offTSCRawSrc = tmCpuTickGetRawVirtual(pVM, false /* don't check for pending timers */)
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170 | - pVM->tm.s.u64LastPausedTSC;
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171 | break;
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172 | case TMTSCMODE_NATIVE_API:
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173 | {
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174 | int rc = NEMHCResumeCpuTickOnAll(pVM, pVCpu, pVM->tm.s.u64LastPausedTSC);
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175 | AssertRCReturn(rc, rc);
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176 | pVCpu->tm.s.offTSCRawSrc = offTSCRawSrcOld = 0;
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177 | break;
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178 | }
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179 | default:
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180 | AssertFailedReturn(VERR_IPE_NOT_REACHED_DEFAULT_CASE);
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181 | }
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182 |
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183 | /* Calculate the offset addendum for other VCPUs to use. */
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184 | pVM->tm.s.offTSCPause = pVCpu->tm.s.offTSCRawSrc - offTSCRawSrcOld;
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185 | }
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186 | else
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187 | {
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188 | /* All other VCPUs (if any). */
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189 | pVCpu->tm.s.offTSCRawSrc += pVM->tm.s.offTSCPause;
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190 | }
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191 | }
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192 | return VINF_SUCCESS;
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193 | }
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194 |
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195 |
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196 | /**
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197 | * Pauses the CPU timestamp counter ticking.
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198 | *
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199 | * @returns VBox status code.
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200 | * @param pVCpu The cross context virtual CPU structure.
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201 | * @internal
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202 | */
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203 | int tmCpuTickPause(PVMCPUCC pVCpu)
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204 | {
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205 | if (pVCpu->tm.s.fTSCTicking)
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206 | {
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207 | pVCpu->tm.s.u64TSC = TMCpuTickGetNoCheck(pVCpu);
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208 | pVCpu->tm.s.fTSCTicking = false;
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209 | return VINF_SUCCESS;
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210 | }
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211 | AssertFailed();
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212 | return VERR_TM_TSC_ALREADY_PAUSED;
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213 | }
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214 |
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215 |
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216 | /**
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217 | * Pauses the CPU timestamp counter ticking.
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218 | *
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219 | * @returns VBox status code.
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220 | * @param pVM The cross context VM structure.
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221 | * @param pVCpu The cross context virtual CPU structure.
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222 | * @internal
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223 | */
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224 | int tmCpuTickPauseLocked(PVMCC pVM, PVMCPUCC pVCpu)
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225 | {
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226 | if (pVCpu->tm.s.fTSCTicking)
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227 | {
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228 | pVCpu->tm.s.u64TSC = TMCpuTickGetNoCheck(pVCpu);
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229 | pVCpu->tm.s.fTSCTicking = false;
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230 |
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231 | uint32_t c = ASMAtomicDecU32(&pVM->tm.s.cTSCsTicking);
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232 | AssertMsgReturn(c < pVM->cCpus, ("%u vs %u\n", c, pVM->cCpus), VERR_TM_VIRTUAL_TICKING_IPE);
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233 | if (c == 0)
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234 | {
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235 | /* When the last TSC stops, remember the value. */
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236 | STAM_COUNTER_INC(&pVM->tm.s.StatTSCPause);
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237 | pVM->tm.s.u64LastPausedTSC = pVCpu->tm.s.u64TSC;
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238 | }
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239 | return VINF_SUCCESS;
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240 | }
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241 | AssertFailed();
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242 | return VERR_TM_TSC_ALREADY_PAUSED;
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243 | }
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244 |
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245 |
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246 | #ifdef IN_RING0 /* Only used in ring-0 at present (AMD-V and VT-x). */
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247 |
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248 | # ifdef VBOX_WITH_STATISTICS
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249 | /**
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250 | * Record why we refused to use offsetted TSC.
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251 | *
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252 | * Used by TMCpuTickCanUseRealTSC() and TMCpuTickGetDeadlineAndTscOffset().
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253 | *
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254 | * @param pVM The cross context VM structure.
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255 | * @param pVCpu The cross context virtual CPU structure of the calling EMT.
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256 | */
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257 | DECLINLINE(void) tmCpuTickRecordOffsettedTscRefusal(PVM pVM, PVMCPU pVCpu)
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258 | {
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259 | /* Sample the reason for refusing. */
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260 | if (pVM->tm.s.enmTSCMode != TMTSCMODE_DYNAMIC)
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261 | STAM_COUNTER_INC(&pVM->tm.s.StatTSCNotFixed);
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262 | else if (!pVCpu->tm.s.fTSCTicking)
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263 | STAM_COUNTER_INC(&pVM->tm.s.StatTSCNotTicking);
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264 | else if (pVM->tm.s.enmTSCMode != TMTSCMODE_REAL_TSC_OFFSET)
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265 | {
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266 | if (pVM->tm.s.fVirtualSyncCatchUp)
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267 | {
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268 | if (pVM->tm.s.u32VirtualSyncCatchUpPercentage <= 10)
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269 | STAM_COUNTER_INC(&pVM->tm.s.StatTSCCatchupLE010);
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270 | else if (pVM->tm.s.u32VirtualSyncCatchUpPercentage <= 25)
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271 | STAM_COUNTER_INC(&pVM->tm.s.StatTSCCatchupLE025);
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272 | else if (pVM->tm.s.u32VirtualSyncCatchUpPercentage <= 100)
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273 | STAM_COUNTER_INC(&pVM->tm.s.StatTSCCatchupLE100);
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274 | else
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275 | STAM_COUNTER_INC(&pVM->tm.s.StatTSCCatchupOther);
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276 | }
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277 | else if (!pVM->tm.s.fVirtualSyncTicking)
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278 | STAM_COUNTER_INC(&pVM->tm.s.StatTSCSyncNotTicking);
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279 | else if (pVM->tm.s.fVirtualWarpDrive)
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280 | STAM_COUNTER_INC(&pVM->tm.s.StatTSCWarp);
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281 | }
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282 | }
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283 | # endif /* VBOX_WITH_STATISTICS */
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284 |
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285 | /**
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286 | * Checks if AMD-V / VT-x can use an offsetted hardware TSC or not.
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287 | *
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288 | * @returns true/false accordingly.
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289 | * @param pVM The cross context VM structure.
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290 | * @param pVCpu The cross context virtual CPU structure.
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291 | * @param poffRealTsc The offset against the TSC of the current host CPU,
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292 | * if pfOffsettedTsc is set to true.
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293 | * @param pfParavirtTsc Where to return whether paravirt TSC is enabled.
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294 | *
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295 | * @thread EMT(pVCpu).
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296 | * @see TMCpuTickGetDeadlineAndTscOffset().
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297 | */
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298 | VMM_INT_DECL(bool) TMCpuTickCanUseRealTSC(PVMCC pVM, PVMCPUCC pVCpu, uint64_t *poffRealTsc, bool *pfParavirtTsc)
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299 | {
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300 | Assert(pVCpu->tm.s.fTSCTicking || DBGFIsStepping(pVCpu));
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301 |
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302 | *pfParavirtTsc = pVM->tm.s.fParavirtTscEnabled;
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303 |
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304 | /*
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305 | * In real TSC mode it's easy, we just need the delta & offTscRawSrc and
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306 | * the CPU will add them to RDTSC and RDTSCP at runtime.
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307 | *
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308 | * In tmCpuTickGetInternal we do:
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309 | * SUPReadTsc() - pVCpu->tm.s.offTSCRawSrc;
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310 | * Where SUPReadTsc() does:
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311 | * ASMReadTSC() - pGipCpu->i64TscDelta;
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312 | * Which means tmCpuTickGetInternal actually does:
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313 | * ASMReadTSC() - pGipCpu->i64TscDelta - pVCpu->tm.s.offTSCRawSrc;
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314 | * So, the offset to be ADDED to RDTSC[P] is:
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315 | * offRealTsc = -(pGipCpu->i64TscDelta + pVCpu->tm.s.offTSCRawSrc)
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316 | */
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317 | if (pVM->tm.s.enmTSCMode == TMTSCMODE_REAL_TSC_OFFSET)
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318 | {
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319 | /** @todo We should negate both deltas! It's soo weird that we do the
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320 | * exact opposite of what the hardware implements. */
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321 | # ifdef IN_RING3
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322 | *poffRealTsc = (uint64_t)0 - pVCpu->tm.s.offTSCRawSrc - (uint64_t)SUPGetTscDelta(g_pSUPGlobalInfoPage);
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323 | # else
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324 | *poffRealTsc = (uint64_t)0 - pVCpu->tm.s.offTSCRawSrc - (uint64_t)SUPGetTscDeltaByCpuSetIndex(pVCpu->iHostCpuSet);
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325 | # endif
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326 | return true;
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327 | }
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328 |
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329 | /*
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330 | * We require:
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331 | * 1. A fixed TSC, this is checked at init time.
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332 | * 2. That the TSC is ticking (we shouldn't be here if it isn't)
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333 | * 3. Either that we're using the real TSC as time source or
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334 | * a) we don't have any lag to catch up, and
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335 | * b) the virtual sync clock hasn't been halted by an expired timer, and
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336 | * c) we're not using warp drive (accelerated virtual guest time).
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337 | */
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338 | if ( pVM->tm.s.enmTSCMode == TMTSCMODE_DYNAMIC
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339 | && !pVM->tm.s.fVirtualSyncCatchUp
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340 | && RT_LIKELY(pVM->tm.s.fVirtualSyncTicking)
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341 | && !pVM->tm.s.fVirtualWarpDrive)
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342 | {
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343 | /* The source is the timer synchronous virtual clock. */
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344 | uint64_t uTscNow;
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345 | uint64_t u64Now = tmCpuTickCalcFromVirtual(pVM, TMVirtualSyncGetNoCheckWithTsc(pVM, &uTscNow))
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346 | - pVCpu->tm.s.offTSCRawSrc;
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347 | /** @todo When we start collecting statistics on how much time we spend executing
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348 | * guest code before exiting, we should check this against the next virtual sync
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349 | * timer timeout. If it's lower than the avg. length, we should trap rdtsc to increase
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350 | * the chance that we'll get interrupted right after the timer expired. */
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351 | if (u64Now >= pVCpu->tm.s.u64TSCLastSeen)
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352 | {
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353 | # ifdef IN_RING3
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354 | *poffRealTsc = u64Now - (uTscNow + (uint64_t)SUPGetTscDelta(g_pSUPGlobalInfoPage);
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355 | # else
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356 | *poffRealTsc = u64Now - (uTscNow + (uint64_t)SUPGetTscDeltaByCpuSetIndex(pVCpu->iHostCpuSet));
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357 | # endif
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358 | return true; /** @todo count this? */
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359 | }
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360 | }
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361 |
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362 | # ifdef VBOX_WITH_STATISTICS
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363 | tmCpuTickRecordOffsettedTscRefusal(pVM, pVCpu);
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364 | # endif
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365 | return false;
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366 | }
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367 |
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368 |
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369 | /**
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370 | * Calculates the number of host CPU ticks till the next virtual sync deadline.
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371 | *
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372 | * @note To save work, this function will not bother calculating the accurate
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373 | * tick count for deadlines that are more than a second ahead.
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374 | *
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375 | * @returns The number of host cpu ticks to the next deadline. Max one second.
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376 | * @param pVCpu The cross context virtual CPU structure of the calling EMT.
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377 | * @param cNsToDeadline The number of nano seconds to the next virtual
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378 | * sync deadline.
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379 | */
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380 | DECLINLINE(uint64_t) tmCpuCalcTicksToDeadline(PVMCPUCC pVCpu, uint64_t cNsToDeadline)
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381 | {
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382 | AssertCompile(TMCLOCK_FREQ_VIRTUAL <= _4G);
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383 | # ifdef IN_RING3
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384 | RT_NOREF_PV(pVCpu);
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385 | PSUPGIP const pGip = g_pSUPGlobalInfoPage;
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386 | uint64_t uCpuHz = pGip ? SUPGetCpuHzFromGip(pGip) : pVCpu->pVMR3->tm.s.cTSCTicksPerSecondHost;
|
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387 | # else
|
---|
388 | uint64_t uCpuHz = SUPGetCpuHzFromGipBySetIndex(g_pSUPGlobalInfoPage, pVCpu->iHostCpuSet);
|
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389 | # endif
|
---|
390 | if (RT_UNLIKELY(cNsToDeadline >= TMCLOCK_FREQ_VIRTUAL))
|
---|
391 | return uCpuHz;
|
---|
392 | AssertCompile(TMCLOCK_FREQ_VIRTUAL <= UINT32_MAX);
|
---|
393 | uint64_t cTicks = ASMMultU64ByU32DivByU32(uCpuHz, (uint32_t)cNsToDeadline, TMCLOCK_FREQ_VIRTUAL);
|
---|
394 | if (cTicks > 4000)
|
---|
395 | cTicks -= 4000; /* fudge to account for overhead */
|
---|
396 | else
|
---|
397 | cTicks >>= 1;
|
---|
398 | return cTicks;
|
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399 | }
|
---|
400 |
|
---|
401 |
|
---|
402 | /**
|
---|
403 | * Gets the next deadline in host CPU clock ticks and the TSC offset if we can
|
---|
404 | * use the raw TSC.
|
---|
405 | *
|
---|
406 | * @returns The number of host CPU clock ticks to the next timer deadline.
|
---|
407 | * @param pVM The cross context VM structure.
|
---|
408 | * @param pVCpu The cross context virtual CPU structure of the calling EMT.
|
---|
409 | * @param poffRealTsc The offset against the TSC of the current host CPU,
|
---|
410 | * if pfOffsettedTsc is set to true.
|
---|
411 | * @param pfOffsettedTsc Where to return whether TSC offsetting can be used.
|
---|
412 | * @param pfParavirtTsc Where to return whether paravirt TSC is enabled.
|
---|
413 | * @param puTscNow Where to return the TSC value that the return
|
---|
414 | * value is relative to. This is delta adjusted.
|
---|
415 | * @param puDeadlineVersion Where to return the deadline "version" number.
|
---|
416 | * Use with TMVirtualSyncIsCurrentDeadlineVersion()
|
---|
417 | * to check if the absolute deadline is still up to
|
---|
418 | * date and the caller can skip calling this
|
---|
419 | * function.
|
---|
420 | *
|
---|
421 | * @thread EMT(pVCpu).
|
---|
422 | * @see TMCpuTickCanUseRealTSC().
|
---|
423 | */
|
---|
424 | VMM_INT_DECL(uint64_t) TMCpuTickGetDeadlineAndTscOffset(PVMCC pVM, PVMCPUCC pVCpu, uint64_t *poffRealTsc,
|
---|
425 | bool *pfOffsettedTsc, bool *pfParavirtTsc,
|
---|
426 | uint64_t *puTscNow, uint64_t *puDeadlineVersion)
|
---|
427 | {
|
---|
428 | Assert(pVCpu->tm.s.fTSCTicking || DBGFIsStepping(pVCpu));
|
---|
429 |
|
---|
430 | *pfParavirtTsc = pVM->tm.s.fParavirtTscEnabled;
|
---|
431 |
|
---|
432 | /*
|
---|
433 | * Same logic as in TMCpuTickCanUseRealTSC.
|
---|
434 | */
|
---|
435 | if (pVM->tm.s.enmTSCMode == TMTSCMODE_REAL_TSC_OFFSET)
|
---|
436 | {
|
---|
437 | /** @todo We should negate both deltas! It's soo weird that we do the
|
---|
438 | * exact opposite of what the hardware implements. */
|
---|
439 | # ifdef IN_RING3
|
---|
440 | *poffRealTsc = (uint64_t)0 - pVCpu->tm.s.offTSCRawSrc - (uint64_t)SUPGetTscDelta(g_pSUPGlobalInfoPage);
|
---|
441 | # else
|
---|
442 | *poffRealTsc = (uint64_t)0 - pVCpu->tm.s.offTSCRawSrc - (uint64_t)SUPGetTscDeltaByCpuSetIndex(pVCpu->iHostCpuSet);
|
---|
443 | # endif
|
---|
444 | *pfOffsettedTsc = true;
|
---|
445 | return tmCpuCalcTicksToDeadline(pVCpu, TMVirtualSyncGetNsToDeadline(pVM, puDeadlineVersion, puTscNow));
|
---|
446 | }
|
---|
447 |
|
---|
448 | /*
|
---|
449 | * Same logic as in TMCpuTickCanUseRealTSC.
|
---|
450 | */
|
---|
451 | if ( pVM->tm.s.enmTSCMode == TMTSCMODE_DYNAMIC
|
---|
452 | && !pVM->tm.s.fVirtualSyncCatchUp
|
---|
453 | && RT_LIKELY(pVM->tm.s.fVirtualSyncTicking)
|
---|
454 | && !pVM->tm.s.fVirtualWarpDrive)
|
---|
455 | {
|
---|
456 | /* The source is the timer synchronous virtual clock. */
|
---|
457 | uint64_t cNsToDeadline;
|
---|
458 | uint64_t u64NowVirtSync = TMVirtualSyncGetWithDeadlineNoCheck(pVM, &cNsToDeadline, puDeadlineVersion, puTscNow);
|
---|
459 | uint64_t u64Now = tmCpuTickCalcFromVirtual(pVM, u64NowVirtSync);
|
---|
460 | u64Now -= pVCpu->tm.s.offTSCRawSrc;
|
---|
461 |
|
---|
462 | # ifdef IN_RING3
|
---|
463 | *poffRealTsc = u64Now - (*puTscNow + (uint64_t)SUPGetTscDelta(g_pSUPGlobalInfoPage)); /* undoing delta */
|
---|
464 | # else
|
---|
465 | *poffRealTsc = u64Now - (*puTscNow + (uint64_t)SUPGetTscDeltaByCpuSetIndex(pVCpu->iHostCpuSet)); /* undoing delta */
|
---|
466 | # endif
|
---|
467 | *pfOffsettedTsc = u64Now >= pVCpu->tm.s.u64TSCLastSeen;
|
---|
468 | return tmCpuCalcTicksToDeadline(pVCpu, cNsToDeadline);
|
---|
469 | }
|
---|
470 |
|
---|
471 | # ifdef VBOX_WITH_STATISTICS
|
---|
472 | tmCpuTickRecordOffsettedTscRefusal(pVM, pVCpu);
|
---|
473 | # endif
|
---|
474 | *pfOffsettedTsc = false;
|
---|
475 | *poffRealTsc = 0;
|
---|
476 | return tmCpuCalcTicksToDeadline(pVCpu, TMVirtualSyncGetNsToDeadline(pVM, puDeadlineVersion, puTscNow));
|
---|
477 | }
|
---|
478 |
|
---|
479 | #endif /* IN_RING0 - at the moment */
|
---|
480 |
|
---|
481 | /**
|
---|
482 | * Read the current CPU timestamp counter.
|
---|
483 | *
|
---|
484 | * @returns Gets the CPU tsc.
|
---|
485 | * @param pVCpu The cross context virtual CPU structure.
|
---|
486 | * @param fCheckTimers Whether to check timers.
|
---|
487 | */
|
---|
488 | DECLINLINE(uint64_t) tmCpuTickGetInternal(PVMCPUCC pVCpu, bool fCheckTimers)
|
---|
489 | {
|
---|
490 | uint64_t u64;
|
---|
491 |
|
---|
492 | if (RT_LIKELY(pVCpu->tm.s.fTSCTicking))
|
---|
493 | {
|
---|
494 | PVMCC pVM = pVCpu->CTX_SUFF(pVM);
|
---|
495 | switch (pVM->tm.s.enmTSCMode)
|
---|
496 | {
|
---|
497 | case TMTSCMODE_REAL_TSC_OFFSET:
|
---|
498 | u64 = SUPReadTsc();
|
---|
499 | break;
|
---|
500 | case TMTSCMODE_VIRT_TSC_EMULATED:
|
---|
501 | case TMTSCMODE_DYNAMIC:
|
---|
502 | u64 = tmCpuTickGetRawVirtual(pVM, fCheckTimers);
|
---|
503 | break;
|
---|
504 | case TMTSCMODE_NATIVE_API:
|
---|
505 | {
|
---|
506 | u64 = 0;
|
---|
507 | int rcNem = NEMHCQueryCpuTick(pVCpu, &u64, NULL);
|
---|
508 | AssertLogRelRCReturn(rcNem, SUPReadTsc());
|
---|
509 | break;
|
---|
510 | }
|
---|
511 | default:
|
---|
512 | AssertFailedBreakStmt(u64 = SUPReadTsc());
|
---|
513 | }
|
---|
514 | u64 -= pVCpu->tm.s.offTSCRawSrc;
|
---|
515 |
|
---|
516 | /* Always return a value higher than what the guest has already seen. */
|
---|
517 | if (RT_LIKELY(u64 > pVCpu->tm.s.u64TSCLastSeen))
|
---|
518 | pVCpu->tm.s.u64TSCLastSeen = u64;
|
---|
519 | else
|
---|
520 | {
|
---|
521 | STAM_COUNTER_INC(&pVM->tm.s.StatTSCUnderflow);
|
---|
522 | pVCpu->tm.s.u64TSCLastSeen += 64; /** @todo choose a good increment here */
|
---|
523 | u64 = pVCpu->tm.s.u64TSCLastSeen;
|
---|
524 | }
|
---|
525 | }
|
---|
526 | else
|
---|
527 | u64 = pVCpu->tm.s.u64TSC;
|
---|
528 | return u64;
|
---|
529 | }
|
---|
530 |
|
---|
531 |
|
---|
532 | /**
|
---|
533 | * Read the current CPU timestamp counter.
|
---|
534 | *
|
---|
535 | * @returns Gets the CPU tsc.
|
---|
536 | * @param pVCpu The cross context virtual CPU structure.
|
---|
537 | */
|
---|
538 | VMMDECL(uint64_t) TMCpuTickGet(PVMCPUCC pVCpu)
|
---|
539 | {
|
---|
540 | return tmCpuTickGetInternal(pVCpu, true /* fCheckTimers */);
|
---|
541 | }
|
---|
542 |
|
---|
543 |
|
---|
544 | /**
|
---|
545 | * Read the current CPU timestamp counter, don't check for expired timers.
|
---|
546 | *
|
---|
547 | * @returns Gets the CPU tsc.
|
---|
548 | * @param pVCpu The cross context virtual CPU structure.
|
---|
549 | */
|
---|
550 | VMM_INT_DECL(uint64_t) TMCpuTickGetNoCheck(PVMCPUCC pVCpu)
|
---|
551 | {
|
---|
552 | return tmCpuTickGetInternal(pVCpu, false /* fCheckTimers */);
|
---|
553 | }
|
---|
554 |
|
---|
555 |
|
---|
556 | /**
|
---|
557 | * Sets the current CPU timestamp counter.
|
---|
558 | *
|
---|
559 | * @returns VBox status code.
|
---|
560 | * @param pVM The cross context VM structure.
|
---|
561 | * @param pVCpu The cross context virtual CPU structure.
|
---|
562 | * @param u64Tick The new timestamp value.
|
---|
563 | *
|
---|
564 | * @thread EMT which TSC is to be set.
|
---|
565 | */
|
---|
566 | VMM_INT_DECL(int) TMCpuTickSet(PVMCC pVM, PVMCPUCC pVCpu, uint64_t u64Tick)
|
---|
567 | {
|
---|
568 | VMCPU_ASSERT_EMT(pVCpu);
|
---|
569 | STAM_COUNTER_INC(&pVM->tm.s.StatTSCSet);
|
---|
570 |
|
---|
571 | /*
|
---|
572 | * This is easier to do when the TSC is paused since resume will
|
---|
573 | * do all the calculations for us. Actually, we don't need to
|
---|
574 | * call tmCpuTickPause here since we overwrite u64TSC anyway.
|
---|
575 | */
|
---|
576 | bool fTSCTicking = pVCpu->tm.s.fTSCTicking;
|
---|
577 | pVCpu->tm.s.fTSCTicking = false;
|
---|
578 | pVCpu->tm.s.u64TSC = u64Tick;
|
---|
579 | pVCpu->tm.s.u64TSCLastSeen = u64Tick;
|
---|
580 | if (fTSCTicking)
|
---|
581 | tmCpuTickResume(pVM, pVCpu);
|
---|
582 | /** @todo Try help synchronizing it better among the virtual CPUs? */
|
---|
583 |
|
---|
584 | return VINF_SUCCESS;
|
---|
585 | }
|
---|
586 |
|
---|
587 | /**
|
---|
588 | * Sets the last seen CPU timestamp counter.
|
---|
589 | *
|
---|
590 | * @returns VBox status code.
|
---|
591 | * @param pVCpu The cross context virtual CPU structure.
|
---|
592 | * @param u64LastSeenTick The last seen timestamp value.
|
---|
593 | *
|
---|
594 | * @thread EMT which TSC is to be set.
|
---|
595 | */
|
---|
596 | VMM_INT_DECL(int) TMCpuTickSetLastSeen(PVMCPUCC pVCpu, uint64_t u64LastSeenTick)
|
---|
597 | {
|
---|
598 | VMCPU_ASSERT_EMT(pVCpu);
|
---|
599 |
|
---|
600 | LogFlow(("TMCpuTickSetLastSeen %RX64\n", u64LastSeenTick));
|
---|
601 | /** @todo deal with wraparound! */
|
---|
602 | if (pVCpu->tm.s.u64TSCLastSeen < u64LastSeenTick)
|
---|
603 | pVCpu->tm.s.u64TSCLastSeen = u64LastSeenTick;
|
---|
604 | return VINF_SUCCESS;
|
---|
605 | }
|
---|
606 |
|
---|
607 | /**
|
---|
608 | * Gets the last seen CPU timestamp counter of the guest.
|
---|
609 | *
|
---|
610 | * @returns the last seen TSC.
|
---|
611 | * @param pVCpu The cross context virtual CPU structure.
|
---|
612 | *
|
---|
613 | * @thread EMT(pVCpu).
|
---|
614 | */
|
---|
615 | VMM_INT_DECL(uint64_t) TMCpuTickGetLastSeen(PVMCPUCC pVCpu)
|
---|
616 | {
|
---|
617 | VMCPU_ASSERT_EMT(pVCpu);
|
---|
618 |
|
---|
619 | return pVCpu->tm.s.u64TSCLastSeen;
|
---|
620 | }
|
---|
621 |
|
---|
622 |
|
---|
623 | /**
|
---|
624 | * Get the timestamp frequency.
|
---|
625 | *
|
---|
626 | * @returns Number of ticks per second.
|
---|
627 | * @param pVM The cross context VM structure.
|
---|
628 | */
|
---|
629 | VMMDECL(uint64_t) TMCpuTicksPerSecond(PVMCC pVM)
|
---|
630 | {
|
---|
631 | if (pVM->tm.s.enmTSCMode == TMTSCMODE_REAL_TSC_OFFSET)
|
---|
632 | {
|
---|
633 | PSUPGLOBALINFOPAGE const pGip = g_pSUPGlobalInfoPage;
|
---|
634 | if (pGip && pGip->u32Mode != SUPGIPMODE_INVARIANT_TSC)
|
---|
635 | {
|
---|
636 | #ifdef IN_RING3
|
---|
637 | uint64_t cTSCTicksPerSecond = SUPGetCpuHzFromGip(pGip);
|
---|
638 | #elif defined(IN_RING0)
|
---|
639 | uint64_t cTSCTicksPerSecond = SUPGetCpuHzFromGipBySetIndex(pGip, (uint32_t)RTMpCpuIdToSetIndex(RTMpCpuId()));
|
---|
640 | #else
|
---|
641 | uint64_t cTSCTicksPerSecond = SUPGetCpuHzFromGipBySetIndex(pGip, VMMGetCpu(pVM)->iHostCpuSet);
|
---|
642 | #endif
|
---|
643 | if (RT_LIKELY(cTSCTicksPerSecond != ~(uint64_t)0))
|
---|
644 | return cTSCTicksPerSecond;
|
---|
645 | }
|
---|
646 | }
|
---|
647 | return pVM->tm.s.cTSCTicksPerSecond;
|
---|
648 | }
|
---|
649 |
|
---|
650 |
|
---|
651 | /**
|
---|
652 | * Whether the TSC is ticking for the VCPU.
|
---|
653 | *
|
---|
654 | * @returns true if ticking, false otherwise.
|
---|
655 | * @param pVCpu The cross context virtual CPU structure.
|
---|
656 | */
|
---|
657 | VMM_INT_DECL(bool) TMCpuTickIsTicking(PVMCPUCC pVCpu)
|
---|
658 | {
|
---|
659 | return pVCpu->tm.s.fTSCTicking;
|
---|
660 | }
|
---|
661 |
|
---|