VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMAll/PGMAllHandler.cpp@ 86018

Last change on this file since 86018 was 82968, checked in by vboxsync, 5 years ago

Copyright year updates by scm.
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1/* $Id: PGMAllHandler.cpp 82968 2020-02-04 10:35:17Z vboxsync $ */
2/** @file
3 * PGM - Page Manager / Monitor, Access Handlers.
4 */
5
6/*
7 * Copyright (C) 2006-2020 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_PGM
23#include <VBox/vmm/dbgf.h>
24#include <VBox/vmm/pgm.h>
25#include <VBox/vmm/iom.h>
26#include <VBox/vmm/mm.h>
27#include <VBox/vmm/em.h>
28#include <VBox/vmm/nem.h>
29#include <VBox/vmm/stam.h>
30#include <VBox/vmm/dbgf.h>
31#ifdef IN_RING0
32# include <VBox/vmm/pdmdev.h>
33#endif
34#include "PGMInternal.h"
35#include <VBox/vmm/vmcc.h>
36#include "PGMInline.h"
37
38#include <VBox/log.h>
39#include <iprt/assert.h>
40#include <iprt/asm-amd64-x86.h>
41#include <iprt/string.h>
42#include <VBox/param.h>
43#include <VBox/err.h>
44#include <VBox/vmm/selm.h>
45
46
47/*********************************************************************************************************************************
48* Internal Functions *
49*********************************************************************************************************************************/
50static int pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(PVMCC pVM, PPGMPHYSHANDLER pCur, PPGMRAMRANGE pRam);
51static void pgmHandlerPhysicalDeregisterNotifyREMAndNEM(PVMCC pVM, PPGMPHYSHANDLER pCur, int fRestoreRAM);
52static void pgmHandlerPhysicalResetRamFlags(PVMCC pVM, PPGMPHYSHANDLER pCur);
53
54
55/**
56 * Internal worker for releasing a physical handler type registration reference.
57 *
58 * @returns New reference count. UINT32_MAX if invalid input (asserted).
59 * @param pVM The cross context VM structure.
60 * @param pType Pointer to the type registration.
61 */
62DECLINLINE(uint32_t) pgmHandlerPhysicalTypeRelease(PVMCC pVM, PPGMPHYSHANDLERTYPEINT pType)
63{
64 AssertMsgReturn(pType->u32Magic == PGMPHYSHANDLERTYPEINT_MAGIC, ("%#x\n", pType->u32Magic), UINT32_MAX);
65 uint32_t cRefs = ASMAtomicDecU32(&pType->cRefs);
66 if (cRefs == 0)
67 {
68 pgmLock(pVM);
69 pType->u32Magic = PGMPHYSHANDLERTYPEINT_MAGIC_DEAD;
70 RTListOff32NodeRemove(&pType->ListNode);
71 pgmUnlock(pVM);
72 MMHyperFree(pVM, pType);
73 }
74 return cRefs;
75}
76
77
78/**
79 * Internal worker for retaining a physical handler type registration reference.
80 *
81 * @returns New reference count. UINT32_MAX if invalid input (asserted).
82 * @param pVM The cross context VM structure.
83 * @param pType Pointer to the type registration.
84 */
85DECLINLINE(uint32_t) pgmHandlerPhysicalTypeRetain(PVM pVM, PPGMPHYSHANDLERTYPEINT pType)
86{
87 NOREF(pVM);
88 AssertMsgReturn(pType->u32Magic == PGMPHYSHANDLERTYPEINT_MAGIC, ("%#x\n", pType->u32Magic), UINT32_MAX);
89 uint32_t cRefs = ASMAtomicIncU32(&pType->cRefs);
90 Assert(cRefs < _1M && cRefs > 0);
91 return cRefs;
92}
93
94
95/**
96 * Releases a reference to a physical handler type registration.
97 *
98 * @returns New reference count. UINT32_MAX if invalid input (asserted).
99 * @param pVM The cross context VM structure.
100 * @param hType The type regiration handle.
101 */
102VMMDECL(uint32_t) PGMHandlerPhysicalTypeRelease(PVMCC pVM, PGMPHYSHANDLERTYPE hType)
103{
104 if (hType != NIL_PGMPHYSHANDLERTYPE)
105 return pgmHandlerPhysicalTypeRelease(pVM, PGMPHYSHANDLERTYPEINT_FROM_HANDLE(pVM, hType));
106 return 0;
107}
108
109
110/**
111 * Retains a reference to a physical handler type registration.
112 *
113 * @returns New reference count. UINT32_MAX if invalid input (asserted).
114 * @param pVM The cross context VM structure.
115 * @param hType The type regiration handle.
116 */
117VMMDECL(uint32_t) PGMHandlerPhysicalTypeRetain(PVM pVM, PGMPHYSHANDLERTYPE hType)
118{
119 return pgmHandlerPhysicalTypeRetain(pVM, PGMPHYSHANDLERTYPEINT_FROM_HANDLE(pVM, hType));
120}
121
122
123/**
124 * Creates a physical access handler.
125 *
126 * @returns VBox status code.
127 * @retval VINF_SUCCESS when successfully installed.
128 * @retval VINF_PGM_GCPHYS_ALIASED when the shadow PTs could be updated because
129 * the guest page aliased or/and mapped by multiple PTs. A CR3 sync has been
130 * flagged together with a pool clearing.
131 * @retval VERR_PGM_HANDLER_PHYSICAL_CONFLICT if the range conflicts with an existing
132 * one. A debug assertion is raised.
133 *
134 * @param pVM The cross context VM structure.
135 * @param hType The handler type registration handle.
136 * @param pvUserR3 User argument to the R3 handler.
137 * @param pvUserR0 User argument to the R0 handler.
138 * @param pvUserRC User argument to the RC handler. This can be a value
139 * less that 0x10000 or a (non-null) pointer that is
140 * automatically relocated.
141 * @param pszDesc Description of this handler. If NULL, the type
142 * description will be used instead.
143 * @param ppPhysHandler Where to return the access handler structure on
144 * success.
145 */
146int pgmHandlerPhysicalExCreate(PVMCC pVM, PGMPHYSHANDLERTYPE hType, RTR3PTR pvUserR3, RTR0PTR pvUserR0, RTRCPTR pvUserRC,
147 R3PTRTYPE(const char *) pszDesc, PPGMPHYSHANDLER *ppPhysHandler)
148{
149 PPGMPHYSHANDLERTYPEINT pType = PGMPHYSHANDLERTYPEINT_FROM_HANDLE(pVM, hType);
150 Log(("pgmHandlerPhysicalExCreate: pvUserR3=%RHv pvUserR0=%RHv pvUserGC=%RRv hType=%#x (%d, %s) pszDesc=%RHv:%s\n",
151 pvUserR3, pvUserR0, pvUserRC, hType, pType->enmKind, R3STRING(pType->pszDesc), pszDesc, R3STRING(pszDesc)));
152
153 /*
154 * Validate input.
155 */
156 AssertPtr(ppPhysHandler);
157 AssertReturn(pType->u32Magic == PGMPHYSHANDLERTYPEINT_MAGIC, VERR_INVALID_HANDLE);
158 AssertMsgReturn( (RTRCUINTPTR)pvUserRC < 0x10000
159 || MMHyperR3ToRC(pVM, MMHyperRCToR3(pVM, pvUserRC)) == pvUserRC,
160 ("Not RC pointer! pvUserRC=%RRv\n", pvUserRC),
161 VERR_INVALID_PARAMETER);
162#if 0 /* No longer valid. */
163 AssertMsgReturn( (RTR0UINTPTR)pvUserR0 < 0x10000
164 || MMHyperR3ToR0(pVM, MMHyperR0ToR3(pVM, pvUserR0)) == pvUserR0,
165 ("Not R0 pointer! pvUserR0=%RHv\n", pvUserR0),
166 VERR_INVALID_PARAMETER);
167#endif
168
169 /*
170 * Allocate and initialize the new entry.
171 */
172 PPGMPHYSHANDLER pNew;
173 int rc = MMHyperAlloc(pVM, sizeof(*pNew), 0, MM_TAG_PGM_HANDLERS, (void **)&pNew);
174 if (RT_SUCCESS(rc))
175 {
176 pNew->Core.Key = NIL_RTGCPHYS;
177 pNew->Core.KeyLast = NIL_RTGCPHYS;
178 pNew->cPages = 0;
179 pNew->cAliasedPages = 0;
180 pNew->cTmpOffPages = 0;
181 pNew->pvUserR3 = pvUserR3;
182 pNew->pvUserR0 = pvUserR0;
183 pNew->hType = hType;
184 pNew->pszDesc = pszDesc != NIL_RTR3PTR ? pszDesc : pType->pszDesc;
185 pgmHandlerPhysicalTypeRetain(pVM, pType);
186 *ppPhysHandler = pNew;
187 return VINF_SUCCESS;
188 }
189
190 return rc;
191}
192
193
194/**
195 * Duplicates a physical access handler.
196 *
197 * @returns VBox status code.
198 * @retval VINF_SUCCESS when successfully installed.
199 *
200 * @param pVM The cross context VM structure.
201 * @param pPhysHandlerSrc The source handler to duplicate
202 * @param ppPhysHandler Where to return the access handler structure on
203 * success.
204 */
205int pgmHandlerPhysicalExDup(PVMCC pVM, PPGMPHYSHANDLER pPhysHandlerSrc, PPGMPHYSHANDLER *ppPhysHandler)
206{
207 return pgmHandlerPhysicalExCreate(pVM,
208 pPhysHandlerSrc->hType,
209 pPhysHandlerSrc->pvUserR3,
210 pPhysHandlerSrc->pvUserR0,
211 NIL_RTR0PTR,
212 pPhysHandlerSrc->pszDesc,
213 ppPhysHandler);
214}
215
216
217/**
218 * Register a access handler for a physical range.
219 *
220 * @returns VBox status code.
221 * @retval VINF_SUCCESS when successfully installed.
222 *
223 * @param pVM The cross context VM structure.
224 * @param pPhysHandler The physical handler.
225 * @param GCPhys Start physical address.
226 * @param GCPhysLast Last physical address. (inclusive)
227 */
228int pgmHandlerPhysicalExRegister(PVMCC pVM, PPGMPHYSHANDLER pPhysHandler, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast)
229{
230 /*
231 * Validate input.
232 */
233 AssertPtr(pPhysHandler);
234 PPGMPHYSHANDLERTYPEINT pType = PGMPHYSHANDLERTYPEINT_FROM_HANDLE(pVM, pPhysHandler->hType);
235 Assert(pType->u32Magic == PGMPHYSHANDLERTYPEINT_MAGIC);
236 Log(("pgmHandlerPhysicalExRegister: GCPhys=%RGp GCPhysLast=%RGp hType=%#x (%d, %s) pszDesc=%RHv:%s\n",
237 GCPhys, GCPhysLast, pPhysHandler->hType, pType->enmKind, R3STRING(pType->pszDesc), pPhysHandler->pszDesc, R3STRING(pPhysHandler->pszDesc)));
238 AssertReturn(pPhysHandler->Core.Key == NIL_RTGCPHYS, VERR_WRONG_ORDER);
239
240 AssertMsgReturn(GCPhys < GCPhysLast, ("GCPhys >= GCPhysLast (%#x >= %#x)\n", GCPhys, GCPhysLast), VERR_INVALID_PARAMETER);
241 switch (pType->enmKind)
242 {
243 case PGMPHYSHANDLERKIND_WRITE:
244 break;
245 case PGMPHYSHANDLERKIND_MMIO:
246 case PGMPHYSHANDLERKIND_ALL:
247 /* Simplification for PGMPhysRead, PGMR0Trap0eHandlerNPMisconfig and others: Full pages. */
248 AssertMsgReturn(!(GCPhys & PAGE_OFFSET_MASK), ("%RGp\n", GCPhys), VERR_INVALID_PARAMETER);
249 AssertMsgReturn((GCPhysLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK, ("%RGp\n", GCPhysLast), VERR_INVALID_PARAMETER);
250 break;
251 default:
252 AssertMsgFailed(("Invalid input enmKind=%d!\n", pType->enmKind));
253 return VERR_INVALID_PARAMETER;
254 }
255
256 /*
257 * We require the range to be within registered ram.
258 * There is no apparent need to support ranges which cover more than one ram range.
259 */
260 PPGMRAMRANGE pRam = pgmPhysGetRange(pVM, GCPhys);
261 if ( !pRam
262 || GCPhysLast > pRam->GCPhysLast)
263 {
264#ifdef IN_RING3
265 DBGFR3Info(pVM->pUVM, "phys", NULL, NULL);
266#endif
267 AssertMsgFailed(("No RAM range for %RGp-%RGp\n", GCPhys, GCPhysLast));
268 return VERR_PGM_HANDLER_PHYSICAL_NO_RAM_RANGE;
269 }
270 Assert(GCPhys >= pRam->GCPhys && GCPhys < pRam->GCPhysLast);
271 Assert(GCPhysLast <= pRam->GCPhysLast && GCPhysLast >= pRam->GCPhys);
272
273 /*
274 * Try insert into list.
275 */
276 pPhysHandler->Core.Key = GCPhys;
277 pPhysHandler->Core.KeyLast = GCPhysLast;
278 pPhysHandler->cPages = (GCPhysLast - (GCPhys & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT;
279
280 pgmLock(pVM);
281 if (RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, &pPhysHandler->Core))
282 {
283 int rc = pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(pVM, pPhysHandler, pRam);
284 if (rc == VINF_PGM_SYNC_CR3)
285 rc = VINF_PGM_GCPHYS_ALIASED;
286
287#if defined(IN_RING3) || defined(IN_RING0)
288 NEMHCNotifyHandlerPhysicalRegister(pVM, pType->enmKind, GCPhys, GCPhysLast - GCPhys + 1);
289#endif
290 pgmUnlock(pVM);
291
292 if (rc != VINF_SUCCESS)
293 Log(("PGMHandlerPhysicalRegisterEx: returns %Rrc (%RGp-%RGp)\n", rc, GCPhys, GCPhysLast));
294 return rc;
295 }
296 pgmUnlock(pVM);
297
298 pPhysHandler->Core.Key = NIL_RTGCPHYS;
299 pPhysHandler->Core.KeyLast = NIL_RTGCPHYS;
300
301#if defined(IN_RING3) && defined(VBOX_STRICT)
302 DBGFR3Info(pVM->pUVM, "handlers", "phys nostats", NULL);
303#endif
304 AssertMsgFailed(("Conflict! GCPhys=%RGp GCPhysLast=%RGp pszDesc=%s/%s\n",
305 GCPhys, GCPhysLast, R3STRING(pPhysHandler->pszDesc), R3STRING(pType->pszDesc)));
306 return VERR_PGM_HANDLER_PHYSICAL_CONFLICT;
307}
308
309
310/**
311 * Register a access handler for a physical range.
312 *
313 * @returns VBox status code.
314 * @retval VINF_SUCCESS when successfully installed.
315 * @retval VINF_PGM_GCPHYS_ALIASED when the shadow PTs could be updated because
316 * the guest page aliased or/and mapped by multiple PTs. A CR3 sync has been
317 * flagged together with a pool clearing.
318 * @retval VERR_PGM_HANDLER_PHYSICAL_CONFLICT if the range conflicts with an existing
319 * one. A debug assertion is raised.
320 *
321 * @param pVM The cross context VM structure.
322 * @param GCPhys Start physical address.
323 * @param GCPhysLast Last physical address. (inclusive)
324 * @param hType The handler type registration handle.
325 * @param pvUserR3 User argument to the R3 handler.
326 * @param pvUserR0 User argument to the R0 handler.
327 * @param pvUserRC User argument to the RC handler. This can be a value
328 * less that 0x10000 or a (non-null) pointer that is
329 * automatically relocated.
330 * @param pszDesc Description of this handler. If NULL, the type
331 * description will be used instead.
332 */
333VMMDECL(int) PGMHandlerPhysicalRegister(PVMCC pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast, PGMPHYSHANDLERTYPE hType,
334 RTR3PTR pvUserR3, RTR0PTR pvUserR0, RTRCPTR pvUserRC, R3PTRTYPE(const char *) pszDesc)
335{
336#ifdef LOG_ENABLED
337 PPGMPHYSHANDLERTYPEINT pType = PGMPHYSHANDLERTYPEINT_FROM_HANDLE(pVM, hType);
338 Log(("PGMHandlerPhysicalRegister: GCPhys=%RGp GCPhysLast=%RGp pvUserR3=%RHv pvUserR0=%RHv pvUserGC=%RRv hType=%#x (%d, %s) pszDesc=%RHv:%s\n",
339 GCPhys, GCPhysLast, pvUserR3, pvUserR0, pvUserRC, hType, pType->enmKind, R3STRING(pType->pszDesc), pszDesc, R3STRING(pszDesc)));
340#endif
341
342 PPGMPHYSHANDLER pNew;
343 int rc = pgmHandlerPhysicalExCreate(pVM, hType, pvUserR3, pvUserR0, pvUserRC, pszDesc, &pNew);
344 if (RT_SUCCESS(rc))
345 {
346 rc = pgmHandlerPhysicalExRegister(pVM, pNew, GCPhys, GCPhysLast);
347 if (RT_SUCCESS(rc))
348 return rc;
349 pgmHandlerPhysicalExDestroy(pVM, pNew);
350 }
351 return rc;
352}
353
354
355/**
356 * Sets ram range flags and attempts updating shadow PTs.
357 *
358 * @returns VBox status code.
359 * @retval VINF_SUCCESS when shadow PTs was successfully updated.
360 * @retval VINF_PGM_SYNC_CR3 when the shadow PTs could be updated because
361 * the guest page aliased or/and mapped by multiple PTs. FFs set.
362 * @param pVM The cross context VM structure.
363 * @param pCur The physical handler.
364 * @param pRam The RAM range.
365 */
366static int pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(PVMCC pVM, PPGMPHYSHANDLER pCur, PPGMRAMRANGE pRam)
367{
368 /*
369 * Iterate the guest ram pages updating the flags and flushing PT entries
370 * mapping the page.
371 */
372 bool fFlushTLBs = false;
373 int rc = VINF_SUCCESS;
374 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
375 const unsigned uState = pCurType->uState;
376 uint32_t cPages = pCur->cPages;
377 uint32_t i = (pCur->Core.Key - pRam->GCPhys) >> PAGE_SHIFT;
378 for (;;)
379 {
380 PPGMPAGE pPage = &pRam->aPages[i];
381 AssertMsg(pCurType->enmKind != PGMPHYSHANDLERKIND_MMIO || PGM_PAGE_IS_MMIO(pPage),
382 ("%RGp %R[pgmpage]\n", pRam->GCPhys + (i << PAGE_SHIFT), pPage));
383
384 /* Only do upgrades. */
385 if (PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) < uState)
386 {
387 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, uState);
388
389 const RTGCPHYS GCPhysPage = pRam->GCPhys + (i << PAGE_SHIFT);
390 int rc2 = pgmPoolTrackUpdateGCPhys(pVM, GCPhysPage, pPage,
391 false /* allow updates of PTEs (instead of flushing) */, &fFlushTLBs);
392 if (rc2 != VINF_SUCCESS && rc == VINF_SUCCESS)
393 rc = rc2;
394
395 /* Tell NEM about the protection update. */
396 if (VM_IS_NEM_ENABLED(pVM))
397 {
398 uint8_t u2State = PGM_PAGE_GET_NEM_STATE(pPage);
399 PGMPAGETYPE enmType = (PGMPAGETYPE)PGM_PAGE_GET_TYPE(pPage);
400 NEMHCNotifyPhysPageProtChanged(pVM, GCPhysPage, PGM_PAGE_GET_HCPHYS(pPage),
401 pgmPhysPageCalcNemProtection(pPage, enmType), enmType, &u2State);
402 PGM_PAGE_SET_NEM_STATE(pPage, u2State);
403 }
404 }
405
406 /* next */
407 if (--cPages == 0)
408 break;
409 i++;
410 }
411
412 if (fFlushTLBs)
413 {
414 PGM_INVL_ALL_VCPU_TLBS(pVM);
415 Log(("pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs: flushing guest TLBs; rc=%d\n", rc));
416 }
417 else
418 Log(("pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs: doesn't flush guest TLBs. rc=%Rrc; sync flags=%x VMCPU_FF_PGM_SYNC_CR3=%d\n", rc, VMMGetCpu(pVM)->pgm.s.fSyncFlags, VMCPU_FF_IS_SET(VMMGetCpu(pVM), VMCPU_FF_PGM_SYNC_CR3)));
419
420 return rc;
421}
422
423
424/**
425 * Deregister a physical page access handler.
426 *
427 * @returns VBox status code.
428 * @param pVM The cross context VM structure.
429 * @param pPhysHandler The handler to deregister (but not free).
430 * @param fRestoreAsRAM How this will likely be restored, if we know (true,
431 * false, or if we don't know -1).
432 */
433int pgmHandlerPhysicalExDeregister(PVMCC pVM, PPGMPHYSHANDLER pPhysHandler, int fRestoreAsRAM)
434{
435 LogFlow(("pgmHandlerPhysicalExDeregister: Removing Range %RGp-%RGp %s fRestoreAsRAM=%d\n",
436 pPhysHandler->Core.Key, pPhysHandler->Core.KeyLast, R3STRING(pPhysHandler->pszDesc), fRestoreAsRAM));
437 AssertReturn(pPhysHandler->Core.Key != NIL_RTGCPHYS, VERR_PGM_HANDLER_NOT_FOUND);
438
439 /*
440 * Remove the handler from the tree.
441 */
442 pgmLock(pVM);
443 PPGMPHYSHANDLER pRemoved = (PPGMPHYSHANDLER)RTAvlroGCPhysRemove(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers,
444 pPhysHandler->Core.Key);
445 if (pRemoved == pPhysHandler)
446 {
447 /*
448 * Clear the page bits, notify the REM about this change and clear
449 * the cache.
450 */
451 pgmHandlerPhysicalResetRamFlags(pVM, pPhysHandler);
452 pgmHandlerPhysicalDeregisterNotifyREMAndNEM(pVM, pPhysHandler, fRestoreAsRAM);
453 pVM->pgm.s.pLastPhysHandlerR0 = 0;
454 pVM->pgm.s.pLastPhysHandlerR3 = 0;
455
456 pPhysHandler->Core.Key = NIL_RTGCPHYS;
457 pPhysHandler->Core.KeyLast = NIL_RTGCPHYS;
458
459 pgmUnlock(pVM);
460
461 return VINF_SUCCESS;
462 }
463
464 /*
465 * Both of the failure conditions here are considered internal processing
466 * errors because they can only be caused by race conditions or corruption.
467 * If we ever need to handle concurrent deregistration, we have to move
468 * the NIL_RTGCPHYS check inside the PGM lock.
469 */
470 if (pRemoved)
471 RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, &pRemoved->Core);
472
473 pgmUnlock(pVM);
474
475 if (!pRemoved)
476 AssertMsgFailed(("Didn't find range starting at %RGp in the tree!\n", pPhysHandler->Core.Key));
477 else
478 AssertMsgFailed(("Found different handle at %RGp in the tree: got %p insteaded of %p\n",
479 pPhysHandler->Core.Key, pRemoved, pPhysHandler));
480 return VERR_PGM_HANDLER_IPE_1;
481}
482
483
484/**
485 * Destroys (frees) a physical handler.
486 *
487 * The caller must deregister it before destroying it!
488 *
489 * @returns VBox status code.
490 * @param pVM The cross context VM structure.
491 * @param pHandler The handler to free. NULL if ignored.
492 */
493int pgmHandlerPhysicalExDestroy(PVMCC pVM, PPGMPHYSHANDLER pHandler)
494{
495 if (pHandler)
496 {
497 AssertPtr(pHandler);
498 AssertReturn(pHandler->Core.Key == NIL_RTGCPHYS, VERR_WRONG_ORDER);
499 PGMHandlerPhysicalTypeRelease(pVM, pHandler->hType);
500 MMHyperFree(pVM, pHandler);
501 }
502 return VINF_SUCCESS;
503}
504
505
506/**
507 * Deregister a physical page access handler.
508 *
509 * @returns VBox status code.
510 * @param pVM The cross context VM structure.
511 * @param GCPhys Start physical address.
512 */
513VMMDECL(int) PGMHandlerPhysicalDeregister(PVMCC pVM, RTGCPHYS GCPhys)
514{
515 /*
516 * Find the handler.
517 */
518 pgmLock(pVM);
519 PPGMPHYSHANDLER pRemoved = (PPGMPHYSHANDLER)RTAvlroGCPhysRemove(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
520 if (pRemoved)
521 {
522 LogFlow(("PGMHandlerPhysicalDeregister: Removing Range %RGp-%RGp %s\n",
523 pRemoved->Core.Key, pRemoved->Core.KeyLast, R3STRING(pRemoved->pszDesc)));
524
525 /*
526 * Clear the page bits, notify the REM about this change and clear
527 * the cache.
528 */
529 pgmHandlerPhysicalResetRamFlags(pVM, pRemoved);
530 pgmHandlerPhysicalDeregisterNotifyREMAndNEM(pVM, pRemoved, -1);
531 pVM->pgm.s.pLastPhysHandlerR0 = 0;
532 pVM->pgm.s.pLastPhysHandlerR3 = 0;
533
534 pgmUnlock(pVM);
535
536 pRemoved->Core.Key = NIL_RTGCPHYS;
537 pgmHandlerPhysicalExDestroy(pVM, pRemoved);
538 return VINF_SUCCESS;
539 }
540
541 pgmUnlock(pVM);
542
543 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys));
544 return VERR_PGM_HANDLER_NOT_FOUND;
545}
546
547
548/**
549 * Shared code with modify.
550 */
551static void pgmHandlerPhysicalDeregisterNotifyREMAndNEM(PVMCC pVM, PPGMPHYSHANDLER pCur, int fRestoreAsRAM)
552{
553 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
554 RTGCPHYS GCPhysStart = pCur->Core.Key;
555 RTGCPHYS GCPhysLast = pCur->Core.KeyLast;
556
557 /*
558 * Page align the range.
559 *
560 * Since we've reset (recalculated) the physical handler state of all pages
561 * we can make use of the page states to figure out whether a page should be
562 * included in the REM notification or not.
563 */
564 if ( (pCur->Core.Key & PAGE_OFFSET_MASK)
565 || ((pCur->Core.KeyLast + 1) & PAGE_OFFSET_MASK))
566 {
567 Assert(pCurType->enmKind != PGMPHYSHANDLERKIND_MMIO);
568
569 if (GCPhysStart & PAGE_OFFSET_MASK)
570 {
571 PPGMPAGE pPage = pgmPhysGetPage(pVM, GCPhysStart);
572 if ( pPage
573 && PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != PGM_PAGE_HNDL_PHYS_STATE_NONE)
574 {
575 RTGCPHYS GCPhys = (GCPhysStart + (PAGE_SIZE - 1)) & X86_PTE_PAE_PG_MASK;
576 if ( GCPhys > GCPhysLast
577 || GCPhys < GCPhysStart)
578 return;
579 GCPhysStart = GCPhys;
580 }
581 else
582 GCPhysStart &= X86_PTE_PAE_PG_MASK;
583 Assert(!pPage || PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO); /* these are page aligned atm! */
584 }
585
586 if (GCPhysLast & PAGE_OFFSET_MASK)
587 {
588 PPGMPAGE pPage = pgmPhysGetPage(pVM, GCPhysLast);
589 if ( pPage
590 && PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != PGM_PAGE_HNDL_PHYS_STATE_NONE)
591 {
592 RTGCPHYS GCPhys = (GCPhysLast & X86_PTE_PAE_PG_MASK) - 1;
593 if ( GCPhys < GCPhysStart
594 || GCPhys > GCPhysLast)
595 return;
596 GCPhysLast = GCPhys;
597 }
598 else
599 GCPhysLast |= PAGE_OFFSET_MASK;
600 Assert(!pPage || PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO); /* these are page aligned atm! */
601 }
602 }
603
604 /*
605 * Tell REM and NEM.
606 */
607 const bool fRestoreAsRAM2 = pCurType->pfnHandlerR3
608 && pCurType->enmKind != PGMPHYSHANDLERKIND_MMIO; /** @todo this isn't entirely correct. */
609 /** @todo do we need this notification? */
610 NEMHCNotifyHandlerPhysicalDeregister(pVM, pCurType->enmKind, GCPhysStart, GCPhysLast - GCPhysStart + 1,
611 fRestoreAsRAM, fRestoreAsRAM2);
612}
613
614
615/**
616 * pgmHandlerPhysicalResetRamFlags helper that checks for other handlers on
617 * edge pages.
618 */
619DECLINLINE(void) pgmHandlerPhysicalRecalcPageState(PVMCC pVM, RTGCPHYS GCPhys, bool fAbove, PPGMRAMRANGE *ppRamHint)
620{
621 /*
622 * Look for other handlers.
623 */
624 unsigned uState = PGM_PAGE_HNDL_PHYS_STATE_NONE;
625 for (;;)
626 {
627 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGetBestFit(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys, fAbove);
628 if ( !pCur
629 || ((fAbove ? pCur->Core.Key : pCur->Core.KeyLast) >> PAGE_SHIFT) != (GCPhys >> PAGE_SHIFT))
630 break;
631 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
632 uState = RT_MAX(uState, pCurType->uState);
633
634 /* next? */
635 RTGCPHYS GCPhysNext = fAbove
636 ? pCur->Core.KeyLast + 1
637 : pCur->Core.Key - 1;
638 if ((GCPhysNext >> PAGE_SHIFT) != (GCPhys >> PAGE_SHIFT))
639 break;
640 GCPhys = GCPhysNext;
641 }
642
643 /*
644 * Update if we found something that is a higher priority
645 * state than the current.
646 */
647 if (uState != PGM_PAGE_HNDL_PHYS_STATE_NONE)
648 {
649 PPGMPAGE pPage;
650 int rc = pgmPhysGetPageWithHintEx(pVM, GCPhys, &pPage, ppRamHint);
651 if ( RT_SUCCESS(rc)
652 && PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) < uState)
653 {
654 /* This should normally not be necessary. */
655 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, uState);
656 bool fFlushTLBs ;
657 rc = pgmPoolTrackUpdateGCPhys(pVM, GCPhys, pPage, false /*fFlushPTEs*/, &fFlushTLBs);
658 if (RT_SUCCESS(rc) && fFlushTLBs)
659 PGM_INVL_ALL_VCPU_TLBS(pVM);
660 else
661 AssertRC(rc);
662
663 /* Tell NEM about the protection update. */
664 if (VM_IS_NEM_ENABLED(pVM))
665 {
666 uint8_t u2State = PGM_PAGE_GET_NEM_STATE(pPage);
667 PGMPAGETYPE enmType = (PGMPAGETYPE)PGM_PAGE_GET_TYPE(pPage);
668 NEMHCNotifyPhysPageProtChanged(pVM, GCPhys, PGM_PAGE_GET_HCPHYS(pPage),
669 pgmPhysPageCalcNemProtection(pPage, enmType), enmType, &u2State);
670 PGM_PAGE_SET_NEM_STATE(pPage, u2State);
671 }
672 }
673 else
674 AssertRC(rc);
675 }
676}
677
678
679/**
680 * Resets an aliased page.
681 *
682 * @param pVM The cross context VM structure.
683 * @param pPage The page.
684 * @param GCPhysPage The page address in case it comes in handy.
685 * @param fDoAccounting Whether to perform accounting. (Only set during
686 * reset where pgmR3PhysRamReset doesn't have the
687 * handler structure handy.)
688 */
689void pgmHandlerPhysicalResetAliasedPage(PVMCC pVM, PPGMPAGE pPage, RTGCPHYS GCPhysPage, bool fDoAccounting)
690{
691 Assert( PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO
692 || PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_SPECIAL_ALIAS_MMIO);
693 Assert(PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) == PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
694 RTHCPHYS const HCPhysPrev = PGM_PAGE_GET_HCPHYS(pPage);
695
696 /*
697 * Flush any shadow page table references *first*.
698 */
699 bool fFlushTLBs = false;
700 int rc = pgmPoolTrackUpdateGCPhys(pVM, GCPhysPage, pPage, true /*fFlushPTEs*/, &fFlushTLBs);
701 AssertLogRelRCReturnVoid(rc);
702 HMFlushTlbOnAllVCpus(pVM);
703
704 /*
705 * Make it an MMIO/Zero page.
706 */
707 PGM_PAGE_SET_HCPHYS(pVM, pPage, pVM->pgm.s.HCPhysZeroPg);
708 PGM_PAGE_SET_TYPE(pVM, pPage, PGMPAGETYPE_MMIO);
709 PGM_PAGE_SET_STATE(pVM, pPage, PGM_PAGE_STATE_ZERO);
710 PGM_PAGE_SET_PAGEID(pVM, pPage, NIL_GMM_PAGEID);
711 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_ALL);
712
713 /* Flush its TLB entry. */
714 pgmPhysInvalidatePageMapTLBEntry(pVM, GCPhysPage);
715
716 /*
717 * Do accounting for pgmR3PhysRamReset.
718 */
719 if (fDoAccounting)
720 {
721 PPGMPHYSHANDLER pHandler = pgmHandlerPhysicalLookup(pVM, GCPhysPage);
722 if (RT_LIKELY(pHandler))
723 {
724 Assert(pHandler->cAliasedPages > 0);
725 pHandler->cAliasedPages--;
726 }
727 else
728 AssertFailed();
729 }
730
731 /*
732 * Tell NEM about the protection change.
733 */
734 if (VM_IS_NEM_ENABLED(pVM))
735 {
736 uint8_t u2State = PGM_PAGE_GET_NEM_STATE(pPage);
737 NEMHCNotifyPhysPageChanged(pVM, GCPhysPage, HCPhysPrev, pVM->pgm.s.HCPhysZeroPg,
738 NEM_PAGE_PROT_NONE, PGMPAGETYPE_MMIO, &u2State);
739 PGM_PAGE_SET_NEM_STATE(pPage, u2State);
740 }
741}
742
743
744/**
745 * Resets ram range flags.
746 *
747 * @returns VBox status code.
748 * @retval VINF_SUCCESS when shadow PTs was successfully updated.
749 * @param pVM The cross context VM structure.
750 * @param pCur The physical handler.
751 *
752 * @remark We don't start messing with the shadow page tables, as we've
753 * already got code in Trap0e which deals with out of sync handler
754 * flags (originally conceived for global pages).
755 */
756static void pgmHandlerPhysicalResetRamFlags(PVMCC pVM, PPGMPHYSHANDLER pCur)
757{
758 /*
759 * Iterate the guest ram pages updating the state.
760 */
761 RTUINT cPages = pCur->cPages;
762 RTGCPHYS GCPhys = pCur->Core.Key;
763 PPGMRAMRANGE pRamHint = NULL;
764 for (;;)
765 {
766 PPGMPAGE pPage;
767 int rc = pgmPhysGetPageWithHintEx(pVM, GCPhys, &pPage, &pRamHint);
768 if (RT_SUCCESS(rc))
769 {
770 /* Reset aliased MMIO pages to MMIO, since this aliasing is our business.
771 (We don't flip MMIO to RAM though, that's PGMPhys.cpp's job.) */
772 bool fNemNotifiedAlready = false;
773 if ( PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO
774 || PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_SPECIAL_ALIAS_MMIO)
775 {
776 Assert(pCur->cAliasedPages > 0);
777 pgmHandlerPhysicalResetAliasedPage(pVM, pPage, GCPhys, false /*fDoAccounting*/);
778 pCur->cAliasedPages--;
779 fNemNotifiedAlready = true;
780 }
781#ifdef VBOX_STRICT
782 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
783 AssertMsg(pCurType->enmKind != PGMPHYSHANDLERKIND_MMIO || PGM_PAGE_IS_MMIO(pPage), ("%RGp %R[pgmpage]\n", GCPhys, pPage));
784#endif
785 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_NONE);
786
787 /* Tell NEM about the protection change. */
788 if (VM_IS_NEM_ENABLED(pVM) && !fNemNotifiedAlready)
789 {
790 uint8_t u2State = PGM_PAGE_GET_NEM_STATE(pPage);
791 PGMPAGETYPE enmType = (PGMPAGETYPE)PGM_PAGE_GET_TYPE(pPage);
792 NEMHCNotifyPhysPageProtChanged(pVM, GCPhys, PGM_PAGE_GET_HCPHYS(pPage),
793 pgmPhysPageCalcNemProtection(pPage, enmType), enmType, &u2State);
794 PGM_PAGE_SET_NEM_STATE(pPage, u2State);
795 }
796 }
797 else
798 AssertRC(rc);
799
800 /* next */
801 if (--cPages == 0)
802 break;
803 GCPhys += PAGE_SIZE;
804 }
805
806 pCur->cAliasedPages = 0;
807 pCur->cTmpOffPages = 0;
808
809 /*
810 * Check for partial start and end pages.
811 */
812 if (pCur->Core.Key & PAGE_OFFSET_MASK)
813 pgmHandlerPhysicalRecalcPageState(pVM, pCur->Core.Key - 1, false /* fAbove */, &pRamHint);
814 if ((pCur->Core.KeyLast & PAGE_OFFSET_MASK) != PAGE_OFFSET_MASK)
815 pgmHandlerPhysicalRecalcPageState(pVM, pCur->Core.KeyLast + 1, true /* fAbove */, &pRamHint);
816}
817
818
819/**
820 * Modify a physical page access handler.
821 *
822 * Modification can only be done to the range it self, not the type or anything else.
823 *
824 * @returns VBox status code.
825 * For all return codes other than VERR_PGM_HANDLER_NOT_FOUND and VINF_SUCCESS the range is deregistered
826 * and a new registration must be performed!
827 * @param pVM The cross context VM structure.
828 * @param GCPhysCurrent Current location.
829 * @param GCPhys New location.
830 * @param GCPhysLast New last location.
831 */
832VMMDECL(int) PGMHandlerPhysicalModify(PVMCC pVM, RTGCPHYS GCPhysCurrent, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast)
833{
834 /*
835 * Remove it.
836 */
837 int rc;
838 pgmLock(pVM);
839 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysRemove(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhysCurrent);
840 if (pCur)
841 {
842 /*
843 * Clear the ram flags. (We're gonna move or free it!)
844 */
845 pgmHandlerPhysicalResetRamFlags(pVM, pCur);
846 PPGMPHYSHANDLERTYPEINT const pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
847 bool const fRestoreAsRAM = pCurType->pfnHandlerR3 /** @todo this isn't entirely correct. */
848 && pCurType->enmKind != PGMPHYSHANDLERKIND_MMIO;
849
850 /*
851 * Validate the new range, modify and reinsert.
852 */
853 if (GCPhysLast >= GCPhys)
854 {
855 /*
856 * We require the range to be within registered ram.
857 * There is no apparent need to support ranges which cover more than one ram range.
858 */
859 PPGMRAMRANGE pRam = pgmPhysGetRange(pVM, GCPhys);
860 if ( pRam
861 && GCPhys <= pRam->GCPhysLast
862 && GCPhysLast >= pRam->GCPhys)
863 {
864 pCur->Core.Key = GCPhys;
865 pCur->Core.KeyLast = GCPhysLast;
866 pCur->cPages = (GCPhysLast - (GCPhys & X86_PTE_PAE_PG_MASK) + 1) >> PAGE_SHIFT;
867
868 if (RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, &pCur->Core))
869 {
870 RTGCPHYS const cb = GCPhysLast - GCPhys + 1;
871 PGMPHYSHANDLERKIND const enmKind = pCurType->enmKind;
872
873 /*
874 * Set ram flags, flush shadow PT entries and finally tell REM about this.
875 */
876 rc = pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(pVM, pCur, pRam);
877
878 /** @todo NEM: not sure we need this notification... */
879 NEMHCNotifyHandlerPhysicalModify(pVM, enmKind, GCPhysCurrent, GCPhys, cb, fRestoreAsRAM);
880
881 pgmUnlock(pVM);
882
883 PGM_INVL_ALL_VCPU_TLBS(pVM);
884 Log(("PGMHandlerPhysicalModify: GCPhysCurrent=%RGp -> GCPhys=%RGp GCPhysLast=%RGp\n",
885 GCPhysCurrent, GCPhys, GCPhysLast));
886 return VINF_SUCCESS;
887 }
888
889 AssertMsgFailed(("Conflict! GCPhys=%RGp GCPhysLast=%RGp\n", GCPhys, GCPhysLast));
890 rc = VERR_PGM_HANDLER_PHYSICAL_CONFLICT;
891 }
892 else
893 {
894 AssertMsgFailed(("No RAM range for %RGp-%RGp\n", GCPhys, GCPhysLast));
895 rc = VERR_PGM_HANDLER_PHYSICAL_NO_RAM_RANGE;
896 }
897 }
898 else
899 {
900 AssertMsgFailed(("Invalid range %RGp-%RGp\n", GCPhys, GCPhysLast));
901 rc = VERR_INVALID_PARAMETER;
902 }
903
904 /*
905 * Invalid new location, flush the cache and free it.
906 * We've only gotta notify REM and free the memory.
907 */
908 pgmHandlerPhysicalDeregisterNotifyREMAndNEM(pVM, pCur, -1);
909 pVM->pgm.s.pLastPhysHandlerR0 = 0;
910 pVM->pgm.s.pLastPhysHandlerR3 = 0;
911 PGMHandlerPhysicalTypeRelease(pVM, pCur->hType);
912 MMHyperFree(pVM, pCur);
913 }
914 else
915 {
916 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhysCurrent));
917 rc = VERR_PGM_HANDLER_NOT_FOUND;
918 }
919
920 pgmUnlock(pVM);
921 return rc;
922}
923
924
925/**
926 * Changes the user callback arguments associated with a physical access handler.
927 *
928 * @returns VBox status code.
929 * @param pVM The cross context VM structure.
930 * @param GCPhys Start physical address of the handler.
931 * @param pvUserR3 User argument to the R3 handler.
932 * @param pvUserR0 User argument to the R0 handler.
933 */
934VMMDECL(int) PGMHandlerPhysicalChangeUserArgs(PVMCC pVM, RTGCPHYS GCPhys, RTR3PTR pvUserR3, RTR0PTR pvUserR0)
935{
936 /*
937 * Find the handler.
938 */
939 int rc = VINF_SUCCESS;
940 pgmLock(pVM);
941 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
942 if (pCur)
943 {
944 /*
945 * Change arguments.
946 */
947 pCur->pvUserR3 = pvUserR3;
948 pCur->pvUserR0 = pvUserR0;
949 }
950 else
951 {
952 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys));
953 rc = VERR_PGM_HANDLER_NOT_FOUND;
954 }
955
956 pgmUnlock(pVM);
957 return rc;
958}
959
960
961/**
962 * Splits a physical access handler in two.
963 *
964 * @returns VBox status code.
965 * @param pVM The cross context VM structure.
966 * @param GCPhys Start physical address of the handler.
967 * @param GCPhysSplit The split address.
968 */
969VMMDECL(int) PGMHandlerPhysicalSplit(PVMCC pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysSplit)
970{
971 AssertReturn(GCPhys < GCPhysSplit, VERR_INVALID_PARAMETER);
972
973 /*
974 * Do the allocation without owning the lock.
975 */
976 PPGMPHYSHANDLER pNew;
977 int rc = MMHyperAlloc(pVM, sizeof(*pNew), 0, MM_TAG_PGM_HANDLERS, (void **)&pNew);
978 if (RT_FAILURE(rc))
979 return rc;
980
981 /*
982 * Get the handler.
983 */
984 pgmLock(pVM);
985 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
986 if (RT_LIKELY(pCur))
987 {
988 if (RT_LIKELY(GCPhysSplit <= pCur->Core.KeyLast))
989 {
990 /*
991 * Create new handler node for the 2nd half.
992 */
993 *pNew = *pCur;
994 pNew->Core.Key = GCPhysSplit;
995 pNew->cPages = (pNew->Core.KeyLast - (pNew->Core.Key & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT;
996
997 pCur->Core.KeyLast = GCPhysSplit - 1;
998 pCur->cPages = (pCur->Core.KeyLast - (pCur->Core.Key & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT;
999
1000 if (RT_LIKELY(RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, &pNew->Core)))
1001 {
1002 LogFlow(("PGMHandlerPhysicalSplit: %RGp-%RGp and %RGp-%RGp\n",
1003 pCur->Core.Key, pCur->Core.KeyLast, pNew->Core.Key, pNew->Core.KeyLast));
1004 pgmUnlock(pVM);
1005 return VINF_SUCCESS;
1006 }
1007 AssertMsgFailed(("whu?\n"));
1008 rc = VERR_PGM_PHYS_HANDLER_IPE;
1009 }
1010 else
1011 {
1012 AssertMsgFailed(("outside range: %RGp-%RGp split %RGp\n", pCur->Core.Key, pCur->Core.KeyLast, GCPhysSplit));
1013 rc = VERR_INVALID_PARAMETER;
1014 }
1015 }
1016 else
1017 {
1018 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys));
1019 rc = VERR_PGM_HANDLER_NOT_FOUND;
1020 }
1021 pgmUnlock(pVM);
1022 MMHyperFree(pVM, pNew);
1023 return rc;
1024}
1025
1026
1027/**
1028 * Joins up two adjacent physical access handlers which has the same callbacks.
1029 *
1030 * @returns VBox status code.
1031 * @param pVM The cross context VM structure.
1032 * @param GCPhys1 Start physical address of the first handler.
1033 * @param GCPhys2 Start physical address of the second handler.
1034 */
1035VMMDECL(int) PGMHandlerPhysicalJoin(PVMCC pVM, RTGCPHYS GCPhys1, RTGCPHYS GCPhys2)
1036{
1037 /*
1038 * Get the handlers.
1039 */
1040 int rc;
1041 pgmLock(pVM);
1042 PPGMPHYSHANDLER pCur1 = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys1);
1043 if (RT_LIKELY(pCur1))
1044 {
1045 PPGMPHYSHANDLER pCur2 = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys2);
1046 if (RT_LIKELY(pCur2))
1047 {
1048 /*
1049 * Make sure that they are adjacent, and that they've got the same callbacks.
1050 */
1051 if (RT_LIKELY(pCur1->Core.KeyLast + 1 == pCur2->Core.Key))
1052 {
1053 if (RT_LIKELY(pCur1->hType == pCur2->hType))
1054 {
1055 PPGMPHYSHANDLER pCur3 = (PPGMPHYSHANDLER)RTAvlroGCPhysRemove(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys2);
1056 if (RT_LIKELY(pCur3 == pCur2))
1057 {
1058 pCur1->Core.KeyLast = pCur2->Core.KeyLast;
1059 pCur1->cPages = (pCur1->Core.KeyLast - (pCur1->Core.Key & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT;
1060 LogFlow(("PGMHandlerPhysicalJoin: %RGp-%RGp %RGp-%RGp\n",
1061 pCur1->Core.Key, pCur1->Core.KeyLast, pCur2->Core.Key, pCur2->Core.KeyLast));
1062 pVM->pgm.s.pLastPhysHandlerR0 = 0;
1063 pVM->pgm.s.pLastPhysHandlerR3 = 0;
1064 PGMHandlerPhysicalTypeRelease(pVM, pCur2->hType);
1065 MMHyperFree(pVM, pCur2);
1066 pgmUnlock(pVM);
1067 return VINF_SUCCESS;
1068 }
1069
1070 Assert(pCur3 == pCur2);
1071 rc = VERR_PGM_PHYS_HANDLER_IPE;
1072 }
1073 else
1074 {
1075 AssertMsgFailed(("mismatching handlers\n"));
1076 rc = VERR_ACCESS_DENIED;
1077 }
1078 }
1079 else
1080 {
1081 AssertMsgFailed(("not adjacent: %RGp-%RGp %RGp-%RGp\n",
1082 pCur1->Core.Key, pCur1->Core.KeyLast, pCur2->Core.Key, pCur2->Core.KeyLast));
1083 rc = VERR_INVALID_PARAMETER;
1084 }
1085 }
1086 else
1087 {
1088 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys2));
1089 rc = VERR_PGM_HANDLER_NOT_FOUND;
1090 }
1091 }
1092 else
1093 {
1094 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys1));
1095 rc = VERR_PGM_HANDLER_NOT_FOUND;
1096 }
1097 pgmUnlock(pVM);
1098 return rc;
1099
1100}
1101
1102
1103/**
1104 * Resets any modifications to individual pages in a physical page access
1105 * handler region.
1106 *
1107 * This is used in pair with PGMHandlerPhysicalPageTempOff(),
1108 * PGMHandlerPhysicalPageAliasMmio2() or PGMHandlerPhysicalPageAliasHC().
1109 *
1110 * @returns VBox status code.
1111 * @param pVM The cross context VM structure.
1112 * @param GCPhys The start address of the handler regions, i.e. what you
1113 * passed to PGMR3HandlerPhysicalRegister(),
1114 * PGMHandlerPhysicalRegisterEx() or
1115 * PGMHandlerPhysicalModify().
1116 */
1117VMMDECL(int) PGMHandlerPhysicalReset(PVMCC pVM, RTGCPHYS GCPhys)
1118{
1119 LogFlow(("PGMHandlerPhysicalReset GCPhys=%RGp\n", GCPhys));
1120 pgmLock(pVM);
1121
1122 /*
1123 * Find the handler.
1124 */
1125 int rc;
1126 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
1127 if (RT_LIKELY(pCur))
1128 {
1129 /*
1130 * Validate kind.
1131 */
1132 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
1133 switch (pCurType->enmKind)
1134 {
1135 case PGMPHYSHANDLERKIND_WRITE:
1136 case PGMPHYSHANDLERKIND_ALL:
1137 case PGMPHYSHANDLERKIND_MMIO: /* NOTE: Only use when clearing MMIO ranges with aliased MMIO2 pages! */
1138 {
1139 STAM_COUNTER_INC(&pVM->pgm.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,PhysHandlerReset)); /** @todo move out of switch */
1140 PPGMRAMRANGE pRam = pgmPhysGetRange(pVM, GCPhys);
1141 Assert(pRam);
1142 Assert(pRam->GCPhys <= pCur->Core.Key);
1143 Assert(pRam->GCPhysLast >= pCur->Core.KeyLast);
1144
1145 if (pCurType->enmKind == PGMPHYSHANDLERKIND_MMIO)
1146 {
1147 /*
1148 * Reset all the PGMPAGETYPE_MMIO2_ALIAS_MMIO pages first and that's it.
1149 * This could probably be optimized a bit wrt to flushing, but I'm too lazy
1150 * to do that now...
1151 */
1152 if (pCur->cAliasedPages)
1153 {
1154 PPGMPAGE pPage = &pRam->aPages[(pCur->Core.Key - pRam->GCPhys) >> PAGE_SHIFT];
1155 uint32_t cLeft = pCur->cPages;
1156 while (cLeft-- > 0)
1157 {
1158 if ( PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO
1159 || PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_SPECIAL_ALIAS_MMIO)
1160 {
1161 Assert(pCur->cAliasedPages > 0);
1162 pgmHandlerPhysicalResetAliasedPage(pVM, pPage, pRam->GCPhys + ((RTGCPHYS)cLeft << PAGE_SHIFT),
1163 false /*fDoAccounting*/);
1164 --pCur->cAliasedPages;
1165#ifndef VBOX_STRICT
1166 if (pCur->cAliasedPages == 0)
1167 break;
1168#endif
1169 }
1170 Assert(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO);
1171 pPage++;
1172 }
1173 Assert(pCur->cAliasedPages == 0);
1174 }
1175 }
1176 else if (pCur->cTmpOffPages > 0)
1177 {
1178 /*
1179 * Set the flags and flush shadow PT entries.
1180 */
1181 rc = pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(pVM, pCur, pRam);
1182 }
1183
1184 pCur->cAliasedPages = 0;
1185 pCur->cTmpOffPages = 0;
1186
1187 rc = VINF_SUCCESS;
1188 break;
1189 }
1190
1191 /*
1192 * Invalid.
1193 */
1194 default:
1195 AssertMsgFailed(("Invalid type %d! Corruption!\n", pCurType->enmKind));
1196 rc = VERR_PGM_PHYS_HANDLER_IPE;
1197 break;
1198 }
1199 }
1200 else
1201 {
1202 AssertMsgFailed(("Didn't find MMIO Range starting at %#x\n", GCPhys));
1203 rc = VERR_PGM_HANDLER_NOT_FOUND;
1204 }
1205
1206 pgmUnlock(pVM);
1207 return rc;
1208}
1209
1210
1211/**
1212 * Temporarily turns off the access monitoring of a page within a monitored
1213 * physical write/all page access handler region.
1214 *
1215 * Use this when no further \#PFs are required for that page. Be aware that
1216 * a page directory sync might reset the flags, and turn on access monitoring
1217 * for the page.
1218 *
1219 * The caller must do required page table modifications.
1220 *
1221 * @returns VBox status code.
1222 * @param pVM The cross context VM structure.
1223 * @param GCPhys The start address of the access handler. This
1224 * must be a fully page aligned range or we risk
1225 * messing up other handlers installed for the
1226 * start and end pages.
1227 * @param GCPhysPage The physical address of the page to turn off
1228 * access monitoring for.
1229 */
1230VMMDECL(int) PGMHandlerPhysicalPageTempOff(PVMCC pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage)
1231{
1232 LogFlow(("PGMHandlerPhysicalPageTempOff GCPhysPage=%RGp\n", GCPhysPage));
1233
1234 pgmLock(pVM);
1235 /*
1236 * Validate the range.
1237 */
1238 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
1239 if (RT_LIKELY(pCur))
1240 {
1241 if (RT_LIKELY( GCPhysPage >= pCur->Core.Key
1242 && GCPhysPage <= pCur->Core.KeyLast))
1243 {
1244 Assert(!(pCur->Core.Key & PAGE_OFFSET_MASK));
1245 Assert((pCur->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK);
1246
1247 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
1248 AssertReturnStmt( pCurType->enmKind == PGMPHYSHANDLERKIND_WRITE
1249 || pCurType->enmKind == PGMPHYSHANDLERKIND_ALL,
1250 pgmUnlock(pVM), VERR_ACCESS_DENIED);
1251
1252 /*
1253 * Change the page status.
1254 */
1255 PPGMPAGE pPage;
1256 int rc = pgmPhysGetPageEx(pVM, GCPhysPage, &pPage);
1257 AssertReturnStmt(RT_SUCCESS_NP(rc), pgmUnlock(pVM), rc);
1258 if (PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != PGM_PAGE_HNDL_PHYS_STATE_DISABLED)
1259 {
1260 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
1261 pCur->cTmpOffPages++;
1262
1263 /* Tell NEM about the protection change (VGA is using this to track dirty pages). */
1264 if (VM_IS_NEM_ENABLED(pVM))
1265 {
1266 uint8_t u2State = PGM_PAGE_GET_NEM_STATE(pPage);
1267 PGMPAGETYPE enmType = (PGMPAGETYPE)PGM_PAGE_GET_TYPE(pPage);
1268 NEMHCNotifyPhysPageProtChanged(pVM, GCPhysPage, PGM_PAGE_GET_HCPHYS(pPage),
1269 pgmPhysPageCalcNemProtection(pPage, enmType), enmType, &u2State);
1270 PGM_PAGE_SET_NEM_STATE(pPage, u2State);
1271 }
1272 }
1273 pgmUnlock(pVM);
1274 return VINF_SUCCESS;
1275 }
1276 pgmUnlock(pVM);
1277 AssertMsgFailed(("The page %#x is outside the range %#x-%#x\n",
1278 GCPhysPage, pCur->Core.Key, pCur->Core.KeyLast));
1279 return VERR_INVALID_PARAMETER;
1280 }
1281 pgmUnlock(pVM);
1282 AssertMsgFailed(("Specified physical handler start address %#x is invalid.\n", GCPhys));
1283 return VERR_PGM_HANDLER_NOT_FOUND;
1284}
1285
1286
1287/**
1288 * Resolves an MMIO2 page.
1289 *
1290 * Caller as taken the PGM lock.
1291 *
1292 * @returns Pointer to the page if valid, NULL otherwise
1293 * @param pVM The cross context VM structure.
1294 * @param pDevIns The device owning it.
1295 * @param hMmio2 The MMIO2 region.
1296 * @param offMmio2Page The offset into the region.
1297 */
1298static PPGMPAGE pgmPhysResolveMmio2PageLocked(PVMCC pVM, PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2, RTGCPHYS offMmio2Page)
1299{
1300 /* Only works if the handle is in the handle table! */
1301 AssertReturn(hMmio2 != 0, NULL);
1302 hMmio2--;
1303
1304 /* Must check the first one for PGMREGMMIO2RANGE_F_FIRST_CHUNK. */
1305 AssertReturn(hMmio2 < RT_ELEMENTS(pVM->pgm.s.apMmio2RangesR3), NULL);
1306 PPGMREGMMIO2RANGE pCur = pVM->pgm.s.CTX_SUFF(apMmio2Ranges)[hMmio2];
1307 AssertReturn(pCur, NULL);
1308 AssertReturn(pCur->fFlags & PGMREGMMIO2RANGE_F_FIRST_CHUNK, NULL);
1309
1310 /* Loop thru the sub-ranges till we find the one covering offMmio2. */
1311 for (;;)
1312 {
1313 AssertReturn(pCur->fFlags & PGMREGMMIO2RANGE_F_MMIO2, NULL);
1314#ifdef IN_RING3
1315 AssertReturn(pCur->pDevInsR3 == pDevIns, NULL);
1316#else
1317 AssertReturn(pCur->pDevInsR3 == pDevIns->pDevInsForR3, NULL);
1318#endif
1319
1320 /* Does it match the offset? */
1321 if (offMmio2Page < pCur->cbReal)
1322 return &pCur->RamRange.aPages[offMmio2Page >> PAGE_SHIFT];
1323
1324 /* Advance if we can. */
1325 AssertReturn(!(pCur->fFlags & PGMREGMMIO2RANGE_F_LAST_CHUNK), NULL);
1326 offMmio2Page -= pCur->cbReal;
1327 hMmio2++;
1328 AssertReturn(hMmio2 < RT_ELEMENTS(pVM->pgm.s.apMmio2RangesR3), NULL);
1329 pCur = pVM->pgm.s.CTX_SUFF(apMmio2Ranges)[hMmio2];
1330 AssertReturn(pCur, NULL);
1331 }
1332}
1333
1334
1335/**
1336 * Replaces an MMIO page with an MMIO2 page.
1337 *
1338 * This is a worker for IOMMMIOMapMMIO2Page that works in a similar way to
1339 * PGMHandlerPhysicalPageTempOff but for an MMIO page. Since an MMIO page has no
1340 * backing, the caller must provide a replacement page. For various reasons the
1341 * replacement page must be an MMIO2 page.
1342 *
1343 * The caller must do required page table modifications. You can get away
1344 * without making any modifications since it's an MMIO page, the cost is an extra
1345 * \#PF which will the resync the page.
1346 *
1347 * Call PGMHandlerPhysicalReset() to restore the MMIO page.
1348 *
1349 * The caller may still get handler callback even after this call and must be
1350 * able to deal correctly with such calls. The reason for these callbacks are
1351 * either that we're executing in the recompiler (which doesn't know about this
1352 * arrangement) or that we've been restored from saved state (where we won't
1353 * save the change).
1354 *
1355 * @returns VBox status code.
1356 * @param pVM The cross context VM structure.
1357 * @param GCPhys The start address of the access handler. This
1358 * must be a fully page aligned range or we risk
1359 * messing up other handlers installed for the
1360 * start and end pages.
1361 * @param GCPhysPage The physical address of the page to turn off
1362 * access monitoring for and replace with the MMIO2
1363 * page.
1364 * @param pDevIns The device instance owning @a hMmio2.
1365 * @param hMmio2 Handle to the MMIO2 region containing the page
1366 * to remap in the the MMIO page at @a GCPhys.
1367 * @param offMmio2PageRemap The offset into @a hMmio2 of the MMIO2 page that
1368 * should serve as backing memory.
1369 *
1370 * @remark May cause a page pool flush if used on a page that is already
1371 * aliased.
1372 *
1373 * @note This trick does only work reliably if the two pages are never ever
1374 * mapped in the same page table. If they are the page pool code will
1375 * be confused should either of them be flushed. See the special case
1376 * of zero page aliasing mentioned in #3170.
1377 *
1378 */
1379VMMDECL(int) PGMHandlerPhysicalPageAliasMmio2(PVMCC pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage,
1380 PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2, RTGCPHYS offMmio2PageRemap)
1381{
1382 pgmLock(pVM);
1383
1384 /*
1385 * Resolve the MMIO2 reference.
1386 */
1387 PPGMPAGE pPageRemap = pgmPhysResolveMmio2PageLocked(pVM, pDevIns, hMmio2, offMmio2PageRemap);
1388 if (RT_LIKELY(pPageRemap))
1389 AssertMsgReturnStmt(PGM_PAGE_GET_TYPE(pPageRemap) == PGMPAGETYPE_MMIO2,
1390 ("hMmio2=%RU64 offMmio2PageRemap=%RGp %R[pgmpage]\n", hMmio2, offMmio2PageRemap, pPageRemap),
1391 pgmUnlock(pVM), VERR_PGM_PHYS_NOT_MMIO2);
1392 else
1393 {
1394 pgmUnlock(pVM);
1395 return VERR_OUT_OF_RANGE;
1396 }
1397
1398 /*
1399 * Lookup and validate the range.
1400 */
1401 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
1402 if (RT_LIKELY(pCur))
1403 {
1404 if (RT_LIKELY( GCPhysPage >= pCur->Core.Key
1405 && GCPhysPage <= pCur->Core.KeyLast))
1406 {
1407 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
1408 AssertReturnStmt(pCurType->enmKind == PGMPHYSHANDLERKIND_MMIO, pgmUnlock(pVM), VERR_ACCESS_DENIED);
1409 AssertReturnStmt(!(pCur->Core.Key & PAGE_OFFSET_MASK), pgmUnlock(pVM), VERR_INVALID_PARAMETER);
1410 AssertReturnStmt((pCur->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK, pgmUnlock(pVM), VERR_INVALID_PARAMETER);
1411
1412 /*
1413 * Validate the page.
1414 */
1415 PPGMPAGE pPage;
1416 int rc = pgmPhysGetPageEx(pVM, GCPhysPage, &pPage);
1417 AssertReturnStmt(RT_SUCCESS_NP(rc), pgmUnlock(pVM), rc);
1418 if (PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO)
1419 {
1420 AssertMsgReturn(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO,
1421 ("GCPhysPage=%RGp %R[pgmpage]\n", GCPhysPage, pPage),
1422 VERR_PGM_PHYS_NOT_MMIO2);
1423 if (PGM_PAGE_GET_HCPHYS(pPage) == PGM_PAGE_GET_HCPHYS(pPageRemap))
1424 {
1425 pgmUnlock(pVM);
1426 return VINF_PGM_HANDLER_ALREADY_ALIASED;
1427 }
1428
1429 /*
1430 * The page is already mapped as some other page, reset it
1431 * to an MMIO/ZERO page before doing the new mapping.
1432 */
1433 Log(("PGMHandlerPhysicalPageAliasMmio2: GCPhysPage=%RGp (%R[pgmpage]; %RHp -> %RHp\n",
1434 GCPhysPage, pPage, PGM_PAGE_GET_HCPHYS(pPage), PGM_PAGE_GET_HCPHYS(pPageRemap)));
1435 pgmHandlerPhysicalResetAliasedPage(pVM, pPage, GCPhysPage, false /*fDoAccounting*/);
1436 pCur->cAliasedPages--;
1437 }
1438 Assert(PGM_PAGE_IS_ZERO(pPage));
1439
1440 /*
1441 * Do the actual remapping here.
1442 * This page now serves as an alias for the backing memory specified.
1443 */
1444 LogFlow(("PGMHandlerPhysicalPageAliasMmio2: %RGp (%R[pgmpage]) alias for %RU64/%RGp (%R[pgmpage])\n",
1445 GCPhysPage, pPage, hMmio2, offMmio2PageRemap, pPageRemap ));
1446 PGM_PAGE_SET_HCPHYS(pVM, pPage, PGM_PAGE_GET_HCPHYS(pPageRemap));
1447 PGM_PAGE_SET_TYPE(pVM, pPage, PGMPAGETYPE_MMIO2_ALIAS_MMIO);
1448 PGM_PAGE_SET_STATE(pVM, pPage, PGM_PAGE_STATE_ALLOCATED);
1449 PGM_PAGE_SET_PAGEID(pVM, pPage, PGM_PAGE_GET_PAGEID(pPageRemap));
1450 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
1451 pCur->cAliasedPages++;
1452 Assert(pCur->cAliasedPages <= pCur->cPages);
1453
1454 /* Flush its TLB entry. */
1455 pgmPhysInvalidatePageMapTLBEntry(pVM, GCPhysPage);
1456
1457 /* Tell NEM about the backing and protection change. */
1458 if (VM_IS_NEM_ENABLED(pVM))
1459 {
1460 uint8_t u2State = PGM_PAGE_GET_NEM_STATE(pPage);
1461 NEMHCNotifyPhysPageChanged(pVM, GCPhysPage, pVM->pgm.s.HCPhysZeroPg, PGM_PAGE_GET_HCPHYS(pPage),
1462 pgmPhysPageCalcNemProtection(pPage, PGMPAGETYPE_MMIO2_ALIAS_MMIO),
1463 PGMPAGETYPE_MMIO2_ALIAS_MMIO, &u2State);
1464 PGM_PAGE_SET_NEM_STATE(pPage, u2State);
1465 }
1466 LogFlow(("PGMHandlerPhysicalPageAliasMmio2: => %R[pgmpage]\n", pPage));
1467 pgmUnlock(pVM);
1468 return VINF_SUCCESS;
1469 }
1470
1471 pgmUnlock(pVM);
1472 AssertMsgFailed(("The page %#x is outside the range %#x-%#x\n",
1473 GCPhysPage, pCur->Core.Key, pCur->Core.KeyLast));
1474 return VERR_INVALID_PARAMETER;
1475 }
1476
1477 pgmUnlock(pVM);
1478 AssertMsgFailed(("Specified physical handler start address %#x is invalid.\n", GCPhys));
1479 return VERR_PGM_HANDLER_NOT_FOUND;
1480}
1481
1482
1483/**
1484 * Replaces an MMIO page with an arbitrary HC page in the shadow page tables.
1485 *
1486 * This differs from PGMHandlerPhysicalPageAliasMmio2 in that the page doesn't
1487 * need to be a known MMIO2 page and that only shadow paging may access the
1488 * page. The latter distinction is important because the only use for this
1489 * feature is for mapping the special APIC access page that VT-x uses to detect
1490 * APIC MMIO operations, the page is shared between all guest CPUs and actually
1491 * not written to. At least at the moment.
1492 *
1493 * The caller must do required page table modifications. You can get away
1494 * without making any modifications since it's an MMIO page, the cost is an extra
1495 * \#PF which will the resync the page.
1496 *
1497 * Call PGMHandlerPhysicalReset() to restore the MMIO page.
1498 *
1499 *
1500 * @returns VBox status code.
1501 * @param pVM The cross context VM structure.
1502 * @param GCPhys The start address of the access handler. This
1503 * must be a fully page aligned range or we risk
1504 * messing up other handlers installed for the
1505 * start and end pages.
1506 * @param GCPhysPage The physical address of the page to turn off
1507 * access monitoring for.
1508 * @param HCPhysPageRemap The physical address of the HC page that
1509 * serves as backing memory.
1510 *
1511 * @remark May cause a page pool flush if used on a page that is already
1512 * aliased.
1513 */
1514VMMDECL(int) PGMHandlerPhysicalPageAliasHC(PVMCC pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage, RTHCPHYS HCPhysPageRemap)
1515{
1516/// Assert(!IOMIsLockOwner(pVM)); /* We mustn't own any other locks when calling this */
1517 pgmLock(pVM);
1518
1519 /*
1520 * Lookup and validate the range.
1521 */
1522 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
1523 if (RT_LIKELY(pCur))
1524 {
1525 if (RT_LIKELY( GCPhysPage >= pCur->Core.Key
1526 && GCPhysPage <= pCur->Core.KeyLast))
1527 {
1528 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
1529 AssertReturnStmt(pCurType->enmKind == PGMPHYSHANDLERKIND_MMIO, pgmUnlock(pVM), VERR_ACCESS_DENIED);
1530 AssertReturnStmt(!(pCur->Core.Key & PAGE_OFFSET_MASK), pgmUnlock(pVM), VERR_INVALID_PARAMETER);
1531 AssertReturnStmt((pCur->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK, pgmUnlock(pVM), VERR_INVALID_PARAMETER);
1532
1533 /*
1534 * Get and validate the pages.
1535 */
1536 PPGMPAGE pPage;
1537 int rc = pgmPhysGetPageEx(pVM, GCPhysPage, &pPage);
1538 AssertReturnStmt(RT_SUCCESS_NP(rc), pgmUnlock(pVM), rc);
1539 if (PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO)
1540 {
1541 pgmUnlock(pVM);
1542 AssertMsgReturn(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_SPECIAL_ALIAS_MMIO,
1543 ("GCPhysPage=%RGp %R[pgmpage]\n", GCPhysPage, pPage),
1544 VERR_PGM_PHYS_NOT_MMIO2);
1545 return VINF_PGM_HANDLER_ALREADY_ALIASED;
1546 }
1547 Assert(PGM_PAGE_IS_ZERO(pPage));
1548
1549 /*
1550 * Do the actual remapping here.
1551 * This page now serves as an alias for the backing memory
1552 * specified as far as shadow paging is concerned.
1553 */
1554 LogFlow(("PGMHandlerPhysicalPageAliasHC: %RGp (%R[pgmpage]) alias for %RHp\n",
1555 GCPhysPage, pPage, HCPhysPageRemap));
1556 PGM_PAGE_SET_HCPHYS(pVM, pPage, HCPhysPageRemap);
1557 PGM_PAGE_SET_TYPE(pVM, pPage, PGMPAGETYPE_SPECIAL_ALIAS_MMIO);
1558 PGM_PAGE_SET_STATE(pVM, pPage, PGM_PAGE_STATE_ALLOCATED);
1559 PGM_PAGE_SET_PAGEID(pVM, pPage, NIL_GMM_PAGEID);
1560 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
1561 pCur->cAliasedPages++;
1562 Assert(pCur->cAliasedPages <= pCur->cPages);
1563
1564 /* Flush its TLB entry. */
1565 pgmPhysInvalidatePageMapTLBEntry(pVM, GCPhysPage);
1566
1567 /* Tell NEM about the backing and protection change. */
1568 if (VM_IS_NEM_ENABLED(pVM))
1569 {
1570 uint8_t u2State = PGM_PAGE_GET_NEM_STATE(pPage);
1571 NEMHCNotifyPhysPageChanged(pVM, GCPhysPage, pVM->pgm.s.HCPhysZeroPg, PGM_PAGE_GET_HCPHYS(pPage),
1572 pgmPhysPageCalcNemProtection(pPage, PGMPAGETYPE_SPECIAL_ALIAS_MMIO),
1573 PGMPAGETYPE_SPECIAL_ALIAS_MMIO, &u2State);
1574 PGM_PAGE_SET_NEM_STATE(pPage, u2State);
1575 }
1576 LogFlow(("PGMHandlerPhysicalPageAliasHC: => %R[pgmpage]\n", pPage));
1577 pgmUnlock(pVM);
1578 return VINF_SUCCESS;
1579 }
1580 pgmUnlock(pVM);
1581 AssertMsgFailed(("The page %#x is outside the range %#x-%#x\n",
1582 GCPhysPage, pCur->Core.Key, pCur->Core.KeyLast));
1583 return VERR_INVALID_PARAMETER;
1584 }
1585 pgmUnlock(pVM);
1586
1587 AssertMsgFailed(("Specified physical handler start address %#x is invalid.\n", GCPhys));
1588 return VERR_PGM_HANDLER_NOT_FOUND;
1589}
1590
1591
1592/**
1593 * Checks if a physical range is handled
1594 *
1595 * @returns boolean
1596 * @param pVM The cross context VM structure.
1597 * @param GCPhys Start physical address earlier passed to PGMR3HandlerPhysicalRegister().
1598 * @remarks Caller must take the PGM lock...
1599 * @thread EMT.
1600 */
1601VMMDECL(bool) PGMHandlerPhysicalIsRegistered(PVMCC pVM, RTGCPHYS GCPhys)
1602{
1603 /*
1604 * Find the handler.
1605 */
1606 pgmLock(pVM);
1607 PPGMPHYSHANDLER pCur = pgmHandlerPhysicalLookup(pVM, GCPhys);
1608 if (pCur)
1609 {
1610#ifdef VBOX_STRICT
1611 Assert(GCPhys >= pCur->Core.Key && GCPhys <= pCur->Core.KeyLast);
1612 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
1613 Assert( pCurType->enmKind == PGMPHYSHANDLERKIND_WRITE
1614 || pCurType->enmKind == PGMPHYSHANDLERKIND_ALL
1615 || pCurType->enmKind == PGMPHYSHANDLERKIND_MMIO);
1616#endif
1617 pgmUnlock(pVM);
1618 return true;
1619 }
1620 pgmUnlock(pVM);
1621 return false;
1622}
1623
1624
1625/**
1626 * Checks if it's an disabled all access handler or write access handler at the
1627 * given address.
1628 *
1629 * @returns true if it's an all access handler, false if it's a write access
1630 * handler.
1631 * @param pVM The cross context VM structure.
1632 * @param GCPhys The address of the page with a disabled handler.
1633 *
1634 * @remarks The caller, PGMR3PhysTlbGCPhys2Ptr, must hold the PGM lock.
1635 */
1636bool pgmHandlerPhysicalIsAll(PVMCC pVM, RTGCPHYS GCPhys)
1637{
1638 pgmLock(pVM);
1639 PPGMPHYSHANDLER pCur = pgmHandlerPhysicalLookup(pVM, GCPhys);
1640 if (!pCur)
1641 {
1642 pgmUnlock(pVM);
1643 AssertFailed();
1644 return true;
1645 }
1646 PPGMPHYSHANDLERTYPEINT pCurType = PGMPHYSHANDLER_GET_TYPE(pVM, pCur);
1647 Assert( pCurType->enmKind == PGMPHYSHANDLERKIND_WRITE
1648 || pCurType->enmKind == PGMPHYSHANDLERKIND_ALL
1649 || pCurType->enmKind == PGMPHYSHANDLERKIND_MMIO); /* sanity */
1650 /* Only whole pages can be disabled. */
1651 Assert( pCur->Core.Key <= (GCPhys & ~(RTGCPHYS)PAGE_OFFSET_MASK)
1652 && pCur->Core.KeyLast >= (GCPhys | PAGE_OFFSET_MASK));
1653
1654 bool bRet = pCurType->enmKind != PGMPHYSHANDLERKIND_WRITE;
1655 pgmUnlock(pVM);
1656 return bRet;
1657}
1658
1659#ifdef VBOX_STRICT
1660
1661/**
1662 * State structure used by the PGMAssertHandlerAndFlagsInSync() function
1663 * and its AVL enumerators.
1664 */
1665typedef struct PGMAHAFIS
1666{
1667 /** The current physical address. */
1668 RTGCPHYS GCPhys;
1669 /** Number of errors. */
1670 unsigned cErrors;
1671 /** Pointer to the VM. */
1672 PVM pVM;
1673} PGMAHAFIS, *PPGMAHAFIS;
1674
1675
1676/**
1677 * Asserts that the handlers+guest-page-tables == ramrange-flags and
1678 * that the physical addresses associated with virtual handlers are correct.
1679 *
1680 * @returns Number of mismatches.
1681 * @param pVM The cross context VM structure.
1682 */
1683VMMDECL(unsigned) PGMAssertHandlerAndFlagsInSync(PVM pVM)
1684{
1685 PPGM pPGM = &pVM->pgm.s;
1686 PGMAHAFIS State;
1687 State.GCPhys = 0;
1688 State.cErrors = 0;
1689 State.pVM = pVM;
1690
1691 PGM_LOCK_ASSERT_OWNER(pVM);
1692
1693 /*
1694 * Check the RAM flags against the handlers.
1695 */
1696 for (PPGMRAMRANGE pRam = pPGM->CTX_SUFF(pRamRangesX); pRam; pRam = pRam->CTX_SUFF(pNext))
1697 {
1698 const uint32_t cPages = pRam->cb >> PAGE_SHIFT;
1699 for (uint32_t iPage = 0; iPage < cPages; iPage++)
1700 {
1701 PGMPAGE const *pPage = &pRam->aPages[iPage];
1702 if (PGM_PAGE_HAS_ANY_HANDLERS(pPage))
1703 {
1704 State.GCPhys = pRam->GCPhys + (iPage << PAGE_SHIFT);
1705
1706 /*
1707 * Physical first - calculate the state based on the handlers
1708 * active on the page, then compare.
1709 */
1710 if (PGM_PAGE_HAS_ANY_PHYSICAL_HANDLERS(pPage))
1711 {
1712 /* the first */
1713 PPGMPHYSHANDLER pPhys = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pPGM->CTX_SUFF(pTrees)->PhysHandlers, State.GCPhys);
1714 if (!pPhys)
1715 {
1716 pPhys = (PPGMPHYSHANDLER)RTAvlroGCPhysGetBestFit(&pPGM->CTX_SUFF(pTrees)->PhysHandlers, State.GCPhys, true);
1717 if ( pPhys
1718 && pPhys->Core.Key > (State.GCPhys + PAGE_SIZE - 1))
1719 pPhys = NULL;
1720 Assert(!pPhys || pPhys->Core.Key >= State.GCPhys);
1721 }
1722 if (pPhys)
1723 {
1724 PPGMPHYSHANDLERTYPEINT pPhysType = (PPGMPHYSHANDLERTYPEINT)MMHyperHeapOffsetToPtr(pVM, pPhys->hType);
1725 unsigned uState = pPhysType->uState;
1726
1727 /* more? */
1728 while (pPhys->Core.KeyLast < (State.GCPhys | PAGE_OFFSET_MASK))
1729 {
1730 PPGMPHYSHANDLER pPhys2 = (PPGMPHYSHANDLER)RTAvlroGCPhysGetBestFit(&pPGM->CTX_SUFF(pTrees)->PhysHandlers,
1731 pPhys->Core.KeyLast + 1, true);
1732 if ( !pPhys2
1733 || pPhys2->Core.Key > (State.GCPhys | PAGE_OFFSET_MASK))
1734 break;
1735 PPGMPHYSHANDLERTYPEINT pPhysType2 = (PPGMPHYSHANDLERTYPEINT)MMHyperHeapOffsetToPtr(pVM, pPhys2->hType);
1736 uState = RT_MAX(uState, pPhysType2->uState);
1737 pPhys = pPhys2;
1738 }
1739
1740 /* compare.*/
1741 if ( PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != uState
1742 && PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != PGM_PAGE_HNDL_PHYS_STATE_DISABLED)
1743 {
1744 AssertMsgFailed(("ram range vs phys handler flags mismatch. GCPhys=%RGp state=%d expected=%d %s\n",
1745 State.GCPhys, PGM_PAGE_GET_HNDL_PHYS_STATE(pPage), uState, pPhysType->pszDesc));
1746 State.cErrors++;
1747 }
1748 }
1749 else
1750 {
1751 AssertMsgFailed(("ram range vs phys handler mismatch. no handler for GCPhys=%RGp\n", State.GCPhys));
1752 State.cErrors++;
1753 }
1754 }
1755 }
1756 } /* foreach page in ram range. */
1757 } /* foreach ram range. */
1758
1759 /*
1760 * Do the reverse check for physical handlers.
1761 */
1762 /** @todo */
1763
1764 return State.cErrors;
1765}
1766
1767#endif /* VBOX_STRICT */
1768
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