VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMAll/PGMAllHandler.cpp@ 32035

Last change on this file since 32035 was 31996, checked in by vboxsync, 14 years ago

Mostly safe X86_PTE_PAE_PG_MASK -> X86_PTE_PAE_PG_MASK_FULL conversions.
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File size: 68.2 KB
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1/* $Id: PGMAllHandler.cpp 31996 2010-08-26 13:32:30Z vboxsync $ */
2/** @file
3 * PGM - Page Manager / Monitor, Access Handlers.
4 */
5
6/*
7 * Copyright (C) 2006-2010 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*******************************************************************************
20* Header Files *
21*******************************************************************************/
22#define LOG_GROUP LOG_GROUP_PGM
23#include <VBox/dbgf.h>
24#include <VBox/pgm.h>
25#include <VBox/iom.h>
26#include <VBox/mm.h>
27#include <VBox/em.h>
28#include <VBox/stam.h>
29#include <VBox/rem.h>
30#include <VBox/dbgf.h>
31#include <VBox/rem.h>
32#include "../PGMInternal.h"
33#include <VBox/vm.h>
34#include "../PGMInline.h"
35
36#include <VBox/log.h>
37#include <iprt/assert.h>
38#include <iprt/asm-amd64-x86.h>
39#include <iprt/string.h>
40#include <VBox/param.h>
41#include <VBox/err.h>
42#include <VBox/selm.h>
43
44
45/*******************************************************************************
46* Internal Functions *
47*******************************************************************************/
48static int pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(PVM pVM, PPGMPHYSHANDLER pCur, PPGMRAMRANGE pRam);
49static void pgmHandlerPhysicalDeregisterNotifyREM(PVM pVM, PPGMPHYSHANDLER pCur);
50static void pgmHandlerPhysicalResetRamFlags(PVM pVM, PPGMPHYSHANDLER pCur);
51
52
53
54/**
55 * Register a access handler for a physical range.
56 *
57 * @returns VBox status code.
58 * @retval VINF_SUCCESS when successfully installed.
59 * @retval VINF_PGM_GCPHYS_ALIASED when the shadow PTs could be updated because
60 * the guest page aliased or/and mapped by multiple PTs. A CR3 sync has been
61 * flagged together with a pool clearing.
62 * @retval VERR_PGM_HANDLER_PHYSICAL_CONFLICT if the range conflicts with an existing
63 * one. A debug assertion is raised.
64 *
65 * @param pVM VM Handle.
66 * @param enmType Handler type. Any of the PGMPHYSHANDLERTYPE_PHYSICAL* enums.
67 * @param GCPhys Start physical address.
68 * @param GCPhysLast Last physical address. (inclusive)
69 * @param pfnHandlerR3 The R3 handler.
70 * @param pvUserR3 User argument to the R3 handler.
71 * @param pfnHandlerR0 The R0 handler.
72 * @param pvUserR0 User argument to the R0 handler.
73 * @param pfnHandlerRC The RC handler.
74 * @param pvUserRC User argument to the RC handler. This can be a value
75 * less that 0x10000 or a (non-null) pointer that is
76 * automatically relocatated.
77 * @param pszDesc Pointer to description string. This must not be freed.
78 */
79VMMDECL(int) PGMHandlerPhysicalRegisterEx(PVM pVM, PGMPHYSHANDLERTYPE enmType, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast,
80 R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3, RTR3PTR pvUserR3,
81 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0, RTR0PTR pvUserR0,
82 RCPTRTYPE(PFNPGMRCPHYSHANDLER) pfnHandlerRC, RTRCPTR pvUserRC,
83 R3PTRTYPE(const char *) pszDesc)
84{
85 Log(("PGMHandlerPhysicalRegisterEx: enmType=%d GCPhys=%RGp GCPhysLast=%RGp pfnHandlerR3=%RHv pvUserR3=%RHv pfnHandlerR0=%RHv pvUserR0=%RHv pfnHandlerGC=%RRv pvUserGC=%RRv pszDesc=%s\n",
86 enmType, GCPhys, GCPhysLast, pfnHandlerR3, pvUserR3, pfnHandlerR0, pvUserR0, pfnHandlerRC, pvUserRC, R3STRING(pszDesc)));
87
88 /*
89 * Validate input.
90 */
91 AssertMsgReturn(GCPhys < GCPhysLast, ("GCPhys >= GCPhysLast (%#x >= %#x)\n", GCPhys, GCPhysLast), VERR_INVALID_PARAMETER);
92 switch (enmType)
93 {
94 case PGMPHYSHANDLERTYPE_PHYSICAL_WRITE:
95 break;
96 case PGMPHYSHANDLERTYPE_MMIO:
97 case PGMPHYSHANDLERTYPE_PHYSICAL_ALL:
98 /* Simplification in PGMPhysRead among other places. */
99 AssertMsgReturn(!(GCPhys & PAGE_OFFSET_MASK), ("%RGp\n", GCPhys), VERR_INVALID_PARAMETER);
100 AssertMsgReturn((GCPhysLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK, ("%RGp\n", GCPhysLast), VERR_INVALID_PARAMETER);
101 break;
102 default:
103 AssertMsgFailed(("Invalid input enmType=%d!\n", enmType));
104 return VERR_INVALID_PARAMETER;
105 }
106 AssertMsgReturn( (RTRCUINTPTR)pvUserRC < 0x10000
107 || MMHyperR3ToRC(pVM, MMHyperRCToR3(pVM, pvUserRC)) == pvUserRC,
108 ("Not RC pointer! pvUserRC=%RRv\n", pvUserRC),
109 VERR_INVALID_PARAMETER);
110 AssertMsgReturn( (RTR0UINTPTR)pvUserR0 < 0x10000
111 || MMHyperR3ToR0(pVM, MMHyperR0ToR3(pVM, pvUserR0)) == pvUserR0,
112 ("Not R0 pointer! pvUserR0=%RHv\n", pvUserR0),
113 VERR_INVALID_PARAMETER);
114 AssertPtrReturn(pfnHandlerR3, VERR_INVALID_POINTER);
115 AssertReturn(pfnHandlerR0, VERR_INVALID_PARAMETER);
116 AssertReturn(pfnHandlerRC, VERR_INVALID_PARAMETER);
117
118 /*
119 * We require the range to be within registered ram.
120 * There is no apparent need to support ranges which cover more than one ram range.
121 */
122 PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(pRamRanges);
123 while (pRam && GCPhys > pRam->GCPhysLast)
124 pRam = pRam->CTX_SUFF(pNext);
125 if ( !pRam
126 || GCPhysLast < pRam->GCPhys
127 || GCPhys > pRam->GCPhysLast)
128 {
129#ifdef IN_RING3
130 DBGFR3Info(pVM, "phys", NULL, NULL);
131#endif
132 AssertMsgFailed(("No RAM range for %RGp-%RGp\n", GCPhys, GCPhysLast));
133 return VERR_PGM_HANDLER_PHYSICAL_NO_RAM_RANGE;
134 }
135
136 /*
137 * Allocate and initialize the new entry.
138 */
139 PPGMPHYSHANDLER pNew;
140 int rc = MMHyperAlloc(pVM, sizeof(*pNew), 0, MM_TAG_PGM_HANDLERS, (void **)&pNew);
141 if (RT_FAILURE(rc))
142 return rc;
143
144 pNew->Core.Key = GCPhys;
145 pNew->Core.KeyLast = GCPhysLast;
146 pNew->enmType = enmType;
147 pNew->cPages = (GCPhysLast - (GCPhys & X86_PTE_PAE_PG_MASK_FULL) + PAGE_SIZE) >> PAGE_SHIFT;
148 pNew->pfnHandlerR3 = pfnHandlerR3;
149 pNew->pvUserR3 = pvUserR3;
150 pNew->pfnHandlerR0 = pfnHandlerR0;
151 pNew->pvUserR0 = pvUserR0;
152 pNew->pfnHandlerRC = pfnHandlerRC;
153 pNew->pvUserRC = pvUserRC;
154 pNew->pszDesc = pszDesc;
155
156 pgmLock(pVM);
157
158 /*
159 * Try insert into list.
160 */
161 if (RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, &pNew->Core))
162 {
163 rc = pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(pVM, pNew, pRam);
164 if (rc == VINF_PGM_SYNC_CR3)
165 rc = VINF_PGM_GCPHYS_ALIASED;
166 pgmUnlock(pVM);
167#ifndef IN_RING3
168 REMNotifyHandlerPhysicalRegister(pVM, enmType, GCPhys, GCPhysLast - GCPhys + 1, !!pfnHandlerR3);
169#else
170 REMR3NotifyHandlerPhysicalRegister(pVM, enmType, GCPhys, GCPhysLast - GCPhys + 1, !!pfnHandlerR3);
171#endif
172 if (rc != VINF_SUCCESS)
173 Log(("PGMHandlerPhysicalRegisterEx: returns %Rrc (%RGp-%RGp)\n", rc, GCPhys, GCPhysLast));
174 return rc;
175 }
176
177 pgmUnlock(pVM);
178
179#if defined(IN_RING3) && defined(VBOX_STRICT)
180 DBGFR3Info(pVM, "handlers", "phys nostats", NULL);
181#endif
182 AssertMsgFailed(("Conflict! GCPhys=%RGp GCPhysLast=%RGp pszDesc=%s\n", GCPhys, GCPhysLast, pszDesc));
183 MMHyperFree(pVM, pNew);
184 return VERR_PGM_HANDLER_PHYSICAL_CONFLICT;
185}
186
187
188/**
189 * Sets ram range flags and attempts updating shadow PTs.
190 *
191 * @returns VBox status code.
192 * @retval VINF_SUCCESS when shadow PTs was successfully updated.
193 * @retval VINF_PGM_SYNC_CR3 when the shadow PTs could be updated because
194 * the guest page aliased or/and mapped by multiple PTs. FFs set.
195 * @param pVM The VM handle.
196 * @param pCur The physical handler.
197 * @param pRam The RAM range.
198 */
199static int pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(PVM pVM, PPGMPHYSHANDLER pCur, PPGMRAMRANGE pRam)
200{
201 /*
202 * Iterate the guest ram pages updating the flags and flushing PT entries
203 * mapping the page.
204 */
205 bool fFlushTLBs = false;
206 int rc = VINF_SUCCESS;
207 const unsigned uState = pgmHandlerPhysicalCalcState(pCur);
208 uint32_t cPages = pCur->cPages;
209 uint32_t i = (pCur->Core.Key - pRam->GCPhys) >> PAGE_SHIFT;
210 for (;;)
211 {
212 PPGMPAGE pPage = &pRam->aPages[i];
213 AssertMsg(pCur->enmType != PGMPHYSHANDLERTYPE_MMIO || PGM_PAGE_IS_MMIO(pPage),
214 ("%RGp %R[pgmpage]\n", pRam->GCPhys + (i << PAGE_SHIFT), pPage));
215
216 /* Only do upgrades. */
217 if (PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) < uState)
218 {
219 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, uState);
220
221 int rc2 = pgmPoolTrackUpdateGCPhys(pVM, pRam->GCPhys + (i << PAGE_SHIFT), pPage, false /* allow updates of PTEs (instead of flushing) */, &fFlushTLBs);
222 if (rc2 != VINF_SUCCESS && rc == VINF_SUCCESS)
223 rc = rc2;
224 }
225
226 /* next */
227 if (--cPages == 0)
228 break;
229 i++;
230 }
231
232 if (fFlushTLBs)
233 {
234 PGM_INVL_ALL_VCPU_TLBS(pVM);
235 Log(("pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs: flushing guest TLBs; rc=%d\n", rc));
236 }
237 else
238 Log(("pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs: doesn't flush guest TLBs. rc=%Rrc; sync flags=%x VMCPU_FF_PGM_SYNC_CR3=%d\n", rc, VMMGetCpu(pVM)->pgm.s.fSyncFlags, VMCPU_FF_ISSET(VMMGetCpu(pVM), VMCPU_FF_PGM_SYNC_CR3)));
239
240 return rc;
241}
242
243
244/**
245 * Register a physical page access handler.
246 *
247 * @returns VBox status code.
248 * @param pVM VM Handle.
249 * @param GCPhys Start physical address.
250 */
251VMMDECL(int) PGMHandlerPhysicalDeregister(PVM pVM, RTGCPHYS GCPhys)
252{
253 /*
254 * Find the handler.
255 */
256 pgmLock(pVM);
257 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysRemove(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
258 if (pCur)
259 {
260 LogFlow(("PGMHandlerPhysicalDeregister: Removing Range %RGp-%RGp %s\n",
261 pCur->Core.Key, pCur->Core.KeyLast, R3STRING(pCur->pszDesc)));
262
263 /*
264 * Clear the page bits, notify the REM about this change and clear
265 * the cache.
266 */
267 pgmHandlerPhysicalResetRamFlags(pVM, pCur);
268 pgmHandlerPhysicalDeregisterNotifyREM(pVM, pCur);
269 pVM->pgm.s.pLastPhysHandlerR0 = 0;
270 pVM->pgm.s.pLastPhysHandlerR3 = 0;
271 pVM->pgm.s.pLastPhysHandlerRC = 0;
272 MMHyperFree(pVM, pCur);
273 pgmUnlock(pVM);
274 return VINF_SUCCESS;
275 }
276 pgmUnlock(pVM);
277
278 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys));
279 return VERR_PGM_HANDLER_NOT_FOUND;
280}
281
282
283/**
284 * Shared code with modify.
285 */
286static void pgmHandlerPhysicalDeregisterNotifyREM(PVM pVM, PPGMPHYSHANDLER pCur)
287{
288 RTGCPHYS GCPhysStart = pCur->Core.Key;
289 RTGCPHYS GCPhysLast = pCur->Core.KeyLast;
290
291 /*
292 * Page align the range.
293 *
294 * Since we've reset (recalculated) the physical handler state of all pages
295 * we can make use of the page states to figure out whether a page should be
296 * included in the REM notification or not.
297 */
298 if ( (pCur->Core.Key & PAGE_OFFSET_MASK)
299 || ((pCur->Core.KeyLast + 1) & PAGE_OFFSET_MASK))
300 {
301 Assert(pCur->enmType != PGMPHYSHANDLERTYPE_MMIO);
302
303 if (GCPhysStart & PAGE_OFFSET_MASK)
304 {
305 PPGMPAGE pPage = pgmPhysGetPage(&pVM->pgm.s, GCPhysStart);
306 if ( pPage
307 && PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != PGM_PAGE_HNDL_PHYS_STATE_NONE)
308 {
309 RTGCPHYS GCPhys = (GCPhysStart + (PAGE_SIZE - 1)) & X86_PTE_PAE_PG_MASK_FULL;
310 if ( GCPhys > GCPhysLast
311 || GCPhys < GCPhysStart)
312 return;
313 GCPhysStart = GCPhys;
314 }
315 else
316 GCPhysStart &= X86_PTE_PAE_PG_MASK_FULL;
317 Assert(!pPage || PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO); /* these are page aligned atm! */
318 }
319
320 if (GCPhysLast & PAGE_OFFSET_MASK)
321 {
322 PPGMPAGE pPage = pgmPhysGetPage(&pVM->pgm.s, GCPhysLast);
323 if ( pPage
324 && PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != PGM_PAGE_HNDL_PHYS_STATE_NONE)
325 {
326 RTGCPHYS GCPhys = (GCPhysLast & X86_PTE_PAE_PG_MASK_FULL) - 1;
327 if ( GCPhys < GCPhysStart
328 || GCPhys > GCPhysLast)
329 return;
330 GCPhysLast = GCPhys;
331 }
332 else
333 GCPhysLast |= PAGE_OFFSET_MASK;
334 Assert(!pPage || PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO); /* these are page aligned atm! */
335 }
336 }
337
338 /*
339 * Tell REM.
340 */
341 const bool fRestoreAsRAM = pCur->pfnHandlerR3
342 && pCur->enmType != PGMPHYSHANDLERTYPE_MMIO; /** @todo this isn't entirely correct. */
343#ifndef IN_RING3
344 REMNotifyHandlerPhysicalDeregister(pVM, pCur->enmType, GCPhysStart, GCPhysLast - GCPhysStart + 1, !!pCur->pfnHandlerR3, fRestoreAsRAM);
345#else
346 REMR3NotifyHandlerPhysicalDeregister(pVM, pCur->enmType, GCPhysStart, GCPhysLast - GCPhysStart + 1, !!pCur->pfnHandlerR3, fRestoreAsRAM);
347#endif
348}
349
350
351/**
352 * pgmHandlerPhysicalResetRamFlags helper that checks for
353 * other handlers on edge pages.
354 */
355DECLINLINE(void) pgmHandlerPhysicalRecalcPageState(PPGM pPGM, RTGCPHYS GCPhys, bool fAbove, PPGMRAMRANGE *ppRamHint)
356{
357 /*
358 * Look for other handlers.
359 */
360 unsigned uState = PGM_PAGE_HNDL_PHYS_STATE_NONE;
361 for (;;)
362 {
363 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGetBestFit(&pPGM->CTX_SUFF(pTrees)->PhysHandlers, GCPhys, fAbove);
364 if ( !pCur
365 || ((fAbove ? pCur->Core.Key : pCur->Core.KeyLast) >> PAGE_SHIFT) != (GCPhys >> PAGE_SHIFT))
366 break;
367 unsigned uThisState = pgmHandlerPhysicalCalcState(pCur);
368 uState = RT_MAX(uState, uThisState);
369
370 /* next? */
371 RTGCPHYS GCPhysNext = fAbove
372 ? pCur->Core.KeyLast + 1
373 : pCur->Core.Key - 1;
374 if ((GCPhysNext >> PAGE_SHIFT) != (GCPhys >> PAGE_SHIFT))
375 break;
376 GCPhys = GCPhysNext;
377 }
378
379 /*
380 * Update if we found something that is a higher priority
381 * state than the current.
382 */
383 if (uState != PGM_PAGE_HNDL_PHYS_STATE_NONE)
384 {
385 PPGMPAGE pPage;
386 int rc = pgmPhysGetPageWithHintEx(pPGM, GCPhys, &pPage, ppRamHint);
387 if ( RT_SUCCESS(rc)
388 && PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) < uState)
389 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, uState);
390 else
391 AssertRC(rc);
392 }
393}
394
395
396/**
397 * Resets an aliased page.
398 *
399 * @param pVM The VM.
400 * @param pPage The page.
401 * @param GCPhysPage The page address in case it comes in handy.
402 */
403void pgmHandlerPhysicalResetAliasedPage(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhysPage)
404{
405 Assert(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO);
406 Assert(PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) == PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
407
408 /*
409 * Flush any shadow page table references *first*.
410 */
411 bool fFlushTLBs = false;
412 int rc = pgmPoolTrackFlushGCPhys(pVM, GCPhysPage, pPage, &fFlushTLBs);
413 AssertLogRelRCReturnVoid(rc);
414# ifdef IN_RC
415 if (fFlushTLBs && rc != VINF_PGM_SYNC_CR3)
416 PGM_INVL_VCPU_TLBS(VMMGetCpu0(pVM));
417# else
418 HWACCMFlushTLBOnAllVCpus(pVM);
419# endif
420
421 /*
422 * Make it an MMIO/Zero page.
423 */
424 PGM_PAGE_SET_HCPHYS(pPage, pVM->pgm.s.HCPhysZeroPg);
425 PGM_PAGE_SET_TYPE(pPage, PGMPAGETYPE_MMIO);
426 PGM_PAGE_SET_STATE(pPage, PGM_PAGE_STATE_ZERO);
427 PGM_PAGE_SET_PAGEID(pPage, NIL_GMM_PAGEID);
428 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_ALL);
429
430 /* Flush its TLB entry. */
431 PGMPhysInvalidatePageMapTLBEntry(pVM, GCPhysPage);
432
433 NOREF(GCPhysPage);
434}
435
436
437/**
438 * Resets ram range flags.
439 *
440 * @returns VBox status code.
441 * @retval VINF_SUCCESS when shadow PTs was successfully updated.
442 * @param pVM The VM handle.
443 * @param pCur The physical handler.
444 *
445 * @remark We don't start messing with the shadow page tables, as we've already got code
446 * in Trap0e which deals with out of sync handler flags (originally conceived for
447 * global pages).
448 */
449static void pgmHandlerPhysicalResetRamFlags(PVM pVM, PPGMPHYSHANDLER pCur)
450{
451 /*
452 * Iterate the guest ram pages updating the state.
453 */
454 RTUINT cPages = pCur->cPages;
455 RTGCPHYS GCPhys = pCur->Core.Key;
456 PPGMRAMRANGE pRamHint = NULL;
457 PPGM pPGM = &pVM->pgm.s;
458 for (;;)
459 {
460 PPGMPAGE pPage;
461 int rc = pgmPhysGetPageWithHintEx(pPGM, GCPhys, &pPage, &pRamHint);
462 if (RT_SUCCESS(rc))
463 {
464 /* Reset MMIO2 for MMIO pages to MMIO, since this aliasing is our business.
465 (We don't flip MMIO to RAM though, that's PGMPhys.cpp's job.) */
466 if (PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO)
467 pgmHandlerPhysicalResetAliasedPage(pVM, pPage, GCPhys);
468 AssertMsg(pCur->enmType != PGMPHYSHANDLERTYPE_MMIO || PGM_PAGE_IS_MMIO(pPage), ("%RGp %R[pgmpage]\n", GCPhys, pPage));
469 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_NONE);
470 }
471 else
472 AssertRC(rc);
473
474 /* next */
475 if (--cPages == 0)
476 break;
477 GCPhys += PAGE_SIZE;
478 }
479
480 /*
481 * Check for partial start and end pages.
482 */
483 if (pCur->Core.Key & PAGE_OFFSET_MASK)
484 pgmHandlerPhysicalRecalcPageState(pPGM, pCur->Core.Key - 1, false /* fAbove */, &pRamHint);
485 if ((pCur->Core.KeyLast & PAGE_OFFSET_MASK) != PAGE_SIZE - 1)
486 pgmHandlerPhysicalRecalcPageState(pPGM, pCur->Core.KeyLast + 1, true /* fAbove */, &pRamHint);
487}
488
489
490/**
491 * Modify a physical page access handler.
492 *
493 * Modification can only be done to the range it self, not the type or anything else.
494 *
495 * @returns VBox status code.
496 * For all return codes other than VERR_PGM_HANDLER_NOT_FOUND and VINF_SUCCESS the range is deregistered
497 * and a new registration must be performed!
498 * @param pVM VM handle.
499 * @param GCPhysCurrent Current location.
500 * @param GCPhys New location.
501 * @param GCPhysLast New last location.
502 */
503VMMDECL(int) PGMHandlerPhysicalModify(PVM pVM, RTGCPHYS GCPhysCurrent, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast)
504{
505 /*
506 * Remove it.
507 */
508 int rc;
509 pgmLock(pVM);
510 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysRemove(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhysCurrent);
511 if (pCur)
512 {
513 /*
514 * Clear the ram flags. (We're gonna move or free it!)
515 */
516 pgmHandlerPhysicalResetRamFlags(pVM, pCur);
517 const bool fRestoreAsRAM = pCur->pfnHandlerR3
518 && pCur->enmType != PGMPHYSHANDLERTYPE_MMIO; /** @todo this isn't entirely correct. */
519
520 /*
521 * Validate the new range, modify and reinsert.
522 */
523 if (GCPhysLast >= GCPhys)
524 {
525 /*
526 * We require the range to be within registered ram.
527 * There is no apparent need to support ranges which cover more than one ram range.
528 */
529 PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(pRamRanges);
530 while (pRam && GCPhys > pRam->GCPhysLast)
531 pRam = pRam->CTX_SUFF(pNext);
532 if ( pRam
533 && GCPhys <= pRam->GCPhysLast
534 && GCPhysLast >= pRam->GCPhys)
535 {
536 pCur->Core.Key = GCPhys;
537 pCur->Core.KeyLast = GCPhysLast;
538 pCur->cPages = (GCPhysLast - (GCPhys & X86_PTE_PAE_PG_MASK_FULL) + 1) >> PAGE_SHIFT;
539
540 if (RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, &pCur->Core))
541 {
542 PGMPHYSHANDLERTYPE enmType = pCur->enmType;
543 RTGCPHYS cb = GCPhysLast - GCPhys + 1;
544 bool fHasHCHandler = !!pCur->pfnHandlerR3;
545
546 /*
547 * Set ram flags, flush shadow PT entries and finally tell REM about this.
548 */
549 rc = pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(pVM, pCur, pRam);
550 pgmUnlock(pVM);
551
552#ifndef IN_RING3
553 REMNotifyHandlerPhysicalModify(pVM, enmType, GCPhysCurrent, GCPhys, cb,
554 fHasHCHandler, fRestoreAsRAM);
555#else
556 REMR3NotifyHandlerPhysicalModify(pVM, enmType, GCPhysCurrent, GCPhys, cb,
557 fHasHCHandler, fRestoreAsRAM);
558#endif
559 PGM_INVL_ALL_VCPU_TLBS(pVM);
560 Log(("PGMHandlerPhysicalModify: GCPhysCurrent=%RGp -> GCPhys=%RGp GCPhysLast=%RGp\n",
561 GCPhysCurrent, GCPhys, GCPhysLast));
562 return VINF_SUCCESS;
563 }
564
565 AssertMsgFailed(("Conflict! GCPhys=%RGp GCPhysLast=%RGp\n", GCPhys, GCPhysLast));
566 rc = VERR_PGM_HANDLER_PHYSICAL_CONFLICT;
567 }
568 else
569 {
570 AssertMsgFailed(("No RAM range for %RGp-%RGp\n", GCPhys, GCPhysLast));
571 rc = VERR_PGM_HANDLER_PHYSICAL_NO_RAM_RANGE;
572 }
573 }
574 else
575 {
576 AssertMsgFailed(("Invalid range %RGp-%RGp\n", GCPhys, GCPhysLast));
577 rc = VERR_INVALID_PARAMETER;
578 }
579
580 /*
581 * Invalid new location, flush the cache and free it.
582 * We've only gotta notify REM and free the memory.
583 */
584 pgmHandlerPhysicalDeregisterNotifyREM(pVM, pCur);
585 pVM->pgm.s.pLastPhysHandlerR0 = 0;
586 pVM->pgm.s.pLastPhysHandlerR3 = 0;
587 pVM->pgm.s.pLastPhysHandlerRC = 0;
588 MMHyperFree(pVM, pCur);
589 }
590 else
591 {
592 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhysCurrent));
593 rc = VERR_PGM_HANDLER_NOT_FOUND;
594 }
595
596 pgmUnlock(pVM);
597 return rc;
598}
599
600
601/**
602 * Changes the callbacks associated with a physical access handler.
603 *
604 * @returns VBox status code.
605 * @param pVM VM Handle.
606 * @param GCPhys Start physical address.
607 * @param pfnHandlerR3 The R3 handler.
608 * @param pvUserR3 User argument to the R3 handler.
609 * @param pfnHandlerR0 The R0 handler.
610 * @param pvUserR0 User argument to the R0 handler.
611 * @param pfnHandlerRC The RC handler.
612 * @param pvUserRC User argument to the RC handler. Values larger or
613 * equal to 0x10000 will be relocated automatically.
614 * @param pszDesc Pointer to description string. This must not be freed.
615 */
616VMMDECL(int) PGMHandlerPhysicalChangeCallbacks(PVM pVM, RTGCPHYS GCPhys,
617 R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3, RTR3PTR pvUserR3,
618 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0, RTR0PTR pvUserR0,
619 RCPTRTYPE(PFNPGMRCPHYSHANDLER) pfnHandlerRC, RTRCPTR pvUserRC,
620 R3PTRTYPE(const char *) pszDesc)
621{
622 /*
623 * Get the handler.
624 */
625 int rc = VINF_SUCCESS;
626 pgmLock(pVM);
627 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
628 if (pCur)
629 {
630 /*
631 * Change callbacks.
632 */
633 pCur->pfnHandlerR3 = pfnHandlerR3;
634 pCur->pvUserR3 = pvUserR3;
635 pCur->pfnHandlerR0 = pfnHandlerR0;
636 pCur->pvUserR0 = pvUserR0;
637 pCur->pfnHandlerRC = pfnHandlerRC;
638 pCur->pvUserRC = pvUserRC;
639 pCur->pszDesc = pszDesc;
640 }
641 else
642 {
643 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys));
644 rc = VERR_PGM_HANDLER_NOT_FOUND;
645 }
646
647 pgmUnlock(pVM);
648 return rc;
649}
650
651
652/**
653 * Splits a physical access handler in two.
654 *
655 * @returns VBox status code.
656 * @param pVM VM Handle.
657 * @param GCPhys Start physical address of the handler.
658 * @param GCPhysSplit The split address.
659 */
660VMMDECL(int) PGMHandlerPhysicalSplit(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysSplit)
661{
662 AssertReturn(GCPhys < GCPhysSplit, VERR_INVALID_PARAMETER);
663
664 /*
665 * Do the allocation without owning the lock.
666 */
667 PPGMPHYSHANDLER pNew;
668 int rc = MMHyperAlloc(pVM, sizeof(*pNew), 0, MM_TAG_PGM_HANDLERS, (void **)&pNew);
669 if (RT_FAILURE(rc))
670 return rc;
671
672 /*
673 * Get the handler.
674 */
675 pgmLock(pVM);
676 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
677 if (RT_LIKELY(pCur))
678 {
679 if (RT_LIKELY(GCPhysSplit <= pCur->Core.KeyLast))
680 {
681 /*
682 * Create new handler node for the 2nd half.
683 */
684 *pNew = *pCur;
685 pNew->Core.Key = GCPhysSplit;
686 pNew->cPages = (pNew->Core.KeyLast - (pNew->Core.Key & X86_PTE_PAE_PG_MASK_FULL) + PAGE_SIZE) >> PAGE_SHIFT;
687
688 pCur->Core.KeyLast = GCPhysSplit - 1;
689 pCur->cPages = (pCur->Core.KeyLast - (pCur->Core.Key & X86_PTE_PAE_PG_MASK_FULL) + PAGE_SIZE) >> PAGE_SHIFT;
690
691 if (RT_LIKELY(RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, &pNew->Core)))
692 {
693 LogFlow(("PGMHandlerPhysicalSplit: %RGp-%RGp and %RGp-%RGp\n",
694 pCur->Core.Key, pCur->Core.KeyLast, pNew->Core.Key, pNew->Core.KeyLast));
695 pgmUnlock(pVM);
696 return VINF_SUCCESS;
697 }
698 AssertMsgFailed(("whu?\n"));
699 rc = VERR_INTERNAL_ERROR;
700 }
701 else
702 {
703 AssertMsgFailed(("outside range: %RGp-%RGp split %RGp\n", pCur->Core.Key, pCur->Core.KeyLast, GCPhysSplit));
704 rc = VERR_INVALID_PARAMETER;
705 }
706 }
707 else
708 {
709 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys));
710 rc = VERR_PGM_HANDLER_NOT_FOUND;
711 }
712 pgmUnlock(pVM);
713 MMHyperFree(pVM, pNew);
714 return rc;
715}
716
717
718/**
719 * Joins up two adjacent physical access handlers which has the same callbacks.
720 *
721 * @returns VBox status code.
722 * @param pVM VM Handle.
723 * @param GCPhys1 Start physical address of the first handler.
724 * @param GCPhys2 Start physical address of the second handler.
725 */
726VMMDECL(int) PGMHandlerPhysicalJoin(PVM pVM, RTGCPHYS GCPhys1, RTGCPHYS GCPhys2)
727{
728 /*
729 * Get the handlers.
730 */
731 int rc;
732 pgmLock(pVM);
733 PPGMPHYSHANDLER pCur1 = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys1);
734 if (RT_LIKELY(pCur1))
735 {
736 PPGMPHYSHANDLER pCur2 = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys2);
737 if (RT_LIKELY(pCur2))
738 {
739 /*
740 * Make sure that they are adjacent, and that they've got the same callbacks.
741 */
742 if (RT_LIKELY(pCur1->Core.KeyLast + 1 == pCur2->Core.Key))
743 {
744 if (RT_LIKELY( pCur1->pfnHandlerRC == pCur2->pfnHandlerRC
745 && pCur1->pfnHandlerR0 == pCur2->pfnHandlerR0
746 && pCur1->pfnHandlerR3 == pCur2->pfnHandlerR3))
747 {
748 PPGMPHYSHANDLER pCur3 = (PPGMPHYSHANDLER)RTAvlroGCPhysRemove(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys2);
749 if (RT_LIKELY(pCur3 == pCur2))
750 {
751 pCur1->Core.KeyLast = pCur2->Core.KeyLast;
752 pCur1->cPages = (pCur1->Core.KeyLast - (pCur1->Core.Key & X86_PTE_PAE_PG_MASK_FULL) + PAGE_SIZE) >> PAGE_SHIFT;
753 LogFlow(("PGMHandlerPhysicalJoin: %RGp-%RGp %RGp-%RGp\n",
754 pCur1->Core.Key, pCur1->Core.KeyLast, pCur2->Core.Key, pCur2->Core.KeyLast));
755 pVM->pgm.s.pLastPhysHandlerR0 = 0;
756 pVM->pgm.s.pLastPhysHandlerR3 = 0;
757 pVM->pgm.s.pLastPhysHandlerRC = 0;
758 MMHyperFree(pVM, pCur2);
759 pgmUnlock(pVM);
760 return VINF_SUCCESS;
761 }
762
763 Assert(pCur3 == pCur2);
764 rc = VERR_INTERNAL_ERROR;
765 }
766 else
767 {
768 AssertMsgFailed(("mismatching handlers\n"));
769 rc = VERR_ACCESS_DENIED;
770 }
771 }
772 else
773 {
774 AssertMsgFailed(("not adjacent: %RGp-%RGp %RGp-%RGp\n",
775 pCur1->Core.Key, pCur1->Core.KeyLast, pCur2->Core.Key, pCur2->Core.KeyLast));
776 rc = VERR_INVALID_PARAMETER;
777 }
778 }
779 else
780 {
781 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys2));
782 rc = VERR_PGM_HANDLER_NOT_FOUND;
783 }
784 }
785 else
786 {
787 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys1));
788 rc = VERR_PGM_HANDLER_NOT_FOUND;
789 }
790 pgmUnlock(pVM);
791 return rc;
792
793}
794
795
796/**
797 * Resets any modifications to individual pages in a physical
798 * page access handler region.
799 *
800 * This is used in pair with PGMHandlerPhysicalPageTempOff() or
801 * PGMHandlerPhysicalPageAlias().
802 *
803 * @returns VBox status code.
804 * @param pVM VM Handle
805 * @param GCPhys The start address of the handler regions, i.e. what you
806 * passed to PGMR3HandlerPhysicalRegister(),
807 * PGMHandlerPhysicalRegisterEx() or
808 * PGMHandlerPhysicalModify().
809 */
810VMMDECL(int) PGMHandlerPhysicalReset(PVM pVM, RTGCPHYS GCPhys)
811{
812 LogFlow(("PGMHandlerPhysicalReset GCPhys=%RGp\n", GCPhys));
813 pgmLock(pVM);
814
815 /*
816 * Find the handler.
817 */
818 int rc;
819 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
820 if (RT_LIKELY(pCur))
821 {
822 /*
823 * Validate type.
824 */
825 switch (pCur->enmType)
826 {
827 case PGMPHYSHANDLERTYPE_PHYSICAL_WRITE:
828 case PGMPHYSHANDLERTYPE_PHYSICAL_ALL:
829 case PGMPHYSHANDLERTYPE_MMIO: /* NOTE: Only use when clearing MMIO ranges with aliased MMIO2 pages! */
830 {
831 STAM_COUNTER_INC(&pVM->pgm.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,PhysHandlerReset)); /**@Todo move out of switch */
832 PPGMRAMRANGE pRam = pgmPhysGetRange(&pVM->pgm.s, GCPhys);
833 Assert(pRam);
834 Assert(pRam->GCPhys <= pCur->Core.Key);
835 Assert(pRam->GCPhysLast >= pCur->Core.KeyLast);
836
837 if (pCur->enmType == PGMPHYSHANDLERTYPE_MMIO)
838 {
839 /*
840 * Reset all the PGMPAGETYPE_MMIO2_ALIAS_MMIO pages first and that's it.
841 * This could probably be optimized a bit wrt to flushing, but I'm too lazy
842 * to do that now...
843 */
844 PPGMPAGE pPage = &pRam->aPages[(pCur->Core.Key - pRam->GCPhys) >> PAGE_SHIFT];
845 uint32_t cLeft = pCur->cPages;
846 while (cLeft-- > 0)
847 {
848 if (PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO)
849 pgmHandlerPhysicalResetAliasedPage(pVM, pPage, pRam->GCPhys + ((RTGCPHYS)(uintptr_t)(pPage - &pRam->aPages[0]) << PAGE_SHIFT));
850 Assert(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO);
851 pPage++;
852 }
853 }
854 else
855 {
856 /*
857 * Set the flags and flush shadow PT entries.
858 */
859 rc = pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(pVM, pCur, pRam);
860 }
861
862 rc = VINF_SUCCESS;
863 break;
864 }
865
866 /*
867 * Invalid.
868 */
869 default:
870 AssertMsgFailed(("Invalid type %d! Corruption!\n", pCur->enmType));
871 rc = VERR_INTERNAL_ERROR;
872 break;
873 }
874 }
875 else
876 {
877 AssertMsgFailed(("Didn't find MMIO Range starting at %#x\n", GCPhys));
878 rc = VERR_PGM_HANDLER_NOT_FOUND;
879 }
880
881 pgmUnlock(pVM);
882 return rc;
883}
884
885
886/**
887 * Temporarily turns off the access monitoring of a page within a monitored
888 * physical write/all page access handler region.
889 *
890 * Use this when no further \#PFs are required for that page. Be aware that
891 * a page directory sync might reset the flags, and turn on access monitoring
892 * for the page.
893 *
894 * The caller must do required page table modifications.
895 *
896 * @returns VBox status code.
897 * @param pVM VM Handle
898 * @param GCPhys The start address of the access handler. This
899 * must be a fully page aligned range or we risk
900 * messing up other handlers installed for the
901 * start and end pages.
902 * @param GCPhysPage The physical address of the page to turn off
903 * access monitoring for.
904 */
905VMMDECL(int) PGMHandlerPhysicalPageTempOff(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage)
906{
907 LogFlow(("PGMHandlerPhysicalPageTempOff GCPhysPage=%RGp\n", GCPhysPage));
908
909 pgmLock(pVM);
910 /*
911 * Validate the range.
912 */
913 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
914 if (RT_LIKELY(pCur))
915 {
916 if (RT_LIKELY( GCPhysPage >= pCur->Core.Key
917 && GCPhysPage <= pCur->Core.KeyLast))
918 {
919 Assert(!(pCur->Core.Key & PAGE_OFFSET_MASK));
920 Assert((pCur->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK);
921
922 AssertReturnStmt( pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_WRITE
923 || pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_ALL,
924 pgmUnlock(pVM), VERR_ACCESS_DENIED);
925
926 /*
927 * Change the page status.
928 */
929 PPGMPAGE pPage;
930 int rc = pgmPhysGetPageEx(&pVM->pgm.s, GCPhysPage, &pPage);
931 AssertReturnStmt(RT_SUCCESS_NP(rc), pgmUnlock(pVM), rc);
932 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
933 pgmUnlock(pVM);
934 return VINF_SUCCESS;
935 }
936 pgmUnlock(pVM);
937 AssertMsgFailed(("The page %#x is outside the range %#x-%#x\n",
938 GCPhysPage, pCur->Core.Key, pCur->Core.KeyLast));
939 return VERR_INVALID_PARAMETER;
940 }
941 pgmUnlock(pVM);
942 AssertMsgFailed(("Specified physical handler start address %#x is invalid.\n", GCPhys));
943 return VERR_PGM_HANDLER_NOT_FOUND;
944}
945
946
947/**
948 * Replaces an MMIO page with an MMIO2 page.
949 *
950 * This is a worker for IOMMMIOMapMMIO2Page that works in a similar way to
951 * PGMHandlerPhysicalPageTempOff but for an MMIO page. Since an MMIO page has no
952 * backing, the caller must provide a replacement page. For various reasons the
953 * replacement page must be an MMIO2 page.
954 *
955 * The caller must do required page table modifications. You can get away
956 * without making any modifations since it's an MMIO page, the cost is an extra
957 * \#PF which will the resync the page.
958 *
959 * Call PGMHandlerPhysicalReset() to restore the MMIO page.
960 *
961 * The caller may still get handler callback even after this call and must be
962 * able to deal correctly with such calls. The reason for these callbacks are
963 * either that we're executing in the recompiler (which doesn't know about this
964 * arrangement) or that we've been restored from saved state (where we won't
965 * save the change).
966 *
967 * @returns VBox status code.
968 * @param pVM The VM handle
969 * @param GCPhys The start address of the access handler. This
970 * must be a fully page aligned range or we risk
971 * messing up other handlers installed for the
972 * start and end pages.
973 * @param GCPhysPage The physical address of the page to turn off
974 * access monitoring for.
975 * @param GCPhysPageRemap The physical address of the MMIO2 page that
976 * serves as backing memory.
977 *
978 * @remark May cause a page pool flush if used on a page that is already
979 * aliased.
980 *
981 * @note This trick does only work reliably if the two pages are never ever
982 * mapped in the same page table. If they are the page pool code will
983 * be confused should either of them be flushed. See the special case
984 * of zero page aliasing mentioned in #3170.
985 *
986 */
987VMMDECL(int) PGMHandlerPhysicalPageAlias(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage, RTGCPHYS GCPhysPageRemap)
988{
989/// Assert(!IOMIsLockOwner(pVM)); /* We mustn't own any other locks when calling this */
990
991 pgmLock(pVM);
992 /*
993 * Lookup and validate the range.
994 */
995 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
996 if (RT_LIKELY(pCur))
997 {
998 if (RT_LIKELY( GCPhysPage >= pCur->Core.Key
999 && GCPhysPage <= pCur->Core.KeyLast))
1000 {
1001 AssertReturnStmt(pCur->enmType == PGMPHYSHANDLERTYPE_MMIO, pgmUnlock(pVM), VERR_ACCESS_DENIED);
1002 AssertReturnStmt(!(pCur->Core.Key & PAGE_OFFSET_MASK), pgmUnlock(pVM), VERR_INVALID_PARAMETER);
1003 AssertReturnStmt((pCur->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK, pgmUnlock(pVM), VERR_INVALID_PARAMETER);
1004
1005 /*
1006 * Get and validate the two pages.
1007 */
1008 PPGMPAGE pPageRemap;
1009 int rc = pgmPhysGetPageEx(&pVM->pgm.s, GCPhysPageRemap, &pPageRemap);
1010 AssertReturnStmt(RT_SUCCESS_NP(rc), pgmUnlock(pVM), rc);
1011 AssertMsgReturnStmt(PGM_PAGE_GET_TYPE(pPageRemap) == PGMPAGETYPE_MMIO2,
1012 ("GCPhysPageRemap=%RGp %R[pgmpage]\n", GCPhysPageRemap, pPageRemap),
1013 pgmUnlock(pVM), VERR_PGM_PHYS_NOT_MMIO2);
1014
1015 PPGMPAGE pPage;
1016 rc = pgmPhysGetPageEx(&pVM->pgm.s, GCPhysPage, &pPage);
1017 AssertReturnStmt(RT_SUCCESS_NP(rc), pgmUnlock(pVM), rc);
1018 if (PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO)
1019 {
1020 AssertMsgReturn(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO,
1021 ("GCPhysPage=%RGp %R[pgmpage]\n", GCPhysPage, pPage),
1022 VERR_PGM_PHYS_NOT_MMIO2);
1023 if (PGM_PAGE_GET_HCPHYS(pPage) == PGM_PAGE_GET_HCPHYS(pPageRemap))
1024 {
1025 pgmUnlock(pVM);
1026 return VINF_PGM_HANDLER_ALREADY_ALIASED;
1027 }
1028
1029 /*
1030 * The page is already mapped as some other page, reset it
1031 * to an MMIO/ZERO page before doing the new mapping.
1032 */
1033 Log(("PGMHandlerPhysicalPageAlias: GCPhysPage=%RGp (%R[pgmpage]; %RHp -> %RHp\n",
1034 GCPhysPage, pPage, PGM_PAGE_GET_HCPHYS(pPage), PGM_PAGE_GET_HCPHYS(pPageRemap)));
1035 pgmHandlerPhysicalResetAliasedPage(pVM, pPage, GCPhysPage);
1036 }
1037 Assert(PGM_PAGE_IS_ZERO(pPage));
1038
1039 /*
1040 * Do the actual remapping here.
1041 * This page now serves as an alias for the backing memory specified.
1042 */
1043 LogFlow(("PGMHandlerPhysicalPageAlias: %RGp (%R[pgmpage]) alias for %RGp (%R[pgmpage])\n",
1044 GCPhysPage, pPage, GCPhysPageRemap, pPageRemap ));
1045 PGM_PAGE_SET_HCPHYS(pPage, PGM_PAGE_GET_HCPHYS(pPageRemap));
1046 PGM_PAGE_SET_TYPE(pPage, PGMPAGETYPE_MMIO2_ALIAS_MMIO);
1047 PGM_PAGE_SET_STATE(pPage, PGM_PAGE_STATE_ALLOCATED);
1048 PGM_PAGE_SET_PAGEID(pPage, PGM_PAGE_GET_PAGEID(pPageRemap));
1049 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
1050
1051 /* Flush its TLB entry. */
1052 PGMPhysInvalidatePageMapTLBEntry(pVM, GCPhysPage);
1053
1054 LogFlow(("PGMHandlerPhysicalPageAlias: => %R[pgmpage]\n", pPage));
1055 pgmUnlock(pVM);
1056 return VINF_SUCCESS;
1057 }
1058
1059 pgmUnlock(pVM);
1060 AssertMsgFailed(("The page %#x is outside the range %#x-%#x\n",
1061 GCPhysPage, pCur->Core.Key, pCur->Core.KeyLast));
1062 return VERR_INVALID_PARAMETER;
1063 }
1064
1065 pgmUnlock(pVM);
1066 AssertMsgFailed(("Specified physical handler start address %#x is invalid.\n", GCPhys));
1067 return VERR_PGM_HANDLER_NOT_FOUND;
1068}
1069
1070/**
1071 * Replaces an MMIO page with an arbitrary HC page.
1072 *
1073 * This is a worker for IOMMMIOMapMMIO2Page that works in a similar way to
1074 * PGMHandlerPhysicalPageTempOff but for an MMIO page. Since an MMIO page has no
1075 * backing, the caller must provide a replacement page. For various reasons the
1076 * replacement page must be an MMIO2 page.
1077 *
1078 * The caller must do required page table modifications. You can get away
1079 * without making any modifations since it's an MMIO page, the cost is an extra
1080 * \#PF which will the resync the page.
1081 *
1082 * Call PGMHandlerPhysicalReset() to restore the MMIO page.
1083 *
1084 * The caller may still get handler callback even after this call and must be
1085 * able to deal correctly with such calls. The reason for these callbacks are
1086 * either that we're executing in the recompiler (which doesn't know about this
1087 * arrangement) or that we've been restored from saved state (where we won't
1088 * save the change).
1089 *
1090 * @returns VBox status code.
1091 * @param pVM The VM handle
1092 * @param GCPhys The start address of the access handler. This
1093 * must be a fully page aligned range or we risk
1094 * messing up other handlers installed for the
1095 * start and end pages.
1096 * @param GCPhysPage The physical address of the page to turn off
1097 * access monitoring for.
1098 * @param HCPhysPageRemap The physical address of the HC page that
1099 * serves as backing memory.
1100 *
1101 * @remark May cause a page pool flush if used on a page that is already
1102 * aliased.
1103 */
1104VMMDECL(int) PGMHandlerPhysicalPageAliasHC(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage, RTHCPHYS HCPhysPageRemap)
1105{
1106/// Assert(!IOMIsLockOwner(pVM)); /* We mustn't own any other locks when calling this */
1107
1108 /*
1109 * Lookup and validate the range.
1110 */
1111 pgmLock(pVM);
1112 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
1113 if (RT_LIKELY(pCur))
1114 {
1115 if (RT_LIKELY( GCPhysPage >= pCur->Core.Key
1116 && GCPhysPage <= pCur->Core.KeyLast))
1117 {
1118 AssertReturnStmt(pCur->enmType == PGMPHYSHANDLERTYPE_MMIO, pgmUnlock(pVM), VERR_ACCESS_DENIED);
1119 AssertReturnStmt(!(pCur->Core.Key & PAGE_OFFSET_MASK), pgmUnlock(pVM), VERR_INVALID_PARAMETER);
1120 AssertReturnStmt((pCur->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK, pgmUnlock(pVM), VERR_INVALID_PARAMETER);
1121
1122 /*
1123 * Get and validate the pages.
1124 */
1125 PPGMPAGE pPage;
1126 int rc = pgmPhysGetPageEx(&pVM->pgm.s, GCPhysPage, &pPage);
1127 AssertReturnStmt(RT_SUCCESS_NP(rc), pgmUnlock(pVM), rc);
1128 if (PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO)
1129 {
1130 pgmUnlock(pVM);
1131 AssertMsgReturn(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO,
1132 ("GCPhysPage=%RGp %R[pgmpage]\n", GCPhysPage, pPage),
1133 VERR_PGM_PHYS_NOT_MMIO2);
1134 return VINF_PGM_HANDLER_ALREADY_ALIASED;
1135 }
1136 Assert(PGM_PAGE_IS_ZERO(pPage));
1137
1138 /*
1139 * Do the actual remapping here.
1140 * This page now serves as an alias for the backing memory specified.
1141 */
1142 LogFlow(("PGMHandlerPhysicalPageAlias: %RGp (%R[pgmpage]) alias for %RHp\n",
1143 GCPhysPage, pPage, HCPhysPageRemap));
1144 PGM_PAGE_SET_HCPHYS(pPage, HCPhysPageRemap);
1145 PGM_PAGE_SET_TYPE(pPage, PGMPAGETYPE_MMIO2_ALIAS_MMIO);
1146 PGM_PAGE_SET_STATE(pPage, PGM_PAGE_STATE_ALLOCATED);
1147 /** @todo hack alert
1148 * This needs to be done properly. Currently we get away with it as the recompiler directly calls
1149 * IOM read and write functions. Access through PGMPhysRead/Write will crash the process.
1150 */
1151 PGM_PAGE_SET_PAGEID(pPage, NIL_GMM_PAGEID);
1152 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
1153
1154 /* Flush its TLB entry. */
1155 PGMPhysInvalidatePageMapTLBEntry(pVM, GCPhysPage);
1156 LogFlow(("PGMHandlerPhysicalPageAliasHC: => %R[pgmpage]\n", pPage));
1157 pgmUnlock(pVM);
1158 return VINF_SUCCESS;
1159 }
1160 pgmUnlock(pVM);
1161 AssertMsgFailed(("The page %#x is outside the range %#x-%#x\n",
1162 GCPhysPage, pCur->Core.Key, pCur->Core.KeyLast));
1163 return VERR_INVALID_PARAMETER;
1164 }
1165 pgmUnlock(pVM);
1166
1167 AssertMsgFailed(("Specified physical handler start address %#x is invalid.\n", GCPhys));
1168 return VERR_PGM_HANDLER_NOT_FOUND;
1169}
1170
1171
1172/**
1173 * Checks if a physical range is handled
1174 *
1175 * @returns boolean
1176 * @param pVM VM Handle.
1177 * @param GCPhys Start physical address earlier passed to PGMR3HandlerPhysicalRegister().
1178 * @remarks Caller must take the PGM lock...
1179 * @thread EMT.
1180 */
1181VMMDECL(bool) PGMHandlerPhysicalIsRegistered(PVM pVM, RTGCPHYS GCPhys)
1182{
1183 /*
1184 * Find the handler.
1185 */
1186 pgmLock(pVM);
1187 PPGMPHYSHANDLER pCur = pgmHandlerPhysicalLookup(pVM, GCPhys);
1188 if (pCur)
1189 {
1190 Assert(GCPhys >= pCur->Core.Key && GCPhys <= pCur->Core.KeyLast);
1191 Assert( pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_WRITE
1192 || pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_ALL
1193 || pCur->enmType == PGMPHYSHANDLERTYPE_MMIO);
1194 pgmUnlock(pVM);
1195 return true;
1196 }
1197 pgmUnlock(pVM);
1198 return false;
1199}
1200
1201
1202/**
1203 * Checks if it's an disabled all access handler or write access handler at the
1204 * given address.
1205 *
1206 * @returns true if it's an all access handler, false if it's a write access
1207 * handler.
1208 * @param pVM Pointer to the shared VM structure.
1209 * @param GCPhys The address of the page with a disabled handler.
1210 *
1211 * @remarks The caller, PGMR3PhysTlbGCPhys2Ptr, must hold the PGM lock.
1212 */
1213bool pgmHandlerPhysicalIsAll(PVM pVM, RTGCPHYS GCPhys)
1214{
1215 pgmLock(pVM);
1216 PPGMPHYSHANDLER pCur = pgmHandlerPhysicalLookup(pVM, GCPhys);
1217 if (!pCur)
1218 {
1219 pgmUnlock(pVM);
1220 AssertFailed();
1221 return true;
1222 }
1223 Assert( pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_WRITE
1224 || pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_ALL
1225 || pCur->enmType == PGMPHYSHANDLERTYPE_MMIO); /* sanity */
1226 /* Only whole pages can be disabled. */
1227 Assert( pCur->Core.Key <= (GCPhys & ~(RTGCPHYS)PAGE_OFFSET_MASK)
1228 && pCur->Core.KeyLast >= (GCPhys | PAGE_OFFSET_MASK));
1229
1230 bool bRet = pCur->enmType != PGMPHYSHANDLERTYPE_PHYSICAL_WRITE;
1231 pgmUnlock(pVM);
1232 return bRet;
1233}
1234
1235
1236/**
1237 * Check if particular guest's VA is being monitored.
1238 *
1239 * @returns true or false
1240 * @param pVM VM handle.
1241 * @param GCPtr Virtual address.
1242 * @remarks Will acquire the PGM lock.
1243 * @thread Any.
1244 */
1245VMMDECL(bool) PGMHandlerVirtualIsRegistered(PVM pVM, RTGCPTR GCPtr)
1246{
1247 pgmLock(pVM);
1248 PPGMVIRTHANDLER pCur = (PPGMVIRTHANDLER)RTAvlroGCPtrGet(&pVM->pgm.s.CTX_SUFF(pTrees)->VirtHandlers, GCPtr);
1249 pgmUnlock(pVM);
1250
1251 return pCur != NULL;
1252}
1253
1254
1255/**
1256 * Search for virtual handler with matching physical address
1257 *
1258 * @returns VBox status code
1259 * @param pVM The VM handle.
1260 * @param GCPhys GC physical address to search for.
1261 * @param ppVirt Where to store the pointer to the virtual handler structure.
1262 * @param piPage Where to store the pointer to the index of the cached physical page.
1263 */
1264int pgmHandlerVirtualFindByPhysAddr(PVM pVM, RTGCPHYS GCPhys, PPGMVIRTHANDLER *ppVirt, unsigned *piPage)
1265{
1266 STAM_PROFILE_START(&pVM->pgm.s.CTX_MID_Z(Stat,VirtHandlerSearchByPhys), a);
1267 Assert(ppVirt);
1268
1269 pgmLock(pVM);
1270 PPGMPHYS2VIRTHANDLER pCur;
1271 pCur = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers, GCPhys);
1272 if (pCur)
1273 {
1274 /* found a match! */
1275 *ppVirt = (PPGMVIRTHANDLER)((uintptr_t)pCur + pCur->offVirtHandler);
1276 *piPage = pCur - &(*ppVirt)->aPhysToVirt[0];
1277 pgmUnlock(pVM);
1278
1279#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
1280 AssertRelease(pCur->offNextAlias & PGMPHYS2VIRTHANDLER_IS_HEAD);
1281#endif
1282 LogFlow(("PHYS2VIRT: found match for %RGp -> %RGv *piPage=%#x\n", GCPhys, (*ppVirt)->Core.Key, *piPage));
1283 STAM_PROFILE_STOP(&pVM->pgm.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,VirtHandlerSearchByPhys), a);
1284 return VINF_SUCCESS;
1285 }
1286
1287 pgmUnlock(pVM);
1288 *ppVirt = NULL;
1289 STAM_PROFILE_STOP(&pVM->pgm.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,VirtHandlerSearchByPhys), a);
1290 return VERR_PGM_HANDLER_NOT_FOUND;
1291}
1292
1293
1294/**
1295 * Deal with aliases in phys2virt.
1296 *
1297 * As pointed out by the various todos, this currently only deals with
1298 * aliases where the two ranges match 100%.
1299 *
1300 * @param pVM The VM handle.
1301 * @param pPhys2Virt The node we failed insert.
1302 */
1303static void pgmHandlerVirtualInsertAliased(PVM pVM, PPGMPHYS2VIRTHANDLER pPhys2Virt)
1304{
1305 /*
1306 * First find the node which is conflicting with us.
1307 */
1308 /** @todo Deal with partial overlapping. (Unlikly situation, so I'm too lazy to do anything about it now.) */
1309 /** @todo check if the current head node covers the ground we do. This is highly unlikely
1310 * and I'm too lazy to implement this now as it will require sorting the list and stuff like that. */
1311 PPGMPHYS2VIRTHANDLER pHead = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers, pPhys2Virt->Core.Key);
1312#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
1313 AssertReleaseMsg(pHead != pPhys2Virt, ("%RGp-%RGp offVirtHandler=%#RX32\n",
1314 pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler));
1315#endif
1316 if (RT_UNLIKELY(!pHead || pHead->Core.KeyLast != pPhys2Virt->Core.KeyLast))
1317 {
1318 /** @todo do something clever here... */
1319 LogRel(("pgmHandlerVirtualInsertAliased: %RGp-%RGp\n", pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast));
1320 pPhys2Virt->offNextAlias = 0;
1321 return;
1322 }
1323
1324 /*
1325 * Insert ourselves as the next node.
1326 */
1327 if (!(pHead->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK))
1328 pPhys2Virt->offNextAlias = PGMPHYS2VIRTHANDLER_IN_TREE;
1329 else
1330 {
1331 PPGMPHYS2VIRTHANDLER pNext = (PPGMPHYS2VIRTHANDLER)((intptr_t)pHead + (pHead->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK));
1332 pPhys2Virt->offNextAlias = ((intptr_t)pNext - (intptr_t)pPhys2Virt)
1333 | PGMPHYS2VIRTHANDLER_IN_TREE;
1334 }
1335 pHead->offNextAlias = ((intptr_t)pPhys2Virt - (intptr_t)pHead)
1336 | (pHead->offNextAlias & ~PGMPHYS2VIRTHANDLER_OFF_MASK);
1337 Log(("pgmHandlerVirtualInsertAliased: %RGp-%RGp offNextAlias=%#RX32\n", pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offNextAlias));
1338}
1339
1340
1341/**
1342 * Resets one virtual handler range.
1343 *
1344 * This is called by HandlerVirtualUpdate when it has detected some kind of
1345 * problem and have started clearing the virtual handler page states (or
1346 * when there have been registration/deregistrations). For this reason this
1347 * function will only update the page status if it's lower than desired.
1348 *
1349 * @returns 0
1350 * @param pNode Pointer to a PGMVIRTHANDLER.
1351 * @param pvUser The VM handle.
1352 */
1353DECLCALLBACK(int) pgmHandlerVirtualResetOne(PAVLROGCPTRNODECORE pNode, void *pvUser)
1354{
1355 PPGMVIRTHANDLER pCur = (PPGMVIRTHANDLER)pNode;
1356 PVM pVM = (PVM)pvUser;
1357
1358 Assert(PGMIsLockOwner(pVM));
1359 /*
1360 * Iterate the pages and apply the new state.
1361 */
1362 unsigned uState = pgmHandlerVirtualCalcState(pCur);
1363 PPGMRAMRANGE pRamHint = NULL;
1364 RTGCUINTPTR offPage = ((RTGCUINTPTR)pCur->Core.Key & PAGE_OFFSET_MASK);
1365 RTGCUINTPTR cbLeft = pCur->cb;
1366 for (unsigned iPage = 0; iPage < pCur->cPages; iPage++)
1367 {
1368 PPGMPHYS2VIRTHANDLER pPhys2Virt = &pCur->aPhysToVirt[iPage];
1369 if (pPhys2Virt->Core.Key != NIL_RTGCPHYS)
1370 {
1371 /*
1372 * Update the page state wrt virtual handlers.
1373 */
1374 PPGMPAGE pPage;
1375 int rc = pgmPhysGetPageWithHintEx(&pVM->pgm.s, pPhys2Virt->Core.Key, &pPage, &pRamHint);
1376 if ( RT_SUCCESS(rc)
1377 && PGM_PAGE_GET_HNDL_VIRT_STATE(pPage) < uState)
1378 PGM_PAGE_SET_HNDL_VIRT_STATE(pPage, uState);
1379 else
1380 AssertRC(rc);
1381
1382 /*
1383 * Need to insert the page in the Phys2Virt lookup tree?
1384 */
1385 if (pPhys2Virt->Core.KeyLast == NIL_RTGCPHYS)
1386 {
1387#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
1388 AssertRelease(!pPhys2Virt->offNextAlias);
1389#endif
1390 unsigned cbPhys = cbLeft;
1391 if (cbPhys > PAGE_SIZE - offPage)
1392 cbPhys = PAGE_SIZE - offPage;
1393 else
1394 Assert(iPage == pCur->cPages - 1);
1395 pPhys2Virt->Core.KeyLast = pPhys2Virt->Core.Key + cbPhys - 1; /* inclusive */
1396 pPhys2Virt->offNextAlias = PGMPHYS2VIRTHANDLER_IS_HEAD | PGMPHYS2VIRTHANDLER_IN_TREE;
1397 if (!RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers, &pPhys2Virt->Core))
1398 pgmHandlerVirtualInsertAliased(pVM, pPhys2Virt);
1399#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
1400 else
1401 AssertReleaseMsg(RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers, pPhys2Virt->Core.Key) == &pPhys2Virt->Core,
1402 ("%RGp-%RGp offNextAlias=%#RX32\n",
1403 pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offNextAlias));
1404#endif
1405 Log2(("PHYS2VIRT: Insert physical range %RGp-%RGp offNextAlias=%#RX32 %s\n",
1406 pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offNextAlias, R3STRING(pCur->pszDesc)));
1407 }
1408 }
1409 cbLeft -= PAGE_SIZE - offPage;
1410 offPage = 0;
1411 }
1412
1413 return 0;
1414}
1415
1416#if defined(VBOX_STRICT) || defined(LOG_ENABLED)
1417
1418/**
1419 * Worker for pgmHandlerVirtualDumpPhysPages.
1420 *
1421 * @returns 0 (continue enumeration).
1422 * @param pNode The virtual handler node.
1423 * @param pvUser User argument, unused.
1424 */
1425static DECLCALLBACK(int) pgmHandlerVirtualDumpPhysPagesCallback(PAVLROGCPHYSNODECORE pNode, void *pvUser)
1426{
1427 PPGMPHYS2VIRTHANDLER pCur = (PPGMPHYS2VIRTHANDLER)pNode;
1428 PPGMVIRTHANDLER pVirt = (PPGMVIRTHANDLER)((uintptr_t)pCur + pCur->offVirtHandler);
1429 Log(("PHYS2VIRT: Range %RGp-%RGp for virtual handler: %s\n", pCur->Core.Key, pCur->Core.KeyLast, pVirt->pszDesc));
1430 return 0;
1431}
1432
1433
1434/**
1435 * Assertion / logging helper for dumping all the
1436 * virtual handlers to the log.
1437 *
1438 * @param pVM Pointer to the shared VM structure.
1439 */
1440void pgmHandlerVirtualDumpPhysPages(PVM pVM)
1441{
1442 RTAvlroGCPhysDoWithAll(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers, true /* from left */,
1443 pgmHandlerVirtualDumpPhysPagesCallback, 0);
1444}
1445
1446#endif /* VBOX_STRICT || LOG_ENABLED */
1447#ifdef VBOX_STRICT
1448
1449/**
1450 * State structure used by the PGMAssertHandlerAndFlagsInSync() function
1451 * and its AVL enumerators.
1452 */
1453typedef struct PGMAHAFIS
1454{
1455 /** The current physical address. */
1456 RTGCPHYS GCPhys;
1457 /** The state we've calculated. */
1458 unsigned uVirtStateFound;
1459 /** The state we're matching up to. */
1460 unsigned uVirtState;
1461 /** Number of errors. */
1462 unsigned cErrors;
1463 /** The VM handle. */
1464 PVM pVM;
1465} PGMAHAFIS, *PPGMAHAFIS;
1466
1467
1468#if 0 /* unused */
1469/**
1470 * Verify virtual handler by matching physical address.
1471 *
1472 * @returns 0
1473 * @param pNode Pointer to a PGMVIRTHANDLER.
1474 * @param pvUser Pointer to user parameter.
1475 */
1476static DECLCALLBACK(int) pgmHandlerVirtualVerifyOneByPhysAddr(PAVLROGCPTRNODECORE pNode, void *pvUser)
1477{
1478 PPGMVIRTHANDLER pCur = (PPGMVIRTHANDLER)pNode;
1479 PPGMAHAFIS pState = (PPGMAHAFIS)pvUser;
1480
1481 for (unsigned iPage = 0; iPage < pCur->cPages; iPage++)
1482 {
1483 if ((pCur->aPhysToVirt[iPage].Core.Key & X86_PTE_PAE_PG_MASK_FULL) == pState->GCPhys)
1484 {
1485 unsigned uState = pgmHandlerVirtualCalcState(pCur);
1486 if (pState->uVirtState < uState)
1487 {
1488 error
1489 }
1490
1491 if (pState->uVirtState == uState)
1492 break; //??
1493 }
1494 }
1495 return 0;
1496}
1497#endif /* unused */
1498
1499
1500/**
1501 * Verify a virtual handler (enumeration callback).
1502 *
1503 * Called by PGMAssertHandlerAndFlagsInSync to check the sanity of all
1504 * the virtual handlers, esp. that the physical addresses matches up.
1505 *
1506 * @returns 0
1507 * @param pNode Pointer to a PGMVIRTHANDLER.
1508 * @param pvUser Pointer to a PPGMAHAFIS structure.
1509 */
1510static DECLCALLBACK(int) pgmHandlerVirtualVerifyOne(PAVLROGCPTRNODECORE pNode, void *pvUser)
1511{
1512 PPGMVIRTHANDLER pVirt = (PPGMVIRTHANDLER)pNode;
1513 PPGMAHAFIS pState = (PPGMAHAFIS)pvUser;
1514 PVM pVM = pState->pVM;
1515
1516 /*
1517 * Validate the type and calc state.
1518 */
1519 switch (pVirt->enmType)
1520 {
1521 case PGMVIRTHANDLERTYPE_WRITE:
1522 case PGMVIRTHANDLERTYPE_ALL:
1523 break;
1524 default:
1525 AssertMsgFailed(("unknown/wrong enmType=%d\n", pVirt->enmType));
1526 pState->cErrors++;
1527 return 0;
1528 }
1529 const unsigned uState = pgmHandlerVirtualCalcState(pVirt);
1530
1531 /*
1532 * Check key alignment.
1533 */
1534 if ( (pVirt->aPhysToVirt[0].Core.Key & PAGE_OFFSET_MASK) != ((RTGCUINTPTR)pVirt->Core.Key & PAGE_OFFSET_MASK)
1535 && pVirt->aPhysToVirt[0].Core.Key != NIL_RTGCPHYS)
1536 {
1537 AssertMsgFailed(("virt handler phys has incorrect key! %RGp %RGv %s\n",
1538 pVirt->aPhysToVirt[0].Core.Key, pVirt->Core.Key, R3STRING(pVirt->pszDesc)));
1539 pState->cErrors++;
1540 }
1541
1542 if ( (pVirt->aPhysToVirt[pVirt->cPages - 1].Core.KeyLast & PAGE_OFFSET_MASK) != ((RTGCUINTPTR)pVirt->Core.KeyLast & PAGE_OFFSET_MASK)
1543 && pVirt->aPhysToVirt[pVirt->cPages - 1].Core.Key != NIL_RTGCPHYS)
1544 {
1545 AssertMsgFailed(("virt handler phys has incorrect key! %RGp %RGv %s\n",
1546 pVirt->aPhysToVirt[pVirt->cPages - 1].Core.KeyLast, pVirt->Core.KeyLast, R3STRING(pVirt->pszDesc)));
1547 pState->cErrors++;
1548 }
1549
1550 /*
1551 * Check pages for sanity and state.
1552 */
1553 RTGCUINTPTR GCPtr = (RTGCUINTPTR)pVirt->Core.Key;
1554 for (unsigned iPage = 0; iPage < pVirt->cPages; iPage++, GCPtr += PAGE_SIZE)
1555 {
1556 for (VMCPUID i = 0; i < pVM->cCpus; i++)
1557 {
1558 PVMCPU pVCpu = &pVM->aCpus[i];
1559
1560 RTGCPHYS GCPhysGst;
1561 uint64_t fGst;
1562 int rc = PGMGstGetPage(pVCpu, (RTGCPTR)GCPtr, &fGst, &GCPhysGst);
1563 if ( rc == VERR_PAGE_NOT_PRESENT
1564 || rc == VERR_PAGE_TABLE_NOT_PRESENT)
1565 {
1566 if (pVirt->aPhysToVirt[iPage].Core.Key != NIL_RTGCPHYS)
1567 {
1568 AssertMsgFailed(("virt handler phys out of sync. %RGp GCPhysNew=~0 iPage=%#x %RGv %s\n",
1569 pVirt->aPhysToVirt[iPage].Core.Key, iPage, GCPtr, R3STRING(pVirt->pszDesc)));
1570 pState->cErrors++;
1571 }
1572 continue;
1573 }
1574
1575 AssertRCReturn(rc, 0);
1576 if ((pVirt->aPhysToVirt[iPage].Core.Key & X86_PTE_PAE_PG_MASK_FULL) != GCPhysGst)
1577 {
1578 AssertMsgFailed(("virt handler phys out of sync. %RGp GCPhysGst=%RGp iPage=%#x %RGv %s\n",
1579 pVirt->aPhysToVirt[iPage].Core.Key, GCPhysGst, iPage, GCPtr, R3STRING(pVirt->pszDesc)));
1580 pState->cErrors++;
1581 continue;
1582 }
1583
1584 PPGMPAGE pPage = pgmPhysGetPage(&pVM->pgm.s, GCPhysGst);
1585 if (!pPage)
1586 {
1587 AssertMsgFailed(("virt handler getting ram flags. GCPhysGst=%RGp iPage=%#x %RGv %s\n",
1588 GCPhysGst, iPage, GCPtr, R3STRING(pVirt->pszDesc)));
1589 pState->cErrors++;
1590 continue;
1591 }
1592
1593 if (PGM_PAGE_GET_HNDL_VIRT_STATE(pPage) < uState)
1594 {
1595 AssertMsgFailed(("virt handler state mismatch. pPage=%R[pgmpage] GCPhysGst=%RGp iPage=%#x %RGv state=%d expected>=%d %s\n",
1596 pPage, GCPhysGst, iPage, GCPtr, PGM_PAGE_GET_HNDL_VIRT_STATE(pPage), uState, R3STRING(pVirt->pszDesc)));
1597 pState->cErrors++;
1598 continue;
1599 }
1600 } /* for each VCPU */
1601 } /* for pages in virtual mapping. */
1602
1603 return 0;
1604}
1605
1606
1607/**
1608 * Asserts that the handlers+guest-page-tables == ramrange-flags and
1609 * that the physical addresses associated with virtual handlers are correct.
1610 *
1611 * @returns Number of mismatches.
1612 * @param pVM The VM handle.
1613 */
1614VMMDECL(unsigned) PGMAssertHandlerAndFlagsInSync(PVM pVM)
1615{
1616 PPGM pPGM = &pVM->pgm.s;
1617 PGMAHAFIS State;
1618 State.GCPhys = 0;
1619 State.uVirtState = 0;
1620 State.uVirtStateFound = 0;
1621 State.cErrors = 0;
1622 State.pVM = pVM;
1623
1624 Assert(PGMIsLockOwner(pVM));
1625
1626 /*
1627 * Check the RAM flags against the handlers.
1628 */
1629 for (PPGMRAMRANGE pRam = pPGM->CTX_SUFF(pRamRanges); pRam; pRam = pRam->CTX_SUFF(pNext))
1630 {
1631 const unsigned cPages = pRam->cb >> PAGE_SHIFT;
1632 for (unsigned iPage = 0; iPage < cPages; iPage++)
1633 {
1634 PGMPAGE const *pPage = &pRam->aPages[iPage];
1635 if (PGM_PAGE_HAS_ANY_HANDLERS(pPage))
1636 {
1637 State.GCPhys = pRam->GCPhys + (iPage << PAGE_SHIFT);
1638
1639 /*
1640 * Physical first - calculate the state based on the handlers
1641 * active on the page, then compare.
1642 */
1643 if (PGM_PAGE_HAS_ANY_PHYSICAL_HANDLERS(pPage))
1644 {
1645 /* the first */
1646 PPGMPHYSHANDLER pPhys = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pPGM->CTX_SUFF(pTrees)->PhysHandlers, State.GCPhys);
1647 if (!pPhys)
1648 {
1649 pPhys = (PPGMPHYSHANDLER)RTAvlroGCPhysGetBestFit(&pPGM->CTX_SUFF(pTrees)->PhysHandlers, State.GCPhys, true);
1650 if ( pPhys
1651 && pPhys->Core.Key > (State.GCPhys + PAGE_SIZE - 1))
1652 pPhys = NULL;
1653 Assert(!pPhys || pPhys->Core.Key >= State.GCPhys);
1654 }
1655 if (pPhys)
1656 {
1657 unsigned uState = pgmHandlerPhysicalCalcState(pPhys);
1658
1659 /* more? */
1660 while (pPhys->Core.KeyLast < (State.GCPhys | PAGE_OFFSET_MASK))
1661 {
1662 PPGMPHYSHANDLER pPhys2 = (PPGMPHYSHANDLER)RTAvlroGCPhysGetBestFit(&pPGM->CTX_SUFF(pTrees)->PhysHandlers,
1663 pPhys->Core.KeyLast + 1, true);
1664 if ( !pPhys2
1665 || pPhys2->Core.Key > (State.GCPhys | PAGE_OFFSET_MASK))
1666 break;
1667 unsigned uState2 = pgmHandlerPhysicalCalcState(pPhys2);
1668 uState = RT_MAX(uState, uState2);
1669 pPhys = pPhys2;
1670 }
1671
1672 /* compare.*/
1673 if ( PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != uState
1674 && PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != PGM_PAGE_HNDL_PHYS_STATE_DISABLED)
1675 {
1676 AssertMsgFailed(("ram range vs phys handler flags mismatch. GCPhys=%RGp state=%d expected=%d %s\n",
1677 State.GCPhys, PGM_PAGE_GET_HNDL_PHYS_STATE(pPage), uState, pPhys->pszDesc));
1678 State.cErrors++;
1679 }
1680
1681#ifdef IN_RING3
1682 /* validate that REM is handling it. */
1683 if ( !REMR3IsPageAccessHandled(pVM, State.GCPhys)
1684 /* ignore shadowed ROM for the time being. */
1685 && PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_ROM_SHADOW)
1686 {
1687 AssertMsgFailed(("ram range vs phys handler REM mismatch. GCPhys=%RGp state=%d %s\n",
1688 State.GCPhys, PGM_PAGE_GET_HNDL_PHYS_STATE(pPage), pPhys->pszDesc));
1689 State.cErrors++;
1690 }
1691#endif
1692 }
1693 else
1694 {
1695 AssertMsgFailed(("ram range vs phys handler mismatch. no handler for GCPhys=%RGp\n", State.GCPhys));
1696 State.cErrors++;
1697 }
1698 }
1699
1700 /*
1701 * Virtual handlers.
1702 */
1703 if (PGM_PAGE_HAS_ACTIVE_VIRTUAL_HANDLERS(pPage))
1704 {
1705 State.uVirtState = PGM_PAGE_GET_HNDL_VIRT_STATE(pPage);
1706#if 1
1707 /* locate all the matching physical ranges. */
1708 State.uVirtStateFound = PGM_PAGE_HNDL_VIRT_STATE_NONE;
1709 RTGCPHYS GCPhysKey = State.GCPhys;
1710 for (;;)
1711 {
1712 PPGMPHYS2VIRTHANDLER pPhys2Virt = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysGetBestFit(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers,
1713 GCPhysKey, true /* above-or-equal */);
1714 if ( !pPhys2Virt
1715 || (pPhys2Virt->Core.Key & X86_PTE_PAE_PG_MASK_FULL) != State.GCPhys)
1716 break;
1717
1718 /* the head */
1719 GCPhysKey = pPhys2Virt->Core.KeyLast;
1720 PPGMVIRTHANDLER pCur = (PPGMVIRTHANDLER)((uintptr_t)pPhys2Virt + pPhys2Virt->offVirtHandler);
1721 unsigned uState = pgmHandlerVirtualCalcState(pCur);
1722 State.uVirtStateFound = RT_MAX(State.uVirtStateFound, uState);
1723
1724 /* any aliases */
1725 while (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK)
1726 {
1727 pPhys2Virt = (PPGMPHYS2VIRTHANDLER)((uintptr_t)pPhys2Virt + (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK));
1728 pCur = (PPGMVIRTHANDLER)((uintptr_t)pPhys2Virt + pPhys2Virt->offVirtHandler);
1729 uState = pgmHandlerVirtualCalcState(pCur);
1730 State.uVirtStateFound = RT_MAX(State.uVirtStateFound, uState);
1731 }
1732
1733 /* done? */
1734 if ((GCPhysKey & X86_PTE_PAE_PG_MASK_FULL) != State.GCPhys)
1735 break;
1736 }
1737#else
1738 /* very slow */
1739 RTAvlroGCPtrDoWithAll(&pVM->pgm.s.CTX_SUFF(pTrees)->VirtHandlers, true, pgmHandlerVirtualVerifyOneByPhysAddr, &State);
1740#endif
1741 if (State.uVirtState != State.uVirtStateFound)
1742 {
1743 AssertMsgFailed(("ram range vs virt handler flags mismatch. GCPhys=%RGp uVirtState=%#x uVirtStateFound=%#x\n",
1744 State.GCPhys, State.uVirtState, State.uVirtStateFound));
1745 State.cErrors++;
1746 }
1747 }
1748 }
1749 } /* foreach page in ram range. */
1750 } /* foreach ram range. */
1751
1752 /*
1753 * Check that the physical addresses of the virtual handlers matches up
1754 * and that they are otherwise sane.
1755 */
1756 RTAvlroGCPtrDoWithAll(&pVM->pgm.s.CTX_SUFF(pTrees)->VirtHandlers, true, pgmHandlerVirtualVerifyOne, &State);
1757
1758 /*
1759 * Do the reverse check for physical handlers.
1760 */
1761 /** @todo */
1762
1763 return State.cErrors;
1764}
1765
1766#endif /* VBOX_STRICT */
1767
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