VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMAll/PGMAllHandler.cpp@ 30045

Last change on this file since 30045 was 29250, checked in by vboxsync, 15 years ago

iprt/asm*.h: split out asm-math.h, don't include asm-*.h from asm.h, don't include asm.h from sup.h. Fixed a couple file headers.
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1/* $Id: PGMAllHandler.cpp 29250 2010-05-09 17:53:58Z vboxsync $ */
2/** @file
3 * PGM - Page Manager / Monitor, Access Handlers.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*******************************************************************************
20* Header Files *
21*******************************************************************************/
22#define LOG_GROUP LOG_GROUP_PGM
23#include <VBox/dbgf.h>
24#include <VBox/pgm.h>
25#include <VBox/iom.h>
26#include <VBox/mm.h>
27#include <VBox/em.h>
28#include <VBox/stam.h>
29#include <VBox/rem.h>
30#include <VBox/dbgf.h>
31#include <VBox/rem.h>
32#include "../PGMInternal.h"
33#include <VBox/vm.h>
34#include "../PGMInline.h"
35
36#include <VBox/log.h>
37#include <iprt/assert.h>
38#include <iprt/asm-amd64-x86.h>
39#include <iprt/string.h>
40#include <VBox/param.h>
41#include <VBox/err.h>
42#include <VBox/selm.h>
43
44
45/*******************************************************************************
46* Internal Functions *
47*******************************************************************************/
48static int pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(PVM pVM, PPGMPHYSHANDLER pCur, PPGMRAMRANGE pRam);
49static void pgmHandlerPhysicalDeregisterNotifyREM(PVM pVM, PPGMPHYSHANDLER pCur);
50static void pgmHandlerPhysicalResetRamFlags(PVM pVM, PPGMPHYSHANDLER pCur);
51
52
53
54/**
55 * Register a access handler for a physical range.
56 *
57 * @returns VBox status code.
58 * @retval VINF_SUCCESS when successfully installed.
59 * @retval VINF_PGM_GCPHYS_ALIASED when the shadow PTs could be updated because
60 * the guest page aliased or/and mapped by multiple PTs. A CR3 sync has been
61 * flagged together with a pool clearing.
62 * @retval VERR_PGM_HANDLER_PHYSICAL_CONFLICT if the range conflicts with an existing
63 * one. A debug assertion is raised.
64 *
65 * @param pVM VM Handle.
66 * @param enmType Handler type. Any of the PGMPHYSHANDLERTYPE_PHYSICAL* enums.
67 * @param GCPhys Start physical address.
68 * @param GCPhysLast Last physical address. (inclusive)
69 * @param pfnHandlerR3 The R3 handler.
70 * @param pvUserR3 User argument to the R3 handler.
71 * @param pfnHandlerR0 The R0 handler.
72 * @param pvUserR0 User argument to the R0 handler.
73 * @param pfnHandlerRC The RC handler.
74 * @param pvUserRC User argument to the RC handler. This can be a value
75 * less that 0x10000 or a (non-null) pointer that is
76 * automatically relocatated.
77 * @param pszDesc Pointer to description string. This must not be freed.
78 */
79VMMDECL(int) PGMHandlerPhysicalRegisterEx(PVM pVM, PGMPHYSHANDLERTYPE enmType, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast,
80 R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3, RTR3PTR pvUserR3,
81 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0, RTR0PTR pvUserR0,
82 RCPTRTYPE(PFNPGMRCPHYSHANDLER) pfnHandlerRC, RTRCPTR pvUserRC,
83 R3PTRTYPE(const char *) pszDesc)
84{
85 Log(("PGMHandlerPhysicalRegisterEx: enmType=%d GCPhys=%RGp GCPhysLast=%RGp pfnHandlerR3=%RHv pvUserR3=%RHv pfnHandlerR0=%RHv pvUserR0=%RHv pfnHandlerGC=%RRv pvUserGC=%RRv pszDesc=%s\n",
86 enmType, GCPhys, GCPhysLast, pfnHandlerR3, pvUserR3, pfnHandlerR0, pvUserR0, pfnHandlerRC, pvUserRC, R3STRING(pszDesc)));
87
88 /*
89 * Validate input.
90 */
91 AssertMsgReturn(GCPhys < GCPhysLast, ("GCPhys >= GCPhysLast (%#x >= %#x)\n", GCPhys, GCPhysLast), VERR_INVALID_PARAMETER);
92 switch (enmType)
93 {
94 case PGMPHYSHANDLERTYPE_PHYSICAL_WRITE:
95 break;
96 case PGMPHYSHANDLERTYPE_MMIO:
97 case PGMPHYSHANDLERTYPE_PHYSICAL_ALL:
98 /* Simplification in PGMPhysRead among other places. */
99 AssertMsgReturn(!(GCPhys & PAGE_OFFSET_MASK), ("%RGp\n", GCPhys), VERR_INVALID_PARAMETER);
100 AssertMsgReturn((GCPhysLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK, ("%RGp\n", GCPhysLast), VERR_INVALID_PARAMETER);
101 break;
102 default:
103 AssertMsgFailed(("Invalid input enmType=%d!\n", enmType));
104 return VERR_INVALID_PARAMETER;
105 }
106 AssertMsgReturn( (RTRCUINTPTR)pvUserRC < 0x10000
107 || MMHyperR3ToRC(pVM, MMHyperRCToR3(pVM, pvUserRC)) == pvUserRC,
108 ("Not RC pointer! pvUserRC=%RRv\n", pvUserRC),
109 VERR_INVALID_PARAMETER);
110 AssertMsgReturn( (RTR0UINTPTR)pvUserR0 < 0x10000
111 || MMHyperR3ToR0(pVM, MMHyperR0ToR3(pVM, pvUserR0)) == pvUserR0,
112 ("Not R0 pointer! pvUserR0=%RHv\n", pvUserR0),
113 VERR_INVALID_PARAMETER);
114 AssertPtrReturn(pfnHandlerR3, VERR_INVALID_POINTER);
115 AssertReturn(pfnHandlerR0, VERR_INVALID_PARAMETER);
116 AssertReturn(pfnHandlerRC, VERR_INVALID_PARAMETER);
117
118 /*
119 * We require the range to be within registered ram.
120 * There is no apparent need to support ranges which cover more than one ram range.
121 */
122 PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(pRamRanges);
123 while (pRam && GCPhys > pRam->GCPhysLast)
124 pRam = pRam->CTX_SUFF(pNext);
125 if ( !pRam
126 || GCPhysLast < pRam->GCPhys
127 || GCPhys > pRam->GCPhysLast)
128 {
129#ifdef IN_RING3
130 DBGFR3Info(pVM, "phys", NULL, NULL);
131#endif
132 AssertMsgFailed(("No RAM range for %RGp-%RGp\n", GCPhys, GCPhysLast));
133 return VERR_PGM_HANDLER_PHYSICAL_NO_RAM_RANGE;
134 }
135
136 /*
137 * Allocate and initialize the new entry.
138 */
139 PPGMPHYSHANDLER pNew;
140 int rc = MMHyperAlloc(pVM, sizeof(*pNew), 0, MM_TAG_PGM_HANDLERS, (void **)&pNew);
141 if (RT_FAILURE(rc))
142 return rc;
143
144 pNew->Core.Key = GCPhys;
145 pNew->Core.KeyLast = GCPhysLast;
146 pNew->enmType = enmType;
147 pNew->cPages = (GCPhysLast - (GCPhys & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT;
148 pNew->pfnHandlerR3 = pfnHandlerR3;
149 pNew->pvUserR3 = pvUserR3;
150 pNew->pfnHandlerR0 = pfnHandlerR0;
151 pNew->pvUserR0 = pvUserR0;
152 pNew->pfnHandlerRC = pfnHandlerRC;
153 pNew->pvUserRC = pvUserRC;
154 pNew->pszDesc = pszDesc;
155
156 pgmLock(pVM);
157
158 /*
159 * Try insert into list.
160 */
161 if (RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, &pNew->Core))
162 {
163 rc = pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(pVM, pNew, pRam);
164 if (rc == VINF_PGM_SYNC_CR3)
165 rc = VINF_PGM_GCPHYS_ALIASED;
166 pgmUnlock(pVM);
167#ifndef IN_RING3
168 REMNotifyHandlerPhysicalRegister(pVM, enmType, GCPhys, GCPhysLast - GCPhys + 1, !!pfnHandlerR3);
169#else
170 REMR3NotifyHandlerPhysicalRegister(pVM, enmType, GCPhys, GCPhysLast - GCPhys + 1, !!pfnHandlerR3);
171#endif
172 if (rc != VINF_SUCCESS)
173 Log(("PGMHandlerPhysicalRegisterEx: returns %Rrc (%RGp-%RGp)\n", rc, GCPhys, GCPhysLast));
174 return rc;
175 }
176
177 pgmUnlock(pVM);
178
179#if defined(IN_RING3) && defined(VBOX_STRICT)
180 DBGFR3Info(pVM, "handlers", "phys nostats", NULL);
181#endif
182 AssertMsgFailed(("Conflict! GCPhys=%RGp GCPhysLast=%RGp pszDesc=%s\n", GCPhys, GCPhysLast, pszDesc));
183 MMHyperFree(pVM, pNew);
184 return VERR_PGM_HANDLER_PHYSICAL_CONFLICT;
185}
186
187
188/**
189 * Sets ram range flags and attempts updating shadow PTs.
190 *
191 * @returns VBox status code.
192 * @retval VINF_SUCCESS when shadow PTs was successfully updated.
193 * @retval VINF_PGM_SYNC_CR3 when the shadow PTs could be updated because
194 * the guest page aliased or/and mapped by multiple PTs. FFs set.
195 * @param pVM The VM handle.
196 * @param pCur The physical handler.
197 * @param pRam The RAM range.
198 */
199static int pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(PVM pVM, PPGMPHYSHANDLER pCur, PPGMRAMRANGE pRam)
200{
201 /*
202 * Iterate the guest ram pages updating the flags and flushing PT entries
203 * mapping the page.
204 */
205 bool fFlushTLBs = false;
206 int rc = VINF_SUCCESS;
207 const unsigned uState = pgmHandlerPhysicalCalcState(pCur);
208 uint32_t cPages = pCur->cPages;
209 uint32_t i = (pCur->Core.Key - pRam->GCPhys) >> PAGE_SHIFT;
210 for (;;)
211 {
212 PPGMPAGE pPage = &pRam->aPages[i];
213 AssertMsg(pCur->enmType != PGMPHYSHANDLERTYPE_MMIO || PGM_PAGE_IS_MMIO(pPage),
214 ("%RGp %R[pgmpage]\n", pRam->GCPhys + (i << PAGE_SHIFT), pPage));
215
216 /* Only do upgrades. */
217 if (PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) < uState)
218 {
219 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, uState);
220
221 int rc2 = pgmPoolTrackUpdateGCPhys(pVM, pRam->GCPhys + (i << PAGE_SHIFT), pPage, false /* allow updates of PTEs (instead of flushing) */, &fFlushTLBs);
222 if (rc2 != VINF_SUCCESS && rc == VINF_SUCCESS)
223 rc = rc2;
224 }
225
226 /* next */
227 if (--cPages == 0)
228 break;
229 i++;
230 }
231
232 if (fFlushTLBs)
233 {
234 PGM_INVL_ALL_VCPU_TLBS(pVM);
235 Log(("pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs: flushing guest TLBs; rc=%d\n", rc));
236 }
237 else
238 Log(("pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs: doesn't flush guest TLBs. rc=%Rrc; sync flags=%x VMCPU_FF_PGM_SYNC_CR3=%d\n", rc, VMMGetCpu(pVM)->pgm.s.fSyncFlags, VMCPU_FF_ISSET(VMMGetCpu(pVM), VMCPU_FF_PGM_SYNC_CR3)));
239
240 return rc;
241}
242
243
244/**
245 * Register a physical page access handler.
246 *
247 * @returns VBox status code.
248 * @param pVM VM Handle.
249 * @param GCPhys Start physical address.
250 */
251VMMDECL(int) PGMHandlerPhysicalDeregister(PVM pVM, RTGCPHYS GCPhys)
252{
253 /*
254 * Find the handler.
255 */
256 pgmLock(pVM);
257 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysRemove(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
258 if (pCur)
259 {
260 LogFlow(("PGMHandlerPhysicalDeregister: Removing Range %RGp-%RGp %s\n",
261 pCur->Core.Key, pCur->Core.KeyLast, R3STRING(pCur->pszDesc)));
262
263 /*
264 * Clear the page bits and notify the REM about this change.
265 */
266 pgmHandlerPhysicalResetRamFlags(pVM, pCur);
267 pgmHandlerPhysicalDeregisterNotifyREM(pVM, pCur);
268 MMHyperFree(pVM, pCur);
269 pgmUnlock(pVM);
270 return VINF_SUCCESS;
271 }
272 pgmUnlock(pVM);
273
274 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys));
275 return VERR_PGM_HANDLER_NOT_FOUND;
276}
277
278
279/**
280 * Shared code with modify.
281 */
282static void pgmHandlerPhysicalDeregisterNotifyREM(PVM pVM, PPGMPHYSHANDLER pCur)
283{
284 RTGCPHYS GCPhysStart = pCur->Core.Key;
285 RTGCPHYS GCPhysLast = pCur->Core.KeyLast;
286
287 /*
288 * Page align the range.
289 *
290 * Since we've reset (recalculated) the physical handler state of all pages
291 * we can make use of the page states to figure out whether a page should be
292 * included in the REM notification or not.
293 */
294 if ( (pCur->Core.Key & PAGE_OFFSET_MASK)
295 || ((pCur->Core.KeyLast + 1) & PAGE_OFFSET_MASK))
296 {
297 Assert(pCur->enmType != PGMPHYSHANDLERTYPE_MMIO);
298
299 if (GCPhysStart & PAGE_OFFSET_MASK)
300 {
301 PPGMPAGE pPage = pgmPhysGetPage(&pVM->pgm.s, GCPhysStart);
302 if ( pPage
303 && PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != PGM_PAGE_HNDL_PHYS_STATE_NONE)
304 {
305 RTGCPHYS GCPhys = (GCPhysStart + (PAGE_SIZE - 1)) & X86_PTE_PAE_PG_MASK;
306 if ( GCPhys > GCPhysLast
307 || GCPhys < GCPhysStart)
308 return;
309 GCPhysStart = GCPhys;
310 }
311 else
312 GCPhysStart &= X86_PTE_PAE_PG_MASK;
313 Assert(!pPage || PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO); /* these are page aligned atm! */
314 }
315
316 if (GCPhysLast & PAGE_OFFSET_MASK)
317 {
318 PPGMPAGE pPage = pgmPhysGetPage(&pVM->pgm.s, GCPhysLast);
319 if ( pPage
320 && PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != PGM_PAGE_HNDL_PHYS_STATE_NONE)
321 {
322 RTGCPHYS GCPhys = (GCPhysLast & X86_PTE_PAE_PG_MASK) - 1;
323 if ( GCPhys < GCPhysStart
324 || GCPhys > GCPhysLast)
325 return;
326 GCPhysLast = GCPhys;
327 }
328 else
329 GCPhysLast |= PAGE_OFFSET_MASK;
330 Assert(!pPage || PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO); /* these are page aligned atm! */
331 }
332 }
333
334 /*
335 * Tell REM.
336 */
337 const bool fRestoreAsRAM = pCur->pfnHandlerR3
338 && pCur->enmType != PGMPHYSHANDLERTYPE_MMIO; /** @todo this isn't entirely correct. */
339#ifndef IN_RING3
340 REMNotifyHandlerPhysicalDeregister(pVM, pCur->enmType, GCPhysStart, GCPhysLast - GCPhysStart + 1, !!pCur->pfnHandlerR3, fRestoreAsRAM);
341#else
342 REMR3NotifyHandlerPhysicalDeregister(pVM, pCur->enmType, GCPhysStart, GCPhysLast - GCPhysStart + 1, !!pCur->pfnHandlerR3, fRestoreAsRAM);
343#endif
344}
345
346
347/**
348 * pgmHandlerPhysicalResetRamFlags helper that checks for
349 * other handlers on edge pages.
350 */
351DECLINLINE(void) pgmHandlerPhysicalRecalcPageState(PPGM pPGM, RTGCPHYS GCPhys, bool fAbove, PPGMRAMRANGE *ppRamHint)
352{
353 /*
354 * Look for other handlers.
355 */
356 unsigned uState = PGM_PAGE_HNDL_PHYS_STATE_NONE;
357 for (;;)
358 {
359 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGetBestFit(&pPGM->CTX_SUFF(pTrees)->PhysHandlers, GCPhys, fAbove);
360 if ( !pCur
361 || ((fAbove ? pCur->Core.Key : pCur->Core.KeyLast) >> PAGE_SHIFT) != (GCPhys >> PAGE_SHIFT))
362 break;
363 unsigned uThisState = pgmHandlerPhysicalCalcState(pCur);
364 uState = RT_MAX(uState, uThisState);
365
366 /* next? */
367 RTGCPHYS GCPhysNext = fAbove
368 ? pCur->Core.KeyLast + 1
369 : pCur->Core.Key - 1;
370 if ((GCPhysNext >> PAGE_SHIFT) != (GCPhys >> PAGE_SHIFT))
371 break;
372 GCPhys = GCPhysNext;
373 }
374
375 /*
376 * Update if we found something that is a higher priority
377 * state than the current.
378 */
379 if (uState != PGM_PAGE_HNDL_PHYS_STATE_NONE)
380 {
381 PPGMPAGE pPage;
382 int rc = pgmPhysGetPageWithHintEx(pPGM, GCPhys, &pPage, ppRamHint);
383 if ( RT_SUCCESS(rc)
384 && PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) < uState)
385 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, uState);
386 else
387 AssertRC(rc);
388 }
389}
390
391
392/**
393 * Resets an aliased page.
394 *
395 * @param pVM The VM.
396 * @param pPage The page.
397 * @param GCPhysPage The page address in case it comes in handy.
398 */
399void pgmHandlerPhysicalResetAliasedPage(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhysPage)
400{
401 Assert(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO);
402 Assert(PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) == PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
403
404 /*
405 * Flush any shadow page table references *first*.
406 */
407 bool fFlushTLBs = false;
408 int rc = pgmPoolTrackFlushGCPhys(pVM, GCPhysPage, pPage, &fFlushTLBs);
409 AssertLogRelRCReturnVoid(rc);
410# ifdef IN_RC
411 if (fFlushTLBs && rc != VINF_PGM_SYNC_CR3)
412 PGM_INVL_VCPU_TLBS(VMMGetCpu0(pVM));
413# else
414 HWACCMFlushTLBOnAllVCpus(pVM);
415# endif
416
417 /*
418 * Make it an MMIO/Zero page.
419 */
420 PGM_PAGE_SET_HCPHYS(pPage, pVM->pgm.s.HCPhysZeroPg);
421 PGM_PAGE_SET_TYPE(pPage, PGMPAGETYPE_MMIO);
422 PGM_PAGE_SET_STATE(pPage, PGM_PAGE_STATE_ZERO);
423 PGM_PAGE_SET_PAGEID(pPage, NIL_GMM_PAGEID);
424 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_ALL);
425
426 /* Flush its TLB entry. */
427 PGMPhysInvalidatePageMapTLBEntry(pVM, GCPhysPage);
428
429 NOREF(GCPhysPage);
430}
431
432
433/**
434 * Resets ram range flags.
435 *
436 * @returns VBox status code.
437 * @retval VINF_SUCCESS when shadow PTs was successfully updated.
438 * @param pVM The VM handle.
439 * @param pCur The physical handler.
440 *
441 * @remark We don't start messing with the shadow page tables, as we've already got code
442 * in Trap0e which deals with out of sync handler flags (originally conceived for
443 * global pages).
444 */
445static void pgmHandlerPhysicalResetRamFlags(PVM pVM, PPGMPHYSHANDLER pCur)
446{
447 /*
448 * Iterate the guest ram pages updating the state.
449 */
450 RTUINT cPages = pCur->cPages;
451 RTGCPHYS GCPhys = pCur->Core.Key;
452 PPGMRAMRANGE pRamHint = NULL;
453 PPGM pPGM = &pVM->pgm.s;
454 for (;;)
455 {
456 PPGMPAGE pPage;
457 int rc = pgmPhysGetPageWithHintEx(pPGM, GCPhys, &pPage, &pRamHint);
458 if (RT_SUCCESS(rc))
459 {
460 /* Reset MMIO2 for MMIO pages to MMIO, since this aliasing is our business.
461 (We don't flip MMIO to RAM though, that's PGMPhys.cpp's job.) */
462 if (PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO)
463 pgmHandlerPhysicalResetAliasedPage(pVM, pPage, GCPhys);
464 AssertMsg(pCur->enmType != PGMPHYSHANDLERTYPE_MMIO || PGM_PAGE_IS_MMIO(pPage), ("%RGp %R[pgmpage]\n", GCPhys, pPage));
465 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_NONE);
466 }
467 else
468 AssertRC(rc);
469
470 /* next */
471 if (--cPages == 0)
472 break;
473 GCPhys += PAGE_SIZE;
474 }
475
476 /*
477 * Check for partial start and end pages.
478 */
479 if (pCur->Core.Key & PAGE_OFFSET_MASK)
480 pgmHandlerPhysicalRecalcPageState(pPGM, pCur->Core.Key - 1, false /* fAbove */, &pRamHint);
481 if ((pCur->Core.KeyLast & PAGE_OFFSET_MASK) != PAGE_SIZE - 1)
482 pgmHandlerPhysicalRecalcPageState(pPGM, pCur->Core.KeyLast + 1, true /* fAbove */, &pRamHint);
483}
484
485
486/**
487 * Modify a physical page access handler.
488 *
489 * Modification can only be done to the range it self, not the type or anything else.
490 *
491 * @returns VBox status code.
492 * For all return codes other than VERR_PGM_HANDLER_NOT_FOUND and VINF_SUCCESS the range is deregistered
493 * and a new registration must be performed!
494 * @param pVM VM handle.
495 * @param GCPhysCurrent Current location.
496 * @param GCPhys New location.
497 * @param GCPhysLast New last location.
498 */
499VMMDECL(int) PGMHandlerPhysicalModify(PVM pVM, RTGCPHYS GCPhysCurrent, RTGCPHYS GCPhys, RTGCPHYS GCPhysLast)
500{
501 /*
502 * Remove it.
503 */
504 int rc;
505 pgmLock(pVM);
506 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysRemove(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhysCurrent);
507 if (pCur)
508 {
509 /*
510 * Clear the ram flags. (We're gonna move or free it!)
511 */
512 pgmHandlerPhysicalResetRamFlags(pVM, pCur);
513 const bool fRestoreAsRAM = pCur->pfnHandlerR3
514 && pCur->enmType != PGMPHYSHANDLERTYPE_MMIO; /** @todo this isn't entirely correct. */
515
516 /*
517 * Validate the new range, modify and reinsert.
518 */
519 if (GCPhysLast >= GCPhys)
520 {
521 /*
522 * We require the range to be within registered ram.
523 * There is no apparent need to support ranges which cover more than one ram range.
524 */
525 PPGMRAMRANGE pRam = pVM->pgm.s.CTX_SUFF(pRamRanges);
526 while (pRam && GCPhys > pRam->GCPhysLast)
527 pRam = pRam->CTX_SUFF(pNext);
528 if ( pRam
529 && GCPhys <= pRam->GCPhysLast
530 && GCPhysLast >= pRam->GCPhys)
531 {
532 pCur->Core.Key = GCPhys;
533 pCur->Core.KeyLast = GCPhysLast;
534 pCur->cPages = (GCPhysLast - (GCPhys & X86_PTE_PAE_PG_MASK) + 1) >> PAGE_SHIFT;
535
536 if (RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, &pCur->Core))
537 {
538 PGMPHYSHANDLERTYPE enmType = pCur->enmType;
539 RTGCPHYS cb = GCPhysLast - GCPhys + 1;
540 bool fHasHCHandler = !!pCur->pfnHandlerR3;
541
542 /*
543 * Set ram flags, flush shadow PT entries and finally tell REM about this.
544 */
545 rc = pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(pVM, pCur, pRam);
546 pgmUnlock(pVM);
547
548#ifndef IN_RING3
549 REMNotifyHandlerPhysicalModify(pVM, enmType, GCPhysCurrent, GCPhys, cb,
550 fHasHCHandler, fRestoreAsRAM);
551#else
552 REMR3NotifyHandlerPhysicalModify(pVM, enmType, GCPhysCurrent, GCPhys, cb,
553 fHasHCHandler, fRestoreAsRAM);
554#endif
555 PGM_INVL_ALL_VCPU_TLBS(pVM);
556 Log(("PGMHandlerPhysicalModify: GCPhysCurrent=%RGp -> GCPhys=%RGp GCPhysLast=%RGp\n",
557 GCPhysCurrent, GCPhys, GCPhysLast));
558 return VINF_SUCCESS;
559 }
560
561 AssertMsgFailed(("Conflict! GCPhys=%RGp GCPhysLast=%RGp\n", GCPhys, GCPhysLast));
562 rc = VERR_PGM_HANDLER_PHYSICAL_CONFLICT;
563 }
564 else
565 {
566 AssertMsgFailed(("No RAM range for %RGp-%RGp\n", GCPhys, GCPhysLast));
567 rc = VERR_PGM_HANDLER_PHYSICAL_NO_RAM_RANGE;
568 }
569 }
570 else
571 {
572 AssertMsgFailed(("Invalid range %RGp-%RGp\n", GCPhys, GCPhysLast));
573 rc = VERR_INVALID_PARAMETER;
574 }
575
576 /*
577 * Invalid new location, free it.
578 * We've only gotta notify REM and free the memory.
579 */
580 pgmHandlerPhysicalDeregisterNotifyREM(pVM, pCur);
581 MMHyperFree(pVM, pCur);
582 }
583 else
584 {
585 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhysCurrent));
586 rc = VERR_PGM_HANDLER_NOT_FOUND;
587 }
588
589 pgmUnlock(pVM);
590 return rc;
591}
592
593
594/**
595 * Changes the callbacks associated with a physical access handler.
596 *
597 * @returns VBox status code.
598 * @param pVM VM Handle.
599 * @param GCPhys Start physical address.
600 * @param pfnHandlerR3 The R3 handler.
601 * @param pvUserR3 User argument to the R3 handler.
602 * @param pfnHandlerR0 The R0 handler.
603 * @param pvUserR0 User argument to the R0 handler.
604 * @param pfnHandlerRC The RC handler.
605 * @param pvUserRC User argument to the RC handler. Values larger or
606 * equal to 0x10000 will be relocated automatically.
607 * @param pszDesc Pointer to description string. This must not be freed.
608 */
609VMMDECL(int) PGMHandlerPhysicalChangeCallbacks(PVM pVM, RTGCPHYS GCPhys,
610 R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3, RTR3PTR pvUserR3,
611 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0, RTR0PTR pvUserR0,
612 RCPTRTYPE(PFNPGMRCPHYSHANDLER) pfnHandlerRC, RTRCPTR pvUserRC,
613 R3PTRTYPE(const char *) pszDesc)
614{
615 /*
616 * Get the handler.
617 */
618 int rc = VINF_SUCCESS;
619 pgmLock(pVM);
620 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
621 if (pCur)
622 {
623 /*
624 * Change callbacks.
625 */
626 pCur->pfnHandlerR3 = pfnHandlerR3;
627 pCur->pvUserR3 = pvUserR3;
628 pCur->pfnHandlerR0 = pfnHandlerR0;
629 pCur->pvUserR0 = pvUserR0;
630 pCur->pfnHandlerRC = pfnHandlerRC;
631 pCur->pvUserRC = pvUserRC;
632 pCur->pszDesc = pszDesc;
633 }
634 else
635 {
636 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys));
637 rc = VERR_PGM_HANDLER_NOT_FOUND;
638 }
639
640 pgmUnlock(pVM);
641 return rc;
642}
643
644
645/**
646 * Splits a physical access handler in two.
647 *
648 * @returns VBox status code.
649 * @param pVM VM Handle.
650 * @param GCPhys Start physical address of the handler.
651 * @param GCPhysSplit The split address.
652 */
653VMMDECL(int) PGMHandlerPhysicalSplit(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysSplit)
654{
655 AssertReturn(GCPhys < GCPhysSplit, VERR_INVALID_PARAMETER);
656
657 /*
658 * Do the allocation without owning the lock.
659 */
660 PPGMPHYSHANDLER pNew;
661 int rc = MMHyperAlloc(pVM, sizeof(*pNew), 0, MM_TAG_PGM_HANDLERS, (void **)&pNew);
662 if (RT_FAILURE(rc))
663 return rc;
664
665 /*
666 * Get the handler.
667 */
668 pgmLock(pVM);
669 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
670 if (RT_LIKELY(pCur))
671 {
672 if (RT_LIKELY(GCPhysSplit <= pCur->Core.KeyLast))
673 {
674 /*
675 * Create new handler node for the 2nd half.
676 */
677 *pNew = *pCur;
678 pNew->Core.Key = GCPhysSplit;
679 pNew->cPages = (pNew->Core.KeyLast - (pNew->Core.Key & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT;
680
681 pCur->Core.KeyLast = GCPhysSplit - 1;
682 pCur->cPages = (pCur->Core.KeyLast - (pCur->Core.Key & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT;
683
684 if (RT_LIKELY(RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, &pNew->Core)))
685 {
686 LogFlow(("PGMHandlerPhysicalSplit: %RGp-%RGp and %RGp-%RGp\n",
687 pCur->Core.Key, pCur->Core.KeyLast, pNew->Core.Key, pNew->Core.KeyLast));
688 pgmUnlock(pVM);
689 return VINF_SUCCESS;
690 }
691 AssertMsgFailed(("whu?\n"));
692 rc = VERR_INTERNAL_ERROR;
693 }
694 else
695 {
696 AssertMsgFailed(("outside range: %RGp-%RGp split %RGp\n", pCur->Core.Key, pCur->Core.KeyLast, GCPhysSplit));
697 rc = VERR_INVALID_PARAMETER;
698 }
699 }
700 else
701 {
702 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys));
703 rc = VERR_PGM_HANDLER_NOT_FOUND;
704 }
705 pgmUnlock(pVM);
706 MMHyperFree(pVM, pNew);
707 return rc;
708}
709
710
711/**
712 * Joins up two adjacent physical access handlers which has the same callbacks.
713 *
714 * @returns VBox status code.
715 * @param pVM VM Handle.
716 * @param GCPhys1 Start physical address of the first handler.
717 * @param GCPhys2 Start physical address of the second handler.
718 */
719VMMDECL(int) PGMHandlerPhysicalJoin(PVM pVM, RTGCPHYS GCPhys1, RTGCPHYS GCPhys2)
720{
721 /*
722 * Get the handlers.
723 */
724 int rc;
725 pgmLock(pVM);
726 PPGMPHYSHANDLER pCur1 = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys1);
727 if (RT_LIKELY(pCur1))
728 {
729 PPGMPHYSHANDLER pCur2 = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys2);
730 if (RT_LIKELY(pCur2))
731 {
732 /*
733 * Make sure that they are adjacent, and that they've got the same callbacks.
734 */
735 if (RT_LIKELY(pCur1->Core.KeyLast + 1 == pCur2->Core.Key))
736 {
737 if (RT_LIKELY( pCur1->pfnHandlerRC == pCur2->pfnHandlerRC
738 && pCur1->pfnHandlerR0 == pCur2->pfnHandlerR0
739 && pCur1->pfnHandlerR3 == pCur2->pfnHandlerR3))
740 {
741 PPGMPHYSHANDLER pCur3 = (PPGMPHYSHANDLER)RTAvlroGCPhysRemove(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys2);
742 if (RT_LIKELY(pCur3 == pCur2))
743 {
744 pCur1->Core.KeyLast = pCur2->Core.KeyLast;
745 pCur1->cPages = (pCur1->Core.KeyLast - (pCur1->Core.Key & X86_PTE_PAE_PG_MASK) + PAGE_SIZE) >> PAGE_SHIFT;
746 LogFlow(("PGMHandlerPhysicalJoin: %RGp-%RGp %RGp-%RGp\n",
747 pCur1->Core.Key, pCur1->Core.KeyLast, pCur2->Core.Key, pCur2->Core.KeyLast));
748 MMHyperFree(pVM, pCur2);
749 pgmUnlock(pVM);
750 return VINF_SUCCESS;
751 }
752
753 Assert(pCur3 == pCur2);
754 rc = VERR_INTERNAL_ERROR;
755 }
756 else
757 {
758 AssertMsgFailed(("mismatching handlers\n"));
759 rc = VERR_ACCESS_DENIED;
760 }
761 }
762 else
763 {
764 AssertMsgFailed(("not adjacent: %RGp-%RGp %RGp-%RGp\n",
765 pCur1->Core.Key, pCur1->Core.KeyLast, pCur2->Core.Key, pCur2->Core.KeyLast));
766 rc = VERR_INVALID_PARAMETER;
767 }
768 }
769 else
770 {
771 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys2));
772 rc = VERR_PGM_HANDLER_NOT_FOUND;
773 }
774 }
775 else
776 {
777 AssertMsgFailed(("Didn't find range starting at %RGp\n", GCPhys1));
778 rc = VERR_PGM_HANDLER_NOT_FOUND;
779 }
780 pgmUnlock(pVM);
781 return rc;
782
783}
784
785
786/**
787 * Resets any modifications to individual pages in a physical
788 * page access handler region.
789 *
790 * This is used in pair with PGMHandlerPhysicalPageTempOff() or
791 * PGMHandlerPhysicalPageAlias().
792 *
793 * @returns VBox status code.
794 * @param pVM VM Handle
795 * @param GCPhys The start address of the handler regions, i.e. what you
796 * passed to PGMR3HandlerPhysicalRegister(),
797 * PGMHandlerPhysicalRegisterEx() or
798 * PGMHandlerPhysicalModify().
799 */
800VMMDECL(int) PGMHandlerPhysicalReset(PVM pVM, RTGCPHYS GCPhys)
801{
802 LogFlow(("PGMHandlerPhysicalReset GCPhys=%RGp\n", GCPhys));
803 pgmLock(pVM);
804
805 /*
806 * Find the handler.
807 */
808 int rc;
809 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
810 if (RT_LIKELY(pCur))
811 {
812 /*
813 * Validate type.
814 */
815 switch (pCur->enmType)
816 {
817 case PGMPHYSHANDLERTYPE_PHYSICAL_WRITE:
818 case PGMPHYSHANDLERTYPE_PHYSICAL_ALL:
819 case PGMPHYSHANDLERTYPE_MMIO: /* NOTE: Only use when clearing MMIO ranges with aliased MMIO2 pages! */
820 {
821 STAM_COUNTER_INC(&pVM->pgm.s.CTX_MID_Z(Stat,PhysHandlerReset)); /**@Todo move out of switch */
822 PPGMRAMRANGE pRam = pgmPhysGetRange(&pVM->pgm.s, GCPhys);
823 Assert(pRam);
824 Assert(pRam->GCPhys <= pCur->Core.Key);
825 Assert(pRam->GCPhysLast >= pCur->Core.KeyLast);
826
827 if (pCur->enmType == PGMPHYSHANDLERTYPE_MMIO)
828 {
829 /*
830 * Reset all the PGMPAGETYPE_MMIO2_ALIAS_MMIO pages first and that's it.
831 * This could probably be optimized a bit wrt to flushing, but I'm too lazy
832 * to do that now...
833 */
834 PPGMPAGE pPage = &pRam->aPages[(pCur->Core.Key - pRam->GCPhys) >> PAGE_SHIFT];
835 uint32_t cLeft = pCur->cPages;
836 while (cLeft-- > 0)
837 {
838 if (PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO)
839 pgmHandlerPhysicalResetAliasedPage(pVM, pPage, pRam->GCPhys + ((RTGCPHYS)(uintptr_t)(pPage - &pRam->aPages[0]) << PAGE_SHIFT));
840 Assert(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO);
841 pPage++;
842 }
843 }
844 else
845 {
846 /*
847 * Set the flags and flush shadow PT entries.
848 */
849 rc = pgmHandlerPhysicalSetRamFlagsAndFlushShadowPTs(pVM, pCur, pRam);
850 }
851
852 rc = VINF_SUCCESS;
853 break;
854 }
855
856 /*
857 * Invalid.
858 */
859 default:
860 AssertMsgFailed(("Invalid type %d! Corruption!\n", pCur->enmType));
861 rc = VERR_INTERNAL_ERROR;
862 break;
863 }
864 }
865 else
866 {
867 AssertMsgFailed(("Didn't find MMIO Range starting at %#x\n", GCPhys));
868 rc = VERR_PGM_HANDLER_NOT_FOUND;
869 }
870
871 pgmUnlock(pVM);
872 return rc;
873}
874
875
876/**
877 * Temporarily turns off the access monitoring of a page within a monitored
878 * physical write/all page access handler region.
879 *
880 * Use this when no further \#PFs are required for that page. Be aware that
881 * a page directory sync might reset the flags, and turn on access monitoring
882 * for the page.
883 *
884 * The caller must do required page table modifications.
885 *
886 * @returns VBox status code.
887 * @param pVM VM Handle
888 * @param GCPhys The start address of the access handler. This
889 * must be a fully page aligned range or we risk
890 * messing up other handlers installed for the
891 * start and end pages.
892 * @param GCPhysPage The physical address of the page to turn off
893 * access monitoring for.
894 */
895VMMDECL(int) PGMHandlerPhysicalPageTempOff(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage)
896{
897 LogFlow(("PGMHandlerPhysicalPageTempOff GCPhysPage=%RGp\n", GCPhysPage));
898
899 pgmLock(pVM);
900 /*
901 * Validate the range.
902 */
903 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
904 if (RT_LIKELY(pCur))
905 {
906 if (RT_LIKELY( GCPhysPage >= pCur->Core.Key
907 && GCPhysPage <= pCur->Core.KeyLast))
908 {
909 Assert(!(pCur->Core.Key & PAGE_OFFSET_MASK));
910 Assert((pCur->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK);
911
912 AssertReturnStmt( pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_WRITE
913 || pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_ALL,
914 pgmUnlock(pVM), VERR_ACCESS_DENIED);
915
916 /*
917 * Change the page status.
918 */
919 PPGMPAGE pPage;
920 int rc = pgmPhysGetPageEx(&pVM->pgm.s, GCPhysPage, &pPage);
921 AssertReturnStmt(RT_SUCCESS_NP(rc), pgmUnlock(pVM), rc);
922 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
923 pgmUnlock(pVM);
924 return VINF_SUCCESS;
925 }
926 pgmUnlock(pVM);
927 AssertMsgFailed(("The page %#x is outside the range %#x-%#x\n",
928 GCPhysPage, pCur->Core.Key, pCur->Core.KeyLast));
929 return VERR_INVALID_PARAMETER;
930 }
931 pgmUnlock(pVM);
932 AssertMsgFailed(("Specified physical handler start address %#x is invalid.\n", GCPhys));
933 return VERR_PGM_HANDLER_NOT_FOUND;
934}
935
936
937/**
938 * Replaces an MMIO page with an MMIO2 page.
939 *
940 * This is a worker for IOMMMIOMapMMIO2Page that works in a similar way to
941 * PGMHandlerPhysicalPageTempOff but for an MMIO page. Since an MMIO page has no
942 * backing, the caller must provide a replacement page. For various reasons the
943 * replacement page must be an MMIO2 page.
944 *
945 * The caller must do required page table modifications. You can get away
946 * without making any modifations since it's an MMIO page, the cost is an extra
947 * \#PF which will the resync the page.
948 *
949 * Call PGMHandlerPhysicalReset() to restore the MMIO page.
950 *
951 * The caller may still get handler callback even after this call and must be
952 * able to deal correctly with such calls. The reason for these callbacks are
953 * either that we're executing in the recompiler (which doesn't know about this
954 * arrangement) or that we've been restored from saved state (where we won't
955 * save the change).
956 *
957 * @returns VBox status code.
958 * @param pVM The VM handle
959 * @param GCPhys The start address of the access handler. This
960 * must be a fully page aligned range or we risk
961 * messing up other handlers installed for the
962 * start and end pages.
963 * @param GCPhysPage The physical address of the page to turn off
964 * access monitoring for.
965 * @param GCPhysPageRemap The physical address of the MMIO2 page that
966 * serves as backing memory.
967 *
968 * @remark May cause a page pool flush if used on a page that is already
969 * aliased.
970 *
971 * @note This trick does only work reliably if the two pages are never ever
972 * mapped in the same page table. If they are the page pool code will
973 * be confused should either of them be flushed. See the special case
974 * of zero page aliasing mentioned in #3170.
975 *
976 */
977VMMDECL(int) PGMHandlerPhysicalPageAlias(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage, RTGCPHYS GCPhysPageRemap)
978{
979/// Assert(!IOMIsLockOwner(pVM)); /* We mustn't own any other locks when calling this */
980
981 pgmLock(pVM);
982 /*
983 * Lookup and validate the range.
984 */
985 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
986 if (RT_LIKELY(pCur))
987 {
988 if (RT_LIKELY( GCPhysPage >= pCur->Core.Key
989 && GCPhysPage <= pCur->Core.KeyLast))
990 {
991 AssertReturnStmt(pCur->enmType == PGMPHYSHANDLERTYPE_MMIO, pgmUnlock(pVM), VERR_ACCESS_DENIED);
992 AssertReturnStmt(!(pCur->Core.Key & PAGE_OFFSET_MASK), pgmUnlock(pVM), VERR_INVALID_PARAMETER);
993 AssertReturnStmt((pCur->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK, pgmUnlock(pVM), VERR_INVALID_PARAMETER);
994
995 /*
996 * Get and validate the two pages.
997 */
998 PPGMPAGE pPageRemap;
999 int rc = pgmPhysGetPageEx(&pVM->pgm.s, GCPhysPageRemap, &pPageRemap);
1000 AssertReturnStmt(RT_SUCCESS_NP(rc), pgmUnlock(pVM), rc);
1001 AssertMsgReturnStmt(PGM_PAGE_GET_TYPE(pPageRemap) == PGMPAGETYPE_MMIO2,
1002 ("GCPhysPageRemap=%RGp %R[pgmpage]\n", GCPhysPageRemap, pPageRemap),
1003 pgmUnlock(pVM), VERR_PGM_PHYS_NOT_MMIO2);
1004
1005 PPGMPAGE pPage;
1006 rc = pgmPhysGetPageEx(&pVM->pgm.s, GCPhysPage, &pPage);
1007 AssertReturnStmt(RT_SUCCESS_NP(rc), pgmUnlock(pVM), rc);
1008 if (PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO)
1009 {
1010 AssertMsgReturn(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO,
1011 ("GCPhysPage=%RGp %R[pgmpage]\n", GCPhysPage, pPage),
1012 VERR_PGM_PHYS_NOT_MMIO2);
1013 if (PGM_PAGE_GET_HCPHYS(pPage) == PGM_PAGE_GET_HCPHYS(pPageRemap))
1014 {
1015 pgmUnlock(pVM);
1016 return VINF_PGM_HANDLER_ALREADY_ALIASED;
1017 }
1018
1019 /*
1020 * The page is already mapped as some other page, reset it
1021 * to an MMIO/ZERO page before doing the new mapping.
1022 */
1023 Log(("PGMHandlerPhysicalPageAlias: GCPhysPage=%RGp (%R[pgmpage]; %RHp -> %RHp\n",
1024 GCPhysPage, pPage, PGM_PAGE_GET_HCPHYS(pPage), PGM_PAGE_GET_HCPHYS(pPageRemap)));
1025 pgmHandlerPhysicalResetAliasedPage(pVM, pPage, GCPhysPage);
1026 }
1027 Assert(PGM_PAGE_IS_ZERO(pPage));
1028
1029 /*
1030 * Do the actual remapping here.
1031 * This page now serves as an alias for the backing memory specified.
1032 */
1033 LogFlow(("PGMHandlerPhysicalPageAlias: %RGp (%R[pgmpage]) alias for %RGp (%R[pgmpage])\n",
1034 GCPhysPage, pPage, GCPhysPageRemap, pPageRemap ));
1035 PGM_PAGE_SET_HCPHYS(pPage, PGM_PAGE_GET_HCPHYS(pPageRemap));
1036 PGM_PAGE_SET_TYPE(pPage, PGMPAGETYPE_MMIO2_ALIAS_MMIO);
1037 PGM_PAGE_SET_STATE(pPage, PGM_PAGE_STATE_ALLOCATED);
1038 PGM_PAGE_SET_PAGEID(pPage, PGM_PAGE_GET_PAGEID(pPageRemap));
1039 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
1040
1041 /* Flush its TLB entry. */
1042 PGMPhysInvalidatePageMapTLBEntry(pVM, GCPhysPage);
1043
1044 LogFlow(("PGMHandlerPhysicalPageAlias: => %R[pgmpage]\n", pPage));
1045 pgmUnlock(pVM);
1046 return VINF_SUCCESS;
1047 }
1048
1049 pgmUnlock(pVM);
1050 AssertMsgFailed(("The page %#x is outside the range %#x-%#x\n",
1051 GCPhysPage, pCur->Core.Key, pCur->Core.KeyLast));
1052 return VERR_INVALID_PARAMETER;
1053 }
1054
1055 pgmUnlock(pVM);
1056 AssertMsgFailed(("Specified physical handler start address %#x is invalid.\n", GCPhys));
1057 return VERR_PGM_HANDLER_NOT_FOUND;
1058}
1059
1060/**
1061 * Replaces an MMIO page with an arbitrary HC page.
1062 *
1063 * This is a worker for IOMMMIOMapMMIO2Page that works in a similar way to
1064 * PGMHandlerPhysicalPageTempOff but for an MMIO page. Since an MMIO page has no
1065 * backing, the caller must provide a replacement page. For various reasons the
1066 * replacement page must be an MMIO2 page.
1067 *
1068 * The caller must do required page table modifications. You can get away
1069 * without making any modifations since it's an MMIO page, the cost is an extra
1070 * \#PF which will the resync the page.
1071 *
1072 * Call PGMHandlerPhysicalReset() to restore the MMIO page.
1073 *
1074 * The caller may still get handler callback even after this call and must be
1075 * able to deal correctly with such calls. The reason for these callbacks are
1076 * either that we're executing in the recompiler (which doesn't know about this
1077 * arrangement) or that we've been restored from saved state (where we won't
1078 * save the change).
1079 *
1080 * @returns VBox status code.
1081 * @param pVM The VM handle
1082 * @param GCPhys The start address of the access handler. This
1083 * must be a fully page aligned range or we risk
1084 * messing up other handlers installed for the
1085 * start and end pages.
1086 * @param GCPhysPage The physical address of the page to turn off
1087 * access monitoring for.
1088 * @param HCPhysPageRemap The physical address of the HC page that
1089 * serves as backing memory.
1090 *
1091 * @remark May cause a page pool flush if used on a page that is already
1092 * aliased.
1093 */
1094VMMDECL(int) PGMHandlerPhysicalPageAliasHC(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage, RTHCPHYS HCPhysPageRemap)
1095{
1096/// Assert(!IOMIsLockOwner(pVM)); /* We mustn't own any other locks when calling this */
1097
1098 /*
1099 * Lookup and validate the range.
1100 */
1101 pgmLock(pVM);
1102 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
1103 if (RT_LIKELY(pCur))
1104 {
1105 if (RT_LIKELY( GCPhysPage >= pCur->Core.Key
1106 && GCPhysPage <= pCur->Core.KeyLast))
1107 {
1108 AssertReturnStmt(pCur->enmType == PGMPHYSHANDLERTYPE_MMIO, pgmUnlock(pVM), VERR_ACCESS_DENIED);
1109 AssertReturnStmt(!(pCur->Core.Key & PAGE_OFFSET_MASK), pgmUnlock(pVM), VERR_INVALID_PARAMETER);
1110 AssertReturnStmt((pCur->Core.KeyLast & PAGE_OFFSET_MASK) == PAGE_OFFSET_MASK, pgmUnlock(pVM), VERR_INVALID_PARAMETER);
1111
1112 /*
1113 * Get and validate the pages.
1114 */
1115 PPGMPAGE pPage;
1116 int rc = pgmPhysGetPageEx(&pVM->pgm.s, GCPhysPage, &pPage);
1117 AssertReturnStmt(RT_SUCCESS_NP(rc), pgmUnlock(pVM), rc);
1118 if (PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO)
1119 {
1120 pgmUnlock(pVM);
1121 AssertMsgReturn(PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO,
1122 ("GCPhysPage=%RGp %R[pgmpage]\n", GCPhysPage, pPage),
1123 VERR_PGM_PHYS_NOT_MMIO2);
1124 return VINF_PGM_HANDLER_ALREADY_ALIASED;
1125 }
1126 Assert(PGM_PAGE_IS_ZERO(pPage));
1127
1128 /*
1129 * Do the actual remapping here.
1130 * This page now serves as an alias for the backing memory specified.
1131 */
1132 LogFlow(("PGMHandlerPhysicalPageAlias: %RGp (%R[pgmpage]) alias for %RHp\n",
1133 GCPhysPage, pPage, HCPhysPageRemap));
1134 PGM_PAGE_SET_HCPHYS(pPage, HCPhysPageRemap);
1135 PGM_PAGE_SET_TYPE(pPage, PGMPAGETYPE_MMIO2_ALIAS_MMIO);
1136 PGM_PAGE_SET_STATE(pPage, PGM_PAGE_STATE_ALLOCATED);
1137 /** @todo hack alert
1138 * This needs to be done properly. Currently we get away with it as the recompiler directly calls
1139 * IOM read and write functions. Access through PGMPhysRead/Write will crash the process.
1140 */
1141 PGM_PAGE_SET_PAGEID(pPage, NIL_GMM_PAGEID);
1142 PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, PGM_PAGE_HNDL_PHYS_STATE_DISABLED);
1143
1144 /* Flush its TLB entry. */
1145 PGMPhysInvalidatePageMapTLBEntry(pVM, GCPhysPage);
1146 LogFlow(("PGMHandlerPhysicalPageAliasHC: => %R[pgmpage]\n", pPage));
1147 pgmUnlock(pVM);
1148 return VINF_SUCCESS;
1149 }
1150 pgmUnlock(pVM);
1151 AssertMsgFailed(("The page %#x is outside the range %#x-%#x\n",
1152 GCPhysPage, pCur->Core.Key, pCur->Core.KeyLast));
1153 return VERR_INVALID_PARAMETER;
1154 }
1155 pgmUnlock(pVM);
1156
1157 AssertMsgFailed(("Specified physical handler start address %#x is invalid.\n", GCPhys));
1158 return VERR_PGM_HANDLER_NOT_FOUND;
1159}
1160
1161
1162/**
1163 * Checks if a physical range is handled
1164 *
1165 * @returns boolean
1166 * @param pVM VM Handle.
1167 * @param GCPhys Start physical address earlier passed to PGMR3HandlerPhysicalRegister().
1168 * @remarks Caller must take the PGM lock...
1169 * @thread EMT.
1170 */
1171VMMDECL(bool) PGMHandlerPhysicalIsRegistered(PVM pVM, RTGCPHYS GCPhys)
1172{
1173 /*
1174 * Find the handler.
1175 */
1176 pgmLock(pVM);
1177 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
1178 if (pCur)
1179 {
1180 Assert(GCPhys >= pCur->Core.Key && GCPhys <= pCur->Core.KeyLast);
1181 Assert( pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_WRITE
1182 || pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_ALL
1183 || pCur->enmType == PGMPHYSHANDLERTYPE_MMIO);
1184 pgmUnlock(pVM);
1185 return true;
1186 }
1187 pgmUnlock(pVM);
1188 return false;
1189}
1190
1191
1192/**
1193 * Checks if it's an disabled all access handler or write access handler at the
1194 * given address.
1195 *
1196 * @returns true if it's an all access handler, false if it's a write access
1197 * handler.
1198 * @param pVM Pointer to the shared VM structure.
1199 * @param GCPhys The address of the page with a disabled handler.
1200 *
1201 * @remarks The caller, PGMR3PhysTlbGCPhys2Ptr, must hold the PGM lock.
1202 */
1203bool pgmHandlerPhysicalIsAll(PVM pVM, RTGCPHYS GCPhys)
1204{
1205 pgmLock(pVM);
1206 PPGMPHYSHANDLER pCur = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysHandlers, GCPhys);
1207 if (!pCur)
1208 {
1209 pgmUnlock(pVM);
1210 AssertFailed();
1211 return true;
1212 }
1213 Assert( pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_WRITE
1214 || pCur->enmType == PGMPHYSHANDLERTYPE_PHYSICAL_ALL
1215 || pCur->enmType == PGMPHYSHANDLERTYPE_MMIO); /* sanity */
1216 /* Only whole pages can be disabled. */
1217 Assert( pCur->Core.Key <= (GCPhys & ~(RTGCPHYS)PAGE_OFFSET_MASK)
1218 && pCur->Core.KeyLast >= (GCPhys | PAGE_OFFSET_MASK));
1219
1220 bool bRet = pCur->enmType != PGMPHYSHANDLERTYPE_PHYSICAL_WRITE;
1221 pgmUnlock(pVM);
1222 return bRet;
1223}
1224
1225
1226/**
1227 * Check if particular guest's VA is being monitored.
1228 *
1229 * @returns true or false
1230 * @param pVM VM handle.
1231 * @param GCPtr Virtual address.
1232 * @remarks Will acquire the PGM lock.
1233 * @thread Any.
1234 */
1235VMMDECL(bool) PGMHandlerVirtualIsRegistered(PVM pVM, RTGCPTR GCPtr)
1236{
1237 pgmLock(pVM);
1238 PPGMVIRTHANDLER pCur = (PPGMVIRTHANDLER)RTAvlroGCPtrGet(&pVM->pgm.s.CTX_SUFF(pTrees)->VirtHandlers, GCPtr);
1239 pgmUnlock(pVM);
1240
1241 return pCur != NULL;
1242}
1243
1244
1245/**
1246 * Search for virtual handler with matching physical address
1247 *
1248 * @returns VBox status code
1249 * @param pVM The VM handle.
1250 * @param GCPhys GC physical address to search for.
1251 * @param ppVirt Where to store the pointer to the virtual handler structure.
1252 * @param piPage Where to store the pointer to the index of the cached physical page.
1253 */
1254int pgmHandlerVirtualFindByPhysAddr(PVM pVM, RTGCPHYS GCPhys, PPGMVIRTHANDLER *ppVirt, unsigned *piPage)
1255{
1256 STAM_PROFILE_START(&pVM->pgm.s.CTX_MID_Z(Stat,VirtHandlerSearchByPhys), a);
1257 Assert(ppVirt);
1258
1259 pgmLock(pVM);
1260 PPGMPHYS2VIRTHANDLER pCur;
1261 pCur = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysRangeGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers, GCPhys);
1262 if (pCur)
1263 {
1264 /* found a match! */
1265 *ppVirt = (PPGMVIRTHANDLER)((uintptr_t)pCur + pCur->offVirtHandler);
1266 *piPage = pCur - &(*ppVirt)->aPhysToVirt[0];
1267 pgmUnlock(pVM);
1268
1269#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
1270 AssertRelease(pCur->offNextAlias & PGMPHYS2VIRTHANDLER_IS_HEAD);
1271#endif
1272 LogFlow(("PHYS2VIRT: found match for %RGp -> %RGv *piPage=%#x\n", GCPhys, (*ppVirt)->Core.Key, *piPage));
1273 STAM_PROFILE_STOP(&pVM->pgm.s.CTX_MID_Z(Stat,VirtHandlerSearchByPhys), a);
1274 return VINF_SUCCESS;
1275 }
1276
1277 pgmUnlock(pVM);
1278 *ppVirt = NULL;
1279 STAM_PROFILE_STOP(&pVM->pgm.s.CTX_MID_Z(Stat,VirtHandlerSearchByPhys), a);
1280 return VERR_PGM_HANDLER_NOT_FOUND;
1281}
1282
1283
1284/**
1285 * Deal with aliases in phys2virt.
1286 *
1287 * As pointed out by the various todos, this currently only deals with
1288 * aliases where the two ranges match 100%.
1289 *
1290 * @param pVM The VM handle.
1291 * @param pPhys2Virt The node we failed insert.
1292 */
1293static void pgmHandlerVirtualInsertAliased(PVM pVM, PPGMPHYS2VIRTHANDLER pPhys2Virt)
1294{
1295 /*
1296 * First find the node which is conflicting with us.
1297 */
1298 /** @todo Deal with partial overlapping. (Unlikly situation, so I'm too lazy to do anything about it now.) */
1299 /** @todo check if the current head node covers the ground we do. This is highly unlikely
1300 * and I'm too lazy to implement this now as it will require sorting the list and stuff like that. */
1301 PPGMPHYS2VIRTHANDLER pHead = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers, pPhys2Virt->Core.Key);
1302#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
1303 AssertReleaseMsg(pHead != pPhys2Virt, ("%RGp-%RGp offVirtHandler=%#RX32\n",
1304 pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler));
1305#endif
1306 if (RT_UNLIKELY(!pHead || pHead->Core.KeyLast != pPhys2Virt->Core.KeyLast))
1307 {
1308 /** @todo do something clever here... */
1309 LogRel(("pgmHandlerVirtualInsertAliased: %RGp-%RGp\n", pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast));
1310 pPhys2Virt->offNextAlias = 0;
1311 return;
1312 }
1313
1314 /*
1315 * Insert ourselves as the next node.
1316 */
1317 if (!(pHead->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK))
1318 pPhys2Virt->offNextAlias = PGMPHYS2VIRTHANDLER_IN_TREE;
1319 else
1320 {
1321 PPGMPHYS2VIRTHANDLER pNext = (PPGMPHYS2VIRTHANDLER)((intptr_t)pHead + (pHead->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK));
1322 pPhys2Virt->offNextAlias = ((intptr_t)pNext - (intptr_t)pPhys2Virt)
1323 | PGMPHYS2VIRTHANDLER_IN_TREE;
1324 }
1325 pHead->offNextAlias = ((intptr_t)pPhys2Virt - (intptr_t)pHead)
1326 | (pHead->offNextAlias & ~PGMPHYS2VIRTHANDLER_OFF_MASK);
1327 Log(("pgmHandlerVirtualInsertAliased: %RGp-%RGp offNextAlias=%#RX32\n", pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offNextAlias));
1328}
1329
1330
1331/**
1332 * Resets one virtual handler range.
1333 *
1334 * This is called by HandlerVirtualUpdate when it has detected some kind of
1335 * problem and have started clearing the virtual handler page states (or
1336 * when there have been registration/deregistrations). For this reason this
1337 * function will only update the page status if it's lower than desired.
1338 *
1339 * @returns 0
1340 * @param pNode Pointer to a PGMVIRTHANDLER.
1341 * @param pvUser The VM handle.
1342 */
1343DECLCALLBACK(int) pgmHandlerVirtualResetOne(PAVLROGCPTRNODECORE pNode, void *pvUser)
1344{
1345 PPGMVIRTHANDLER pCur = (PPGMVIRTHANDLER)pNode;
1346 PVM pVM = (PVM)pvUser;
1347
1348 Assert(PGMIsLockOwner(pVM));
1349 /*
1350 * Iterate the pages and apply the new state.
1351 */
1352 unsigned uState = pgmHandlerVirtualCalcState(pCur);
1353 PPGMRAMRANGE pRamHint = NULL;
1354 RTGCUINTPTR offPage = ((RTGCUINTPTR)pCur->Core.Key & PAGE_OFFSET_MASK);
1355 RTGCUINTPTR cbLeft = pCur->cb;
1356 for (unsigned iPage = 0; iPage < pCur->cPages; iPage++)
1357 {
1358 PPGMPHYS2VIRTHANDLER pPhys2Virt = &pCur->aPhysToVirt[iPage];
1359 if (pPhys2Virt->Core.Key != NIL_RTGCPHYS)
1360 {
1361 /*
1362 * Update the page state wrt virtual handlers.
1363 */
1364 PPGMPAGE pPage;
1365 int rc = pgmPhysGetPageWithHintEx(&pVM->pgm.s, pPhys2Virt->Core.Key, &pPage, &pRamHint);
1366 if ( RT_SUCCESS(rc)
1367 && PGM_PAGE_GET_HNDL_VIRT_STATE(pPage) < uState)
1368 PGM_PAGE_SET_HNDL_VIRT_STATE(pPage, uState);
1369 else
1370 AssertRC(rc);
1371
1372 /*
1373 * Need to insert the page in the Phys2Virt lookup tree?
1374 */
1375 if (pPhys2Virt->Core.KeyLast == NIL_RTGCPHYS)
1376 {
1377#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
1378 AssertRelease(!pPhys2Virt->offNextAlias);
1379#endif
1380 unsigned cbPhys = cbLeft;
1381 if (cbPhys > PAGE_SIZE - offPage)
1382 cbPhys = PAGE_SIZE - offPage;
1383 else
1384 Assert(iPage == pCur->cPages - 1);
1385 pPhys2Virt->Core.KeyLast = pPhys2Virt->Core.Key + cbPhys - 1; /* inclusive */
1386 pPhys2Virt->offNextAlias = PGMPHYS2VIRTHANDLER_IS_HEAD | PGMPHYS2VIRTHANDLER_IN_TREE;
1387 if (!RTAvlroGCPhysInsert(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers, &pPhys2Virt->Core))
1388 pgmHandlerVirtualInsertAliased(pVM, pPhys2Virt);
1389#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
1390 else
1391 AssertReleaseMsg(RTAvlroGCPhysGet(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers, pPhys2Virt->Core.Key) == &pPhys2Virt->Core,
1392 ("%RGp-%RGp offNextAlias=%#RX32\n",
1393 pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offNextAlias));
1394#endif
1395 Log2(("PHYS2VIRT: Insert physical range %RGp-%RGp offNextAlias=%#RX32 %s\n",
1396 pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offNextAlias, R3STRING(pCur->pszDesc)));
1397 }
1398 }
1399 cbLeft -= PAGE_SIZE - offPage;
1400 offPage = 0;
1401 }
1402
1403 return 0;
1404}
1405
1406#if defined(VBOX_STRICT) || defined(LOG_ENABLED)
1407
1408/**
1409 * Worker for pgmHandlerVirtualDumpPhysPages.
1410 *
1411 * @returns 0 (continue enumeration).
1412 * @param pNode The virtual handler node.
1413 * @param pvUser User argument, unused.
1414 */
1415static DECLCALLBACK(int) pgmHandlerVirtualDumpPhysPagesCallback(PAVLROGCPHYSNODECORE pNode, void *pvUser)
1416{
1417 PPGMPHYS2VIRTHANDLER pCur = (PPGMPHYS2VIRTHANDLER)pNode;
1418 PPGMVIRTHANDLER pVirt = (PPGMVIRTHANDLER)((uintptr_t)pCur + pCur->offVirtHandler);
1419 Log(("PHYS2VIRT: Range %RGp-%RGp for virtual handler: %s\n", pCur->Core.Key, pCur->Core.KeyLast, pVirt->pszDesc));
1420 return 0;
1421}
1422
1423
1424/**
1425 * Assertion / logging helper for dumping all the
1426 * virtual handlers to the log.
1427 *
1428 * @param pVM Pointer to the shared VM structure.
1429 */
1430void pgmHandlerVirtualDumpPhysPages(PVM pVM)
1431{
1432 RTAvlroGCPhysDoWithAll(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers, true /* from left */,
1433 pgmHandlerVirtualDumpPhysPagesCallback, 0);
1434}
1435
1436#endif /* VBOX_STRICT || LOG_ENABLED */
1437#ifdef VBOX_STRICT
1438
1439/**
1440 * State structure used by the PGMAssertHandlerAndFlagsInSync() function
1441 * and its AVL enumerators.
1442 */
1443typedef struct PGMAHAFIS
1444{
1445 /** The current physical address. */
1446 RTGCPHYS GCPhys;
1447 /** The state we've calculated. */
1448 unsigned uVirtStateFound;
1449 /** The state we're matching up to. */
1450 unsigned uVirtState;
1451 /** Number of errors. */
1452 unsigned cErrors;
1453 /** The VM handle. */
1454 PVM pVM;
1455} PGMAHAFIS, *PPGMAHAFIS;
1456
1457
1458#if 0 /* unused */
1459/**
1460 * Verify virtual handler by matching physical address.
1461 *
1462 * @returns 0
1463 * @param pNode Pointer to a PGMVIRTHANDLER.
1464 * @param pvUser Pointer to user parameter.
1465 */
1466static DECLCALLBACK(int) pgmHandlerVirtualVerifyOneByPhysAddr(PAVLROGCPTRNODECORE pNode, void *pvUser)
1467{
1468 PPGMVIRTHANDLER pCur = (PPGMVIRTHANDLER)pNode;
1469 PPGMAHAFIS pState = (PPGMAHAFIS)pvUser;
1470
1471 for (unsigned iPage = 0; iPage < pCur->cPages; iPage++)
1472 {
1473 if ((pCur->aPhysToVirt[iPage].Core.Key & X86_PTE_PAE_PG_MASK) == pState->GCPhys)
1474 {
1475 unsigned uState = pgmHandlerVirtualCalcState(pCur);
1476 if (pState->uVirtState < uState)
1477 {
1478 error
1479 }
1480
1481 if (pState->uVirtState == uState)
1482 break; //??
1483 }
1484 }
1485 return 0;
1486}
1487#endif /* unused */
1488
1489
1490/**
1491 * Verify a virtual handler (enumeration callback).
1492 *
1493 * Called by PGMAssertHandlerAndFlagsInSync to check the sanity of all
1494 * the virtual handlers, esp. that the physical addresses matches up.
1495 *
1496 * @returns 0
1497 * @param pNode Pointer to a PGMVIRTHANDLER.
1498 * @param pvUser Pointer to a PPGMAHAFIS structure.
1499 */
1500static DECLCALLBACK(int) pgmHandlerVirtualVerifyOne(PAVLROGCPTRNODECORE pNode, void *pvUser)
1501{
1502 PPGMVIRTHANDLER pVirt = (PPGMVIRTHANDLER)pNode;
1503 PPGMAHAFIS pState = (PPGMAHAFIS)pvUser;
1504 PVM pVM = pState->pVM;
1505
1506 /*
1507 * Validate the type and calc state.
1508 */
1509 switch (pVirt->enmType)
1510 {
1511 case PGMVIRTHANDLERTYPE_WRITE:
1512 case PGMVIRTHANDLERTYPE_ALL:
1513 break;
1514 default:
1515 AssertMsgFailed(("unknown/wrong enmType=%d\n", pVirt->enmType));
1516 pState->cErrors++;
1517 return 0;
1518 }
1519 const unsigned uState = pgmHandlerVirtualCalcState(pVirt);
1520
1521 /*
1522 * Check key alignment.
1523 */
1524 if ( (pVirt->aPhysToVirt[0].Core.Key & PAGE_OFFSET_MASK) != ((RTGCUINTPTR)pVirt->Core.Key & PAGE_OFFSET_MASK)
1525 && pVirt->aPhysToVirt[0].Core.Key != NIL_RTGCPHYS)
1526 {
1527 AssertMsgFailed(("virt handler phys has incorrect key! %RGp %RGv %s\n",
1528 pVirt->aPhysToVirt[0].Core.Key, pVirt->Core.Key, R3STRING(pVirt->pszDesc)));
1529 pState->cErrors++;
1530 }
1531
1532 if ( (pVirt->aPhysToVirt[pVirt->cPages - 1].Core.KeyLast & PAGE_OFFSET_MASK) != ((RTGCUINTPTR)pVirt->Core.KeyLast & PAGE_OFFSET_MASK)
1533 && pVirt->aPhysToVirt[pVirt->cPages - 1].Core.Key != NIL_RTGCPHYS)
1534 {
1535 AssertMsgFailed(("virt handler phys has incorrect key! %RGp %RGv %s\n",
1536 pVirt->aPhysToVirt[pVirt->cPages - 1].Core.KeyLast, pVirt->Core.KeyLast, R3STRING(pVirt->pszDesc)));
1537 pState->cErrors++;
1538 }
1539
1540 /*
1541 * Check pages for sanity and state.
1542 */
1543 RTGCUINTPTR GCPtr = (RTGCUINTPTR)pVirt->Core.Key;
1544 for (unsigned iPage = 0; iPage < pVirt->cPages; iPage++, GCPtr += PAGE_SIZE)
1545 {
1546 for (VMCPUID i = 0; i < pVM->cCpus; i++)
1547 {
1548 PVMCPU pVCpu = &pVM->aCpus[i];
1549
1550 RTGCPHYS GCPhysGst;
1551 uint64_t fGst;
1552 int rc = PGMGstGetPage(pVCpu, (RTGCPTR)GCPtr, &fGst, &GCPhysGst);
1553 if ( rc == VERR_PAGE_NOT_PRESENT
1554 || rc == VERR_PAGE_TABLE_NOT_PRESENT)
1555 {
1556 if (pVirt->aPhysToVirt[iPage].Core.Key != NIL_RTGCPHYS)
1557 {
1558 AssertMsgFailed(("virt handler phys out of sync. %RGp GCPhysNew=~0 iPage=%#x %RGv %s\n",
1559 pVirt->aPhysToVirt[iPage].Core.Key, iPage, GCPtr, R3STRING(pVirt->pszDesc)));
1560 pState->cErrors++;
1561 }
1562 continue;
1563 }
1564
1565 AssertRCReturn(rc, 0);
1566 if ((pVirt->aPhysToVirt[iPage].Core.Key & X86_PTE_PAE_PG_MASK) != GCPhysGst)
1567 {
1568 AssertMsgFailed(("virt handler phys out of sync. %RGp GCPhysGst=%RGp iPage=%#x %RGv %s\n",
1569 pVirt->aPhysToVirt[iPage].Core.Key, GCPhysGst, iPage, GCPtr, R3STRING(pVirt->pszDesc)));
1570 pState->cErrors++;
1571 continue;
1572 }
1573
1574 PPGMPAGE pPage = pgmPhysGetPage(&pVM->pgm.s, GCPhysGst);
1575 if (!pPage)
1576 {
1577 AssertMsgFailed(("virt handler getting ram flags. GCPhysGst=%RGp iPage=%#x %RGv %s\n",
1578 GCPhysGst, iPage, GCPtr, R3STRING(pVirt->pszDesc)));
1579 pState->cErrors++;
1580 continue;
1581 }
1582
1583 if (PGM_PAGE_GET_HNDL_VIRT_STATE(pPage) < uState)
1584 {
1585 AssertMsgFailed(("virt handler state mismatch. pPage=%R[pgmpage] GCPhysGst=%RGp iPage=%#x %RGv state=%d expected>=%d %s\n",
1586 pPage, GCPhysGst, iPage, GCPtr, PGM_PAGE_GET_HNDL_VIRT_STATE(pPage), uState, R3STRING(pVirt->pszDesc)));
1587 pState->cErrors++;
1588 continue;
1589 }
1590 } /* for each VCPU */
1591 } /* for pages in virtual mapping. */
1592
1593 return 0;
1594}
1595
1596
1597/**
1598 * Asserts that the handlers+guest-page-tables == ramrange-flags and
1599 * that the physical addresses associated with virtual handlers are correct.
1600 *
1601 * @returns Number of mismatches.
1602 * @param pVM The VM handle.
1603 */
1604VMMDECL(unsigned) PGMAssertHandlerAndFlagsInSync(PVM pVM)
1605{
1606 PPGM pPGM = &pVM->pgm.s;
1607 PGMAHAFIS State;
1608 State.GCPhys = 0;
1609 State.uVirtState = 0;
1610 State.uVirtStateFound = 0;
1611 State.cErrors = 0;
1612 State.pVM = pVM;
1613
1614 Assert(PGMIsLockOwner(pVM));
1615
1616 /*
1617 * Check the RAM flags against the handlers.
1618 */
1619 for (PPGMRAMRANGE pRam = pPGM->CTX_SUFF(pRamRanges); pRam; pRam = pRam->CTX_SUFF(pNext))
1620 {
1621 const unsigned cPages = pRam->cb >> PAGE_SHIFT;
1622 for (unsigned iPage = 0; iPage < cPages; iPage++)
1623 {
1624 PGMPAGE const *pPage = &pRam->aPages[iPage];
1625 if (PGM_PAGE_HAS_ANY_HANDLERS(pPage))
1626 {
1627 State.GCPhys = pRam->GCPhys + (iPage << PAGE_SHIFT);
1628
1629 /*
1630 * Physical first - calculate the state based on the handlers
1631 * active on the page, then compare.
1632 */
1633 if (PGM_PAGE_HAS_ANY_PHYSICAL_HANDLERS(pPage))
1634 {
1635 /* the first */
1636 PPGMPHYSHANDLER pPhys = (PPGMPHYSHANDLER)RTAvlroGCPhysRangeGet(&pPGM->CTX_SUFF(pTrees)->PhysHandlers, State.GCPhys);
1637 if (!pPhys)
1638 {
1639 pPhys = (PPGMPHYSHANDLER)RTAvlroGCPhysGetBestFit(&pPGM->CTX_SUFF(pTrees)->PhysHandlers, State.GCPhys, true);
1640 if ( pPhys
1641 && pPhys->Core.Key > (State.GCPhys + PAGE_SIZE - 1))
1642 pPhys = NULL;
1643 Assert(!pPhys || pPhys->Core.Key >= State.GCPhys);
1644 }
1645 if (pPhys)
1646 {
1647 unsigned uState = pgmHandlerPhysicalCalcState(pPhys);
1648
1649 /* more? */
1650 while (pPhys->Core.KeyLast < (State.GCPhys | PAGE_OFFSET_MASK))
1651 {
1652 PPGMPHYSHANDLER pPhys2 = (PPGMPHYSHANDLER)RTAvlroGCPhysGetBestFit(&pPGM->CTX_SUFF(pTrees)->PhysHandlers,
1653 pPhys->Core.KeyLast + 1, true);
1654 if ( !pPhys2
1655 || pPhys2->Core.Key > (State.GCPhys | PAGE_OFFSET_MASK))
1656 break;
1657 unsigned uState2 = pgmHandlerPhysicalCalcState(pPhys2);
1658 uState = RT_MAX(uState, uState2);
1659 pPhys = pPhys2;
1660 }
1661
1662 /* compare.*/
1663 if ( PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != uState
1664 && PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) != PGM_PAGE_HNDL_PHYS_STATE_DISABLED)
1665 {
1666 AssertMsgFailed(("ram range vs phys handler flags mismatch. GCPhys=%RGp state=%d expected=%d %s\n",
1667 State.GCPhys, PGM_PAGE_GET_HNDL_PHYS_STATE(pPage), uState, pPhys->pszDesc));
1668 State.cErrors++;
1669 }
1670
1671#ifdef IN_RING3
1672 /* validate that REM is handling it. */
1673 if ( !REMR3IsPageAccessHandled(pVM, State.GCPhys)
1674 /* ignore shadowed ROM for the time being. */
1675 && PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_ROM_SHADOW)
1676 {
1677 AssertMsgFailed(("ram range vs phys handler REM mismatch. GCPhys=%RGp state=%d %s\n",
1678 State.GCPhys, PGM_PAGE_GET_HNDL_PHYS_STATE(pPage), pPhys->pszDesc));
1679 State.cErrors++;
1680 }
1681#endif
1682 }
1683 else
1684 {
1685 AssertMsgFailed(("ram range vs phys handler mismatch. no handler for GCPhys=%RGp\n", State.GCPhys));
1686 State.cErrors++;
1687 }
1688 }
1689
1690 /*
1691 * Virtual handlers.
1692 */
1693 if (PGM_PAGE_HAS_ACTIVE_VIRTUAL_HANDLERS(pPage))
1694 {
1695 State.uVirtState = PGM_PAGE_GET_HNDL_VIRT_STATE(pPage);
1696#if 1
1697 /* locate all the matching physical ranges. */
1698 State.uVirtStateFound = PGM_PAGE_HNDL_VIRT_STATE_NONE;
1699 RTGCPHYS GCPhysKey = State.GCPhys;
1700 for (;;)
1701 {
1702 PPGMPHYS2VIRTHANDLER pPhys2Virt = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysGetBestFit(&pVM->pgm.s.CTX_SUFF(pTrees)->PhysToVirtHandlers,
1703 GCPhysKey, true /* above-or-equal */);
1704 if ( !pPhys2Virt
1705 || (pPhys2Virt->Core.Key & X86_PTE_PAE_PG_MASK) != State.GCPhys)
1706 break;
1707
1708 /* the head */
1709 GCPhysKey = pPhys2Virt->Core.KeyLast;
1710 PPGMVIRTHANDLER pCur = (PPGMVIRTHANDLER)((uintptr_t)pPhys2Virt + pPhys2Virt->offVirtHandler);
1711 unsigned uState = pgmHandlerVirtualCalcState(pCur);
1712 State.uVirtStateFound = RT_MAX(State.uVirtStateFound, uState);
1713
1714 /* any aliases */
1715 while (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK)
1716 {
1717 pPhys2Virt = (PPGMPHYS2VIRTHANDLER)((uintptr_t)pPhys2Virt + (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK));
1718 pCur = (PPGMVIRTHANDLER)((uintptr_t)pPhys2Virt + pPhys2Virt->offVirtHandler);
1719 uState = pgmHandlerVirtualCalcState(pCur);
1720 State.uVirtStateFound = RT_MAX(State.uVirtStateFound, uState);
1721 }
1722
1723 /* done? */
1724 if ((GCPhysKey & X86_PTE_PAE_PG_MASK) != State.GCPhys)
1725 break;
1726 }
1727#else
1728 /* very slow */
1729 RTAvlroGCPtrDoWithAll(&pVM->pgm.s.CTX_SUFF(pTrees)->VirtHandlers, true, pgmHandlerVirtualVerifyOneByPhysAddr, &State);
1730#endif
1731 if (State.uVirtState != State.uVirtStateFound)
1732 {
1733 AssertMsgFailed(("ram range vs virt handler flags mismatch. GCPhys=%RGp uVirtState=%#x uVirtStateFound=%#x\n",
1734 State.GCPhys, State.uVirtState, State.uVirtStateFound));
1735 State.cErrors++;
1736 }
1737 }
1738 }
1739 } /* foreach page in ram range. */
1740 } /* foreach ram range. */
1741
1742 /*
1743 * Check that the physical addresses of the virtual handlers matches up
1744 * and that they are otherwise sane.
1745 */
1746 RTAvlroGCPtrDoWithAll(&pVM->pgm.s.CTX_SUFF(pTrees)->VirtHandlers, true, pgmHandlerVirtualVerifyOne, &State);
1747
1748 /*
1749 * Do the reverse check for physical handlers.
1750 */
1751 /** @todo */
1752
1753 return State.cErrors;
1754}
1755
1756#endif /* VBOX_STRICT */
1757
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