VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMAll/IEMAllN8veLiveness.cpp@ 105724

Last change on this file since 105724 was 105652, checked in by vboxsync, 3 months ago

VMM/IEM: Fix bound instruction emulation when running in the recompiler on ARM, bugref:10741

The bs3-cpu-generated-1 testcase would fail on the bound instruction when running in the recompiler because
input values are not properly sign extended to 32-bit on ARM before being passed to iemCImpl_bound_16 because the IEM MC block
for bound treated everything as uint16_t. This works with the interpreter because the function definition is int16_t so the
compiler does the proper sign extension but with our own recompiler we would end up with negative values not being properly sign extended.

Create some new IEM MC statements for signed values to make it easier to get things right in the future instead
of just making the iemCImpl_bound_16() take uint16_t and cast the values to int16_t in it.

On a funny side note, lldb prints the correct negative values for the int16_t in iemCImpl_bound_16(), so these can't be trusted, the registers
show the real values:

(lldb) register read
General Purpose Registers:

x0 = 0x000000011653c000
x1 = 0x0000000000000004
x2 = 0x000000000000ffff <= Wrong index, should be 0x00000000ffffffff
x3 = 0x000000000000fffe <= Wrong lower bound, should be 0x00000000fffffffe
x4 = 0x0000000000000000 <= Upper bound

[...]
(lldb) stepi
Process 31449 stopped

  • thread #22, name = 'EMT', stop reason = instruction step into

frame #0: 0x0000000132b242e4 VBoxVMM.dylib`::iemCImpl_bound_16(pVCpu=0x000000011653c000, cbInstr='\x04', idxArray=-1, idxLowerBound=-2, idxUpperBound=0) at IEMAllCImpl.cpp:8304:9 [opt]
  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
File size: 90.2 KB
Line 
1/* $Id: IEMAllN8veLiveness.cpp 105652 2024-08-12 12:16:36Z vboxsync $ */
2/** @file
3 * IEM - Native Recompiler, Liveness Analysis.
4 */
5
6/*
7 * Copyright (C) 2011-2024 Oracle and/or its affiliates.
8 *
9 * This file is part of VirtualBox base platform packages, as
10 * available from https://www.virtualbox.org.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation, in version 3 of the
15 * License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, see <https://www.gnu.org/licenses>.
24 *
25 * SPDX-License-Identifier: GPL-3.0-only
26 */
27
28
29/*********************************************************************************************************************************
30* Header Files *
31*********************************************************************************************************************************/
32#define LOG_GROUP LOG_GROUP_IEM
33#define IEM_WITH_OPAQUE_DECODER_STATE
34#include <VBox/vmm/iem.h>
35#include "IEMInternal.h"
36#include <VBox/vmm/vmcc.h>
37#include <VBox/log.h>
38
39#include "IEMN8veRecompiler.h"
40#include "IEMThreadedFunctions.h"
41#include "IEMNativeFunctions.h"
42
43
44/*********************************************************************************************************************************
45* Defined Constants And Macros *
46*********************************************************************************************************************************/
47#define NOP() ((void)0)
48
49
50/*
51 * BEGIN & END as well as internal workers.
52 */
53#ifndef IEMLIVENESS_EXTENDED_LAYOUT
54# define IEM_MC_BEGIN_EX(a_fMcFlags, a_fCImplFlags, a_cArgs) \
55 { \
56 /* Define local variables that we use to accumulate the liveness state changes in. */ \
57 IEMLIVENESSBIT LiveStateBit0 = { 0 }; \
58 IEMLIVENESSBIT LiveStateBit1 = { 0 }; \
59 IEMLIVENESSBIT LiveMask = { 0 }; \
60 bool fDoneXpctOrCall = false
61#else
62# define IEM_MC_BEGIN_EX(a_fMcFlags, a_fCImplFlags, a_cArgs) \
63 { \
64 /* Define local variables that we use to accumulate the liveness state changes in. */ \
65 IEMLIVENESSENTRY LiveState = { { 0, 0, 0, 0 } }; \
66 IEMLIVENESSBIT LiveMask = { 0 }; \
67 bool fDoneXpctOrCall = false
68#endif
69
70#ifndef IEMLIVENESS_EXTENDED_LAYOUT
71AssertCompile(IEMLIVENESS_STATE_INPUT == IEMLIVENESS_STATE_MASK);
72AssertCompile(IEMLIVENESSBIT0_XCPT_OR_CALL == 0 && IEMLIVENESSBIT1_XCPT_OR_CALL != 0);
73# define IEM_LIVENESS_MARK_XCPT_OR_CALL() do { \
74 if (!fDoneXpctOrCall) \
75 { \
76 LiveStateBit0.bm64 |= pIncoming->Bit0.bm64 & pIncoming->Bit1.bm64 & ~LiveMask.bm64; \
77 LiveStateBit1.bm64 |= IEMLIVENESSBIT1_XCPT_OR_CALL; \
78 \
79 LiveMask.bm64 |= IEMLIVENESSBIT_MASK; /* could also use UINT64_MAX here, but makes little no(?) difference */ \
80 fDoneXpctOrCall = true; /* when compiling with gcc and cl.exe on x86 - may on arm, though. */ \
81 } \
82 } while (0)
83#else
84# define IEM_LIVENESS_MARK_XCPT_OR_CALL() do { \
85 if (!fDoneXpctOrCall) \
86 { \
87 LiveState.aBits[IEMLIVENESS_BIT_READ].bm64 |= pIncoming->aBits[IEMLIVENESS_BIT_READ].bm64 & ~LiveMask.bm64; \
88 LiveState.aBits[IEMLIVENESS_BIT_POT_XCPT_OR_CALL].bm64 |= IEMLIVENESSBIT_MASK; \
89 LiveMask.bm64 |= IEMLIVENESSBIT_MASK; \
90 fDoneXpctOrCall = true; \
91 } \
92 } while (0)
93#endif
94
95
96#ifndef IEMLIVENESS_EXTENDED_LAYOUT
97AssertCompile(IEMLIVENESS_STATE_CLOBBERED == 0);
98# define IEM_LIVENESS_ALL_EFLAGS_CLOBBER() do { \
99 LiveMask.bm64 |= IEMLIVENESSBIT_ALL_EFL_MASK; \
100 } while (0)
101AssertCompile(IEMLIVENESS_STATE_INPUT == IEMLIVENESS_STATE_MASK);
102# define IEM_LIVENESS_ALL_EFLAGS_INPUT() do { \
103 LiveStateBit0.bm64 |= IEMLIVENESSBIT_ALL_EFL_MASK; \
104 LiveStateBit1.bm64 |= IEMLIVENESSBIT_ALL_EFL_MASK; \
105 LiveMask.bm64 |= IEMLIVENESSBIT_ALL_EFL_MASK; \
106 } while (0)
107# define IEM_LIVENESS_ALL_EFLAGS_MODIFY() IEM_LIVENESS_ALL_EFLAGS_INPUT()
108#else
109# define IEM_LIVENESS_ALL_EFLAGS_CLOBBER() do { \
110 LiveState.aBits[IEMLIVENESS_BIT_WRITE].bm64 |= IEMLIVENESSBIT_ALL_EFL_MASK; \
111 LiveMask.bm64 |= IEMLIVENESSBIT_ALL_EFL_MASK; \
112 } while (0)
113# define IEM_LIVENESS_ALL_EFLAGS_INPUT() do { \
114 LiveState.aBits[IEMLIVENESS_BIT_READ].bm64 |= IEMLIVENESSBIT_ALL_EFL_MASK; \
115 LiveMask.bm64 |= IEMLIVENESSBIT_ALL_EFL_MASK; \
116 } while (0)
117# define IEM_LIVENESS_ALL_EFLAGS_MODIFY() do { \
118 LiveState.aBits[IEMLIVENESS_BIT_READ].bm64 |= IEMLIVENESSBIT_ALL_EFL_MASK; \
119 LiveState.aBits[IEMLIVENESS_BIT_WRITE].bm64 |= IEMLIVENESSBIT_ALL_EFL_MASK; \
120 LiveMask.bm64 |= IEMLIVENESSBIT_ALL_EFL_MASK; \
121 } while (0)
122#endif
123
124
125#ifndef IEMLIVENESS_EXTENDED_LAYOUT
126# define IEM_LIVENESS_ONE_EFLAG_CLOBBER(a_Name) do { \
127 LiveMask.a_Name |= 1; \
128 } while (0)
129# define IEM_LIVENESS_ONE_EFLAG_INPUT(a_Name) do { \
130 LiveStateBit0.a_Name |= 1; \
131 LiveStateBit1.a_Name |= 1; \
132 LiveMask.a_Name |= 1; \
133 } while (0)
134# define IEM_LIVENESS_ONE_EFLAG_MODIFY(a_Name) IEM_LIVENESS_ONE_EFLAG_INPUT(a_Name)
135#else
136# define IEM_LIVENESS_ONE_EFLAG_CLOBBER(a_Name) do { \
137 LiveState.aBits[IEMLIVENESS_BIT_WRITE].a_Name |= 1; \
138 LiveMask.a_Name |= 1; \
139 } while (0)
140# define IEM_LIVENESS_ONE_EFLAG_INPUT(a_Name) do { \
141 LiveState.aBits[IEMLIVENESS_BIT_READ].a_Name |= 1; \
142 LiveMask.a_Name |= 1; \
143 } while (0)
144# define IEM_LIVENESS_ONE_EFLAG_MODIFY(a_Name) do { \
145 LiveState.aBits[IEMLIVENESS_BIT_READ].a_Name |= 1; \
146 LiveState.aBits[IEMLIVENESS_BIT_WRITE].a_Name |= 1; \
147 LiveMask.a_Name |= 1; \
148 } while (0)
149#endif
150
151
152/* Generic bitmap (bmGpr, bmSegBase, ++) setters. */
153#ifndef IEMLIVENESS_EXTENDED_LAYOUT
154# define IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(a_bmMember, a_iElement) do { \
155 LiveMask.a_bmMember |= RT_BIT_64(a_iElement); \
156 } while (0)
157# define IEM_LIVENESS_BITMAP_MEMBER_INPUT(a_bmMember, a_iElement) do { \
158 LiveStateBit0.a_bmMember |= RT_BIT_64(a_iElement); \
159 LiveStateBit1.a_bmMember |= RT_BIT_64(a_iElement); \
160 LiveMask.a_bmMember |= RT_BIT_64(a_iElement); \
161 } while (0)
162# define IEM_LIVENESS_BITMAP_MEMBER_MODIFY(a_bmMember, a_iElement) IEM_LIVENESS_BITMAP_MEMBER_INPUT(a_bmMember, a_iElement)
163#else
164# define IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(a_bmMember, a_iElement) do { \
165 LiveState.aBits[IEMLIVENESS_BIT_WRITE].a_bmMember |= RT_BIT_64(a_iElement); \
166 LiveMask.a_bmMember |= RT_BIT_64(a_iElement); \
167 } while (0)
168# define IEM_LIVENESS_BITMAP_MEMBER_INPUT(a_bmMember, a_iElement) do { \
169 LiveState.aBits[IEMLIVENESS_BIT_READ].a_bmMember |= RT_BIT_64(a_iElement); \
170 LiveMask.a_bmMember |= RT_BIT_64(a_iElement); \
171 } while (0)
172# define IEM_LIVENESS_BITMAP_MEMBER_MODIFY(a_bmMember, a_iElement) do { \
173 LiveState.aBits[IEMLIVENESS_BIT_READ].a_bmMember |= RT_BIT_64(a_iElement); \
174 LiveState.aBits[IEMLIVENESS_BIT_WRITE].a_bmMember |= RT_BIT_64(a_iElement); \
175 LiveMask.a_bmMember |= RT_BIT_64(a_iElement); \
176 } while (0)
177#endif
178
179
180#define IEM_LIVENESS_CR0_INPUT() IEM_LIVENESS_BITMAP_MEMBER_INPUT( fCr0, 0)
181#define IEM_LIVENESS_CR4_INPUT() IEM_LIVENESS_BITMAP_MEMBER_INPUT( fCr4, 0)
182#define IEM_LIVENESS_XCR0_INPUT() IEM_LIVENESS_BITMAP_MEMBER_INPUT( fXcr0, 0)
183
184
185#define IEM_LIVENESS_FCW_INPUT() IEM_LIVENESS_BITMAP_MEMBER_INPUT( fFcw, 0)
186#define IEM_LIVENESS_FCW_CLOBBER() IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(fFcw, 0)
187#define IEM_LIVENESS_FCW_MODIFY() IEM_LIVENESS_BITMAP_MEMBER_MODIFY( fFcw, 0)
188
189
190#define IEM_LIVENESS_FSW_INPUT() IEM_LIVENESS_BITMAP_MEMBER_INPUT( fFsw, 0)
191#define IEM_LIVENESS_FSW_CLOBBER() IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(fFsw, 0)
192#define IEM_LIVENESS_FSW_MODIFY() IEM_LIVENESS_BITMAP_MEMBER_MODIFY( fFsw, 0)
193
194
195#define IEM_LIVENESS_MXCSR_INPUT() IEM_LIVENESS_BITMAP_MEMBER_INPUT( fMxCsr, 0)
196#define IEM_LIVENESS_MXCSR_CLOBBER() IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(fMxCsr, 0)
197#define IEM_LIVENESS_MXCSR_MODIFY() IEM_LIVENESS_BITMAP_MEMBER_MODIFY( fMxCsr, 0)
198
199
200#define IEM_LIVENESS_GPR_CLOBBER(a_idxGpr) IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(bmGprs, a_idxGpr)
201#define IEM_LIVENESS_GPR_INPUT(a_idxGpr) IEM_LIVENESS_BITMAP_MEMBER_INPUT( bmGprs, a_idxGpr)
202#define IEM_LIVENESS_GPR_MODIFY(a_idxGpr) IEM_LIVENESS_BITMAP_MEMBER_MODIFY( bmGprs, a_idxGpr)
203
204
205#define IEM_LIVENESS_SEG_BASE_CLOBBER(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(bmSegBase, a_iSeg)
206#define IEM_LIVENESS_SEG_BASE_INPUT(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_INPUT( bmSegBase, a_iSeg)
207#define IEM_LIVENESS_SEG_BASE_MODIFY(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_MODIFY( bmSegBase, a_iSeg)
208
209
210#define IEM_LIVENESS_SEG_ATTRIB_CLOBBER(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(bmSegAttrib, a_iSeg)
211#define IEM_LIVENESS_SEG_ATTRIB_INPUT(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_INPUT( bmSegAttrib, a_iSeg)
212#define IEM_LIVENESS_SEG_ATTRIB_MODIFY(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_MODFIY( bmSegAttrib, a_iSeg)
213
214
215#define IEM_LIVENESS_SEG_LIMIT_CLOBBER(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(bmSegLimit, a_iSeg)
216#define IEM_LIVENESS_SEG_LIMIT_INPUT(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_INPUT( bmSegLimit, a_iSeg)
217#define IEM_LIVENESS_SEG_LIMIT_MODIFY(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_MODIFY( bmSegLimit, a_iSeg)
218
219
220#define IEM_LIVENESS_SEG_SEL_CLOBBER(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_CLOBBER(bmSegSel, a_iSeg)
221#define IEM_LIVENESS_SEG_SEL_INPUT(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_INPUT( bmSegSel, a_iSeg)
222#define IEM_LIVENESS_SEG_SEL_MODIFY(a_iSeg) IEM_LIVENESS_BITMAP_MEMBER_MODIFY( bmSegSel, a_iSeg)
223
224
225#define IEM_LIVENESS_MEM(a_iSeg) do { \
226 IEM_LIVENESS_MARK_XCPT_OR_CALL(); \
227 IEM_LIVENESS_SEG_ATTRIB_INPUT(a_iSeg); \
228 IEM_LIVENESS_SEG_BASE_INPUT(a_iSeg); \
229 IEM_LIVENESS_SEG_LIMIT_INPUT(a_iSeg); \
230 } while (0)
231
232#define IEM_LIVENESS_MEM_FLAT() IEM_LIVENESS_MARK_XCPT_OR_CALL()
233
234#define IEM_LIVENESS_STACK() do { \
235 IEM_LIVENESS_MEM(X86_SREG_SS); \
236 IEM_LIVENESS_GPR_MODIFY(X86_GREG_xSP); \
237 } while (0)
238
239#define IEM_LIVENESS_STACK_FLAT() do { \
240 IEM_LIVENESS_MEM_FLAT(); \
241 IEM_LIVENESS_GPR_MODIFY(X86_GREG_xSP); \
242 } while (0)
243
244
245#define IEM_LIVENESS_PC_NO_FLAGS() NOP()
246#define IEM_LIVENESS_PC_WITH_FLAGS() IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOther)
247#define IEM_LIVENESS_PC16_JMP_NO_FLAGS() IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_SEG_LIMIT_INPUT(X86_SREG_CS)
248#define IEM_LIVENESS_PC32_JMP_NO_FLAGS() IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_SEG_LIMIT_INPUT(X86_SREG_CS)
249#define IEM_LIVENESS_PC64_JMP_NO_FLAGS() IEM_LIVENESS_MARK_XCPT_OR_CALL()
250#define IEM_LIVENESS_PC16_JMP_WITH_FLAGS() IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOther); IEM_LIVENESS_SEG_LIMIT_INPUT(X86_SREG_CS)
251#define IEM_LIVENESS_PC32_JMP_WITH_FLAGS() IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOther); IEM_LIVENESS_SEG_LIMIT_INPUT(X86_SREG_CS)
252#define IEM_LIVENESS_PC64_JMP_WITH_FLAGS() IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOther)
253
254#ifndef IEMLIVENESS_EXTENDED_LAYOUT
255# define IEM_MC_END() \
256 /* Combine the incoming state with what we've accumulated in this block. */ \
257 /* We can help the compiler by skipping OR'ing when having applied XPCT_OR_CALL, */ \
258 /* since that already imports all the incoming state. Saves a lot with cl.exe. */ \
259 if (!fDoneXpctOrCall) \
260 { \
261 pOutgoing->Bit0.bm64 = LiveStateBit0.bm64 | (~LiveMask.bm64 & pIncoming->Bit0.bm64); \
262 pOutgoing->Bit1.bm64 = LiveStateBit1.bm64 | (~LiveMask.bm64 & pIncoming->Bit1.bm64); \
263 } \
264 else \
265 { \
266 pOutgoing->Bit0.bm64 = LiveStateBit0.bm64; \
267 pOutgoing->Bit1.bm64 = LiveStateBit1.bm64; \
268 } \
269 }
270#else
271# define IEM_MC_END() \
272 /* Combine the incoming state with what we've accumulated in this block. */ \
273 /* We can help the compiler by skipping OR'ing when having applied XPCT_OR_CALL, */ \
274 /* since that already imports all the incoming state. Saves a lot with cl.exe. */ \
275 if (!fDoneXpctOrCall) \
276 { \
277 pOutgoing->aBits[IEMLIVENESS_BIT_POT_XCPT_OR_CALL].bm64 = LiveState.aBits[IEMLIVENESS_BIT_POT_XCPT_OR_CALL].bm64 \
278 | (~LiveMask.bm64 & pIncoming->aBits[IEMLIVENESS_BIT_POT_XCPT_OR_CALL].bm64); \
279 pOutgoing->aBits[IEMLIVENESS_BIT_READ].bm64 = LiveState.aBits[IEMLIVENESS_BIT_READ].bm64 \
280 | (~LiveMask.bm64 & pIncoming->aBits[IEMLIVENESS_BIT_READ].bm64); \
281 pOutgoing->aBits[IEMLIVENESS_BIT_WRITE].bm64 = LiveState.aBits[IEMLIVENESS_BIT_WRITE].bm64 \
282 | (~LiveMask.bm64 & pIncoming->aBits[IEMLIVENESS_BIT_WRITE].bm64); \
283 pOutgoing->aBits[IEMLIVENESS_BIT_OTHER].bm64 = LiveState.aBits[IEMLIVENESS_BIT_OTHER].bm64 \
284 | (~LiveMask.bm64 & pIncoming->aBits[IEMLIVENESS_BIT_OTHER].bm64); \
285 } \
286 else \
287 *pOutgoing = LiveState; \
288 }
289#endif
290
291/*
292 * The native MC variants.
293 */
294#define IEM_MC_FREE_LOCAL(a_Name) NOP()
295#define IEM_MC_FREE_ARG(a_Name) NOP()
296
297
298/*
299 * The THREADED MC variants.
300 */
301
302/* We don't track RIP (PC) liveness. */
303#define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC16(a_cbInstr, a_rcNormal) IEM_LIVENESS_PC_NO_FLAGS()
304#define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC32(a_cbInstr, a_rcNormal) IEM_LIVENESS_PC_NO_FLAGS()
305#define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC64(a_cbInstr, a_rcNormal) IEM_LIVENESS_PC_NO_FLAGS()
306#define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_cbInstr, a_rcNormal) IEM_LIVENESS_PC_WITH_FLAGS()
307#define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_cbInstr, a_rcNormal) IEM_LIVENESS_PC_WITH_FLAGS()
308#define IEM_MC_ADVANCE_RIP_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_cbInstr, a_rcNormal) IEM_LIVENESS_PC_WITH_FLAGS()
309
310#define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC16(a_i8, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC16_JMP_NO_FLAGS()
311#define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC32(a_i8, a_cbInstr, a_enmEffOpSize, a_rcNormal) IEM_LIVENESS_PC32_JMP_NO_FLAGS()
312#define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC64(a_i8, a_cbInstr, a_enmEffOpSize, a_rcNormal) IEM_LIVENESS_PC64_JMP_NO_FLAGS()
313#define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_i8, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC16_JMP_WITH_FLAGS()
314#define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_i8, a_cbInstr, a_enmEffOpSize, a_rcNormal) IEM_LIVENESS_PC32_JMP_WITH_FLAGS()
315#define IEM_MC_REL_JMP_S8_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_i8, a_cbInstr, a_enmEffOpSize, a_rcNormal) IEM_LIVENESS_PC64_JMP_WITH_FLAGS()
316#define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC16(a_i16, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC16_JMP_NO_FLAGS()
317#define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC32(a_i16, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC32_JMP_NO_FLAGS()
318#define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC64(a_i16, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC64_JMP_NO_FLAGS()
319#define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_i16, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC16_JMP_WITH_FLAGS()
320#define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_i16, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC32_JMP_WITH_FLAGS()
321#define IEM_MC_REL_JMP_S16_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_i16, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC64_JMP_WITH_FLAGS()
322#define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC16(a_i32, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC16_JMP_NO_FLAGS()
323#define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC32(a_i32, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC32_JMP_NO_FLAGS()
324#define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC64(a_i32, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC64_JMP_NO_FLAGS()
325#define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_i32, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC16_JMP_WITH_FLAGS()
326#define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_i32, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC32_JMP_WITH_FLAGS()
327#define IEM_MC_REL_JMP_S32_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_i32, a_cbInstr, a_rcNormal) IEM_LIVENESS_PC64_JMP_WITH_FLAGS()
328#define IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC16(a_u16NewIP) IEM_LIVENESS_PC16_JMP_NO_FLAGS()
329#define IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC32(a_u16NewIP) IEM_LIVENESS_PC32_JMP_NO_FLAGS()
330#define IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC64(a_u16NewIP) IEM_LIVENESS_PC64_JMP_NO_FLAGS()
331#define IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_u16NewIP) IEM_LIVENESS_PC16_JMP_WITH_FLAGS()
332#define IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_u16NewIP) IEM_LIVENESS_PC32_JMP_WITH_FLAGS()
333#define IEM_MC_SET_RIP_U16_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_u16NewIP) IEM_LIVENESS_PC64_JMP_WITH_FLAGS()
334#define IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC32(a_u32NewEIP) IEM_LIVENESS_PC32_JMP_NO_FLAGS()
335#define IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC64(a_u32NewEIP) IEM_LIVENESS_PC64_JMP_NO_FLAGS()
336#define IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_u32NewEIP) IEM_LIVENESS_PC32_JMP_WITH_FLAGS()
337#define IEM_MC_SET_RIP_U32_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_u32NewEIP) IEM_LIVENESS_PC64_JMP_WITH_FLAGS()
338#define IEM_MC_SET_RIP_U64_AND_FINISH_THREADED_PC64(a_u32NewEIP) IEM_LIVENESS_PC64_JMP_NO_FLAGS()
339#define IEM_MC_SET_RIP_U64_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_u32NewEIP) IEM_LIVENESS_PC64_JMP_WITH_FLAGS()
340
341#define IEM_MC_REL_CALL_S16_AND_FINISH_THREADED_PC16(a_i16, a_cbInstr) do { IEM_LIVENESS_PC16_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
342#define IEM_MC_REL_CALL_S16_AND_FINISH_THREADED_PC32(a_i16, a_cbInstr) do { IEM_LIVENESS_PC32_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
343#define IEM_MC_REL_CALL_S16_AND_FINISH_THREADED_PC64(a_i16, a_cbInstr) do { IEM_LIVENESS_PC64_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
344#define IEM_MC_REL_CALL_S16_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_i16, a_cbInstr) do { IEM_LIVENESS_PC16_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
345#define IEM_MC_REL_CALL_S16_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_i16, a_cbInstr) do { IEM_LIVENESS_PC32_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
346#define IEM_MC_REL_CALL_S16_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_i16, a_cbInstr) do { IEM_LIVENESS_PC64_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
347#define IEM_MC_REL_CALL_S32_AND_FINISH_THREADED_PC16(a_i32, a_cbInstr) do { IEM_LIVENESS_PC16_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
348#define IEM_MC_REL_CALL_S32_AND_FINISH_THREADED_PC32(a_i32, a_cbInstr) do { IEM_LIVENESS_PC32_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
349#define IEM_MC_REL_CALL_S32_AND_FINISH_THREADED_PC64(a_i32, a_cbInstr) do { IEM_LIVENESS_PC64_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
350#define IEM_MC_REL_CALL_S32_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_i32, a_cbInstr) do { IEM_LIVENESS_PC16_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
351#define IEM_MC_REL_CALL_S32_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_i32, a_cbInstr) do { IEM_LIVENESS_PC32_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
352#define IEM_MC_REL_CALL_S32_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_i32, a_cbInstr) do { IEM_LIVENESS_PC64_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
353#define IEM_MC_REL_CALL_S64_AND_FINISH_THREADED_PC32(a_i64, a_cbInstr) do { IEM_LIVENESS_PC32_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
354#define IEM_MC_REL_CALL_S64_AND_FINISH_THREADED_PC64(a_i64, a_cbInstr) do { IEM_LIVENESS_PC64_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
355#define IEM_MC_REL_CALL_S64_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_i64, a_cbInstr) do { IEM_LIVENESS_PC32_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
356#define IEM_MC_REL_CALL_S64_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_i64, a_cbInstr) do { IEM_LIVENESS_PC64_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
357#define IEM_MC_IND_CALL_U16_AND_FINISH_THREADED_PC16(a_u16NewIP, a_cbInstr) do { IEM_LIVENESS_PC16_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
358#define IEM_MC_IND_CALL_U16_AND_FINISH_THREADED_PC32(a_u16NewIP, a_cbInstr) do { IEM_LIVENESS_PC32_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
359#define IEM_MC_IND_CALL_U16_AND_FINISH_THREADED_PC64(a_u16NewIP, a_cbInstr) do { IEM_LIVENESS_PC64_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
360#define IEM_MC_IND_CALL_U16_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_u16NewIP, a_cbInstr) do { IEM_LIVENESS_PC16_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
361#define IEM_MC_IND_CALL_U16_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_u16NewIP, a_cbInstr) do { IEM_LIVENESS_PC32_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
362#define IEM_MC_IND_CALL_U16_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_u16NewIP, a_cbInstr) do { IEM_LIVENESS_PC64_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
363#define IEM_MC_IND_CALL_U32_AND_FINISH_THREADED_PC32(a_u32NewEIP, a_cbInstr) do { IEM_LIVENESS_PC32_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
364#define IEM_MC_IND_CALL_U32_AND_FINISH_THREADED_PC64(a_u32NewEIP, a_cbInstr) do { IEM_LIVENESS_PC64_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
365#define IEM_MC_IND_CALL_U32_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_u32NewEIP, a_cbInstr) do { IEM_LIVENESS_PC32_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
366#define IEM_MC_IND_CALL_U32_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_u32NewEIP, a_cbInstr) do { IEM_LIVENESS_PC64_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
367#define IEM_MC_IND_CALL_U64_AND_FINISH_THREADED_PC64(a_u32NewRIP, a_cbInstr) do { IEM_LIVENESS_PC64_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
368#define IEM_MC_IND_CALL_U64_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_u32NewRIP, a_cbInstr) do { IEM_LIVENESS_PC64_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
369
370#define IEM_MC_RETN_AND_FINISH_THREADED_PC16(a_i16, a_cbInstr) do { IEM_LIVENESS_PC16_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
371#define IEM_MC_RETN_AND_FINISH_THREADED_PC32(a_i16, a_cbInstr, a_enmEffOpSize) do { IEM_LIVENESS_PC32_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
372#define IEM_MC_RETN_AND_FINISH_THREADED_PC64(a_i16, a_cbInstr, a_enmEffOpSize) do { IEM_LIVENESS_PC64_JMP_NO_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
373#define IEM_MC_RETN_AND_FINISH_THREADED_PC16_WITH_FLAGS(a_i16, a_cbInstr) do { IEM_LIVENESS_PC16_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
374#define IEM_MC_RETN_AND_FINISH_THREADED_PC32_WITH_FLAGS(a_i16, a_cbInstr, a_enmEffOpSize) do { IEM_LIVENESS_PC32_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
375#define IEM_MC_RETN_AND_FINISH_THREADED_PC64_WITH_FLAGS(a_i16, a_cbInstr, a_enmEffOpSize) do { IEM_LIVENESS_PC64_JMP_WITH_FLAGS(); IEM_LIVENESS_STACK(); } while (0)
376
377/* Effective address stuff is rather complicated... */
378#define IEM_MC_CALC_RM_EFF_ADDR_THREADED_16(a_GCPtrEff, a_bRm, a_u16Disp) do { \
379 if (((a_bRm) & (X86_MODRM_MOD_MASK | X86_MODRM_RM_MASK)) != 6) \
380 { \
381 switch ((a_bRm) & X86_MODRM_RM_MASK) \
382 { \
383 case 0: IEM_LIVENESS_GPR_INPUT(X86_GREG_xBX); IEM_LIVENESS_GPR_INPUT(X86_GREG_xSI); break; \
384 case 1: IEM_LIVENESS_GPR_INPUT(X86_GREG_xBX); IEM_LIVENESS_GPR_INPUT(X86_GREG_xDI); break; \
385 case 2: IEM_LIVENESS_GPR_INPUT(X86_GREG_xBP); IEM_LIVENESS_GPR_INPUT(X86_GREG_xSI); break; \
386 case 3: IEM_LIVENESS_GPR_INPUT(X86_GREG_xBP); IEM_LIVENESS_GPR_INPUT(X86_GREG_xDI); break; \
387 case 4: IEM_LIVENESS_GPR_INPUT(X86_GREG_xSI); break; \
388 case 5: IEM_LIVENESS_GPR_INPUT(X86_GREG_xDI); break; \
389 case 6: IEM_LIVENESS_GPR_INPUT(X86_GREG_xBP); break; \
390 case 7: IEM_LIVENESS_GPR_INPUT(X86_GREG_xBX); break; \
391 } \
392 } \
393 } while (0)
394
395#define IEM_MC_CALC_RM_EFF_ADDR_THREADED_32(a_GCPtrEff, a_bRm, a_uSibAndRspOffset, a_u32Disp) do { \
396 if (((a_bRm) & (X86_MODRM_MOD_MASK | X86_MODRM_RM_MASK)) != 5) \
397 { \
398 uint8_t const idxReg = (a_bRm) & X86_MODRM_RM_MASK; \
399 if (idxReg != 4 /*SIB*/) \
400 IEM_LIVENESS_GPR_INPUT(idxReg); \
401 else \
402 { \
403 uint8_t const idxIndex = ((a_uSibAndRspOffset) >> X86_SIB_INDEX_SHIFT) & X86_SIB_INDEX_SMASK; \
404 if (idxIndex != 4 /*no index*/) \
405 IEM_LIVENESS_GPR_INPUT(idxIndex); \
406 \
407 uint8_t const idxBase = (a_uSibAndRspOffset) & X86_SIB_BASE_MASK; \
408 if (idxBase != 5 || ((a_bRm) & X86_MODRM_MOD_MASK) != 0) \
409 IEM_LIVENESS_GPR_INPUT(idxBase); \
410 } \
411 } \
412 } while (0)
413
414#define IEM_MC_CALC_RM_EFF_ADDR_THREADED_64(a_GCPtrEff, a_bRmEx, a_uSibAndRspOffset, a_u32Disp, a_cbImm) do { \
415 if (((a_bRmEx) & (X86_MODRM_MOD_MASK | X86_MODRM_RM_MASK)) == 5) \
416 { /* RIP */ } \
417 else \
418 { \
419 uint8_t const idxReg = (a_bRmEx) & (X86_MODRM_RM_MASK | 0x8); /* bRmEx[bit 3] = REX.B */ \
420 if ((idxReg & X86_MODRM_RM_MASK) != 4 /* not SIB */) \
421 IEM_LIVENESS_GPR_INPUT(idxReg); \
422 else /* SIB: */\
423 { \
424 uint8_t const idxIndex = (((a_uSibAndRspOffset) >> X86_SIB_INDEX_SHIFT) & X86_SIB_INDEX_SMASK) \
425 | (((a_bRmEx) & 0x10) >> 1); /* bRmEx[bit 4] = REX.X */ \
426 if (idxIndex != 4 /*no index*/) \
427 IEM_LIVENESS_GPR_INPUT(idxIndex); \
428 \
429 uint8_t const idxBase = ((a_uSibAndRspOffset) & X86_SIB_BASE_MASK) | ((a_bRmEx) & 0x8); /* bRmEx[bit 3] = REX.B */ \
430 if ((idxBase & 7) != 5 /* and !13*/ || ((a_bRmEx) & X86_MODRM_MOD_MASK) != 0) \
431 IEM_LIVENESS_GPR_INPUT(idxBase); \
432 } \
433 } \
434 } while (0)
435#define IEM_MC_CALC_RM_EFF_ADDR_THREADED_64_FSGS(a_GCPtrEff, a_bRmEx, a_uSibAndRspOffset, a_u32Disp, a_cbImm) \
436 IEM_MC_CALC_RM_EFF_ADDR_THREADED_64(a_GCPtrEff, a_bRmEx, a_uSibAndRspOffset, a_u32Disp, a_cbImm)
437#define IEM_MC_CALC_RM_EFF_ADDR_THREADED_64_ADDR32(a_GCPtrEff, a_bRmEx, a_uSibAndRspOffset, a_u32Disp, a_cbImm) \
438 IEM_MC_CALC_RM_EFF_ADDR_THREADED_64(a_GCPtrEff, a_bRmEx, a_uSibAndRspOffset, a_u32Disp, a_cbImm)
439
440/* At present we don't know what any CIMPL may require as input, so we do XPCT/CALL. */
441#define IEM_MC_CALL_CIMPL_1_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0) \
442 IEM_LIVENESS_MARK_XCPT_OR_CALL()
443#define IEM_MC_CALL_CIMPL_2_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0, a1) \
444 IEM_LIVENESS_MARK_XCPT_OR_CALL()
445#define IEM_MC_CALL_CIMPL_3_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0, a1, a2) \
446 IEM_LIVENESS_MARK_XCPT_OR_CALL()
447#define IEM_MC_CALL_CIMPL_4_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0, a1, a2, a3) \
448 IEM_LIVENESS_MARK_XCPT_OR_CALL()
449#define IEM_MC_CALL_CIMPL_5_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0, a1, a2, a3, a4) \
450 IEM_LIVENESS_MARK_XCPT_OR_CALL()
451
452#define IEM_MC_DEFER_TO_CIMPL_0_RET_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl) \
453 IEM_LIVENESS_RAW_INIT_WITH_XCPT_OR_CALL(pOutgoing, pIncoming)
454#define IEM_MC_DEFER_TO_CIMPL_1_RET_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0) \
455 IEM_LIVENESS_RAW_INIT_WITH_XCPT_OR_CALL(pOutgoing, pIncoming)
456#define IEM_MC_DEFER_TO_CIMPL_2_RET_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0, a1) \
457 IEM_LIVENESS_RAW_INIT_WITH_XCPT_OR_CALL(pOutgoing, pIncoming)
458#define IEM_MC_DEFER_TO_CIMPL_3_RET_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0, a1, a2) \
459 IEM_LIVENESS_RAW_INIT_WITH_XCPT_OR_CALL(pOutgoing, pIncoming)
460#define IEM_MC_DEFER_TO_CIMPL_4_RET_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0, a1, a2, a3) \
461 IEM_LIVENESS_RAW_INIT_WITH_XCPT_OR_CALL(pOutgoing, pIncoming)
462#define IEM_MC_DEFER_TO_CIMPL_5_RET_THREADED(a_cbInstr, a_fFlags, a_fGstShwFlush, a_pfnCImpl, a0, a1, a2, a3, a4) \
463 IEM_LIVENESS_RAW_INIT_WITH_XCPT_OR_CALL(pOutgoing, pIncoming)
464
465/* Any 8-bit register fetch, store or modification only works on part of the register
466 and must therefore be considered INPUTs. */
467#define IEM_MC_FETCH_GREG_U8_THREADED(a_u8Dst, a_iGRegEx) IEM_LIVENESS_GPR_INPUT(a_iGRegEx & 15)
468#define IEM_MC_FETCH_GREG_U8_ZX_U16_THREADED(a_u16Dst, a_iGRegEx) IEM_LIVENESS_GPR_INPUT(a_iGRegEx & 15)
469#define IEM_MC_FETCH_GREG_U8_ZX_U32_THREADED(a_u32Dst, a_iGRegEx) IEM_LIVENESS_GPR_INPUT(a_iGRegEx & 15)
470#define IEM_MC_FETCH_GREG_U8_ZX_U64_THREADED(a_u64Dst, a_iGRegEx) IEM_LIVENESS_GPR_INPUT(a_iGRegEx & 15)
471#define IEM_MC_FETCH_GREG_U8_SX_U16_THREADED(a_u16Dst, a_iGRegEx) IEM_LIVENESS_GPR_INPUT(a_iGRegEx & 15)
472#define IEM_MC_FETCH_GREG_U8_SX_U32_THREADED(a_u32Dst, a_iGRegEx) IEM_LIVENESS_GPR_INPUT(a_iGRegEx & 15)
473#define IEM_MC_FETCH_GREG_U8_SX_U64_THREADED(a_u64Dst, a_iGRegEx) IEM_LIVENESS_GPR_INPUT(a_iGRegEx & 15)
474#define IEM_MC_STORE_GREG_U8_THREADED(a_iGRegEx, a_u8Value) IEM_LIVENESS_GPR_MODIFY(a_iGRegEx & 15)
475#define IEM_MC_STORE_GREG_U8_CONST_THREADED(a_iGRegEx, a_u8Value) IEM_LIVENESS_GPR_MODIFY(a_iGRegEx & 15)
476#define IEM_MC_REF_GREG_U8_THREADED(a_pu8Dst, a_iGRegEx) IEM_LIVENESS_GPR_MODIFY(a_iGRegEx & 15)
477#define IEM_MC_REF_GREG_U8_CONST_THREADED(a_pu8Dst, a_iGRegEx) IEM_LIVENESS_GPR_INPUT(a_iGRegEx & 15)
478#define IEM_MC_ADD_GREG_U8_TO_LOCAL_THREADED(a_u8Value, a_iGRegEx) IEM_LIVENESS_GPR_INPUT(a_iGRegEx & 15)
479#define IEM_MC_AND_GREG_U8_THREADED(a_iGRegEx, a_u8Value) IEM_LIVENESS_GPR_MODIFY(a_iGRegEx & 15)
480#define IEM_MC_OR_GREG_U8_THREADED(a_iGRegEx, a_u8Value) IEM_LIVENESS_GPR_MODIFY(a_iGRegEx & 15)
481
482
483/*
484 * The other MCs.
485 */
486
487#define IEM_MC_NO_NATIVE_RECOMPILE() NOP()
488
489#define IEM_MC_RAISE_DIVIDE_ERROR() IEM_LIVENESS_MARK_XCPT_OR_CALL()
490#define IEM_MC_MAYBE_RAISE_DEVICE_NOT_AVAILABLE() IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_CR0_INPUT()
491#define IEM_MC_MAYBE_RAISE_WAIT_DEVICE_NOT_AVAILABLE() IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_CR0_INPUT()
492#define IEM_MC_MAYBE_RAISE_FPU_XCPT() IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_FSW_INPUT()
493#define IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT() \
494 IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_CR0_INPUT(); IEM_LIVENESS_CR4_INPUT(); IEM_LIVENESS_XCR0_INPUT()
495#define IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT() \
496 IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_CR0_INPUT(); IEM_LIVENESS_CR4_INPUT()
497#define IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT() \
498 IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_CR0_INPUT(); IEM_LIVENESS_FSW_INPUT()
499#define IEM_MC_RAISE_GP0_IF_CPL_NOT_ZERO() IEM_LIVENESS_MARK_XCPT_OR_CALL()
500#define IEM_MC_RAISE_GP0_IF_EFF_ADDR_UNALIGNED(a_EffAddr, a_cbAlign) IEM_LIVENESS_MARK_XCPT_OR_CALL()
501#define IEM_MC_MAYBE_RAISE_FSGSBASE_XCPT() IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_CR4_INPUT()
502#define IEM_MC_MAYBE_RAISE_NON_CANONICAL_ADDR_GP0(a_u64Addr) IEM_LIVENESS_MARK_XCPT_OR_CALL()
503
504#define IEM_MC_LOCAL(a_Type, a_Name) NOP()
505#define IEM_MC_LOCAL_ASSIGN(a_Type, a_Name, a_Value) NOP()
506#define IEM_MC_LOCAL_CONST(a_Type, a_Name, a_Value) NOP()
507#define IEM_MC_NOREF(a_Name) NOP()
508#define IEM_MC_ARG(a_Type, a_Name, a_iArg) NOP()
509#define IEM_MC_ARG_CONST(a_Type, a_Name, a_Value, a_iArg) NOP()
510#define IEM_MC_ARG_LOCAL_REF(a_Type, a_Name, a_Local, a_iArg) NOP()
511
512#undef IEM_MC_COMMIT_EFLAGS /* unused here */
513#define IEM_MC_COMMIT_EFLAGS_EX(a_EFlags, a_fEflInput, a_fEflOutput) do { \
514 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_CF, fEflCf); \
515 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_PF, fEflPf); \
516 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_AF, fEflAf); \
517 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_ZF, fEflZf); \
518 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_SF, fEflSf); \
519 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_OF, fEflOf); \
520 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, ~X86_EFL_STATUS_BITS, fEflOther); \
521 Assert(!( ((a_fEflInput) | (a_fEflOutput)) \
522 & ~(uint32_t)(X86_EFL_STATUS_BITS | X86_EFL_DF | X86_EFL_VM | X86_EFL_VIF | X86_EFL_IOPL))); \
523 } while (0)
524#undef IEM_MC_COMMIT_EFLAGS_OPT /* unused here */
525#define IEM_MC_COMMIT_EFLAGS_OPT_EX(a_EFlags, a_fEflInput, a_fEflOutput) \
526 IEM_MC_COMMIT_EFLAGS_EX(a_EFlags, a_fEflInput, a_fEflOutput)
527
528#define IEM_MC_ASSIGN_TO_SMALLER(a_VarDst, a_VarSrcEol) NOP()
529
530#define IEM_MC_FETCH_GREG_I16(a_i16Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg)
531#define IEM_MC_FETCH_GREG_U16(a_u16Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg)
532#define IEM_MC_FETCH_GREG_U16_ZX_U32(a_u32Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg)
533#define IEM_MC_FETCH_GREG_U16_ZX_U64(a_u64Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg)
534#define IEM_MC_FETCH_GREG_U16_SX_U32(a_u32Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg)
535#define IEM_MC_FETCH_GREG_U16_SX_U64(a_u64Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg)
536#define IEM_MC_FETCH_GREG_I32(a_i32Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg)
537#define IEM_MC_FETCH_GREG_U32(a_u32Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg)
538#define IEM_MC_FETCH_GREG_U32_ZX_U64(a_u64Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg)
539#define IEM_MC_FETCH_GREG_U32_SX_U64(a_u64Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg)
540#define IEM_MC_FETCH_GREG_U64(a_u64Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT(a_iGReg)
541#define IEM_MC_FETCH_GREG_U64_ZX_U64 IEM_MC_FETCH_GREG_U64
542#define IEM_MC_FETCH_GREG_PAIR_U32(a_u64Dst, a_iGRegLo, a_iGRegHi) \
543 do { IEM_LIVENESS_GPR_INPUT(a_iGRegLo); IEM_LIVENESS_GPR_INPUT(a_iGRegHi); } while(0)
544#define IEM_MC_FETCH_GREG_PAIR_U64(a_u128Dst, a_iGRegLo, a_iGRegHi) \
545 do { IEM_LIVENESS_GPR_INPUT(a_iGRegLo); IEM_LIVENESS_GPR_INPUT(a_iGRegHi); } while(0)
546#define IEM_MC_FETCH_SREG_U16(a_u16Dst, a_iSReg) IEM_LIVENESS_SEG_SEL_INPUT(a_iSReg)
547#define IEM_MC_FETCH_SREG_ZX_U32(a_u32Dst, a_iSReg) IEM_LIVENESS_SEG_SEL_INPUT(a_iSReg)
548#define IEM_MC_FETCH_SREG_ZX_U64(a_u64Dst, a_iSReg) IEM_LIVENESS_SEG_SEL_INPUT(a_iSReg)
549#define IEM_MC_FETCH_SREG_BASE_U64(a_u64Dst, a_iSReg) IEM_LIVENESS_SEG_BASE_INPUT(a_iSReg)
550#define IEM_MC_FETCH_SREG_BASE_U32(a_u32Dst, a_iSReg) IEM_LIVENESS_SEG_BASE_INPUT(a_iSReg)
551#undef IEM_MC_FETCH_EFLAGS /* unused here */
552#define IEM_MC_FETCH_EFLAGS_EX(a_EFlags, a_fEflInput, a_fEflOutput) do { \
553 /* IEM_MC_COMMIT_EFLAGS_EX doesn't cover input-only situations. This OTOH, leads \
554 to duplication in many cases, but the compiler's optimizers should help with that. */ \
555 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_CF, fEflCf); \
556 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_PF, fEflPf); \
557 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_AF, fEflAf); \
558 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_ZF, fEflZf); \
559 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_SF, fEflSf); \
560 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_OF, fEflOf); \
561 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, ~X86_EFL_STATUS_BITS, fEflOther); \
562 Assert(!( ((a_fEflInput) | (a_fEflOutput)) \
563 & ~(uint32_t)(X86_EFL_STATUS_BITS | X86_EFL_DF | X86_EFL_VM | X86_EFL_VIF | X86_EFL_IOPL))); \
564 } while (0)
565#define IEM_MC_FETCH_EFLAGS_U8(a_EFlags) do { \
566 IEM_LIVENESS_ONE_EFLAGS_INPUT(u2Cf); \
567 IEM_LIVENESS_ONE_EFLAGS_INPUT(u2Pf); \
568 IEM_LIVENESS_ONE_EFLAGS_INPUT(u2Af); \
569 IEM_LIVENESS_ONE_EFLAGS_INPUT(u2Zf); \
570 IEM_LIVENESS_ONE_EFLAGS_INPUT(u2Sf); \
571 } while (0)
572
573#define IEM_MC_FETCH_FSW(a_u16Fsw) IEM_LIVENESS_FSW_INPUT()
574#define IEM_MC_FETCH_FCW(a_u16Fcw) IEM_LIVENESS_FCW_INPUT()
575
576#define IEM_MC_STORE_GREG_U16(a_iGReg, a_u16Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
577#define IEM_MC_STORE_GREG_U32(a_iGReg, a_u32Value) IEM_LIVENESS_GPR_CLOBBER(a_iGReg)
578#define IEM_MC_STORE_GREG_I32(a_iGReg, a_i32Value) IEM_LIVENESS_GPR_CLOBBER(a_iGReg)
579#define IEM_MC_STORE_GREG_U64(a_iGReg, a_u64Value) IEM_LIVENESS_GPR_CLOBBER(a_iGReg)
580#define IEM_MC_STORE_GREG_I64(a_iGReg, a_i64Value) IEM_LIVENESS_GPR_CLOBBER(a_iGReg)
581#define IEM_MC_STORE_GREG_U16_CONST(a_iGReg, a_u16Const) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
582#define IEM_MC_STORE_GREG_U32_CONST(a_iGReg, a_u32Const) IEM_LIVENESS_GPR_CLOBBER(a_iGReg)
583#define IEM_MC_STORE_GREG_U64_CONST(a_iGReg, a_u32Const) IEM_LIVENESS_GPR_CLOBBER(a_iGReg)
584#define IEM_MC_STORE_GREG_PAIR_U32(a_iGRegLo, a_iGRegHi, a_u64Value) \
585 do { IEM_LIVENESS_GPR_CLOBBER(a_iGRegLo); IEM_LIVENESS_GPR_CLOBBER(a_iGRegHi); } while(0)
586#define IEM_MC_STORE_GREG_PAIR_U64(a_iGRegLo, a_iGRegHi, a_u128Value) \
587 do { IEM_LIVENESS_GPR_CLOBBER(a_iGRegLo); IEM_LIVENESS_GPR_CLOBBER(a_iGRegHi); } while(0)
588#define IEM_MC_CLEAR_HIGH_GREG_U64(a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg) /** @todo This isn't always the case... */
589
590#define IEM_MC_STORE_SREG_BASE_U64(a_iSReg, a_u64Value) IEM_LIVENESS_SEG_BASE_CLOBBER(a_iSReg)
591#define IEM_MC_STORE_SREG_BASE_U32(a_iSReg, a_u32Value) IEM_LIVENESS_SEG_BASE_CLOBBER(a_iSReg)
592#define IEM_MC_STORE_FPUREG_R80_SRC_REF(a_iSt, a_pr80Src) NOP()
593
594
595#define IEM_MC_REF_GREG_U16(a_pu16Dst, a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
596#define IEM_MC_REF_GREG_U16_CONST(a_pu16Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT( a_iGReg)
597#define IEM_MC_REF_GREG_U32(a_pu32Dst, a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
598#define IEM_MC_REF_GREG_U32_CONST(a_pu32Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT( a_iGReg)
599#define IEM_MC_REF_GREG_I32(a_pi32Dst, a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
600#define IEM_MC_REF_GREG_I32_CONST(a_pi32Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT( a_iGReg)
601#define IEM_MC_REF_GREG_U64(a_pu64Dst, a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
602#define IEM_MC_REF_GREG_U64_CONST(a_pu64Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT( a_iGReg)
603#define IEM_MC_REF_GREG_I64(a_pi64Dst, a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
604#define IEM_MC_REF_GREG_I64_CONST(a_pi64Dst, a_iGReg) IEM_LIVENESS_GPR_INPUT( a_iGReg)
605#define IEM_MC_REF_EFLAGS(a_pEFlags) IEM_LIVENESS_ALL_EFLAGS_MODIFY()
606#undef IEM_MC_REF_EFLAGS /* unused */
607#define IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, a_fEfl, a_Member) \
608 if ((a_fEflInput) & (a_fEfl)) { \
609 if ((a_fEflOutput) & (a_fEfl)) IEM_LIVENESS_ONE_EFLAG_MODIFY(a_Member); \
610 else IEM_LIVENESS_ONE_EFLAG_INPUT(a_Member); \
611 } else if ((a_fEflOutput) & (a_fEfl)) IEM_LIVENESS_ONE_EFLAG_CLOBBER(a_Member)
612#define IEM_MC_REF_EFLAGS_EX(a_pEFlags, a_fEflInput, a_fEflOutput) do { \
613 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_CF, fEflCf); \
614 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_PF, fEflPf); \
615 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_AF, fEflAf); \
616 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_ZF, fEflZf); \
617 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_SF, fEflSf); \
618 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, X86_EFL_OF, fEflOf); \
619 IEMLIVENESS_EFL_HLP(a_fEflInput, a_fEflOutput, ~X86_EFL_STATUS_BITS, fEflOther); \
620 Assert(!( ((a_fEflInput) | (a_fEflOutput)) \
621 & ~(uint32_t)(X86_EFL_STATUS_BITS | X86_EFL_DF | X86_EFL_VM | X86_EFL_VIF | X86_EFL_IOPL))); \
622 } while (0)
623#define IEM_MC_ASSERT_EFLAGS(a_fEflInput, a_fEflOutput) NOP()
624
625
626#define IEM_MC_ADD_GREG_U16(a_iGReg, a_u16Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
627#define IEM_MC_ADD_GREG_U32(a_iGReg, a_u32Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
628#define IEM_MC_ADD_GREG_U64(a_iGReg, a_u64Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
629
630#define IEM_MC_SUB_GREG_U16(a_iGReg, a_u8Const) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
631#define IEM_MC_SUB_GREG_U32(a_iGReg, a_u8Const) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
632#define IEM_MC_SUB_GREG_U64(a_iGReg, a_u8Const) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
633#define IEM_MC_SUB_LOCAL_U16(a_u16Value, a_u16Const) NOP()
634
635#define IEM_MC_ADD_GREG_U16_TO_LOCAL(a_u16Value, a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
636#define IEM_MC_ADD_GREG_U32_TO_LOCAL(a_u32Value, a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
637#define IEM_MC_ADD_GREG_U64_TO_LOCAL(a_u64Value, a_iGReg) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
638#define IEM_MC_ADD_LOCAL_S16_TO_EFF_ADDR(a_EffAddr, a_i16) NOP()
639#define IEM_MC_ADD_LOCAL_S32_TO_EFF_ADDR(a_EffAddr, a_i32) NOP()
640#define IEM_MC_ADD_LOCAL_S64_TO_EFF_ADDR(a_EffAddr, a_i64) NOP()
641
642#define IEM_MC_AND_LOCAL_U8(a_u8Local, a_u8Mask) NOP()
643#define IEM_MC_AND_LOCAL_U16(a_u16Local, a_u16Mask) NOP()
644#define IEM_MC_AND_LOCAL_U32(a_u32Local, a_u32Mask) NOP()
645#define IEM_MC_AND_LOCAL_U64(a_u64Local, a_u64Mask) NOP()
646
647#define IEM_MC_AND_ARG_U16(a_u16Arg, a_u16Mask) NOP()
648#define IEM_MC_AND_ARG_U32(a_u32Arg, a_u32Mask) NOP()
649#define IEM_MC_AND_ARG_U64(a_u64Arg, a_u64Mask) NOP()
650
651#define IEM_MC_OR_LOCAL_U8(a_u8Local, a_u8Mask) NOP()
652#define IEM_MC_OR_LOCAL_U16(a_u16Local, a_u16Mask) NOP()
653#define IEM_MC_OR_LOCAL_U32(a_u32Local, a_u32Mask) NOP()
654
655#define IEM_MC_SAR_LOCAL_S16(a_i16Local, a_cShift) NOP()
656#define IEM_MC_SAR_LOCAL_S32(a_i32Local, a_cShift) NOP()
657#define IEM_MC_SAR_LOCAL_S64(a_i64Local, a_cShift) NOP()
658
659#define IEM_MC_SHR_LOCAL_U8(a_u8Local, a_cShift) NOP()
660
661#define IEM_MC_SHL_LOCAL_S16(a_i16Local, a_cShift) NOP()
662#define IEM_MC_SHL_LOCAL_S32(a_i32Local, a_cShift) NOP()
663#define IEM_MC_SHL_LOCAL_S64(a_i64Local, a_cShift) NOP()
664
665#define IEM_MC_AND_2LOCS_U32(a_u32Local, a_u32Mask) NOP()
666
667#define IEM_MC_OR_2LOCS_U32(a_u32Local, a_u32Mask) NOP()
668
669#define IEM_MC_AND_GREG_U16(a_iGReg, a_u16Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
670#define IEM_MC_AND_GREG_U32(a_iGReg, a_u32Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
671#define IEM_MC_AND_GREG_U64(a_iGReg, a_u64Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
672
673#define IEM_MC_OR_GREG_U16(a_iGReg, a_u16Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
674#define IEM_MC_OR_GREG_U32(a_iGReg, a_u32Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
675#define IEM_MC_OR_GREG_U64(a_iGReg, a_u64Value) IEM_LIVENESS_GPR_MODIFY(a_iGReg)
676
677#define IEM_MC_BSWAP_LOCAL_U16(a_u16Local) NOP()
678#define IEM_MC_BSWAP_LOCAL_U32(a_u32Local) NOP()
679#define IEM_MC_BSWAP_LOCAL_U64(a_u64Local) NOP()
680
681#define IEM_MC_SET_EFL_BIT(a_fBit) do { \
682 if ((a_fBit) == X86_EFL_CF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflCf); \
683 else if ((a_fBit) == X86_EFL_DF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOther); \
684 else { AssertFailed(); IEM_LIVENESS_ALL_EFLAGS_INPUT(); } \
685 } while (0)
686#define IEM_MC_CLEAR_EFL_BIT(a_fBit) do { \
687 if ((a_fBit) == X86_EFL_CF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflCf); \
688 else if ((a_fBit) == X86_EFL_DF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOther); \
689 else { AssertFailed(); IEM_LIVENESS_ALL_EFLAGS_INPUT(); } \
690 } while (0)
691#define IEM_MC_FLIP_EFL_BIT(a_fBit) do { \
692 if ((a_fBit) == X86_EFL_CF) IEM_LIVENESS_ONE_EFLAG_MODIFY(fEflCf); \
693 else { AssertFailed(); IEM_LIVENESS_ALL_EFLAGS_MODIFY(); } \
694 } while (0)
695
696#define IEM_MC_CLEAR_FSW_EX() IEM_LIVENESS_FCW_MODIFY()
697#define IEM_MC_FPU_TO_MMX_MODE() IEM_LIVENESS_FCW_MODIFY()
698#define IEM_MC_FPU_FROM_MMX_MODE() IEM_LIVENESS_FCW_MODIFY()
699
700#define IEM_MC_FETCH_MREG_U64(a_u64Value, a_iMReg) NOP()
701#define IEM_MC_FETCH_MREG_U32(a_u32Value, a_iMReg, a_iDWord) NOP()
702#define IEM_MC_FETCH_MREG_U16(a_u16Value, a_iMReg, a_iWord) NOP()
703#define IEM_MC_FETCH_MREG_U8(a_u8Value, a_iMReg, a_iByte) NOP()
704#define IEM_MC_STORE_MREG_U64(a_iMReg, a_u64Value) NOP()
705#define IEM_MC_STORE_MREG_U32(a_iMReg, a_iDword, a_u32Value) NOP()
706#define IEM_MC_STORE_MREG_U16(a_iMReg, a_iWord, a_u16Value) NOP()
707#define IEM_MC_STORE_MREG_U8(a_iMReg, a_iByte, a_u8Value) NOP()
708#define IEM_MC_STORE_MREG_U32_ZX_U64(a_iMReg, a_u32Value) NOP()
709#define IEM_MC_REF_MREG_U64(a_pu64Dst, a_iMReg) NOP()
710#define IEM_MC_REF_MREG_U64_CONST(a_pu64Dst, a_iMReg) NOP()
711#define IEM_MC_REF_MREG_U32_CONST(a_pu32Dst, a_iMReg) NOP()
712#define IEM_MC_MODIFIED_MREG(a_iMReg) NOP()
713#define IEM_MC_MODIFIED_MREG_BY_REF(a_pu64Dst) NOP()
714
715#define IEM_MC_CLEAR_XREG_U32_MASK(a_iXReg, a_bMask) NOP()
716#define IEM_MC_FETCH_XREG_U128(a_u128Value, a_iXReg) NOP()
717#define IEM_MC_FETCH_XREG_XMM(a_XmmValue, a_iXReg) NOP()
718#define IEM_MC_FETCH_XREG_U64(a_u64Value, a_iXReg, a_iQWord) NOP()
719#define IEM_MC_FETCH_XREG_R64(a_r64Value, a_iXReg, a_iQWord) NOP()
720#define IEM_MC_FETCH_XREG_U32(a_u32Value, a_iXReg, a_iDWord) NOP()
721#define IEM_MC_FETCH_XREG_R32(a_r32Value, a_iXReg, a_iDWord) NOP()
722#define IEM_MC_FETCH_XREG_U16(a_u16Value, a_iXReg, a_iWord) NOP()
723#define IEM_MC_FETCH_XREG_U8( a_u8Value, a_iXReg, a_iByte) NOP()
724#define IEM_MC_FETCH_XREG_PAIR_U128(a_Dst, a_iXReg1, a_iXReg2) NOP()
725#define IEM_MC_FETCH_XREG_PAIR_XMM(a_Dst, a_iXReg1, a_iXReg2) NOP()
726#define IEM_MC_FETCH_XREG_PAIR_U128_AND_RAX_RDX_U64(a_Dst, a_iXReg1, a_iXReg2) \
727 do { IEM_LIVENESS_GPR_INPUT(X86_GREG_xAX); IEM_LIVENESS_GPR_INPUT(X86_GREG_xDX); } while (0)
728#define IEM_MC_FETCH_XREG_PAIR_U128_AND_EAX_EDX_U32_SX_U64(a_Dst, a_iXReg1, a_iXReg2) \
729 do { IEM_LIVENESS_GPR_INPUT(X86_GREG_xAX); IEM_LIVENESS_GPR_INPUT(X86_GREG_xDX); } while (0)
730#define IEM_MC_STORE_XREG_U128(a_iXReg, a_u128Value) NOP()
731#define IEM_MC_STORE_XREG_XMM(a_iXReg, a_XmmValue) NOP()
732#define IEM_MC_STORE_XREG_XMM_U32(a_iXReg, a_iDword, a_XmmValue) NOP()
733#define IEM_MC_STORE_XREG_XMM_U64(a_iXReg, a_iQword, a_XmmValue) NOP()
734#define IEM_MC_STORE_XREG_U64(a_iXReg, a_iQword, a_u64Value) NOP()
735#define IEM_MC_STORE_XREG_U32(a_iXReg, a_iDword, a_u32Value) NOP()
736#define IEM_MC_STORE_XREG_U16(a_iXReg, a_iWord, a_u16Value) NOP()
737#define IEM_MC_STORE_XREG_U8(a_iXReg, a_iByte, a_u8Value) NOP()
738#define IEM_MC_STORE_XREG_U64_ZX_U128(a_iXReg, a_u64Value) NOP()
739#define IEM_MC_STORE_XREG_U32_U128(a_iXReg, a_iDwDst, a_u128Value, a_iDwSrc) NOP()
740#define IEM_MC_STORE_XREG_R32(a_iXReg, a_r32Value) NOP()
741#define IEM_MC_STORE_XREG_R64(a_iXReg, a_r64Value) NOP()
742#define IEM_MC_STORE_XREG_U32_ZX_U128(a_iXReg, a_u32Value) NOP()
743
744#define IEM_MC_BROADCAST_XREG_U8_ZX_VLMAX(a_iXRegDst, a_u8Src) NOP()
745#define IEM_MC_BROADCAST_XREG_U16_ZX_VLMAX(a_iXRegDst, a_u16Src) NOP()
746#define IEM_MC_BROADCAST_XREG_U32_ZX_VLMAX(a_iXRegDst, a_u32Src) NOP()
747#define IEM_MC_BROADCAST_XREG_U64_ZX_VLMAX(a_iXRegDst, a_u64Src) NOP()
748
749#define IEM_MC_REF_XREG_U128(a_pu128Dst, a_iXReg) NOP()
750#define IEM_MC_REF_XREG_XMM(a_puXmmDst, a_iXReg) NOP()
751#define IEM_MC_REF_XREG_U128_CONST(a_pu128Dst, a_iXReg) NOP()
752#define IEM_MC_REF_XREG_XMM_CONST(a_pXmmDst, a_iXReg) NOP()
753#define IEM_MC_REF_XREG_U32_CONST(a_pu32Dst, a_iXReg) NOP()
754#define IEM_MC_REF_XREG_U64_CONST(a_pu64Dst, a_iXReg) NOP()
755#define IEM_MC_REF_XREG_R32_CONST(a_pr32Dst, a_iXReg) NOP()
756#define IEM_MC_REF_XREG_R64_CONST(a_pr64Dst, a_iXReg) NOP()
757#define IEM_MC_COPY_XREG_U128(a_iXRegDst, a_iXRegSrc) NOP()
758
759#define IEM_MC_FETCH_YREG_U32(a_u32Dst, a_iYRegSrc) NOP()
760#define IEM_MC_FETCH_YREG_U64(a_u64Dst, a_iYRegSrc, a_iQWord) NOP()
761#define IEM_MC_FETCH_YREG_U128(a_u128Dst, a_iYRegSrc, a_iDQWord) NOP()
762#define IEM_MC_FETCH_YREG_U256(a_u256Dst, a_iYRegSrc) NOP()
763#define IEM_MC_FETCH_YREG_YMM(a_uYmmDst, a_iYRegSrc) NOP()
764
765#define IEM_MC_STORE_YREG_U128(a_iYRegDst, a_iDQword, a_u128Value) NOP()
766
767#define IEM_MC_INT_CLEAR_ZMM_256_UP(a_iXRegDst) NOP()
768#define IEM_MC_STORE_YREG_U32_ZX_VLMAX(a_iYRegDst, a_u32Src) NOP()
769#define IEM_MC_STORE_YREG_U64_ZX_VLMAX(a_iYRegDst, a_u64Src) NOP()
770#define IEM_MC_STORE_YREG_U128_ZX_VLMAX(a_iYRegDst, a_u128Src) NOP()
771#define IEM_MC_STORE_YREG_U256_ZX_VLMAX(a_iYRegDst, a_u256Src) NOP()
772#define IEM_MC_STORE_YREG_YMM_ZX_VLMAX(a_iYRegDst, a_uYmmSrc) NOP()
773
774#define IEM_MC_STORE_YREG_U32_U256(a_iYRegDst, a_iDwDst, a_u256Value, a_iDwSrc) NOP()
775#define IEM_MC_STORE_YREG_U64_U256(a_iYRegDst, a_iQwDst, a_u256Value, a_iQwSrc) NOP()
776#define IEM_MC_STORE_YREG_U64(a_iYRegDst, a_iQword, a_u64Value) NOP()
777
778#define IEM_MC_BROADCAST_YREG_U8_ZX_VLMAX(a_iYRegDst, a_u8Src) NOP()
779#define IEM_MC_BROADCAST_YREG_U16_ZX_VLMAX(a_iYRegDst, a_u16Src) NOP()
780#define IEM_MC_BROADCAST_YREG_U32_ZX_VLMAX(a_iYRegDst, a_u32Src) NOP()
781#define IEM_MC_BROADCAST_YREG_U64_ZX_VLMAX(a_iYRegDst, a_u64Src) NOP()
782#define IEM_MC_BROADCAST_YREG_U128_ZX_VLMAX(a_iYRegDst, a_u128Src) NOP()
783
784#define IEM_MC_REF_YREG_U128(a_pu128Dst, a_iYReg) NOP()
785#define IEM_MC_REF_YREG_U128_CONST(a_pu128Dst, a_iYReg) NOP()
786#define IEM_MC_REF_YREG_U64_CONST(a_pu64Dst, a_iYReg) NOP()
787#define IEM_MC_CLEAR_YREG_128_UP(a_iYReg) NOP()
788
789#define IEM_MC_COPY_YREG_U256_ZX_VLMAX(a_iYRegDst, a_iYRegSrc) NOP()
790#define IEM_MC_COPY_YREG_U128_ZX_VLMAX(a_iYRegDst, a_iYRegSrc) NOP()
791#define IEM_MC_COPY_YREG_U64_ZX_VLMAX(a_iYRegDst, a_iYRegSrc) NOP()
792
793#define IEM_MC_MERGE_YREG_U32_U96_ZX_VLMAX(a_iYRegDst, a_iYRegSrc32, a_iYRegSrcHx) NOP()
794#define IEM_MC_MERGE_YREG_U64_U64_ZX_VLMAX(a_iYRegDst, a_iYRegSrc64, a_iYRegSrcHx) NOP()
795#define IEM_MC_MERGE_YREG_U64LO_U64LO_ZX_VLMAX(a_iYRegDst, a_iYRegSrc64, a_iYRegSrcHx) NOP()
796#define IEM_MC_MERGE_YREG_U64HI_U64HI_ZX_VLMAX(a_iYRegDst, a_iYRegSrc64, a_iYRegSrcHx) NOP()
797#define IEM_MC_MERGE_YREG_U64LO_U64LOCAL_ZX_VLMAX(a_iYRegDst, a_iYRegSrcHx, a_u64Local) NOP()
798#define IEM_MC_MERGE_YREG_U64LOCAL_U64HI_ZX_VLMAX(a_iYRegDst, a_u64Local, a_iYRegSrcHx) NOP()
799
800#define IEM_MC_CLEAR_ZREG_256_UP(a_iYReg) NOP()
801
802#define IEM_MC_FETCH_MEM_U8(a_u8Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
803#define IEM_MC_FETCH_MEM16_U8(a_u8Dst, a_iSeg, a_GCPtrMem16) IEM_LIVENESS_MEM(a_iSeg)
804#define IEM_MC_FETCH_MEM32_U8(a_u8Dst, a_iSeg, a_GCPtrMem32) IEM_LIVENESS_MEM(a_iSeg)
805
806#define IEM_MC_FETCH_MEM_FLAT_U8(a_u8Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
807#define IEM_MC_FETCH_MEM16_FLAT_U8(a_u8Dst, a_GCPtrMem16) IEM_LIVENESS_MEM_FLAT()
808#define IEM_MC_FETCH_MEM32_FLAT_U8(a_u8Dst, a_GCPtrMem32) IEM_LIVENESS_MEM_FLAT()
809
810#define IEM_MC_FETCH_MEM_U16(a_u16Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
811#define IEM_MC_FETCH_MEM_U16_DISP(a_u16Dst, a_iSeg, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM(a_iSeg)
812#define IEM_MC_FETCH_MEM_I16(a_i16Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
813#define IEM_MC_FETCH_MEM_I16_DISP(a_i16Dst, a_iSeg, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM(a_iSeg)
814
815#define IEM_MC_FETCH_MEM_FLAT_U16(a_u16Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
816#define IEM_MC_FETCH_MEM_FLAT_U16_DISP(a_u16Dst, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM_FLAT()
817#define IEM_MC_FETCH_MEM_FLAT_I16(a_i16Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
818#define IEM_MC_FETCH_MEM_FLAT_I16_DISP(a_i16Dst, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM_FLAT()
819
820#define IEM_MC_FETCH_MEM_U32(a_u32Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
821#define IEM_MC_FETCH_MEM_U32_DISP(a_u32Dst, a_iSeg, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM(a_iSeg)
822#define IEM_MC_FETCH_MEM_I32(a_i32Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
823#define IEM_MC_FETCH_MEM_I32_DISP(a_i32Dst, a_iSeg, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM(a_iSeg)
824
825#define IEM_MC_FETCH_MEM_FLAT_U32(a_u32Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
826#define IEM_MC_FETCH_MEM_FLAT_U32_DISP(a_u32Dst, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM_FLAT()
827#define IEM_MC_FETCH_MEM_FLAT_I32(a_i32Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
828#define IEM_MC_FETCH_MEM_FLAT_I32_DISP(a_i32Dst, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM_FLAT()
829
830#define IEM_MC_FETCH_MEM_U64(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
831#define IEM_MC_FETCH_MEM_U64_DISP(a_u64Dst, a_iSeg, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM(a_iSeg)
832#define IEM_MC_FETCH_MEM_U64_ALIGN_U128(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
833#define IEM_MC_FETCH_MEM_I64(a_i64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
834
835#define IEM_MC_FETCH_MEM_FLAT_U64(a_u64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
836#define IEM_MC_FETCH_MEM_FLAT_U64_DISP(a_u64Dst, a_GCPtrMem, a_offDisp) IEM_LIVENESS_MEM_FLAT()
837#define IEM_MC_FETCH_MEM_FLAT_U64_ALIGN_U128(a_u64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
838#define IEM_MC_FETCH_MEM_FLAT_I64(a_i64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
839
840#define IEM_MC_FETCH_MEM_R32(a_r32Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
841#define IEM_MC_FETCH_MEM_R64(a_r64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
842#define IEM_MC_FETCH_MEM_R80(a_r80Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
843#define IEM_MC_FETCH_MEM_D80(a_d80Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
844
845#define IEM_MC_FETCH_MEM_FLAT_R32(a_r32Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
846#define IEM_MC_FETCH_MEM_FLAT_R64(a_r64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
847#define IEM_MC_FETCH_MEM_FLAT_R80(a_r80Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
848#define IEM_MC_FETCH_MEM_FLAT_D80(a_d80Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
849
850#define IEM_MC_FETCH_MEM_U128(a_u128Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
851#define IEM_MC_FETCH_MEM_U128_NO_AC(a_u128Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
852#define IEM_MC_FETCH_MEM_U128_ALIGN_SSE(a_u128Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
853
854#define IEM_MC_FETCH_MEM_XMM(a_XmmDst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
855#define IEM_MC_FETCH_MEM_XMM_NO_AC(a_XmmDst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
856#define IEM_MC_FETCH_MEM_XMM_ALIGN_SSE(a_XmmDst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
857
858#define IEM_MC_FETCH_MEM_FLAT_U128(a_u128Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
859#define IEM_MC_FETCH_MEM_FLAT_U128_NO_AC(a_u128Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
860#define IEM_MC_FETCH_MEM_FLAT_U128_ALIGN_SSE(a_u128Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
861
862#define IEM_MC_FETCH_MEM_FLAT_XMM(a_XmmDst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
863#define IEM_MC_FETCH_MEM_FLAT_XMM_NO_AC(a_XmmDst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
864#define IEM_MC_FETCH_MEM_FLAT_XMM_ALIGN_SSE(a_XmmDst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
865
866#define IEM_MC_FETCH_MEM_U128_AND_XREG_U128(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) IEM_LIVENESS_MEM(a_iSeg)
867#define IEM_MC_FETCH_MEM_FLAT_U128_AND_XREG_U128(a_Dst, a_iXReg1, a_GCPtrMem2) IEM_LIVENESS_MEM_FLAT()
868
869#define IEM_MC_FETCH_MEM_XMM_ALIGN_SSE_AND_XREG_XMM(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) IEM_LIVENESS_MEM(a_iSeg)
870#define IEM_MC_FETCH_MEM_FLAT_XMM_ALIGN_SSE_AND_XREG_XMM(a_Dst, a_iXReg1, a_GCPtrMem2) IEM_LIVENESS_MEM_FLAT()
871#define IEM_MC_FETCH_MEM_XMM_U32_AND_XREG_XMM(a_Dst, a_iXReg1, a_iDWord2, a_iSeg2, a_GCPtrMem2) IEM_LIVENESS_MEM(a_iSeg)
872#define IEM_MC_FETCH_MEM_FLAT_XMM_U32_AND_XREG_XMM(a_Dst, a_iXReg1, a_iDWord2, a_GCPtrMem2) IEM_LIVENESS_MEM_FLAT()
873#define IEM_MC_FETCH_MEM_XMM_U64_AND_XREG_XMM(a_Dst, a_iXReg1, a_iQWord2, a_iSeg2, a_GCPtrMem2) IEM_LIVENESS_MEM(a_iSeg)
874#define IEM_MC_FETCH_MEM_FLAT_XMM_U64_AND_XREG_XMM(a_Dst, a_iXReg1, a_iQWord2, a_GCPtrMem2) IEM_LIVENESS_MEM_FLAT()
875
876#define IEM_MC_FETCH_MEM_U128_AND_XREG_U128_AND_RAX_RDX_U64(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) \
877 do { IEM_LIVENESS_MEM(a_iSeg2); IEM_LIVENESS_GPR_INPUT(X86_GREG_xAX); IEM_LIVENESS_GPR_INPUT(X86_GREG_xDX); } while (0)
878#define IEM_MC_FETCH_MEM_U128_AND_XREG_U128_AND_EAX_EDX_U32_SX_U64(a_Dst, a_iXReg1, a_iSeg2, a_GCPtrMem2) \
879 do { IEM_LIVENESS_MEM(a_iSeg2); IEM_LIVENESS_GPR_INPUT(X86_GREG_xAX); IEM_LIVENESS_GPR_INPUT(X86_GREG_xDX); } while (0)
880
881#define IEM_MC_FETCH_MEM_FLAT_U128_AND_XREG_U128_AND_RAX_RDX_U64(a_Dst, a_iXReg1, a_GCPtrMem2) \
882 do { IEM_LIVENESS_MEM_FLAT(); IEM_LIVENESS_GPR_INPUT(X86_GREG_xAX); IEM_LIVENESS_GPR_INPUT(X86_GREG_xDX); } while (0)
883#define IEM_MC_FETCH_MEM_FLAT_U128_AND_XREG_U128_AND_EAX_EDX_U32_SX_U64(a_Dst, a_iXReg1, a_GCPtrMem2) \
884 do { IEM_LIVENESS_MEM_FLAT(); IEM_LIVENESS_GPR_INPUT(X86_GREG_xAX); IEM_LIVENESS_GPR_INPUT(X86_GREG_xDX); } while (0)
885
886
887#define IEM_MC_FETCH_MEM_U256(a_u256Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
888#define IEM_MC_FETCH_MEM_U256_NO_AC(a_u256Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
889#define IEM_MC_FETCH_MEM_U256_ALIGN_AVX(a_u256Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
890
891#define IEM_MC_FETCH_MEM_YMM(a_YmmDst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
892#define IEM_MC_FETCH_MEM_YMM_NO_AC(a_YmmDst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
893#define IEM_MC_FETCH_MEM_YMM_ALIGN_AVX(a_YmmDst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
894
895#define IEM_MC_FETCH_MEM_FLAT_U256(a_u256Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
896#define IEM_MC_FETCH_MEM_FLAT_U256_NO_AC(a_u256Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
897#define IEM_MC_FETCH_MEM_FLAT_U256_ALIGN_AVX(a_u256Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
898
899#define IEM_MC_FETCH_MEM_FLAT_YMM(a_YmmDst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
900#define IEM_MC_FETCH_MEM_FLAT_YMM_NO_AC(a_YmmDst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
901#define IEM_MC_FETCH_MEM_FLAT_YMM_ALIGN_AVX(a_YmmDst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
902
903#define IEM_MC_FETCH_MEM_U8_ZX_U16(a_u16Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
904#define IEM_MC_FETCH_MEM_U8_ZX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
905#define IEM_MC_FETCH_MEM_U8_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
906#define IEM_MC_FETCH_MEM_U16_ZX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
907#define IEM_MC_FETCH_MEM_U16_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
908#define IEM_MC_FETCH_MEM_U32_ZX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
909
910#define IEM_MC_FETCH_MEM_FLAT_U8_ZX_U16(a_u16Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
911#define IEM_MC_FETCH_MEM_FLAT_U8_ZX_U32(a_u32Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
912#define IEM_MC_FETCH_MEM_FLAT_U8_ZX_U64(a_u64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
913#define IEM_MC_FETCH_MEM_FLAT_U16_ZX_U32(a_u32Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
914#define IEM_MC_FETCH_MEM_FLAT_U16_ZX_U64(a_u64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
915#define IEM_MC_FETCH_MEM_FLAT_U32_ZX_U64(a_u64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
916
917#define IEM_MC_FETCH_MEM_U8_SX_U16(a_u16Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
918#define IEM_MC_FETCH_MEM_U8_SX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
919#define IEM_MC_FETCH_MEM_U8_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
920#define IEM_MC_FETCH_MEM_U16_SX_U32(a_u32Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
921#define IEM_MC_FETCH_MEM_U16_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
922#define IEM_MC_FETCH_MEM_U32_SX_U64(a_u64Dst, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
923
924#define IEM_MC_FETCH_MEM_FLAT_U8_SX_U16(a_u16Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
925#define IEM_MC_FETCH_MEM_FLAT_U8_SX_U32(a_u32Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
926#define IEM_MC_FETCH_MEM_FLAT_U8_SX_U64(a_u64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
927#define IEM_MC_FETCH_MEM_FLAT_U16_SX_U32(a_u32Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
928#define IEM_MC_FETCH_MEM_FLAT_U16_SX_U64(a_u64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
929#define IEM_MC_FETCH_MEM_FLAT_U32_SX_U64(a_u64Dst, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
930
931#define IEM_MC_STORE_MEM_U8(a_iSeg, a_GCPtrMem, a_u8Value) IEM_LIVENESS_MEM(a_iSeg)
932#define IEM_MC_STORE_MEM_U16(a_iSeg, a_GCPtrMem, a_u16Value) IEM_LIVENESS_MEM(a_iSeg)
933#define IEM_MC_STORE_MEM_U32(a_iSeg, a_GCPtrMem, a_u32Value) IEM_LIVENESS_MEM(a_iSeg)
934#define IEM_MC_STORE_MEM_U64(a_iSeg, a_GCPtrMem, a_u64Value) IEM_LIVENESS_MEM(a_iSeg)
935
936#define IEM_MC_STORE_MEM_FLAT_U8(a_GCPtrMem, a_u8Value) IEM_LIVENESS_MEM_FLAT()
937#define IEM_MC_STORE_MEM_FLAT_U16(a_GCPtrMem, a_u16Value) IEM_LIVENESS_MEM_FLAT()
938#define IEM_MC_STORE_MEM_FLAT_U32(a_GCPtrMem, a_u32Value) IEM_LIVENESS_MEM_FLAT()
939#define IEM_MC_STORE_MEM_FLAT_U64(a_GCPtrMem, a_u64Value) IEM_LIVENESS_MEM_FLAT()
940
941#define IEM_MC_STORE_MEM_U8_CONST(a_iSeg, a_GCPtrMem, a_u8C) IEM_LIVENESS_MEM(a_iSeg)
942#define IEM_MC_STORE_MEM_U16_CONST(a_iSeg, a_GCPtrMem, a_u16C) IEM_LIVENESS_MEM(a_iSeg)
943#define IEM_MC_STORE_MEM_U32_CONST(a_iSeg, a_GCPtrMem, a_u32C) IEM_LIVENESS_MEM(a_iSeg)
944#define IEM_MC_STORE_MEM_U64_CONST(a_iSeg, a_GCPtrMem, a_u64C) IEM_LIVENESS_MEM(a_iSeg)
945
946#define IEM_MC_STORE_MEM_FLAT_U8_CONST(a_GCPtrMem, a_u8C) IEM_LIVENESS_MEM_FLAT()
947#define IEM_MC_STORE_MEM_FLAT_U16_CONST(a_GCPtrMem, a_u16C) IEM_LIVENESS_MEM_FLAT()
948#define IEM_MC_STORE_MEM_FLAT_U32_CONST(a_GCPtrMem, a_u32C) IEM_LIVENESS_MEM_FLAT()
949#define IEM_MC_STORE_MEM_FLAT_U64_CONST(a_GCPtrMem, a_u64C) IEM_LIVENESS_MEM_FLAT()
950
951#define IEM_MC_STORE_MEM_I8_CONST_BY_REF( a_pi8Dst, a_i8C) NOP()
952#define IEM_MC_STORE_MEM_I16_CONST_BY_REF(a_pi16Dst, a_i16C) NOP()
953#define IEM_MC_STORE_MEM_I32_CONST_BY_REF(a_pi32Dst, a_i32C) NOP()
954#define IEM_MC_STORE_MEM_I64_CONST_BY_REF(a_pi64Dst, a_i64C) NOP()
955#define IEM_MC_STORE_MEM_NEG_QNAN_R32_BY_REF(a_pr32Dst) NOP()
956#define IEM_MC_STORE_MEM_NEG_QNAN_R64_BY_REF(a_pr64Dst) NOP()
957#define IEM_MC_STORE_MEM_NEG_QNAN_R80_BY_REF(a_pr80Dst) NOP()
958#define IEM_MC_STORE_MEM_INDEF_D80_BY_REF(a_pd80Dst) NOP()
959
960#define IEM_MC_STORE_MEM_U128(a_iSeg, a_GCPtrMem, a_u128Value) IEM_LIVENESS_MEM(a_iSeg)
961#define IEM_MC_STORE_MEM_U128_ALIGN_SSE(a_iSeg, a_GCPtrMem, a_u128Value) IEM_LIVENESS_MEM(a_iSeg)
962#define IEM_MC_STORE_MEM_U128_NO_AC(a_iSeg, a_GCPtrMem, a_u128Value) IEM_LIVENESS_MEM(a_iSeg)
963
964#define IEM_MC_STORE_MEM_FLAT_U128(a_GCPtrMem, a_u128Value) IEM_LIVENESS_MEM_FLAT()
965#define IEM_MC_STORE_MEM_FLAT_U128_ALIGN_SSE(a_GCPtrMem, a_u128Value) IEM_LIVENESS_MEM_FLAT()
966#define IEM_MC_STORE_MEM_FLAT_U128_NO_AC(a_GCPtrMem, a_u128Value) IEM_LIVENESS_MEM_FLAT()
967
968#define IEM_MC_STORE_MEM_U256(a_iSeg, a_GCPtrMem, a_u256Value) IEM_LIVENESS_MEM(a_iSeg)
969#define IEM_MC_STORE_MEM_U256_ALIGN_AVX(a_iSeg, a_GCPtrMem, a_u256Value) IEM_LIVENESS_MEM(a_iSeg)
970#define IEM_MC_STORE_MEM_U256_NO_AC(a_iSeg, a_GCPtrMem, a_u256Value) IEM_LIVENESS_MEM(a_iSeg)
971
972#define IEM_MC_STORE_MEM_FLAT_U256(a_GCPtrMem, a_u256Value) IEM_LIVENESS_MEM_FLAT()
973#define IEM_MC_STORE_MEM_FLAT_U256_ALIGN_AVX(a_GCPtrMem, a_u256Value) IEM_LIVENESS_MEM_FLAT()
974#define IEM_MC_STORE_MEM_FLAT_U256_NO_AC(a_GCPtrMem, a_u256Value) IEM_LIVENESS_MEM_FLAT()
975
976#define IEM_MC_PUSH_U16(a_u16Value) IEM_LIVENESS_STACK()
977#define IEM_MC_PUSH_U32(a_u32Value) IEM_LIVENESS_STACK()
978#define IEM_MC_PUSH_U32_SREG(a_uSegVal) IEM_LIVENESS_STACK()
979#define IEM_MC_PUSH_U64(a_u64Value) IEM_LIVENESS_STACK()
980
981#define IEM_MC_POP_GREG_U16(a_iGReg) do { IEM_LIVENESS_STACK(); IEM_LIVENESS_GPR_MODIFY(a_iGReg); } while (0)
982#define IEM_MC_POP_GREG_U32(a_iGReg) do { IEM_LIVENESS_STACK(); IEM_LIVENESS_GPR_CLOBBER(a_iGReg); } while (0)
983#define IEM_MC_POP_GREG_U64(a_iGReg) do { IEM_LIVENESS_STACK(); IEM_LIVENESS_GPR_CLOBBER(a_iGReg); } while (0)
984
985/* 32-bit flat stack push and pop: */
986#define IEM_MC_FLAT32_PUSH_U16(a_u16Value) IEM_LIVENESS_STACK_FLAT()
987#define IEM_MC_FLAT32_PUSH_U32(a_u32Value) IEM_LIVENESS_STACK_FLAT()
988#define IEM_MC_FLAT32_PUSH_U32_SREG(a_uSegVal) IEM_LIVENESS_STACK_FLAT()
989
990#define IEM_MC_FLAT32_POP_GREG_U16(a_iGReg) do { IEM_LIVENESS_STACK_FLAT(); IEM_LIVENESS_GPR_MODIFY(a_iGReg); } while (0)
991#define IEM_MC_FLAT32_POP_GREG_U32(a_iGReg) do { IEM_LIVENESS_STACK_FLAT(); IEM_LIVENESS_GPR_CLOBBER(a_iGReg); } while (0)
992
993/* 64-bit flat stack push and pop: */
994#define IEM_MC_FLAT64_PUSH_U16(a_u16Value) IEM_LIVENESS_STACK_FLAT()
995#define IEM_MC_FLAT64_PUSH_U64(a_u64Value) IEM_LIVENESS_STACK_FLAT()
996
997#define IEM_MC_FLAT64_POP_GREG_U16(a_iGReg) do { IEM_LIVENESS_STACK_FLAT(); IEM_LIVENESS_GPR_MODIFY(a_iGReg); } while (0)
998#define IEM_MC_FLAT64_POP_GREG_U64(a_iGReg) do { IEM_LIVENESS_STACK_FLAT(); IEM_LIVENESS_GPR_CLOBBER(a_iGReg); } while (0)
999
1000
1001#define IEM_MC_MEM_MAP_U8_ATOMIC(a_pu8Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1002#define IEM_MC_MEM_MAP_U8_RW(a_pu8Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1003#define IEM_MC_MEM_MAP_U8_WO(a_pu8Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1004#define IEM_MC_MEM_MAP_U8_RO(a_pu8Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1005#define IEM_MC_MEM_FLAT_MAP_U8_ATOMIC(a_pu8Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1006#define IEM_MC_MEM_FLAT_MAP_U8_RW(a_pu8Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1007#define IEM_MC_MEM_FLAT_MAP_U8_WO(a_pu8Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1008#define IEM_MC_MEM_FLAT_MAP_U8_RO(a_pu8Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1009#define IEM_MC_MEM_MAP_U16_ATOMIC(a_pu16Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1010#define IEM_MC_MEM_MAP_U16_RW(a_pu16Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1011#define IEM_MC_MEM_MAP_U16_WO(a_pu16Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1012#define IEM_MC_MEM_MAP_U16_RO(a_pu16Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1013#define IEM_MC_MEM_FLAT_MAP_U16_ATOMIC(a_pu16Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1014#define IEM_MC_MEM_FLAT_MAP_U16_RW(a_pu16Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1015#define IEM_MC_MEM_FLAT_MAP_U16_WO(a_pu16Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1016#define IEM_MC_MEM_FLAT_MAP_U16_RO(a_pu16Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1017#define IEM_MC_MEM_MAP_I16_WO(a_pi16Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1018#define IEM_MC_MEM_FLAT_MAP_I16_WO(a_pi16Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1019#define IEM_MC_MEM_MAP_U32_ATOMIC(a_pu32Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1020#define IEM_MC_MEM_MAP_U32_RW(a_pu32Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1021#define IEM_MC_MEM_MAP_U32_WO(a_pu32Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1022#define IEM_MC_MEM_MAP_U32_RO(a_pu32Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1023#define IEM_MC_MEM_FLAT_MAP_U32_ATOMIC(a_pu32Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1024#define IEM_MC_MEM_FLAT_MAP_U32_RW(a_pu32Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1025#define IEM_MC_MEM_FLAT_MAP_U32_WO(a_pu32Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1026#define IEM_MC_MEM_FLAT_MAP_U32_RO(a_pu32Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1027#define IEM_MC_MEM_MAP_I32_WO(a_pi32Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1028#define IEM_MC_MEM_FLAT_MAP_I32_WO(a_pi32Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1029#define IEM_MC_MEM_MAP_R32_WO(a_pr32Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1030#define IEM_MC_MEM_FLAT_MAP_R32_WO(a_pr32Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1031#define IEM_MC_MEM_MAP_U64_ATOMIC(a_pu64Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1032#define IEM_MC_MEM_MAP_U64_RW(a_pu64Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1033#define IEM_MC_MEM_MAP_U64_WO(a_pu64Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1034#define IEM_MC_MEM_MAP_U64_RO(a_pu64Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1035#define IEM_MC_MEM_FLAT_MAP_U64_ATOMIC(a_pu64Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1036#define IEM_MC_MEM_FLAT_MAP_U64_RW(a_pu64Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1037#define IEM_MC_MEM_FLAT_MAP_U64_WO(a_pu64Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1038#define IEM_MC_MEM_FLAT_MAP_U64_RO(a_pu64Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1039#define IEM_MC_MEM_MAP_I64_WO(a_pi64Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1040#define IEM_MC_MEM_FLAT_MAP_I64_WO(a_pi64Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1041#define IEM_MC_MEM_MAP_R64_WO(a_pr64Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1042#define IEM_MC_MEM_FLAT_MAP_R64_WO(a_pr64Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1043#define IEM_MC_MEM_MAP_U128_ATOMIC(a_pu128Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1044#define IEM_MC_MEM_MAP_U128_RW(a_pu128Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1045#define IEM_MC_MEM_MAP_U128_WO(a_pu128Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1046#define IEM_MC_MEM_MAP_U128_RO(a_pu128Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1047#define IEM_MC_MEM_FLAT_MAP_U128_ATOMIC(a_pu128Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1048#define IEM_MC_MEM_FLAT_MAP_U128_RW(a_pu128Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1049#define IEM_MC_MEM_FLAT_MAP_U128_WO(a_pu128Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1050#define IEM_MC_MEM_FLAT_MAP_U128_RO(a_pu128Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1051#define IEM_MC_MEM_MAP_R80_WO(a_pr80Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1052#define IEM_MC_MEM_FLAT_MAP_R80_WO(a_pr80Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1053#define IEM_MC_MEM_MAP_D80_WO(a_pd80Mem, a_bUnmapInfo, a_iSeg, a_GCPtrMem) IEM_LIVENESS_MEM(a_iSeg)
1054#define IEM_MC_MEM_FLAT_MAP_D80_WO(a_pd80Mem, a_bUnmapInfo, a_GCPtrMem) IEM_LIVENESS_MEM_FLAT()
1055
1056
1057#define IEM_MC_MEM_COMMIT_AND_UNMAP_RW(a_bMapInfo) NOP()
1058#define IEM_MC_MEM_COMMIT_AND_UNMAP_ATOMIC(a_bMapInfo) NOP()
1059#define IEM_MC_MEM_COMMIT_AND_UNMAP_WO(a_bMapInfo) NOP()
1060#define IEM_MC_MEM_COMMIT_AND_UNMAP_RO(a_bMapInfo) NOP()
1061#define IEM_MC_MEM_COMMIT_AND_UNMAP_FOR_FPU_STORE_WO(a_bMapInfo, a_u16FSW) NOP()
1062#define IEM_MC_MEM_ROLLBACK_AND_UNMAP_WO(a_bMapInfo) NOP()
1063
1064#define IEM_MC_NATIVE_IF(a_fSupportedHosts) {
1065#define IEM_MC_NATIVE_ELSE() } {
1066#define IEM_MC_NATIVE_ENDIF() } ((void)0)
1067
1068#define IEM_MC_NATIVE_EMIT_0(a_fnEmitter)
1069#define IEM_MC_NATIVE_EMIT_1(a_fnEmitter, a0) NOP()
1070#define IEM_MC_NATIVE_EMIT_2(a_fnEmitter, a0, a1) NOP()
1071#define IEM_MC_NATIVE_EMIT_2_EX(a_fnEmitter, a0, a1) NOP()
1072#define IEM_MC_NATIVE_EMIT_3(a_fnEmitter, a0, a1, a2) NOP()
1073#define IEM_MC_NATIVE_EMIT_4(a_fnEmitter, a0, a1, a2, a3) NOP()
1074#define IEM_MC_NATIVE_EMIT_5(a_fnEmitter, a0, a1, a2, a3, a4) NOP()
1075#define IEM_MC_NATIVE_EMIT_6(a_fnEmitter, a0, a1, a2, a3, a4, a5) NOP()
1076#define IEM_MC_NATIVE_EMIT_7(a_fnEmitter, a0, a1, a2, a3, a4, a5, a6) NOP()
1077#define IEM_MC_NATIVE_EMIT_8(a_fnEmitter, a0, a1, a2, a3, a4, a5, a6, a7) NOP()
1078
1079#define IEM_MC_NATIVE_SET_AMD64_HOST_REG_FOR_LOCAL(a_VarNm, a_idxHostReg) NOP()
1080
1081#define IEM_MC_CALL_VOID_AIMPL_0(a_pfn) NOP()
1082#define IEM_MC_CALL_VOID_AIMPL_1(a_pfn, a0) NOP()
1083#define IEM_MC_CALL_VOID_AIMPL_2(a_pfn, a0, a1) NOP()
1084#define IEM_MC_CALL_VOID_AIMPL_3(a_pfn, a0, a1, a2) NOP()
1085#define IEM_MC_CALL_VOID_AIMPL_4(a_pfn, a0, a1, a2, a3) NOP()
1086#define IEM_MC_CALL_AIMPL_3(a_rcType, a_rc, a_pfn, a0, a1, a2) NOP()
1087#define IEM_MC_CALL_AIMPL_4(a_rcType, a_rc, a_pfn, a0, a1, a2, a3) NOP()
1088
1089#define IEM_MC_CALL_FPU_AIMPL_1(a_pfnAImpl, a0) NOP()
1090#define IEM_MC_CALL_FPU_AIMPL_2(a_pfnAImpl, a0, a1) NOP()
1091#define IEM_MC_CALL_FPU_AIMPL_3(a_pfnAImpl, a0, a1, a2) NOP()
1092
1093#define IEM_MC_SET_FPU_RESULT(a_FpuData, a_FSW, a_pr80Value) NOP()
1094
1095#define IEM_MC_PUSH_FPU_RESULT(a_FpuData, a_uFpuOpcode) NOP()
1096#define IEM_MC_PUSH_FPU_RESULT_MEM_OP(a_FpuData, a_iEffSeg, a_GCPtrEff, a_uFpuOpcode) NOP()
1097#define IEM_MC_PUSH_FPU_RESULT_TWO(a_FpuDataTwo, a_uFpuOpcode) NOP()
1098
1099#define IEM_MC_STORE_FPU_RESULT(a_FpuData, a_iStReg, a_uFpuOpcode) NOP()
1100#define IEM_MC_STORE_FPU_RESULT_THEN_POP(a_FpuData, a_iStReg, a_uFpuOpcode) NOP()
1101#define IEM_MC_STORE_FPU_RESULT_MEM_OP(a_FpuData, a_iStReg, a_iEffSeg, a_GCPtrEff, a_uFpuOpcode) NOP()
1102#define IEM_MC_STORE_FPU_RESULT_WITH_MEM_OP_THEN_POP(a_FpuData, a_iStReg, a_iEffSeg, a_GCPtrEff, a_uFpuOpcode) NOP()
1103
1104#define IEM_MC_UPDATE_FPU_OPCODE_IP(a_uFpuOpcode) NOP()
1105#define IEM_MC_FPU_STACK_FREE(a_iStReg) NOP()
1106#define IEM_MC_FPU_STACK_INC_TOP() NOP()
1107#define IEM_MC_FPU_STACK_DEC_TOP() NOP()
1108
1109#define IEM_MC_UPDATE_FSW(a_u16FSW, a_uFpuOpcode) NOP()
1110#define IEM_MC_UPDATE_FSW_CONST(a_u16FSW, a_uFpuOpcode) NOP()
1111#define IEM_MC_UPDATE_FSW_WITH_MEM_OP(a_u16FSW, a_iEffSeg, a_GCPtrEff, a_uFpuOpcode) NOP()
1112#define IEM_MC_UPDATE_FSW_THEN_POP(a_u16FSW, a_uFpuOpcode) NOP()
1113#define IEM_MC_UPDATE_FSW_WITH_MEM_OP_THEN_POP(a_u16FSW, a_iEffSeg, a_GCPtrEff, a_uFpuOpcode) NOP()
1114#define IEM_MC_UPDATE_FSW_THEN_POP_POP(a_u16FSW, a_uFpuOpcode) NOP()
1115
1116#define IEM_MC_FPU_STACK_UNDERFLOW(a_iStDst, a_uFpuOpcode) NOP()
1117#define IEM_MC_FPU_STACK_UNDERFLOW_THEN_POP(a_iStDst, a_uFpuOpcode) NOP()
1118#define IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP(a_iStDst, a_iEffSeg, a_GCPtrEff, a_uFpuOpcode) NOP()
1119#define IEM_MC_FPU_STACK_UNDERFLOW_MEM_OP_THEN_POP(a_iStDst, a_iEffSeg, a_GCPtrEff, a_uFpuOpcode) NOP()
1120#define IEM_MC_FPU_STACK_UNDERFLOW_THEN_POP_POP(a_uFpuOpcode) NOP()
1121#define IEM_MC_FPU_STACK_PUSH_UNDERFLOW(a_uFpuOpcode) NOP()
1122#define IEM_MC_FPU_STACK_PUSH_UNDERFLOW_TWO(a_uFpuOpcode) NOP()
1123
1124#define IEM_MC_FPU_STACK_PUSH_OVERFLOW(a_uFpuOpcode) NOP()
1125#define IEM_MC_FPU_STACK_PUSH_OVERFLOW_MEM_OP(a_iEffSeg, a_GCPtrEff, a_uFpuOpcode) NOP()
1126
1127#define IEM_MC_PREPARE_FPU_USAGE() IEM_LIVENESS_MXCSR_INPUT() /* fxrstor */
1128#define IEM_MC_ACTUALIZE_FPU_STATE_FOR_READ() IEM_LIVENESS_MXCSR_INPUT()
1129#define IEM_MC_ACTUALIZE_FPU_STATE_FOR_CHANGE() IEM_LIVENESS_MXCSR_INPUT()
1130
1131#define IEM_MC_PREPARE_SSE_USAGE() IEM_LIVENESS_MXCSR_INPUT()
1132#define IEM_MC_ACTUALIZE_SSE_STATE_FOR_READ() IEM_LIVENESS_MXCSR_INPUT()
1133#define IEM_MC_ACTUALIZE_SSE_STATE_FOR_CHANGE() IEM_LIVENESS_MXCSR_INPUT()
1134
1135#define IEM_MC_PREPARE_AVX_USAGE() IEM_LIVENESS_MXCSR_INPUT()
1136#define IEM_MC_ACTUALIZE_AVX_STATE_FOR_READ() IEM_LIVENESS_MXCSR_INPUT()
1137#define IEM_MC_ACTUALIZE_AVX_STATE_FOR_CHANGE() IEM_LIVENESS_MXCSR_INPUT()
1138
1139#define IEM_MC_CALL_MMX_AIMPL_2(a_pfnAImpl, a0, a1) NOP()
1140#define IEM_MC_CALL_MMX_AIMPL_3(a_pfnAImpl, a0, a1, a2) NOP()
1141#define IEM_MC_CALL_SSE_AIMPL_2(a_pfnAImpl, a0, a1) IEM_LIVENESS_MXCSR_MODIFY(); IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_CR4_INPUT()
1142#define IEM_MC_CALL_SSE_AIMPL_3(a_pfnAImpl, a0, a1, a2) IEM_LIVENESS_MXCSR_MODIFY(); IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_CR4_INPUT()
1143#define IEM_MC_CALL_AVX_AIMPL_2(a_pfnAImpl, a0, a1) IEM_LIVENESS_MXCSR_MODIFY(); IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_CR4_INPUT()
1144#define IEM_MC_CALL_AVX_AIMPL_3(a_pfnAImpl, a0, a1, a2) IEM_LIVENESS_MXCSR_MODIFY(); IEM_LIVENESS_MARK_XCPT_OR_CALL(); IEM_LIVENESS_CR4_INPUT()
1145
1146#define IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit) \
1147 do { if ( (a_fBit) == X86_EFL_CF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflCf); \
1148 else if ((a_fBit) == X86_EFL_PF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflPf); \
1149 else if ((a_fBit) == X86_EFL_AF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflAf); \
1150 else if ((a_fBit) == X86_EFL_ZF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflZf); \
1151 else if ((a_fBit) == X86_EFL_SF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflSf); \
1152 else if ((a_fBit) == X86_EFL_OF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOf); \
1153 else if ((a_fBit) == X86_EFL_DF) IEM_LIVENESS_ONE_EFLAG_INPUT(fEflOther); /* loadsb and friends */ \
1154 else { AssertMsgFailed(("#s (%#x)\n", #a_fBit, (a_fBit))); IEM_LIVENESS_ALL_EFLAGS_INPUT(); } \
1155 } while (0)
1156
1157#define IEM_MC_IF_EFL_BIT_SET(a_fBit) IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); {
1158#define IEM_MC_IF_EFL_BIT_NOT_SET(a_fBit) IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); {
1159#define IEM_MC_IF_EFL_ANY_BITS_SET(a_fBits) \
1160 do { if ((a_fBits) == (X86_EFL_CF | X86_EFL_ZF)) \
1161 { IEM_LIVENESS_ONE_EFLAG_INPUT(fEflCf); IEM_LIVENESS_ONE_EFLAG_INPUT(fEflZf); } \
1162 else { AssertMsgFailed(("#s (%#x)\n", #a_fBits, (a_fBits))); IEM_LIVENESS_ALL_EFLAGS_INPUT(); } \
1163 } while (0); {
1164#define IEM_MC_IF_EFL_NO_BITS_SET(a_fBits) \
1165 do { if ((a_fBits) == (X86_EFL_CF | X86_EFL_ZF)) \
1166 { IEM_LIVENESS_ONE_EFLAG_INPUT(fEflCf); IEM_LIVENESS_ONE_EFLAG_INPUT(fEflZf); } \
1167 else { AssertMsgFailed(("#s (%#x)\n", #a_fBits, (a_fBits))); IEM_LIVENESS_ALL_EFLAGS_INPUT(); } \
1168 } while (0); {
1169#define IEM_MC_IF_EFL_BITS_NE(a_fBit1, a_fBit2) \
1170 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit1); \
1171 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit2); {
1172#define IEM_MC_IF_EFL_BITS_EQ(a_fBit1, a_fBit2) \
1173 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit1); \
1174 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit2); {
1175#define IEM_MC_IF_EFL_BIT_SET_OR_BITS_NE(a_fBit, a_fBit1, a_fBit2) \
1176 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); \
1177 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit1); \
1178 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit2); {
1179#define IEM_MC_IF_EFL_BIT_NOT_SET_AND_BITS_EQ(a_fBit, a_fBit1, a_fBit2) \
1180 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); \
1181 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit1); \
1182 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit2); {
1183#define IEM_MC_IF_CX_IS_NZ() IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); {
1184#define IEM_MC_IF_ECX_IS_NZ() IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); {
1185#define IEM_MC_IF_RCX_IS_NZ() IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); {
1186#define IEM_MC_IF_CX_IS_NOT_ONE() IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); {
1187#define IEM_MC_IF_ECX_IS_NOT_ONE() IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); {
1188#define IEM_MC_IF_RCX_IS_NOT_ONE() IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); {
1189#define IEM_MC_IF_CX_IS_NOT_ONE_AND_EFL_BIT_SET(a_fBit) \
1190 IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); \
1191 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); {
1192#define IEM_MC_IF_ECX_IS_NOT_ONE_AND_EFL_BIT_SET(a_fBit) \
1193 IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); \
1194 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); {
1195#define IEM_MC_IF_RCX_IS_NOT_ONE_AND_EFL_BIT_SET(a_fBit) \
1196 IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); \
1197 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); {
1198#define IEM_MC_IF_CX_IS_NOT_ONE_AND_EFL_BIT_NOT_SET(a_fBit) \
1199 IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); \
1200 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); {
1201#define IEM_MC_IF_ECX_IS_NOT_ONE_AND_EFL_BIT_NOT_SET(a_fBit) \
1202 IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); \
1203 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); {
1204#define IEM_MC_IF_RCX_IS_NOT_ONE_AND_EFL_BIT_NOT_SET(a_fBit) \
1205 IEM_LIVENESS_GPR_INPUT(X86_GREG_xCX); \
1206 IEM_LIVENESS_ONE_STATUS_EFLAG_INPUT(a_fBit); {
1207#define IEM_MC_IF_LOCAL_IS_Z(a_Local) {
1208#define IEM_MC_IF_GREG_BIT_SET(a_iGReg, a_iBitNo) IEM_LIVENESS_GPR_INPUT(a_iGReg); {
1209
1210#define IEM_MC_REF_FPUREG(a_pr80Dst, a_iSt) NOP()
1211#define IEM_MC_IF_FPUREG_IS_EMPTY(a_iSt) {
1212#define IEM_MC_IF_FPUREG_NOT_EMPTY(a_iSt) {
1213#define IEM_MC_IF_FPUREG_NOT_EMPTY_REF_R80(a_pr80Dst, a_iSt) {
1214#define IEM_MC_IF_TWO_FPUREGS_NOT_EMPTY_REF_R80(a_pr80Dst0, a_iSt0, a_pr80Dst1, a_iSt1) {
1215#define IEM_MC_IF_TWO_FPUREGS_NOT_EMPTY_REF_R80_FIRST(a_pr80Dst0, a_iSt0, a_iSt1) {
1216#define IEM_MC_IF_FCW_IM() {
1217
1218#define IEM_MC_ELSE() } /*else*/ {
1219#define IEM_MC_ENDIF() } do {} while (0)
1220
1221#define IEM_MC_HINT_FLUSH_GUEST_SHADOW(g_fGstShwFlush) NOP()
1222
1223
1224/*********************************************************************************************************************************
1225* The threaded functions. *
1226*********************************************************************************************************************************/
1227#include "IEMNativeLiveness.cpp.h"
1228
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