IEMAllAImplC.cpp@ 62338

Last change on this file since 62338 was 62338, checked in by vboxsync, 8 years ago
IEM: Improved return codes.
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1	/* $Id: IEMAllAImplC.cpp 62338 2016-07-20 07:53:42Z vboxsync $ */
2	/** @file
3	* IEM - Instruction Implementation in Assembly, portable C variant.
4	*/
5
6	/*
7	* Copyright (C) 2011-2015 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18
19	/*********************************************************************************************************************************
20	* Header Files *
21	*********************************************************************************************************************************/
22	#include "IEMInternal.h"
23	#include <VBox/vmm/vm.h>
24	#include <iprt/x86.h>
25
26
27	/*********************************************************************************************************************************
28	* Global Variables *
29	*********************************************************************************************************************************/
30	/**
31	* Parity calculation table.
32	*
33	* The generator code:
34	* @code
35	* #include <stdio.h>
36	*
37	* int main()
38	* {
39	* unsigned b;
40	* for (b = 0; b < 256; b++)
41	* {
42	* int cOnes = ( b & 1)
43	* + ((b >> 1) & 1)
44	* + ((b >> 2) & 1)
45	* + ((b >> 3) & 1)
46	* + ((b >> 4) & 1)
47	* + ((b >> 5) & 1)
48	* + ((b >> 6) & 1)
49	* + ((b >> 7) & 1);
50	* printf(" /" "* %#04x = %u%u%u%u%u%u%u%ub *" "/ %s,\n",
51	* b,
52	* (b >> 7) & 1,
53	* (b >> 6) & 1,
54	* (b >> 5) & 1,
55	* (b >> 4) & 1,
56	* (b >> 3) & 1,
57	* (b >> 2) & 1,
58	* (b >> 1) & 1,
59	* b & 1,
60	* cOnes & 1 ? "0" : "X86_EFL_PF");
61	* }
62	* return 0;
63	* }
64	* @endcode
65	*/
66	static uint8_t const g_afParity[256] =
67	{
68	/* 0000 = 00000000b */ X86_EFL_PF,
69	/* 0x01 = 00000001b */ 0,
70	/* 0x02 = 00000010b */ 0,
71	/* 0x03 = 00000011b */ X86_EFL_PF,
72	/* 0x04 = 00000100b */ 0,
73	/* 0x05 = 00000101b */ X86_EFL_PF,
74	/* 0x06 = 00000110b */ X86_EFL_PF,
75	/* 0x07 = 00000111b */ 0,
76	/* 0x08 = 00001000b */ 0,
77	/* 0x09 = 00001001b */ X86_EFL_PF,
78	/* 0x0a = 00001010b */ X86_EFL_PF,
79	/* 0x0b = 00001011b */ 0,
80	/* 0x0c = 00001100b */ X86_EFL_PF,
81	/* 0x0d = 00001101b */ 0,
82	/* 0x0e = 00001110b */ 0,
83	/* 0x0f = 00001111b */ X86_EFL_PF,
84	/* 0x10 = 00010000b */ 0,
85	/* 0x11 = 00010001b */ X86_EFL_PF,
86	/* 0x12 = 00010010b */ X86_EFL_PF,
87	/* 0x13 = 00010011b */ 0,
88	/* 0x14 = 00010100b */ X86_EFL_PF,
89	/* 0x15 = 00010101b */ 0,
90	/* 0x16 = 00010110b */ 0,
91	/* 0x17 = 00010111b */ X86_EFL_PF,
92	/* 0x18 = 00011000b */ X86_EFL_PF,
93	/* 0x19 = 00011001b */ 0,
94	/* 0x1a = 00011010b */ 0,
95	/* 0x1b = 00011011b */ X86_EFL_PF,
96	/* 0x1c = 00011100b */ 0,
97	/* 0x1d = 00011101b */ X86_EFL_PF,
98	/* 0x1e = 00011110b */ X86_EFL_PF,
99	/* 0x1f = 00011111b */ 0,
100	/* 0x20 = 00100000b */ 0,
101	/* 0x21 = 00100001b */ X86_EFL_PF,
102	/* 0x22 = 00100010b */ X86_EFL_PF,
103	/* 0x23 = 00100011b */ 0,
104	/* 0x24 = 00100100b */ X86_EFL_PF,
105	/* 0x25 = 00100101b */ 0,
106	/* 0x26 = 00100110b */ 0,
107	/* 0x27 = 00100111b */ X86_EFL_PF,
108	/* 0x28 = 00101000b */ X86_EFL_PF,
109	/* 0x29 = 00101001b */ 0,
110	/* 0x2a = 00101010b */ 0,
111	/* 0x2b = 00101011b */ X86_EFL_PF,
112	/* 0x2c = 00101100b */ 0,
113	/* 0x2d = 00101101b */ X86_EFL_PF,
114	/* 0x2e = 00101110b */ X86_EFL_PF,
115	/* 0x2f = 00101111b */ 0,
116	/* 0x30 = 00110000b */ X86_EFL_PF,
117	/* 0x31 = 00110001b */ 0,
118	/* 0x32 = 00110010b */ 0,
119	/* 0x33 = 00110011b */ X86_EFL_PF,
120	/* 0x34 = 00110100b */ 0,
121	/* 0x35 = 00110101b */ X86_EFL_PF,
122	/* 0x36 = 00110110b */ X86_EFL_PF,
123	/* 0x37 = 00110111b */ 0,
124	/* 0x38 = 00111000b */ 0,
125	/* 0x39 = 00111001b */ X86_EFL_PF,
126	/* 0x3a = 00111010b */ X86_EFL_PF,
127	/* 0x3b = 00111011b */ 0,
128	/* 0x3c = 00111100b */ X86_EFL_PF,
129	/* 0x3d = 00111101b */ 0,
130	/* 0x3e = 00111110b */ 0,
131	/* 0x3f = 00111111b */ X86_EFL_PF,
132	/* 0x40 = 01000000b */ 0,
133	/* 0x41 = 01000001b */ X86_EFL_PF,
134	/* 0x42 = 01000010b */ X86_EFL_PF,
135	/* 0x43 = 01000011b */ 0,
136	/* 0x44 = 01000100b */ X86_EFL_PF,
137	/* 0x45 = 01000101b */ 0,
138	/* 0x46 = 01000110b */ 0,
139	/* 0x47 = 01000111b */ X86_EFL_PF,
140	/* 0x48 = 01001000b */ X86_EFL_PF,
141	/* 0x49 = 01001001b */ 0,
142	/* 0x4a = 01001010b */ 0,
143	/* 0x4b = 01001011b */ X86_EFL_PF,
144	/* 0x4c = 01001100b */ 0,
145	/* 0x4d = 01001101b */ X86_EFL_PF,
146	/* 0x4e = 01001110b */ X86_EFL_PF,
147	/* 0x4f = 01001111b */ 0,
148	/* 0x50 = 01010000b */ X86_EFL_PF,
149	/* 0x51 = 01010001b */ 0,
150	/* 0x52 = 01010010b */ 0,
151	/* 0x53 = 01010011b */ X86_EFL_PF,
152	/* 0x54 = 01010100b */ 0,
153	/* 0x55 = 01010101b */ X86_EFL_PF,
154	/* 0x56 = 01010110b */ X86_EFL_PF,
155	/* 0x57 = 01010111b */ 0,
156	/* 0x58 = 01011000b */ 0,
157	/* 0x59 = 01011001b */ X86_EFL_PF,
158	/* 0x5a = 01011010b */ X86_EFL_PF,
159	/* 0x5b = 01011011b */ 0,
160	/* 0x5c = 01011100b */ X86_EFL_PF,
161	/* 0x5d = 01011101b */ 0,
162	/* 0x5e = 01011110b */ 0,
163	/* 0x5f = 01011111b */ X86_EFL_PF,
164	/* 0x60 = 01100000b */ X86_EFL_PF,
165	/* 0x61 = 01100001b */ 0,
166	/* 0x62 = 01100010b */ 0,
167	/* 0x63 = 01100011b */ X86_EFL_PF,
168	/* 0x64 = 01100100b */ 0,
169	/* 0x65 = 01100101b */ X86_EFL_PF,
170	/* 0x66 = 01100110b */ X86_EFL_PF,
171	/* 0x67 = 01100111b */ 0,
172	/* 0x68 = 01101000b */ 0,
173	/* 0x69 = 01101001b */ X86_EFL_PF,
174	/* 0x6a = 01101010b */ X86_EFL_PF,
175	/* 0x6b = 01101011b */ 0,
176	/* 0x6c = 01101100b */ X86_EFL_PF,
177	/* 0x6d = 01101101b */ 0,
178	/* 0x6e = 01101110b */ 0,
179	/* 0x6f = 01101111b */ X86_EFL_PF,
180	/* 0x70 = 01110000b */ 0,
181	/* 0x71 = 01110001b */ X86_EFL_PF,
182	/* 0x72 = 01110010b */ X86_EFL_PF,
183	/* 0x73 = 01110011b */ 0,
184	/* 0x74 = 01110100b */ X86_EFL_PF,
185	/* 0x75 = 01110101b */ 0,
186	/* 0x76 = 01110110b */ 0,
187	/* 0x77 = 01110111b */ X86_EFL_PF,
188	/* 0x78 = 01111000b */ X86_EFL_PF,
189	/* 0x79 = 01111001b */ 0,
190	/* 0x7a = 01111010b */ 0,
191	/* 0x7b = 01111011b */ X86_EFL_PF,
192	/* 0x7c = 01111100b */ 0,
193	/* 0x7d = 01111101b */ X86_EFL_PF,
194	/* 0x7e = 01111110b */ X86_EFL_PF,
195	/* 0x7f = 01111111b */ 0,
196	/* 0x80 = 10000000b */ 0,
197	/* 0x81 = 10000001b */ X86_EFL_PF,
198	/* 0x82 = 10000010b */ X86_EFL_PF,
199	/* 0x83 = 10000011b */ 0,
200	/* 0x84 = 10000100b */ X86_EFL_PF,
201	/* 0x85 = 10000101b */ 0,
202	/* 0x86 = 10000110b */ 0,
203	/* 0x87 = 10000111b */ X86_EFL_PF,
204	/* 0x88 = 10001000b */ X86_EFL_PF,
205	/* 0x89 = 10001001b */ 0,
206	/* 0x8a = 10001010b */ 0,
207	/* 0x8b = 10001011b */ X86_EFL_PF,
208	/* 0x8c = 10001100b */ 0,
209	/* 0x8d = 10001101b */ X86_EFL_PF,
210	/* 0x8e = 10001110b */ X86_EFL_PF,
211	/* 0x8f = 10001111b */ 0,
212	/* 0x90 = 10010000b */ X86_EFL_PF,
213	/* 0x91 = 10010001b */ 0,
214	/* 0x92 = 10010010b */ 0,
215	/* 0x93 = 10010011b */ X86_EFL_PF,
216	/* 0x94 = 10010100b */ 0,
217	/* 0x95 = 10010101b */ X86_EFL_PF,
218	/* 0x96 = 10010110b */ X86_EFL_PF,
219	/* 0x97 = 10010111b */ 0,
220	/* 0x98 = 10011000b */ 0,
221	/* 0x99 = 10011001b */ X86_EFL_PF,
222	/* 0x9a = 10011010b */ X86_EFL_PF,
223	/* 0x9b = 10011011b */ 0,
224	/* 0x9c = 10011100b */ X86_EFL_PF,
225	/* 0x9d = 10011101b */ 0,
226	/* 0x9e = 10011110b */ 0,
227	/* 0x9f = 10011111b */ X86_EFL_PF,
228	/* 0xa0 = 10100000b */ X86_EFL_PF,
229	/* 0xa1 = 10100001b */ 0,
230	/* 0xa2 = 10100010b */ 0,
231	/* 0xa3 = 10100011b */ X86_EFL_PF,
232	/* 0xa4 = 10100100b */ 0,
233	/* 0xa5 = 10100101b */ X86_EFL_PF,
234	/* 0xa6 = 10100110b */ X86_EFL_PF,
235	/* 0xa7 = 10100111b */ 0,
236	/* 0xa8 = 10101000b */ 0,
237	/* 0xa9 = 10101001b */ X86_EFL_PF,
238	/* 0xaa = 10101010b */ X86_EFL_PF,
239	/* 0xab = 10101011b */ 0,
240	/* 0xac = 10101100b */ X86_EFL_PF,
241	/* 0xad = 10101101b */ 0,
242	/* 0xae = 10101110b */ 0,
243	/* 0xaf = 10101111b */ X86_EFL_PF,
244	/* 0xb0 = 10110000b */ 0,
245	/* 0xb1 = 10110001b */ X86_EFL_PF,
246	/* 0xb2 = 10110010b */ X86_EFL_PF,
247	/* 0xb3 = 10110011b */ 0,
248	/* 0xb4 = 10110100b */ X86_EFL_PF,
249	/* 0xb5 = 10110101b */ 0,
250	/* 0xb6 = 10110110b */ 0,
251	/* 0xb7 = 10110111b */ X86_EFL_PF,
252	/* 0xb8 = 10111000b */ X86_EFL_PF,
253	/* 0xb9 = 10111001b */ 0,
254	/* 0xba = 10111010b */ 0,
255	/* 0xbb = 10111011b */ X86_EFL_PF,
256	/* 0xbc = 10111100b */ 0,
257	/* 0xbd = 10111101b */ X86_EFL_PF,
258	/* 0xbe = 10111110b */ X86_EFL_PF,
259	/* 0xbf = 10111111b */ 0,
260	/* 0xc0 = 11000000b */ X86_EFL_PF,
261	/* 0xc1 = 11000001b */ 0,
262	/* 0xc2 = 11000010b */ 0,
263	/* 0xc3 = 11000011b */ X86_EFL_PF,
264	/* 0xc4 = 11000100b */ 0,
265	/* 0xc5 = 11000101b */ X86_EFL_PF,
266	/* 0xc6 = 11000110b */ X86_EFL_PF,
267	/* 0xc7 = 11000111b */ 0,
268	/* 0xc8 = 11001000b */ 0,
269	/* 0xc9 = 11001001b */ X86_EFL_PF,
270	/* 0xca = 11001010b */ X86_EFL_PF,
271	/* 0xcb = 11001011b */ 0,
272	/* 0xcc = 11001100b */ X86_EFL_PF,
273	/* 0xcd = 11001101b */ 0,
274	/* 0xce = 11001110b */ 0,
275	/* 0xcf = 11001111b */ X86_EFL_PF,
276	/* 0xd0 = 11010000b */ 0,
277	/* 0xd1 = 11010001b */ X86_EFL_PF,
278	/* 0xd2 = 11010010b */ X86_EFL_PF,
279	/* 0xd3 = 11010011b */ 0,
280	/* 0xd4 = 11010100b */ X86_EFL_PF,
281	/* 0xd5 = 11010101b */ 0,
282	/* 0xd6 = 11010110b */ 0,
283	/* 0xd7 = 11010111b */ X86_EFL_PF,
284	/* 0xd8 = 11011000b */ X86_EFL_PF,
285	/* 0xd9 = 11011001b */ 0,
286	/* 0xda = 11011010b */ 0,
287	/* 0xdb = 11011011b */ X86_EFL_PF,
288	/* 0xdc = 11011100b */ 0,
289	/* 0xdd = 11011101b */ X86_EFL_PF,
290	/* 0xde = 11011110b */ X86_EFL_PF,
291	/* 0xdf = 11011111b */ 0,
292	/* 0xe0 = 11100000b */ 0,
293	/* 0xe1 = 11100001b */ X86_EFL_PF,
294	/* 0xe2 = 11100010b */ X86_EFL_PF,
295	/* 0xe3 = 11100011b */ 0,
296	/* 0xe4 = 11100100b */ X86_EFL_PF,
297	/* 0xe5 = 11100101b */ 0,
298	/* 0xe6 = 11100110b */ 0,
299	/* 0xe7 = 11100111b */ X86_EFL_PF,
300	/* 0xe8 = 11101000b */ X86_EFL_PF,
301	/* 0xe9 = 11101001b */ 0,
302	/* 0xea = 11101010b */ 0,
303	/* 0xeb = 11101011b */ X86_EFL_PF,
304	/* 0xec = 11101100b */ 0,
305	/* 0xed = 11101101b */ X86_EFL_PF,
306	/* 0xee = 11101110b */ X86_EFL_PF,
307	/* 0xef = 11101111b */ 0,
308	/* 0xf0 = 11110000b */ X86_EFL_PF,
309	/* 0xf1 = 11110001b */ 0,
310	/* 0xf2 = 11110010b */ 0,
311	/* 0xf3 = 11110011b */ X86_EFL_PF,
312	/* 0xf4 = 11110100b */ 0,
313	/* 0xf5 = 11110101b */ X86_EFL_PF,
314	/* 0xf6 = 11110110b */ X86_EFL_PF,
315	/* 0xf7 = 11110111b */ 0,
316	/* 0xf8 = 11111000b */ 0,
317	/* 0xf9 = 11111001b */ X86_EFL_PF,
318	/* 0xfa = 11111010b */ X86_EFL_PF,
319	/* 0xfb = 11111011b */ 0,
320	/* 0xfc = 11111100b */ X86_EFL_PF,
321	/* 0xfd = 11111101b */ 0,
322	/* 0xfe = 11111110b */ 0,
323	/* 0xff = 11111111b */ X86_EFL_PF,
324	};
325
326
327	/**
328	* Calculates the signed flag value given a result and it's bit width.
329	*
330	* The signed flag (SF) is a duplication of the most significant bit in the
331	* result.
332	*
333	* @returns X86_EFL_SF or 0.
334	* @param a_uResult Unsigned result value.
335	* @param a_cBitsWidth The width of the result (8, 16, 32, 64).
336	*/
337	#define X86_EFL_CALC_SF(a_uResult, a_cBitsWidth) \
338	( (uint32_t)((a_uResult) >> ((a_cBitsWidth) - X86_EFL_SF_BIT)) & X86_EFL_SF )
339
340	/**
341	* Calculates the zero flag value given a result.
342	*
343	* The zero flag (ZF) indicates whether the result is zero or not.
344	*
345	* @returns X86_EFL_ZF or 0.
346	* @param a_uResult Unsigned result value.
347	*/
348	#define X86_EFL_CALC_ZF(a_uResult) \
349	( (uint32_t)((a_uResult) == 0) << X86_EFL_ZF_BIT )
350
351	/**
352	* Updates the status bits (CF, PF, AF, ZF, SF, and OF) after a logical op.
353	*
354	* CF and OF are defined to be 0 by logical operations. AF on the other hand is
355	* undefined. We do not set AF, as that seems to make the most sense (which
356	* probably makes it the most wrong in real life).
357	*
358	* @returns Status bits.
359	* @param a_pfEFlags Pointer to the 32-bit EFLAGS value to update.
360	* @param a_uResult Unsigned result value.
361	* @param a_cBitsWidth The width of the result (8, 16, 32, 64).
362	* @param a_fExtra Additional bits to set.
363	*/
364	#define IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(a_pfEFlags, a_uResult, a_cBitsWidth, a_fExtra) \
365	do { \
366	uint32_t fEflTmp = *(a_pfEFlags); \
367	fEflTmp &= ~X86_EFL_STATUS_BITS; \
368	fEflTmp \|= g_afParity[(a_uResult) & 0xff]; \
369	fEflTmp \|= X86_EFL_CALC_ZF(a_uResult); \
370	fEflTmp \|= X86_EFL_CALC_SF(a_uResult, a_cBitsWidth); \
371	fEflTmp \|= (a_fExtra); \
372	*(a_pfEFlags) = fEflTmp; \
373	} while (0)
374
375
376	#ifdef RT_ARCH_X86
377	/*
378	* There are a few 64-bit on 32-bit things we'd rather do in C. Actually, doing
379	* it all in C is probably safer atm., optimize what's necessary later, maybe.
380	*/
381
382
383	/* Binary ops */
384
385	IEM_DECL_IMPL_DEF(void, iemAImpl_add_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
386	{
387	uint64_t uDst = *puDst;
388	uint64_t uResult = uDst + uSrc;
389	*puDst = uResult;
390
391	/* Calc EFLAGS. */
392	uint32_t fEfl = *pfEFlags & ~X86_EFL_STATUS_BITS;
393	fEfl \|= (uResult < uDst) << X86_EFL_CF_BIT;
394	fEfl \|= g_afParity[uResult & 0xff];
395	fEfl \|= ((uint32_t)uResult ^ (uint32_t)uSrc ^ (uint32_t)uDst) & X86_EFL_AF;
396	fEfl \|= X86_EFL_CALC_ZF(uResult);
397	fEfl \|= X86_EFL_CALC_SF(uResult, 64);
398	fEfl \|= (((uDst ^ uSrc ^ RT_BIT_64(63)) & (uResult ^ uDst)) >> (64 - X86_EFL_OF_BIT)) & X86_EFL_OF;
399	*pfEFlags = fEfl;
400	}
401
402
403	IEM_DECL_IMPL_DEF(void, iemAImpl_adc_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
404	{
405	if (!(*pfEFlags & X86_EFL_CF))
406	iemAImpl_add_u64(puDst, uSrc, pfEFlags);
407	else
408	{
409	uint64_t uDst = *puDst;
410	uint64_t uResult = uDst + uSrc + 1;
411	*puDst = uResult;
412
413	/* Calc EFLAGS. */
414	/** @todo verify AF and OF calculations. */
415	uint32_t fEfl = *pfEFlags & ~X86_EFL_STATUS_BITS;
416	fEfl \|= (uResult <= uDst) << X86_EFL_CF_BIT;
417	fEfl \|= g_afParity[uResult & 0xff];
418	fEfl \|= ((uint32_t)uResult ^ (uint32_t)uSrc ^ (uint32_t)uDst) & X86_EFL_AF;
419	fEfl \|= X86_EFL_CALC_ZF(uResult);
420	fEfl \|= X86_EFL_CALC_SF(uResult, 64);
421	fEfl \|= (((uDst ^ uSrc ^ RT_BIT_64(63)) & (uResult ^ uDst)) >> (64 - X86_EFL_OF_BIT)) & X86_EFL_OF;
422	*pfEFlags = fEfl;
423	}
424	}
425
426
427	IEM_DECL_IMPL_DEF(void, iemAImpl_sub_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
428	{
429	uint64_t uDst = *puDst;
430	uint64_t uResult = uDst - uSrc;
431	*puDst = uResult;
432
433	/* Calc EFLAGS. */
434	uint32_t fEfl = *pfEFlags & ~X86_EFL_STATUS_BITS;
435	fEfl \|= (uDst < uSrc) << X86_EFL_CF_BIT;
436	fEfl \|= g_afParity[uResult & 0xff];
437	fEfl \|= ((uint32_t)uResult ^ (uint32_t)uSrc ^ (uint32_t)uDst) & X86_EFL_AF;
438	fEfl \|= X86_EFL_CALC_ZF(uResult);
439	fEfl \|= X86_EFL_CALC_SF(uResult, 64);
440	fEfl \|= (((uDst ^ uSrc) & (uResult ^ uDst)) >> (64 - X86_EFL_OF_BIT)) & X86_EFL_OF;
441	*pfEFlags = fEfl;
442	}
443
444
445	IEM_DECL_IMPL_DEF(void, iemAImpl_sbb_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
446	{
447	if (!(*pfEFlags & X86_EFL_CF))
448	iemAImpl_sub_u64(puDst, uSrc, pfEFlags);
449	else
450	{
451	uint64_t uDst = *puDst;
452	uint64_t uResult = uDst - uSrc - 1;
453	*puDst = uResult;
454
455	/* Calc EFLAGS. */
456	/** @todo verify AF and OF calculations. */
457	uint32_t fEfl = *pfEFlags & ~X86_EFL_STATUS_BITS;
458	fEfl \|= (uDst <= uSrc) << X86_EFL_CF_BIT;
459	fEfl \|= g_afParity[uResult & 0xff];
460	fEfl \|= ((uint32_t)uResult ^ (uint32_t)uSrc ^ (uint32_t)uDst) & X86_EFL_AF;
461	fEfl \|= X86_EFL_CALC_ZF(uResult);
462	fEfl \|= X86_EFL_CALC_SF(uResult, 64);
463	fEfl \|= (((uDst ^ uSrc) & (uResult ^ uDst)) >> (64 - X86_EFL_OF_BIT)) & X86_EFL_OF;
464	*pfEFlags = fEfl;
465	}
466	}
467
468
469	IEM_DECL_IMPL_DEF(void, iemAImpl_or_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
470	{
471	uint64_t uResult = *puDst \| uSrc;
472	*puDst = uResult;
473	IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uResult, 64, 0);
474	}
475
476
477	IEM_DECL_IMPL_DEF(void, iemAImpl_xor_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
478	{
479	uint64_t uResult = *puDst ^ uSrc;
480	*puDst = uResult;
481	IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uResult, 64, 0);
482	}
483
484
485	IEM_DECL_IMPL_DEF(void, iemAImpl_and_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
486	{
487	uint64_t uResult = *puDst & uSrc;
488	*puDst = uResult;
489	IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uResult, 64, 0);
490	}
491
492
493	IEM_DECL_IMPL_DEF(void, iemAImpl_cmp_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
494	{
495	uint64_t uDstTmp = *puDst;
496	iemAImpl_sub_u64(&uDstTmp, uSrc, pfEFlags);
497	}
498
499
500	IEM_DECL_IMPL_DEF(void, iemAImpl_test_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
501	{
502	uint64_t uResult = *puDst & uSrc;
503	IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uResult, 64, 0);
504	}
505
506
507	/** 64-bit locked binary operand operation. */
508	# define DO_LOCKED_BIN_OP_U64(a_Mnemonic) \
509	do { \
510	uint64_t uOld = ASMAtomicReadU64(puDst); \
511	uint64_t uTmp; \
512	uint32_t fEflTmp; \
513	do \
514	{ \
515	uTmp = uOld; \
516	fEflTmp = *pfEFlags; \
517	iemAImpl_ ## a_Mnemonic ## _u64(&uTmp, uSrc, &fEflTmp); \
518	} while (!ASMAtomicCmpXchgExU64(puDst, uTmp, uOld, &uOld)); \
519	*pfEFlags = fEflTmp; \
520	} while (0)
521
522
523	IEM_DECL_IMPL_DEF(void, iemAImpl_add_u64_locked,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
524	{
525	DO_LOCKED_BIN_OP_U64(adc);
526	}
527
528
529	IEM_DECL_IMPL_DEF(void, iemAImpl_adc_u64_locked,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
530	{
531	DO_LOCKED_BIN_OP_U64(adc);
532	}
533
534
535	IEM_DECL_IMPL_DEF(void, iemAImpl_sub_u64_locked,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
536	{
537	DO_LOCKED_BIN_OP_U64(sub);
538	}
539
540
541	IEM_DECL_IMPL_DEF(void, iemAImpl_sbb_u64_locked,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
542	{
543	DO_LOCKED_BIN_OP_U64(sbb);
544	}
545
546
547	IEM_DECL_IMPL_DEF(void, iemAImpl_or_u64_locked,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
548	{
549	DO_LOCKED_BIN_OP_U64(or);
550	}
551
552
553	IEM_DECL_IMPL_DEF(void, iemAImpl_xor_u64_locked,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
554	{
555	DO_LOCKED_BIN_OP_U64(xor);
556	}
557
558
559	IEM_DECL_IMPL_DEF(void, iemAImpl_and_u64_locked,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
560	{
561	DO_LOCKED_BIN_OP_U64(and);
562	}
563
564
565	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64,(uint64_t puDst, uint64_t puReg, uint32_t *pfEFlags))
566	{
567	uint64_t uDst = *puDst;
568	uint64_t uResult = uDst;
569	iemAImpl_add_u64(&uResult, *puReg, pfEFlags);
570	*puDst = uResult;
571	*puReg = uDst;
572	}
573
574
575	IEM_DECL_IMPL_DEF(void, iemAImpl_xadd_u64_locked,(uint64_t puDst, uint64_t puReg, uint32_t *pfEFlags))
576	{
577	uint64_t uOld = ASMAtomicReadU64(puDst);
578	uint64_t uTmpDst;
579	uint32_t fEflTmp;
580	do
581	{
582	uTmpDst = uOld;
583	fEflTmp = *pfEFlags;
584	iemAImpl_add_u64(&uTmpDst, *puReg, pfEFlags);
585	} while (!ASMAtomicCmpXchgExU64(puDst, uTmpDst, uOld, &uOld));
586	*puReg = uOld;
587	*pfEFlags = fEflTmp;
588	}
589
590
591	/* Bit operations (same signature as above). */
592
593	IEM_DECL_IMPL_DEF(void, iemAImpl_bt_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
594	{
595	/* Note! "undefined" flags: OF, SF, ZF, AF, PF. We set them as after an
596	logical operation (AND/OR/whatever). */
597	Assert(uSrc < 64);
598	uint64_t uDst = *puDst;
599	if (uDst & RT_BIT_64(uSrc))
600	IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uDst, 64, X86_EFL_CF);
601	else
602	IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uDst, 64, 0);
603	}
604
605	IEM_DECL_IMPL_DEF(void, iemAImpl_btc_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
606	{
607	/* Note! "undefined" flags: OF, SF, ZF, AF, PF. We set them as after an
608	logical operation (AND/OR/whatever). */
609	Assert(uSrc < 64);
610	uint64_t fMask = RT_BIT_64(uSrc);
611	uint64_t uDst = *puDst;
612	if (uDst & fMask)
613	{
614	uDst &= ~fMask;
615	*puDst = uDst;
616	IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uDst, 64, X86_EFL_CF);
617	}
618	else
619	{
620	uDst \|= fMask;
621	*puDst = uDst;
622	IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uDst, 64, 0);
623	}
624	}
625
626	IEM_DECL_IMPL_DEF(void, iemAImpl_btr_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
627	{
628	/* Note! "undefined" flags: OF, SF, ZF, AF, PF. We set them as after an
629	logical operation (AND/OR/whatever). */
630	Assert(uSrc < 64);
631	uint64_t fMask = RT_BIT_64(uSrc);
632	uint64_t uDst = *puDst;
633	if (uDst & fMask)
634	{
635	uDst &= ~fMask;
636	*puDst = uDst;
637	IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uDst, 64, X86_EFL_CF);
638	}
639	else
640	IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uDst, 64, 0);
641	}
642
643	IEM_DECL_IMPL_DEF(void, iemAImpl_bts_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
644	{
645	/* Note! "undefined" flags: OF, SF, ZF, AF, PF. We set them as after an
646	logical operation (AND/OR/whatever). */
647	Assert(uSrc < 64);
648	uint64_t fMask = RT_BIT_64(uSrc);
649	uint64_t uDst = *puDst;
650	if (uDst & fMask)
651	IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uDst, 64, X86_EFL_CF);
652	else
653	{
654	uDst \|= fMask;
655	*puDst = uDst;
656	IEM_EFL_UPDATE_STATUS_BITS_FOR_LOGIC(pfEFlags, uDst, 64, 0);
657	}
658	}
659
660
661	IEM_DECL_IMPL_DEF(void, iemAImpl_btc_u64_locked,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
662	{
663	DO_LOCKED_BIN_OP_U64(btc);
664	}
665
666	IEM_DECL_IMPL_DEF(void, iemAImpl_btr_u64_locked,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
667	{
668	DO_LOCKED_BIN_OP_U64(btr);
669	}
670
671	IEM_DECL_IMPL_DEF(void, iemAImpl_bts_u64_locked,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
672	{
673	DO_LOCKED_BIN_OP_U64(bts);
674	}
675
676
677	/* bit scan */
678
679	IEM_DECL_IMPL_DEF(void, iemAImpl_bsf_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
680	{
681	/* Note! "undefined" flags: OF, SF, AF, PF, CF. */
682	/** @todo check what real CPUs does. */
683	if (uSrc)
684	{
685	uint8_t iBit;
686	uint32_t u32Src;
687	if (uSrc & UINT32_MAX)
688	{
689	iBit = 0;
690	u32Src = uSrc;
691	}
692	else
693	{
694	iBit = 32;
695	u32Src = uSrc >> 32;
696	}
697	if (!(u32Src & UINT16_MAX))
698	{
699	iBit += 16;
700	u32Src >>= 16;
701	}
702	if (!(u32Src & UINT8_MAX))
703	{
704	iBit += 8;
705	u32Src >>= 8;
706	}
707	if (!(u32Src & 0xf))
708	{
709	iBit += 4;
710	u32Src >>= 4;
711	}
712	if (!(u32Src & 0x3))
713	{
714	iBit += 2;
715	u32Src >>= 2;
716	}
717	if (!(u32Src & 1))
718	{
719	iBit += 1;
720	Assert(u32Src & 2);
721	}
722
723	*puDst = iBit;
724	*pfEFlags &= ~X86_EFL_ZF;
725	}
726	else
727	*pfEFlags \|= X86_EFL_ZF;
728	}
729
730	IEM_DECL_IMPL_DEF(void, iemAImpl_bsr_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
731	{
732	/* Note! "undefined" flags: OF, SF, AF, PF, CF. */
733	/** @todo check what real CPUs does. */
734	if (uSrc)
735	{
736	uint8_t iBit;
737	uint32_t u32Src;
738	if (uSrc & UINT64_C(0xffffffff00000000))
739	{
740	iBit = 64;
741	u32Src = uSrc >> 32;
742	}
743	else
744	{
745	iBit = 32;
746	u32Src = uSrc;
747	}
748	if (!(u32Src & UINT32_C(0xffff0000)))
749	{
750	iBit -= 16;
751	u32Src <<= 16;
752	}
753	if (!(u32Src & UINT32_C(0xff000000)))
754	{
755	iBit -= 8;
756	u32Src <<= 8;
757	}
758	if (!(u32Src & UINT32_C(0xf0000000)))
759	{
760	iBit -= 4;
761	u32Src <<= 4;
762	}
763	if (!(u32Src & UINT32_C(0xc0000000)))
764	{
765	iBit -= 2;
766	u32Src <<= 2;
767	}
768	if (!(u32Src & UINT32_C(0x10000000)))
769	{
770	iBit -= 1;
771	u32Src <<= 1;
772	Assert(u32Src & RT_BIT_64(63));
773	}
774
775	*puDst = iBit;
776	*pfEFlags &= ~X86_EFL_ZF;
777	}
778	else
779	*pfEFlags \|= X86_EFL_ZF;
780	}
781
782
783	/* Unary operands. */
784
785	IEM_DECL_IMPL_DEF(void, iemAImpl_inc_u64,(uint64_t puDst, uint32_t pfEFlags))
786	{
787	uint64_t uDst = *puDst;
788	uint64_t uResult = uDst + 1;
789	*puDst = uResult;
790
791	/*
792	* Calc EFLAGS.
793	* CF is NOT modified for hysterical raisins (allegedly for carrying and
794	* borrowing in arithmetic loops on intel 8008).
795	*/
796	uint32_t fEfl = *pfEFlags & ~(X86_EFL_STATUS_BITS & ~X86_EFL_CF);
797	fEfl \|= g_afParity[uResult & 0xff];
798	fEfl \|= ((uint32_t)uResult ^ (uint32_t)uDst) & X86_EFL_AF;
799	fEfl \|= X86_EFL_CALC_ZF(uResult);
800	fEfl \|= X86_EFL_CALC_SF(uResult, 64);
801	fEfl \|= (((uDst ^ RT_BIT_64(63)) & uResult) >> (64 - X86_EFL_OF_BIT)) & X86_EFL_OF;
802	*pfEFlags = fEfl;
803	}
804
805
806	IEM_DECL_IMPL_DEF(void, iemAImpl_dec_u64,(uint64_t puDst, uint32_t pfEFlags))
807	{
808	uint64_t uDst = *puDst;
809	uint64_t uResult = uDst - 1;
810	*puDst = uResult;
811
812	/*
813	* Calc EFLAGS.
814	* CF is NOT modified for hysterical raisins (allegedly for carrying and
815	* borrowing in arithmetic loops on intel 8008).
816	*/
817	uint32_t fEfl = *pfEFlags & ~(X86_EFL_STATUS_BITS & ~X86_EFL_CF);
818	fEfl \|= g_afParity[uResult & 0xff];
819	fEfl \|= ((uint32_t)uResult ^ (uint32_t)uDst) & X86_EFL_AF;
820	fEfl \|= X86_EFL_CALC_ZF(uResult);
821	fEfl \|= X86_EFL_CALC_SF(uResult, 64);
822	fEfl \|= ((uDst & (uResult ^ RT_BIT_64(63))) >> (64 - X86_EFL_OF_BIT)) & X86_EFL_OF;
823	*pfEFlags = fEfl;
824	}
825
826
827	IEM_DECL_IMPL_DEF(void, iemAImpl_not_u64,(uint64_t puDst, uint32_t pfEFlags))
828	{
829	uint64_t uDst = *puDst;
830	uint64_t uResult = ~uDst;
831	*puDst = uResult;
832	/* EFLAGS are not modified. */
833	}
834
835
836	IEM_DECL_IMPL_DEF(void, iemAImpl_neg_u64,(uint64_t puDst, uint32_t pfEFlags))
837	{
838	uint64_t uDst = 0;
839	uint64_t uSrc = *puDst;
840	uint64_t uResult = uDst - uSrc;
841	*puDst = uResult;
842
843	/* Calc EFLAGS. */
844	uint32_t fEfl = *pfEFlags & ~X86_EFL_STATUS_BITS;
845	fEfl \|= (uSrc != 0) << X86_EFL_CF_BIT;
846	fEfl \|= g_afParity[uResult & 0xff];
847	fEfl \|= ((uint32_t)uResult ^ (uint32_t)uDst) & X86_EFL_AF;
848	fEfl \|= X86_EFL_CALC_ZF(uResult);
849	fEfl \|= X86_EFL_CALC_SF(uResult, 64);
850	fEfl \|= ((uSrc & uResult) >> (64 - X86_EFL_OF_BIT)) & X86_EFL_OF;
851	*pfEFlags = fEfl;
852	}
853
854
855	/** 64-bit locked unary operand operation. */
856	# define DO_LOCKED_UNARY_OP_U64(a_Mnemonic) \
857	do { \
858	uint64_t uOld = ASMAtomicReadU64(puDst); \
859	uint64_t uTmp; \
860	uint32_t fEflTmp; \
861	do \
862	{ \
863	uTmp = uOld; \
864	fEflTmp = *pfEFlags; \
865	iemAImpl_ ## a_Mnemonic ## _u64(&uTmp, &fEflTmp); \
866	} while (!ASMAtomicCmpXchgExU64(puDst, uTmp, uOld, &uOld)); \
867	*pfEFlags = fEflTmp; \
868	} while (0)
869
870	IEM_DECL_IMPL_DEF(void, iemAImpl_inc_u64_locked,(uint64_t puDst, uint32_t pfEFlags))
871	{
872	DO_LOCKED_UNARY_OP_U64(inc);
873	}
874
875
876	IEM_DECL_IMPL_DEF(void, iemAImpl_dec_u64_locked,(uint64_t puDst, uint32_t pfEFlags))
877	{
878	DO_LOCKED_UNARY_OP_U64(dec);
879	}
880
881
882	IEM_DECL_IMPL_DEF(void, iemAImpl_not_u64_locked,(uint64_t puDst, uint32_t pfEFlags))
883	{
884	DO_LOCKED_UNARY_OP_U64(not);
885	}
886
887
888	IEM_DECL_IMPL_DEF(void, iemAImpl_neg_u64_locked,(uint64_t puDst, uint32_t pfEFlags))
889	{
890	DO_LOCKED_UNARY_OP_U64(neg);
891	}
892
893
894	/* Shift and rotate. */
895
896	IEM_DECL_IMPL_DEF(void, iemAImpl_rol_u64,(uint64_t puDst, uint8_t cShift, uint32_t pfEFlags))
897	{
898	cShift &= 63;
899	if (cShift)
900	{
901	uint64_t uDst = *puDst;
902	uint64_t uResult;
903	uResult = uDst << cShift;
904	uResult \|= uDst >> (64 - cShift);
905	*puDst = uResult;
906
907	/* Calc EFLAGS. The OF bit is undefined if cShift > 1, we implement
908	it the same way as for 1 bit shifts. */
909	AssertCompile(X86_EFL_CF_BIT == 0);
910	uint32_t fEfl = *pfEFlags & ~(X86_EFL_CF \| X86_EFL_OF);
911	uint32_t fCarry = (uResult & 1);
912	fEfl \|= fCarry;
913	fEfl \|= ((uResult >> 63) ^ fCarry) << X86_EFL_OF_BIT;
914	*pfEFlags = fEfl;
915	}
916	}
917
918
919	IEM_DECL_IMPL_DEF(void, iemAImpl_ror_u64,(uint64_t puDst, uint8_t cShift, uint32_t pfEFlags))
920	{
921	cShift &= 63;
922	if (cShift)
923	{
924	uint64_t uDst = *puDst;
925	uint64_t uResult;
926	uResult = uDst >> cShift;
927	uResult \|= uDst << (64 - cShift);
928	*puDst = uResult;
929
930	/* Calc EFLAGS. The OF bit is undefined if cShift > 1, we implement
931	it the same way as for 1 bit shifts (OF = OF XOR New-CF). */
932	AssertCompile(X86_EFL_CF_BIT == 0);
933	uint32_t fEfl = *pfEFlags & ~(X86_EFL_CF \| X86_EFL_OF);
934	uint32_t fCarry = (uResult >> 63) & X86_EFL_CF;
935	fEfl \|= fCarry;
936	fEfl \|= (((uResult >> 62) ^ fCarry) << X86_EFL_OF_BIT) & X86_EFL_OF;
937	*pfEFlags = fEfl;
938	}
939	}
940
941
942	IEM_DECL_IMPL_DEF(void, iemAImpl_rcl_u64,(uint64_t puDst, uint8_t cShift, uint32_t pfEFlags))
943	{
944	cShift &= 63;
945	if (cShift)
946	{
947	uint32_t fEfl = *pfEFlags;
948	uint64_t uDst = *puDst;
949	uint64_t uResult;
950	uResult = uDst << cShift;
951	AssertCompile(X86_EFL_CF_BIT == 0);
952	if (cShift > 1)
953	uResult \|= uDst >> (65 - cShift);
954	uResult \|= (uint64_t)(fEfl & X86_EFL_CF) << (cShift - 1);
955	*puDst = uResult;
956
957	/* Calc EFLAGS. The OF bit is undefined if cShift > 1, we implement
958	it the same way as for 1 bit shifts. */
959	uint32_t fCarry = (uDst >> (64 - cShift)) & X86_EFL_CF;
960	fEfl &= ~(X86_EFL_CF \| X86_EFL_OF);
961	fEfl \|= fCarry;
962	fEfl \|= ((uResult >> 63) ^ fCarry) << X86_EFL_OF_BIT;
963	*pfEFlags = fEfl;
964	}
965	}
966
967
968	IEM_DECL_IMPL_DEF(void, iemAImpl_rcr_u64,(uint64_t puDst, uint8_t cShift, uint32_t pfEFlags))
969	{
970	cShift &= 63;
971	if (cShift)
972	{
973	uint32_t fEfl = *pfEFlags;
974	uint64_t uDst = *puDst;
975	uint64_t uResult;
976	uResult = uDst >> cShift;
977	AssertCompile(X86_EFL_CF_BIT == 0);
978	if (cShift > 1)
979	uResult \|= uDst << (65 - cShift);
980	uResult \|= (uint64_t)(fEfl & X86_EFL_CF) << (64 - cShift);
981	*puDst = uResult;
982
983	/* Calc EFLAGS. The OF bit is undefined if cShift > 1, we implement
984	it the same way as for 1 bit shifts. */
985	uint32_t fCarry = (uDst >> (cShift - 1)) & X86_EFL_CF;
986	fEfl &= ~(X86_EFL_CF \| X86_EFL_OF);
987	fEfl \|= fCarry;
988	fEfl \|= ((uResult >> 63) ^ fCarry) << X86_EFL_OF_BIT;
989	*pfEFlags = fEfl;
990	}
991	}
992
993
994	IEM_DECL_IMPL_DEF(void, iemAImpl_shl_u64,(uint64_t puDst, uint8_t cShift, uint32_t pfEFlags))
995	{
996	cShift &= 63;
997	if (cShift)
998	{
999	uint64_t uDst = *puDst;
1000	uint64_t uResult = uDst << cShift;
1001	*puDst = uResult;
1002
1003	/* Calc EFLAGS. The OF bit is undefined if cShift > 1, we implement
1004	it the same way as for 1 bit shifts. The AF bit is undefined, we
1005	always set it to zero atm. */
1006	AssertCompile(X86_EFL_CF_BIT == 0);
1007	uint32_t fEfl = *pfEFlags & ~X86_EFL_STATUS_BITS;
1008	uint32_t fCarry = (uDst >> (64 - cShift)) & X86_EFL_CF;
1009	fEfl \|= fCarry;
1010	fEfl \|= ((uResult >> 63) ^ fCarry) << X86_EFL_OF_BIT;
1011	fEfl \|= X86_EFL_CALC_SF(uResult, 64);
1012	fEfl \|= X86_EFL_CALC_ZF(uResult);
1013	fEfl \|= g_afParity[uResult & 0xff];
1014	*pfEFlags = fEfl;
1015	}
1016	}
1017
1018
1019	IEM_DECL_IMPL_DEF(void, iemAImpl_shr_u64,(uint64_t puDst, uint8_t cShift, uint32_t pfEFlags))
1020	{
1021	cShift &= 63;
1022	if (cShift)
1023	{
1024	uint64_t uDst = *puDst;
1025	uint64_t uResult = uDst >> cShift;
1026	*puDst = uResult;
1027
1028	/* Calc EFLAGS. The OF bit is undefined if cShift > 1, we implement
1029	it the same way as for 1 bit shifts. The AF bit is undefined, we
1030	always set it to zero atm. */
1031	AssertCompile(X86_EFL_CF_BIT == 0);
1032	uint32_t fEfl = *pfEFlags & ~X86_EFL_STATUS_BITS;
1033	fEfl \|= (uDst >> (cShift - 1)) & X86_EFL_CF;
1034	fEfl \|= (uDst >> 63) << X86_EFL_OF_BIT;
1035	fEfl \|= X86_EFL_CALC_SF(uResult, 64);
1036	fEfl \|= X86_EFL_CALC_ZF(uResult);
1037	fEfl \|= g_afParity[uResult & 0xff];
1038	*pfEFlags = fEfl;
1039	}
1040	}
1041
1042
1043	IEM_DECL_IMPL_DEF(void, iemAImpl_sar_u64,(uint64_t puDst, uint8_t cShift, uint32_t pfEFlags))
1044	{
1045	cShift &= 63;
1046	if (cShift)
1047	{
1048	uint64_t uDst = *puDst;
1049	uint64_t uResult = (int64_t)uDst >> cShift;
1050	*puDst = uResult;
1051
1052	/* Calc EFLAGS. The OF bit is undefined if cShift > 1, we implement
1053	it the same way as for 1 bit shifts (0). The AF bit is undefined,
1054	we always set it to zero atm. */
1055	AssertCompile(X86_EFL_CF_BIT == 0);
1056	uint32_t fEfl = *pfEFlags & ~X86_EFL_STATUS_BITS;
1057	fEfl \|= (uDst >> (cShift - 1)) & X86_EFL_CF;
1058	fEfl \|= X86_EFL_CALC_SF(uResult, 64);
1059	fEfl \|= X86_EFL_CALC_ZF(uResult);
1060	fEfl \|= g_afParity[uResult & 0xff];
1061	*pfEFlags = fEfl;
1062	}
1063	}
1064
1065
1066	IEM_DECL_IMPL_DEF(void, iemAImpl_shld_u64,(uint64_t puDst, uint64_t uSrc, uint8_t cShift, uint32_t pfEFlags))
1067	{
1068	cShift &= 63;
1069	if (cShift)
1070	{
1071	uint64_t uDst = *puDst;
1072	uint64_t uResult;
1073	uResult = uDst << cShift;
1074	uResult \|= uSrc >> (64 - cShift);
1075	*puDst = uResult;
1076
1077	/* Calc EFLAGS. The OF bit is undefined if cShift > 1, we implement
1078	it the same way as for 1 bit shifts. The AF bit is undefined,
1079	we always set it to zero atm. */
1080	AssertCompile(X86_EFL_CF_BIT == 0);
1081	uint32_t fEfl = *pfEFlags & ~X86_EFL_STATUS_BITS;
1082	fEfl \|= (uDst >> (64 - cShift)) & X86_EFL_CF;
1083	fEfl \|= (uint32_t)((uDst >> 63) ^ (uint32_t)(uResult >> 63)) << X86_EFL_OF_BIT;
1084	fEfl \|= X86_EFL_CALC_SF(uResult, 64);
1085	fEfl \|= X86_EFL_CALC_ZF(uResult);
1086	fEfl \|= g_afParity[uResult & 0xff];
1087	*pfEFlags = fEfl;
1088	}
1089	}
1090
1091
1092	IEM_DECL_IMPL_DEF(void, iemAImpl_shrd_u64,(uint64_t puDst, uint64_t uSrc, uint8_t cShift, uint32_t pfEFlags))
1093	{
1094	cShift &= 63;
1095	if (cShift)
1096	{
1097	uint64_t uDst = *puDst;
1098	uint64_t uResult;
1099	uResult = uDst >> cShift;
1100	uResult \|= uSrc << (64 - cShift);
1101	*puDst = uResult;
1102
1103	/* Calc EFLAGS. The OF bit is undefined if cShift > 1, we implement
1104	it the same way as for 1 bit shifts. The AF bit is undefined,
1105	we always set it to zero atm. */
1106	AssertCompile(X86_EFL_CF_BIT == 0);
1107	uint32_t fEfl = *pfEFlags & ~X86_EFL_STATUS_BITS;
1108	fEfl \|= (uDst >> (cShift - 1)) & X86_EFL_CF;
1109	fEfl \|= (uint32_t)((uDst >> 63) ^ (uint32_t)(uResult >> 63)) << X86_EFL_OF_BIT;
1110	fEfl \|= X86_EFL_CALC_SF(uResult, 64);
1111	fEfl \|= X86_EFL_CALC_ZF(uResult);
1112	fEfl \|= g_afParity[uResult & 0xff];
1113	*pfEFlags = fEfl;
1114	}
1115	}
1116
1117
1118	/* misc */
1119
1120	IEM_DECL_IMPL_DEF(void, iemAImpl_xchg_u64,(uint64_t puMem, uint64_t puReg))
1121	{
1122	/* XCHG implies LOCK. */
1123	uint64_t uOldMem = *puMem;
1124	while (!ASMAtomicCmpXchgExU64(puMem, *puReg, uOldMem, &uOldMem))
1125	ASMNopPause();
1126	*puReg = uOldMem;
1127	}
1128
1129
1130	/* multiplication and division */
1131
1132	IEM_DECL_IMPL_DEF(int, iemAImpl_mul_u64,(uint64_t pu64RAX, uint64_t pu64RDX, uint64_t u64Factor, uint32_t *pfEFlags))
1133	{
1134	AssertFailed();
1135	return VERR_IEM_ASPECT_NOT_IMPLEMENTED;
1136	}
1137
1138
1139	IEM_DECL_IMPL_DEF(int, iemAImpl_imul_u64,(uint64_t pu64RAX, uint64_t pu64RDX, uint64_t u64Factor, uint32_t *pfEFlags))
1140	{
1141	AssertFailed();
1142	return VERR_IEM_ASPECT_NOT_IMPLEMENTED;
1143	}
1144
1145
1146	IEM_DECL_IMPL_DEF(void, iemAImpl_imul_two_u64,(uint64_t puDst, uint64_t uSrc, uint32_t pfEFlags))
1147	{
1148	AssertFailed();
1149	}
1150
1151
1152
1153	IEM_DECL_IMPL_DEF(int, iemAImpl_div_u64,(uint64_t pu64RAX, uint64_t pu64RDX, uint64_t u64Divisor, uint32_t *pfEFlags))
1154	{
1155	AssertFailed();
1156	return VERR_IEM_ASPECT_NOT_IMPLEMENTED;
1157	}
1158
1159
1160	IEM_DECL_IMPL_DEF(int, iemAImpl_idiv_u64,(uint64_t pu64RAX, uint64_t pu64RDX, uint64_t u64Divisor, uint32_t *pfEFlags))
1161	{
1162	AssertFailed();
1163	return VERR_IEM_ASPECT_NOT_IMPLEMENTED;
1164	}
1165
1166
1167	#endif /* RT_ARCH_X86 */
1168
1169
1170	IEM_DECL_IMPL_DEF(void, iemAImpl_arpl,(uint16_t pu16Dst, uint16_t u16Src, uint32_t pfEFlags))
1171	{
1172	if ((*pu16Dst & X86_SEL_RPL) < (u16Src & X86_SEL_RPL))
1173	{
1174	*pu16Dst &= X86_SEL_MASK_OFF_RPL;
1175	*pu16Dst \|= u16Src & X86_SEL_RPL;
1176
1177	*pfEFlags \|= X86_EFL_ZF;
1178	}
1179	else
1180	*pfEFlags &= ~X86_EFL_ZF;
1181	}
1182

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source: vbox/trunk/src/VBox/VMM/VMMAll/IEMAllAImplC.cpp@ 62338

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