VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMAll/HWACCMAll.cpp@ 25921

Last change on this file since 25921 was 25921, checked in by vboxsync, 15 years ago

Removed redundant checks
  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
File size: 9.7 KB
Line 
1/* $Id: HWACCMAll.cpp 25921 2010-01-20 10:34:35Z vboxsync $ */
2/** @file
3 * HWACCM - All contexts.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22
23/*******************************************************************************
24* Header Files *
25*******************************************************************************/
26#define LOG_GROUP LOG_GROUP_HWACCM
27#include <VBox/hwaccm.h>
28#include "HWACCMInternal.h"
29#include <VBox/vm.h>
30#include <VBox/x86.h>
31#include <VBox/hwacc_vmx.h>
32#include <VBox/hwacc_svm.h>
33#include <VBox/pgm.h>
34#include <VBox/pdm.h>
35#include <VBox/err.h>
36#include <VBox/log.h>
37#include <VBox/selm.h>
38#include <VBox/iom.h>
39#include <iprt/param.h>
40#include <iprt/assert.h>
41#include <iprt/asm.h>
42#include <iprt/string.h>
43#include <iprt/memobj.h>
44#include <iprt/cpuset.h>
45
46/**
47 * Queues a page for invalidation
48 *
49 * @returns VBox status code.
50 * @param pVCpu The VMCPU to operate on.
51 * @param GCVirt Page to invalidate
52 */
53void hwaccmQueueInvlPage(PVMCPU pVCpu, RTGCPTR GCVirt)
54{
55 /* Nothing to do if a TLB flush is already pending */
56 if (VMCPU_FF_ISSET(pVCpu, VMCPU_FF_TLB_FLUSH))
57 return;
58#if 1
59 VMCPU_FF_SET(pVCpu, VMCPU_FF_TLB_FLUSH);
60#else
61 Be very careful when activating this code!
62 if (iPage == RT_ELEMENTS(pVCpu->hwaccm.s.TlbShootdown.aPages))
63 VMCPU_FF_SET(pVCpu, VMCPU_FF_TLB_FLUSH);
64 else
65 VMCPU_FF_SET(pVCpu, VMCPU_FF_TLB_SHOOTDOWN);
66#endif
67}
68
69/**
70 * Invalidates a guest page
71 *
72 * @returns VBox status code.
73 * @param pVCpu The VMCPU to operate on.
74 * @param GCVirt Page to invalidate
75 */
76VMMDECL(int) HWACCMInvalidatePage(PVMCPU pVCpu, RTGCPTR GCVirt)
77{
78 STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatFlushPageManual);
79#ifdef IN_RING0
80 PVM pVM = pVCpu->CTX_SUFF(pVM);
81 if (pVM->hwaccm.s.vmx.fSupported)
82 return VMXR0InvalidatePage(pVM, pVCpu, GCVirt);
83
84 Assert(pVM->hwaccm.s.svm.fSupported);
85 return SVMR0InvalidatePage(pVM, pVCpu, GCVirt);
86#endif
87
88 hwaccmQueueInvlPage(pVCpu, GCVirt);
89 return VINF_SUCCESS;
90}
91
92/**
93 * Flushes the guest TLB
94 *
95 * @returns VBox status code.
96 * @param pVCpu The VMCPU to operate on.
97 */
98VMMDECL(int) HWACCMFlushTLB(PVMCPU pVCpu)
99{
100 LogFlow(("HWACCMFlushTLB\n"));
101
102 VMCPU_FF_SET(pVCpu, VMCPU_FF_TLB_FLUSH);
103 STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatFlushTLBManual);
104 return VINF_SUCCESS;
105}
106
107#ifdef IN_RING0
108/**
109 * Dummy RTMpOnSpecific handler since RTMpPokeCpu couldn't be used.
110 *
111 */
112static DECLCALLBACK(void) hwaccmFlushHandler(RTCPUID idCpu, void *pvUser1, void *pvUser2)
113{
114 return;
115}
116
117/**
118 * Wrapper for RTMpPokeCpu to deal with VERR_NOT_SUPPORTED
119 *
120 */
121void hwaccmMpPokeCpu(PVMCPU pVCpu, RTCPUID idHostCpu)
122{
123 uint32_t cWorldSwitchExit = pVCpu->hwaccm.s.cWorldSwitchExit;
124
125 STAM_PROFILE_ADV_START(&pVCpu->hwaccm.s.StatPoke, x);
126 int rc = RTMpPokeCpu(idHostCpu);
127 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatPoke, x);
128 /* Not implemented on some platforms (Darwin, Linux kernel < 2.6.19); fall back to a less efficient implementation (broadcast). */
129 if (rc == VERR_NOT_SUPPORTED)
130 {
131 STAM_PROFILE_ADV_START(&pVCpu->hwaccm.s.StatSpinPoke, z);
132 /* synchronous. */
133 RTMpOnSpecific(idHostCpu, hwaccmFlushHandler, 0, 0);
134 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatSpinPoke, z);
135 }
136 else
137 {
138 if (rc == VINF_SUCCESS)
139 STAM_PROFILE_ADV_START(&pVCpu->hwaccm.s.StatSpinPoke, z);
140 else
141 STAM_PROFILE_ADV_START(&pVCpu->hwaccm.s.StatSpinPokeFailed, z);
142
143 /* Spin until the VCPU has switched back. */
144 while ( pVCpu->hwaccm.s.fCheckedTLBFlush
145 && cWorldSwitchExit == pVCpu->hwaccm.s.cWorldSwitchExit)
146 {
147 ASMNopPause();
148 }
149 if (rc == VINF_SUCCESS)
150 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatSpinPoke, z);
151 else
152 STAM_PROFILE_ADV_STOP(&pVCpu->hwaccm.s.StatSpinPokeFailed, z);
153 }
154}
155#endif
156
157#ifndef IN_RC
158/**
159 * Invalidates a guest page on all VCPUs.
160 *
161 * @returns VBox status code.
162 * @param pVM The VM to operate on.
163 * @param GCVirt Page to invalidate
164 */
165VMMDECL(int) HWACCMInvalidatePageOnAllVCpus(PVM pVM, RTGCPTR GCPtr)
166{
167 VMCPUID idCurCpu = VMMGetCpuId(pVM);
168
169 STAM_COUNTER_INC(&pVM->aCpus[idCurCpu].hwaccm.s.StatFlushPage);
170
171 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
172 {
173 PVMCPU pVCpu = &pVM->aCpus[idCpu];
174
175 /* Nothing to do if a TLB flush is already pending; the VCPU should have already been poked if it were active */
176 if (VMCPU_FF_ISSET(pVCpu, VMCPU_FF_TLB_FLUSH))
177 continue;
178
179 if (pVCpu->idCpu == idCurCpu)
180 {
181 HWACCMInvalidatePage(pVCpu, GCPtr);
182 }
183 else
184 {
185 hwaccmQueueInvlPage(pVCpu, GCPtr);
186 if (pVCpu->hwaccm.s.fCheckedTLBFlush)
187 {
188 STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatTlbShootdown);
189#ifdef IN_RING0
190 RTCPUID idHostCpu = pVCpu->hwaccm.s.idEnteredCpu;
191 if (idHostCpu != NIL_RTCPUID)
192 hwaccmMpPokeCpu(pVCpu, idHostCpu);
193#else
194 VMR3NotifyCpuFFU(pVCpu->pUVCpu, VMNOTIFYFF_FLAGS_POKE);
195#endif
196 }
197 else
198 STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatFlushPageManual);
199 }
200 }
201
202 return VINF_SUCCESS;
203}
204
205
206/**
207 * Flush the TLBs of all VCPUs
208 *
209 * @returns VBox status code.
210 * @param pVM The VM to operate on.
211 */
212VMMDECL(int) HWACCMFlushTLBOnAllVCpus(PVM pVM)
213{
214 if (pVM->cCpus == 1)
215 return HWACCMFlushTLB(&pVM->aCpus[0]);
216
217 VMCPUID idThisCpu = VMMGetCpuId(pVM);
218
219 STAM_COUNTER_INC(&pVM->aCpus[idThisCpu].hwaccm.s.StatFlushTLB);
220
221 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
222 {
223 PVMCPU pVCpu = &pVM->aCpus[idCpu];
224
225 /* Nothing to do if a TLB flush is already pending; the VCPU should have already been poked if it were active */
226 if (VMCPU_FF_ISSET(pVCpu, VMCPU_FF_TLB_FLUSH))
227 continue;
228
229 VMCPU_FF_SET(pVCpu, VMCPU_FF_TLB_FLUSH);
230 if (idThisCpu == idCpu)
231 continue;
232
233 if (pVCpu->hwaccm.s.fCheckedTLBFlush)
234 {
235 STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatTlbShootdownFlush);
236#ifdef IN_RING0
237 RTCPUID idHostCpu = pVCpu->hwaccm.s.idEnteredCpu;
238 if (idHostCpu != NIL_RTCPUID)
239 hwaccmMpPokeCpu(pVCpu, idHostCpu);
240#else
241 VMR3NotifyCpuFFU(pVCpu->pUVCpu, VMNOTIFYFF_FLAGS_POKE);
242#endif
243 }
244 else
245 STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatFlushTLBManual);
246 }
247 return VINF_SUCCESS;
248}
249#endif
250
251/**
252 * Checks if nested paging is enabled
253 *
254 * @returns boolean
255 * @param pVM The VM to operate on.
256 */
257VMMDECL(bool) HWACCMIsNestedPagingActive(PVM pVM)
258{
259 return HWACCMIsEnabled(pVM) && pVM->hwaccm.s.fNestedPaging;
260}
261
262/**
263 * Return the shadow paging mode for nested paging/ept
264 *
265 * @returns shadow paging mode
266 * @param pVM The VM to operate on.
267 */
268VMMDECL(PGMMODE) HWACCMGetShwPagingMode(PVM pVM)
269{
270 Assert(HWACCMIsNestedPagingActive(pVM));
271 if (pVM->hwaccm.s.svm.fSupported)
272 return PGMMODE_NESTED;
273
274 Assert(pVM->hwaccm.s.vmx.fSupported);
275 return PGMMODE_EPT;
276}
277
278/**
279 * Invalidates a guest page by physical address
280 *
281 * NOTE: Assumes the current instruction references this physical page though a virtual address!!
282 *
283 * @returns VBox status code.
284 * @param pVM The VM to operate on.
285 * @param GCPhys Page to invalidate
286 */
287VMMDECL(int) HWACCMInvalidatePhysPage(PVM pVM, RTGCPHYS GCPhys)
288{
289 if (!HWACCMIsNestedPagingActive(pVM))
290 return VINF_SUCCESS;
291
292#ifdef IN_RING0
293 if (pVM->hwaccm.s.vmx.fSupported)
294 {
295 VMCPUID idThisCpu = VMMGetCpuId(pVM);
296
297 for (VMCPUID idCpu = 0; idCpu < pVM->cCpus; idCpu++)
298 {
299 PVMCPU pVCpu = &pVM->aCpus[idCpu];
300
301 if (idThisCpu == idCpu)
302 {
303 VMXR0InvalidatePhysPage(pVM, pVCpu, GCPhys);
304 continue;
305 }
306
307 VMCPU_FF_SET(pVCpu, VMCPU_FF_TLB_FLUSH);
308 if (pVCpu->hwaccm.s.fCheckedTLBFlush)
309 {
310 STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatTlbShootdownFlush);
311# ifdef IN_RING0
312 RTCPUID idHostCpu = pVCpu->hwaccm.s.idEnteredCpu;
313 if (idHostCpu != NIL_RTCPUID)
314 hwaccmMpPokeCpu(pVCpu, idHostCpu);
315# else
316 VMR3NotifyCpuFFU(pVCpu->pUVCpu, VMNOTIFYFF_FLAGS_POKE);
317# endif
318 }
319 else
320 STAM_COUNTER_INC(&pVCpu->hwaccm.s.StatFlushTLBManual);
321 }
322 return VINF_SUCCESS;
323 }
324
325 Assert(pVM->hwaccm.s.svm.fSupported);
326 /* AMD-V doesn't support invalidation with guest physical addresses; see comment in SVMR0InvalidatePhysPage. */
327 HWACCMFlushTLBOnAllVCpus(pVM);
328#else
329 HWACCMFlushTLBOnAllVCpus(pVM);
330#endif
331 return VINF_SUCCESS;
332}
333
334/**
335 * Checks if an interrupt event is currently pending.
336 *
337 * @returns Interrupt event pending state.
338 * @param pVM The VM to operate on.
339 */
340VMMDECL(bool) HWACCMHasPendingIrq(PVM pVM)
341{
342 PVMCPU pVCpu = VMMGetCpu(pVM);
343 return !!pVCpu->hwaccm.s.Event.fPending;
344}
345
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