TRPM.cpp@ 7954

Last change on this file since 7954 was 5999, checked in by vboxsync, 17 years ago
The Giant CDDL Dual-License Header Change.
Property svn:eol-style set to `native` Property svn:keywords set to `Id`
File size: 70.8 KB

Line
1	/* $Id: TRPM.cpp 5999 2007-12-07 15:05:06Z vboxsync $ */
2	/** @file
3	* TRPM - The Trap Monitor
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 innotek GmbH
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18
19	/** @page pg_trpm TRPM - The Trap Monitor
20	*
21	* The Trap Monitor (TRPM) is responsible for all trap and interrupt
22	* handling in the VMM.
23	*
24	* Interrupts occuring in GC will be routed to the HC and reassert there. TRPM
25	* makes the assumption that the VMM or Guest will not cause hardware
26	* interrupts to occur.
27	*
28	* Traps will be passed to a list of registered trap handlers which will
29	* check and see if they are the responsible part for the trap. If no handler
30	* was found the default action is to pass the trap on the Guest OS. Trap
31	* handlers may raise a Guest OS trap as a result of the trap handling.
32	* Statistics will be maintained so the trap handler list can be resorted
33	* every now and then to examin handlers in the optimal order.
34	*
35	* If a trap happens inside the VMM (Guest Context) the TRPM will take the
36	* shortest path back to Ring-3 Host Context and brutally destroy the VM.
37	*
38	* The TRPM will have interfaces to enable devices to assert interrupts
39	* in the guest, these interfaces are multithreaded and availble from
40	* all contexts. This is to allow devices to have use worker threads.
41	*
42	*/
43
44
45
46	/*******************************************************************************
47	* Header Files *
48	*******************************************************************************/
49	#define LOG_GROUP LOG_GROUP_TRPM
50	#include <VBox/trpm.h>
51	#include <VBox/cpum.h>
52	#include <VBox/selm.h>
53	#include <VBox/ssm.h>
54	#include <VBox/pdmapi.h>
55	#include <VBox/pgm.h>
56	#include <VBox/dbgf.h>
57	#include <VBox/mm.h>
58	#include <VBox/stam.h>
59	#include <VBox/csam.h>
60	#include <VBox/patm.h>
61	#include "TRPMInternal.h"
62	#include <VBox/vm.h>
63	#include <VBox/em.h>
64	#include <VBox/rem.h>
65	#include <VBox/hwaccm.h>
66
67	#include <VBox/err.h>
68	#include <VBox/param.h>
69	#include <VBox/log.h>
70	#include <iprt/assert.h>
71	#include <iprt/asm.h>
72	#include <iprt/string.h>
73	#include <iprt/alloc.h>
74
75
76	/*******************************************************************************
77	* Structures and Typedefs *
78	*******************************************************************************/
79	/**
80	* Trap handler function.
81	* @todo need to specialize this as we go along.
82	*/
83	typedef enum TRPMHANDLER
84	{
85	/** Generic Interrupt handler. */
86	TRPM_HANDLER_INT = 0,
87	/** Generic Trap handler. */
88	TRPM_HANDLER_TRAP,
89	/** Trap 8 (\#DF) handler. */
90	TRPM_HANDLER_TRAP_08,
91	/** Trap 12 (\#MC) handler. */
92	TRPM_HANDLER_TRAP_12,
93	/** Max. */
94	TRPM_HANDLER_MAX
95	} TRPMHANDLER, *PTRPMHANDLER;
96
97
98	/*******************************************************************************
99	* Global Variables *
100	*******************************************************************************/
101	/** Preinitialized IDT.
102	* The u16OffsetLow is a value of the TRPMHANDLER enum which TRPMR3Relocate()
103	* will use to pick the right address. The u16SegSel is always VMM CS.
104	*/
105	static VBOXIDTE_GENERIC g_aIdt[256] =
106	{
107	/* special trap handler - still, this is an interrupt gate not a trap gate... */
108	#define IDTE_TRAP(enm) { (unsigned)enm, 0, 0, VBOX_IDTE_TYPE1, VBOX_IDTE_TYPE2_INT_32, 0, 1, 0 }
109	/* generic trap handler. */
110	#define IDTE_TRAP_GEN() IDTE_TRAP(TRPM_HANDLER_TRAP)
111	/* special interrupt handler. */
112	#define IDTE_INT(enm) { (unsigned)enm, 0, 0, VBOX_IDTE_TYPE1, VBOX_IDTE_TYPE2_INT_32, 0, 1, 0 }
113	/* generic interrupt handler. */
114	#define IDTE_INT_GEN() IDTE_INT(TRPM_HANDLER_INT)
115	/* special task gate IDT entry (for critical exceptions like #DF). */
116	#define IDTE_TASK(enm) { (unsigned)enm, 0, 0, VBOX_IDTE_TYPE1, VBOX_IDTE_TYPE2_TASK, 0, 1, 0 }
117	/* draft, fixme later when the handler is written. */
118	#define IDTE_RESERVED() { 0, 0, 0, 0, 0, 0, 0, 0 }
119
120	/* N - M M - T - C - D i */
121	/* o - n o - y - o - e p */
122	/* - e n - p - d - s t */
123	/* - i - e - e - c . */
124	/* - c - - - r */
125	/* ============================================================= */
126	IDTE_TRAP_GEN(), /* 0 - #DE - F - N - Divide error */
127	IDTE_TRAP_GEN(), /* 1 - #DB - F/T - N - Single step, INT 1 instruction */
128	#ifdef VBOX_WITH_NMI
129	IDTE_TRAP_GEN(), /* 2 - - I - N - Non-Maskable Interrupt (NMI) */
130	#else
131	IDTE_INT_GEN(), /* 2 - - I - N - Non-Maskable Interrupt (NMI) */
132	#endif
133	IDTE_TRAP_GEN(), /* 3 - #BP - T - N - Breakpoint, INT 3 instruction. */
134	IDTE_TRAP_GEN(), /* 4 - #OF - T - N - Overflow, INTO instruction. */
135	IDTE_TRAP_GEN(), /* 5 - #BR - F - N - BOUND Range Exceeded, BOUND instruction. */
136	IDTE_TRAP_GEN(), /* 6 - #UD - F - N - Undefined(/Invalid) Opcode. */
137	IDTE_TRAP_GEN(), /* 7 - #NM - F - N - Device not available, FP or (F)WAIT instruction. */
138	IDTE_TASK(TRPM_HANDLER_TRAP_08), /* 8 - #DF - A - 0 - Double fault. */
139	IDTE_TRAP_GEN(), /* 9 - - F - N - Coprocessor Segment Overrun (obsolete). */
140	IDTE_TRAP_GEN(), /* a - #TS - F - Y - Invalid TSS, Taskswitch or TSS access. */
141	IDTE_TRAP_GEN(), /* b - #NP - F - Y - Segment not present. */
142	IDTE_TRAP_GEN(), /* c - #SS - F - Y - Stack-Segment fault. */
143	IDTE_TRAP_GEN(), /* d - #GP - F - Y - General protection fault. */
144	IDTE_TRAP_GEN(), /* e - #PF - F - Y - Page fault. - interrupt gate!!! */
145	IDTE_RESERVED(), /* f - - - - Intel Reserved. Do not use. */
146	IDTE_TRAP_GEN(), /* 10 - #MF - F - N - x86 FPU Floating-Point Error (Math fault), FP or (F)WAIT instruction. */
147	IDTE_TRAP_GEN(), /* 11 - #AC - F - 0 - Alignment Check. */
148	IDTE_TRAP(TRPM_HANDLER_TRAP_12), /* 12 - #MC - A - N - Machine Check. */
149	IDTE_TRAP_GEN(), /* 13 - #XF - F - N - SIMD Floating-Point Exception. */
150	IDTE_RESERVED(), /* 14 - - - - Intel Reserved. Do not use. */
151	IDTE_RESERVED(), /* 15 - - - - Intel Reserved. Do not use. */
152	IDTE_RESERVED(), /* 16 - - - - Intel Reserved. Do not use. */
153	IDTE_RESERVED(), /* 17 - - - - Intel Reserved. Do not use. */
154	IDTE_RESERVED(), /* 18 - - - - Intel Reserved. Do not use. */
155	IDTE_RESERVED(), /* 19 - - - - Intel Reserved. Do not use. */
156	IDTE_RESERVED(), /* 1a - - - - Intel Reserved. Do not use. */
157	IDTE_RESERVED(), /* 1b - - - - Intel Reserved. Do not use. */
158	IDTE_RESERVED(), /* 1c - - - - Intel Reserved. Do not use. */
159	IDTE_RESERVED(), /* 1d - - - - Intel Reserved. Do not use. */
160	IDTE_RESERVED(), /* 1e - - - - Intel Reserved. Do not use. */
161	IDTE_RESERVED(), /* 1f - - - - Intel Reserved. Do not use. */
162	IDTE_INT_GEN(), /* 20 - - I - - User defined Interrupts, external of INT n. */
163	IDTE_INT_GEN(), /* 21 - - I - - User defined Interrupts, external of INT n. */
164	IDTE_INT_GEN(), /* 22 - - I - - User defined Interrupts, external of INT n. */
165	IDTE_INT_GEN(), /* 23 - - I - - User defined Interrupts, external of INT n. */
166	IDTE_INT_GEN(), /* 24 - - I - - User defined Interrupts, external of INT n. */
167	IDTE_INT_GEN(), /* 25 - - I - - User defined Interrupts, external of INT n. */
168	IDTE_INT_GEN(), /* 26 - - I - - User defined Interrupts, external of INT n. */
169	IDTE_INT_GEN(), /* 27 - - I - - User defined Interrupts, external of INT n. */
170	IDTE_INT_GEN(), /* 28 - - I - - User defined Interrupts, external of INT n. */
171	IDTE_INT_GEN(), /* 29 - - I - - User defined Interrupts, external of INT n. */
172	IDTE_INT_GEN(), /* 2a - - I - - User defined Interrupts, external of INT n. */
173	IDTE_INT_GEN(), /* 2b - - I - - User defined Interrupts, external of INT n. */
174	IDTE_INT_GEN(), /* 2c - - I - - User defined Interrupts, external of INT n. */
175	IDTE_INT_GEN(), /* 2d - - I - - User defined Interrupts, external of INT n. */
176	IDTE_INT_GEN(), /* 2e - - I - - User defined Interrupts, external of INT n. */
177	IDTE_INT_GEN(), /* 2f - - I - - User defined Interrupts, external of INT n. */
178	IDTE_INT_GEN(), /* 30 - - I - - User defined Interrupts, external of INT n. */
179	IDTE_INT_GEN(), /* 31 - - I - - User defined Interrupts, external of INT n. */
180	IDTE_INT_GEN(), /* 32 - - I - - User defined Interrupts, external of INT n. */
181	IDTE_INT_GEN(), /* 33 - - I - - User defined Interrupts, external of INT n. */
182	IDTE_INT_GEN(), /* 34 - - I - - User defined Interrupts, external of INT n. */
183	IDTE_INT_GEN(), /* 35 - - I - - User defined Interrupts, external of INT n. */
184	IDTE_INT_GEN(), /* 36 - - I - - User defined Interrupts, external of INT n. */
185	IDTE_INT_GEN(), /* 37 - - I - - User defined Interrupts, external of INT n. */
186	IDTE_INT_GEN(), /* 38 - - I - - User defined Interrupts, external of INT n. */
187	IDTE_INT_GEN(), /* 39 - - I - - User defined Interrupts, external of INT n. */
188	IDTE_INT_GEN(), /* 3a - - I - - User defined Interrupts, external of INT n. */
189	IDTE_INT_GEN(), /* 3b - - I - - User defined Interrupts, external of INT n. */
190	IDTE_INT_GEN(), /* 3c - - I - - User defined Interrupts, external of INT n. */
191	IDTE_INT_GEN(), /* 3d - - I - - User defined Interrupts, external of INT n. */
192	IDTE_INT_GEN(), /* 3e - - I - - User defined Interrupts, external of INT n. */
193	IDTE_INT_GEN(), /* 3f - - I - - User defined Interrupts, external of INT n. */
194	IDTE_INT_GEN(), /* 40 - - I - - User defined Interrupts, external of INT n. */
195	IDTE_INT_GEN(), /* 41 - - I - - User defined Interrupts, external of INT n. */
196	IDTE_INT_GEN(), /* 42 - - I - - User defined Interrupts, external of INT n. */
197	IDTE_INT_GEN(), /* 43 - - I - - User defined Interrupts, external of INT n. */
198	IDTE_INT_GEN(), /* 44 - - I - - User defined Interrupts, external of INT n. */
199	IDTE_INT_GEN(), /* 45 - - I - - User defined Interrupts, external of INT n. */
200	IDTE_INT_GEN(), /* 46 - - I - - User defined Interrupts, external of INT n. */
201	IDTE_INT_GEN(), /* 47 - - I - - User defined Interrupts, external of INT n. */
202	IDTE_INT_GEN(), /* 48 - - I - - User defined Interrupts, external of INT n. */
203	IDTE_INT_GEN(), /* 49 - - I - - User defined Interrupts, external of INT n. */
204	IDTE_INT_GEN(), /* 4a - - I - - User defined Interrupts, external of INT n. */
205	IDTE_INT_GEN(), /* 4b - - I - - User defined Interrupts, external of INT n. */
206	IDTE_INT_GEN(), /* 4c - - I - - User defined Interrupts, external of INT n. */
207	IDTE_INT_GEN(), /* 4d - - I - - User defined Interrupts, external of INT n. */
208	IDTE_INT_GEN(), /* 4e - - I - - User defined Interrupts, external of INT n. */
209	IDTE_INT_GEN(), /* 4f - - I - - User defined Interrupts, external of INT n. */
210	IDTE_INT_GEN(), /* 50 - - I - - User defined Interrupts, external of INT n. */
211	IDTE_INT_GEN(), /* 51 - - I - - User defined Interrupts, external of INT n. */
212	IDTE_INT_GEN(), /* 52 - - I - - User defined Interrupts, external of INT n. */
213	IDTE_INT_GEN(), /* 53 - - I - - User defined Interrupts, external of INT n. */
214	IDTE_INT_GEN(), /* 54 - - I - - User defined Interrupts, external of INT n. */
215	IDTE_INT_GEN(), /* 55 - - I - - User defined Interrupts, external of INT n. */
216	IDTE_INT_GEN(), /* 56 - - I - - User defined Interrupts, external of INT n. */
217	IDTE_INT_GEN(), /* 57 - - I - - User defined Interrupts, external of INT n. */
218	IDTE_INT_GEN(), /* 58 - - I - - User defined Interrupts, external of INT n. */
219	IDTE_INT_GEN(), /* 59 - - I - - User defined Interrupts, external of INT n. */
220	IDTE_INT_GEN(), /* 5a - - I - - User defined Interrupts, external of INT n. */
221	IDTE_INT_GEN(), /* 5b - - I - - User defined Interrupts, external of INT n. */
222	IDTE_INT_GEN(), /* 5c - - I - - User defined Interrupts, external of INT n. */
223	IDTE_INT_GEN(), /* 5d - - I - - User defined Interrupts, external of INT n. */
224	IDTE_INT_GEN(), /* 5e - - I - - User defined Interrupts, external of INT n. */
225	IDTE_INT_GEN(), /* 5f - - I - - User defined Interrupts, external of INT n. */
226	IDTE_INT_GEN(), /* 60 - - I - - User defined Interrupts, external of INT n. */
227	IDTE_INT_GEN(), /* 61 - - I - - User defined Interrupts, external of INT n. */
228	IDTE_INT_GEN(), /* 62 - - I - - User defined Interrupts, external of INT n. */
229	IDTE_INT_GEN(), /* 63 - - I - - User defined Interrupts, external of INT n. */
230	IDTE_INT_GEN(), /* 64 - - I - - User defined Interrupts, external of INT n. */
231	IDTE_INT_GEN(), /* 65 - - I - - User defined Interrupts, external of INT n. */
232	IDTE_INT_GEN(), /* 66 - - I - - User defined Interrupts, external of INT n. */
233	IDTE_INT_GEN(), /* 67 - - I - - User defined Interrupts, external of INT n. */
234	IDTE_INT_GEN(), /* 68 - - I - - User defined Interrupts, external of INT n. */
235	IDTE_INT_GEN(), /* 69 - - I - - User defined Interrupts, external of INT n. */
236	IDTE_INT_GEN(), /* 6a - - I - - User defined Interrupts, external of INT n. */
237	IDTE_INT_GEN(), /* 6b - - I - - User defined Interrupts, external of INT n. */
238	IDTE_INT_GEN(), /* 6c - - I - - User defined Interrupts, external of INT n. */
239	IDTE_INT_GEN(), /* 6d - - I - - User defined Interrupts, external of INT n. */
240	IDTE_INT_GEN(), /* 6e - - I - - User defined Interrupts, external of INT n. */
241	IDTE_INT_GEN(), /* 6f - - I - - User defined Interrupts, external of INT n. */
242	IDTE_INT_GEN(), /* 70 - - I - - User defined Interrupts, external of INT n. */
243	IDTE_INT_GEN(), /* 71 - - I - - User defined Interrupts, external of INT n. */
244	IDTE_INT_GEN(), /* 72 - - I - - User defined Interrupts, external of INT n. */
245	IDTE_INT_GEN(), /* 73 - - I - - User defined Interrupts, external of INT n. */
246	IDTE_INT_GEN(), /* 74 - - I - - User defined Interrupts, external of INT n. */
247	IDTE_INT_GEN(), /* 75 - - I - - User defined Interrupts, external of INT n. */
248	IDTE_INT_GEN(), /* 76 - - I - - User defined Interrupts, external of INT n. */
249	IDTE_INT_GEN(), /* 77 - - I - - User defined Interrupts, external of INT n. */
250	IDTE_INT_GEN(), /* 78 - - I - - User defined Interrupts, external of INT n. */
251	IDTE_INT_GEN(), /* 79 - - I - - User defined Interrupts, external of INT n. */
252	IDTE_INT_GEN(), /* 7a - - I - - User defined Interrupts, external of INT n. */
253	IDTE_INT_GEN(), /* 7b - - I - - User defined Interrupts, external of INT n. */
254	IDTE_INT_GEN(), /* 7c - - I - - User defined Interrupts, external of INT n. */
255	IDTE_INT_GEN(), /* 7d - - I - - User defined Interrupts, external of INT n. */
256	IDTE_INT_GEN(), /* 7e - - I - - User defined Interrupts, external of INT n. */
257	IDTE_INT_GEN(), /* 7f - - I - - User defined Interrupts, external of INT n. */
258	IDTE_INT_GEN(), /* 80 - - I - - User defined Interrupts, external of INT n. */
259	IDTE_INT_GEN(), /* 81 - - I - - User defined Interrupts, external of INT n. */
260	IDTE_INT_GEN(), /* 82 - - I - - User defined Interrupts, external of INT n. */
261	IDTE_INT_GEN(), /* 83 - - I - - User defined Interrupts, external of INT n. */
262	IDTE_INT_GEN(), /* 84 - - I - - User defined Interrupts, external of INT n. */
263	IDTE_INT_GEN(), /* 85 - - I - - User defined Interrupts, external of INT n. */
264	IDTE_INT_GEN(), /* 86 - - I - - User defined Interrupts, external of INT n. */
265	IDTE_INT_GEN(), /* 87 - - I - - User defined Interrupts, external of INT n. */
266	IDTE_INT_GEN(), /* 88 - - I - - User defined Interrupts, external of INT n. */
267	IDTE_INT_GEN(), /* 89 - - I - - User defined Interrupts, external of INT n. */
268	IDTE_INT_GEN(), /* 8a - - I - - User defined Interrupts, external of INT n. */
269	IDTE_INT_GEN(), /* 8b - - I - - User defined Interrupts, external of INT n. */
270	IDTE_INT_GEN(), /* 8c - - I - - User defined Interrupts, external of INT n. */
271	IDTE_INT_GEN(), /* 8d - - I - - User defined Interrupts, external of INT n. */
272	IDTE_INT_GEN(), /* 8e - - I - - User defined Interrupts, external of INT n. */
273	IDTE_INT_GEN(), /* 8f - - I - - User defined Interrupts, external of INT n. */
274	IDTE_INT_GEN(), /* 90 - - I - - User defined Interrupts, external of INT n. */
275	IDTE_INT_GEN(), /* 91 - - I - - User defined Interrupts, external of INT n. */
276	IDTE_INT_GEN(), /* 92 - - I - - User defined Interrupts, external of INT n. */
277	IDTE_INT_GEN(), /* 93 - - I - - User defined Interrupts, external of INT n. */
278	IDTE_INT_GEN(), /* 94 - - I - - User defined Interrupts, external of INT n. */
279	IDTE_INT_GEN(), /* 95 - - I - - User defined Interrupts, external of INT n. */
280	IDTE_INT_GEN(), /* 96 - - I - - User defined Interrupts, external of INT n. */
281	IDTE_INT_GEN(), /* 97 - - I - - User defined Interrupts, external of INT n. */
282	IDTE_INT_GEN(), /* 98 - - I - - User defined Interrupts, external of INT n. */
283	IDTE_INT_GEN(), /* 99 - - I - - User defined Interrupts, external of INT n. */
284	IDTE_INT_GEN(), /* 9a - - I - - User defined Interrupts, external of INT n. */
285	IDTE_INT_GEN(), /* 9b - - I - - User defined Interrupts, external of INT n. */
286	IDTE_INT_GEN(), /* 9c - - I - - User defined Interrupts, external of INT n. */
287	IDTE_INT_GEN(), /* 9d - - I - - User defined Interrupts, external of INT n. */
288	IDTE_INT_GEN(), /* 9e - - I - - User defined Interrupts, external of INT n. */
289	IDTE_INT_GEN(), /* 9f - - I - - User defined Interrupts, external of INT n. */
290	IDTE_INT_GEN(), /* a0 - - I - - User defined Interrupts, external of INT n. */
291	IDTE_INT_GEN(), /* a1 - - I - - User defined Interrupts, external of INT n. */
292	IDTE_INT_GEN(), /* a2 - - I - - User defined Interrupts, external of INT n. */
293	IDTE_INT_GEN(), /* a3 - - I - - User defined Interrupts, external of INT n. */
294	IDTE_INT_GEN(), /* a4 - - I - - User defined Interrupts, external of INT n. */
295	IDTE_INT_GEN(), /* a5 - - I - - User defined Interrupts, external of INT n. */
296	IDTE_INT_GEN(), /* a6 - - I - - User defined Interrupts, external of INT n. */
297	IDTE_INT_GEN(), /* a7 - - I - - User defined Interrupts, external of INT n. */
298	IDTE_INT_GEN(), /* a8 - - I - - User defined Interrupts, external of INT n. */
299	IDTE_INT_GEN(), /* a9 - - I - - User defined Interrupts, external of INT n. */
300	IDTE_INT_GEN(), /* aa - - I - - User defined Interrupts, external of INT n. */
301	IDTE_INT_GEN(), /* ab - - I - - User defined Interrupts, external of INT n. */
302	IDTE_INT_GEN(), /* ac - - I - - User defined Interrupts, external of INT n. */
303	IDTE_INT_GEN(), /* ad - - I - - User defined Interrupts, external of INT n. */
304	IDTE_INT_GEN(), /* ae - - I - - User defined Interrupts, external of INT n. */
305	IDTE_INT_GEN(), /* af - - I - - User defined Interrupts, external of INT n. */
306	IDTE_INT_GEN(), /* b0 - - I - - User defined Interrupts, external of INT n. */
307	IDTE_INT_GEN(), /* b1 - - I - - User defined Interrupts, external of INT n. */
308	IDTE_INT_GEN(), /* b2 - - I - - User defined Interrupts, external of INT n. */
309	IDTE_INT_GEN(), /* b3 - - I - - User defined Interrupts, external of INT n. */
310	IDTE_INT_GEN(), /* b4 - - I - - User defined Interrupts, external of INT n. */
311	IDTE_INT_GEN(), /* b5 - - I - - User defined Interrupts, external of INT n. */
312	IDTE_INT_GEN(), /* b6 - - I - - User defined Interrupts, external of INT n. */
313	IDTE_INT_GEN(), /* b7 - - I - - User defined Interrupts, external of INT n. */
314	IDTE_INT_GEN(), /* b8 - - I - - User defined Interrupts, external of INT n. */
315	IDTE_INT_GEN(), /* b9 - - I - - User defined Interrupts, external of INT n. */
316	IDTE_INT_GEN(), /* ba - - I - - User defined Interrupts, external of INT n. */
317	IDTE_INT_GEN(), /* bb - - I - - User defined Interrupts, external of INT n. */
318	IDTE_INT_GEN(), /* bc - - I - - User defined Interrupts, external of INT n. */
319	IDTE_INT_GEN(), /* bd - - I - - User defined Interrupts, external of INT n. */
320	IDTE_INT_GEN(), /* be - - I - - User defined Interrupts, external of INT n. */
321	IDTE_INT_GEN(), /* bf - - I - - User defined Interrupts, external of INT n. */
322	IDTE_INT_GEN(), /* c0 - - I - - User defined Interrupts, external of INT n. */
323	IDTE_INT_GEN(), /* c1 - - I - - User defined Interrupts, external of INT n. */
324	IDTE_INT_GEN(), /* c2 - - I - - User defined Interrupts, external of INT n. */
325	IDTE_INT_GEN(), /* c3 - - I - - User defined Interrupts, external of INT n. */
326	IDTE_INT_GEN(), /* c4 - - I - - User defined Interrupts, external of INT n. */
327	IDTE_INT_GEN(), /* c5 - - I - - User defined Interrupts, external of INT n. */
328	IDTE_INT_GEN(), /* c6 - - I - - User defined Interrupts, external of INT n. */
329	IDTE_INT_GEN(), /* c7 - - I - - User defined Interrupts, external of INT n. */
330	IDTE_INT_GEN(), /* c8 - - I - - User defined Interrupts, external of INT n. */
331	IDTE_INT_GEN(), /* c9 - - I - - User defined Interrupts, external of INT n. */
332	IDTE_INT_GEN(), /* ca - - I - - User defined Interrupts, external of INT n. */
333	IDTE_INT_GEN(), /* cb - - I - - User defined Interrupts, external of INT n. */
334	IDTE_INT_GEN(), /* cc - - I - - User defined Interrupts, external of INT n. */
335	IDTE_INT_GEN(), /* cd - - I - - User defined Interrupts, external of INT n. */
336	IDTE_INT_GEN(), /* ce - - I - - User defined Interrupts, external of INT n. */
337	IDTE_INT_GEN(), /* cf - - I - - User defined Interrupts, external of INT n. */
338	IDTE_INT_GEN(), /* d0 - - I - - User defined Interrupts, external of INT n. */
339	IDTE_INT_GEN(), /* d1 - - I - - User defined Interrupts, external of INT n. */
340	IDTE_INT_GEN(), /* d2 - - I - - User defined Interrupts, external of INT n. */
341	IDTE_INT_GEN(), /* d3 - - I - - User defined Interrupts, external of INT n. */
342	IDTE_INT_GEN(), /* d4 - - I - - User defined Interrupts, external of INT n. */
343	IDTE_INT_GEN(), /* d5 - - I - - User defined Interrupts, external of INT n. */
344	IDTE_INT_GEN(), /* d6 - - I - - User defined Interrupts, external of INT n. */
345	IDTE_INT_GEN(), /* d7 - - I - - User defined Interrupts, external of INT n. */
346	IDTE_INT_GEN(), /* d8 - - I - - User defined Interrupts, external of INT n. */
347	IDTE_INT_GEN(), /* d9 - - I - - User defined Interrupts, external of INT n. */
348	IDTE_INT_GEN(), /* da - - I - - User defined Interrupts, external of INT n. */
349	IDTE_INT_GEN(), /* db - - I - - User defined Interrupts, external of INT n. */
350	IDTE_INT_GEN(), /* dc - - I - - User defined Interrupts, external of INT n. */
351	IDTE_INT_GEN(), /* dd - - I - - User defined Interrupts, external of INT n. */
352	IDTE_INT_GEN(), /* de - - I - - User defined Interrupts, external of INT n. */
353	IDTE_INT_GEN(), /* df - - I - - User defined Interrupts, external of INT n. */
354	IDTE_INT_GEN(), /* e0 - - I - - User defined Interrupts, external of INT n. */
355	IDTE_INT_GEN(), /* e1 - - I - - User defined Interrupts, external of INT n. */
356	IDTE_INT_GEN(), /* e2 - - I - - User defined Interrupts, external of INT n. */
357	IDTE_INT_GEN(), /* e3 - - I - - User defined Interrupts, external of INT n. */
358	IDTE_INT_GEN(), /* e4 - - I - - User defined Interrupts, external of INT n. */
359	IDTE_INT_GEN(), /* e5 - - I - - User defined Interrupts, external of INT n. */
360	IDTE_INT_GEN(), /* e6 - - I - - User defined Interrupts, external of INT n. */
361	IDTE_INT_GEN(), /* e7 - - I - - User defined Interrupts, external of INT n. */
362	IDTE_INT_GEN(), /* e8 - - I - - User defined Interrupts, external of INT n. */
363	IDTE_INT_GEN(), /* e9 - - I - - User defined Interrupts, external of INT n. */
364	IDTE_INT_GEN(), /* ea - - I - - User defined Interrupts, external of INT n. */
365	IDTE_INT_GEN(), /* eb - - I - - User defined Interrupts, external of INT n. */
366	IDTE_INT_GEN(), /* ec - - I - - User defined Interrupts, external of INT n. */
367	IDTE_INT_GEN(), /* ed - - I - - User defined Interrupts, external of INT n. */
368	IDTE_INT_GEN(), /* ee - - I - - User defined Interrupts, external of INT n. */
369	IDTE_INT_GEN(), /* ef - - I - - User defined Interrupts, external of INT n. */
370	IDTE_INT_GEN(), /* f0 - - I - - User defined Interrupts, external of INT n. */
371	IDTE_INT_GEN(), /* f1 - - I - - User defined Interrupts, external of INT n. */
372	IDTE_INT_GEN(), /* f2 - - I - - User defined Interrupts, external of INT n. */
373	IDTE_INT_GEN(), /* f3 - - I - - User defined Interrupts, external of INT n. */
374	IDTE_INT_GEN(), /* f4 - - I - - User defined Interrupts, external of INT n. */
375	IDTE_INT_GEN(), /* f5 - - I - - User defined Interrupts, external of INT n. */
376	IDTE_INT_GEN(), /* f6 - - I - - User defined Interrupts, external of INT n. */
377	IDTE_INT_GEN(), /* f7 - - I - - User defined Interrupts, external of INT n. */
378	IDTE_INT_GEN(), /* f8 - - I - - User defined Interrupts, external of INT n. */
379	IDTE_INT_GEN(), /* f9 - - I - - User defined Interrupts, external of INT n. */
380	IDTE_INT_GEN(), /* fa - - I - - User defined Interrupts, external of INT n. */
381	IDTE_INT_GEN(), /* fb - - I - - User defined Interrupts, external of INT n. */
382	IDTE_INT_GEN(), /* fc - - I - - User defined Interrupts, external of INT n. */
383	IDTE_INT_GEN(), /* fd - - I - - User defined Interrupts, external of INT n. */
384	IDTE_INT_GEN(), /* fe - - I - - User defined Interrupts, external of INT n. */
385	IDTE_INT_GEN(), /* ff - - I - - User defined Interrupts, external of INT n. */
386	#undef IDTE_TRAP
387	#undef IDTE_TRAP_GEN
388	#undef IDTE_INT
389	#undef IDTE_INT_GEN
390	#undef IDTE_TASK
391	#undef IDTE_UNUSED
392	#undef IDTE_RESERVED
393	};
394
395
396	/** Enable or disable tracking of Guest's IDT. */
397	#define TRPM_TRACK_GUEST_IDT_CHANGES
398
399	/** Enable or disable tracking of Shadow IDT. */
400	#define TRPM_TRACK_SHADOW_IDT_CHANGES
401
402	/** TRPM saved state version. */
403	#define TRPM_SAVED_STATE_VERSION 8
404
405
406	/*******************************************************************************
407	* Internal Functions *
408	*******************************************************************************/
409	static DECLCALLBACK(int) trpmR3Save(PVM pVM, PSSMHANDLE pSSM);
410	static DECLCALLBACK(int) trpmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t u32Version);
411	static DECLCALLBACK(int) trpmGuestIDTWriteHandler(PVM pVM, RTGCPTR GCPtr, void pvPtr, void pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser);
412
413
414	/**
415	* Initializes the Trap Manager
416	*
417	* @returns VBox status code.
418	* @param pVM The VM to operate on.
419	*/
420	TRPMR3DECL(int) TRPMR3Init(PVM pVM)
421	{
422	LogFlow(("TRPMR3Init\n"));
423	/*
424	* Assert sizes and alignments.
425	*/
426	AssertRelease(!(RT_OFFSETOF(VM, trpm.s) & 31));
427	AssertRelease(!(RT_OFFSETOF(VM, trpm.s.aIdt) & 15));
428	AssertRelease(sizeof(pVM->trpm.s) <= sizeof(pVM->trpm.padding));
429	AssertRelease(ELEMENTS(pVM->trpm.s.aGuestTrapHandler) == sizeof(pVM->trpm.s.au32IdtPatched)*8);
430
431	/*
432	* Initialize members.
433	*/
434	pVM->trpm.s.offVM = RT_OFFSETOF(VM, trpm);
435	pVM->trpm.s.uActiveVector = ~0;
436	pVM->trpm.s.GuestIdtr.pIdt = ~0;
437	pVM->trpm.s.GCPtrIdt = ~0;
438	pVM->trpm.s.fDisableMonitoring = false;
439	pVM->trpm.s.fSafeToDropGuestIDTMonitoring = false;
440
441	/*
442	* Read the configuration (if any).
443	*/
444	PCFGMNODE pTRPMNode = CFGMR3GetChild(CFGMR3GetRoot(pVM), "TRPM");
445	if (pTRPMNode)
446	{
447	bool f;
448	int rc = CFGMR3QueryBool(pTRPMNode, "SafeToDropGuestIDTMonitoring", &f);
449	if (RT_SUCCESS(rc))
450	pVM->trpm.s.fSafeToDropGuestIDTMonitoring = f;
451	}
452
453	/* write config summary to log */
454	if (pVM->trpm.s.fSafeToDropGuestIDTMonitoring)
455	LogRel(("TRPM: Dropping Guest IDT Monitoring.\n"));
456
457	/*
458	* Initialize the IDT.
459	* The handler addresses will be set in the TRPMR3Relocate() function.
460	*/
461	Assert(sizeof(pVM->trpm.s.aIdt) == sizeof(g_aIdt));
462	memcpy(&pVM->trpm.s.aIdt[0], &g_aIdt[0], sizeof(pVM->trpm.s.aIdt));
463
464	/*
465	* Register the saved state data unit.
466	*/
467	int rc = SSMR3RegisterInternal(pVM, "trpm", 1, TRPM_SAVED_STATE_VERSION, sizeof(TRPM),
468	NULL, trpmR3Save, NULL,
469	NULL, trpmR3Load, NULL);
470	if (VBOX_FAILURE(rc))
471	return rc;
472
473	/*
474	* Statistics.
475	*/
476	STAM_REG(pVM, &pVM->trpm.s.StatGCWriteGuestIDTFault, STAMTYPE_COUNTER, "/TRPM/GC/Write/IDT/Fault", STAMUNIT_OCCURENCES, "The number of writes to the Guest IDT.");
477	STAM_REG(pVM, &pVM->trpm.s.StatGCWriteGuestIDTHandled, STAMTYPE_COUNTER, "/TRPM/GC/Write/IDT/Handled", STAMUNIT_OCCURENCES, "The number of writes to the Guest IDT.");
478
479	STAM_REG(pVM, &pVM->trpm.s.StatSyncIDT, STAMTYPE_PROFILE, "/PROF/TRPM/SyncIDT", STAMUNIT_TICKS_PER_CALL, "Profiling of TRPMR3SyncIDT().");
480
481	/* traps */
482	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x00], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/00", STAMUNIT_TICKS_PER_CALL, "#DE - Divide error.");
483	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x01], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/01", STAMUNIT_TICKS_PER_CALL, "#DB - Debug (single step and more).");
484	//STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x02], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/02", STAMUNIT_TICKS_PER_CALL, "NMI");
485	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x03], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/03", STAMUNIT_TICKS_PER_CALL, "#BP - Breakpoint.");
486	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x04], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/04", STAMUNIT_TICKS_PER_CALL, "#OF - Overflow.");
487	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x05], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/05", STAMUNIT_TICKS_PER_CALL, "#BR - Bound range exceeded.");
488	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x06], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/06", STAMUNIT_TICKS_PER_CALL, "#UD - Undefined opcode.");
489	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x07], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/07", STAMUNIT_TICKS_PER_CALL, "#NM - Device not available (FPU).");
490	//STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x08], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/08", STAMUNIT_TICKS_PER_CALL, "#DF - Double fault.");
491	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x09], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/09", STAMUNIT_TICKS_PER_CALL, "#?? - Coprocessor segment overrun (obsolete).");
492	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x0a], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/0a", STAMUNIT_TICKS_PER_CALL, "#TS - Task switch fault.");
493	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x0b], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/0b", STAMUNIT_TICKS_PER_CALL, "#NP - Segemnt not present.");
494	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x0c], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/0c", STAMUNIT_TICKS_PER_CALL, "#SS - Stack segment fault.");
495	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x0d], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/0d", STAMUNIT_TICKS_PER_CALL, "#GP - General protection fault.");
496	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x0e], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/0e", STAMUNIT_TICKS_PER_CALL, "#PF - Page fault.");
497	//STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x0f], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/0f", STAMUNIT_TICKS_PER_CALL, "Reserved.");
498	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x10], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/10", STAMUNIT_TICKS_PER_CALL, "#MF - Math fault..");
499	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x11], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/11", STAMUNIT_TICKS_PER_CALL, "#AC - Alignment check.");
500	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x12], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/12", STAMUNIT_TICKS_PER_CALL, "#MC - Machine check.");
501	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x13], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/13", STAMUNIT_TICKS_PER_CALL, "#XF - SIMD Floating-Point Exception.");
502
503	#ifdef VBOX_WITH_STATISTICS
504	rc = MMHyperAlloc(pVM, sizeof(STAMCOUNTER) * 255, 8, MM_TAG_STAM, (void **)&pVM->trpm.s.paStatForwardedIRQR3);
505	AssertRCReturn(rc, rc);
506	pVM->trpm.s.paStatForwardedIRQGC = MMHyperR3ToGC(pVM, pVM->trpm.s.paStatForwardedIRQR3);
507	pVM->trpm.s.paStatForwardedIRQR0 = MMHyperR3ToR0(pVM, pVM->trpm.s.paStatForwardedIRQR3);
508	for (unsigned i = 0; i < 255; i++)
509	STAMR3RegisterF(pVM, &pVM->trpm.s.paStatForwardedIRQR3[i], STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "Forwarded interrupts.",
510	i < 0x20 ? "/TRPM/ForwardRaw/TRAP/%02X" : "/TRPM/ForwardRaw/IRQ/%02X", i);
511	#endif
512	STAM_REG(pVM, &pVM->trpm.s.StatForwardFailNoHandler, STAMTYPE_COUNTER, "/TRPM/ForwardRaw/Fail/NoHandler", STAMUNIT_OCCURENCES, "Failure to forward interrupt in raw mode.");
513	STAM_REG(pVM, &pVM->trpm.s.StatForwardFailPatchAddr, STAMTYPE_COUNTER, "/TRPM/ForwardRaw/Fail/PatchAddr", STAMUNIT_OCCURENCES, "Failure to forward interrupt in raw mode.");
514
515	STAM_REG(pVM, &pVM->trpm.s.StatForwardFailGC, STAMTYPE_COUNTER, "/TRPM/ForwardRaw/Fail/GC", STAMUNIT_OCCURENCES, "Failure to forward interrupt in raw mode.");
516	STAM_REG(pVM, &pVM->trpm.s.StatForwardFailHC, STAMTYPE_COUNTER, "/TRPM/ForwardRaw/Fail/HC", STAMUNIT_OCCURENCES, "Failure to forward interrupt in raw mode.");
517	STAM_REG(pVM, &pVM->trpm.s.StatForwardProfGC, STAMTYPE_PROFILE_ADV, "/TRPM/ForwardRaw/Prof/GC", STAMUNIT_TICKS_PER_CALL, "Profiling TRPMForwardTrap.");
518	STAM_REG(pVM, &pVM->trpm.s.StatForwardProfHC, STAMTYPE_PROFILE_ADV, "/TRPM/ForwardRaw/Prof/HC", STAMUNIT_TICKS_PER_CALL, "Profiling TRPMForwardTrap.");
519
520	STAM_REG(pVM, &pVM->trpm.s.StatTrap0dDisasm, STAMTYPE_PROFILE, "/TRPM/GC/Traps/0d/Disasm", STAMUNIT_TICKS_PER_CALL, "Profiling disassembly part of trpmGCTrap0dHandler.");
521	STAM_REG(pVM, &pVM->trpm.s.StatTrap0dRdTsc, STAMTYPE_COUNTER, "/TRPM/GC/Traps/0d/RdTsc", STAMUNIT_OCCURENCES, "Number of RDTSC #GPs.");
522
523	/*
524	* Default action when entering raw mode for the first time
525	*/
526	VM_FF_SET(pVM, VM_FF_TRPM_SYNC_IDT);
527	return 0;
528	}
529
530
531	/**
532	* Applies relocations to data and code managed by this component.
533	*
534	* This function will be called at init and whenever the VMM need
535	* to relocate itself inside the GC.
536	*
537	* @param pVM The VM handle.
538	* @param offDelta Relocation delta relative to old location.
539	*/
540	TRPMR3DECL(void) TRPMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
541	{
542	LogFlow(("TRPMR3Relocate\n"));
543	/*
544	* Get the trap handler addresses.
545	*
546	* If VMMGC.gc is screwed, so are we. We'll assert here since it elsewise
547	* would make init order impossible if we should assert the presence of these
548	* exports in TRPMR3Init().
549	*/
550	RTGCPTR aGCPtrs[TRPM_HANDLER_MAX] = {0};
551	int rc;
552	rc = PDMR3GetSymbolGC(pVM, VMMGC_MAIN_MODULE_NAME, "TRPMGCHandlerInterupt", &aGCPtrs[TRPM_HANDLER_INT]);
553	AssertReleaseMsgRC(rc, ("Couldn't find TRPMGCHandlerInterupt in VMMGC.gc!\n"));
554
555	rc = PDMR3GetSymbolGC(pVM, VMMGC_MAIN_MODULE_NAME, "TRPMGCHandlerGeneric", &aGCPtrs[TRPM_HANDLER_TRAP]);
556	AssertReleaseMsgRC(rc, ("Couldn't find TRPMGCHandlerGeneric in VMMGC.gc!\n"));
557
558	rc = PDMR3GetSymbolGC(pVM, VMMGC_MAIN_MODULE_NAME, "TRPMGCHandlerTrap08", &aGCPtrs[TRPM_HANDLER_TRAP_08]);
559	AssertReleaseMsgRC(rc, ("Couldn't find TRPMGCHandlerTrap08 in VMMGC.gc!\n"));
560
561	rc = PDMR3GetSymbolGC(pVM, VMMGC_MAIN_MODULE_NAME, "TRPMGCHandlerTrap12", &aGCPtrs[TRPM_HANDLER_TRAP_12]);
562	AssertReleaseMsgRC(rc, ("Couldn't find TRPMGCHandlerTrap12 in VMMGC.gc!\n"));
563
564	RTSEL SelCS = CPUMGetHyperCS(pVM);
565
566	/*
567	* Iterate the idt and set the addresses.
568	*/
569	PVBOXIDTE pIdte = &pVM->trpm.s.aIdt[0];
570	PVBOXIDTE_GENERIC pIdteTemplate = &g_aIdt[0];
571	for (unsigned i = 0; i < ELEMENTS(pVM->trpm.s.aIdt); i++, pIdte++, pIdteTemplate++)
572	{
573	if ( pIdte->Gen.u1Present
574	&& !ASMBitTest(&pVM->trpm.s.au32IdtPatched[0], i)
575	)
576	{
577	Assert(pIdteTemplate->u16OffsetLow < TRPM_HANDLER_MAX);
578	RTGCPTR Offset = aGCPtrs[pIdteTemplate->u16OffsetLow];
579	switch (pIdteTemplate->u16OffsetLow)
580	{
581	/*
582	* Generic handlers have different entrypoints for each possible
583	* vector number. These entrypoints makes a sort of an array with
584	* 8 byte entries where the vector number is the index.
585	* See TRPMGCHandlersA.asm for details.
586	*/
587	case TRPM_HANDLER_INT:
588	case TRPM_HANDLER_TRAP:
589	Offset += i * 8;
590	break;
591	case TRPM_HANDLER_TRAP_12:
592	break;
593	case TRPM_HANDLER_TRAP_08:
594	/* Handle #DF Task Gate in special way. */
595	pIdte->Gen.u16SegSel = SELMGetTrap8Selector(pVM);
596	pIdte->Gen.u16OffsetLow = 0;
597	pIdte->Gen.u16OffsetHigh = 0;
598	SELMSetTrap8EIP(pVM, Offset);
599	continue;
600	}
601	/* (non-task gates only ) */
602	pIdte->Gen.u16OffsetLow = Offset & 0xffff;
603	pIdte->Gen.u16OffsetHigh = Offset >> 16;
604	pIdte->Gen.u16SegSel = SelCS;
605	}
606	}
607
608	/*
609	* Update IDTR (limit is including!).
610	*/
611	CPUMSetHyperIDTR(pVM, VM_GUEST_ADDR(pVM, &pVM->trpm.s.aIdt[0]), sizeof(pVM->trpm.s.aIdt)-1);
612
613	if (!pVM->trpm.s.fDisableMonitoring)
614	{
615	#ifdef TRPM_TRACK_SHADOW_IDT_CHANGES
616	if (pVM->trpm.s.GCPtrIdt != ~0U)
617	{
618	rc = PGMHandlerVirtualDeregister(pVM, pVM->trpm.s.GCPtrIdt);
619	AssertRC(rc);
620	}
621	pVM->trpm.s.GCPtrIdt = VM_GUEST_ADDR(pVM, &pVM->trpm.s.aIdt[0]);
622	rc = PGMR3HandlerVirtualRegister(pVM, PGMVIRTHANDLERTYPE_HYPERVISOR, pVM->trpm.s.GCPtrIdt, pVM->trpm.s.GCPtrIdt + sizeof(pVM->trpm.s.aIdt) - 1,
623	0, 0, "trpmgcShadowIDTWriteHandler", 0, "Shadow IDT write access handler");
624	AssertRC(rc);
625	#endif
626	}
627
628	/* Relocate IDT handlers for forwarding guest traps/interrupts. */
629	for (uint32_t iTrap = 0; iTrap < ELEMENTS(pVM->trpm.s.aGuestTrapHandler); iTrap++)
630	{
631	if (pVM->trpm.s.aGuestTrapHandler[iTrap] != TRPM_INVALID_HANDLER)
632	{
633	Log(("TRPMR3Relocate: iGate=%2X Handler %VGv -> %VGv\n", iTrap, pVM->trpm.s.aGuestTrapHandler[iTrap], pVM->trpm.s.aGuestTrapHandler[iTrap] + offDelta));
634	pVM->trpm.s.aGuestTrapHandler[iTrap] += offDelta;
635	}
636
637	if (ASMBitTest(&pVM->trpm.s.au32IdtPatched[0], iTrap))
638	{
639	PVBOXIDTE pIdte = &pVM->trpm.s.aIdt[iTrap];
640	RTGCPTR pHandler = (pIdte->Gen.u16OffsetHigh << 16) \| pIdte->Gen.u16OffsetLow;
641
642	Log(("TRPMR3Relocate: *iGate=%2X Handler %VGv -> %VGv\n", iTrap, pHandler, pHandler + offDelta));
643	pHandler += offDelta;
644
645	pIdte->Gen.u16OffsetHigh = pHandler >> 16;
646	pIdte->Gen.u16OffsetLow = pHandler & 0xFFFF;
647
648	}
649	}
650
651	pVM->trpm.s.paStatForwardedIRQGC += offDelta;
652	pVM->trpm.s.paStatForwardedIRQR0 = MMHyperR3ToR0(pVM, pVM->trpm.s.paStatForwardedIRQR3);
653	}
654
655
656	/**
657	* Terminates the Trap Manager
658	*
659	* @returns VBox status code.
660	* @param pVM The VM to operate on.
661	*/
662	TRPMR3DECL(int) TRPMR3Term(PVM pVM)
663	{
664	NOREF(pVM);
665	return 0;
666	}
667
668
669	/**
670	* The VM is being reset.
671	*
672	* For the TRPM component this means that any IDT write monitors
673	* needs to be removed, any pending trap cleared, and the IDT reset.
674	*
675	* @param pVM VM handle.
676	*/
677	TRPMR3DECL(void) TRPMR3Reset(PVM pVM)
678	{
679	/*
680	* Deregister any virtual handlers.
681	*/
682	#ifdef TRPM_TRACK_GUEST_IDT_CHANGES
683	if (pVM->trpm.s.GuestIdtr.pIdt != ~0U)
684	{
685	if (!pVM->trpm.s.fSafeToDropGuestIDTMonitoring)
686	{
687	int rc = PGMHandlerVirtualDeregister(pVM, pVM->trpm.s.GuestIdtr.pIdt);
688	AssertRC(rc);
689	}
690	pVM->trpm.s.GuestIdtr.pIdt = ~0U;
691	}
692	pVM->trpm.s.GuestIdtr.cbIdt = 0;
693	#endif
694
695	/*
696	* Reinitialize other members calling the relocator to get things right.
697	*/
698	pVM->trpm.s.uActiveVector = ~0;
699	memcpy(&pVM->trpm.s.aIdt[0], &g_aIdt[0], sizeof(pVM->trpm.s.aIdt));
700	memset(pVM->trpm.s.aGuestTrapHandler, 0, sizeof(pVM->trpm.s.aGuestTrapHandler));
701	TRPMR3Relocate(pVM, 0);
702
703	/*
704	* Default action when entering raw mode for the first time
705	*/
706	VM_FF_SET(pVM, VM_FF_TRPM_SYNC_IDT);
707	}
708
709
710	/**
711	* Execute state save operation.
712	*
713	* @returns VBox status code.
714	* @param pVM VM Handle.
715	* @param pSSM SSM operation handle.
716	*/
717	static DECLCALLBACK(int) trpmR3Save(PVM pVM, PSSMHANDLE pSSM)
718	{
719	LogFlow(("trpmR3Save:\n"));
720
721	/*
722	* Active and saved traps.
723	*/
724	PTRPM pTrpm = &pVM->trpm.s;
725	SSMR3PutUInt(pSSM, pTrpm->uActiveVector);
726	SSMR3PutUInt(pSSM, pTrpm->enmActiveType);
727	SSMR3PutGCUInt(pSSM, pTrpm->uActiveErrorCode);
728	SSMR3PutGCUIntPtr(pSSM, pTrpm->uActiveCR2);
729	SSMR3PutGCUInt(pSSM, pTrpm->uSavedVector);
730	SSMR3PutUInt(pSSM, pTrpm->enmSavedType);
731	SSMR3PutGCUInt(pSSM, pTrpm->uSavedErrorCode);
732	SSMR3PutGCUIntPtr(pSSM, pTrpm->uSavedCR2);
733	SSMR3PutGCUInt(pSSM, pTrpm->uPrevVector);
734	#if 0 /** @todo Enable this (+ load change) on the next version change. */
735	SSMR3PutBool(pSSM, pTrpm->fDisableMonitoring);
736	#else
737	SSMR3PutGCUInt(pSSM, pTrpm->fDisableMonitoring);
738	#endif
739	SSMR3PutUInt(pSSM, VM_FF_ISSET(pVM, VM_FF_TRPM_SYNC_IDT));
740	SSMR3PutMem(pSSM, &pTrpm->au32IdtPatched[0], sizeof(pTrpm->au32IdtPatched));
741	SSMR3PutU32(pSSM, ~0); /* separator. */
742
743	/*
744	* Save any trampoline gates.
745	*/
746	for (uint32_t iTrap = 0; iTrap < ELEMENTS(pTrpm->aGuestTrapHandler); iTrap++)
747	{
748	if (pTrpm->aGuestTrapHandler[iTrap])
749	{
750	SSMR3PutU32(pSSM, iTrap);
751	SSMR3PutGCPtr(pSSM, pTrpm->aGuestTrapHandler[iTrap]);
752	SSMR3PutMem(pSSM, &pTrpm->aIdt[iTrap], sizeof(pTrpm->aIdt[iTrap]));
753	}
754	}
755
756	return SSMR3PutU32(pSSM, ~0); /* terminator */
757	}
758
759
760	/**
761	* Execute state load operation.
762	*
763	* @returns VBox status code.
764	* @param pVM VM Handle.
765	* @param pSSM SSM operation handle.
766	* @param u32Version Data layout version.
767	*/
768	static DECLCALLBACK(int) trpmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t u32Version)
769	{
770	LogFlow(("trpmR3Load:\n"));
771
772	/*
773	* Validate version.
774	*/
775	if (u32Version != TRPM_SAVED_STATE_VERSION)
776	{
777	Log(("trpmR3Load: Invalid version u32Version=%d!\n", u32Version));
778	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
779	}
780
781	/*
782	* Call the reset function to kick out any handled gates and other potential trouble.
783	*/
784	TRPMR3Reset(pVM);
785
786	/*
787	* Active and saved traps.
788	*/
789	PTRPM pTrpm = &pVM->trpm.s;
790	SSMR3GetUInt(pSSM, &pTrpm->uActiveVector);
791	SSMR3GetUInt(pSSM, (uint32_t *)&pTrpm->enmActiveType);
792	SSMR3GetGCUInt(pSSM, &pTrpm->uActiveErrorCode);
793	SSMR3GetGCUIntPtr(pSSM, &pTrpm->uActiveCR2);
794	SSMR3GetGCUInt(pSSM, &pTrpm->uSavedVector);
795	SSMR3GetUInt(pSSM, (uint32_t *)&pTrpm->enmSavedType);
796	SSMR3GetGCUInt(pSSM, &pTrpm->uSavedErrorCode);
797	SSMR3GetGCUIntPtr(pSSM, &pTrpm->uSavedCR2);
798	SSMR3GetGCUInt(pSSM, &pTrpm->uPrevVector);
799	#if 0 /** @todo Enable this + the corresponding save code on the next version change. */
800	SSMR3GetBool(pSSM, &pTrpm->fDisableMonitoring);
801	#else
802	RTGCUINT fDisableMonitoring;
803	SSMR3GetGCUInt(pSSM, &fDisableMonitoring);
804	pTrpm->fDisableMonitoring = !!fDisableMonitoring;
805	#endif
806
807	RTUINT fSyncIDT;
808	int rc = SSMR3GetUInt(pSSM, &fSyncIDT);
809	if (VBOX_FAILURE(rc))
810	return rc;
811	if (fSyncIDT & ~1)
812	{
813	AssertMsgFailed(("fSyncIDT=%#x\n", fSyncIDT));
814	return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
815	}
816	if (fSyncIDT)
817	VM_FF_SET(pVM, VM_FF_TRPM_SYNC_IDT);
818	/* else: cleared by reset call above. */
819
820	SSMR3GetMem(pSSM, &pTrpm->au32IdtPatched[0], sizeof(pTrpm->au32IdtPatched));
821
822	/* check the separator */
823	uint32_t u32Sep;
824	rc = SSMR3GetU32(pSSM, &u32Sep);
825	if (VBOX_FAILURE(rc))
826	return rc;
827	if (u32Sep != (uint32_t)~0)
828	{
829	AssertMsgFailed(("u32Sep=%#x (first)\n", u32Sep));
830	return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
831	}
832
833	/*
834	* Restore any trampoline gates.
835	*/
836	for (;;)
837	{
838	/* gate number / terminator */
839	uint32_t iTrap;
840	rc = SSMR3GetU32(pSSM, &iTrap);
841	if (VBOX_FAILURE(rc))
842	return rc;
843	if (iTrap == (uint32_t)~0)
844	break;
845	if ( iTrap >= ELEMENTS(pTrpm->aIdt)
846	\|\| pTrpm->aGuestTrapHandler[iTrap])
847	{
848	AssertMsgFailed(("iTrap=%#x\n", iTrap));
849	return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
850	}
851
852	/* restore the IDT entry. */
853	RTGCPTR GCPtrHandler;
854	SSMR3GetGCPtr(pSSM, &GCPtrHandler);
855	VBOXIDTE Idte;
856	rc = SSMR3GetMem(pSSM, &Idte, sizeof(Idte));
857	if (VBOX_FAILURE(rc))
858	return rc;
859	Assert(GCPtrHandler);
860	pTrpm->aIdt[iTrap] = Idte;
861	}
862
863	return VINF_SUCCESS;
864	}
865
866
867	/**
868	* Check if gate handlers were updated
869	* (callback for the VM_FF_TRPM_SYNC_IDT forced action).
870	*
871	* @returns VBox status code.
872	* @param pVM The VM handle.
873	*/
874	TRPMR3DECL(int) TRPMR3SyncIDT(PVM pVM)
875	{
876	STAM_PROFILE_START(&pVM->trpm.s.StatSyncIDT, a);
877	const bool fRawRing0 = EMIsRawRing0Enabled(pVM);
878	int rc;
879
880	if (pVM->trpm.s.fDisableMonitoring)
881	{
882	VM_FF_CLEAR(pVM, VM_FF_TRPM_SYNC_IDT);
883	return VINF_SUCCESS; /* Nothing to do */
884	}
885
886	if (fRawRing0 && CSAMIsEnabled(pVM))
887	{
888	/* Clear all handlers */
889	Log(("TRPMR3SyncIDT: Clear all trap handlers.\n"));
890	/** @todo inefficient, but simple */
891	for (unsigned iGate = 0; iGate < 256; iGate++)
892	trpmClearGuestTrapHandler(pVM, iGate);
893
894	/* Scan them all (only the first time) */
895	CSAMR3CheckGates(pVM, 0, 256);
896	}
897
898	/*
899	* Get the IDTR.
900	*/
901	VBOXIDTR IDTR;
902	IDTR.pIdt = CPUMGetGuestIDTR(pVM, &IDTR.cbIdt);
903	if (!IDTR.cbIdt)
904	{
905	Log(("No IDT entries...\n"));
906	return DBGFSTOP(pVM);
907	}
908
909	#ifdef TRPM_TRACK_GUEST_IDT_CHANGES
910	/*
911	* Check if Guest's IDTR has changed.
912	*/
913	if ( IDTR.pIdt != pVM->trpm.s.GuestIdtr.pIdt
914	\|\| IDTR.cbIdt != pVM->trpm.s.GuestIdtr.cbIdt)
915	{
916	Log(("TRPMR3UpdateFromCPUM: Guest's IDT is changed to pIdt=%08X cbIdt=%08X\n", IDTR.pIdt, IDTR.cbIdt));
917	if (!pVM->trpm.s.fSafeToDropGuestIDTMonitoring)
918	{
919	/*
920	* [Re]Register write virtual handler for guest's IDT.
921	*/
922	if (pVM->trpm.s.GuestIdtr.pIdt != ~0U)
923	{
924	rc = PGMHandlerVirtualDeregister(pVM, pVM->trpm.s.GuestIdtr.pIdt);
925	AssertRCReturn(rc, rc);
926	}
927	/* limit is including */
928	rc = PGMR3HandlerVirtualRegister(pVM, PGMVIRTHANDLERTYPE_WRITE, IDTR.pIdt, IDTR.pIdt + IDTR.cbIdt /* already inclusive */,
929	0, trpmGuestIDTWriteHandler, "trpmgcGuestIDTWriteHandler", 0, "Guest IDT write access handler");
930
931	if (rc == VERR_PGM_HANDLER_VIRTUAL_CONFLICT)
932	{
933	/* Could be a conflict with CSAM */
934	CSAMR3RemovePage(pVM, IDTR.pIdt);
935	if (PAGE_ADDRESS(IDTR.pIdt) != PAGE_ADDRESS(IDTR.pIdt + IDTR.cbIdt))
936	CSAMR3RemovePage(pVM, IDTR.pIdt + IDTR.cbIdt);
937
938	rc = PGMR3HandlerVirtualRegister(pVM, PGMVIRTHANDLERTYPE_WRITE, IDTR.pIdt, IDTR.pIdt + IDTR.cbIdt /* already inclusive */,
939	0, trpmGuestIDTWriteHandler, "trpmgcGuestIDTWriteHandler", 0, "Guest IDT write access handler");
940	}
941
942	AssertRCReturn(rc, rc);
943	}
944
945	/* Update saved Guest IDTR. */
946	pVM->trpm.s.GuestIdtr = IDTR;
947	}
948	#endif
949
950	/*
951	* Sync the interrupt gate.
952	* Should probably check/sync the others too, but for now we'll handle that in #GP.
953	*/
954	X86DESC Idte3;
955	rc = PGMPhysReadGCPtr(pVM, &Idte3, IDTR.pIdt + sizeof(Idte3) * 3, sizeof(Idte3));
956	if (VBOX_FAILURE(rc))
957	{
958	AssertMsgRC(rc, ("Failed to read IDT[3]! rc=%Vrc\n", rc));
959	return DBGFSTOP(pVM);
960	}
961	AssertRCReturn(rc, rc);
962	if (fRawRing0)
963	pVM->trpm.s.aIdt[3].Gen.u2DPL = RT_MAX(Idte3.Gen.u2Dpl, 1);
964	else
965	pVM->trpm.s.aIdt[3].Gen.u2DPL = Idte3.Gen.u2Dpl;
966
967	/*
968	* Clear the FF and we're done.
969	*/
970	VM_FF_CLEAR(pVM, VM_FF_TRPM_SYNC_IDT);
971	STAM_PROFILE_STOP(&pVM->trpm.s.StatSyncIDT, a);
972	return VINF_SUCCESS;
973	}
974
975
976	/**
977	* Disable IDT monitoring and syncing
978	*
979	* @param pVM The VM to operate on.
980	*/
981	TRPMR3DECL(void) TRPMR3DisableMonitoring(PVM pVM)
982	{
983	/*
984	* Deregister any virtual handlers.
985	*/
986	#ifdef TRPM_TRACK_GUEST_IDT_CHANGES
987	if (pVM->trpm.s.GuestIdtr.pIdt != ~0U)
988	{
989	if (!pVM->trpm.s.fSafeToDropGuestIDTMonitoring)
990	{
991	int rc = PGMHandlerVirtualDeregister(pVM, pVM->trpm.s.GuestIdtr.pIdt);
992	AssertRC(rc);
993	}
994	pVM->trpm.s.GuestIdtr.pIdt = ~0U;
995	}
996	pVM->trpm.s.GuestIdtr.cbIdt = 0;
997	#endif
998
999	#ifdef TRPM_TRACK_SHADOW_IDT_CHANGES
1000	if (pVM->trpm.s.GCPtrIdt != ~0U)
1001	{
1002	int rc = PGMHandlerVirtualDeregister(pVM, pVM->trpm.s.GCPtrIdt);
1003	AssertRC(rc);
1004	pVM->trpm.s.GCPtrIdt = ~0U;
1005	}
1006	#endif
1007
1008	VM_FF_CLEAR(pVM, VM_FF_TRPM_SYNC_IDT);
1009
1010	pVM->trpm.s.fDisableMonitoring = true;
1011	}
1012
1013
1014	/**
1015	* \#PF Handler callback for virtual access handler ranges.
1016	*
1017	* Important to realize that a physical page in a range can have aliases, and
1018	* for ALL and WRITE handlers these will also trigger.
1019	*
1020	* @returns VINF_SUCCESS if the handler have carried out the operation.
1021	* @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
1022	* @param pVM VM Handle.
1023	* @param GCPtr The virtual address the guest is writing to. (not correct if it's an alias!)
1024	* @param pvPtr The HC mapping of that address.
1025	* @param pvBuf What the guest is reading/writing.
1026	* @param cbBuf How much it's reading/writing.
1027	* @param enmAccessType The access type.
1028	* @param pvUser User argument.
1029	*/
1030	static DECLCALLBACK(int) trpmGuestIDTWriteHandler(PVM pVM, RTGCPTR GCPtr, void pvPtr, void pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser)
1031	{
1032	Assert(enmAccessType == PGMACCESSTYPE_WRITE);
1033	Log(("trpmGuestIDTWriteHandler: write to %VGv size %d\n", GCPtr, cbBuf));
1034	VM_FF_SET(pVM, VM_FF_TRPM_SYNC_IDT);
1035	return VINF_PGM_HANDLER_DO_DEFAULT;
1036	}
1037
1038
1039	/**
1040	* Clear passthrough interrupt gate handler (reset to default handler)
1041	*
1042	* @returns VBox status code.
1043	* @param pVM The VM to operate on.
1044	* @param iTrap Trap/interrupt gate number.
1045	*/
1046	TRPMR3DECL(int) trpmR3ClearPassThroughHandler(PVM pVM, unsigned iTrap)
1047	{
1048	/** @todo cleanup trpmR3ClearPassThroughHandler()! */
1049	RTGCPTR aGCPtrs[TRPM_HANDLER_MAX];
1050	int rc;
1051
1052	memset(aGCPtrs, 0, sizeof(aGCPtrs));
1053
1054	rc = PDMR3GetSymbolGC(pVM, VMMGC_MAIN_MODULE_NAME, "TRPMGCHandlerInterupt", &aGCPtrs[TRPM_HANDLER_INT]);
1055	AssertReleaseMsgRC(rc, ("Couldn't find TRPMGCHandlerInterupt in VMMGC.gc!\n"));
1056
1057	if ( iTrap < TRPM_HANDLER_INT_BASE
1058	\|\| iTrap >= ELEMENTS(pVM->trpm.s.aIdt))
1059	{
1060	AssertMsg(iTrap < TRPM_HANDLER_INT_BASE, ("Illegal gate number %#x!\n", iTrap));
1061	return VERR_INVALID_PARAMETER;
1062	}
1063	memcpy(&pVM->trpm.s.aIdt[iTrap], &g_aIdt[iTrap], sizeof(pVM->trpm.s.aIdt[0]));
1064
1065	/* Unmark it for relocation purposes. */
1066	ASMBitClear(&pVM->trpm.s.au32IdtPatched[0], iTrap);
1067
1068	RTSEL SelCS = CPUMGetHyperCS(pVM);
1069	PVBOXIDTE pIdte = &pVM->trpm.s.aIdt[iTrap];
1070	PVBOXIDTE_GENERIC pIdteTemplate = &g_aIdt[iTrap];
1071	if (pIdte->Gen.u1Present)
1072	{
1073	Assert(pIdteTemplate->u16OffsetLow == TRPM_HANDLER_INT);
1074	Assert(sizeof(RTGCPTR) <= sizeof(aGCPtrs[0]));
1075	RTGCPTR Offset = (RTGCPTR)aGCPtrs[pIdteTemplate->u16OffsetLow];
1076
1077	/*
1078	* Generic handlers have different entrypoints for each possible
1079	* vector number. These entrypoints make a sort of an array with
1080	* 8 byte entries where the vector number is the index.
1081	* See TRPMGCHandlersA.asm for details.
1082	*/
1083	Offset += iTrap * 8;
1084
1085	if (pIdte->Gen.u5Type2 != VBOX_IDTE_TYPE2_TASK)
1086	{
1087	pIdte->Gen.u16OffsetLow = Offset & 0xffff;
1088	pIdte->Gen.u16OffsetHigh = Offset >> 16;
1089	pIdte->Gen.u16SegSel = SelCS;
1090	}
1091	}
1092
1093	return VINF_SUCCESS;
1094	}
1095
1096
1097	/**
1098	* Check if address is a gate handler (interrupt or trap).
1099	*
1100	* @returns gate nr or ~0 is not found
1101	*
1102	* @param pVM VM handle.
1103	* @param GCPtr GC address to check.
1104	*/
1105	TRPMR3DECL(uint32_t) TRPMR3QueryGateByHandler(PVM pVM, RTGCPTR GCPtr)
1106	{
1107	for (uint32_t iTrap = 0; iTrap < ELEMENTS(pVM->trpm.s.aGuestTrapHandler); iTrap++)
1108	{
1109	if (pVM->trpm.s.aGuestTrapHandler[iTrap] == GCPtr)
1110	return iTrap;
1111
1112	/* redundant */
1113	if (ASMBitTest(&pVM->trpm.s.au32IdtPatched[0], iTrap))
1114	{
1115	PVBOXIDTE pIdte = &pVM->trpm.s.aIdt[iTrap];
1116	RTGCPTR pHandler = (pIdte->Gen.u16OffsetHigh << 16) \| pIdte->Gen.u16OffsetLow;
1117
1118	if (pHandler == GCPtr)
1119	return iTrap;
1120	}
1121	}
1122	return ~0;
1123	}
1124
1125
1126	/**
1127	* Get guest trap/interrupt gate handler
1128	*
1129	* @returns Guest trap handler address or TRPM_INVALID_HANDLER if none installed
1130	* @param pVM The VM to operate on.
1131	* @param iTrap Interrupt/trap number.
1132	*/
1133	TRPMR3DECL(RTGCPTR) TRPMR3GetGuestTrapHandler(PVM pVM, unsigned iTrap)
1134	{
1135	AssertReturn(iTrap < ELEMENTS(pVM->trpm.s.aIdt), TRPM_INVALID_HANDLER);
1136
1137	return pVM->trpm.s.aGuestTrapHandler[iTrap];
1138	}
1139
1140
1141	/**
1142	* Set guest trap/interrupt gate handler
1143	* Used for setting up trap gates used for kernel calls.
1144	*
1145	* @returns VBox status code.
1146	* @param pVM The VM to operate on.
1147	* @param iTrap Interrupt/trap number.
1148	* @param pHandler GC handler pointer
1149	*/
1150	TRPMR3DECL(int) TRPMR3SetGuestTrapHandler(PVM pVM, unsigned iTrap, RTGCPTR pHandler)
1151	{
1152	/*
1153	* Validate.
1154	*/
1155	if (iTrap >= ELEMENTS(pVM->trpm.s.aIdt))
1156	{
1157	AssertMsg(iTrap < TRPM_HANDLER_INT_BASE, ("Illegal gate number %d!\n", iTrap));
1158	return VERR_INVALID_PARAMETER;
1159	}
1160
1161	AssertReturn(pHandler == TRPM_INVALID_HANDLER \|\| PATMIsPatchGCAddr(pVM, pHandler), VERR_INVALID_PARAMETER);
1162
1163	uint16_t cbIDT;
1164	RTGCPTR GCPtrIDT = CPUMGetGuestIDTR(pVM, &cbIDT);
1165	if (iTrap * sizeof(VBOXIDTE) >= cbIDT)
1166	return VERR_INVALID_PARAMETER; /* Silently ignore out of range requests. */
1167
1168	if (pHandler == TRPM_INVALID_HANDLER)
1169	{
1170	/* clear trap handler */
1171	Log(("TRPMR3SetGuestTrapHandler: clear handler %x\n", iTrap));
1172	return trpmClearGuestTrapHandler(pVM, iTrap);
1173	}
1174
1175	/*
1176	* Read the guest IDT entry.
1177	*/
1178	VBOXIDTE GuestIdte;
1179	int rc = PGMPhysReadGCPtr(pVM, &GuestIdte, GCPtrIDT + iTrap * sizeof(GuestIdte), sizeof(GuestIdte));
1180	if (VBOX_FAILURE(rc))
1181	{
1182	AssertMsgRC(rc, ("Failed to read IDTE! rc=%Vrc\n", rc));
1183	return rc;
1184	}
1185
1186	if (EMIsRawRing0Enabled(pVM))
1187	{
1188	/*
1189	* Only replace handlers for which we are 100% certain there won't be
1190	* any host interrupts.
1191	*
1192	* 0x2E is safe on Windows because it's the system service interrupt gate. Not
1193	* quite certain if this is safe or not on 64-bit Vista, it probably is.
1194	*
1195	* 0x80 is safe on Linux because it's the syscall vector and is part of the
1196	* 32-bit usermode ABI. 64-bit Linux (usually) supports 32-bit processes
1197	* and will therefor never assign hardware interrupts to 0x80.
1198	*
1199	* Exactly why 0x80 is safe on 32-bit Windows is a bit hazy, but it seems
1200	* to work ok... However on 64-bit Vista (SMP?) is doesn't work reliably.
1201	* Booting Linux/BSD guest will cause system lockups on most of the computers.
1202	*
1203	* PORTME - Check if your host keeps any of these gates free from hw ints.
1204	*
1205	* Note! SELMR3SyncTSS also has code related to this interrupt handler replacing.
1206	*/
1207	/** @todo handle those dependencies better! */
1208	/** @todo Solve this in a proper manner. see defect #1186 */
1209	#if defined(RT_OS_WINDOWS) && defined(RT_ARCH_X86)
1210	if (iTrap == 0x2E \|\| iTrap == 0x80)
1211	#elif defined(RT_OS_LINUX)
1212	if (iTrap == 0x80)
1213	#else
1214	if (0)
1215	#endif
1216	{
1217	if ( GuestIdte.Gen.u1Present
1218	&& ( GuestIdte.Gen.u5Type2 == VBOX_IDTE_TYPE2_TRAP_32
1219	\|\| GuestIdte.Gen.u5Type2 == VBOX_IDTE_TYPE2_INT_32)
1220	&& GuestIdte.Gen.u2DPL == 3)
1221	{
1222	PVBOXIDTE pIdte = &pVM->trpm.s.aIdt[iTrap];
1223
1224	GuestIdte.Gen.u5Type2 = VBOX_IDTE_TYPE2_TRAP_32;
1225	GuestIdte.Gen.u16OffsetHigh = pHandler >> 16;
1226	GuestIdte.Gen.u16OffsetLow = pHandler & 0xFFFF;
1227	GuestIdte.Gen.u16SegSel \|= 1; //ring 1
1228	*pIdte = GuestIdte;
1229
1230	/* Mark it for relocation purposes. */
1231	ASMBitSet(&pVM->trpm.s.au32IdtPatched[0], iTrap);
1232
1233	/* Also store it in our guest trap array. */
1234	pVM->trpm.s.aGuestTrapHandler[iTrap] = pHandler;
1235
1236	Log(("Setting trap handler %x to %08X (direct)\n", iTrap, pHandler));
1237	return VINF_SUCCESS;
1238	}
1239	/* ok, let's try to install a trampoline handler then. */
1240	}
1241	}
1242
1243	if ( GuestIdte.Gen.u1Present
1244	&& ( GuestIdte.Gen.u5Type2 == VBOX_IDTE_TYPE2_TRAP_32
1245	\|\| GuestIdte.Gen.u5Type2 == VBOX_IDTE_TYPE2_INT_32)
1246	&& (GuestIdte.Gen.u2DPL == 3 \|\| GuestIdte.Gen.u2DPL == 0))
1247	{
1248	/*
1249	* Save handler which can be used for a trampoline call inside the GC
1250	*/
1251	Log(("Setting trap handler %x to %08X\n", iTrap, pHandler));
1252	pVM->trpm.s.aGuestTrapHandler[iTrap] = pHandler;
1253	return VINF_SUCCESS;
1254	}
1255	return VERR_INVALID_PARAMETER;
1256	}
1257
1258
1259	/**
1260	* Check if address is a gate handler (interrupt/trap/task/anything).
1261	*
1262	* @returns True is gate handler, false if not.
1263	*
1264	* @param pVM VM handle.
1265	* @param GCPtr GC address to check.
1266	*/
1267	TRPMR3DECL(bool) TRPMR3IsGateHandler(PVM pVM, RTGCPTR GCPtr)
1268	{
1269	/*
1270	* Read IDTR and calc last entry.
1271	*/
1272	uint16_t cbIDT;
1273	RTGCPTR GCPtrIDTE = CPUMGetGuestIDTR(pVM, &cbIDT);
1274	unsigned cEntries = (cbIDT + 1) / sizeof(VBOXIDTE);
1275	if (!cEntries)
1276	return false;
1277	RTGCPTR GCPtrIDTELast = GCPtrIDTE + (cEntries - 1) * sizeof(VBOXIDTE);
1278
1279	/*
1280	* Outer loop: interate pages.
1281	*/
1282	while (GCPtrIDTE <= GCPtrIDTELast)
1283	{
1284	/*
1285	* Convert this page to a HC address.
1286	* (This function checks for not-present pages.)
1287	*/
1288	PVBOXIDTE pIDTE;
1289	int rc = PGMPhysGCPtr2HCPtr(pVM, GCPtrIDTE, (void **)&pIDTE);
1290	if (VBOX_SUCCESS(rc))
1291	{
1292	/*
1293	* Inner Loop: Iterate the data on this page looking for an entry equal to GCPtr.
1294	* N.B. Member of the Flat Earth Society...
1295	*/
1296	while (GCPtrIDTE <= GCPtrIDTELast)
1297	{
1298	if (pIDTE->Gen.u1Present)
1299	{
1300	RTGCPTR GCPtrHandler = (pIDTE->Gen.u16OffsetHigh << 16) \| pIDTE->Gen.u16OffsetLow;
1301	if (GCPtr == GCPtrHandler)
1302	return true;
1303	}
1304
1305	/* next entry */
1306	if ((GCPtrIDTE & PAGE_OFFSET_MASK) + sizeof(VBOXIDTE) >= PAGE_SIZE)
1307	{
1308	AssertMsg(!(GCPtrIDTE & (sizeof(VBOXIDTE) - 1)),
1309	("IDT is crossing pages and it's not aligned! GCPtrIDTE=%#x cbIDT=%#x\n", GCPtrIDTE, cbIDT));
1310	GCPtrIDTE += sizeof(VBOXIDTE);
1311	break;
1312	}
1313	GCPtrIDTE += sizeof(VBOXIDTE);
1314	pIDTE++;
1315	}
1316	}
1317	else
1318	{
1319	/* Skip to the next page (if any). Take care not to wrap around the address space. */
1320	if ((GCPtrIDTELast >> PAGE_SHIFT) == (GCPtrIDTE >> PAGE_SHIFT))
1321	return false;
1322	GCPtrIDTE = RT_ALIGN_T(GCPtrIDTE, PAGE_SIZE, RTGCPTR) + PAGE_SIZE + (GCPtrIDTE & (sizeof(VBOXIDTE) - 1));
1323	}
1324	}
1325	return false;
1326	}
1327
1328
1329	/**
1330	* Inject event (such as external irq or trap)
1331	*
1332	* @returns VBox status code.
1333	* @param pVM The VM to operate on.
1334	* @param enmEvent Trpm event type
1335	*/
1336	TRPMR3DECL(int) TRPMR3InjectEvent(PVM pVM, TRPMEVENT enmEvent)
1337	{
1338	PCPUMCTX pCtx;
1339	int rc;
1340
1341	rc = CPUMQueryGuestCtxPtr(pVM, &pCtx);
1342	AssertRC(rc);
1343	Assert(!PATMIsPatchGCAddr(pVM, (RTGCPTR)pCtx->eip));
1344	Assert(!VM_FF_ISSET(pVM, VM_FF_INHIBIT_INTERRUPTS));
1345
1346	/* Currently only useful for external hardware interrupts. */
1347	Assert(enmEvent == TRPM_HARDWARE_INT);
1348
1349	if (REMR3QueryPendingInterrupt(pVM) == REM_NO_PENDING_IRQ)
1350	{
1351	#ifdef TRPM_FORWARD_TRAPS_IN_GC
1352
1353	# ifdef LOG_ENABLED
1354	DBGFR3InfoLog(pVM, "cpumguest", "TRPMInject");
1355	DBGFR3DisasInstrCurrentLog(pVM, "TRPMInject");
1356	# endif
1357
1358	uint8_t u8Interrupt;
1359	rc = PDMGetInterrupt(pVM, &u8Interrupt);
1360	Log(("TRPMR3InjectEvent: u8Interrupt=%d (%#x) rc=%Vrc\n", u8Interrupt, u8Interrupt, rc));
1361	if (VBOX_SUCCESS(rc))
1362	{
1363	if (HWACCMR3IsActive(pVM))
1364	{
1365	rc = TRPMAssertTrap(pVM, u8Interrupt, enmEvent);
1366	AssertRC(rc);
1367	STAM_COUNTER_INC(&pVM->trpm.s.paStatForwardedIRQR3[u8Interrupt]);
1368	return VINF_EM_RESCHEDULE_HWACC;
1369	}
1370	/* If the guest gate is not patched, then we will check (again) if we can patch it. */
1371	if (pVM->trpm.s.aGuestTrapHandler[u8Interrupt] == TRPM_INVALID_HANDLER)
1372	{
1373	CSAMR3CheckGates(pVM, u8Interrupt, 1);
1374	Log(("TRPMR3InjectEvent: recheck gate %x -> valid=%d\n", u8Interrupt, TRPMR3GetGuestTrapHandler(pVM, u8Interrupt) != TRPM_INVALID_HANDLER));
1375	}
1376
1377	if (pVM->trpm.s.aGuestTrapHandler[u8Interrupt] != TRPM_INVALID_HANDLER)
1378	{
1379	/* Must check pending forced actions as our IDT or GDT might be out of sync */
1380	EMR3CheckRawForcedActions(pVM);
1381
1382	/* There's a handler -> let's execute it in raw mode */
1383	rc = TRPMForwardTrap(pVM, CPUMCTX2CORE(pCtx), u8Interrupt, 0, TRPM_TRAP_NO_ERRORCODE, enmEvent);
1384	if (rc == VINF_SUCCESS /* Don't use VBOX_SUCCESS */)
1385	{
1386	Assert(!VM_FF_ISPENDING(pVM, VM_FF_SELM_SYNC_GDT \| VM_FF_SELM_SYNC_LDT \| VM_FF_TRPM_SYNC_IDT \| VM_FF_SELM_SYNC_TSS));
1387
1388	STAM_COUNTER_INC(&pVM->trpm.s.paStatForwardedIRQR3[u8Interrupt]);
1389	return VINF_EM_RESCHEDULE_RAW;
1390	}
1391	}
1392	else
1393	STAM_COUNTER_INC(&pVM->trpm.s.StatForwardFailNoHandler);
1394	REMR3NotifyPendingInterrupt(pVM, u8Interrupt);
1395	}
1396	else
1397	AssertRC(rc);
1398	#else
1399	if (HWACCMR3IsActive(pVM))
1400	{
1401	uint8_t u8Interrupt;
1402	rc = PDMGetInterrupt(pVM, &u8Interrupt);
1403	Log(("TRPMR3InjectEvent: u8Interrupt=%d (%#x) rc=%Vrc\n", u8Interrupt, u8Interrupt, rc));
1404	if (VBOX_SUCCESS(rc))
1405	{
1406	rc = TRPMAssertTrap(pVM, u8Interrupt, TRPM_HARDWARE_INT);
1407	AssertRC(rc);
1408	STAM_COUNTER_INC(&pVM->trpm.s.paStatForwardedIRQR3[u8Interrupt]);
1409	return VINF_EM_RESCHEDULE_HWACC;
1410	}
1411	}
1412	else
1413	AssertRC(rc);
1414	#endif
1415	}
1416	/** @todo check if it's safe to translate the patch address to the original guest address.
1417	* this implies a safe state in translated instructions and should take sti successors into account (instruction fusing)
1418	*/
1419	/* Note: if it's a PATM address, then we'll go back to raw mode regardless of the return code below. */
1420
1421	/* Fall back to the recompiler */
1422	return VINF_EM_RESCHEDULE_REM; /* (Heed the halted state if this is changed!) */
1423	}
1424

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source: vbox/trunk/src/VBox/VMM/TRPM.cpp@ 7954

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