TRPM.cpp@ 4906

Last change on this file since 4906 was 4071, checked in by vboxsync, 17 years ago
Biggest check-in ever. New source code headers for all (C) innotek files.
Property svn:eol-style set to `native` Property svn:keywords set to `Id`
File size: 69.5 KB

Line
1	/* $Id: TRPM.cpp 4071 2007-08-07 17:07:59Z vboxsync $ */
2	/** @file
3	* TRPM - The Trap Monitor
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 innotek GmbH
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License as published by the Free Software Foundation,
13	* in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
14	* distribution. VirtualBox OSE is distributed in the hope that it will
15	* be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18
19	/** @page pg_trpm TRPM - The Trap Monitor
20	*
21	* The Trap Monitor (TRPM) is responsible for all trap and interrupt
22	* handling in the VMM.
23	*
24	* Interrupts occuring in GC will be routed to the HC and reassert there. TRPM
25	* makes the assumption that the VMM or Guest will not cause hardware
26	* interrupts to occur.
27	*
28	* Traps will be passed to a list of registered trap handlers which will
29	* check and see if they are the responsible part for the trap. If no handler
30	* was found the default action is to pass the trap on the Guest OS. Trap
31	* handlers may raise a Guest OS trap as a result of the trap handling.
32	* Statistics will be maintained so the trap handler list can be resorted
33	* every now and then to examin handlers in the optimal order.
34	*
35	* If a trap happens inside the VMM (Guest Context) the TRPM will take the
36	* shortest path back to Ring-3 Host Context and brutally destroy the VM.
37	*
38	* The TRPM will have interfaces to enable devices to assert interrupts
39	* in the guest, these interfaces are multithreaded and availble from
40	* all contexts. This is to allow devices to have use worker threads.
41	*
42	*/
43
44
45
46	/*******************************************************************************
47	* Header Files *
48	*******************************************************************************/
49	#define LOG_GROUP LOG_GROUP_TRPM
50	#include <VBox/trpm.h>
51	#include <VBox/cpum.h>
52	#include <VBox/selm.h>
53	#include <VBox/ssm.h>
54	#include <VBox/pdmapi.h>
55	#include <VBox/pgm.h>
56	#include <VBox/dbgf.h>
57	#include <VBox/mm.h>
58	#include <VBox/stam.h>
59	#include <VBox/csam.h>
60	#include <VBox/patm.h>
61	#include "TRPMInternal.h"
62	#include <VBox/vm.h>
63	#include <VBox/em.h>
64	#include <VBox/rem.h>
65	#include <VBox/hwaccm.h>
66
67	#include <VBox/err.h>
68	#include <VBox/param.h>
69	#include <VBox/log.h>
70	#include <iprt/assert.h>
71	#include <iprt/asm.h>
72	#include <iprt/string.h>
73	#include <iprt/alloc.h>
74
75
76	/*******************************************************************************
77	* Structures and Typedefs *
78	*******************************************************************************/
79	/**
80	* Trap handler function.
81	* @todo need to specialize this as we go along.
82	*/
83	typedef enum TRPMHANDLER
84	{
85	/** Generic Interrupt handler. */
86	TRPM_HANDLER_INT = 0,
87	/** Generic Trap handler. */
88	TRPM_HANDLER_TRAP,
89	/** Trap 8 (\#DF) handler. */
90	TRPM_HANDLER_TRAP_08,
91	/** Trap 12 (\#MC) handler. */
92	TRPM_HANDLER_TRAP_12,
93	/** Max. */
94	TRPM_HANDLER_MAX
95	} TRPMHANDLER, *PTRPMHANDLER;
96
97
98	/*******************************************************************************
99	* Global Variables *
100	*******************************************************************************/
101	/** Preinitialized IDT.
102	* The u16OffsetLow is a value of the TRPMHANDLER enum which TRPMR3Relocate()
103	* will use to pick the right address. The u16SegSel is always VMM CS.
104	*/
105	static VBOXIDTE_GENERIC g_aIdt[256] =
106	{
107	/* special trap handler - still, this is an interrupt gate not a trap gate... */
108	#define IDTE_TRAP(enm) { (unsigned)enm, 0, 0, VBOX_IDTE_TYPE1, VBOX_IDTE_TYPE2_INT_32, 0, 1, 0 }
109	/* generic trap handler. */
110	#define IDTE_TRAP_GEN() IDTE_TRAP(TRPM_HANDLER_TRAP)
111	/* special interrupt handler. */
112	#define IDTE_INT(enm) { (unsigned)enm, 0, 0, VBOX_IDTE_TYPE1, VBOX_IDTE_TYPE2_INT_32, 0, 1, 0 }
113	/* generic interrupt handler. */
114	#define IDTE_INT_GEN() IDTE_INT(TRPM_HANDLER_INT)
115	/* special task gate IDT entry (for critical exceptions like #DF). */
116	#define IDTE_TASK(enm) { (unsigned)enm, 0, 0, VBOX_IDTE_TYPE1, VBOX_IDTE_TYPE2_TASK, 0, 1, 0 }
117	/* draft, fixme later when the handler is written. */
118	#define IDTE_RESERVED() { 0, 0, 0, 0, 0, 0, 0, 0 }
119
120	/* N - M M - T - C - D i */
121	/* o - n o - y - o - e p */
122	/* - e n - p - d - s t */
123	/* - i - e - e - c . */
124	/* - c - - - r */
125	/* ============================================================= */
126	IDTE_TRAP_GEN(), /* 0 - #DE - F - N - Divide error */
127	IDTE_TRAP_GEN(), /* 1 - #DB - F/T - N - Single step, INT 1 instruction */
128	#ifdef VBOX_WITH_NMI
129	IDTE_TRAP_GEN(), /* 2 - - I - N - Non-Maskable Interrupt (NMI) */
130	#else
131	IDTE_INT_GEN(), /* 2 - - I - N - Non-Maskable Interrupt (NMI) */
132	#endif
133	IDTE_TRAP_GEN(), /* 3 - #BP - T - N - Breakpoint, INT 3 instruction. */
134	IDTE_TRAP_GEN(), /* 4 - #OF - T - N - Overflow, INTO instruction. */
135	IDTE_TRAP_GEN(), /* 5 - #BR - F - N - BOUND Range Exceeded, BOUND instruction. */
136	IDTE_TRAP_GEN(), /* 6 - #UD - F - N - Undefined(/Invalid) Opcode. */
137	IDTE_TRAP_GEN(), /* 7 - #NM - F - N - Device not available, FP or (F)WAIT instruction. */
138	IDTE_TASK(TRPM_HANDLER_TRAP_08), /* 8 - #DF - A - 0 - Double fault. */
139	IDTE_TRAP_GEN(), /* 9 - - F - N - Coprocessor Segment Overrun (obsolete). */
140	IDTE_TRAP_GEN(), /* a - #TS - F - Y - Invalid TSS, Taskswitch or TSS access. */
141	IDTE_TRAP_GEN(), /* b - #NP - F - Y - Segment not present. */
142	IDTE_TRAP_GEN(), /* c - #SS - F - Y - Stack-Segment fault. */
143	IDTE_TRAP_GEN(), /* d - #GP - F - Y - General protection fault. */
144	IDTE_TRAP_GEN(), /* e - #PF - F - Y - Page fault. - interrupt gate!!! */
145	IDTE_RESERVED(), /* f - - - - Intel Reserved. Do not use. */
146	IDTE_TRAP_GEN(), /* 10 - #MF - F - N - x86 FPU Floating-Point Error (Math fault), FP or (F)WAIT instruction. */
147	IDTE_TRAP_GEN(), /* 11 - #AC - F - 0 - Alignment Check. */
148	IDTE_TRAP(TRPM_HANDLER_TRAP_12), /* 12 - #MC - A - N - Machine Check. */
149	IDTE_TRAP_GEN(), /* 13 - #XF - F - N - SIMD Floating-Point Exception. */
150	IDTE_RESERVED(), /* 14 - - - - Intel Reserved. Do not use. */
151	IDTE_RESERVED(), /* 15 - - - - Intel Reserved. Do not use. */
152	IDTE_RESERVED(), /* 16 - - - - Intel Reserved. Do not use. */
153	IDTE_RESERVED(), /* 17 - - - - Intel Reserved. Do not use. */
154	IDTE_RESERVED(), /* 18 - - - - Intel Reserved. Do not use. */
155	IDTE_RESERVED(), /* 19 - - - - Intel Reserved. Do not use. */
156	IDTE_RESERVED(), /* 1a - - - - Intel Reserved. Do not use. */
157	IDTE_RESERVED(), /* 1b - - - - Intel Reserved. Do not use. */
158	IDTE_RESERVED(), /* 1c - - - - Intel Reserved. Do not use. */
159	IDTE_RESERVED(), /* 1d - - - - Intel Reserved. Do not use. */
160	IDTE_RESERVED(), /* 1e - - - - Intel Reserved. Do not use. */
161	IDTE_RESERVED(), /* 1f - - - - Intel Reserved. Do not use. */
162	IDTE_INT_GEN(), /* 20 - - I - - User defined Interrupts, external of INT n. */
163	IDTE_INT_GEN(), /* 21 - - I - - User defined Interrupts, external of INT n. */
164	IDTE_INT_GEN(), /* 22 - - I - - User defined Interrupts, external of INT n. */
165	IDTE_INT_GEN(), /* 23 - - I - - User defined Interrupts, external of INT n. */
166	IDTE_INT_GEN(), /* 24 - - I - - User defined Interrupts, external of INT n. */
167	IDTE_INT_GEN(), /* 25 - - I - - User defined Interrupts, external of INT n. */
168	IDTE_INT_GEN(), /* 26 - - I - - User defined Interrupts, external of INT n. */
169	IDTE_INT_GEN(), /* 27 - - I - - User defined Interrupts, external of INT n. */
170	IDTE_INT_GEN(), /* 28 - - I - - User defined Interrupts, external of INT n. */
171	IDTE_INT_GEN(), /* 29 - - I - - User defined Interrupts, external of INT n. */
172	IDTE_INT_GEN(), /* 2a - - I - - User defined Interrupts, external of INT n. */
173	IDTE_INT_GEN(), /* 2b - - I - - User defined Interrupts, external of INT n. */
174	IDTE_INT_GEN(), /* 2c - - I - - User defined Interrupts, external of INT n. */
175	IDTE_INT_GEN(), /* 2d - - I - - User defined Interrupts, external of INT n. */
176	IDTE_INT_GEN(), /* 2e - - I - - User defined Interrupts, external of INT n. */
177	IDTE_INT_GEN(), /* 2f - - I - - User defined Interrupts, external of INT n. */
178	IDTE_INT_GEN(), /* 30 - - I - - User defined Interrupts, external of INT n. */
179	IDTE_INT_GEN(), /* 31 - - I - - User defined Interrupts, external of INT n. */
180	IDTE_INT_GEN(), /* 32 - - I - - User defined Interrupts, external of INT n. */
181	IDTE_INT_GEN(), /* 33 - - I - - User defined Interrupts, external of INT n. */
182	IDTE_INT_GEN(), /* 34 - - I - - User defined Interrupts, external of INT n. */
183	IDTE_INT_GEN(), /* 35 - - I - - User defined Interrupts, external of INT n. */
184	IDTE_INT_GEN(), /* 36 - - I - - User defined Interrupts, external of INT n. */
185	IDTE_INT_GEN(), /* 37 - - I - - User defined Interrupts, external of INT n. */
186	IDTE_INT_GEN(), /* 38 - - I - - User defined Interrupts, external of INT n. */
187	IDTE_INT_GEN(), /* 39 - - I - - User defined Interrupts, external of INT n. */
188	IDTE_INT_GEN(), /* 3a - - I - - User defined Interrupts, external of INT n. */
189	IDTE_INT_GEN(), /* 3b - - I - - User defined Interrupts, external of INT n. */
190	IDTE_INT_GEN(), /* 3c - - I - - User defined Interrupts, external of INT n. */
191	IDTE_INT_GEN(), /* 3d - - I - - User defined Interrupts, external of INT n. */
192	IDTE_INT_GEN(), /* 3e - - I - - User defined Interrupts, external of INT n. */
193	IDTE_INT_GEN(), /* 3f - - I - - User defined Interrupts, external of INT n. */
194	IDTE_INT_GEN(), /* 40 - - I - - User defined Interrupts, external of INT n. */
195	IDTE_INT_GEN(), /* 41 - - I - - User defined Interrupts, external of INT n. */
196	IDTE_INT_GEN(), /* 42 - - I - - User defined Interrupts, external of INT n. */
197	IDTE_INT_GEN(), /* 43 - - I - - User defined Interrupts, external of INT n. */
198	IDTE_INT_GEN(), /* 44 - - I - - User defined Interrupts, external of INT n. */
199	IDTE_INT_GEN(), /* 45 - - I - - User defined Interrupts, external of INT n. */
200	IDTE_INT_GEN(), /* 46 - - I - - User defined Interrupts, external of INT n. */
201	IDTE_INT_GEN(), /* 47 - - I - - User defined Interrupts, external of INT n. */
202	IDTE_INT_GEN(), /* 48 - - I - - User defined Interrupts, external of INT n. */
203	IDTE_INT_GEN(), /* 49 - - I - - User defined Interrupts, external of INT n. */
204	IDTE_INT_GEN(), /* 4a - - I - - User defined Interrupts, external of INT n. */
205	IDTE_INT_GEN(), /* 4b - - I - - User defined Interrupts, external of INT n. */
206	IDTE_INT_GEN(), /* 4c - - I - - User defined Interrupts, external of INT n. */
207	IDTE_INT_GEN(), /* 4d - - I - - User defined Interrupts, external of INT n. */
208	IDTE_INT_GEN(), /* 4e - - I - - User defined Interrupts, external of INT n. */
209	IDTE_INT_GEN(), /* 4f - - I - - User defined Interrupts, external of INT n. */
210	IDTE_INT_GEN(), /* 50 - - I - - User defined Interrupts, external of INT n. */
211	IDTE_INT_GEN(), /* 51 - - I - - User defined Interrupts, external of INT n. */
212	IDTE_INT_GEN(), /* 52 - - I - - User defined Interrupts, external of INT n. */
213	IDTE_INT_GEN(), /* 53 - - I - - User defined Interrupts, external of INT n. */
214	IDTE_INT_GEN(), /* 54 - - I - - User defined Interrupts, external of INT n. */
215	IDTE_INT_GEN(), /* 55 - - I - - User defined Interrupts, external of INT n. */
216	IDTE_INT_GEN(), /* 56 - - I - - User defined Interrupts, external of INT n. */
217	IDTE_INT_GEN(), /* 57 - - I - - User defined Interrupts, external of INT n. */
218	IDTE_INT_GEN(), /* 58 - - I - - User defined Interrupts, external of INT n. */
219	IDTE_INT_GEN(), /* 59 - - I - - User defined Interrupts, external of INT n. */
220	IDTE_INT_GEN(), /* 5a - - I - - User defined Interrupts, external of INT n. */
221	IDTE_INT_GEN(), /* 5b - - I - - User defined Interrupts, external of INT n. */
222	IDTE_INT_GEN(), /* 5c - - I - - User defined Interrupts, external of INT n. */
223	IDTE_INT_GEN(), /* 5d - - I - - User defined Interrupts, external of INT n. */
224	IDTE_INT_GEN(), /* 5e - - I - - User defined Interrupts, external of INT n. */
225	IDTE_INT_GEN(), /* 5f - - I - - User defined Interrupts, external of INT n. */
226	IDTE_INT_GEN(), /* 60 - - I - - User defined Interrupts, external of INT n. */
227	IDTE_INT_GEN(), /* 61 - - I - - User defined Interrupts, external of INT n. */
228	IDTE_INT_GEN(), /* 62 - - I - - User defined Interrupts, external of INT n. */
229	IDTE_INT_GEN(), /* 63 - - I - - User defined Interrupts, external of INT n. */
230	IDTE_INT_GEN(), /* 64 - - I - - User defined Interrupts, external of INT n. */
231	IDTE_INT_GEN(), /* 65 - - I - - User defined Interrupts, external of INT n. */
232	IDTE_INT_GEN(), /* 66 - - I - - User defined Interrupts, external of INT n. */
233	IDTE_INT_GEN(), /* 67 - - I - - User defined Interrupts, external of INT n. */
234	IDTE_INT_GEN(), /* 68 - - I - - User defined Interrupts, external of INT n. */
235	IDTE_INT_GEN(), /* 69 - - I - - User defined Interrupts, external of INT n. */
236	IDTE_INT_GEN(), /* 6a - - I - - User defined Interrupts, external of INT n. */
237	IDTE_INT_GEN(), /* 6b - - I - - User defined Interrupts, external of INT n. */
238	IDTE_INT_GEN(), /* 6c - - I - - User defined Interrupts, external of INT n. */
239	IDTE_INT_GEN(), /* 6d - - I - - User defined Interrupts, external of INT n. */
240	IDTE_INT_GEN(), /* 6e - - I - - User defined Interrupts, external of INT n. */
241	IDTE_INT_GEN(), /* 6f - - I - - User defined Interrupts, external of INT n. */
242	IDTE_INT_GEN(), /* 70 - - I - - User defined Interrupts, external of INT n. */
243	IDTE_INT_GEN(), /* 71 - - I - - User defined Interrupts, external of INT n. */
244	IDTE_INT_GEN(), /* 72 - - I - - User defined Interrupts, external of INT n. */
245	IDTE_INT_GEN(), /* 73 - - I - - User defined Interrupts, external of INT n. */
246	IDTE_INT_GEN(), /* 74 - - I - - User defined Interrupts, external of INT n. */
247	IDTE_INT_GEN(), /* 75 - - I - - User defined Interrupts, external of INT n. */
248	IDTE_INT_GEN(), /* 76 - - I - - User defined Interrupts, external of INT n. */
249	IDTE_INT_GEN(), /* 77 - - I - - User defined Interrupts, external of INT n. */
250	IDTE_INT_GEN(), /* 78 - - I - - User defined Interrupts, external of INT n. */
251	IDTE_INT_GEN(), /* 79 - - I - - User defined Interrupts, external of INT n. */
252	IDTE_INT_GEN(), /* 7a - - I - - User defined Interrupts, external of INT n. */
253	IDTE_INT_GEN(), /* 7b - - I - - User defined Interrupts, external of INT n. */
254	IDTE_INT_GEN(), /* 7c - - I - - User defined Interrupts, external of INT n. */
255	IDTE_INT_GEN(), /* 7d - - I - - User defined Interrupts, external of INT n. */
256	IDTE_INT_GEN(), /* 7e - - I - - User defined Interrupts, external of INT n. */
257	IDTE_INT_GEN(), /* 7f - - I - - User defined Interrupts, external of INT n. */
258	IDTE_INT_GEN(), /* 80 - - I - - User defined Interrupts, external of INT n. */
259	IDTE_INT_GEN(), /* 81 - - I - - User defined Interrupts, external of INT n. */
260	IDTE_INT_GEN(), /* 82 - - I - - User defined Interrupts, external of INT n. */
261	IDTE_INT_GEN(), /* 83 - - I - - User defined Interrupts, external of INT n. */
262	IDTE_INT_GEN(), /* 84 - - I - - User defined Interrupts, external of INT n. */
263	IDTE_INT_GEN(), /* 85 - - I - - User defined Interrupts, external of INT n. */
264	IDTE_INT_GEN(), /* 86 - - I - - User defined Interrupts, external of INT n. */
265	IDTE_INT_GEN(), /* 87 - - I - - User defined Interrupts, external of INT n. */
266	IDTE_INT_GEN(), /* 88 - - I - - User defined Interrupts, external of INT n. */
267	IDTE_INT_GEN(), /* 89 - - I - - User defined Interrupts, external of INT n. */
268	IDTE_INT_GEN(), /* 8a - - I - - User defined Interrupts, external of INT n. */
269	IDTE_INT_GEN(), /* 8b - - I - - User defined Interrupts, external of INT n. */
270	IDTE_INT_GEN(), /* 8c - - I - - User defined Interrupts, external of INT n. */
271	IDTE_INT_GEN(), /* 8d - - I - - User defined Interrupts, external of INT n. */
272	IDTE_INT_GEN(), /* 8e - - I - - User defined Interrupts, external of INT n. */
273	IDTE_INT_GEN(), /* 8f - - I - - User defined Interrupts, external of INT n. */
274	IDTE_INT_GEN(), /* 90 - - I - - User defined Interrupts, external of INT n. */
275	IDTE_INT_GEN(), /* 91 - - I - - User defined Interrupts, external of INT n. */
276	IDTE_INT_GEN(), /* 92 - - I - - User defined Interrupts, external of INT n. */
277	IDTE_INT_GEN(), /* 93 - - I - - User defined Interrupts, external of INT n. */
278	IDTE_INT_GEN(), /* 94 - - I - - User defined Interrupts, external of INT n. */
279	IDTE_INT_GEN(), /* 95 - - I - - User defined Interrupts, external of INT n. */
280	IDTE_INT_GEN(), /* 96 - - I - - User defined Interrupts, external of INT n. */
281	IDTE_INT_GEN(), /* 97 - - I - - User defined Interrupts, external of INT n. */
282	IDTE_INT_GEN(), /* 98 - - I - - User defined Interrupts, external of INT n. */
283	IDTE_INT_GEN(), /* 99 - - I - - User defined Interrupts, external of INT n. */
284	IDTE_INT_GEN(), /* 9a - - I - - User defined Interrupts, external of INT n. */
285	IDTE_INT_GEN(), /* 9b - - I - - User defined Interrupts, external of INT n. */
286	IDTE_INT_GEN(), /* 9c - - I - - User defined Interrupts, external of INT n. */
287	IDTE_INT_GEN(), /* 9d - - I - - User defined Interrupts, external of INT n. */
288	IDTE_INT_GEN(), /* 9e - - I - - User defined Interrupts, external of INT n. */
289	IDTE_INT_GEN(), /* 9f - - I - - User defined Interrupts, external of INT n. */
290	IDTE_INT_GEN(), /* a0 - - I - - User defined Interrupts, external of INT n. */
291	IDTE_INT_GEN(), /* a1 - - I - - User defined Interrupts, external of INT n. */
292	IDTE_INT_GEN(), /* a2 - - I - - User defined Interrupts, external of INT n. */
293	IDTE_INT_GEN(), /* a3 - - I - - User defined Interrupts, external of INT n. */
294	IDTE_INT_GEN(), /* a4 - - I - - User defined Interrupts, external of INT n. */
295	IDTE_INT_GEN(), /* a5 - - I - - User defined Interrupts, external of INT n. */
296	IDTE_INT_GEN(), /* a6 - - I - - User defined Interrupts, external of INT n. */
297	IDTE_INT_GEN(), /* a7 - - I - - User defined Interrupts, external of INT n. */
298	IDTE_INT_GEN(), /* a8 - - I - - User defined Interrupts, external of INT n. */
299	IDTE_INT_GEN(), /* a9 - - I - - User defined Interrupts, external of INT n. */
300	IDTE_INT_GEN(), /* aa - - I - - User defined Interrupts, external of INT n. */
301	IDTE_INT_GEN(), /* ab - - I - - User defined Interrupts, external of INT n. */
302	IDTE_INT_GEN(), /* ac - - I - - User defined Interrupts, external of INT n. */
303	IDTE_INT_GEN(), /* ad - - I - - User defined Interrupts, external of INT n. */
304	IDTE_INT_GEN(), /* ae - - I - - User defined Interrupts, external of INT n. */
305	IDTE_INT_GEN(), /* af - - I - - User defined Interrupts, external of INT n. */
306	IDTE_INT_GEN(), /* b0 - - I - - User defined Interrupts, external of INT n. */
307	IDTE_INT_GEN(), /* b1 - - I - - User defined Interrupts, external of INT n. */
308	IDTE_INT_GEN(), /* b2 - - I - - User defined Interrupts, external of INT n. */
309	IDTE_INT_GEN(), /* b3 - - I - - User defined Interrupts, external of INT n. */
310	IDTE_INT_GEN(), /* b4 - - I - - User defined Interrupts, external of INT n. */
311	IDTE_INT_GEN(), /* b5 - - I - - User defined Interrupts, external of INT n. */
312	IDTE_INT_GEN(), /* b6 - - I - - User defined Interrupts, external of INT n. */
313	IDTE_INT_GEN(), /* b7 - - I - - User defined Interrupts, external of INT n. */
314	IDTE_INT_GEN(), /* b8 - - I - - User defined Interrupts, external of INT n. */
315	IDTE_INT_GEN(), /* b9 - - I - - User defined Interrupts, external of INT n. */
316	IDTE_INT_GEN(), /* ba - - I - - User defined Interrupts, external of INT n. */
317	IDTE_INT_GEN(), /* bb - - I - - User defined Interrupts, external of INT n. */
318	IDTE_INT_GEN(), /* bc - - I - - User defined Interrupts, external of INT n. */
319	IDTE_INT_GEN(), /* bd - - I - - User defined Interrupts, external of INT n. */
320	IDTE_INT_GEN(), /* be - - I - - User defined Interrupts, external of INT n. */
321	IDTE_INT_GEN(), /* bf - - I - - User defined Interrupts, external of INT n. */
322	IDTE_INT_GEN(), /* c0 - - I - - User defined Interrupts, external of INT n. */
323	IDTE_INT_GEN(), /* c1 - - I - - User defined Interrupts, external of INT n. */
324	IDTE_INT_GEN(), /* c2 - - I - - User defined Interrupts, external of INT n. */
325	IDTE_INT_GEN(), /* c3 - - I - - User defined Interrupts, external of INT n. */
326	IDTE_INT_GEN(), /* c4 - - I - - User defined Interrupts, external of INT n. */
327	IDTE_INT_GEN(), /* c5 - - I - - User defined Interrupts, external of INT n. */
328	IDTE_INT_GEN(), /* c6 - - I - - User defined Interrupts, external of INT n. */
329	IDTE_INT_GEN(), /* c7 - - I - - User defined Interrupts, external of INT n. */
330	IDTE_INT_GEN(), /* c8 - - I - - User defined Interrupts, external of INT n. */
331	IDTE_INT_GEN(), /* c9 - - I - - User defined Interrupts, external of INT n. */
332	IDTE_INT_GEN(), /* ca - - I - - User defined Interrupts, external of INT n. */
333	IDTE_INT_GEN(), /* cb - - I - - User defined Interrupts, external of INT n. */
334	IDTE_INT_GEN(), /* cc - - I - - User defined Interrupts, external of INT n. */
335	IDTE_INT_GEN(), /* cd - - I - - User defined Interrupts, external of INT n. */
336	IDTE_INT_GEN(), /* ce - - I - - User defined Interrupts, external of INT n. */
337	IDTE_INT_GEN(), /* cf - - I - - User defined Interrupts, external of INT n. */
338	IDTE_INT_GEN(), /* d0 - - I - - User defined Interrupts, external of INT n. */
339	IDTE_INT_GEN(), /* d1 - - I - - User defined Interrupts, external of INT n. */
340	IDTE_INT_GEN(), /* d2 - - I - - User defined Interrupts, external of INT n. */
341	IDTE_INT_GEN(), /* d3 - - I - - User defined Interrupts, external of INT n. */
342	IDTE_INT_GEN(), /* d4 - - I - - User defined Interrupts, external of INT n. */
343	IDTE_INT_GEN(), /* d5 - - I - - User defined Interrupts, external of INT n. */
344	IDTE_INT_GEN(), /* d6 - - I - - User defined Interrupts, external of INT n. */
345	IDTE_INT_GEN(), /* d7 - - I - - User defined Interrupts, external of INT n. */
346	IDTE_INT_GEN(), /* d8 - - I - - User defined Interrupts, external of INT n. */
347	IDTE_INT_GEN(), /* d9 - - I - - User defined Interrupts, external of INT n. */
348	IDTE_INT_GEN(), /* da - - I - - User defined Interrupts, external of INT n. */
349	IDTE_INT_GEN(), /* db - - I - - User defined Interrupts, external of INT n. */
350	IDTE_INT_GEN(), /* dc - - I - - User defined Interrupts, external of INT n. */
351	IDTE_INT_GEN(), /* dd - - I - - User defined Interrupts, external of INT n. */
352	IDTE_INT_GEN(), /* de - - I - - User defined Interrupts, external of INT n. */
353	IDTE_INT_GEN(), /* df - - I - - User defined Interrupts, external of INT n. */
354	IDTE_INT_GEN(), /* e0 - - I - - User defined Interrupts, external of INT n. */
355	IDTE_INT_GEN(), /* e1 - - I - - User defined Interrupts, external of INT n. */
356	IDTE_INT_GEN(), /* e2 - - I - - User defined Interrupts, external of INT n. */
357	IDTE_INT_GEN(), /* e3 - - I - - User defined Interrupts, external of INT n. */
358	IDTE_INT_GEN(), /* e4 - - I - - User defined Interrupts, external of INT n. */
359	IDTE_INT_GEN(), /* e5 - - I - - User defined Interrupts, external of INT n. */
360	IDTE_INT_GEN(), /* e6 - - I - - User defined Interrupts, external of INT n. */
361	IDTE_INT_GEN(), /* e7 - - I - - User defined Interrupts, external of INT n. */
362	IDTE_INT_GEN(), /* e8 - - I - - User defined Interrupts, external of INT n. */
363	IDTE_INT_GEN(), /* e9 - - I - - User defined Interrupts, external of INT n. */
364	IDTE_INT_GEN(), /* ea - - I - - User defined Interrupts, external of INT n. */
365	IDTE_INT_GEN(), /* eb - - I - - User defined Interrupts, external of INT n. */
366	IDTE_INT_GEN(), /* ec - - I - - User defined Interrupts, external of INT n. */
367	IDTE_INT_GEN(), /* ed - - I - - User defined Interrupts, external of INT n. */
368	IDTE_INT_GEN(), /* ee - - I - - User defined Interrupts, external of INT n. */
369	IDTE_INT_GEN(), /* ef - - I - - User defined Interrupts, external of INT n. */
370	IDTE_INT_GEN(), /* f0 - - I - - User defined Interrupts, external of INT n. */
371	IDTE_INT_GEN(), /* f1 - - I - - User defined Interrupts, external of INT n. */
372	IDTE_INT_GEN(), /* f2 - - I - - User defined Interrupts, external of INT n. */
373	IDTE_INT_GEN(), /* f3 - - I - - User defined Interrupts, external of INT n. */
374	IDTE_INT_GEN(), /* f4 - - I - - User defined Interrupts, external of INT n. */
375	IDTE_INT_GEN(), /* f5 - - I - - User defined Interrupts, external of INT n. */
376	IDTE_INT_GEN(), /* f6 - - I - - User defined Interrupts, external of INT n. */
377	IDTE_INT_GEN(), /* f7 - - I - - User defined Interrupts, external of INT n. */
378	IDTE_INT_GEN(), /* f8 - - I - - User defined Interrupts, external of INT n. */
379	IDTE_INT_GEN(), /* f9 - - I - - User defined Interrupts, external of INT n. */
380	IDTE_INT_GEN(), /* fa - - I - - User defined Interrupts, external of INT n. */
381	IDTE_INT_GEN(), /* fb - - I - - User defined Interrupts, external of INT n. */
382	IDTE_INT_GEN(), /* fc - - I - - User defined Interrupts, external of INT n. */
383	IDTE_INT_GEN(), /* fd - - I - - User defined Interrupts, external of INT n. */
384	IDTE_INT_GEN(), /* fe - - I - - User defined Interrupts, external of INT n. */
385	IDTE_INT_GEN(), /* ff - - I - - User defined Interrupts, external of INT n. */
386	#undef IDTE_TRAP
387	#undef IDTE_TRAP_GEN
388	#undef IDTE_INT
389	#undef IDTE_INT_GEN
390	#undef IDTE_TASK
391	#undef IDTE_UNUSED
392	#undef IDTE_RESERVED
393	};
394
395
396	/**
397	* Enable or disable tracking of Guest's IDT.
398	* @{
399	*/
400	#define TRPM_TRACK_GUEST_IDT_CHANGES
401	/** @} */
402
403	/**
404	* Enable or disable tracking of Shadow IDT.
405	* @{
406	*/
407	#define TRPM_TRACK_SHADOW_IDT_CHANGES
408	/** @} */
409
410	/** TRPM saved state version. */
411	#define TRPM_SAVED_STATE_VERSION 8
412
413
414	/*******************************************************************************
415	* Internal Functions *
416	*******************************************************************************/
417	static DECLCALLBACK(int) trpmR3Save(PVM pVM, PSSMHANDLE pSSM);
418	static DECLCALLBACK(int) trpmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t u32Version);
419	static DECLCALLBACK(int) trpmGuestIDTWriteHandler(PVM pVM, RTGCPTR GCPtr, void pvPtr, void pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser);
420
421
422	/**
423	* Initializes the Trap Manager
424	*
425	* @returns VBox status code.
426	* @param pVM The VM to operate on.
427	*/
428	TRPMR3DECL(int) TRPMR3Init(PVM pVM)
429	{
430	LogFlow(("TRPMR3Init\n"));
431	/*
432	* Assert sizes and alignments.
433	*/
434	AssertRelease(!(RT_OFFSETOF(VM, trpm.s) & 31));
435	AssertRelease(!(RT_OFFSETOF(VM, trpm.s.aIdt) & 15));
436	AssertRelease(sizeof(pVM->trpm.s) <= sizeof(pVM->trpm.padding));
437	AssertRelease(ELEMENTS(pVM->trpm.s.aGuestTrapHandler) == sizeof(pVM->trpm.s.au32IdtPatched)*8);
438
439	/*
440	* Initialize members.
441	*/
442	pVM->trpm.s.offVM = RT_OFFSETOF(VM, trpm);
443	pVM->trpm.s.uActiveVector = ~0;
444	pVM->trpm.s.GuestIdtr.pIdt = ~0;
445	pVM->trpm.s.GCPtrIdt = ~0;
446	pVM->trpm.s.fDisableMonitoring = false;
447
448	/*
449	* Initialize the IDT.
450	* The handler addresses will be set in the TRPMR3Relocate() function.
451	*/
452	Assert(sizeof(pVM->trpm.s.aIdt) == sizeof(g_aIdt));
453	memcpy(&pVM->trpm.s.aIdt[0], &g_aIdt[0], sizeof(pVM->trpm.s.aIdt));
454
455	/*
456	* Register the saved state data unit.
457	*/
458	int rc = SSMR3RegisterInternal(pVM, "trpm", 1, TRPM_SAVED_STATE_VERSION, sizeof(TRPM),
459	NULL, trpmR3Save, NULL,
460	NULL, trpmR3Load, NULL);
461	if (VBOX_FAILURE(rc))
462	return rc;
463
464	/*
465	* Statistics.
466	*/
467	STAM_REG(pVM, &pVM->trpm.s.StatGCWriteGuestIDTFault, STAMTYPE_COUNTER, "/TRPM/GC/Write/IDT/Fault", STAMUNIT_OCCURENCES, "The number of writes to the Guest IDT.");
468	STAM_REG(pVM, &pVM->trpm.s.StatGCWriteGuestIDTHandled, STAMTYPE_COUNTER, "/TRPM/GC/Write/IDT/Handled", STAMUNIT_OCCURENCES, "The number of writes to the Guest IDT.");
469
470	STAM_REG(pVM, &pVM->trpm.s.StatSyncIDT, STAMTYPE_PROFILE, "/PROF/TRPM/SyncIDT", STAMUNIT_TICKS_PER_CALL, "Profiling of TRPMR3SyncIDT().");
471
472	/* traps */
473	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x00], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/00", STAMUNIT_TICKS_PER_CALL, "#DE - Divide error.");
474	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x01], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/01", STAMUNIT_TICKS_PER_CALL, "#DB - Debug (single step and more).");
475	//STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x02], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/02", STAMUNIT_TICKS_PER_CALL, "NMI");
476	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x03], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/03", STAMUNIT_TICKS_PER_CALL, "#BP - Breakpoint.");
477	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x04], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/04", STAMUNIT_TICKS_PER_CALL, "#OF - Overflow.");
478	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x05], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/05", STAMUNIT_TICKS_PER_CALL, "#BR - Bound range exceeded.");
479	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x06], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/06", STAMUNIT_TICKS_PER_CALL, "#UD - Undefined opcode.");
480	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x07], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/07", STAMUNIT_TICKS_PER_CALL, "#NM - Device not available (FPU).");
481	//STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x08], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/08", STAMUNIT_TICKS_PER_CALL, "#DF - Double fault.");
482	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x09], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/09", STAMUNIT_TICKS_PER_CALL, "#?? - Coprocessor segment overrun (obsolete).");
483	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x0a], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/0a", STAMUNIT_TICKS_PER_CALL, "#TS - Task switch fault.");
484	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x0b], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/0b", STAMUNIT_TICKS_PER_CALL, "#NP - Segemnt not present.");
485	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x0c], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/0c", STAMUNIT_TICKS_PER_CALL, "#SS - Stack segment fault.");
486	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x0d], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/0d", STAMUNIT_TICKS_PER_CALL, "#GP - General protection fault.");
487	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x0e], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/0e", STAMUNIT_TICKS_PER_CALL, "#PF - Page fault.");
488	//STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x0f], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/0f", STAMUNIT_TICKS_PER_CALL, "Reserved.");
489	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x10], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/10", STAMUNIT_TICKS_PER_CALL, "#MF - Math fault..");
490	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x11], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/11", STAMUNIT_TICKS_PER_CALL, "#AC - Alignment check.");
491	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x12], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/12", STAMUNIT_TICKS_PER_CALL, "#MC - Machine check.");
492	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x13], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/13", STAMUNIT_TICKS_PER_CALL, "#XF - SIMD Floating-Point Exception.");
493
494	#ifdef VBOX_WITH_STATISTICS
495	rc = MMHyperAlloc(pVM, sizeof(STAMCOUNTER) * 255, 8, MM_TAG_STAM, (void **)&pVM->trpm.s.paStatForwardedIRQR3);
496	AssertRCReturn(rc, rc);
497	pVM->trpm.s.paStatForwardedIRQGC = MMHyperR3ToGC(pVM, pVM->trpm.s.paStatForwardedIRQR3);
498	pVM->trpm.s.paStatForwardedIRQR0 = MMHyperR3ToR0(pVM, pVM->trpm.s.paStatForwardedIRQR3);
499	for (unsigned i = 0; i < 255; i++)
500	STAMR3RegisterF(pVM, &pVM->trpm.s.paStatForwardedIRQR3[i], STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "Forwarded interrupts.",
501	i < 0x20 ? "/TRPM/ForwardRaw/TRAP/%02X" : "/TRPM/ForwardRaw/IRQ/%02X", i);
502	#endif
503	STAM_REG(pVM, &pVM->trpm.s.StatForwardFailNoHandler, STAMTYPE_COUNTER, "/TRPM/ForwardRaw/Fail/NoHandler", STAMUNIT_OCCURENCES, "Failure to forward interrupt in raw mode.");
504	STAM_REG(pVM, &pVM->trpm.s.StatForwardFailPatchAddr, STAMTYPE_COUNTER, "/TRPM/ForwardRaw/Fail/PatchAddr", STAMUNIT_OCCURENCES, "Failure to forward interrupt in raw mode.");
505
506	STAM_REG(pVM, &pVM->trpm.s.StatForwardFailGC, STAMTYPE_COUNTER, "/TRPM/ForwardRaw/Fail/GC", STAMUNIT_OCCURENCES, "Failure to forward interrupt in raw mode.");
507	STAM_REG(pVM, &pVM->trpm.s.StatForwardFailHC, STAMTYPE_COUNTER, "/TRPM/ForwardRaw/Fail/HC", STAMUNIT_OCCURENCES, "Failure to forward interrupt in raw mode.");
508	STAM_REG(pVM, &pVM->trpm.s.StatForwardProfGC, STAMTYPE_PROFILE_ADV, "/TRPM/ForwardRaw/Prof/GC", STAMUNIT_TICKS_PER_CALL, "Profiling TRPMForwardTrap.");
509	STAM_REG(pVM, &pVM->trpm.s.StatForwardProfHC, STAMTYPE_PROFILE_ADV, "/TRPM/ForwardRaw/Prof/HC", STAMUNIT_TICKS_PER_CALL, "Profiling TRPMForwardTrap.");
510
511	STAM_REG(pVM, &pVM->trpm.s.StatTrap0dDisasm, STAMTYPE_PROFILE_ADV, "/TRPM/Trap0d/Prof/Disasm", STAMUNIT_TICKS_PER_CALL, "Profiling trpmGCTrap0dHandler.");
512
513	/*
514	* Default action when entering raw mode for the first time
515	*/
516	VM_FF_SET(pVM, VM_FF_TRPM_SYNC_IDT);
517	return 0;
518	}
519
520
521	/**
522	* Applies relocations to data and code managed by this component.
523	*
524	* This function will be called at init and whenever the VMM need
525	* to relocate itself inside the GC.
526	*
527	* @param pVM The VM handle.
528	* @param offDelta Relocation delta relative to old location.
529	*/
530	TRPMR3DECL(void) TRPMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
531	{
532	LogFlow(("TRPMR3Relocate\n"));
533	/*
534	* Get the trap handler addresses.
535	*
536	* If VMMGC.gc is screwed, so are we. We'll assert here since it elsewise
537	* would make init order impossible if we should assert the presence of these
538	* exports in TRPMR3Init().
539	*/
540	RTGCPTR aGCPtrs[TRPM_HANDLER_MAX] = {0};
541	int rc;
542	rc = PDMR3GetSymbolGC(pVM, VMMGC_MAIN_MODULE_NAME, "TRPMGCHandlerInterupt", &aGCPtrs[TRPM_HANDLER_INT]);
543	AssertReleaseMsgRC(rc, ("Couldn't find TRPMGCHandlerInterupt in VMMGC.gc!\n"));
544
545	rc = PDMR3GetSymbolGC(pVM, VMMGC_MAIN_MODULE_NAME, "TRPMGCHandlerGeneric", &aGCPtrs[TRPM_HANDLER_TRAP]);
546	AssertReleaseMsgRC(rc, ("Couldn't find TRPMGCHandlerGeneric in VMMGC.gc!\n"));
547
548	rc = PDMR3GetSymbolGC(pVM, VMMGC_MAIN_MODULE_NAME, "TRPMGCHandlerTrap08", &aGCPtrs[TRPM_HANDLER_TRAP_08]);
549	AssertReleaseMsgRC(rc, ("Couldn't find TRPMGCHandlerTrap08 in VMMGC.gc!\n"));
550
551	rc = PDMR3GetSymbolGC(pVM, VMMGC_MAIN_MODULE_NAME, "TRPMGCHandlerTrap12", &aGCPtrs[TRPM_HANDLER_TRAP_12]);
552	AssertReleaseMsgRC(rc, ("Couldn't find TRPMGCHandlerTrap12 in VMMGC.gc!\n"));
553
554	RTSEL SelCS = CPUMGetHyperCS(pVM);
555
556	/*
557	* Iterate the idt and set the addresses.
558	*/
559	PVBOXIDTE pIdte = &pVM->trpm.s.aIdt[0];
560	PVBOXIDTE_GENERIC pIdteTemplate = &g_aIdt[0];
561	for (unsigned i = 0; i < ELEMENTS(pVM->trpm.s.aIdt); i++, pIdte++, pIdteTemplate++)
562	{
563	if ( pIdte->Gen.u1Present
564	&& !ASMBitTest(&pVM->trpm.s.au32IdtPatched[0], i)
565	)
566	{
567	Assert(pIdteTemplate->u16OffsetLow < TRPM_HANDLER_MAX);
568	RTGCPTR Offset = aGCPtrs[pIdteTemplate->u16OffsetLow];
569	switch (pIdteTemplate->u16OffsetLow)
570	{
571	/*
572	* Generic handlers have different entrypoints for each possible
573	* vector number. These entrypoints makes a sort of an array with
574	* 8 byte entries where the vector number is the index.
575	* See TRPMGCHandlersA.asm for details.
576	*/
577	case TRPM_HANDLER_INT:
578	case TRPM_HANDLER_TRAP:
579	Offset += i * 8;
580	break;
581	case TRPM_HANDLER_TRAP_12:
582	break;
583	case TRPM_HANDLER_TRAP_08:
584	/* Handle #DF Task Gate in special way. */
585	pIdte->Gen.u16SegSel = SELMGetTrap8Selector(pVM);
586	pIdte->Gen.u16OffsetLow = 0;
587	pIdte->Gen.u16OffsetHigh = 0;
588	SELMSetTrap8EIP(pVM, Offset);
589	continue;
590	}
591	/* (non-task gates only ) */
592	pIdte->Gen.u16OffsetLow = Offset & 0xffff;
593	pIdte->Gen.u16OffsetHigh = Offset >> 16;
594	pIdte->Gen.u16SegSel = SelCS;
595	}
596	}
597
598	/*
599	* Update IDTR (limit is including!).
600	*/
601	CPUMSetHyperIDTR(pVM, VM_GUEST_ADDR(pVM, &pVM->trpm.s.aIdt[0]), sizeof(pVM->trpm.s.aIdt)-1);
602
603	if (!pVM->trpm.s.fDisableMonitoring)
604	{
605	#ifdef TRPM_TRACK_SHADOW_IDT_CHANGES
606	if (pVM->trpm.s.GCPtrIdt != ~0U)
607	{
608	rc = PGMHandlerVirtualDeregister(pVM, pVM->trpm.s.GCPtrIdt);
609	AssertRC(rc);
610	}
611	pVM->trpm.s.GCPtrIdt = VM_GUEST_ADDR(pVM, &pVM->trpm.s.aIdt[0]);
612	rc = PGMR3HandlerVirtualRegister(pVM, PGMVIRTHANDLERTYPE_HYPERVISOR, pVM->trpm.s.GCPtrIdt, pVM->trpm.s.GCPtrIdt + sizeof(pVM->trpm.s.aIdt) - 1,
613	0, 0, "trpmgcShadowIDTWriteHandler", 0, "Shadow IDT write access handler");
614	AssertRC(rc);
615	#endif
616	}
617
618	/* Relocate IDT handlers for forwarding guest traps/interrupts. */
619	for (uint32_t iTrap = 0; iTrap < ELEMENTS(pVM->trpm.s.aGuestTrapHandler); iTrap++)
620	{
621	if (pVM->trpm.s.aGuestTrapHandler[iTrap] != TRPM_INVALID_HANDLER)
622	{
623	Log(("TRPMR3Relocate: iGate=%2X Handler %VGv -> %VGv\n", iTrap, pVM->trpm.s.aGuestTrapHandler[iTrap], pVM->trpm.s.aGuestTrapHandler[iTrap] + offDelta));
624	pVM->trpm.s.aGuestTrapHandler[iTrap] += offDelta;
625	}
626
627	if (ASMBitTest(&pVM->trpm.s.au32IdtPatched[0], iTrap))
628	{
629	PVBOXIDTE pIdte = &pVM->trpm.s.aIdt[iTrap];
630	RTGCPTR pHandler = (pIdte->Gen.u16OffsetHigh << 16) \| pIdte->Gen.u16OffsetLow;
631
632	Log(("TRPMR3Relocate: *iGate=%2X Handler %VGv -> %VGv\n", iTrap, pHandler, pHandler + offDelta));
633	pHandler += offDelta;
634
635	pIdte->Gen.u16OffsetHigh = pHandler >> 16;
636	pIdte->Gen.u16OffsetLow = pHandler & 0xFFFF;
637
638	}
639	}
640
641	pVM->trpm.s.paStatForwardedIRQGC += offDelta;
642	pVM->trpm.s.paStatForwardedIRQR0 = MMHyperR3ToR0(pVM, pVM->trpm.s.paStatForwardedIRQR3);
643	}
644
645
646	/**
647	* Terminates the Trap Manager
648	*
649	* @returns VBox status code.
650	* @param pVM The VM to operate on.
651	*/
652	TRPMR3DECL(int) TRPMR3Term(PVM pVM)
653	{
654	NOREF(pVM);
655	return 0;
656	}
657
658
659	/**
660	* The VM is being reset.
661	*
662	* For the TRPM component this means that any IDT write monitors
663	* needs to be removed, any pending trap cleared, and the IDT reset.
664	*
665	* @param pVM VM handle.
666	*/
667	TRPMR3DECL(void) TRPMR3Reset(PVM pVM)
668	{
669	/*
670	* Deregister any virtual handlers.
671	*/
672	#ifdef TRPM_TRACK_GUEST_IDT_CHANGES
673	if (pVM->trpm.s.GuestIdtr.pIdt != ~0U)
674	{
675	int rc = PGMHandlerVirtualDeregister(pVM, pVM->trpm.s.GuestIdtr.pIdt);
676	AssertRC(rc);
677	pVM->trpm.s.GuestIdtr.pIdt = ~0U;
678	}
679	pVM->trpm.s.GuestIdtr.cbIdt = 0;
680	#endif
681
682	/*
683	* Reinitialize other members calling the relocator to get things right.
684	*/
685	pVM->trpm.s.uActiveVector = ~0;
686	memcpy(&pVM->trpm.s.aIdt[0], &g_aIdt[0], sizeof(pVM->trpm.s.aIdt));
687	memset(pVM->trpm.s.aGuestTrapHandler, 0, sizeof(pVM->trpm.s.aGuestTrapHandler));
688	TRPMR3Relocate(pVM, 0);
689
690	/*
691	* Default action when entering raw mode for the first time
692	*/
693	VM_FF_SET(pVM, VM_FF_TRPM_SYNC_IDT);
694	}
695
696
697	/**
698	* Execute state save operation.
699	*
700	* @returns VBox status code.
701	* @param pVM VM Handle.
702	* @param pSSM SSM operation handle.
703	*/
704	static DECLCALLBACK(int) trpmR3Save(PVM pVM, PSSMHANDLE pSSM)
705	{
706	LogFlow(("trpmR3Save:\n"));
707
708	/*
709	* Active and saved traps.
710	*/
711	PTRPM pTrpm = &pVM->trpm.s;
712	SSMR3PutUInt(pSSM, pTrpm->uActiveVector);
713	SSMR3PutUInt(pSSM, pTrpm->enmActiveType);
714	SSMR3PutGCUInt(pSSM, pTrpm->uActiveErrorCode);
715	SSMR3PutGCUIntPtr(pSSM, pTrpm->uActiveCR2);
716	SSMR3PutGCUInt(pSSM, pTrpm->uSavedVector);
717	SSMR3PutUInt(pSSM, pTrpm->enmSavedType);
718	SSMR3PutGCUInt(pSSM, pTrpm->uSavedErrorCode);
719	SSMR3PutGCUIntPtr(pSSM, pTrpm->uSavedCR2);
720	SSMR3PutGCUInt(pSSM, pTrpm->uPrevVector);
721	SSMR3PutGCUInt(pSSM, pTrpm->fDisableMonitoring);
722	SSMR3PutUInt(pSSM, VM_FF_ISSET(pVM, VM_FF_TRPM_SYNC_IDT));
723	SSMR3PutMem(pSSM, &pTrpm->au32IdtPatched[0], sizeof(pTrpm->au32IdtPatched));
724	SSMR3PutU32(pSSM, ~0); /* separator. */
725
726	/*
727	* Save any trampoline gates.
728	*/
729	for (uint32_t iTrap = 0; iTrap < ELEMENTS(pTrpm->aGuestTrapHandler); iTrap++)
730	{
731	if (pTrpm->aGuestTrapHandler[iTrap])
732	{
733	SSMR3PutU32(pSSM, iTrap);
734	SSMR3PutGCPtr(pSSM, pTrpm->aGuestTrapHandler[iTrap]);
735	SSMR3PutMem(pSSM, &pTrpm->aIdt[iTrap], sizeof(pTrpm->aIdt[iTrap]));
736	}
737	}
738
739	return SSMR3PutU32(pSSM, ~0); /* terminator */
740	}
741
742
743	/**
744	* Execute state load operation.
745	*
746	* @returns VBox status code.
747	* @param pVM VM Handle.
748	* @param pSSM SSM operation handle.
749	* @param u32Version Data layout version.
750	*/
751	static DECLCALLBACK(int) trpmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t u32Version)
752	{
753	LogFlow(("trpmR3Load:\n"));
754
755	/*
756	* Validate version.
757	*/
758	if (u32Version != TRPM_SAVED_STATE_VERSION)
759	{
760	Log(("trpmR3Load: Invalid version u32Version=%d!\n", u32Version));
761	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
762	}
763
764	/*
765	* Call the reset function to kick out any handled gates and other potential trouble.
766	*/
767	TRPMR3Reset(pVM);
768
769	/*
770	* Active and saved traps.
771	*/
772	PTRPM pTrpm = &pVM->trpm.s;
773	SSMR3GetUInt(pSSM, &pTrpm->uActiveVector);
774	SSMR3GetUInt(pSSM, (uint32_t *)&pTrpm->enmActiveType);
775	SSMR3GetGCUInt(pSSM, &pTrpm->uActiveErrorCode);
776	SSMR3GetGCUIntPtr(pSSM, &pTrpm->uActiveCR2);
777	SSMR3GetGCUInt(pSSM, &pTrpm->uSavedVector);
778	SSMR3GetUInt(pSSM, (uint32_t *)&pTrpm->enmSavedType);
779	SSMR3GetGCUInt(pSSM, &pTrpm->uSavedErrorCode);
780	SSMR3GetGCUIntPtr(pSSM, &pTrpm->uSavedCR2);
781	SSMR3GetGCUInt(pSSM, &pTrpm->uPrevVector);
782	SSMR3GetGCUInt(pSSM, &pTrpm->fDisableMonitoring);
783
784	RTUINT fSyncIDT;
785	int rc = SSMR3GetUInt(pSSM, &fSyncIDT);
786	if (VBOX_FAILURE(rc))
787	return rc;
788	if (fSyncIDT & ~1)
789	{
790	AssertMsgFailed(("fSyncIDT=%#x\n", fSyncIDT));
791	return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
792	}
793	if (fSyncIDT)
794	VM_FF_SET(pVM, VM_FF_TRPM_SYNC_IDT);
795	/* else: cleared by reset call above. */
796
797	SSMR3GetMem(pSSM, &pTrpm->au32IdtPatched[0], sizeof(pTrpm->au32IdtPatched));
798
799	/* check the separator */
800	uint32_t u32Sep;
801	rc = SSMR3GetU32(pSSM, &u32Sep);
802	if (VBOX_FAILURE(rc))
803	return rc;
804	if (u32Sep != (uint32_t)~0)
805	{
806	AssertMsgFailed(("u32Sep=%#x (first)\n", u32Sep));
807	return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
808	}
809
810	/*
811	* Restore any trampoline gates.
812	*/
813	for (;;)
814	{
815	/* gate number / terminator */
816	uint32_t iTrap;
817	rc = SSMR3GetU32(pSSM, &iTrap);
818	if (VBOX_FAILURE(rc))
819	return rc;
820	if (iTrap == (uint32_t)~0)
821	break;
822	if ( iTrap >= ELEMENTS(pTrpm->aIdt)
823	\|\| pTrpm->aGuestTrapHandler[iTrap])
824	{
825	AssertMsgFailed(("iTrap=%#x\n", iTrap));
826	return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
827	}
828
829	/* restore the IDT entry. */
830	RTGCPTR GCPtrHandler;
831	SSMR3GetGCPtr(pSSM, &GCPtrHandler);
832	VBOXIDTE Idte;
833	rc = SSMR3GetMem(pSSM, &Idte, sizeof(Idte));
834	if (VBOX_FAILURE(rc))
835	return rc;
836	Assert(GCPtrHandler);
837	pTrpm->aIdt[iTrap] = Idte;
838	}
839
840	return VINF_SUCCESS;
841	}
842
843
844	/**
845	* Check if gate handlers were updated
846	* (callback for the VM_FF_TRPM_SYNC_IDT forced action).
847	*
848	* @returns VBox status code.
849	* @param pVM The VM handle.
850	*/
851	TRPMR3DECL(int) TRPMR3SyncIDT(PVM pVM)
852	{
853	STAM_PROFILE_START(&pVM->trpm.s.StatSyncIDT, a);
854	const bool fRawRing0 = EMIsRawRing0Enabled(pVM);
855	int rc;
856
857	if (pVM->trpm.s.fDisableMonitoring)
858	{
859	VM_FF_CLEAR(pVM, VM_FF_TRPM_SYNC_IDT);
860	return VINF_SUCCESS; /* Nothing to do */
861	}
862
863	if (fRawRing0 && CSAMIsEnabled(pVM))
864	{
865	/* Clear all handlers */
866	Log(("TRPMR3SyncIDT: Clear all trap handlers.\n"));
867	/** @todo inefficient, but simple */
868	for (unsigned iGate = 0; iGate < 256; iGate++)
869	trpmClearGuestTrapHandler(pVM, iGate);
870
871	/* Scan them all (only the first time) */
872	CSAMR3CheckGates(pVM, 0, 256);
873	}
874
875	/*
876	* Get the IDTR.
877	*/
878	VBOXIDTR IDTR;
879	IDTR.pIdt = CPUMGetGuestIDTR(pVM, &IDTR.cbIdt);
880	if (!IDTR.cbIdt)
881	{
882	Log(("No IDT entries...\n"));
883	return DBGFSTOP(pVM);
884	}
885
886	#ifdef TRPM_TRACK_GUEST_IDT_CHANGES
887	/*
888	* Check if Guest's IDTR has changed.
889	*/
890	if ( IDTR.pIdt != pVM->trpm.s.GuestIdtr.pIdt
891	\|\| IDTR.cbIdt != pVM->trpm.s.GuestIdtr.cbIdt)
892	{
893	Log(("TRPMR3UpdateFromCPUM: Guest's IDT is changed to pIdt=%08X cbIdt=%08X\n", IDTR.pIdt, IDTR.cbIdt));
894
895	/*
896	* [Re]Register write virtual handler for guest's IDT.
897	*/
898	if (pVM->trpm.s.GuestIdtr.pIdt != ~0U)
899	{
900	rc = PGMHandlerVirtualDeregister(pVM, pVM->trpm.s.GuestIdtr.pIdt);
901	AssertRCReturn(rc, rc);
902	}
903	/* limit is including */
904	rc = PGMR3HandlerVirtualRegister(pVM, PGMVIRTHANDLERTYPE_WRITE, IDTR.pIdt, IDTR.pIdt + IDTR.cbIdt /* already inclusive */,
905	0, trpmGuestIDTWriteHandler, "trpmgcGuestIDTWriteHandler", 0, "Guest IDT write access handler");
906
907	if (rc == VERR_PGM_HANDLER_VIRTUAL_CONFLICT)
908	{
909	/* Could be a conflict with CSAM */
910	CSAMR3RemovePage(pVM, IDTR.pIdt);
911	if (PAGE_ADDRESS(IDTR.pIdt) != PAGE_ADDRESS(IDTR.pIdt + IDTR.cbIdt))
912	CSAMR3RemovePage(pVM, IDTR.pIdt + IDTR.cbIdt);
913
914	rc = PGMR3HandlerVirtualRegister(pVM, PGMVIRTHANDLERTYPE_WRITE, IDTR.pIdt, IDTR.pIdt + IDTR.cbIdt /* already inclusive */,
915	0, trpmGuestIDTWriteHandler, "trpmgcGuestIDTWriteHandler", 0, "Guest IDT write access handler");
916	}
917
918	AssertRCReturn(rc, rc);
919
920	/* Update saved Guest IDTR. */
921	pVM->trpm.s.GuestIdtr = IDTR;
922	}
923	#endif
924
925	/*
926	* Sync the interrupt gate.
927	* Should probably check/sync the others too, but for now we'll handle that in #GP.
928	*/
929	X86DESC Idte3;
930	rc = PGMPhysReadGCPtr(pVM, &Idte3, IDTR.pIdt + sizeof(Idte3) * 3, sizeof(Idte3));
931	if (VBOX_FAILURE(rc))
932	{
933	AssertMsgRC(rc, ("Failed to read IDT[3]! rc=%Vrc\n", rc));
934	return DBGFSTOP(pVM);
935	}
936	AssertRCReturn(rc, rc);
937	if (fRawRing0)
938	pVM->trpm.s.aIdt[3].Gen.u2DPL = RT_MAX(Idte3.Gen.u2Dpl, 1);
939	else
940	pVM->trpm.s.aIdt[3].Gen.u2DPL = Idte3.Gen.u2Dpl;
941
942	/*
943	* Clear the FF and we're done.
944	*/
945	VM_FF_CLEAR(pVM, VM_FF_TRPM_SYNC_IDT);
946	STAM_PROFILE_STOP(&pVM->trpm.s.StatSyncIDT, a);
947	return VINF_SUCCESS;
948	}
949
950
951	/**
952	* Disable IDT monitoring and syncing
953	*
954	* @param pVM The VM to operate on.
955	*/
956	TRPMR3DECL(void) TRPMR3DisableMonitoring(PVM pVM)
957	{
958	/*
959	* Deregister any virtual handlers.
960	*/
961	#ifdef TRPM_TRACK_GUEST_IDT_CHANGES
962	if (pVM->trpm.s.GuestIdtr.pIdt != ~0U)
963	{
964	int rc = PGMHandlerVirtualDeregister(pVM, pVM->trpm.s.GuestIdtr.pIdt);
965	AssertRC(rc);
966	pVM->trpm.s.GuestIdtr.pIdt = ~0U;
967	}
968	pVM->trpm.s.GuestIdtr.cbIdt = 0;
969	#endif
970
971	#ifdef TRPM_TRACK_SHADOW_IDT_CHANGES
972	if (pVM->trpm.s.GCPtrIdt != ~0U)
973	{
974	int rc = PGMHandlerVirtualDeregister(pVM, pVM->trpm.s.GCPtrIdt);
975	AssertRC(rc);
976	pVM->trpm.s.GCPtrIdt = ~0U;
977	}
978	#endif
979
980	VM_FF_CLEAR(pVM, VM_FF_TRPM_SYNC_IDT);
981
982	pVM->trpm.s.fDisableMonitoring = true;
983	}
984
985
986	/**
987	* \#PF Handler callback for virtual access handler ranges.
988	*
989	* Important to realize that a physical page in a range can have aliases, and
990	* for ALL and WRITE handlers these will also trigger.
991	*
992	* @returns VINF_SUCCESS if the handler have carried out the operation.
993	* @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
994	* @param pVM VM Handle.
995	* @param GCPtr The virtual address the guest is writing to. (not correct if it's an alias!)
996	* @param pvPtr The HC mapping of that address.
997	* @param pvBuf What the guest is reading/writing.
998	* @param cbBuf How much it's reading/writing.
999	* @param enmAccessType The access type.
1000	* @param pvUser User argument.
1001	*/
1002	static DECLCALLBACK(int) trpmGuestIDTWriteHandler(PVM pVM, RTGCPTR GCPtr, void pvPtr, void pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser)
1003	{
1004	Assert(enmAccessType == PGMACCESSTYPE_WRITE);
1005	Log(("trpmGuestIDTWriteHandler: write to %VGv size %d\n", GCPtr, cbBuf));
1006	VM_FF_SET(pVM, VM_FF_TRPM_SYNC_IDT);
1007	return VINF_PGM_HANDLER_DO_DEFAULT;
1008	}
1009
1010
1011	/**
1012	* Clear passthrough interrupt gate handler (reset to default handler)
1013	*
1014	* @returns VBox status code.
1015	* @param pVM The VM to operate on.
1016	* @param iTrap Trap/interrupt gate number.
1017	*/
1018	TRPMR3DECL(int) trpmR3ClearPassThroughHandler(PVM pVM, unsigned iTrap)
1019	{
1020	/** @todo cleanup trpmR3ClearPassThroughHandler()! */
1021	RTGCPTR aGCPtrs[TRPM_HANDLER_MAX];
1022	int rc;
1023
1024	memset(aGCPtrs, 0, sizeof(aGCPtrs));
1025
1026	rc = PDMR3GetSymbolGC(pVM, VMMGC_MAIN_MODULE_NAME, "TRPMGCHandlerInterupt", &aGCPtrs[TRPM_HANDLER_INT]);
1027	AssertReleaseMsgRC(rc, ("Couldn't find TRPMGCHandlerInterupt in VMMGC.gc!\n"));
1028
1029	if ( iTrap < TRPM_HANDLER_INT_BASE
1030	\|\| iTrap >= ELEMENTS(pVM->trpm.s.aIdt))
1031	{
1032	AssertMsg(iTrap < TRPM_HANDLER_INT_BASE, ("Illegal gate number %#x!\n", iTrap));
1033	return VERR_INVALID_PARAMETER;
1034	}
1035	memcpy(&pVM->trpm.s.aIdt[iTrap], &g_aIdt[iTrap], sizeof(pVM->trpm.s.aIdt[0]));
1036
1037	/* Unmark it for relocation purposes. */
1038	ASMBitClear(&pVM->trpm.s.au32IdtPatched[0], iTrap);
1039
1040	RTSEL SelCS = CPUMGetHyperCS(pVM);
1041	PVBOXIDTE pIdte = &pVM->trpm.s.aIdt[iTrap];
1042	PVBOXIDTE_GENERIC pIdteTemplate = &g_aIdt[iTrap];
1043	if (pIdte->Gen.u1Present)
1044	{
1045	Assert(pIdteTemplate->u16OffsetLow == TRPM_HANDLER_INT);
1046	Assert(sizeof(RTGCPTR) <= sizeof(aGCPtrs[0]));
1047	RTGCPTR Offset = (RTGCPTR)aGCPtrs[pIdteTemplate->u16OffsetLow];
1048
1049	/*
1050	* Generic handlers have different entrypoints for each possible
1051	* vector number. These entrypoints make a sort of an array with
1052	* 8 byte entries where the vector number is the index.
1053	* See TRPMGCHandlersA.asm for details.
1054	*/
1055	Offset += iTrap * 8;
1056
1057	if (pIdte->Gen.u5Type2 != VBOX_IDTE_TYPE2_TASK)
1058	{
1059	pIdte->Gen.u16OffsetLow = Offset & 0xffff;
1060	pIdte->Gen.u16OffsetHigh = Offset >> 16;
1061	pIdte->Gen.u16SegSel = SelCS;
1062	}
1063	}
1064
1065	return VINF_SUCCESS;
1066	}
1067
1068
1069	/**
1070	* Check if address is a gate handler (interrupt or trap).
1071	*
1072	* @returns gate nr or ~0 is not found
1073	*
1074	* @param pVM VM handle.
1075	* @param GCPtr GC address to check.
1076	*/
1077	TRPMR3DECL(uint32_t) TRPMR3QueryGateByHandler(PVM pVM, RTGCPTR GCPtr)
1078	{
1079	for (uint32_t iTrap = 0; iTrap < ELEMENTS(pVM->trpm.s.aGuestTrapHandler); iTrap++)
1080	{
1081	if (pVM->trpm.s.aGuestTrapHandler[iTrap] == GCPtr)
1082	return iTrap;
1083
1084	/* redundant */
1085	if (ASMBitTest(&pVM->trpm.s.au32IdtPatched[0], iTrap))
1086	{
1087	PVBOXIDTE pIdte = &pVM->trpm.s.aIdt[iTrap];
1088	RTGCPTR pHandler = (pIdte->Gen.u16OffsetHigh << 16) \| pIdte->Gen.u16OffsetLow;
1089
1090	if (pHandler == GCPtr)
1091	return iTrap;
1092	}
1093	}
1094	return ~0;
1095	}
1096
1097
1098	/**
1099	* Get guest trap/interrupt gate handler
1100	*
1101	* @returns Guest trap handler address or TRPM_INVALID_HANDLER if none installed
1102	* @param pVM The VM to operate on.
1103	* @param iTrap Interrupt/trap number.
1104	*/
1105	TRPMR3DECL(RTGCPTR) TRPMR3GetGuestTrapHandler(PVM pVM, unsigned iTrap)
1106	{
1107	AssertReturn(iTrap < ELEMENTS(pVM->trpm.s.aIdt), TRPM_INVALID_HANDLER);
1108
1109	return pVM->trpm.s.aGuestTrapHandler[iTrap];
1110	}
1111
1112
1113	/**
1114	* Set guest trap/interrupt gate handler
1115	* Used for setting up trap gates used for kernel calls.
1116	*
1117	* @returns VBox status code.
1118	* @param pVM The VM to operate on.
1119	* @param iTrap Interrupt/trap number.
1120	* @param pHandler GC handler pointer
1121	*/
1122	TRPMR3DECL(int) TRPMR3SetGuestTrapHandler(PVM pVM, unsigned iTrap, RTGCPTR pHandler)
1123	{
1124	/*
1125	* Validate.
1126	*/
1127	if (iTrap >= ELEMENTS(pVM->trpm.s.aIdt))
1128	{
1129	AssertMsg(iTrap < TRPM_HANDLER_INT_BASE, ("Illegal gate number %d!\n", iTrap));
1130	return VERR_INVALID_PARAMETER;
1131	}
1132
1133	AssertReturn(pHandler == TRPM_INVALID_HANDLER \|\| PATMIsPatchGCAddr(pVM, pHandler), VERR_INVALID_PARAMETER);
1134
1135	uint16_t cbIDT;
1136	RTGCPTR GCPtrIDT = CPUMGetGuestIDTR(pVM, &cbIDT);
1137	if (iTrap * sizeof(VBOXIDTE) >= cbIDT)
1138	return VERR_INVALID_PARAMETER; /* Silently ignore out of range requests. */
1139
1140	if (pHandler == TRPM_INVALID_HANDLER)
1141	{
1142	/* clear trap handler */
1143	Log(("TRPMR3SetGuestTrapHandler: clear handler %x\n", iTrap));
1144	return trpmClearGuestTrapHandler(pVM, iTrap);
1145	}
1146
1147	/*
1148	* Read the guest IDT entry.
1149	*/
1150	VBOXIDTE GuestIdte;
1151	int rc = PGMPhysReadGCPtr(pVM, &GuestIdte, GCPtrIDT + iTrap * sizeof(GuestIdte), sizeof(GuestIdte));
1152	if (VBOX_FAILURE(rc))
1153	{
1154	AssertMsgRC(rc, ("Failed to read IDTE! rc=%Vrc\n", rc));
1155	return rc;
1156	}
1157
1158	if (EMIsRawRing0Enabled(pVM))
1159	{
1160	/*
1161	* Only replace handlers for which we are 100% certain there won't be
1162	* any host interrupts.
1163	*
1164	* 0x2E is safe on Windows because it's the system service interrupt gate. Not
1165	* quite certain if this is safe or not on 64-bit Vista, it probably is.
1166	*
1167	* 0x80 is safe on Linux because it's the syscall vector and is part of the
1168	* 32-bit usermode ABI. 64-bit Linux (usually) supports 32-bit processes
1169	* and will therefor never assign hardware interrupts to 0x80.
1170	*
1171	* Exactly why 0x80 is safe on 32-bit Windows is a bit hazy, but it seems
1172	* to work ok... However on 64-bit Vista (SMP?) is doesn't work reliably.
1173	* Booting Linux/BSD guest will cause system lockups on most of the computers.
1174	*
1175	* PORTME - Check if your host keeps any of these gates free from hw ints.
1176	*
1177	* Note! SELMR3SyncTSS also has code related to this interrupt handler replacing.
1178	*/
1179	/** @todo handle those dependencies better! */
1180	/** @todo Solve this in a proper manner. see defect #1186 */
1181	#if defined(RT_OS_WINDOWS) && defined(RT_ARCH_X86)
1182	if (iTrap == 0x2E \|\| iTrap == 0x80)
1183	#elif defined(RT_OS_LINUX)
1184	if (iTrap == 0x80)
1185	#else
1186	if (0)
1187	#endif
1188	{
1189	if ( GuestIdte.Gen.u1Present
1190	&& ( GuestIdte.Gen.u5Type2 == VBOX_IDTE_TYPE2_TRAP_32
1191	\|\| GuestIdte.Gen.u5Type2 == VBOX_IDTE_TYPE2_INT_32)
1192	&& GuestIdte.Gen.u2DPL == 3)
1193	{
1194	PVBOXIDTE pIdte = &pVM->trpm.s.aIdt[iTrap];
1195
1196	GuestIdte.Gen.u5Type2 = VBOX_IDTE_TYPE2_TRAP_32;
1197	GuestIdte.Gen.u16OffsetHigh = pHandler >> 16;
1198	GuestIdte.Gen.u16OffsetLow = pHandler & 0xFFFF;
1199	GuestIdte.Gen.u16SegSel \|= 1; //ring 1
1200	*pIdte = GuestIdte;
1201
1202	/* Mark it for relocation purposes. */
1203	ASMBitSet(&pVM->trpm.s.au32IdtPatched[0], iTrap);
1204
1205	/* Also store it in our guest trap array. */
1206	pVM->trpm.s.aGuestTrapHandler[iTrap] = pHandler;
1207
1208	Log(("Setting trap handler %x to %08X (direct)\n", iTrap, pHandler));
1209	return VINF_SUCCESS;
1210	}
1211	/* ok, let's try to install a trampoline handler then. */
1212	}
1213	}
1214
1215	if ( GuestIdte.Gen.u1Present
1216	&& ( GuestIdte.Gen.u5Type2 == VBOX_IDTE_TYPE2_TRAP_32
1217	\|\| GuestIdte.Gen.u5Type2 == VBOX_IDTE_TYPE2_INT_32)
1218	&& (GuestIdte.Gen.u2DPL == 3 \|\| GuestIdte.Gen.u2DPL == 0))
1219	{
1220	/*
1221	* Save handler which can be used for a trampoline call inside the GC
1222	*/
1223	Log(("Setting trap handler %x to %08X\n", iTrap, pHandler));
1224	pVM->trpm.s.aGuestTrapHandler[iTrap] = pHandler;
1225	return VINF_SUCCESS;
1226	}
1227	return VERR_INVALID_PARAMETER;
1228	}
1229
1230
1231	/**
1232	* Check if address is a gate handler (interrupt/trap/task/anything).
1233	*
1234	* @returns True is gate handler, false if not.
1235	*
1236	* @param pVM VM handle.
1237	* @param GCPtr GC address to check.
1238	*/
1239	TRPMR3DECL(bool) TRPMR3IsGateHandler(PVM pVM, RTGCPTR GCPtr)
1240	{
1241	/*
1242	* Read IDTR and calc last entry.
1243	*/
1244	uint16_t cbIDT;
1245	RTGCPTR GCPtrIDTE = CPUMGetGuestIDTR(pVM, &cbIDT);
1246	unsigned cEntries = (cbIDT + 1) / sizeof(VBOXIDTE);
1247	if (!cEntries)
1248	return false;
1249	RTGCPTR GCPtrIDTELast = GCPtrIDTE + (cEntries - 1) * sizeof(VBOXIDTE);
1250
1251	/*
1252	* Outer loop: interate pages.
1253	*/
1254	while (GCPtrIDTE <= GCPtrIDTELast)
1255	{
1256	/*
1257	* Convert this page to a HC address.
1258	* (This function checks for not-present pages.)
1259	*/
1260	PVBOXIDTE pIDTE;
1261	int rc = PGMPhysGCPtr2HCPtr(pVM, GCPtrIDTE, (void **)&pIDTE);
1262	if (VBOX_SUCCESS(rc))
1263	{
1264	/*
1265	* Inner Loop: Iterate the data on this page looking for an entry equal to GCPtr.
1266	* N.B. Member of the Flat Earth Society...
1267	*/
1268	while (GCPtrIDTE <= GCPtrIDTELast)
1269	{
1270	if (pIDTE->Gen.u1Present)
1271	{
1272	RTGCPTR GCPtrHandler = (pIDTE->Gen.u16OffsetHigh << 16) \| pIDTE->Gen.u16OffsetLow;
1273	if (GCPtr == GCPtrHandler)
1274	return true;
1275	}
1276
1277	/* next entry */
1278	if ((GCPtrIDTE & PAGE_OFFSET_MASK) + sizeof(VBOXIDTE) >= PAGE_SIZE)
1279	{
1280	AssertMsg(!(GCPtrIDTE & (sizeof(VBOXIDTE) - 1)),
1281	("IDT is crossing pages and it's not aligned! GCPtrIDTE=%#x cbIDT=%#x\n", GCPtrIDTE, cbIDT));
1282	GCPtrIDTE += sizeof(VBOXIDTE);
1283	break;
1284	}
1285	GCPtrIDTE += sizeof(VBOXIDTE);
1286	pIDTE++;
1287	}
1288	}
1289	else
1290	{
1291	/* Skip to the next page (if any). Take care not to wrap around the address space. */
1292	if ((GCPtrIDTELast >> PAGE_SHIFT) == (GCPtrIDTE >> PAGE_SHIFT))
1293	return false;
1294	GCPtrIDTE = RT_ALIGN_T(GCPtrIDTE, PAGE_SIZE, RTGCPTR) + PAGE_SIZE + (GCPtrIDTE & (sizeof(VBOXIDTE) - 1));
1295	}
1296	}
1297	return false;
1298	}
1299
1300
1301	/**
1302	* Inject event (such as external irq or trap)
1303	*
1304	* @returns VBox status code.
1305	* @param pVM The VM to operate on.
1306	* @param enmEvent Trpm event type
1307	*/
1308	TRPMR3DECL(int) TRPMR3InjectEvent(PVM pVM, TRPMEVENT enmEvent)
1309	{
1310	PCPUMCTX pCtx;
1311	int rc;
1312
1313	rc = CPUMQueryGuestCtxPtr(pVM, &pCtx);
1314	AssertRC(rc);
1315	Assert(!PATMIsPatchGCAddr(pVM, (RTGCPTR)pCtx->eip));
1316	Assert(!VM_FF_ISSET(pVM, VM_FF_INHIBIT_INTERRUPTS));
1317
1318	/* Currently only useful for external hardware interrupts. */
1319	Assert(enmEvent == TRPM_HARDWARE_INT);
1320
1321	if (REMR3QueryPendingInterrupt(pVM) == REM_NO_PENDING_IRQ)
1322	{
1323	#ifdef TRPM_FORWARD_TRAPS_IN_GC
1324
1325	# ifdef LOG_ENABLED
1326	DBGFR3InfoLog(pVM, "cpumguest", "TRPMInject");
1327	DBGFR3DisasInstrCurrentLog(pVM, "TRPMInject");
1328	# endif
1329
1330	uint8_t u8Interrupt;
1331	rc = PDMGetInterrupt(pVM, &u8Interrupt);
1332	Log(("TRPMR3InjectEvent: u8Interrupt=%d (%#x) rc=%Vrc\n", u8Interrupt, u8Interrupt, rc));
1333	if (VBOX_SUCCESS(rc))
1334	{
1335	if (HWACCMR3IsActive(pVM))
1336	{
1337	rc = TRPMAssertTrap(pVM, u8Interrupt, enmEvent);
1338	AssertRC(rc);
1339	STAM_COUNTER_INC(&pVM->trpm.s.paStatForwardedIRQR3[u8Interrupt]);
1340	return VINF_EM_RESCHEDULE_HWACC;
1341	}
1342	/* If the guest gate is not patched, then we will check (again) if we can patch it. */
1343	if (pVM->trpm.s.aGuestTrapHandler[u8Interrupt] == TRPM_INVALID_HANDLER)
1344	{
1345	CSAMR3CheckGates(pVM, u8Interrupt, 1);
1346	Log(("TRPMR3InjectEvent: recheck gate %x -> valid=%d\n", u8Interrupt, TRPMR3GetGuestTrapHandler(pVM, u8Interrupt) != TRPM_INVALID_HANDLER));
1347	}
1348
1349	if (pVM->trpm.s.aGuestTrapHandler[u8Interrupt] != TRPM_INVALID_HANDLER)
1350	{
1351	/* Must check pending forced actions as our IDT or GDT might be out of sync */
1352	EMR3CheckRawForcedActions(pVM);
1353
1354	/* There's a handler -> let's execute it in raw mode */
1355	rc = TRPMForwardTrap(pVM, CPUMCTX2CORE(pCtx), u8Interrupt, 0, TRPM_TRAP_NO_ERRORCODE, enmEvent);
1356	if (rc == VINF_SUCCESS /* Don't use VBOX_SUCCESS */)
1357	{
1358	Assert(!VM_FF_ISPENDING(pVM, VM_FF_SELM_SYNC_GDT \| VM_FF_SELM_SYNC_LDT \| VM_FF_TRPM_SYNC_IDT \| VM_FF_SELM_SYNC_TSS));
1359
1360	STAM_COUNTER_INC(&pVM->trpm.s.paStatForwardedIRQR3[u8Interrupt]);
1361	return VINF_EM_RESCHEDULE_RAW;
1362	}
1363	}
1364	else
1365	STAM_COUNTER_INC(&pVM->trpm.s.StatForwardFailNoHandler);
1366	REMR3NotifyPendingInterrupt(pVM, u8Interrupt);
1367	}
1368	else
1369	AssertRC(rc);
1370	#else
1371	if (HWACCMR3IsActive(pVM))
1372	{
1373	uint8_t u8Interrupt;
1374	rc = PDMGetInterrupt(pVM, &u8Interrupt);
1375	Log(("TRPMR3InjectEvent: u8Interrupt=%d (%#x) rc=%Vrc\n", u8Interrupt, u8Interrupt, rc));
1376	if (VBOX_SUCCESS(rc))
1377	{
1378	rc = TRPMAssertTrap(pVM, u8Interrupt, false);
1379	AssertRC(rc);
1380	STAM_COUNTER_INC(&pVM->trpm.s.paStatForwardedIRQR3[u8Interrupt]);
1381	return VINF_EM_RESCHEDULE_HWACC;
1382	}
1383	}
1384	else
1385	AssertRC(rc);
1386	#endif
1387	}
1388	/** @todo check if it's safe to translate the patch address to the original guest address.
1389	* this implies a safe state in translated instructions and should take sti successors into account (instruction fusing)
1390	*/
1391	/* Note: if it's a PATM address, then we'll go back to raw mode regardless of the return code below. */
1392
1393	/* Fall back to the recompiler */
1394	return VINF_EM_RESCHEDULE_REM; /* (Heed the halted state if this is changed!) */
1395	}
1396

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source: vbox/trunk/src/VBox/VMM/TRPM.cpp@ 4906

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