TRPM.cpp@ 40

Last change on this file since 40 was 23, checked in by vboxsync, 18 years ago
string.h & stdio.h + header cleanups.
Property svn:eol-style set to `native` Property svn:keywords set to `Id`
File size: 69.8 KB

Line
1	/* $Id: TRPM.cpp 23 2007-01-15 14:08:28Z vboxsync $ */
2	/** @file
3	* TRPM - The Trap Monitor
4	*/
5
6	/*
7	* Copyright (C) 2006 InnoTek Systemberatung GmbH
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License as published by the Free Software Foundation,
13	* in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
14	* distribution. VirtualBox OSE is distributed in the hope that it will
15	* be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* If you received this file as part of a commercial VirtualBox
18	* distribution, then only the terms of your commercial VirtualBox
19	* license agreement apply instead of the previous paragraph.
20	*/
21
22
23	/** @page pg_trpm TRPM - The Trap Monitor
24	*
25	* The Trap Monitor (TRPM) is responsible for all trap and interrupt
26	* handling in the VMM.
27	*
28	* Interrupts occuring in GC will be routed to the HC and reassert there. TRPM
29	* makes the assumption that the VMM or Guest will not cause hardware
30	* interrupts to occur.
31	*
32	* Traps will be passed to a list of registered trap handlers which will
33	* check and see if they are the responsible part for the trap. If no handler
34	* was found the default action is to pass the trap on the Guest OS. Trap
35	* handlers may raise a Guest OS trap as a result of the trap handling.
36	* Statistics will be maintained so the trap handler list can be resorted
37	* every now and then to examin handlers in the optimal order.
38	*
39	* If a trap happens inside the VMM (Guest Context) the TRPM will take the
40	* shortest path back to Ring-3 Host Context and brutally destroy the VM.
41	*
42	* The TRPM will have interfaces to enable devices to assert interrupts
43	* in the guest, these interfaces are multithreaded and availble from
44	* all contexts. This is to allow devices to have use worker threads.
45	*
46	*/
47
48
49
50	/*******************************************************************************
51	* Header Files *
52	*******************************************************************************/
53	#define LOG_GROUP LOG_GROUP_TRPM
54	#include <VBox/trpm.h>
55	#include <VBox/cpum.h>
56	#include <VBox/selm.h>
57	#include <VBox/pdm.h>
58	#include <VBox/pgm.h>
59	#include <VBox/mm.h>
60	#include <VBox/stam.h>
61	#include <VBox/csam.h>
62	#include <VBox/patm.h>
63	#include "TRPMInternal.h"
64	#include <VBox/vm.h>
65	#include <VBox/em.h>
66	#include <VBox/rem.h>
67	#include <VBox/hwaccm.h>
68
69	#include <VBox/err.h>
70	#include <VBox/param.h>
71	#include <VBox/log.h>
72	#include <iprt/assert.h>
73	#include <iprt/asm.h>
74	#include <iprt/string.h>
75	#include <iprt/alloc.h>
76
77
78	/*******************************************************************************
79	* Structures and Typedefs *
80	*******************************************************************************/
81	/**
82	* Trap handler function.
83	* @todo need to specialize this as we go along.
84	*/
85	typedef enum TRPMHANDLER
86	{
87	/** Generic Interrupt handler. */
88	TRPM_HANDLER_INT = 0,
89	/** Generic Trap handler. */
90	TRPM_HANDLER_TRAP,
91	/** Trap 8 (\#DF) handler. */
92	TRPM_HANDLER_TRAP_08,
93	/** Trap 12 (\#MC) handler. */
94	TRPM_HANDLER_TRAP_12,
95	/** Max. */
96	TRPM_HANDLER_MAX
97	} TRPMHANDLER, *PTRPMHANDLER;
98
99	/** First interrupt handler. Used for validating input. */
100	#define TRPM_HANDLER_INT_BASE 0x20
101
102
103	/*******************************************************************************
104	* Global Variables *
105	*******************************************************************************/
106	/** Preinitialized IDT.
107	* The u16OffsetLow is a value of the TRPMHANDLER enum which TRPMR3Relocate()
108	* will use to pick the right address. The u16SegSel is always VMM CS.
109	*/
110	static VBOXIDTE_GENERIC g_aIdt[256] =
111	{
112	/* special trap handler - still, this is an interrupt gate not a trap gate... */
113	#define IDTE_TRAP(enm) { (unsigned)enm, 0, 0, VBOX_IDTE_TYPE1, VBOX_IDTE_TYPE2_INT_32, 0, 1, 0 }
114	/* generic trap handler. */
115	#define IDTE_TRAP_GEN() IDTE_TRAP(TRPM_HANDLER_TRAP)
116	/* special interrupt handler. */
117	#define IDTE_INT(enm) { (unsigned)enm, 0, 0, VBOX_IDTE_TYPE1, VBOX_IDTE_TYPE2_INT_32, 0, 1, 0 }
118	/* generic interrupt handler. */
119	#define IDTE_INT_GEN() IDTE_INT(TRPM_HANDLER_INT)
120	/* special task gate IDT entry (for critical exceptions like #DF). */
121	#define IDTE_TASK(enm) { (unsigned)enm, 0, 0, VBOX_IDTE_TYPE1, VBOX_IDTE_TYPE2_TASK, 0, 1, 0 }
122	/* draft, fixme later when the handler is written. */
123	#define IDTE_RESERVED() { 0, 0, 0, 0, 0, 0, 0, 0 }
124
125	/* N - M M - T - C - D i */
126	/* o - n o - y - o - e p */
127	/* - e n - p - d - s t */
128	/* - i - e - e - c . */
129	/* - c - - - r */
130	/* ============================================================= */
131	IDTE_TRAP_GEN(), /* 0 - #DE - F - N - Divide error */
132	IDTE_TRAP_GEN(), /* 1 - #DB - F/T - N - Single step, INT 1 instruction */
133	#ifdef VBOX_WITH_NMI
134	IDTE_TRAP_GEN(), /* 2 - - I - N - Non-Maskable Interrupt (NMI) */
135	#else
136	IDTE_INT_GEN(), /* 2 - - I - N - Non-Maskable Interrupt (NMI) */
137	#endif
138	IDTE_TRAP_GEN(), /* 3 - #BP - T - N - Breakpoint, INT 3 instruction. */
139	IDTE_TRAP_GEN(), /* 4 - #OF - T - N - Overflow, INTO instruction. */
140	IDTE_TRAP_GEN(), /* 5 - #BR - F - N - BOUND Range Exceeded, BOUND instruction. */
141	IDTE_TRAP_GEN(), /* 6 - #UD - F - N - Undefined(/Invalid) Opcode. */
142	IDTE_TRAP_GEN(), /* 7 - #NM - F - N - Device not available, FP or (F)WAIT instruction. */
143	IDTE_TASK(TRPM_HANDLER_TRAP_08), /* 8 - #DF - A - 0 - Double fault. */
144	IDTE_TRAP_GEN(), /* 9 - - F - N - Coprocessor Segment Overrun (obsolete). */
145	IDTE_TRAP_GEN(), /* a - #TS - F - Y - Invalid TSS, Taskswitch or TSS access. */
146	IDTE_TRAP_GEN(), /* b - #NP - F - Y - Segment not present. */
147	IDTE_TRAP_GEN(), /* c - #SS - F - Y - Stack-Segment fault. */
148	IDTE_TRAP_GEN(), /* d - #GP - F - Y - General protection fault. */
149	IDTE_TRAP_GEN(), /* e - #PF - F - Y - Page fault. - interrupt gate!!! */
150	IDTE_RESERVED(), /* f - - - - Intel Reserved. Do not use. */
151	IDTE_TRAP_GEN(), /* 10 - #MF - F - N - x86 FPU Floating-Point Error (Math fault), FP or (F)WAIT instruction. */
152	IDTE_TRAP_GEN(), /* 11 - #AC - F - 0 - Alignment Check. */
153	IDTE_TRAP(TRPM_HANDLER_TRAP_12), /* 12 - #MC - A - N - Machine Check. */
154	IDTE_TRAP_GEN(), /* 13 - #XF - F - N - SIMD Floating-Point Exception. */
155	IDTE_RESERVED(), /* 14 - - - - Intel Reserved. Do not use. */
156	IDTE_RESERVED(), /* 15 - - - - Intel Reserved. Do not use. */
157	IDTE_RESERVED(), /* 16 - - - - Intel Reserved. Do not use. */
158	IDTE_RESERVED(), /* 17 - - - - Intel Reserved. Do not use. */
159	IDTE_RESERVED(), /* 18 - - - - Intel Reserved. Do not use. */
160	IDTE_RESERVED(), /* 19 - - - - Intel Reserved. Do not use. */
161	IDTE_RESERVED(), /* 1a - - - - Intel Reserved. Do not use. */
162	IDTE_RESERVED(), /* 1b - - - - Intel Reserved. Do not use. */
163	IDTE_RESERVED(), /* 1c - - - - Intel Reserved. Do not use. */
164	IDTE_RESERVED(), /* 1d - - - - Intel Reserved. Do not use. */
165	IDTE_RESERVED(), /* 1e - - - - Intel Reserved. Do not use. */
166	IDTE_RESERVED(), /* 1f - - - - Intel Reserved. Do not use. */
167	IDTE_INT_GEN(), /* 20 - - I - - User defined Interrupts, external of INT n. */
168	IDTE_INT_GEN(), /* 21 - - I - - User defined Interrupts, external of INT n. */
169	IDTE_INT_GEN(), /* 22 - - I - - User defined Interrupts, external of INT n. */
170	IDTE_INT_GEN(), /* 23 - - I - - User defined Interrupts, external of INT n. */
171	IDTE_INT_GEN(), /* 24 - - I - - User defined Interrupts, external of INT n. */
172	IDTE_INT_GEN(), /* 25 - - I - - User defined Interrupts, external of INT n. */
173	IDTE_INT_GEN(), /* 26 - - I - - User defined Interrupts, external of INT n. */
174	IDTE_INT_GEN(), /* 27 - - I - - User defined Interrupts, external of INT n. */
175	IDTE_INT_GEN(), /* 28 - - I - - User defined Interrupts, external of INT n. */
176	IDTE_INT_GEN(), /* 29 - - I - - User defined Interrupts, external of INT n. */
177	IDTE_INT_GEN(), /* 2a - - I - - User defined Interrupts, external of INT n. */
178	IDTE_INT_GEN(), /* 2b - - I - - User defined Interrupts, external of INT n. */
179	IDTE_INT_GEN(), /* 2c - - I - - User defined Interrupts, external of INT n. */
180	IDTE_INT_GEN(), /* 2d - - I - - User defined Interrupts, external of INT n. */
181	IDTE_INT_GEN(), /* 2e - - I - - User defined Interrupts, external of INT n. */
182	IDTE_INT_GEN(), /* 2f - - I - - User defined Interrupts, external of INT n. */
183	IDTE_INT_GEN(), /* 30 - - I - - User defined Interrupts, external of INT n. */
184	IDTE_INT_GEN(), /* 31 - - I - - User defined Interrupts, external of INT n. */
185	IDTE_INT_GEN(), /* 32 - - I - - User defined Interrupts, external of INT n. */
186	IDTE_INT_GEN(), /* 33 - - I - - User defined Interrupts, external of INT n. */
187	IDTE_INT_GEN(), /* 34 - - I - - User defined Interrupts, external of INT n. */
188	IDTE_INT_GEN(), /* 35 - - I - - User defined Interrupts, external of INT n. */
189	IDTE_INT_GEN(), /* 36 - - I - - User defined Interrupts, external of INT n. */
190	IDTE_INT_GEN(), /* 37 - - I - - User defined Interrupts, external of INT n. */
191	IDTE_INT_GEN(), /* 38 - - I - - User defined Interrupts, external of INT n. */
192	IDTE_INT_GEN(), /* 39 - - I - - User defined Interrupts, external of INT n. */
193	IDTE_INT_GEN(), /* 3a - - I - - User defined Interrupts, external of INT n. */
194	IDTE_INT_GEN(), /* 3b - - I - - User defined Interrupts, external of INT n. */
195	IDTE_INT_GEN(), /* 3c - - I - - User defined Interrupts, external of INT n. */
196	IDTE_INT_GEN(), /* 3d - - I - - User defined Interrupts, external of INT n. */
197	IDTE_INT_GEN(), /* 3e - - I - - User defined Interrupts, external of INT n. */
198	IDTE_INT_GEN(), /* 3f - - I - - User defined Interrupts, external of INT n. */
199	IDTE_INT_GEN(), /* 40 - - I - - User defined Interrupts, external of INT n. */
200	IDTE_INT_GEN(), /* 41 - - I - - User defined Interrupts, external of INT n. */
201	IDTE_INT_GEN(), /* 42 - - I - - User defined Interrupts, external of INT n. */
202	IDTE_INT_GEN(), /* 43 - - I - - User defined Interrupts, external of INT n. */
203	IDTE_INT_GEN(), /* 44 - - I - - User defined Interrupts, external of INT n. */
204	IDTE_INT_GEN(), /* 45 - - I - - User defined Interrupts, external of INT n. */
205	IDTE_INT_GEN(), /* 46 - - I - - User defined Interrupts, external of INT n. */
206	IDTE_INT_GEN(), /* 47 - - I - - User defined Interrupts, external of INT n. */
207	IDTE_INT_GEN(), /* 48 - - I - - User defined Interrupts, external of INT n. */
208	IDTE_INT_GEN(), /* 49 - - I - - User defined Interrupts, external of INT n. */
209	IDTE_INT_GEN(), /* 4a - - I - - User defined Interrupts, external of INT n. */
210	IDTE_INT_GEN(), /* 4b - - I - - User defined Interrupts, external of INT n. */
211	IDTE_INT_GEN(), /* 4c - - I - - User defined Interrupts, external of INT n. */
212	IDTE_INT_GEN(), /* 4d - - I - - User defined Interrupts, external of INT n. */
213	IDTE_INT_GEN(), /* 4e - - I - - User defined Interrupts, external of INT n. */
214	IDTE_INT_GEN(), /* 4f - - I - - User defined Interrupts, external of INT n. */
215	IDTE_INT_GEN(), /* 50 - - I - - User defined Interrupts, external of INT n. */
216	IDTE_INT_GEN(), /* 51 - - I - - User defined Interrupts, external of INT n. */
217	IDTE_INT_GEN(), /* 52 - - I - - User defined Interrupts, external of INT n. */
218	IDTE_INT_GEN(), /* 53 - - I - - User defined Interrupts, external of INT n. */
219	IDTE_INT_GEN(), /* 54 - - I - - User defined Interrupts, external of INT n. */
220	IDTE_INT_GEN(), /* 55 - - I - - User defined Interrupts, external of INT n. */
221	IDTE_INT_GEN(), /* 56 - - I - - User defined Interrupts, external of INT n. */
222	IDTE_INT_GEN(), /* 57 - - I - - User defined Interrupts, external of INT n. */
223	IDTE_INT_GEN(), /* 58 - - I - - User defined Interrupts, external of INT n. */
224	IDTE_INT_GEN(), /* 59 - - I - - User defined Interrupts, external of INT n. */
225	IDTE_INT_GEN(), /* 5a - - I - - User defined Interrupts, external of INT n. */
226	IDTE_INT_GEN(), /* 5b - - I - - User defined Interrupts, external of INT n. */
227	IDTE_INT_GEN(), /* 5c - - I - - User defined Interrupts, external of INT n. */
228	IDTE_INT_GEN(), /* 5d - - I - - User defined Interrupts, external of INT n. */
229	IDTE_INT_GEN(), /* 5e - - I - - User defined Interrupts, external of INT n. */
230	IDTE_INT_GEN(), /* 5f - - I - - User defined Interrupts, external of INT n. */
231	IDTE_INT_GEN(), /* 60 - - I - - User defined Interrupts, external of INT n. */
232	IDTE_INT_GEN(), /* 61 - - I - - User defined Interrupts, external of INT n. */
233	IDTE_INT_GEN(), /* 62 - - I - - User defined Interrupts, external of INT n. */
234	IDTE_INT_GEN(), /* 63 - - I - - User defined Interrupts, external of INT n. */
235	IDTE_INT_GEN(), /* 64 - - I - - User defined Interrupts, external of INT n. */
236	IDTE_INT_GEN(), /* 65 - - I - - User defined Interrupts, external of INT n. */
237	IDTE_INT_GEN(), /* 66 - - I - - User defined Interrupts, external of INT n. */
238	IDTE_INT_GEN(), /* 67 - - I - - User defined Interrupts, external of INT n. */
239	IDTE_INT_GEN(), /* 68 - - I - - User defined Interrupts, external of INT n. */
240	IDTE_INT_GEN(), /* 69 - - I - - User defined Interrupts, external of INT n. */
241	IDTE_INT_GEN(), /* 6a - - I - - User defined Interrupts, external of INT n. */
242	IDTE_INT_GEN(), /* 6b - - I - - User defined Interrupts, external of INT n. */
243	IDTE_INT_GEN(), /* 6c - - I - - User defined Interrupts, external of INT n. */
244	IDTE_INT_GEN(), /* 6d - - I - - User defined Interrupts, external of INT n. */
245	IDTE_INT_GEN(), /* 6e - - I - - User defined Interrupts, external of INT n. */
246	IDTE_INT_GEN(), /* 6f - - I - - User defined Interrupts, external of INT n. */
247	IDTE_INT_GEN(), /* 70 - - I - - User defined Interrupts, external of INT n. */
248	IDTE_INT_GEN(), /* 71 - - I - - User defined Interrupts, external of INT n. */
249	IDTE_INT_GEN(), /* 72 - - I - - User defined Interrupts, external of INT n. */
250	IDTE_INT_GEN(), /* 73 - - I - - User defined Interrupts, external of INT n. */
251	IDTE_INT_GEN(), /* 74 - - I - - User defined Interrupts, external of INT n. */
252	IDTE_INT_GEN(), /* 75 - - I - - User defined Interrupts, external of INT n. */
253	IDTE_INT_GEN(), /* 76 - - I - - User defined Interrupts, external of INT n. */
254	IDTE_INT_GEN(), /* 77 - - I - - User defined Interrupts, external of INT n. */
255	IDTE_INT_GEN(), /* 78 - - I - - User defined Interrupts, external of INT n. */
256	IDTE_INT_GEN(), /* 79 - - I - - User defined Interrupts, external of INT n. */
257	IDTE_INT_GEN(), /* 7a - - I - - User defined Interrupts, external of INT n. */
258	IDTE_INT_GEN(), /* 7b - - I - - User defined Interrupts, external of INT n. */
259	IDTE_INT_GEN(), /* 7c - - I - - User defined Interrupts, external of INT n. */
260	IDTE_INT_GEN(), /* 7d - - I - - User defined Interrupts, external of INT n. */
261	IDTE_INT_GEN(), /* 7e - - I - - User defined Interrupts, external of INT n. */
262	IDTE_INT_GEN(), /* 7f - - I - - User defined Interrupts, external of INT n. */
263	IDTE_INT_GEN(), /* 80 - - I - - User defined Interrupts, external of INT n. */
264	IDTE_INT_GEN(), /* 81 - - I - - User defined Interrupts, external of INT n. */
265	IDTE_INT_GEN(), /* 82 - - I - - User defined Interrupts, external of INT n. */
266	IDTE_INT_GEN(), /* 83 - - I - - User defined Interrupts, external of INT n. */
267	IDTE_INT_GEN(), /* 84 - - I - - User defined Interrupts, external of INT n. */
268	IDTE_INT_GEN(), /* 85 - - I - - User defined Interrupts, external of INT n. */
269	IDTE_INT_GEN(), /* 86 - - I - - User defined Interrupts, external of INT n. */
270	IDTE_INT_GEN(), /* 87 - - I - - User defined Interrupts, external of INT n. */
271	IDTE_INT_GEN(), /* 88 - - I - - User defined Interrupts, external of INT n. */
272	IDTE_INT_GEN(), /* 89 - - I - - User defined Interrupts, external of INT n. */
273	IDTE_INT_GEN(), /* 8a - - I - - User defined Interrupts, external of INT n. */
274	IDTE_INT_GEN(), /* 8b - - I - - User defined Interrupts, external of INT n. */
275	IDTE_INT_GEN(), /* 8c - - I - - User defined Interrupts, external of INT n. */
276	IDTE_INT_GEN(), /* 8d - - I - - User defined Interrupts, external of INT n. */
277	IDTE_INT_GEN(), /* 8e - - I - - User defined Interrupts, external of INT n. */
278	IDTE_INT_GEN(), /* 8f - - I - - User defined Interrupts, external of INT n. */
279	IDTE_INT_GEN(), /* 90 - - I - - User defined Interrupts, external of INT n. */
280	IDTE_INT_GEN(), /* 91 - - I - - User defined Interrupts, external of INT n. */
281	IDTE_INT_GEN(), /* 92 - - I - - User defined Interrupts, external of INT n. */
282	IDTE_INT_GEN(), /* 93 - - I - - User defined Interrupts, external of INT n. */
283	IDTE_INT_GEN(), /* 94 - - I - - User defined Interrupts, external of INT n. */
284	IDTE_INT_GEN(), /* 95 - - I - - User defined Interrupts, external of INT n. */
285	IDTE_INT_GEN(), /* 96 - - I - - User defined Interrupts, external of INT n. */
286	IDTE_INT_GEN(), /* 97 - - I - - User defined Interrupts, external of INT n. */
287	IDTE_INT_GEN(), /* 98 - - I - - User defined Interrupts, external of INT n. */
288	IDTE_INT_GEN(), /* 99 - - I - - User defined Interrupts, external of INT n. */
289	IDTE_INT_GEN(), /* 9a - - I - - User defined Interrupts, external of INT n. */
290	IDTE_INT_GEN(), /* 9b - - I - - User defined Interrupts, external of INT n. */
291	IDTE_INT_GEN(), /* 9c - - I - - User defined Interrupts, external of INT n. */
292	IDTE_INT_GEN(), /* 9d - - I - - User defined Interrupts, external of INT n. */
293	IDTE_INT_GEN(), /* 9e - - I - - User defined Interrupts, external of INT n. */
294	IDTE_INT_GEN(), /* 9f - - I - - User defined Interrupts, external of INT n. */
295	IDTE_INT_GEN(), /* a0 - - I - - User defined Interrupts, external of INT n. */
296	IDTE_INT_GEN(), /* a1 - - I - - User defined Interrupts, external of INT n. */
297	IDTE_INT_GEN(), /* a2 - - I - - User defined Interrupts, external of INT n. */
298	IDTE_INT_GEN(), /* a3 - - I - - User defined Interrupts, external of INT n. */
299	IDTE_INT_GEN(), /* a4 - - I - - User defined Interrupts, external of INT n. */
300	IDTE_INT_GEN(), /* a5 - - I - - User defined Interrupts, external of INT n. */
301	IDTE_INT_GEN(), /* a6 - - I - - User defined Interrupts, external of INT n. */
302	IDTE_INT_GEN(), /* a7 - - I - - User defined Interrupts, external of INT n. */
303	IDTE_INT_GEN(), /* a8 - - I - - User defined Interrupts, external of INT n. */
304	IDTE_INT_GEN(), /* a9 - - I - - User defined Interrupts, external of INT n. */
305	IDTE_INT_GEN(), /* aa - - I - - User defined Interrupts, external of INT n. */
306	IDTE_INT_GEN(), /* ab - - I - - User defined Interrupts, external of INT n. */
307	IDTE_INT_GEN(), /* ac - - I - - User defined Interrupts, external of INT n. */
308	IDTE_INT_GEN(), /* ad - - I - - User defined Interrupts, external of INT n. */
309	IDTE_INT_GEN(), /* ae - - I - - User defined Interrupts, external of INT n. */
310	IDTE_INT_GEN(), /* af - - I - - User defined Interrupts, external of INT n. */
311	IDTE_INT_GEN(), /* b0 - - I - - User defined Interrupts, external of INT n. */
312	IDTE_INT_GEN(), /* b1 - - I - - User defined Interrupts, external of INT n. */
313	IDTE_INT_GEN(), /* b2 - - I - - User defined Interrupts, external of INT n. */
314	IDTE_INT_GEN(), /* b3 - - I - - User defined Interrupts, external of INT n. */
315	IDTE_INT_GEN(), /* b4 - - I - - User defined Interrupts, external of INT n. */
316	IDTE_INT_GEN(), /* b5 - - I - - User defined Interrupts, external of INT n. */
317	IDTE_INT_GEN(), /* b6 - - I - - User defined Interrupts, external of INT n. */
318	IDTE_INT_GEN(), /* b7 - - I - - User defined Interrupts, external of INT n. */
319	IDTE_INT_GEN(), /* b8 - - I - - User defined Interrupts, external of INT n. */
320	IDTE_INT_GEN(), /* b9 - - I - - User defined Interrupts, external of INT n. */
321	IDTE_INT_GEN(), /* ba - - I - - User defined Interrupts, external of INT n. */
322	IDTE_INT_GEN(), /* bb - - I - - User defined Interrupts, external of INT n. */
323	IDTE_INT_GEN(), /* bc - - I - - User defined Interrupts, external of INT n. */
324	IDTE_INT_GEN(), /* bd - - I - - User defined Interrupts, external of INT n. */
325	IDTE_INT_GEN(), /* be - - I - - User defined Interrupts, external of INT n. */
326	IDTE_INT_GEN(), /* bf - - I - - User defined Interrupts, external of INT n. */
327	IDTE_INT_GEN(), /* c0 - - I - - User defined Interrupts, external of INT n. */
328	IDTE_INT_GEN(), /* c1 - - I - - User defined Interrupts, external of INT n. */
329	IDTE_INT_GEN(), /* c2 - - I - - User defined Interrupts, external of INT n. */
330	IDTE_INT_GEN(), /* c3 - - I - - User defined Interrupts, external of INT n. */
331	IDTE_INT_GEN(), /* c4 - - I - - User defined Interrupts, external of INT n. */
332	IDTE_INT_GEN(), /* c5 - - I - - User defined Interrupts, external of INT n. */
333	IDTE_INT_GEN(), /* c6 - - I - - User defined Interrupts, external of INT n. */
334	IDTE_INT_GEN(), /* c7 - - I - - User defined Interrupts, external of INT n. */
335	IDTE_INT_GEN(), /* c8 - - I - - User defined Interrupts, external of INT n. */
336	IDTE_INT_GEN(), /* c9 - - I - - User defined Interrupts, external of INT n. */
337	IDTE_INT_GEN(), /* ca - - I - - User defined Interrupts, external of INT n. */
338	IDTE_INT_GEN(), /* cb - - I - - User defined Interrupts, external of INT n. */
339	IDTE_INT_GEN(), /* cc - - I - - User defined Interrupts, external of INT n. */
340	IDTE_INT_GEN(), /* cd - - I - - User defined Interrupts, external of INT n. */
341	IDTE_INT_GEN(), /* ce - - I - - User defined Interrupts, external of INT n. */
342	IDTE_INT_GEN(), /* cf - - I - - User defined Interrupts, external of INT n. */
343	IDTE_INT_GEN(), /* d0 - - I - - User defined Interrupts, external of INT n. */
344	IDTE_INT_GEN(), /* d1 - - I - - User defined Interrupts, external of INT n. */
345	IDTE_INT_GEN(), /* d2 - - I - - User defined Interrupts, external of INT n. */
346	IDTE_INT_GEN(), /* d3 - - I - - User defined Interrupts, external of INT n. */
347	IDTE_INT_GEN(), /* d4 - - I - - User defined Interrupts, external of INT n. */
348	IDTE_INT_GEN(), /* d5 - - I - - User defined Interrupts, external of INT n. */
349	IDTE_INT_GEN(), /* d6 - - I - - User defined Interrupts, external of INT n. */
350	IDTE_INT_GEN(), /* d7 - - I - - User defined Interrupts, external of INT n. */
351	IDTE_INT_GEN(), /* d8 - - I - - User defined Interrupts, external of INT n. */
352	IDTE_INT_GEN(), /* d9 - - I - - User defined Interrupts, external of INT n. */
353	IDTE_INT_GEN(), /* da - - I - - User defined Interrupts, external of INT n. */
354	IDTE_INT_GEN(), /* db - - I - - User defined Interrupts, external of INT n. */
355	IDTE_INT_GEN(), /* dc - - I - - User defined Interrupts, external of INT n. */
356	IDTE_INT_GEN(), /* dd - - I - - User defined Interrupts, external of INT n. */
357	IDTE_INT_GEN(), /* de - - I - - User defined Interrupts, external of INT n. */
358	IDTE_INT_GEN(), /* df - - I - - User defined Interrupts, external of INT n. */
359	IDTE_INT_GEN(), /* e0 - - I - - User defined Interrupts, external of INT n. */
360	IDTE_INT_GEN(), /* e1 - - I - - User defined Interrupts, external of INT n. */
361	IDTE_INT_GEN(), /* e2 - - I - - User defined Interrupts, external of INT n. */
362	IDTE_INT_GEN(), /* e3 - - I - - User defined Interrupts, external of INT n. */
363	IDTE_INT_GEN(), /* e4 - - I - - User defined Interrupts, external of INT n. */
364	IDTE_INT_GEN(), /* e5 - - I - - User defined Interrupts, external of INT n. */
365	IDTE_INT_GEN(), /* e6 - - I - - User defined Interrupts, external of INT n. */
366	IDTE_INT_GEN(), /* e7 - - I - - User defined Interrupts, external of INT n. */
367	IDTE_INT_GEN(), /* e8 - - I - - User defined Interrupts, external of INT n. */
368	IDTE_INT_GEN(), /* e9 - - I - - User defined Interrupts, external of INT n. */
369	IDTE_INT_GEN(), /* ea - - I - - User defined Interrupts, external of INT n. */
370	IDTE_INT_GEN(), /* eb - - I - - User defined Interrupts, external of INT n. */
371	IDTE_INT_GEN(), /* ec - - I - - User defined Interrupts, external of INT n. */
372	IDTE_INT_GEN(), /* ed - - I - - User defined Interrupts, external of INT n. */
373	IDTE_INT_GEN(), /* ee - - I - - User defined Interrupts, external of INT n. */
374	IDTE_INT_GEN(), /* ef - - I - - User defined Interrupts, external of INT n. */
375	IDTE_INT_GEN(), /* f0 - - I - - User defined Interrupts, external of INT n. */
376	IDTE_INT_GEN(), /* f1 - - I - - User defined Interrupts, external of INT n. */
377	IDTE_INT_GEN(), /* f2 - - I - - User defined Interrupts, external of INT n. */
378	IDTE_INT_GEN(), /* f3 - - I - - User defined Interrupts, external of INT n. */
379	IDTE_INT_GEN(), /* f4 - - I - - User defined Interrupts, external of INT n. */
380	IDTE_INT_GEN(), /* f5 - - I - - User defined Interrupts, external of INT n. */
381	IDTE_INT_GEN(), /* f6 - - I - - User defined Interrupts, external of INT n. */
382	IDTE_INT_GEN(), /* f7 - - I - - User defined Interrupts, external of INT n. */
383	IDTE_INT_GEN(), /* f8 - - I - - User defined Interrupts, external of INT n. */
384	IDTE_INT_GEN(), /* f9 - - I - - User defined Interrupts, external of INT n. */
385	IDTE_INT_GEN(), /* fa - - I - - User defined Interrupts, external of INT n. */
386	IDTE_INT_GEN(), /* fb - - I - - User defined Interrupts, external of INT n. */
387	IDTE_INT_GEN(), /* fc - - I - - User defined Interrupts, external of INT n. */
388	IDTE_INT_GEN(), /* fd - - I - - User defined Interrupts, external of INT n. */
389	IDTE_INT_GEN(), /* fe - - I - - User defined Interrupts, external of INT n. */
390	IDTE_INT_GEN(), /* ff - - I - - User defined Interrupts, external of INT n. */
391	#undef IDTE_TRAP
392	#undef IDTE_TRAP_GEN
393	#undef IDTE_INT
394	#undef IDTE_INT_GEN
395	#undef IDTE_TASK
396	#undef IDTE_UNUSED
397	#undef IDTE_RESERVED
398	};
399
400
401	/**
402	* Enable or disable tracking of Guest's IDT.
403	* @{
404	*/
405	#define TRPM_TRACK_GUEST_IDT_CHANGES
406	/** @} */
407
408	/**
409	* Enable or disable tracking of Shadow IDT.
410	* @{
411	*/
412	#define TRPM_TRACK_SHADOW_IDT_CHANGES
413	/** @} */
414
415	/** TRPM saved state version. */
416	#define TRPM_SAVED_STATE_VERSION 6
417
418
419	/*******************************************************************************
420	* Internal Functions *
421	*******************************************************************************/
422	static DECLCALLBACK(int) trpmR3Save(PVM pVM, PSSMHANDLE pSSM);
423	static DECLCALLBACK(int) trpmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t u32Version);
424	static DECLCALLBACK(int) trpmGuestIDTWriteHandler(PVM pVM, RTGCPTR GCPtr, void pvPtr, void pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser);
425
426
427	/**
428	* Initializes the Trap Manager
429	*
430	* @returns VBox status code.
431	* @param pVM The VM to operate on.
432	*/
433	TRPMR3DECL(int) TRPMR3Init(PVM pVM)
434	{
435	LogFlow(("TRPMR3Init\n"));
436	/*
437	* Assert sizes and alignments.
438	*/
439	AssertRelease(!(RT_OFFSETOF(VM, trpm.s) & 31));
440	AssertRelease(!(RT_OFFSETOF(VM, trpm.s.aIdt) & 15));
441	AssertRelease(sizeof(pVM->trpm.s) <= sizeof(pVM->trpm.padding));
442	AssertRelease(ELEMENTS(pVM->trpm.s.aGuestTrapHandler) == sizeof(pVM->trpm.s.au32IdtPatched)*8);
443	AssertRelease(ELEMENTS(pVM->trpm.s.aGuestTrapHandler) == sizeof(pVM->trpm.s.au32IdtDirty)*8);
444
445	/*
446	* Initialize members.
447	*/
448	pVM->trpm.s.offVM = RT_OFFSETOF(VM, trpm);
449	pVM->trpm.s.uActiveVector = ~0;
450	pVM->trpm.s.GuestIdtr.pIdt = ~0;
451	pVM->trpm.s.GCPtrIdt = ~0;
452	pVM->trpm.s.fDisableMonitoring = false;
453
454	/*
455	* Initialize the IDT.
456	* The handler addresses will be set in the TRPMR3Relocate() function.
457	*/
458	Assert(sizeof(pVM->trpm.s.aIdt) == sizeof(g_aIdt));
459	memcpy(&pVM->trpm.s.aIdt[0], &g_aIdt[0], sizeof(pVM->trpm.s.aIdt));
460
461	/*
462	* Register the saved state data unit.
463	*/
464	int rc = SSMR3RegisterInternal(pVM, "trpm", 1, TRPM_SAVED_STATE_VERSION, sizeof(TRPM),
465	NULL, trpmR3Save, NULL,
466	NULL, trpmR3Load, NULL);
467	if (VBOX_FAILURE(rc))
468	return rc;
469
470	/*
471	* Statistics.
472	*/
473	STAM_REG(pVM, &pVM->trpm.s.StatGCWriteGuestIDT, STAMTYPE_COUNTER, "/TRPM/GC/Write/Guest/IDT", STAMUNIT_OCCURENCES, "The number of writes to the Guest IDT.");
474
475	STAM_REG(pVM, &pVM->trpm.s.StatSyncIDT, STAMTYPE_PROFILE, "/PROF/TRPM/SyncIDT", STAMUNIT_TICKS_PER_CALL, "Profiling of TRPMR3SyncIDT().");
476
477	/* traps */
478	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x00], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/00", STAMUNIT_TICKS_PER_CALL, "#DE - Divide error.");
479	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x01], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/01", STAMUNIT_TICKS_PER_CALL, "#DB - Debug (single step and more).");
480	//STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x02], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/02", STAMUNIT_TICKS_PER_CALL, "NMI");
481	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x03], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/03", STAMUNIT_TICKS_PER_CALL, "#BP - Breakpoint.");
482	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x04], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/04", STAMUNIT_TICKS_PER_CALL, "#OF - Overflow.");
483	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x05], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/05", STAMUNIT_TICKS_PER_CALL, "#BR - Bound range exceeded.");
484	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x06], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/06", STAMUNIT_TICKS_PER_CALL, "#UD - Undefined opcode.");
485	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x07], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/07", STAMUNIT_TICKS_PER_CALL, "#NM - Device not available (FPU).");
486	//STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x08], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/08", STAMUNIT_TICKS_PER_CALL, "#DF - Double fault.");
487	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x09], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/09", STAMUNIT_TICKS_PER_CALL, "#?? - Coprocessor segment overrun (obsolete).");
488	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x0a], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/0a", STAMUNIT_TICKS_PER_CALL, "#TS - Task switch fault.");
489	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x0b], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/0b", STAMUNIT_TICKS_PER_CALL, "#NP - Segemnt not present.");
490	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x0c], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/0c", STAMUNIT_TICKS_PER_CALL, "#SS - Stack segment fault.");
491	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x0d], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/0d", STAMUNIT_TICKS_PER_CALL, "#GP - General protection fault.");
492	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x0e], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/0e", STAMUNIT_TICKS_PER_CALL, "#PF - Page fault.");
493	//STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x0f], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/0f", STAMUNIT_TICKS_PER_CALL, "Reserved.");
494	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x10], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/10", STAMUNIT_TICKS_PER_CALL, "#MF - Math fault..");
495	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x11], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/11", STAMUNIT_TICKS_PER_CALL, "#AC - Alignment check.");
496	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x12], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/12", STAMUNIT_TICKS_PER_CALL, "#MC - Machine check.");
497	STAM_REG(pVM, &pVM->trpm.s.aStatGCTraps[0x13], STAMTYPE_PROFILE_ADV, "/TRPM/GC/Traps/13", STAMUNIT_TICKS_PER_CALL, "#XF - SIMD Floating-Point Exception.");
498
499	#ifdef VBOX_WITH_STATISTICS
500	rc = MMHyperAlloc(pVM, sizeof(STAMCOUNTER) * 255, 8, MM_TAG_STAM, (void **)&pVM->trpm.s.paStatForwardedIRQR3);
501	AssertRCReturn(rc, rc);
502	pVM->trpm.s.paStatForwardedIRQGC = MMHyperR3ToGC(pVM, pVM->trpm.s.paStatForwardedIRQR3);
503	pVM->trpm.s.paStatForwardedIRQR0 = MMHyperR3ToR0(pVM, pVM->trpm.s.paStatForwardedIRQR3);
504	for (unsigned i = 0; i < 255; i++)
505	STAMR3RegisterF(pVM, &pVM->trpm.s.paStatForwardedIRQR3[i], STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, "Forwarded interrupts.",
506	i < 0x20 ? "/TRPM/ForwardRaw/TRAP/%02X" : "/TRPM/ForwardRaw/IRQ/%02X", i);
507	#endif
508	STAM_REG(pVM, &pVM->trpm.s.StatForwardFailNoHandler, STAMTYPE_COUNTER, "/TRPM/ForwardRaw/Fail/NoHandler", STAMUNIT_OCCURENCES, "Failure to forward interrupt in raw mode.");
509	STAM_REG(pVM, &pVM->trpm.s.StatForwardFailPatchAddr, STAMTYPE_COUNTER, "/TRPM/ForwardRaw/Fail/PatchAddr", STAMUNIT_OCCURENCES, "Failure to forward interrupt in raw mode.");
510
511	STAM_REG(pVM, &pVM->trpm.s.StatForwardFailGC, STAMTYPE_COUNTER, "/TRPM/ForwardRaw/Fail/GC", STAMUNIT_OCCURENCES, "Failure to forward interrupt in raw mode.");
512	STAM_REG(pVM, &pVM->trpm.s.StatForwardFailHC, STAMTYPE_COUNTER, "/TRPM/ForwardRaw/Fail/HC", STAMUNIT_OCCURENCES, "Failure to forward interrupt in raw mode.");
513
514	/*
515	* Default action when entering raw mode for the first time
516	*/
517	VM_FF_SET(pVM, VM_FF_TRPM_SYNC_IDT);
518	return 0;
519	}
520
521
522	/**
523	* Applies relocations to data and code managed by this component.
524	*
525	* This function will be called at init and whenever the VMM need
526	* to relocate itself inside the GC.
527	*
528	* @param pVM The VM handle.
529	* @param offDelta Relocation delta relative to old location.
530	*/
531	TRPMR3DECL(void) TRPMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
532	{
533	LogFlow(("TRPMR3Relocate\n"));
534	/*
535	* Get the trap handler addresses.
536	*
537	* If VMMGC.gc is screwed, so are we. We'll assert here since it elsewise
538	* would make init order impossible if we should assert the presence of these
539	* exports in TRPMR3Init().
540	*/
541	RTGCPTR aGCPtrs[TRPM_HANDLER_MAX] = {0};
542	int rc;
543	rc = PDMR3GetSymbolGC(pVM, VMMGC_MAIN_MODULE_NAME, "TRPMGCHandlerInterupt", &aGCPtrs[TRPM_HANDLER_INT]);
544	AssertReleaseMsgRC(rc, ("Couldn't find TRPMGCHandlerInterupt in VMMGC.gc!\n"));
545
546	rc = PDMR3GetSymbolGC(pVM, VMMGC_MAIN_MODULE_NAME, "TRPMGCHandlerGeneric", &aGCPtrs[TRPM_HANDLER_TRAP]);
547	AssertReleaseMsgRC(rc, ("Couldn't find TRPMGCHandlerGeneric in VMMGC.gc!\n"));
548
549	rc = PDMR3GetSymbolGC(pVM, VMMGC_MAIN_MODULE_NAME, "TRPMGCHandlerTrap08", &aGCPtrs[TRPM_HANDLER_TRAP_08]);
550	AssertReleaseMsgRC(rc, ("Couldn't find TRPMGCHandlerTrap08 in VMMGC.gc!\n"));
551
552	rc = PDMR3GetSymbolGC(pVM, VMMGC_MAIN_MODULE_NAME, "TRPMGCHandlerTrap12", &aGCPtrs[TRPM_HANDLER_TRAP_12]);
553	AssertReleaseMsgRC(rc, ("Couldn't find TRPMGCHandlerTrap12 in VMMGC.gc!\n"));
554
555	RTSEL SelCS = CPUMGetHyperCS(pVM);
556
557	/*
558	* Iterate the idt and set the addresses.
559	*/
560	PVBOXIDTE pIdte = &pVM->trpm.s.aIdt[0];
561	PVBOXIDTE_GENERIC pIdteTemplate = &g_aIdt[0];
562	for (unsigned i = 0; i < ELEMENTS(pVM->trpm.s.aIdt); i++, pIdte++, pIdteTemplate++)
563	{
564	if ( pIdte->Gen.u1Present
565	&& !ASMBitTest(&pVM->trpm.s.au32IdtPatched[0], i)
566	)
567	{
568	Assert(pIdteTemplate->u16OffsetLow < TRPM_HANDLER_MAX);
569	RTGCPTR Offset = aGCPtrs[pIdteTemplate->u16OffsetLow];
570	switch (pIdteTemplate->u16OffsetLow)
571	{
572	/*
573	* Generic handlers have different entrypoints for each possible
574	* vector number. These entrypoints makes a sort of an array with
575	* 8 byte entries where the vector number is the index.
576	* See TRPMGCHandlersA.asm for details.
577	*/
578	case TRPM_HANDLER_INT:
579	case TRPM_HANDLER_TRAP:
580	Offset += i * 8;
581	break;
582	case TRPM_HANDLER_TRAP_12:
583	break;
584	case TRPM_HANDLER_TRAP_08:
585	/* Handle #DF Task Gate in special way. */
586	pIdte->Gen.u16SegSel = SELMGetTrap8Selector(pVM);
587	pIdte->Gen.u16OffsetLow = 0;
588	pIdte->Gen.u16OffsetHigh = 0;
589	SELMSetTrap8EIP(pVM, Offset);
590	continue;
591	}
592	/* (non-task gates only ) */
593	pIdte->Gen.u16OffsetLow = Offset & 0xffff;
594	pIdte->Gen.u16OffsetHigh = Offset >> 16;
595	pIdte->Gen.u16SegSel = SelCS;
596	}
597	}
598
599	/*
600	* Update IDTR (limit is including!).
601	*/
602	CPUMSetHyperIDTR(pVM, VM_GUEST_ADDR(pVM, &pVM->trpm.s.aIdt[0]), sizeof(pVM->trpm.s.aIdt)-1);
603
604	if (!pVM->trpm.s.fDisableMonitoring)
605	{
606	#ifdef TRPM_TRACK_SHADOW_IDT_CHANGES
607	if (pVM->trpm.s.GCPtrIdt != ~0U)
608	{
609	rc = PGMHandlerVirtualDeregister(pVM, pVM->trpm.s.GCPtrIdt);
610	AssertRC(rc);
611	}
612	pVM->trpm.s.GCPtrIdt = VM_GUEST_ADDR(pVM, &pVM->trpm.s.aIdt[0]);
613	rc = PGMR3HandlerVirtualRegister(pVM, PGMVIRTHANDLERTYPE_HYPERVISOR, pVM->trpm.s.GCPtrIdt, pVM->trpm.s.GCPtrIdt + sizeof(pVM->trpm.s.aIdt) - 1,
614	0, 0, "trpmgcShadowIDTWriteHandler", 0, "Shadow IDT write access handler");
615	AssertRC(rc);
616	#endif
617	}
618
619	/* Relocate IDT handlers for forwarding guest traps/interrupts. */
620	for (uint32_t iTrap = 0; iTrap < ELEMENTS(pVM->trpm.s.aGuestTrapHandler); iTrap++)
621	{
622	if (pVM->trpm.s.aGuestTrapHandler[iTrap])
623	{
624	Log(("TRPMR3Relocate: iGate=%2X Handler %VGv -> %VGv\n", iTrap, pVM->trpm.s.aGuestTrapHandler[iTrap], pVM->trpm.s.aGuestTrapHandler[iTrap] + offDelta));
625	pVM->trpm.s.aGuestTrapHandler[iTrap] += offDelta;
626	}
627
628	if (ASMBitTest(&pVM->trpm.s.au32IdtPatched[0], iTrap))
629	{
630	PVBOXIDTE pIdte = &pVM->trpm.s.aIdt[iTrap];
631	RTGCPTR pHandler = (pIdte->Gen.u16OffsetHigh << 16) \| pIdte->Gen.u16OffsetLow;
632
633	Log(("TRPMR3Relocate: *iGate=%2X Handler %VGv -> %VGv\n", iTrap, pHandler, pHandler + offDelta));
634	pHandler += offDelta;
635
636	pIdte->Gen.u16OffsetHigh = pHandler >> 16;
637	pIdte->Gen.u16OffsetLow = pHandler & 0xFFFF;
638
639	}
640	}
641
642	pVM->trpm.s.paStatForwardedIRQGC += offDelta;
643	pVM->trpm.s.paStatForwardedIRQR0 = MMHyperR3ToR0(pVM, pVM->trpm.s.paStatForwardedIRQR3);
644	}
645
646
647	/**
648	* Terminates the Trap Manager
649	*
650	* @returns VBox status code.
651	* @param pVM The VM to operate on.
652	*/
653	TRPMR3DECL(int) TRPMR3Term(PVM pVM)
654	{
655	NOREF(pVM);
656	return 0;
657	}
658
659
660	/**
661	* The VM is being reset.
662	*
663	* For the TRPM component this means that any IDT write monitors
664	* needs to be removed, any pending trap cleared, and the IDT reset.
665	*
666	* @param pVM VM handle.
667	*/
668	TRPMR3DECL(void) TRPMR3Reset(PVM pVM)
669	{
670	/*
671	* Deregister any virtual handlers.
672	*/
673	#ifdef TRPM_TRACK_GUEST_IDT_CHANGES
674	if (pVM->trpm.s.GuestIdtr.pIdt != ~0U)
675	{
676	int rc = PGMHandlerVirtualDeregister(pVM, pVM->trpm.s.GuestIdtr.pIdt);
677	AssertRC(rc);
678	pVM->trpm.s.GuestIdtr.pIdt = ~0U;
679	}
680	pVM->trpm.s.GuestIdtr.cbIdt = 0;
681	#endif
682
683	/*
684	* Reinitialize other members calling the relocator to get things right.
685	*/
686	pVM->trpm.s.uActiveVector = ~0;
687	memcpy(&pVM->trpm.s.aIdt[0], &g_aIdt[0], sizeof(pVM->trpm.s.aIdt));
688	memset(pVM->trpm.s.aGuestTrapHandler, 0, sizeof(pVM->trpm.s.aGuestTrapHandler));
689	TRPMR3Relocate(pVM, 0);
690
691	/*
692	* Default action when entering raw mode for the first time
693	*/
694	VM_FF_SET(pVM, VM_FF_TRPM_SYNC_IDT);
695	}
696
697
698	/**
699	* Execute state save operation.
700	*
701	* @returns VBox status code.
702	* @param pVM VM Handle.
703	* @param pSSM SSM operation handle.
704	*/
705	static DECLCALLBACK(int) trpmR3Save(PVM pVM, PSSMHANDLE pSSM)
706	{
707	LogFlow(("trpmR3Save:\n"));
708
709	/*
710	* Active and saved traps.
711	*/
712	PTRPM pTrpm = &pVM->trpm.s;
713	SSMR3PutUInt(pSSM, pTrpm->uActiveVector);
714	SSMR3PutUInt(pSSM, pTrpm->fActiveSoftwareInterrupt);
715	SSMR3PutGCUInt(pSSM, pTrpm->uActiveErrorCode);
716	SSMR3PutGCUIntPtr(pSSM, pTrpm->uActiveCR2);
717	SSMR3PutGCUInt(pSSM, pTrpm->uSavedVector);
718	SSMR3PutUInt(pSSM, pTrpm->fSavedSoftwareInterrupt);
719	SSMR3PutGCUInt(pSSM, pTrpm->uSavedErrorCode);
720	SSMR3PutGCUIntPtr(pSSM, pTrpm->uSavedCR2);
721	SSMR3PutGCUInt(pSSM, pTrpm->uPrevVector);
722	SSMR3PutGCUInt(pSSM, pTrpm->fDisableMonitoring);
723	SSMR3PutUInt(pSSM, VM_FF_ISSET(pVM, VM_FF_TRPM_SYNC_IDT));
724	SSMR3PutMem(pSSM, &pTrpm->au32IdtPatched[0], sizeof(pTrpm->au32IdtPatched));
725	SSMR3PutMem(pSSM, &pTrpm->au32IdtDirty[0], sizeof(pTrpm->au32IdtDirty));
726	SSMR3PutU32(pSSM, ~0); /* separator. */
727
728	/*
729	* Save any trampoline gates.
730	*/
731	for (uint32_t iTrap = 0; iTrap < ELEMENTS(pTrpm->aGuestTrapHandler); iTrap++)
732	{
733	if (pTrpm->aGuestTrapHandler[iTrap])
734	{
735	SSMR3PutU32(pSSM, iTrap);
736	SSMR3PutGCPtr(pSSM, pTrpm->aGuestTrapHandler[iTrap]);
737	SSMR3PutMem(pSSM, &pTrpm->aIdt[iTrap], sizeof(pTrpm->aIdt[iTrap]));
738	}
739	}
740
741	return SSMR3PutU32(pSSM, ~0); /* terminator */
742	}
743
744
745	/**
746	* Execute state load operation.
747	*
748	* @returns VBox status code.
749	* @param pVM VM Handle.
750	* @param pSSM SSM operation handle.
751	* @param u32Version Data layout version.
752	*/
753	static DECLCALLBACK(int) trpmR3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t u32Version)
754	{
755	LogFlow(("trpmR3Load:\n"));
756
757	/*
758	* Validate version.
759	*/
760	if (u32Version != TRPM_SAVED_STATE_VERSION)
761	{
762	Log(("trpmR3Load: Invalid version u32Version=%d!\n", u32Version));
763	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
764	}
765
766	/*
767	* Call the reset function to kick out any handled gates and other potential trouble.
768	*/
769	TRPMR3Reset(pVM);
770
771	/*
772	* Active and saved traps.
773	*/
774	PTRPM pTrpm = &pVM->trpm.s;
775	SSMR3GetUInt(pSSM, &pTrpm->uActiveVector);
776	SSMR3GetUInt(pSSM, &pTrpm->fActiveSoftwareInterrupt);
777	SSMR3GetGCUInt(pSSM, &pTrpm->uActiveErrorCode);
778	SSMR3GetGCUIntPtr(pSSM, &pTrpm->uActiveCR2);
779	SSMR3GetGCUInt(pSSM, &pTrpm->uSavedVector);
780	SSMR3GetUInt(pSSM, &pTrpm->fSavedSoftwareInterrupt);
781	SSMR3GetGCUInt(pSSM, &pTrpm->uSavedErrorCode);
782	SSMR3GetGCUIntPtr(pSSM, &pTrpm->uSavedCR2);
783	SSMR3GetGCUInt(pSSM, &pTrpm->uPrevVector);
784	SSMR3GetGCUInt(pSSM, &pTrpm->fDisableMonitoring);
785
786	RTUINT fSyncIDT;
787	int rc = SSMR3GetUInt(pSSM, &fSyncIDT);
788	if (VBOX_FAILURE(rc))
789	return rc;
790	if (fSyncIDT & ~1)
791	{
792	AssertMsgFailed(("fSyncIDT=%#x\n", fSyncIDT));
793	return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
794	}
795	if (fSyncIDT)
796	VM_FF_SET(pVM, VM_FF_TRPM_SYNC_IDT);
797	/* else: cleared by reset call above. */
798
799	SSMR3GetMem(pSSM, &pTrpm->au32IdtPatched[0], sizeof(pTrpm->au32IdtPatched));
800	SSMR3GetMem(pSSM, &pTrpm->au32IdtDirty[0], sizeof(pTrpm->au32IdtDirty));
801
802	/* check the separator */
803	uint32_t u32Sep;
804	rc = SSMR3GetU32(pSSM, &u32Sep);
805	if (VBOX_FAILURE(rc))
806	return rc;
807	if (u32Sep != (uint32_t)~0)
808	{
809	AssertMsgFailed(("u32Sep=%#x (first)\n", u32Sep));
810	return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
811	}
812
813	/*
814	* Restore any trampoline gates.
815	*/
816	for (;;)
817	{
818	/* gate number / terminator */
819	uint32_t iTrap;
820	rc = SSMR3GetU32(pSSM, &iTrap);
821	if (VBOX_FAILURE(rc))
822	return rc;
823	if (iTrap == (uint32_t)~0)
824	break;
825	if ( iTrap >= ELEMENTS(pTrpm->aIdt)
826	\|\| pTrpm->aGuestTrapHandler[iTrap])
827	{
828	AssertMsgFailed(("iTrap=%#x\n", iTrap));
829	return VERR_SSM_DATA_UNIT_FORMAT_CHANGED;
830	}
831
832	/* restore the IDT entry. */
833	RTGCPTR GCPtrHandler;
834	SSMR3GetGCPtr(pSSM, &GCPtrHandler);
835	VBOXIDTE Idte;
836	rc = SSMR3GetMem(pSSM, &Idte, sizeof(Idte));
837	if (VBOX_FAILURE(rc))
838	return rc;
839	Assert(GCPtrHandler);
840	pTrpm->aIdt[iTrap] = Idte;
841	}
842
843	return VINF_SUCCESS;
844	}
845
846
847	/**
848	* Check if gate handlers were updated
849	* (callback for the VM_FF_TRPM_SYNC_IDT forced action).
850	*
851	* @returns VBox status code.
852	* @param pVM The VM handle.
853	*/
854	TRPMR3DECL(int) TRPMR3SyncIDT(PVM pVM)
855	{
856	STAM_PROFILE_START(&pVM->trpm.s.StatSyncIDT, a);
857	const bool fRawRing0 = EMIsRawRing0Enabled(pVM);
858	int rc;
859
860	if (pVM->trpm.s.fDisableMonitoring)
861	{
862	VM_FF_CLEAR(pVM, VM_FF_TRPM_SYNC_IDT);
863	return VINF_SUCCESS; /* Nothing to do */
864	}
865
866	if (fRawRing0 && CSAMIsEnabled(pVM))
867	{
868	rc = CSAMR3CheckGates(pVM, 0, 256); /* check all gates */
869	AssertRCReturn(rc, rc);
870	}
871
872	/*
873	* Get the IDTR.
874	*/
875	VBOXIDTR IDTR;
876	IDTR.pIdt = CPUMGetGuestIDTR(pVM, &IDTR.cbIdt);
877	if (!IDTR.cbIdt)
878	{
879	Log(("No IDT entries...\n"));
880	return DBGFSTOP(pVM);
881	}
882
883	#ifdef TRPM_TRACK_GUEST_IDT_CHANGES
884	/*
885	* Check if Guest's IDTR has changed.
886	*/
887	if ( IDTR.pIdt != pVM->trpm.s.GuestIdtr.pIdt
888	\|\| IDTR.cbIdt != pVM->trpm.s.GuestIdtr.cbIdt)
889	{
890	Log(("TRPMR3UpdateFromCPUM: Guest's IDT is changed to pIdt=%08X cbIdt=%08X\n", IDTR.pIdt, IDTR.cbIdt));
891
892	/*
893	* [Re]Register write virtual handler for guest's IDT.
894	*/
895	if (pVM->trpm.s.GuestIdtr.pIdt != ~0U)
896	{
897	rc = PGMHandlerVirtualDeregister(pVM, pVM->trpm.s.GuestIdtr.pIdt);
898	AssertRCReturn(rc, rc);
899	}
900	/* limit is including */
901	rc = PGMR3HandlerVirtualRegister(pVM, PGMVIRTHANDLERTYPE_WRITE, IDTR.pIdt, IDTR.pIdt + IDTR.cbIdt /* already inclusive */,
902	0, trpmGuestIDTWriteHandler, "trpmgcGuestIDTWriteHandler", 0, "Guest IDT write access handler");
903	AssertRCReturn(rc, rc);
904
905	/* Update saved Guest IDTR. */
906	pVM->trpm.s.GuestIdtr = IDTR;
907	}
908	#endif
909
910	/*
911	* Sync the interrupt gate.
912	* Should probably check/sync the others too, but for now we'll handle that in #GP.
913	*/
914	X86DESC Idte3;
915	rc = PGMPhysReadGCPtr(pVM, &Idte3, IDTR.pIdt + sizeof(Idte3) * 3, sizeof(Idte3));
916	if (VBOX_FAILURE(rc))
917	{
918	AssertMsgRC(rc, ("Failed to read IDT[3]! rc=%Vrc\n", rc));
919	return DBGFSTOP(pVM);
920	}
921	AssertRCReturn(rc, rc);
922	if (fRawRing0)
923	pVM->trpm.s.aIdt[3].Gen.u2DPL = RT_MAX(Idte3.Gen.u2Dpl, 1);
924	else
925	pVM->trpm.s.aIdt[3].Gen.u2DPL = Idte3.Gen.u2Dpl;
926
927	/*
928	* Clear the FF and we're done.
929	*/
930	VM_FF_CLEAR(pVM, VM_FF_TRPM_SYNC_IDT);
931	STAM_PROFILE_STOP(&pVM->trpm.s.StatSyncIDT, a);
932	return VINF_SUCCESS;
933	}
934
935
936	/**
937	* Disable IDT monitoring and syncing
938	*
939	* @param pVM The VM to operate on.
940	*/
941	TRPMR3DECL(void) TRPMR3DisableMonitoring(PVM pVM)
942	{
943	/*
944	* Deregister any virtual handlers.
945	*/
946	#ifdef TRPM_TRACK_GUEST_IDT_CHANGES
947	if (pVM->trpm.s.GuestIdtr.pIdt != ~0U)
948	{
949	int rc = PGMHandlerVirtualDeregister(pVM, pVM->trpm.s.GuestIdtr.pIdt);
950	AssertRC(rc);
951	pVM->trpm.s.GuestIdtr.pIdt = ~0U;
952	}
953	pVM->trpm.s.GuestIdtr.cbIdt = 0;
954	#endif
955
956	#ifdef TRPM_TRACK_SHADOW_IDT_CHANGES
957	if (pVM->trpm.s.GCPtrIdt != ~0U)
958	{
959	int rc = PGMHandlerVirtualDeregister(pVM, pVM->trpm.s.GCPtrIdt);
960	AssertRC(rc);
961	pVM->trpm.s.GCPtrIdt = ~0U;
962	}
963	#endif
964
965	VM_FF_CLEAR(pVM, VM_FF_TRPM_SYNC_IDT);
966
967	pVM->trpm.s.fDisableMonitoring = true;
968	}
969
970
971	/**
972	* \#PF Handler callback for virtual access handler ranges.
973	*
974	* Important to realize that a physical page in a range can have aliases, and
975	* for ALL and WRITE handlers these will also trigger.
976	*
977	* @returns VINF_SUCCESS if the handler have carried out the operation.
978	* @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
979	* @param pVM VM Handle.
980	* @param GCPtr The virtual address the guest is writing to. (not correct if it's an alias!)
981	* @param pvPtr The HC mapping of that address.
982	* @param pvBuf What the guest is reading/writing.
983	* @param cbBuf How much it's reading/writing.
984	* @param enmAccessType The access type.
985	* @param pvUser User argument.
986	*/
987	static DECLCALLBACK(int) trpmGuestIDTWriteHandler(PVM pVM, RTGCPTR GCPtr, void pvPtr, void pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser)
988	{
989	Assert(enmAccessType == PGMACCESSTYPE_WRITE);
990	Log(("trpmGuestIDTWriteHandler: write to %VGv size %d\n", GCPtr, cbBuf));
991	VM_FF_SET(pVM, VM_FF_TRPM_SYNC_IDT);
992	return VINF_PGM_HANDLER_DO_DEFAULT;
993	}
994
995
996	#if 0 /* obsolete */
997	/**
998	* Activate guest trap gate handler
999	* Used for setting up trap gates used for kernel calls.
1000	*
1001	* @returns VBox status code.
1002	* @param pVM The VM to operate on.
1003	* @param iTrap Interrupt/trap number.
1004	*/
1005	TRPMR3DECL(int) TRPMR3EnableGuestTrapHandler(PVM pVM, unsigned iTrap)
1006	{
1007	/*
1008	* Validate.
1009	*/
1010	if (!EMIsRawRing0Enabled(pVM))
1011	{
1012	AssertMsgFailed(("Enabling interrupt gates only works when raw ring 0 is enabled\n"));
1013	return VINF_SUCCESS;
1014	}
1015	if (iTrap < TRPM_HANDLER_INT_BASE \|\| iTrap >= ELEMENTS(pVM->trpm.s.aIdt))
1016	{
1017	AssertMsg(iTrap < TRPM_HANDLER_INT_BASE, ("Illegal gate number %d!\n", iTrap));
1018	return VERR_INVALID_PARAMETER;
1019	}
1020
1021	uint16_t cbIDT;
1022	RTGCPTR GCPtrIDT = CPUMGetGuestIDTR(pVM, &cbIDT);
1023	if (iTrap * sizeof(VBOXIDTE) >= cbIDT)
1024	return VERR_INVALID_PARAMETER; /* Silently ignore out of range requests. */
1025
1026	/*
1027	* Read the guest IDT entry.
1028	*/
1029	VBOXIDTE GuestIdte;
1030	int rc = PGMPhysReadGCPtr(pVM, &GuestIdte, GCPtrIDT + iTrap * sizeof(GuestIdte), sizeof(GuestIdte));
1031	if (VBOX_FAILURE(rc))
1032	{
1033	AssertMsgRC(rc, ("Failed to read IDTE! rc=%Vrc\n", rc));
1034	return rc;
1035	}
1036
1037	if ( GuestIdte.Gen.u1Present
1038	&& GuestIdte.Gen.u5Type2 == VBOX_IDTE_TYPE2_TRAP_32
1039	&& GuestIdte.Gen.u2DPL == 3)
1040	{
1041	LogFlow(("TRPMR3SetHandler: %X %04X:%04X%04X gate=%d dpl=%d present=%d\n", iTrap,
1042	GuestIdte.Gen.u16SegSel, GuestIdte.Gen.u16OffsetHigh, GuestIdte.Gen.u16OffsetLow,
1043	GuestIdte.Gen.u5Type2, GuestIdte.Gen.u2DPL, GuestIdte.Gen.u1Present));
1044
1045	PVBOXIDTE pIdte = &pVM->trpm.s.aIdt[iTrap];
1046	GuestIdte.Gen.u16SegSel \|= 1; // ring 1
1047	*pIdte = GuestIdte;
1048	}
1049
1050	return VINF_SUCCESS;
1051	}
1052	#endif
1053
1054
1055	/**
1056	* Check if address is a gate handler (interrupt or trap).
1057	*
1058	* @returns gate nr or ~0 is not found
1059	*
1060	* @param pVM VM handle.
1061	* @param GCPtr GC address to check.
1062	*/
1063	TRPMR3DECL(uint32_t) TRPMR3QueryGateByHandler(PVM pVM, RTGCPTR GCPtr)
1064	{
1065	for (uint32_t iTrap = 0; iTrap < ELEMENTS(pVM->trpm.s.aGuestTrapHandler); iTrap++)
1066	{
1067	if (pVM->trpm.s.aGuestTrapHandler[iTrap] == GCPtr)
1068	return iTrap;
1069
1070	/* redundant */
1071	if (ASMBitTest(&pVM->trpm.s.au32IdtPatched[0], iTrap))
1072	{
1073	PVBOXIDTE pIdte = &pVM->trpm.s.aIdt[iTrap];
1074	RTGCPTR pHandler = (pIdte->Gen.u16OffsetHigh << 16) \| pIdte->Gen.u16OffsetLow;
1075
1076	if (pHandler == GCPtr)
1077	return iTrap;
1078	}
1079	}
1080	return ~0;
1081	}
1082
1083
1084	/**
1085	* Marks IDT entry as dirty
1086	*
1087	* @returns Guest trap handler address or TRPM_INVALID_HANDLER if none installed
1088	* @param pVM The VM to operate on.
1089	* @param iTrap Interrupt/trap number.
1090	* @param fSetDirty Set or clear
1091	*/
1092	TRPMR3DECL(int) TRPMR3SetGuestTrapHandlerDirty(PVM pVM, unsigned iGate, bool fSetDirty)
1093	{
1094	AssertReturn(iGate < ELEMENTS(pVM->trpm.s.aIdt), VERR_INVALID_PARAMETER);
1095
1096	if (fSetDirty)
1097	ASMBitSet(&pVM->trpm.s.au32IdtDirty[0], iGate);
1098	else
1099	ASMBitClear(&pVM->trpm.s.au32IdtDirty[0], iGate);
1100
1101	return VINF_SUCCESS;
1102	}
1103
1104
1105	/**
1106	* Checks if IDT entry is dirty
1107	*
1108	* @returns dirty status
1109	* @param pVM The VM to operate on.
1110	* @param iTrap Interrupt/trap number.
1111	*/
1112	TRPMR3DECL(bool) TRPMR3IsGuestTrapHandlerDirty(PVM pVM, unsigned iGate)
1113	{
1114	return ASMBitTest(&pVM->trpm.s.au32IdtDirty[0], iGate);
1115	}
1116
1117
1118	/**
1119	* Get guest trap/interrupt gate handler
1120	*
1121	* @returns Guest trap handler address or TRPM_INVALID_HANDLER if none installed
1122	* @param pVM The VM to operate on.
1123	* @param iTrap Interrupt/trap number.
1124	*/
1125	TRPMR3DECL(RTGCPTR) TRPMR3GetGuestTrapHandler(PVM pVM, unsigned iTrap)
1126	{
1127	AssertReturn(iTrap < ELEMENTS(pVM->trpm.s.aIdt), TRPM_INVALID_HANDLER);
1128
1129	return pVM->trpm.s.aGuestTrapHandler[iTrap];
1130	}
1131
1132
1133	/**
1134	* Set guest trap/interrupt gate handler
1135	* Used for setting up trap gates used for kernel calls.
1136	*
1137	* @returns VBox status code.
1138	* @param pVM The VM to operate on.
1139	* @param iTrap Interrupt/trap number.
1140	* @param pHandler GC handler pointer
1141	*/
1142	TRPMR3DECL(int) TRPMR3SetGuestTrapHandler(PVM pVM, unsigned iTrap, RTGCPTR pHandler)
1143	{
1144	/*
1145	* Validate.
1146	*/
1147	if (iTrap >= ELEMENTS(pVM->trpm.s.aIdt))
1148	{
1149	AssertMsg(iTrap < TRPM_HANDLER_INT_BASE, ("Illegal gate number %d!\n", iTrap));
1150	return VERR_INVALID_PARAMETER;
1151	}
1152
1153	AssertReturn(pHandler == TRPM_INVALID_HANDLER \|\| PATMIsPatchGCAddr(pVM, pHandler), VERR_INVALID_PARAMETER);
1154
1155	uint16_t cbIDT;
1156	RTGCPTR GCPtrIDT = CPUMGetGuestIDTR(pVM, &cbIDT);
1157	if (iTrap * sizeof(VBOXIDTE) >= cbIDT)
1158	return VERR_INVALID_PARAMETER; /* Silently ignore out of range requests. */
1159
1160	if (pHandler == TRPM_INVALID_HANDLER)
1161	{
1162	/* clear trap handler */
1163	Log(("TRPMR3SetGuestTrapHandler: clear handler %x\n", iTrap));
1164	pVM->trpm.s.aGuestTrapHandler[iTrap] = TRPM_INVALID_HANDLER;
1165	return VINF_SUCCESS;
1166	}
1167
1168	/*
1169	* Read the guest IDT entry.
1170	*/
1171	VBOXIDTE GuestIdte;
1172	int rc = PGMPhysReadGCPtr(pVM, &GuestIdte, GCPtrIDT + iTrap * sizeof(GuestIdte), sizeof(GuestIdte));
1173	if (VBOX_FAILURE(rc))
1174	{
1175	AssertMsgRC(rc, ("Failed to read IDTE! rc=%Vrc\n", rc));
1176	return rc;
1177	}
1178
1179	if (EMIsRawRing0Enabled(pVM))
1180	{
1181	/*
1182	* Only replace the 0x2E handler; others need to be called indirectly via a trampoline in our GC handlers
1183	*/
1184	# ifdef _WIN32 /** @todo Solve this in a proper manner. see defect #1186 */
1185	if (iTrap == 0x2E \|\| iTrap == 0x80)
1186	# else
1187	if (iTrap == 0x80)
1188	# endif
1189	{
1190	if ( GuestIdte.Gen.u1Present
1191	&& ( GuestIdte.Gen.u5Type2 == VBOX_IDTE_TYPE2_TRAP_32
1192	\|\| GuestIdte.Gen.u5Type2 == VBOX_IDTE_TYPE2_INT_32)
1193	&& GuestIdte.Gen.u2DPL == 3)
1194	{
1195	PVBOXIDTE pIdte = &pVM->trpm.s.aIdt[iTrap];
1196
1197	GuestIdte.Gen.u5Type2 = VBOX_IDTE_TYPE2_TRAP_32;
1198	GuestIdte.Gen.u16OffsetHigh = pHandler >> 16;
1199	GuestIdte.Gen.u16OffsetLow = pHandler & 0xFFFF;
1200	GuestIdte.Gen.u16SegSel \|= 1; //ring 1
1201	*pIdte = GuestIdte;
1202
1203	/* Mark it for relocation purposes. */
1204	ASMBitSet(&pVM->trpm.s.au32IdtPatched[0], iTrap);
1205
1206	/* Also store it in our guest trap array. */
1207	pVM->trpm.s.aGuestTrapHandler[iTrap] = pHandler;
1208
1209	Log(("Setting trap handler %d to %08X\n", iTrap, pHandler));
1210	return VINF_SUCCESS;
1211	}
1212	/* ok, let's try to install a trampoline handler then. */
1213	}
1214	}
1215
1216	if ( GuestIdte.Gen.u1Present
1217	&& ( GuestIdte.Gen.u5Type2 == VBOX_IDTE_TYPE2_TRAP_32
1218	\|\| GuestIdte.Gen.u5Type2 == VBOX_IDTE_TYPE2_INT_32)
1219	&& (GuestIdte.Gen.u2DPL == 3 \|\| GuestIdte.Gen.u2DPL == 0))
1220	{
1221	/*
1222	* Save handler which can be used for a trampoline call inside the GC
1223	*/
1224	Log(("Setting trap handler %d to %08X\n", iTrap, pHandler));
1225	pVM->trpm.s.aGuestTrapHandler[iTrap] = pHandler;
1226	return VINF_SUCCESS;
1227	}
1228	return VERR_INVALID_PARAMETER;
1229	}
1230
1231
1232	/**
1233	* Clear interrupt gate handler (reset to default handler)
1234	*
1235	* @returns VBox status code.
1236	* @param pVM The VM to operate on.
1237	* @param iTrap Trap/interrupt gate number.
1238	*/
1239	TRPMR3DECL(int) TRPMR3ClearHandler(PVM pVM, unsigned iTrap)
1240	{
1241	/** @todo cleanup TRPMR3ClearHandler()! */
1242	RTGCPTR aGCPtrs[TRPM_HANDLER_MAX];
1243	int rc;
1244
1245	memset(aGCPtrs, 0, sizeof(aGCPtrs));
1246
1247	rc = PDMR3GetSymbolGC(pVM, VMMGC_MAIN_MODULE_NAME, "TRPMGCHandlerInterupt", &aGCPtrs[TRPM_HANDLER_INT]);
1248	AssertReleaseMsgRC(rc, ("Couldn't find TRPMGCHandlerInterupt in VMMGC.gc!\n"));
1249
1250	if ( iTrap < TRPM_HANDLER_INT_BASE
1251	\|\| iTrap >= ELEMENTS(pVM->trpm.s.aIdt))
1252	{
1253	AssertMsg(iTrap < TRPM_HANDLER_INT_BASE, ("Illegal gate number %#x!\n", iTrap));
1254	return VERR_INVALID_PARAMETER;
1255	}
1256	memcpy(&pVM->trpm.s.aIdt[iTrap], &g_aIdt[iTrap], sizeof(pVM->trpm.s.aIdt[0]));
1257
1258	RTSEL SelCS = CPUMGetHyperCS(pVM);
1259	PVBOXIDTE pIdte = &pVM->trpm.s.aIdt[iTrap];
1260	PVBOXIDTE_GENERIC pIdteTemplate = &g_aIdt[iTrap];
1261	if (pIdte->Gen.u1Present)
1262	{
1263	Assert(pIdteTemplate->u16OffsetLow == TRPM_HANDLER_INT);
1264	Assert(sizeof(RTGCPTR) <= sizeof(aGCPtrs[0]));
1265	RTGCPTR Offset = (RTGCPTR)aGCPtrs[pIdteTemplate->u16OffsetLow];
1266
1267	/*
1268	* Generic handlers have different entrypoints for each possible
1269	* vector number. These entrypoints make a sort of an array with
1270	* 8 byte entries where the vector number is the index.
1271	* See TRPMGCHandlersA.asm for details.
1272	*/
1273	Offset += iTrap * 8;
1274
1275	if (pIdte->Gen.u5Type2 != VBOX_IDTE_TYPE2_TASK)
1276	{
1277	pIdte->Gen.u16OffsetLow = Offset & 0xffff;
1278	pIdte->Gen.u16OffsetHigh = Offset >> 16;
1279	pIdte->Gen.u16SegSel = SelCS;
1280	}
1281	}
1282
1283	return VINF_SUCCESS;
1284	}
1285
1286
1287	/**
1288	* Check if address is a gate handler (interrupt/trap/task/anything).
1289	*
1290	* @returns True is gate handler, false if not.
1291	*
1292	* @param pVM VM handle.
1293	* @param GCPtr GC address to check.
1294	*/
1295	TRPMR3DECL(bool) TRPMR3IsGateHandler(PVM pVM, RTGCPTR GCPtr)
1296	{
1297	/*
1298	* Read IDTR and calc last entry.
1299	*/
1300	uint16_t cbIDT;
1301	RTGCPTR GCPtrIDTE = CPUMGetGuestIDTR(pVM, &cbIDT);
1302	unsigned cEntries = (cbIDT + 1) / sizeof(VBOXIDTE);
1303	if (!cEntries)
1304	return false;
1305	RTGCPTR GCPtrIDTELast = GCPtrIDTE + (cEntries - 1) * sizeof(VBOXIDTE);
1306
1307	/*
1308	* Outer loop: interate pages.
1309	*/
1310	while (GCPtrIDTE <= GCPtrIDTELast)
1311	{
1312	/*
1313	* Convert this page to a HC address.
1314	* (This function checks for not-present pages.)
1315	*/
1316	PVBOXIDTE pIDTE;
1317	int rc = PGMPhysGCPtr2HCPtr(pVM, GCPtrIDTE, (void **)&pIDTE);
1318	if (VBOX_SUCCESS(rc))
1319	{
1320	/*
1321	* Inner Loop: Iterate the data on this page looking for an entry equal to GCPtr.
1322	* N.B. Member of the Flat Earth Society...
1323	*/
1324	while (GCPtrIDTE <= GCPtrIDTELast)
1325	{
1326	if (pIDTE->Gen.u1Present)
1327	{
1328	RTGCPTR GCPtrHandler = (pIDTE->Gen.u16OffsetHigh << 16) \| pIDTE->Gen.u16OffsetLow;
1329	if (GCPtr == GCPtrHandler)
1330	return true;
1331	}
1332
1333	/* next entry */
1334	if ((GCPtrIDTE & PAGE_OFFSET_MASK) + sizeof(VBOXIDTE) >= PAGE_SIZE)
1335	{
1336	AssertMsg(!(GCPtrIDTE & (sizeof(VBOXIDTE) - 1)),
1337	("IDT is crossing pages and it's not aligned! GCPtrIDTE=%#x cbIDT=%#x\n", GCPtrIDTE, cbIDT));
1338	GCPtrIDTE += sizeof(VBOXIDTE);
1339	break;
1340	}
1341	GCPtrIDTE += sizeof(VBOXIDTE);
1342	pIDTE++;
1343	}
1344	}
1345	else
1346	{
1347	/* Skip to the next page (if any). Take care not to wrap around the address space. */
1348	if ((GCPtrIDTELast >> PAGE_SHIFT) == (GCPtrIDTE >> PAGE_SHIFT))
1349	return false;
1350	GCPtrIDTE = RT_ALIGN_T(GCPtrIDTE, PAGE_SIZE, RTGCPTR) + PAGE_SIZE + (GCPtrIDTE & (sizeof(VBOXIDTE) - 1));
1351	}
1352	}
1353	return false;
1354	}
1355
1356
1357	/**
1358	* Inject event (such as external irq or trap)
1359	*
1360	* @returns VBox status code.
1361	* @param pVM The VM to operate on.
1362	* @param enmEvent Trpm event type
1363	*/
1364	TRPMR3DECL(int) TRPMR3InjectEvent(PVM pVM, TRPMEVENT enmEvent)
1365	{
1366	PCPUMCTX pCtx;
1367	int rc;
1368
1369	rc = CPUMQueryGuestCtxPtr(pVM, &pCtx);
1370	AssertRC(rc);
1371	Assert(!PATMIsPatchGCAddr(pVM, (RTGCPTR)pCtx->eip));
1372	Assert(!VM_FF_ISSET(pVM, VM_FF_INHIBIT_INTERRUPTS));
1373
1374	/* Currently only useful for external hardware interrupts. */
1375	Assert(enmEvent == TRPM_HARDWARE_INT);
1376
1377	if (REMR3QueryPendingInterrupt(pVM) == REM_NO_PENDING_IRQ)
1378	{
1379	#ifdef TRPM_FORWARD_TRAPS_IN_GC
1380
1381	# ifdef LOG_ENABLED
1382	DBGFR3InfoLog(pVM, "cpumguest", "TRPMInject");
1383	DBGFR3DisasInstrCurrentLog(pVM, "TRPMInject");
1384	# endif
1385
1386	uint8_t u8Interrupt;
1387	rc = PDMGetInterrupt(pVM, &u8Interrupt);
1388	Log(("TRPMR3InjectEvent: u8Interrupt=%d (%#x) rc=%Vrc\n", u8Interrupt, u8Interrupt, rc));
1389	if (VBOX_SUCCESS(rc))
1390	{
1391	if (HWACCMR3IsActive(pVM))
1392	{
1393	rc = TRPMAssertTrap(pVM, u8Interrupt, false);
1394	AssertRC(rc);
1395	STAM_COUNTER_INC(&pVM->trpm.s.paStatForwardedIRQR3[u8Interrupt]);
1396	return VINF_EM_RESCHEDULE_HWACC;
1397	}
1398	/* If the guest gate is marked dirty, then we will check again if we can patch it. */
1399	if (TRPMR3IsGuestTrapHandlerDirty(pVM, u8Interrupt))
1400	{
1401	Assert(TRPMR3GetGuestTrapHandler(pVM, u8Interrupt) == TRPM_INVALID_HANDLER);
1402	CSAMR3CheckGates(pVM, u8Interrupt, 1);
1403	Log(("TRPMR3InjectEvent: recheck gate %x -> valid=%d\n", u8Interrupt, TRPMR3GetGuestTrapHandler(pVM, u8Interrupt) != TRPM_INVALID_HANDLER));
1404	}
1405
1406	if (pVM->trpm.s.aGuestTrapHandler[u8Interrupt] != TRPM_INVALID_HANDLER)
1407	{
1408	/* There's a handler -> let's execute it in raw mode */
1409	rc = TRPMForwardTrap(pVM, CPUMCTX2CORE(pCtx), u8Interrupt, 0, TRPM_TRAP_NO_ERRORCODE, enmEvent);
1410	if (rc == VINF_SUCCESS /* Don't use VBOX_SUCCESS */)
1411	{
1412	STAM_COUNTER_INC(&pVM->trpm.s.paStatForwardedIRQR3[u8Interrupt]);
1413	return VINF_EM_RESCHEDULE_RAW;
1414	}
1415	}
1416	else
1417	STAM_COUNTER_INC(&pVM->trpm.s.StatForwardFailNoHandler);
1418	REMR3NotifyPendingInterrupt(pVM, u8Interrupt);
1419	}
1420	else
1421	AssertRC(rc);
1422	#else
1423	if (HWACCMR3IsActive(pVM))
1424	{
1425	uint8_t u8Interrupt;
1426	rc = PDMGetInterrupt(pVM, &u8Interrupt);
1427	Log(("TRPMR3InjectEvent: u8Interrupt=%d (%#x) rc=%Vrc\n", u8Interrupt, u8Interrupt, rc));
1428	if (VBOX_SUCCESS(rc))
1429	{
1430	rc = TRPMAssertTrap(pVM, u8Interrupt, false);
1431	AssertRC(rc);
1432	STAM_COUNTER_INC(&pVM->trpm.s.paStatForwardedIRQR3[u8Interrupt]);
1433	return VINF_EM_RESCHEDULE_HWACC;
1434	}
1435	}
1436	else
1437	AssertRC(rc);
1438	#endif
1439	}
1440	/** @todo check if it's safe to translate the patch address to the original guest address.
1441	* this implies a safe state in translated instructions and should take sti successors into account (instruction fusing)
1442	*/
1443	/* Note: if it's a PATM address, then we'll go back to raw mode regardless of the return code below. */
1444
1445	/* Fall back to the recompiler */
1446	return VINF_EM_RESCHEDULE_REM; /* (Heed the halted state if this is changed!) */
1447	}
1448

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source: vbox/trunk/src/VBox/VMM/TRPM.cpp@ 40

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