1 | /* $Id: REMInternal.h 22707 2009-09-02 11:02:48Z vboxsync $ */
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2 | /** @file
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3 | * REM - Internal header file.
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4 | */
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5 |
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6 | /*
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7 | * Copyright (C) 2006-2007 Sun Microsystems, Inc.
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8 | *
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9 | * This file is part of VirtualBox Open Source Edition (OSE), as
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10 | * available from http://www.virtualbox.org. This file is free software;
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11 | * you can redistribute it and/or modify it under the terms of the GNU
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12 | * General Public License (GPL) as published by the Free Software
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13 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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14 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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15 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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16 | *
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17 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
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18 | * Clara, CA 95054 USA or visit http://www.sun.com if you need
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19 | * additional information or have any questions.
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20 | */
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21 |
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22 | #ifndef ___REMInternal_h
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23 | #define ___REMInternal_h
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24 |
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25 | #include <VBox/cdefs.h>
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26 | #include <VBox/types.h>
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27 | #include <VBox/cpum.h>
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28 | #include <VBox/stam.h>
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29 | #include <VBox/pgm.h>
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30 | #include <VBox/pdmcritsect.h>
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31 | #ifdef REM_INCLUDE_CPU_H
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32 | # include "target-i386/cpu.h"
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33 | #endif
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34 |
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35 |
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36 |
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37 | /** @defgroup grp_rem_int Internals
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38 | * @ingroup grp_rem
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39 | * @internal
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40 | * @{
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41 | */
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42 |
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43 | /** The saved state version number. */
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44 | #define REM_SAVED_STATE_VERSION_VER1_6 6
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45 | #define REM_SAVED_STATE_VERSION 7
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46 |
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47 |
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48 | /** @def REM_MONITOR_CODE_PAGES
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49 | * Enable to monitor code pages that have been translated by the recompiler. */
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50 | /** Currently broken and interferes with CSAM monitoring (see #2784) */
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51 | ////#define REM_MONITOR_CODE_PAGES
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52 | #ifdef DOXYGEN_RUNNING
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53 | # define REM_MONITOR_CODE_PAGES
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54 | #endif
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55 |
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56 | typedef enum REMHANDLERNOTIFICATIONKIND
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57 | {
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58 | /** The usual invalid 0 entry. */
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59 | REMHANDLERNOTIFICATIONKIND_INVALID = 0,
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60 | /** REMR3NotifyHandlerPhysicalRegister. */
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61 | REMHANDLERNOTIFICATIONKIND_PHYSICAL_REGISTER,
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62 | /** REMR3NotifyHandlerPhysicalDeregister. */
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63 | REMHANDLERNOTIFICATIONKIND_PHYSICAL_DEREGISTER,
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64 | /** REMR3NotifyHandlerPhysicalModify. */
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65 | REMHANDLERNOTIFICATIONKIND_PHYSICAL_MODIFY,
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66 | /** The usual 32-bit hack. */
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67 | REMHANDLERNOTIFICATIONKIND_32BIT_HACK = 0x7fffffff
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68 | } REMHANDLERNOTIFICATIONKIND;
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69 |
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70 |
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71 | /**
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72 | * A recorded handler notificiation.
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73 | */
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74 | typedef struct REMHANDLERNOTIFICATION
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75 | {
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76 | /** The notification kind. */
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77 | REMHANDLERNOTIFICATIONKIND enmKind;
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78 | uint32_t padding;
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79 | /** Type specific data. */
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80 | union
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81 | {
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82 | struct
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83 | {
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84 | RTGCPHYS GCPhys;
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85 | RTGCPHYS cb;
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86 | PGMPHYSHANDLERTYPE enmType;
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87 | bool fHasHCHandler;
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88 | } PhysicalRegister;
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89 |
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90 | struct
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91 | {
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92 | RTGCPHYS GCPhys;
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93 | RTGCPHYS cb;
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94 | PGMPHYSHANDLERTYPE enmType;
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95 | bool fHasHCHandler;
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96 | bool fRestoreAsRAM;
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97 | } PhysicalDeregister;
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98 |
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99 | struct
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100 | {
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101 | RTGCPHYS GCPhysOld;
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102 | RTGCPHYS GCPhysNew;
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103 | RTGCPHYS cb;
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104 | PGMPHYSHANDLERTYPE enmType;
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105 | bool fHasHCHandler;
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106 | bool fRestoreAsRAM;
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107 | } PhysicalModify;
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108 | uint64_t padding[5];
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109 | } u;
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110 | uint32_t idxSelf;
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111 | uint32_t volatile idxNext;
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112 | } REMHANDLERNOTIFICATION;
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113 | /** Pointer to a handler notification record. */
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114 | typedef REMHANDLERNOTIFICATION *PREMHANDLERNOTIFICATION;
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115 |
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116 | /**
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117 | * Converts a REM pointer into a VM pointer.
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118 | * @returns Pointer to the VM structure the REM is part of.
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119 | * @param pREM Pointer to REM instance data.
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120 | */
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121 | #define REM2VM(pREM) ( (PVM)((char*)pREM - pREM->offVM) )
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122 |
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123 |
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124 | /**
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125 | * REM Data (part of VM)
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126 | */
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127 | typedef struct REM
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128 | {
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129 | /** Offset to the VM structure. */
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130 | RTINT offVM;
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131 | /** Alignment padding. */
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132 | RTUINT uPadding0;
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133 |
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134 | /** Cached pointer of the register context of the current VCPU. */
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135 | R3PTRTYPE(PCPUMCTX) pCtx;
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136 |
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137 | /** In REM mode.
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138 | * I.e. the correct CPU state and some other bits are with REM. */
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139 | bool volatile fInREM;
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140 | /** In REMR3State. */
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141 | bool fInStateSync;
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142 |
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143 | /** Set when the translation blocks cache need to be flushed. */
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144 | bool fFlushTBs;
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145 |
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146 | /** Ignore CR3 load notifications from the REM. */
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147 | bool fIgnoreCR3Load;
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148 | /** Ignore invlpg notifications from the REM. */
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149 | bool fIgnoreInvlPg;
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150 | /** Ignore CR0, CR4 and EFER load. */
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151 | bool fIgnoreCpuMode;
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152 | /** Ignore set page. */
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153 | bool fIgnoreSetPage;
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154 | bool bPadding1;
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155 |
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156 | /** Ignore all that can be ignored. */
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157 | uint32_t cIgnoreAll;
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158 |
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159 | /** Number of times REMR3CanExecuteRaw has been called.
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160 | * It is used to prevent rescheduling on the first call. */
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161 | uint32_t cCanExecuteRaw;
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162 |
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163 | /** Pending interrupt (~0 -> nothing). */
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164 | uint32_t u32PendingInterrupt;
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165 |
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166 | /** Number of recorded invlpg instructions. */
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167 | uint32_t volatile cInvalidatedPages;
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168 | #if HC_ARCH_BITS == 32
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169 | uint32_t uPadding2;
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170 | #endif
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171 | /** Array of recorded invlpg instruction.
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172 | * These instructions are replayed when entering REM. */
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173 | RTGCPTR aGCPtrInvalidatedPages[48];
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174 |
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175 | /** Array of recorded handler noticications.
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176 | * These are replayed when entering REM. */
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177 | REMHANDLERNOTIFICATION aHandlerNotifications[64];
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178 | volatile uint32_t idxPendingList;
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179 | volatile uint32_t idxFreeList;
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180 |
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181 | /** MMIO memory type.
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182 | * This is used to register MMIO physical access handlers. */
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183 | int32_t iMMIOMemType;
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184 | /** Handler memory type.
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185 | * This is used to register non-MMIO physical access handlers which are executed in HC. */
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186 | int32_t iHandlerMemType;
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187 |
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188 | /** Pending exception */
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189 | uint32_t uPendingException;
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190 | /** Nr of pending exceptions */
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191 | uint32_t cPendingExceptions;
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192 | /** Pending exception's EIP */
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193 | RTGCPTR uPendingExcptEIP;
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194 | /** Pending exception's CR2 */
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195 | RTGCPTR uPendingExcptCR2;
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196 |
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197 | /** The highest known RAM address. */
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198 | RTGCPHYS GCPhysLastRam;
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199 | /** Whether GCPhysLastRam has been fixed (see REMR3Init()). */
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200 | bool fGCPhysLastRamFixed;
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201 |
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202 | /** Pending rc. */
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203 | int32_t rc;
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204 |
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205 | /** REM critical section.
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206 | * This protects cpu_register_physical_memory usage
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207 | */
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208 | PDMCRITSECT CritSectRegister;
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209 |
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210 | /** Time spent in QEMU. */
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211 | STAMPROFILEADV StatsInQEMU;
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212 | /** Time spent in rawmode.c. */
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213 | STAMPROFILEADV StatsInRAWEx;
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214 | /** Time spent switching state. */
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215 | STAMPROFILE StatsState;
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216 | /** Time spent switching state back. */
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217 | STAMPROFILE StatsStateBack;
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218 |
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219 | /** Padding the CPUX86State structure to 32 byte. */
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220 | uint32_t abPadding[HC_ARCH_BITS == 32 ? 2 : 6];
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221 |
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222 | # define REM_ENV_SIZE 0xff00
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223 |
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224 | /** Recompiler CPU state. */
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225 | #ifdef REM_INCLUDE_CPU_H
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226 | CPUX86State Env;
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227 | #else
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228 | struct FakeEnv
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229 | {
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230 | char achPadding[REM_ENV_SIZE];
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231 | } Env;
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232 | #endif /* !REM_INCLUDE_CPU_H */
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233 | } REM;
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234 |
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235 | /** Pointer to the REM Data. */
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236 | typedef REM *PREM;
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237 |
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238 |
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239 | #ifdef REM_INCLUDE_CPU_H
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240 | bool remR3CanExecuteRaw(CPUState *env, RTGCPTR eip, unsigned fFlags, int *piException);
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241 | void remR3CSAMCheckEIP(CPUState *env, RTGCPTR GCPtrCode);
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242 | bool remR3GetOpcode(CPUState *env, RTGCPTR GCPtrInstr, uint8_t *pu8Byte);
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243 | bool remR3DisasInstr(CPUState *env, int f32BitCode, char *pszPrefix);
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244 | void remR3FlushPage(CPUState *env, RTGCPTR GCPtr);
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245 | void remR3SetPage(CPUState *env, CPUTLBEntry *pRead, CPUTLBEntry *pWrite, int prot, int is_user);
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246 | void remR3FlushTLB(CPUState *env, bool fGlobal);
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247 | void remR3ProtectCode(CPUState *env, RTGCPTR GCPtr);
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248 | void remR3ChangeCpuMode(CPUState *env);
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249 | void remR3DmaRun(CPUState *env);
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250 | void remR3TimersRun(CPUState *env);
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251 | int remR3NotifyTrap(CPUState *env, uint32_t uTrap, uint32_t uErrorCode, RTGCPTR pvNextEIP);
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252 | void remR3TrapStat(CPUState *env, uint32_t uTrap);
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253 | void remR3CpuId(CPUState *env, unsigned uOperator, void *pvEAX, void *pvEBX, void *pvECX, void *pvEDX);
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254 | void remR3RecordCall(CPUState *env);
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255 | #endif /* REM_INCLUDE_CPU_H */
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256 | void remR3TrapClear(PVM pVM);
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257 | void remR3RaiseRC(PVM pVM, int rc);
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258 | void remR3DumpLnxSyscall(PVMCPU pVCpu);
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259 | void remR3DumpOBsdSyscall(PVMCPU pVCpu);
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260 |
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261 |
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262 | /** @todo r=bird: clean up the RAWEx stats. */
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263 | /* temporary hacks */
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264 | #define RAWEx_ProfileStart(a, b) remR3ProfileStart(b)
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265 | #define RAWEx_ProfileStop(a, b) remR3ProfileStop(b)
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266 |
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267 |
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268 | #ifdef VBOX_WITH_STATISTICS
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269 |
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270 | # define STATS_EMULATE_SINGLE_INSTR 1
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271 | # define STATS_QEMU_COMPILATION 2
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272 | # define STATS_QEMU_RUN_EMULATED_CODE 3
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273 | # define STATS_QEMU_TOTAL 4
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274 | # define STATS_QEMU_RUN_TIMERS 5
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275 | # define STATS_TLB_LOOKUP 6
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276 | # define STATS_IRQ_HANDLING 7
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277 | # define STATS_RAW_CHECK 8
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278 |
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279 | void remR3ProfileStart(int statcode);
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280 | void remR3ProfileStop(int statcode);
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281 |
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282 | #else /* !VBOX_WITH_STATISTICS */
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283 | # define remR3ProfileStart(c) do { } while (0)
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284 | # define remR3ProfileStop(c) do { } while (0)
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285 | #endif /* !VBOX_WITH_STATISTICS */
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286 |
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287 | /** @} */
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288 |
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289 | #endif
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290 |
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