1 | /* $Id: REMInternal.h 11518 2008-08-20 14:25:01Z vboxsync $ */
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2 | /** @file
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3 | * REM - Internal header file.
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4 | */
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5 |
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6 | /*
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7 | * Copyright (C) 2006-2007 Sun Microsystems, Inc.
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8 | *
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9 | * This file is part of VirtualBox Open Source Edition (OSE), as
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10 | * available from http://www.virtualbox.org. This file is free software;
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11 | * you can redistribute it and/or modify it under the terms of the GNU
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12 | * General Public License (GPL) as published by the Free Software
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13 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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14 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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15 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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16 | *
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17 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
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18 | * Clara, CA 95054 USA or visit http://www.sun.com if you need
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19 | * additional information or have any questions.
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20 | */
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21 |
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22 | #ifndef ___REMInternal_h
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23 | #define ___REMInternal_h
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24 |
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25 | #include <VBox/cdefs.h>
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26 | #include <VBox/types.h>
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27 | #include <VBox/cpum.h>
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28 | #include <VBox/stam.h>
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29 | #include <VBox/pgm.h>
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30 | #ifdef REM_INCLUDE_CPU_H
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31 | # include "target-i386/cpu.h"
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32 | #endif
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33 |
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34 |
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35 | #if !defined(IN_REM_R3) && !defined(IN_REM_R0) && !defined(IN_REM_GC)
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36 | # error "Not in REM! This is an internal header!"
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37 | #endif
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38 |
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39 | /** @defgroup grp_rem_int Internals
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40 | * @ingroup grp_rem
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41 | * @internal
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42 | * @{
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43 | */
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44 |
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45 | /** The saved state version number. */
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46 | #define REM_SAVED_STATE_VERSION 7
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47 |
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48 |
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49 | /** @def REM_MONITOR_CODE_PAGES
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50 | * Enable to monitor code pages that have been translated by the recompiler. */
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51 | /** Currently broken and interferes with CSAM monitoring (see #2784) */
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52 | ////#define REM_MONITOR_CODE_PAGES
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53 |
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54 | typedef enum REMHANDLERNOTIFICATIONKIND
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55 | {
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56 | /** The usual invalid 0 entry. */
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57 | REMHANDLERNOTIFICATIONKIND_INVALID = 0,
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58 | /** REMR3NotifyHandlerPhysicalRegister. */
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59 | REMHANDLERNOTIFICATIONKIND_PHYSICAL_REGISTER,
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60 | /** REMR3NotifyHandlerPhysicalDeregister. */
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61 | REMHANDLERNOTIFICATIONKIND_PHYSICAL_DEREGISTER,
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62 | /** REMR3NotifyHandlerPhysicalModify. */
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63 | REMHANDLERNOTIFICATIONKIND_PHYSICAL_MODIFY,
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64 | /** The usual 32-bit hack. */
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65 | REMHANDLERNOTIFICATIONKIND_32BIT_HACK = 0x7fffffff
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66 | } REMHANDLERNOTIFICATIONKIND;
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67 |
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68 |
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69 | /**
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70 | * A recorded handler notificiation.
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71 | */
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72 | typedef struct REMHANDLERNOTIFICATION
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73 | {
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74 | /** The notification kind. */
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75 | REMHANDLERNOTIFICATIONKIND enmKind;
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76 | uint32_t padding;
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77 | /** Type specific data. */
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78 | union
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79 | {
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80 | struct
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81 | {
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82 | RTGCPHYS GCPhys;
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83 | RTGCPHYS cb;
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84 | PGMPHYSHANDLERTYPE enmType;
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85 | bool fHasHCHandler;
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86 | } PhysicalRegister;
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87 |
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88 | struct
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89 | {
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90 | RTGCPHYS GCPhys;
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91 | RTGCPHYS cb;
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92 | PGMPHYSHANDLERTYPE enmType;
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93 | bool fHasHCHandler;
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94 | bool fRestoreAsRAM;
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95 | } PhysicalDeregister;
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96 |
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97 | struct
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98 | {
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99 | RTGCPHYS GCPhysOld;
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100 | RTGCPHYS GCPhysNew;
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101 | RTGCPHYS cb;
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102 | PGMPHYSHANDLERTYPE enmType;
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103 | bool fHasHCHandler;
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104 | bool fRestoreAsRAM;
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105 | } PhysicalModify;
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106 | uint64_t padding[5];
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107 | } u;
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108 | } REMHANDLERNOTIFICATION, *PREMHANDLERNOTIFICATION;
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109 |
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110 | /**
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111 | * Dynamically allocated guest RAM chunk information
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112 | * HC virt to GC Phys
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113 | *
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114 | * A RAM chunk can spawn two chunk regions as we don't align them on chunk boundaries.
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115 | */
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116 | typedef struct REMCHUNKINFO
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117 | {
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118 | RTHCUINTPTR pChunk1;
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119 | RTHCUINTPTR pChunk2;
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120 | RTGCPHYS GCPhys1;
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121 | RTGCPHYS GCPhys2;
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122 | } REMCHUNKINFO, *PREMCHUNKINFO;
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123 |
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124 | /** Maximum number of external guest RAM/ROM registrations. */
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125 | #define REM_MAX_PHYS_REGISTRATIONS 16
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126 |
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127 | /**
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128 | * Registration record for external guest RAM & ROM
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129 | */
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130 | typedef struct REMPHYSREGISTRATION
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131 | {
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132 | RTGCPHYS GCPhys;
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133 | RTHCUINTPTR HCVirt;
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134 | RTUINT cb;
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135 | #if HC_ARCH_BITS == 64
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136 | uint32_t u32Padding;
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137 | #endif
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138 | } REMPHYSREGISTRATION, *PREMPHYSREGISTRATION;
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139 |
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140 | /**
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141 | * Converts a REM pointer into a VM pointer.
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142 | * @returns Pointer to the VM structure the REM is part of.
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143 | * @param pREM Pointer to REM instance data.
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144 | */
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145 | #define REM2VM(pREM) ( (PVM)((char*)pREM - pREM->offVM) )
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146 |
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147 |
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148 | /**
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149 | * REM Data (part of VM)
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150 | */
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151 | typedef struct REM
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152 | {
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153 | /** Offset to the VM structure. */
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154 | RTINT offVM;
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155 | /** Alignment padding. */
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156 | RTUINT uPadding0;
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157 |
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158 | /** Cached guest cpu context pointer. */
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159 | R3PTRTYPE(PCPUMCTX) pCtx;
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160 |
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161 | /** In REM mode.
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162 | * I.e. the correct CPU state and some other bits are with REM. */
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163 | bool fInREM;
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164 | /** In REMR3State. */
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165 | bool fInStateSync;
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166 |
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167 | /** Ignore all that can be ignored. */
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168 | bool fIgnoreAll;
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169 | /** Ignore CR3 load notifications from the REM. */
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170 | bool fIgnoreCR3Load;
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171 | /** Ignore invlpg notifications from the REM. */
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172 | bool fIgnoreInvlPg;
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173 | /** Ignore CR0, CR4 and EFER load. */
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174 | bool fIgnoreCpuMode;
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175 | /** Ignore set page. */
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176 | bool fIgnoreSetPage;
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177 |
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178 | /** Number of times REMR3CanExecuteRaw has been called.
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179 | * It is used to prevent rescheduling on the first call. */
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180 | RTUINT cCanExecuteRaw;
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181 |
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182 | /** Pending interrupt (~0 -> nothing). */
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183 | RTUINT u32PendingInterrupt;
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184 |
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185 | #if HC_ARCH_BITS == 64
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186 | /** Alignment padding. */
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187 | uint32_t u32Padding;
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188 | #endif
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189 | /** Number of recorded invlpg instructions. */
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190 | RTUINT cInvalidatedPages;
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191 | /** Array of recorded invlpg instruction.
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192 | * These instructions are replayed when entering REM. */
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193 | RTGCPTR aGCPtrInvalidatedPages[48];
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194 | /** The number of recorded handler notifications. */
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195 | RTUINT volatile cHandlerNotifications;
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196 | RTUINT padding0; /**< Padding. */
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197 | /** Array of recorded handler noticications.
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198 | * These are replayed when entering REM. */
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199 | REMHANDLERNOTIFICATION aHandlerNotifications[32];
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200 |
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201 | /** Pointer to an array of hc virt to gc phys records. */
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202 | R3PTRTYPE(PREMCHUNKINFO) paHCVirtToGCPhys;
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203 | /** Pointer to a GC Phys to HC Virt lookup table. */
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204 | R3PTRTYPE(PRTHCUINTPTR) paGCPhysToHCVirt;
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205 |
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206 | /** Array of external RAM and ROM registrations (excluding guest RAM). */
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207 | REMPHYSREGISTRATION aPhysReg[REM_MAX_PHYS_REGISTRATIONS];
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208 | /** Number of external RAM and ROM registrations (excluding guest RAM). */
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209 | RTUINT cPhysRegistrations;
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210 |
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211 | /** MMIO memory type.
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212 | * This is used to register MMIO physical access handlers. */
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213 | RTINT iMMIOMemType;
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214 | /** Handler memory type.
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215 | * This is used to register non-MMIO physical access handlers which are executed in HC. */
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216 | RTINT iHandlerMemType;
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217 |
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218 | /** Pending exception */
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219 | uint32_t uPendingException;
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220 | /** Pending exception's EIP */
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221 | uint32_t uPendingExcptEIP;
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222 | /** Pending exception's CR2 */
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223 | uint32_t uPendingExcptCR2;
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224 | /** Nr of pending exceptions */
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225 | uint32_t cPendingExceptions;
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226 |
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227 | /** Pending rc. */
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228 | RTINT rc;
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229 |
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230 | /** Time spent in QEMU. */
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231 | STAMPROFILEADV StatsInQEMU;
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232 | /** Time spent in rawmode.c. */
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233 | STAMPROFILEADV StatsInRAWEx;
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234 | /** Time spent switching state. */
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235 | STAMPROFILE StatsState;
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236 | /** Time spent switching state back. */
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237 | STAMPROFILE StatsStateBack;
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238 |
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239 | #if HC_ARCH_BITS != 32
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240 | /** Padding the CPUX86State structure to 32 byte. */
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241 | uint32_t abPadding[HC_ARCH_BITS == 32 ? 0 : 4];
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242 | #endif
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243 |
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244 | #if GC_ARCH_BITS == 32
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245 | #define REM_ENV_SIZE (HC_ARCH_BITS == 32 ? 0x6550 : 0xb4a0)
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246 | #else
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247 | #define REM_ENV_SIZE (HC_ARCH_BITS == 32 ? 0x9440 : 0xd4a0)
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248 | #endif
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249 |
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250 | /** Recompiler CPU state. */
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251 | #ifdef REM_INCLUDE_CPU_H
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252 | CPUX86State Env;
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253 | #else
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254 | struct FakeEnv
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255 | {
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256 | char achPadding[REM_ENV_SIZE];
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257 | } Env;
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258 | #endif
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259 | } REM;
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260 |
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261 | /** Pointer to the REM Data. */
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262 | typedef REM *PREM;
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263 |
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264 |
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265 | #ifdef REM_INCLUDE_CPU_H
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266 | bool remR3CanExecuteRaw(CPUState *env, RTGCPTR eip, unsigned fFlags, int *piException);
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267 | void remR3CSAMCheckEIP(CPUState *env, RTGCPTR GCPtrCode);
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268 | bool remR3GetOpcode(CPUState *env, RTGCPTR GCPtrInstr, uint8_t *pu8Byte);
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269 | bool remR3DisasInstr(CPUState *env, int f32BitCode, char *pszPrefix);
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270 | bool remR3DisasBlock(CPUState *env, int f32BitCode, int nrInstructions, char *pszPrefix);
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271 | void remR3FlushPage(CPUState *env, RTGCPTR GCPtr);
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272 | void remR3SetPage(CPUState *env, CPUTLBEntry *pRead, CPUTLBEntry *pWrite, int prot, int is_user);
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273 | void remR3FlushTLB(CPUState *env, bool fGlobal);
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274 | void remR3ProtectCode(CPUState *env, RTGCPTR GCPtr);
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275 | void remR3ChangeCpuMode(CPUState *env);
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276 | void remR3DmaRun(CPUState *env);
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277 | void remR3TimersRun(CPUState *env);
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278 | int remR3NotifyTrap(CPUState *env, uint32_t uTrap, uint32_t uErrorCode, uint32_t pvNextEIP);
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279 | void remR3TrapStat(CPUState *env, uint32_t uTrap);
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280 | void remR3CpuId(CPUState *env, unsigned uOperator, void *pvEAX, void *pvEBX, void *pvECX, void *pvEDX);
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281 | void remR3RecordCall(CPUState *env);
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282 | #endif
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283 | void remR3TrapClear(PVM pVM);
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284 | void remR3RaiseRC(PVM pVM, int rc);
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285 | void remR3DumpLnxSyscall(PVM pVM);
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286 | void remR3DumpOBsdSyscall(PVM pVM);
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287 |
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288 |
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289 | /** @todo r=bird: clean up the RAWEx stats. */
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290 | /* temporary hacks */
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291 | #define RAWEx_ProfileStart(a, b) remR3ProfileStart(b)
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292 | #define RAWEx_ProfileStop(a, b) remR3ProfileStop(b)
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293 |
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294 |
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295 | #ifdef VBOX_WITH_STATISTICS
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296 |
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297 | #define STATS_EMULATE_SINGLE_INSTR 1
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298 | #define STATS_QEMU_COMPILATION 2
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299 | #define STATS_QEMU_RUN_EMULATED_CODE 3
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300 | #define STATS_QEMU_TOTAL 4
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301 | #define STATS_QEMU_RUN_TIMERS 5
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302 | #define STATS_TLB_LOOKUP 6
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303 | #define STATS_IRQ_HANDLING 7
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304 | #define STATS_RAW_CHECK 8
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305 |
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306 |
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307 | void remR3ProfileStart(int statcode);
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308 | void remR3ProfileStop(int statcode);
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309 | #else
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310 | #define remR3ProfileStart(c)
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311 | #define remR3ProfileStop(c)
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312 | #endif
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313 |
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314 | /** @} */
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315 |
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316 | #endif
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317 |
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