VirtualBox

source: vbox/trunk/src/VBox/VMM/REMInternal.h@ 6796

Last change on this file since 6796 was 6546, checked in by vboxsync, 17 years ago

VBOX_WITH_NEW_PHYS_CODE changes mostly realted to REM. Killed a warning in cpu-exec.c.
  • Property svn:eol-style set to native
  • Property svn:keywords set to Id
File size: 9.5 KB
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1/* $Id: REMInternal.h 6546 2008-01-28 21:58:59Z vboxsync $ */
2/** @file
3 * REM - Internal header file.
4 */
5
6/*
7 * Copyright (C) 2006-2007 innotek GmbH
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18#ifndef ___REMInternal_h
19#define ___REMInternal_h
20
21#include <VBox/cdefs.h>
22#include <VBox/types.h>
23#include <VBox/cpum.h>
24#include <VBox/stam.h>
25#include <VBox/pgm.h>
26#ifdef REM_INCLUDE_CPU_H
27# include "target-i386/cpu.h"
28#endif
29
30
31#if !defined(IN_REM_R3) && !defined(IN_REM_R0) && !defined(IN_REM_GC)
32# error "Not in REM! This is an internal header!"
33#endif
34
35/** @defgroup grp_rem_int Internals
36 * @ingroup grp_rem
37 * @internal
38 * @{
39 */
40
41/** The saved state version number. */
42#define REM_SAVED_STATE_VERSION 6
43
44
45/** @def REM_MONITOR_CODE_PAGES
46 * Enable to monitor code pages that have been translated by the recompiler. */
47#define REM_MONITOR_CODE_PAGES
48
49typedef enum REMHANDLERNOTIFICATIONKIND
50{
51 /** The usual invalid 0 entry. */
52 REMHANDLERNOTIFICATIONKIND_INVALID = 0,
53 /** REMR3NotifyHandlerPhysicalRegister. */
54 REMHANDLERNOTIFICATIONKIND_PHYSICAL_REGISTER,
55 /** REMR3NotifyHandlerPhysicalDeregister. */
56 REMHANDLERNOTIFICATIONKIND_PHYSICAL_DEREGISTER,
57 /** REMR3NotifyHandlerPhysicalModify. */
58 REMHANDLERNOTIFICATIONKIND_PHYSICAL_MODIFY,
59 /** The usual 32-bit hack. */
60 REMHANDLERNOTIFICATIONKIND_32BIT_HACK = 0x7fffffff
61} REMHANDLERNOTIFICATIONKIND;
62
63
64/**
65 * A recorded handler notificiation.
66 */
67typedef struct REMHANDLERNOTIFICATION
68{
69 /** The notification kind. */
70 REMHANDLERNOTIFICATIONKIND enmKind;
71 uint32_t padding;
72 /** Type specific data. */
73 union
74 {
75 struct
76 {
77 RTGCPHYS GCPhys;
78 RTGCPHYS cb;
79 PGMPHYSHANDLERTYPE enmType;
80 bool fHasHCHandler;
81 } PhysicalRegister;
82
83 struct
84 {
85 RTGCPHYS GCPhys;
86 RTGCPHYS cb;
87 PGMPHYSHANDLERTYPE enmType;
88 bool fHasHCHandler;
89 bool fRestoreAsRAM;
90 } PhysicalDeregister;
91
92 struct
93 {
94 RTGCPHYS GCPhysOld;
95 RTGCPHYS GCPhysNew;
96 RTGCPHYS cb;
97 PGMPHYSHANDLERTYPE enmType;
98 bool fHasHCHandler;
99 bool fRestoreAsRAM;
100 } PhysicalModify;
101 uint64_t padding[3 + (HC_ARCH_BITS == 64)];
102 } u;
103} REMHANDLERNOTIFICATION, *PREMHANDLERNOTIFICATION;
104
105/**
106 * Dynamically allocated guest RAM chunk information
107 * HC virt to GC Phys
108 *
109 * A RAM chunk can spawn two chunk regions as we don't align them on chunk boundaries.
110 */
111typedef struct REMCHUNKINFO
112{
113 RTHCUINTPTR pChunk1;
114 RTHCUINTPTR pChunk2;
115 RTGCPHYS GCPhys1;
116 RTGCPHYS GCPhys2;
117} REMCHUNKINFO, *PREMCHUNKINFO;
118
119/** Maximum number of external guest RAM/ROM registrations. */
120#define REM_MAX_PHYS_REGISTRATIONS 16
121
122/**
123 * Registration record for external guest RAM & ROM
124 */
125typedef struct REMPHYSREGISTRATION
126{
127 RTHCUINTPTR HCVirt;
128 RTGCPHYS GCPhys;
129 RTUINT cb;
130} REMPHYSREGISTRATION, *PREMPHYSREGISTRATION;
131
132/**
133 * Converts a REM pointer into a VM pointer.
134 * @returns Pointer to the VM structure the REM is part of.
135 * @param pREM Pointer to REM instance data.
136 */
137#define REM2VM(pREM) ( (PVM)((char*)pREM - pREM->offVM) )
138
139
140/**
141 * REM Data (part of VM)
142 */
143typedef struct REM
144{
145 /** Offset to the VM structure. */
146 RTINT offVM;
147 /** Alignment padding. */
148 RTUINT uPadding0;
149
150 /** Cached guest cpu context pointer. */
151 R3PTRTYPE(PCPUMCTX) pCtx;
152
153 /** In REM mode.
154 * I.e. the correct CPU state and some other bits are with REM. */
155 bool fInREM;
156 /** In REMR3State. */
157 bool fInStateSync;
158
159 /** Ignore all that can be ignored. */
160 bool fIgnoreAll;
161 /** Ignore CR3 load notifications from the REM. */
162 bool fIgnoreCR3Load;
163 /** Ignore invlpg notifications from the REM. */
164 bool fIgnoreInvlPg;
165 /** Ignore CR0, CR4 and EFER load. */
166 bool fIgnoreCpuMode;
167 /** Ignore set page. */
168 bool fIgnoreSetPage;
169
170 /** Number of times REMR3CanExecuteRaw has been called.
171 * It is used to prevent rescheduling on the first call. */
172 RTUINT cCanExecuteRaw;
173
174 /** Pending interrupt (~0 -> nothing). */
175 RTUINT u32PendingInterrupt;
176
177#if HC_ARCH_BITS == 64
178 /** Alignment padding. */
179 uint32_t u32Padding;
180#endif
181 /** Number of recorded invlpg instructions. */
182 RTUINT cInvalidatedPages;
183 /** Array of recorded invlpg instruction.
184 * These instructions are replayed when entering REM. */
185 RTGCPTR aGCPtrInvalidatedPages[48];
186 /** The number of recorded handler notifications. */
187 RTUINT volatile cHandlerNotifications;
188 RTUINT padding0; /**< Padding. */
189 /** Array of recorded handler noticications.
190 * These are replayed when entering REM. */
191 REMHANDLERNOTIFICATION aHandlerNotifications[32];
192
193 /** Pointer to an array of hc virt to gc phys records. */
194 R3PTRTYPE(PREMCHUNKINFO) paHCVirtToGCPhys;
195 /** Pointer to a GC Phys to HC Virt lookup table. */
196 R3PTRTYPE(PRTHCUINTPTR) paGCPhysToHCVirt;
197
198 /** Array of external RAM and ROM registrations (excluding guest RAM). */
199 REMPHYSREGISTRATION aPhysReg[REM_MAX_PHYS_REGISTRATIONS];
200 /** Number of external RAM and ROM registrations (excluding guest RAM). */
201 RTUINT cPhysRegistrations;
202
203 /** MMIO memory type.
204 * This is used to register MMIO physical access handlers. */
205 RTINT iMMIOMemType;
206 /** Handler memory type.
207 * This is used to register non-MMIO physical access handlers which are executed in HC. */
208 RTINT iHandlerMemType;
209
210 /** Pending exception */
211 uint32_t uPendingException;
212 /** Pending exception's EIP */
213 uint32_t uPendingExcptEIP;
214 /** Pending exception's CR2 */
215 uint32_t uPendingExcptCR2;
216 /** Nr of pending exceptions */
217 uint32_t cPendingExceptions;
218
219 /** Pending rc. */
220 RTINT rc;
221
222 /** Time spent in QEMU. */
223 STAMPROFILEADV StatsInQEMU;
224 /** Time spent in rawmode.c. */
225 STAMPROFILEADV StatsInRAWEx;
226 /** Time spent switching state. */
227 STAMPROFILE StatsState;
228 /** Time spent switching state back. */
229 STAMPROFILE StatsStateBack;
230
231#if HC_ARCH_BITS != 32
232 /** Padding the CPUX86State structure to 32 byte. */
233 uint32_t abPadding[HC_ARCH_BITS == 32 ? 0 : 4];
234#endif
235
236#define REM_ENV_SIZE (HC_ARCH_BITS == 32 ? 0x6440 : 0xb4a0)
237 /** Recompiler CPU state. */
238#ifdef REM_INCLUDE_CPU_H
239 CPUX86State Env;
240#else
241 struct FakeEnv
242 {
243 char achPadding[REM_ENV_SIZE];
244 } Env;
245#endif
246} REM;
247
248/** Pointer to the REM Data. */
249typedef REM *PREM;
250
251
252#ifdef REM_INCLUDE_CPU_H
253bool remR3CanExecuteRaw(CPUState *env, RTGCPTR eip, unsigned fFlags, int *piException);
254void remR3CSAMCheckEIP(CPUState *env, RTGCPTR GCPtrCode);
255bool remR3GetOpcode(CPUState *env, RTGCPTR GCPtrInstr, uint8_t *pu8Byte);
256bool remR3DisasInstr(CPUState *env, int f32BitCode, char *pszPrefix);
257bool remR3DisasBlock(CPUState *env, int f32BitCode, int nrInstructions, char *pszPrefix);
258void remR3FlushPage(CPUState *env, RTGCPTR GCPtr);
259void remR3SetPage(CPUState *env, CPUTLBEntry *pRead, CPUTLBEntry *pWrite, int prot, int is_user);
260void remR3FlushTLB(CPUState *env, bool fGlobal);
261void remR3ProtectCode(CPUState *env, RTGCPTR GCPtr);
262void remR3ChangeCpuMode(CPUState *env);
263void remR3DmaRun(CPUState *env);
264void remR3TimersRun(CPUState *env);
265int remR3NotifyTrap(CPUState *env, uint32_t uTrap, uint32_t uErrorCode, uint32_t pvNextEIP);
266void remR3TrapStat(CPUState *env, uint32_t uTrap);
267void remR3CpuId(CPUState *env, unsigned uOperator, void *pvEAX, void *pvEBX, void *pvECX, void *pvEDX);
268void remR3RecordCall(CPUState *env);
269#endif
270void remR3TrapClear(PVM pVM);
271void remR3RaiseRC(PVM pVM, int rc);
272void remR3DumpLnxSyscall(PVM pVM);
273void remR3DumpOBsdSyscall(PVM pVM);
274
275
276/** @todo r=bird: clean up the RAWEx stats. */
277/* temporary hacks */
278#define RAWEx_ProfileStart(a, b) remR3ProfileStart(b)
279#define RAWEx_ProfileStop(a, b) remR3ProfileStop(b)
280
281
282#ifdef VBOX_WITH_STATISTICS
283
284#define STATS_EMULATE_SINGLE_INSTR 1
285#define STATS_QEMU_COMPILATION 2
286#define STATS_QEMU_RUN_EMULATED_CODE 3
287#define STATS_QEMU_TOTAL 4
288#define STATS_QEMU_RUN_TIMERS 5
289#define STATS_TLB_LOOKUP 6
290#define STATS_IRQ_HANDLING 7
291#define STATS_RAW_CHECK 8
292
293
294void remR3ProfileStart(int statcode);
295void remR3ProfileStop(int statcode);
296#else
297#define remR3ProfileStart(c)
298#define remR3ProfileStop(c)
299#endif
300
301/** @} */
302
303#endif
304
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