VirtualBox

source: vbox/trunk/src/VBox/VMM/REMInternal.h@ 18130

Last change on this file since 18130 was 17537, checked in by vboxsync, 16 years ago

REM: Added REMR3InitFinalize and moved the dirty page bit map allocation over there. REMR3NotifyPhysRamRegister now just tracks the highest ram address. Removed some old obsolete bits in REMInternal.h.
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File size: 9.5 KB
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1/* $Id: REMInternal.h 17537 2009-03-08 05:22:28Z vboxsync $ */
2/** @file
3 * REM - Internal header file.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22#ifndef ___REMInternal_h
23#define ___REMInternal_h
24
25#include <VBox/cdefs.h>
26#include <VBox/types.h>
27#include <VBox/cpum.h>
28#include <VBox/stam.h>
29#include <VBox/pgm.h>
30#ifdef REM_INCLUDE_CPU_H
31# include "target-i386/cpu.h"
32#endif
33
34
35
36/** @defgroup grp_rem_int Internals
37 * @ingroup grp_rem
38 * @internal
39 * @{
40 */
41
42/** The saved state version number. */
43#define REM_SAVED_STATE_VERSION_VER1_6 6
44#define REM_SAVED_STATE_VERSION 7
45
46
47/** @def REM_MONITOR_CODE_PAGES
48 * Enable to monitor code pages that have been translated by the recompiler. */
49/** Currently broken and interferes with CSAM monitoring (see #2784) */
50////#define REM_MONITOR_CODE_PAGES
51#ifdef DOXYGEN_RUNNING
52# define REM_MONITOR_CODE_PAGES
53#endif
54
55typedef enum REMHANDLERNOTIFICATIONKIND
56{
57 /** The usual invalid 0 entry. */
58 REMHANDLERNOTIFICATIONKIND_INVALID = 0,
59 /** REMR3NotifyHandlerPhysicalRegister. */
60 REMHANDLERNOTIFICATIONKIND_PHYSICAL_REGISTER,
61 /** REMR3NotifyHandlerPhysicalDeregister. */
62 REMHANDLERNOTIFICATIONKIND_PHYSICAL_DEREGISTER,
63 /** REMR3NotifyHandlerPhysicalModify. */
64 REMHANDLERNOTIFICATIONKIND_PHYSICAL_MODIFY,
65 /** The usual 32-bit hack. */
66 REMHANDLERNOTIFICATIONKIND_32BIT_HACK = 0x7fffffff
67} REMHANDLERNOTIFICATIONKIND;
68
69
70/**
71 * A recorded handler notificiation.
72 */
73typedef struct REMHANDLERNOTIFICATION
74{
75 /** The notification kind. */
76 REMHANDLERNOTIFICATIONKIND enmKind;
77 uint32_t padding;
78 /** Type specific data. */
79 union
80 {
81 struct
82 {
83 RTGCPHYS GCPhys;
84 RTGCPHYS cb;
85 PGMPHYSHANDLERTYPE enmType;
86 bool fHasHCHandler;
87 } PhysicalRegister;
88
89 struct
90 {
91 RTGCPHYS GCPhys;
92 RTGCPHYS cb;
93 PGMPHYSHANDLERTYPE enmType;
94 bool fHasHCHandler;
95 bool fRestoreAsRAM;
96 } PhysicalDeregister;
97
98 struct
99 {
100 RTGCPHYS GCPhysOld;
101 RTGCPHYS GCPhysNew;
102 RTGCPHYS cb;
103 PGMPHYSHANDLERTYPE enmType;
104 bool fHasHCHandler;
105 bool fRestoreAsRAM;
106 } PhysicalModify;
107 uint64_t padding[5];
108 } u;
109} REMHANDLERNOTIFICATION, *PREMHANDLERNOTIFICATION;
110
111/**
112 * Converts a REM pointer into a VM pointer.
113 * @returns Pointer to the VM structure the REM is part of.
114 * @param pREM Pointer to REM instance data.
115 */
116#define REM2VM(pREM) ( (PVM)((char*)pREM - pREM->offVM) )
117
118
119/**
120 * REM Data (part of VM)
121 */
122typedef struct REM
123{
124 /** Offset to the VM structure. */
125 RTINT offVM;
126 /** Alignment padding. */
127 RTUINT uPadding0;
128
129 /** Cached guest cpu context pointer. */
130 R3PTRTYPE(PCPUMCTX) pCtx;
131
132 /** In REM mode.
133 * I.e. the correct CPU state and some other bits are with REM. */
134 bool fInREM;
135 /** In REMR3State. */
136 bool fInStateSync;
137
138 /** Set when the translation blocks cache need to be flushed. */
139 bool fFlushTBs;
140
141 /** Ignore all that can be ignored. */
142 bool fIgnoreAll;
143 /** Ignore CR3 load notifications from the REM. */
144 bool fIgnoreCR3Load;
145 /** Ignore invlpg notifications from the REM. */
146 bool fIgnoreInvlPg;
147 /** Ignore CR0, CR4 and EFER load. */
148 bool fIgnoreCpuMode;
149 /** Ignore set page. */
150 bool fIgnoreSetPage;
151
152 /** Number of times REMR3CanExecuteRaw has been called.
153 * It is used to prevent rescheduling on the first call. */
154 uint32_t cCanExecuteRaw;
155
156 /** Pending interrupt (~0 -> nothing). */
157 uint32_t u32PendingInterrupt;
158
159#if HC_ARCH_BITS == 64
160 /** Alignment padding. */
161 uint32_t u32Padding;
162#endif
163 /** Number of recorded invlpg instructions. */
164 uint32_t cInvalidatedPages;
165 /** Array of recorded invlpg instruction.
166 * These instructions are replayed when entering REM. */
167 RTGCPTR aGCPtrInvalidatedPages[48];
168 /** The number of recorded handler notifications. */
169 RTUINT volatile cHandlerNotifications;
170 RTUINT padding0; /**< Padding. */
171 /** Array of recorded handler noticications.
172 * These are replayed when entering REM. */
173 REMHANDLERNOTIFICATION aHandlerNotifications[32];
174
175 /** MMIO memory type.
176 * This is used to register MMIO physical access handlers. */
177 int32_t iMMIOMemType;
178 /** Handler memory type.
179 * This is used to register non-MMIO physical access handlers which are executed in HC. */
180 int32_t iHandlerMemType;
181
182 /** Pending exception */
183 uint32_t uPendingException;
184 /** Nr of pending exceptions */
185 uint32_t cPendingExceptions;
186 /** Pending exception's EIP */
187 uint32_t uPendingExcptEIP;
188 uint32_t reserved_for_future_uPendingExcptRIP;
189 /** Pending exception's CR2 */
190 uint32_t uPendingExcptCR2;
191 uint32_t reserved_for_future_64bit_uPendingExcptCR2;
192
193 /** The highest known RAM address. */
194 RTGCPHYS GCPhysLastRam;
195 /** Whether GCPhysLastRam has been fixed (see REMR3Init()). */
196 bool fGCPhysLastRamFixed;
197
198 /** Pending rc. */
199 int32_t rc;
200
201 /** Time spent in QEMU. */
202 STAMPROFILEADV StatsInQEMU;
203 /** Time spent in rawmode.c. */
204 STAMPROFILEADV StatsInRAWEx;
205 /** Time spent switching state. */
206 STAMPROFILE StatsState;
207 /** Time spent switching state back. */
208 STAMPROFILE StatsStateBack;
209
210 /** Padding the CPUX86State structure to 32 byte. */
211 uint32_t abPadding[HC_ARCH_BITS == 32 ? 6 : 4];
212
213#ifdef VBOX_WITH_NEW_RECOMPILER
214#if GC_ARCH_BITS == 32
215# define REM_ENV_SIZE (HC_ARCH_BITS == 32 ? 0xff00 : 0xff00)
216#else
217# define REM_ENV_SIZE (HC_ARCH_BITS == 32 ? 0xff00 : 0xff00)
218#endif
219#else /* !VBOX_WITH_NEW_RECOMPILER */
220#if GC_ARCH_BITS == 32
221# define REM_ENV_SIZE (HC_ARCH_BITS == 32 ? 0x6550 : 0xb4a0)
222#else
223# define REM_ENV_SIZE (HC_ARCH_BITS == 32 ? 0x9440 : 0xd4a0)
224#endif
225#endif /* !VBOX_WITH_NEW_RECOMILER */
226
227 /** Recompiler CPU state. */
228#ifdef REM_INCLUDE_CPU_H
229 CPUX86State Env;
230#else
231 struct FakeEnv
232 {
233 char achPadding[REM_ENV_SIZE];
234 } Env;
235#endif /* !REM_INCLUDE_CPU_H */
236} REM;
237
238/** Pointer to the REM Data. */
239typedef REM *PREM;
240
241
242#ifdef REM_INCLUDE_CPU_H
243bool remR3CanExecuteRaw(CPUState *env, RTGCPTR eip, unsigned fFlags, int *piException);
244void remR3CSAMCheckEIP(CPUState *env, RTGCPTR GCPtrCode);
245bool remR3GetOpcode(CPUState *env, RTGCPTR GCPtrInstr, uint8_t *pu8Byte);
246bool remR3DisasInstr(CPUState *env, int f32BitCode, char *pszPrefix);
247void remR3FlushPage(CPUState *env, RTGCPTR GCPtr);
248void remR3SetPage(CPUState *env, CPUTLBEntry *pRead, CPUTLBEntry *pWrite, int prot, int is_user);
249void remR3FlushTLB(CPUState *env, bool fGlobal);
250void remR3ProtectCode(CPUState *env, RTGCPTR GCPtr);
251void remR3ChangeCpuMode(CPUState *env);
252void remR3DmaRun(CPUState *env);
253void remR3TimersRun(CPUState *env);
254# ifdef VBOX_WITH_NEW_RECOMPILER
255int remR3NotifyTrap(CPUState *env, uint32_t uTrap, uint32_t uErrorCode, RTGCPTR pvNextEIP);
256# else
257int remR3NotifyTrap(CPUState *env, uint32_t uTrap, uint32_t uErrorCode, uint32_t pvNextEIP);
258# endif
259void remR3TrapStat(CPUState *env, uint32_t uTrap);
260void remR3CpuId(CPUState *env, unsigned uOperator, void *pvEAX, void *pvEBX, void *pvECX, void *pvEDX);
261void remR3RecordCall(CPUState *env);
262#endif /* REM_INCLUDE_CPU_H */
263void remR3TrapClear(PVM pVM);
264void remR3RaiseRC(PVM pVM, int rc);
265void remR3DumpLnxSyscall(PVM pVM);
266void remR3DumpOBsdSyscall(PVM pVM);
267
268
269/** @todo r=bird: clean up the RAWEx stats. */
270/* temporary hacks */
271#define RAWEx_ProfileStart(a, b) remR3ProfileStart(b)
272#define RAWEx_ProfileStop(a, b) remR3ProfileStop(b)
273
274
275#ifdef VBOX_WITH_STATISTICS
276
277# define STATS_EMULATE_SINGLE_INSTR 1
278# define STATS_QEMU_COMPILATION 2
279# define STATS_QEMU_RUN_EMULATED_CODE 3
280# define STATS_QEMU_TOTAL 4
281# define STATS_QEMU_RUN_TIMERS 5
282# define STATS_TLB_LOOKUP 6
283# define STATS_IRQ_HANDLING 7
284# define STATS_RAW_CHECK 8
285
286void remR3ProfileStart(int statcode);
287void remR3ProfileStop(int statcode);
288
289#else /* !VBOX_WITH_STATISTICS */
290# define remR3ProfileStart(c)
291# define remR3ProfileStop(c)
292#endif /* !VBOX_WITH_STATISTICS */
293
294/** @} */
295
296#endif
297
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