VirtualBox

source: vbox/trunk/src/VBox/VMM/PGMInternal.h@ 7086

Last change on this file since 7086 was 7084, checked in by vboxsync, 17 years ago

made RTGCPHYS 32-bit again, has to be solved properly
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File size: 142.4 KB
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1/* $Id: PGMInternal.h 7084 2008-02-21 19:26:33Z vboxsync $ */
2/** @file
3 * PGM - Internal header file.
4 */
5
6/*
7 * Copyright (C) 2006-2007 innotek GmbH
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18#ifndef ___PGMInternal_h
19#define ___PGMInternal_h
20
21#include <VBox/cdefs.h>
22#include <VBox/types.h>
23#include <VBox/err.h>
24#include <VBox/stam.h>
25#include <VBox/param.h>
26#include <VBox/vmm.h>
27#include <VBox/mm.h>
28#include <VBox/pdmcritsect.h>
29#include <VBox/pdmapi.h>
30#include <VBox/dis.h>
31#include <VBox/dbgf.h>
32#include <VBox/log.h>
33#include <VBox/gmm.h>
34#include <iprt/avl.h>
35#include <iprt/assert.h>
36#include <iprt/critsect.h>
37
38#if !defined(IN_PGM_R3) && !defined(IN_PGM_R0) && !defined(IN_PGM_GC)
39# error "Not in PGM! This is an internal header!"
40#endif
41
42
43/** @defgroup grp_pgm_int Internals
44 * @ingroup grp_pgm
45 * @internal
46 * @{
47 */
48
49
50/** @name PGM Compile Time Config
51 * @{
52 */
53
54/**
55 * Solve page is out of sync issues inside Guest Context (in PGMGC.cpp).
56 * Comment it if it will break something.
57 */
58#define PGM_OUT_OF_SYNC_IN_GC
59
60/**
61 * Virtualize the dirty bit
62 * This also makes a half-hearted attempt at the accessed bit. For full
63 * accessed bit virtualization define PGM_SYNC_ACCESSED_BIT.
64 */
65#define PGM_SYNC_DIRTY_BIT
66
67/**
68 * Fully virtualize the accessed bit.
69 * @remark This requires SYNC_DIRTY_ACCESSED_BITS to be defined!
70 */
71#define PGM_SYNC_ACCESSED_BIT
72
73/**
74 * Check and skip global PDEs for non-global flushes
75 */
76#define PGM_SKIP_GLOBAL_PAGEDIRS_ON_NONGLOBAL_FLUSH
77
78/**
79 * Sync N pages instead of a whole page table
80 */
81#define PGM_SYNC_N_PAGES
82
83/**
84 * Number of pages to sync during a page fault
85 *
86 * When PGMPOOL_WITH_GCPHYS_TRACKING is enabled using high values here
87 * causes a lot of unnecessary extents and also is slower than taking more \#PFs.
88 */
89#define PGM_SYNC_NR_PAGES 8
90
91/**
92 * Number of PGMPhysRead/Write cache entries (must be <= sizeof(uint64_t))
93 */
94#define PGM_MAX_PHYSCACHE_ENTRIES 64
95#define PGM_MAX_PHYSCACHE_ENTRIES_MASK (PGM_MAX_PHYSCACHE_ENTRIES-1)
96
97/**
98 * Enable caching of PGMR3PhysRead/WriteByte/Word/Dword
99 */
100#define PGM_PHYSMEMACCESS_CACHING
101
102/*
103 * Assert Sanity.
104 */
105#if defined(PGM_SYNC_ACCESSED_BIT) && !defined(PGM_SYNC_DIRTY_BIT)
106# error "PGM_SYNC_ACCESSED_BIT requires PGM_SYNC_DIRTY_BIT!"
107#endif
108
109/** @def PGMPOOL_WITH_CACHE
110 * Enable agressive caching using the page pool.
111 *
112 * This requires PGMPOOL_WITH_USER_TRACKING and PGMPOOL_WITH_MONITORING.
113 */
114#define PGMPOOL_WITH_CACHE
115
116/** @def PGMPOOL_WITH_MIXED_PT_CR3
117 * When defined, we'll deal with 'uncachable' pages.
118 */
119#ifdef PGMPOOL_WITH_CACHE
120# define PGMPOOL_WITH_MIXED_PT_CR3
121#endif
122
123/** @def PGMPOOL_WITH_MONITORING
124 * Monitor the guest pages which are shadowed.
125 * When this is enabled, PGMPOOL_WITH_CACHE or PGMPOOL_WITH_GCPHYS_TRACKING must
126 * be enabled as well.
127 * @remark doesn't really work without caching now. (Mixed PT/CR3 change.)
128 */
129#ifdef PGMPOOL_WITH_CACHE
130# define PGMPOOL_WITH_MONITORING
131#endif
132
133/** @def PGMPOOL_WITH_GCPHYS_TRACKING
134 * Tracking the of shadow pages mapping guest physical pages.
135 *
136 * This is very expensive, the current cache prototype is trying to figure out
137 * whether it will be acceptable with an agressive caching policy.
138 */
139#if defined(PGMPOOL_WITH_CACHE) || defined(PGMPOOL_WITH_MONITORING)
140# define PGMPOOL_WITH_GCPHYS_TRACKING
141#endif
142
143/** @def PGMPOOL_WITH_USER_TRACKNG
144 * Tracking users of shadow pages. This is required for the linking of shadow page
145 * tables and physical guest addresses.
146 */
147#if defined(PGMPOOL_WITH_GCPHYS_TRACKING) || defined(PGMPOOL_WITH_CACHE) || defined(PGMPOOL_WITH_MONITORING)
148# define PGMPOOL_WITH_USER_TRACKING
149#endif
150
151/** @def PGMPOOL_CFG_MAX_GROW
152 * The maximum number of pages to add to the pool in one go.
153 */
154#define PGMPOOL_CFG_MAX_GROW (_256K >> PAGE_SHIFT)
155
156/** @def VBOX_STRICT_PGM_HANDLER_VIRTUAL
157 * Enables some extra assertions for virtual handlers (mainly phys2virt related).
158 */
159#ifdef VBOX_STRICT
160# define VBOX_STRICT_PGM_HANDLER_VIRTUAL
161#endif
162/** @} */
163
164
165/** @name PDPTR and PML4 flags.
166 * These are placed in the three bits available for system programs in
167 * the PDPTR and PML4 entries.
168 * @{ */
169/** The entry is a permanent one and it's must always be present.
170 * Never free such an entry. */
171#define PGM_PLXFLAGS_PERMANENT RT_BIT_64(10)
172/** @} */
173
174/** @name Page directory flags.
175 * These are placed in the three bits available for system programs in
176 * the page directory entries.
177 * @{ */
178/** Mapping (hypervisor allocated pagetable). */
179#define PGM_PDFLAGS_MAPPING RT_BIT_64(10)
180/** Made read-only to facilitate dirty bit tracking. */
181#define PGM_PDFLAGS_TRACK_DIRTY RT_BIT_64(11)
182/** @} */
183
184/** @name Page flags.
185 * These are placed in the three bits available for system programs in
186 * the page entries.
187 * @{ */
188/** Made read-only to facilitate dirty bit tracking. */
189#define PGM_PTFLAGS_TRACK_DIRTY RT_BIT_64(9)
190
191#ifndef PGM_PTFLAGS_CSAM_VALIDATED
192/** Scanned and approved by CSAM (tm).
193 * NOTE: Must be identical to the one defined in CSAMInternal.h!!
194 * @todo Move PGM_PTFLAGS_* and PGM_PDFLAGS_* to VBox/pgm.h. */
195#define PGM_PTFLAGS_CSAM_VALIDATED RT_BIT_64(11)
196#endif
197/** @} */
198
199/** @name Defines used to indicate the shadow and guest paging in the templates.
200 * @{ */
201#define PGM_TYPE_REAL 1
202#define PGM_TYPE_PROT 2
203#define PGM_TYPE_32BIT 3
204#define PGM_TYPE_PAE 4
205#define PGM_TYPE_AMD64 5
206/** @} */
207
208/** Macro for checking if the guest is using paging.
209 * @param uType PGM_TYPE_*
210 * @remark ASSUMES certain order of the PGM_TYPE_* values.
211 */
212#define PGM_WITH_PAGING(uType) ((uType) >= PGM_TYPE_32BIT)
213
214
215/** @def PGM_HCPHYS_2_PTR
216 * Maps a HC physical page pool address to a virtual address.
217 *
218 * @returns VBox status code.
219 * @param pVM The VM handle.
220 * @param HCPhys The HC physical address to map to a virtual one.
221 * @param ppv Where to store the virtual address. No need to cast this.
222 *
223 * @remark In GC this uses PGMGCDynMapHCPage(), so it will consume of the
224 * small page window employeed by that function. Be careful.
225 * @remark There is no need to assert on the result.
226 */
227#ifdef IN_GC
228# define PGM_HCPHYS_2_PTR(pVM, HCPhys, ppv) PGMGCDynMapHCPage(pVM, HCPhys, (void **)(ppv))
229#else
230# define PGM_HCPHYS_2_PTR(pVM, HCPhys, ppv) MMPagePhys2PageEx(pVM, HCPhys, (void **)(ppv))
231#endif
232
233/** @def PGM_GCPHYS_2_PTR
234 * Maps a GC physical page address to a virtual address.
235 *
236 * @returns VBox status code.
237 * @param pVM The VM handle.
238 * @param GCPhys The GC physical address to map to a virtual one.
239 * @param ppv Where to store the virtual address. No need to cast this.
240 *
241 * @remark In GC this uses PGMGCDynMapGCPage(), so it will consume of the
242 * small page window employeed by that function. Be careful.
243 * @remark There is no need to assert on the result.
244 */
245#ifdef IN_GC
246# define PGM_GCPHYS_2_PTR(pVM, GCPhys, ppv) PGMGCDynMapGCPage(pVM, GCPhys, (void **)(ppv))
247#else
248# define PGM_GCPHYS_2_PTR(pVM, GCPhys, ppv) PGMPhysGCPhys2HCPtr(pVM, GCPhys, 1 /* one page only */, (void **)(ppv)) /** @todo this isn't asserting, use PGMRamGCPhys2HCPtr! */
249#endif
250
251/** @def PGM_GCPHYS_2_PTR_EX
252 * Maps a unaligned GC physical page address to a virtual address.
253 *
254 * @returns VBox status code.
255 * @param pVM The VM handle.
256 * @param GCPhys The GC physical address to map to a virtual one.
257 * @param ppv Where to store the virtual address. No need to cast this.
258 *
259 * @remark In GC this uses PGMGCDynMapGCPage(), so it will consume of the
260 * small page window employeed by that function. Be careful.
261 * @remark There is no need to assert on the result.
262 */
263#ifdef IN_GC
264# define PGM_GCPHYS_2_PTR_EX(pVM, GCPhys, ppv) PGMGCDynMapGCPageEx(pVM, GCPhys, (void **)(ppv))
265#else
266# define PGM_GCPHYS_2_PTR_EX(pVM, GCPhys, ppv) PGMPhysGCPhys2HCPtr(pVM, GCPhys, 1 /* one page only */, (void **)(ppv)) /** @todo this isn't asserting, use PGMRamGCPhys2HCPtr! */
267#endif
268
269/** @def PGM_INVL_PG
270 * Invalidates a page when in GC does nothing in HC.
271 *
272 * @param GCVirt The virtual address of the page to invalidate.
273 */
274#ifdef IN_GC
275# define PGM_INVL_PG(GCVirt) ASMInvalidatePage((void *)(GCVirt))
276#else
277# define PGM_INVL_PG(GCVirt) ((void)0)
278#endif
279
280/** @def PGM_INVL_BIG_PG
281 * Invalidates a 4MB page directory entry when in GC does nothing in HC.
282 *
283 * @param GCVirt The virtual address within the page directory to invalidate.
284 */
285#ifdef IN_GC
286# define PGM_INVL_BIG_PG(GCVirt) ASMReloadCR3()
287#else
288# define PGM_INVL_BIG_PG(GCVirt) ((void)0)
289#endif
290
291/** @def PGM_INVL_GUEST_TLBS()
292 * Invalidates all guest TLBs.
293 */
294#ifdef IN_GC
295# define PGM_INVL_GUEST_TLBS() ASMReloadCR3()
296#else
297# define PGM_INVL_GUEST_TLBS() ((void)0)
298#endif
299
300
301/**
302 * Structure for tracking GC Mappings.
303 *
304 * This structure is used by linked list in both GC and HC.
305 */
306typedef struct PGMMAPPING
307{
308 /** Pointer to next entry. */
309 R3PTRTYPE(struct PGMMAPPING *) pNextR3;
310 /** Pointer to next entry. */
311 R0PTRTYPE(struct PGMMAPPING *) pNextR0;
312 /** Pointer to next entry. */
313 GCPTRTYPE(struct PGMMAPPING *) pNextGC;
314 /** Start Virtual address. */
315 RTGCUINTPTR GCPtr;
316 /** Last Virtual address (inclusive). */
317 RTGCUINTPTR GCPtrLast;
318 /** Range size (bytes). */
319 RTGCUINTPTR cb;
320 /** Pointer to relocation callback function. */
321 R3PTRTYPE(PFNPGMRELOCATE) pfnRelocate;
322 /** User argument to the callback. */
323 R3PTRTYPE(void *) pvUser;
324 /** Mapping description / name. For easing debugging. */
325 R3PTRTYPE(const char *) pszDesc;
326 /** Number of page tables. */
327 RTUINT cPTs;
328#if HC_ARCH_BITS != GC_ARCH_BITS
329 RTUINT uPadding0; /**< Alignment padding. */
330#endif
331 /** Array of page table mapping data. Each entry
332 * describes one page table. The array can be longer
333 * than the declared length.
334 */
335 struct
336 {
337 /** The HC physical address of the page table. */
338 RTHCPHYS HCPhysPT;
339 /** The HC physical address of the first PAE page table. */
340 RTHCPHYS HCPhysPaePT0;
341 /** The HC physical address of the second PAE page table. */
342 RTHCPHYS HCPhysPaePT1;
343 /** The HC virtual address of the 32-bit page table. */
344 R3PTRTYPE(PVBOXPT) pPTR3;
345 /** The HC virtual address of the two PAE page table. (i.e 1024 entries instead of 512) */
346 R3PTRTYPE(PX86PTPAE) paPaePTsR3;
347 /** The GC virtual address of the 32-bit page table. */
348 GCPTRTYPE(PVBOXPT) pPTGC;
349 /** The GC virtual address of the two PAE page table. */
350 GCPTRTYPE(PX86PTPAE) paPaePTsGC;
351 /** The GC virtual address of the 32-bit page table. */
352 R0PTRTYPE(PVBOXPT) pPTR0;
353 /** The GC virtual address of the two PAE page table. */
354 R0PTRTYPE(PX86PTPAE) paPaePTsR0;
355 } aPTs[1];
356} PGMMAPPING;
357/** Pointer to structure for tracking GC Mappings. */
358typedef struct PGMMAPPING *PPGMMAPPING;
359
360
361/**
362 * Physical page access handler structure.
363 *
364 * This is used to keep track of physical address ranges
365 * which are being monitored in some kind of way.
366 */
367typedef struct PGMPHYSHANDLER
368{
369 AVLROGCPHYSNODECORE Core;
370 /** Access type. */
371 PGMPHYSHANDLERTYPE enmType;
372 /** Number of pages to update. */
373 uint32_t cPages;
374 /** Pointer to R3 callback function. */
375 R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3;
376 /** User argument for R3 handlers. */
377 R3PTRTYPE(void *) pvUserR3;
378 /** Pointer to R0 callback function. */
379 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0;
380 /** User argument for R0 handlers. */
381 R0PTRTYPE(void *) pvUserR0;
382 /** Pointer to GC callback function. */
383 GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnHandlerGC;
384 /** User argument for GC handlers. */
385 GCPTRTYPE(void *) pvUserGC;
386 /** Description / Name. For easing debugging. */
387 R3PTRTYPE(const char *) pszDesc;
388#ifdef VBOX_WITH_STATISTICS
389 /** Profiling of this handler. */
390 STAMPROFILE Stat;
391#endif
392} PGMPHYSHANDLER;
393/** Pointer to a physical page access handler structure. */
394typedef PGMPHYSHANDLER *PPGMPHYSHANDLER;
395
396
397/**
398 * Cache node for the physical addresses covered by a virtual handler.
399 */
400typedef struct PGMPHYS2VIRTHANDLER
401{
402 /** Core node for the tree based on physical ranges. */
403 AVLROGCPHYSNODECORE Core;
404 /** Offset from this struct to the PGMVIRTHANDLER structure. */
405 int32_t offVirtHandler;
406 /** Offset of the next alias relative to this one.
407 * Bit 0 is used for indicating whether we're in the tree.
408 * Bit 1 is used for indicating that we're the head node.
409 */
410 int32_t offNextAlias;
411} PGMPHYS2VIRTHANDLER;
412/** Pointer to a phys to virtual handler structure. */
413typedef PGMPHYS2VIRTHANDLER *PPGMPHYS2VIRTHANDLER;
414
415/** The bit in PGMPHYS2VIRTHANDLER::offNextAlias used to indicate that the
416 * node is in the tree. */
417#define PGMPHYS2VIRTHANDLER_IN_TREE RT_BIT(0)
418/** The bit in PGMPHYS2VIRTHANDLER::offNextAlias used to indicate that the
419 * node is in the head of an alias chain.
420 * The PGMPHYS2VIRTHANDLER_IN_TREE is always set if this bit is set. */
421#define PGMPHYS2VIRTHANDLER_IS_HEAD RT_BIT(1)
422/** The mask to apply to PGMPHYS2VIRTHANDLER::offNextAlias to get the offset. */
423#define PGMPHYS2VIRTHANDLER_OFF_MASK (~(int32_t)3)
424
425
426/**
427 * Virtual page access handler structure.
428 *
429 * This is used to keep track of virtual address ranges
430 * which are being monitored in some kind of way.
431 */
432typedef struct PGMVIRTHANDLER
433{
434 /** Core node for the tree based on virtual ranges. */
435 AVLROGCPTRNODECORE Core;
436 /** Number of cache pages. */
437 uint32_t u32Padding;
438 /** Access type. */
439 PGMVIRTHANDLERTYPE enmType;
440 /** Number of cache pages. */
441 uint32_t cPages;
442
443/** @todo The next two members are redundant. It adds some readability though. */
444 /** Start of the range. */
445 RTGCPTR GCPtr;
446 /** End of the range (exclusive). */
447 RTGCPTR GCPtrLast;
448 /** Size of the range (in bytes). */
449 RTGCUINTPTR cb;
450 /** Pointer to the GC callback function. */
451 GCPTRTYPE(PFNPGMGCVIRTHANDLER) pfnHandlerGC;
452 /** Pointer to the HC callback function for invalidation. */
453 R3PTRTYPE(PFNPGMHCVIRTINVALIDATE) pfnInvalidateHC;
454 /** Pointer to the HC callback function. */
455 R3PTRTYPE(PFNPGMHCVIRTHANDLER) pfnHandlerHC;
456 /** Description / Name. For easing debugging. */
457 R3PTRTYPE(const char *) pszDesc;
458#ifdef VBOX_WITH_STATISTICS
459 /** Profiling of this handler. */
460 STAMPROFILE Stat;
461#endif
462 /** Array of cached physical addresses for the monitored ranged. */
463 PGMPHYS2VIRTHANDLER aPhysToVirt[HC_ARCH_BITS == 32 ? 1 : 2];
464} PGMVIRTHANDLER;
465/** Pointer to a virtual page access handler structure. */
466typedef PGMVIRTHANDLER *PPGMVIRTHANDLER;
467
468
469/**
470 * Page type.
471 * @remarks This enum has to fit in a 3-bit field (see PGMPAGE::u3Type).
472 * @todo convert to \#defines.
473 */
474typedef enum PGMPAGETYPE
475{
476 /** The usual invalid zero entry. */
477 PGMPAGETYPE_INVALID = 0,
478 /** RAM page. (RWX) */
479 PGMPAGETYPE_RAM,
480 /** MMIO2 page. (RWX) */
481 PGMPAGETYPE_MMIO2,
482 /** Shadowed ROM. (RWX) */
483 PGMPAGETYPE_ROM_SHADOW,
484 /** ROM page. (R-X) */
485 PGMPAGETYPE_ROM,
486 /** MMIO page. (---) */
487 PGMPAGETYPE_MMIO,
488 /** End of valid entries. */
489 PGMPAGETYPE_END
490} PGMPAGETYPE;
491AssertCompile(PGMPAGETYPE_END < 7);
492
493/** @name Page type predicates.
494 * @{ */
495#define PGMPAGETYPE_IS_READABLE(type) ( (type) <= PGMPAGETYPE_ROM )
496#define PGMPAGETYPE_IS_WRITEABLE(type) ( (type) <= PGMPAGETYPE_ROM_SHADOW )
497#define PGMPAGETYPE_IS_RWX(type) ( (type) <= PGMPAGETYPE_ROM_SHADOW )
498#define PGMPAGETYPE_IS_ROX(type) ( (type) == PGMPAGETYPE_ROM )
499#define PGMPAGETYPE_IS_NP(type) ( (type) == PGMPAGETYPE_MMIO )
500/** @} */
501
502
503/**
504 * A Physical Guest Page tracking structure.
505 *
506 * The format of this structure is complicated because we have to fit a lot
507 * of information into as few bits as possible. The format is also subject
508 * to change (there is one comming up soon). Which means that for we'll be
509 * using PGM_PAGE_GET_*, PGM_PAGE_IS_ and PGM_PAGE_SET_* macros for *all*
510 * accessess to the structure.
511 */
512typedef struct PGMPAGE
513{
514 /** The physical address and a whole lot of other stuff. All bits are used! */
515 RTHCPHYS HCPhys;
516 /** The page state. */
517 uint32_t u2StateX : 2;
518 /** Flag indicating that a write monitored page was written to when set. */
519 uint32_t fWrittenToX : 1;
520 /** For later. */
521 uint32_t fSomethingElse : 1;
522 /** The Page ID.
523 * @todo Merge with HCPhys once we've liberated HCPhys of its stuff.
524 * The HCPhys will be 100% static. */
525 uint32_t idPageX : 28;
526 /** The page type (PGMPAGETYPE). */
527 uint32_t u3Type : 3;
528 /** The physical handler state (PGM_PAGE_HNDL_PHYS_STATE*) */
529 uint32_t u2HandlerPhysStateX : 2;
530 /** The virtual handler state (PGM_PAGE_HNDL_VIRT_STATE*) */
531 uint32_t u2HandlerVirtStateX : 2;
532 uint32_t u29B : 25;
533} PGMPAGE;
534AssertCompileSize(PGMPAGE, 16);
535/** Pointer to a physical guest page. */
536typedef PGMPAGE *PPGMPAGE;
537/** Pointer to a const physical guest page. */
538typedef const PGMPAGE *PCPGMPAGE;
539/** Pointer to a physical guest page pointer. */
540typedef PPGMPAGE *PPPGMPAGE;
541
542
543/**
544 * Clears the page structure.
545 * @param pPage Pointer to the physical guest page tracking structure.
546 */
547#define PGM_PAGE_CLEAR(pPage) \
548 do { \
549 (pPage)->HCPhys = 0; \
550 (pPage)->u2StateX = 0; \
551 (pPage)->fWrittenToX = 0; \
552 (pPage)->fSomethingElse = 0; \
553 (pPage)->idPageX = 0; \
554 (pPage)->u3Type = 0; \
555 (pPage)->u29B = 0; \
556 } while (0)
557
558/**
559 * Clears the page structure.
560 * @param pPage Pointer to the physical guest page tracking structure.
561 */
562#define PGM_PAGE_INIT(pPage, _HCPhys, _idPage, _uType, _uState) \
563 do { \
564 (pPage)->HCPhys = (_HCPhys); \
565 (pPage)->u2StateX = (_uState); \
566 (pPage)->fWrittenToX = 0; \
567 (pPage)->fSomethingElse = 0; \
568 (pPage)->idPageX = (_idPage); \
569 (pPage)->u3Type = (_uType); \
570 (pPage)->u29B = 0; \
571 } while (0)
572
573/**
574 * Clears the page structure.
575 * @param pPage Pointer to the physical guest page tracking structure.
576 */
577#ifdef VBOX_WITH_NEW_PHYS_CODE
578# define PGM_PAGE_INIT_ZERO(pPage, pVM, _uType) \
579 PGM_PAGE_INIT(pPage, (pVM)->pgm.s.HCPhysZeroPg, NIL_GMM_PAGEID, PGM_PAGE_STATE_ZERO, (_uType))
580#else
581# define PGM_PAGE_INIT_ZERO(pPage, pVM, _uType) \
582 PGM_PAGE_INIT(pPage, 0, NIL_GMM_PAGEID, PGM_PAGE_STATE_ZERO, (_uType))
583#endif
584/** Temporary hack. Replaced by PGM_PAGE_INIT_ZERO once the old code is kicked out. */
585# define PGM_PAGE_INIT_ZERO_REAL(pPage, pVM, _uType) \
586 PGM_PAGE_INIT(pPage, (pVM)->pgm.s.HCPhysZeroPg, NIL_GMM_PAGEID, PGM_PAGE_STATE_ZERO, (_uType))
587
588
589/** @name The Page state, PGMPAGE::u2StateX.
590 * @{ */
591/** The zero page.
592 * This is a per-VM page that's never ever mapped writable. */
593#define PGM_PAGE_STATE_ZERO 0
594/** A allocated page.
595 * This is a per-VM page allocated from the page pool.
596 */
597#define PGM_PAGE_STATE_ALLOCATED 1
598/** A allocated page that's being monitored for writes.
599 * The shadow page table mappings are read-only. When a write occurs, the
600 * fWrittenTo member is set, the page remapped as read-write and the state
601 * moved back to allocated. */
602#define PGM_PAGE_STATE_WRITE_MONITORED 2
603/** The page is shared, aka. copy-on-write.
604 * This is a page that's shared with other VMs. */
605#define PGM_PAGE_STATE_SHARED 3
606/** @} */
607
608
609/**
610 * Gets the page state.
611 * @returns page state (PGM_PAGE_STATE_*).
612 * @param pPage Pointer to the physical guest page tracking structure.
613 */
614#define PGM_PAGE_GET_STATE(pPage) ( (pPage)->u2StateX )
615
616/**
617 * Sets the page state.
618 * @param pPage Pointer to the physical guest page tracking structure.
619 * @param _uState The new page state.
620 */
621#define PGM_PAGE_SET_STATE(pPage, _uState) \
622 do { (pPage)->u2StateX = (_uState); } while (0)
623
624
625/**
626 * Gets the host physical address of the guest page.
627 * @returns host physical address (RTHCPHYS).
628 * @param pPage Pointer to the physical guest page tracking structure.
629 */
630#define PGM_PAGE_GET_HCPHYS(pPage) ( (pPage)->HCPhys & UINT64_C(0x0000fffffffff000) )
631
632/**
633 * Sets the host physical address of the guest page.
634 * @param pPage Pointer to the physical guest page tracking structure.
635 * @param _HCPhys The new host physical address.
636 */
637#define PGM_PAGE_SET_HCPHYS(pPage, _HCPhys) \
638 do { (pPage)->HCPhys = (((pPage)->HCPhys) & UINT64_C(0xffff000000000fff)) \
639 | ((_HCPhys) & UINT64_C(0x0000fffffffff000)); } while (0)
640
641/**
642 * Get the Page ID.
643 * @returns The Page ID; NIL_GMM_PAGEID if it's a ZERO page.
644 * @param pPage Pointer to the physical guest page tracking structure.
645 */
646#define PGM_PAGE_GET_PAGEID(pPage) ( (pPage)->idPageX )
647/* later:
648#define PGM_PAGE_GET_PAGEID(pPage) ( ((uint32_t)(pPage)->HCPhys >> (48 - 12))
649 | ((uint32_t)(pPage)->HCPhys & 0xfff) )
650*/
651/**
652 * Sets the Page ID.
653 * @param pPage Pointer to the physical guest page tracking structure.
654 */
655#define PGM_PAGE_SET_PAGEID(pPage, _idPage) do { (pPage)->idPageX = (_idPage); } while (0)
656/* later:
657#define PGM_PAGE_SET_PAGEID(pPage, _idPage) do { (pPage)->HCPhys = (((pPage)->HCPhys) & UINT64_C(0x0000fffffffff000)) \
658 | ((_idPage) & 0xfff) \
659 | (((_idPage) & 0x0ffff000) << (48-12)); } while (0)
660*/
661
662/**
663 * Get the Chunk ID.
664 * @returns The Chunk ID; NIL_GMM_CHUNKID if it's a ZERO page.
665 * @param pPage Pointer to the physical guest page tracking structure.
666 */
667#define PGM_PAGE_GET_CHUNKID(pPage) ( (pPage)->idPageX >> GMM_CHUNKID_SHIFT )
668/* later:
669#if GMM_CHUNKID_SHIFT == 12
670# define PGM_PAGE_GET_CHUNKID(pPage) ( (uint32_t)((pPage)->HCPhys >> 48) )
671#elif GMM_CHUNKID_SHIFT > 12
672# define PGM_PAGE_GET_CHUNKID(pPage) ( (uint32_t)((pPage)->HCPhys >> (48 + (GMM_CHUNKID_SHIFT - 12)) )
673#elif GMM_CHUNKID_SHIFT < 12
674# define PGM_PAGE_GET_CHUNKID(pPage) ( ( (uint32_t)((pPage)->HCPhys >> 48) << (12 - GMM_CHUNKID_SHIFT) ) \
675 | ( (uint32_t)((pPage)->HCPhys & 0xfff) >> GMM_CHUNKID_SHIFT ) )
676#else
677# error "GMM_CHUNKID_SHIFT isn't defined or something."
678#endif
679*/
680
681/**
682 * Get the index of the page within the allocaiton chunk.
683 * @returns The page index.
684 * @param pPage Pointer to the physical guest page tracking structure.
685 */
686#define PGM_PAGE_GET_PAGE_IN_CHUNK(pPage) ( (pPage)->idPageX & GMM_PAGEID_IDX_MASK )
687/* later:
688#if GMM_CHUNKID_SHIFT <= 12
689# define PGM_PAGE_GET_PAGE_IN_CHUNK(pPage) ( (uint32_t)((pPage)->HCPhys & GMM_PAGEID_IDX_MASK) )
690#else
691# define PGM_PAGE_GET_PAGE_IN_CHUNK(pPage) ( (uint32_t)((pPage)->HCPhys & 0xfff) \
692 | ( (uint32_t)((pPage)->HCPhys >> 48) & (RT_BIT_32(GMM_CHUNKID_SHIFT - 12) - 1) ) )
693#endif
694*/
695
696
697/**
698 * Gets the page type.
699 * @returns The page type.
700 * @param pPage Pointer to the physical guest page tracking structure.
701 */
702#define PGM_PAGE_GET_TYPE(pPage) (pPage)->u3Type
703
704/**
705 * Sets the page type.
706 * @param pPage Pointer to the physical guest page tracking structure.
707 * @param _enmType The new page type (PGMPAGETYPE).
708 */
709#define PGM_PAGE_SET_TYPE(pPage, _enmType) \
710 do { (pPage)->u3Type = (_enmType); } while (0)
711
712
713/**
714 * Checks if the page is 'reserved'.
715 * @returns true/false.
716 * @param pPage Pointer to the physical guest page tracking structure.
717 */
718#define PGM_PAGE_IS_RESERVED(pPage) ( !!((pPage)->HCPhys & MM_RAM_FLAGS_RESERVED) )
719
720/**
721 * Checks if the page is marked for MMIO.
722 * @returns true/false.
723 * @param pPage Pointer to the physical guest page tracking structure.
724 */
725#define PGM_PAGE_IS_MMIO(pPage) ( !!((pPage)->HCPhys & MM_RAM_FLAGS_MMIO) )
726
727/**
728 * Checks if the page is backed by the ZERO page.
729 * @returns true/false.
730 * @param pPage Pointer to the physical guest page tracking structure.
731 */
732#define PGM_PAGE_IS_ZERO(pPage) ( (pPage)->u2StateX == PGM_PAGE_STATE_ZERO )
733
734/**
735 * Checks if the page is backed by a SHARED page.
736 * @returns true/false.
737 * @param pPage Pointer to the physical guest page tracking structure.
738 */
739#define PGM_PAGE_IS_SHARED(pPage) ( (pPage)->u2StateX == PGM_PAGE_STATE_SHARED )
740
741
742/**
743 * Marks the paget as written to (for GMM change monitoring).
744 * @param pPage Pointer to the physical guest page tracking structure.
745 */
746#define PGM_PAGE_SET_WRITTEN_TO(pPage) do { (pPage)->fWrittenToX = 1; } while (0)
747
748/**
749 * Clears the written-to indicator.
750 * @param pPage Pointer to the physical guest page tracking structure.
751 */
752#define PGM_PAGE_CLEAR_WRITTEN_TO(pPage) do { (pPage)->fWrittenToX = 0; } while (0)
753
754/**
755 * Checks if the page was marked as written-to.
756 * @returns true/false.
757 * @param pPage Pointer to the physical guest page tracking structure.
758 */
759#define PGM_PAGE_IS_WRITTEN_TO(pPage) ( (pPage)->fWrittenToX )
760
761
762/** @name Physical Access Handler State values (PGMPAGE::u2HandlerPhysStateX).
763 *
764 * @remarks The values are assigned in order of priority, so we can calculate
765 * the correct state for a page with different handlers installed.
766 * @{ */
767/** No handler installed. */
768#define PGM_PAGE_HNDL_PHYS_STATE_NONE 0
769/** Monitoring is temporarily disabled. */
770#define PGM_PAGE_HNDL_PHYS_STATE_DISABLED 1
771/** Write access is monitored. */
772#define PGM_PAGE_HNDL_PHYS_STATE_WRITE 2
773/** All access is monitored. */
774#define PGM_PAGE_HNDL_PHYS_STATE_ALL 3
775/** @} */
776
777/**
778 * Gets the physical access handler state of a page.
779 * @returns PGM_PAGE_HNDL_PHYS_STATE_* value.
780 * @param pPage Pointer to the physical guest page tracking structure.
781 */
782#define PGM_PAGE_GET_HNDL_PHYS_STATE(pPage) ( (pPage)->u2HandlerPhysStateX )
783
784/**
785 * Sets the physical access handler state of a page.
786 * @param pPage Pointer to the physical guest page tracking structure.
787 * @param _uState The new state value.
788 */
789#define PGM_PAGE_SET_HNDL_PHYS_STATE(pPage, _uState) \
790 do { (pPage)->u2HandlerPhysStateX = (_uState); } while (0)
791
792/**
793 * Checks if the page has any physical access handlers, including temporariliy disabled ones.
794 * @returns true/false
795 * @param pPage Pointer to the physical guest page tracking structure.
796 */
797#define PGM_PAGE_HAVE_ANY_PHYSICAL_HANDLERS(pPage) ( (pPage)->u2HandlerPhysStateX != PGM_PAGE_HNDL_PHYS_STATE_NONE )
798
799/**
800 * Checks if the page has any active physical access handlers.
801 * @returns true/false
802 * @param pPage Pointer to the physical guest page tracking structure.
803 */
804#define PGM_PAGE_HAVE_ACTIVE_PHYSICAL_HANDLERS(pPage) ( (pPage)->u2HandlerPhysStateX >= PGM_PAGE_HNDL_PHYS_STATE_WRITE )
805
806
807/** @name Virtual Access Handler State values (PGMPAGE::u2HandlerVirtStateX).
808 *
809 * @remarks The values are assigned in order of priority, so we can calculate
810 * the correct state for a page with different handlers installed.
811 * @{ */
812/** No handler installed. */
813#define PGM_PAGE_HNDL_VIRT_STATE_NONE 0
814/* 1 is reserved so the lineup is identical with the physical ones. */
815/** Write access is monitored. */
816#define PGM_PAGE_HNDL_VIRT_STATE_WRITE 2
817/** All access is monitored. */
818#define PGM_PAGE_HNDL_VIRT_STATE_ALL 3
819/** @} */
820
821/**
822 * Gets the virtual access handler state of a page.
823 * @returns PGM_PAGE_HNDL_VIRT_STATE_* value.
824 * @param pPage Pointer to the physical guest page tracking structure.
825 */
826#define PGM_PAGE_GET_HNDL_VIRT_STATE(pPage) ( (pPage)->u2HandlerVirtStateX )
827
828/**
829 * Sets the virtual access handler state of a page.
830 * @param pPage Pointer to the physical guest page tracking structure.
831 * @param _uState The new state value.
832 */
833#define PGM_PAGE_SET_HNDL_VIRT_STATE(pPage, _uState) \
834 do { (pPage)->u2HandlerVirtStateX = (_uState); } while (0)
835
836/**
837 * Checks if the page has any virtual access handlers.
838 * @returns true/false
839 * @param pPage Pointer to the physical guest page tracking structure.
840 */
841#define PGM_PAGE_HAVE_ANY_VIRTUAL_HANDLERS(pPage) ( (pPage)->u2HandlerVirtStateX != PGM_PAGE_HNDL_VIRT_STATE_NONE )
842
843/**
844 * Same as PGM_PAGE_HAVE_ANY_VIRTUAL_HANDLERS - can't disable pages in
845 * virtual handlers.
846 * @returns true/false
847 * @param pPage Pointer to the physical guest page tracking structure.
848 */
849#define PGM_PAGE_HAVE_ACTIVE_VIRTUAL_HANDLERS(pPage) PGM_PAGE_HAVE_ANY_VIRTUAL_HANDLERS(pPage)
850
851
852
853/**
854 * Checks if the page has any access handlers, including temporarily disabled ones.
855 * @returns true/false
856 * @param pPage Pointer to the physical guest page tracking structure.
857 */
858#define PGM_PAGE_HAVE_ANY_HANDLERS(pPage) \
859 ( (pPage)->u2HandlerPhysStateX != PGM_PAGE_HNDL_PHYS_STATE_NONE \
860 || (pPage)->u2HandlerVirtStateX != PGM_PAGE_HNDL_VIRT_STATE_NONE )
861
862/**
863 * Checks if the page has any active access handlers.
864 * @returns true/false
865 * @param pPage Pointer to the physical guest page tracking structure.
866 */
867#define PGM_PAGE_HAVE_ACTIVE_HANDLERS(pPage) \
868 ( (pPage)->u2HandlerPhysStateX >= PGM_PAGE_HNDL_PHYS_STATE_WRITE \
869 || (pPage)->u2HandlerVirtStateX >= PGM_PAGE_HNDL_VIRT_STATE_WRITE )
870
871/**
872 * Checks if the page has any active access handlers catching all accesses.
873 * @returns true/false
874 * @param pPage Pointer to the physical guest page tracking structure.
875 */
876#define PGM_PAGE_HAVE_ACTIVE_ALL_HANDLERS(pPage) \
877 ( (pPage)->u2HandlerPhysStateX == PGM_PAGE_HNDL_PHYS_STATE_ALL \
878 || (pPage)->u2HandlerVirtStateX == PGM_PAGE_HNDL_VIRT_STATE_ALL )
879
880
881/**
882 * Ram range for GC Phys to HC Phys conversion.
883 *
884 * Can be used for HC Virt to GC Phys and HC Virt to HC Phys
885 * conversions too, but we'll let MM handle that for now.
886 *
887 * This structure is used by linked lists in both GC and HC.
888 */
889typedef struct PGMRAMRANGE
890{
891 /** Pointer to the next RAM range - for R3. */
892 R3PTRTYPE(struct PGMRAMRANGE *) pNextR3;
893 /** Pointer to the next RAM range - for R0. */
894 R0PTRTYPE(struct PGMRAMRANGE *) pNextR0;
895 /** Pointer to the next RAM range - for GC. */
896 GCPTRTYPE(struct PGMRAMRANGE *) pNextGC;
897#if GC_ARCH_BITS == 32
898 RTGCPTR GCPtrAlignment; /**< Pointer alignment. */
899#endif
900 /** Start of the range. Page aligned. */
901 RTGCPHYS GCPhys;
902 /** Last address in the range (inclusive). Page aligned (-1). */
903 RTGCPHYS GCPhysLast;
904 /** Size of the range. (Page aligned of course). */
905 RTGCPHYS cb;
906 /** MM_RAM_* flags */
907 uint32_t fFlags;
908#ifdef VBOX_WITH_NEW_PHYS_CODE
909 uint32_t u32Alignment; /**< alignment. */
910#else
911 /** HC virtual lookup ranges for chunks. Currently only used with MM_RAM_FLAGS_DYNAMIC_ALLOC ranges. */
912 GCPTRTYPE(PRTHCPTR) pavHCChunkGC;
913 /** HC virtual lookup ranges for chunks. Currently only used with MM_RAM_FLAGS_DYNAMIC_ALLOC ranges. */
914 R3R0PTRTYPE(PRTHCPTR) pavHCChunkHC;
915#endif
916 /** Start of the HC mapping of the range. This is only used for MMIO2. */
917 R3PTRTYPE(void *) pvHC;
918 /** The range description. */
919 R3PTRTYPE(const char *) pszDesc;
920
921#ifdef VBOX_WITH_NEW_PHYS_CODE
922 /** Padding to make aPage aligned on sizeof(PGMPAGE). */
923 uint32_t au32Reserved[1];
924#else
925# if HC_ARCH_BITS == 32 && !defined(RT_OS_WINDOWS)
926 /** Padding to make aPage aligned on sizeof(PGMPAGE). */
927// uint32_t u32Reserved[1];
928# endif
929#endif
930
931 /** Array of physical guest page tracking structures. */
932 PGMPAGE aPages[1];
933} PGMRAMRANGE;
934/** Pointer to Ram range for GC Phys to HC Phys conversion. */
935typedef PGMRAMRANGE *PPGMRAMRANGE;
936
937/** Return hc ptr corresponding to the ram range and physical offset */
938#define PGMRAMRANGE_GETHCPTR(pRam, off) \
939 (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC) ? (RTHCPTR)((RTHCUINTPTR)CTXSUFF(pRam->pavHCChunk)[(off >> PGM_DYNAMIC_CHUNK_SHIFT)] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK)) \
940 : (RTHCPTR)((RTHCUINTPTR)pRam->pvHC + off);
941
942/**
943 * Per page tracking structure for ROM image.
944 *
945 * A ROM image may have a shadow page, in which case we may have
946 * two pages backing it. This structure contains the PGMPAGE for
947 * both while PGMRAMRANGE have a copy of the active one. It is
948 * important that these aren't out of sync in any regard other
949 * than page pool tracking data.
950 */
951typedef struct PGMROMPAGE
952{
953 /** The page structure for the virgin ROM page. */
954 PGMPAGE Virgin;
955 /** The page structure for the shadow RAM page. */
956 PGMPAGE Shadow;
957 /** The current protection setting. */
958 PGMROMPROT enmProt;
959 /** Pad the structure size to a multiple of 8. */
960 uint32_t u32Padding;
961} PGMROMPAGE;
962/** Pointer to a ROM page tracking structure. */
963typedef PGMROMPAGE *PPGMROMPAGE;
964
965
966/**
967 * A registered ROM image.
968 *
969 * This is needed to keep track of ROM image since they generally
970 * intrude into a PGMRAMRANGE. It also keeps track of additional
971 * info like the two page sets (read-only virgin and read-write shadow),
972 * the current state of each page.
973 *
974 * Because access handlers cannot easily be executed in a different
975 * context, the ROM ranges needs to be accessible and in all contexts.
976 */
977typedef struct PGMROMRANGE
978{
979 /** Pointer to the next range - R3. */
980 R3PTRTYPE(struct PGMROMRANGE *) pNextR3;
981 /** Pointer to the next range - R0. */
982 R0PTRTYPE(struct PGMROMRANGE *) pNextR0;
983 /** Pointer to the next range - R0. */
984 GCPTRTYPE(struct PGMROMRANGE *) pNextGC;
985#if GC_ARCH_BITS == 32
986 RTGCPTR GCPtrAlignment; /**< Pointer alignment. */
987#endif
988 /** Address of the range. */
989 RTGCPHYS GCPhys;
990 /** Address of the last byte in the range. */
991 RTGCPHYS GCPhysLast;
992 /** Size of the range. */
993 RTGCPHYS cb;
994 /** The flags (PGMPHYS_ROM_FLAG_*). */
995 uint32_t fFlags;
996 /**< Alignment padding ensuring that aPages is sizeof(PGMROMPAGE) aligned. */
997 uint32_t au32Alignemnt[HC_ARCH_BITS == 32 ? 7 : 3];
998 /** Pointer to the original bits when PGMPHYS_ROM_FLAG_PERMANENT_BINARY was specified.
999 * This is used for strictness checks. */
1000 R3PTRTYPE(const void *) pvOriginal;
1001 /** The ROM description. */
1002 R3PTRTYPE(const char *) pszDesc;
1003 /** The per page tracking structures. */
1004 PGMROMPAGE aPages[1];
1005} PGMROMRANGE;
1006/** Pointer to a ROM range. */
1007typedef PGMROMRANGE *PPGMROMRANGE;
1008
1009
1010
1011
1012/** @todo r=bird: fix typename. */
1013/**
1014 * PGMPhysRead/Write cache entry
1015 */
1016typedef struct PGMPHYSCACHE_ENTRY
1017{
1018 /** HC pointer to physical page */
1019 R3PTRTYPE(uint8_t *) pbHC;
1020 /** GC Physical address for cache entry */
1021 RTGCPHYS GCPhys;
1022#if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32
1023 RTGCPHYS u32Padding0; /**< alignment padding. */
1024#endif
1025} PGMPHYSCACHE_ENTRY;
1026
1027/**
1028 * PGMPhysRead/Write cache to reduce REM memory access overhead
1029 */
1030typedef struct PGMPHYSCACHE
1031{
1032 /** Bitmap of valid cache entries */
1033 uint64_t aEntries;
1034 /** Cache entries */
1035 PGMPHYSCACHE_ENTRY Entry[PGM_MAX_PHYSCACHE_ENTRIES];
1036} PGMPHYSCACHE;
1037
1038
1039/** Pointer to an allocation chunk ring-3 mapping. */
1040typedef struct PGMCHUNKR3MAP *PPGMCHUNKR3MAP;
1041/** Pointer to an allocation chunk ring-3 mapping pointer. */
1042typedef PPGMCHUNKR3MAP *PPPGMCHUNKR3MAP;
1043
1044/**
1045 * Ring-3 tracking structore for an allocation chunk ring-3 mapping.
1046 *
1047 * The primary tree (Core) uses the chunk id as key.
1048 * The secondary tree (AgeCore) is used for ageing and uses ageing sequence number as key.
1049 */
1050typedef struct PGMCHUNKR3MAP
1051{
1052 /** The key is the chunk id. */
1053 AVLU32NODECORE Core;
1054 /** The key is the ageing sequence number. */
1055 AVLLU32NODECORE AgeCore;
1056 /** The current age thingy. */
1057 uint32_t iAge;
1058 /** The current reference count. */
1059 uint32_t volatile cRefs;
1060 /** The current permanent reference count. */
1061 uint32_t volatile cPermRefs;
1062 /** The mapping address. */
1063 void *pv;
1064} PGMCHUNKR3MAP;
1065
1066/**
1067 * Allocation chunk ring-3 mapping TLB entry.
1068 */
1069typedef struct PGMCHUNKR3MAPTLBE
1070{
1071 /** The chunk id. */
1072 uint32_t volatile idChunk;
1073#if HC_ARCH_BITS == 64
1074 uint32_t u32Padding; /**< alignment padding. */
1075#endif
1076 /** The chunk map. */
1077 R3R0PTRTYPE(PPGMCHUNKR3MAP) volatile pChunk;
1078} PGMCHUNKR3MAPTLBE;
1079/** Pointer to the an allocation chunk ring-3 mapping TLB entry. */
1080typedef PGMCHUNKR3MAPTLBE *PPGMCHUNKR3MAPTLBE;
1081
1082/** The number of TLB entries in PGMCHUNKR3MAPTLB.
1083 * @remark Must be a power of two value. */
1084#define PGM_CHUNKR3MAPTLB_ENTRIES 32
1085
1086/**
1087 * Allocation chunk ring-3 mapping TLB.
1088 *
1089 * @remarks We use a TLB to speed up lookups by avoiding walking the AVL.
1090 * At first glance this might look kinda odd since AVL trees are
1091 * supposed to give the most optimial lookup times of all trees
1092 * due to their balancing. However, take a tree with 1023 nodes
1093 * in it, that's 10 levels, meaning that most searches has to go
1094 * down 9 levels before they find what they want. This isn't fast
1095 * compared to a TLB hit. There is the factor of cache misses,
1096 * and of course the problem with trees and branch prediction.
1097 * This is why we use TLBs in front of most of the trees.
1098 *
1099 * @todo Generalize this TLB + AVL stuff, shouldn't be all that
1100 * difficult when we switch to inlined AVL trees (from kStuff).
1101 */
1102typedef struct PGMCHUNKR3MAPTLB
1103{
1104 /** The TLB entries. */
1105 PGMCHUNKR3MAPTLBE aEntries[PGM_CHUNKR3MAPTLB_ENTRIES];
1106} PGMCHUNKR3MAPTLB;
1107
1108/**
1109 * Calculates the index of a guest page in the Ring-3 Chunk TLB.
1110 * @returns Chunk TLB index.
1111 * @param idChunk The Chunk ID.
1112 */
1113#define PGM_CHUNKR3MAPTLB_IDX(idChunk) ( (idChunk) & (PGM_CHUNKR3MAPTLB_ENTRIES - 1) )
1114
1115
1116/**
1117 * Ring-3 guest page mapping TLB entry.
1118 * @remarks used in ring-0 as well at the moment.
1119 */
1120typedef struct PGMPAGER3MAPTLBE
1121{
1122 /** Address of the page. */
1123 RTGCPHYS volatile GCPhys;
1124 /** The guest page. */
1125 R3R0PTRTYPE(PPGMPAGE) volatile pPage;
1126 /** Pointer to the page mapping tracking structure, PGMCHUNKR3MAP. */
1127 R3R0PTRTYPE(PPGMCHUNKR3MAP) volatile pMap;
1128 /** The address */
1129 R3R0PTRTYPE(void *) volatile pv;
1130#if HC_ARCH_BITS == 32
1131 uint32_t u32Padding; /**< alignment padding. */
1132#endif
1133} PGMPAGER3MAPTLBE;
1134/** Pointer to an entry in the HC physical TLB. */
1135typedef PGMPAGER3MAPTLBE *PPGMPAGER3MAPTLBE;
1136
1137
1138/** The number of entries in the ring-3 guest page mapping TLB.
1139 * @remarks The value must be a power of two. */
1140#define PGM_PAGER3MAPTLB_ENTRIES 64
1141
1142/**
1143 * Ring-3 guest page mapping TLB.
1144 * @remarks used in ring-0 as well at the moment.
1145 */
1146typedef struct PGMPAGER3MAPTLB
1147{
1148 /** The TLB entries. */
1149 PGMPAGER3MAPTLBE aEntries[PGM_PAGER3MAPTLB_ENTRIES];
1150} PGMPAGER3MAPTLB;
1151/** Pointer to the ring-3 guest page mapping TLB. */
1152typedef PGMPAGER3MAPTLB *PPGMPAGER3MAPTLB;
1153
1154/**
1155 * Calculates the index of the TLB entry for the specified guest page.
1156 * @returns Physical TLB index.
1157 * @param GCPhys The guest physical address.
1158 */
1159#define PGM_PAGER3MAPTLB_IDX(GCPhys) ( ((GCPhys) >> PAGE_SHIFT) & (PGM_PAGER3MAPTLB_ENTRIES - 1) )
1160
1161
1162/** @name Context neutrual page mapper TLB.
1163 *
1164 * Hoping to avoid some code and bug duplication parts of the GCxxx->CCPtr
1165 * code is writting in a kind of context neutrual way. Time will show whether
1166 * this actually makes sense or not...
1167 *
1168 * @{ */
1169/** @typedef PPGMPAGEMAPTLB
1170 * The page mapper TLB pointer type for the current context. */
1171/** @typedef PPGMPAGEMAPTLB
1172 * The page mapper TLB entry pointer type for the current context. */
1173/** @typedef PPGMPAGEMAPTLB
1174 * The page mapper TLB entry pointer pointer type for the current context. */
1175/** @def PGMPAGEMAPTLB_ENTRIES
1176 * The number of TLB entries in the page mapper TLB for the current context. */
1177/** @def PGM_PAGEMAPTLB_IDX
1178 * Calculate the TLB index for a guest physical address.
1179 * @returns The TLB index.
1180 * @param GCPhys The guest physical address. */
1181/** @typedef PPGMPAGEMAP
1182 * Pointer to a page mapper unit for current context. */
1183/** @typedef PPPGMPAGEMAP
1184 * Pointer to a page mapper unit pointer for current context. */
1185#ifdef IN_GC
1186// typedef PPGMPAGEGCMAPTLB PPGMPAGEMAPTLB;
1187// typedef PPGMPAGEGCMAPTLBE PPGMPAGEMAPTLBE;
1188// typedef PPGMPAGEGCMAPTLBE *PPPGMPAGEMAPTLBE;
1189# define PGM_PAGEMAPTLB_ENTRIES PGM_PAGEGCMAPTLB_ENTRIES
1190# define PGM_PAGEMAPTLB_IDX(GCPhys) PGM_PAGEGCMAPTLB_IDX(GCPhys)
1191 typedef void * PPGMPAGEMAP;
1192 typedef void ** PPPGMPAGEMAP;
1193//#elif IN_RING0
1194// typedef PPGMPAGER0MAPTLB PPGMPAGEMAPTLB;
1195// typedef PPGMPAGER0MAPTLBE PPGMPAGEMAPTLBE;
1196// typedef PPGMPAGER0MAPTLBE *PPPGMPAGEMAPTLBE;
1197//# define PGM_PAGEMAPTLB_ENTRIES PGM_PAGER0MAPTLB_ENTRIES
1198//# define PGM_PAGEMAPTLB_IDX(GCPhys) PGM_PAGER0MAPTLB_IDX(GCPhys)
1199// typedef PPGMCHUNKR0MAP PPGMPAGEMAP;
1200// typedef PPPGMCHUNKR0MAP PPPGMPAGEMAP;
1201#else
1202 typedef PPGMPAGER3MAPTLB PPGMPAGEMAPTLB;
1203 typedef PPGMPAGER3MAPTLBE PPGMPAGEMAPTLBE;
1204 typedef PPGMPAGER3MAPTLBE *PPPGMPAGEMAPTLBE;
1205# define PGM_PAGEMAPTLB_ENTRIES PGM_PAGER3MAPTLB_ENTRIES
1206# define PGM_PAGEMAPTLB_IDX(GCPhys) PGM_PAGER3MAPTLB_IDX(GCPhys)
1207 typedef PPGMCHUNKR3MAP PPGMPAGEMAP;
1208 typedef PPPGMCHUNKR3MAP PPPGMPAGEMAP;
1209#endif
1210/** @} */
1211
1212
1213/** @name PGM Pool Indexes.
1214 * Aka. the unique shadow page identifier.
1215 * @{ */
1216/** NIL page pool IDX. */
1217#define NIL_PGMPOOL_IDX 0
1218/** The first normal index. */
1219#define PGMPOOL_IDX_FIRST_SPECIAL 1
1220/** Page directory (32-bit root). */
1221#define PGMPOOL_IDX_PD 1
1222/** The extended PAE page directory (2048 entries, works as root currently). */
1223#define PGMPOOL_IDX_PAE_PD 2
1224/** Page Directory Pointer Table (PAE root, not currently used). */
1225#define PGMPOOL_IDX_PDPTR 3
1226/** Page Map Level-4 (64-bit root). */
1227#define PGMPOOL_IDX_PML4 4
1228/** The first normal index. */
1229#define PGMPOOL_IDX_FIRST 5
1230/** The last valid index. (inclusive, 14 bits) */
1231#define PGMPOOL_IDX_LAST 0x3fff
1232/** @} */
1233
1234/** The NIL index for the parent chain. */
1235#define NIL_PGMPOOL_USER_INDEX ((uint16_t)0xffff)
1236
1237/**
1238 * Node in the chain linking a shadowed page to it's parent (user).
1239 */
1240#pragma pack(1)
1241typedef struct PGMPOOLUSER
1242{
1243 /** The index to the next item in the chain. NIL_PGMPOOL_USER_INDEX is no next. */
1244 uint16_t iNext;
1245 /** The user page index. */
1246 uint16_t iUser;
1247 /** Index into the user table. */
1248 uint16_t iUserTable;
1249} PGMPOOLUSER, *PPGMPOOLUSER;
1250typedef const PGMPOOLUSER *PCPGMPOOLUSER;
1251#pragma pack()
1252
1253
1254/** The NIL index for the phys ext chain. */
1255#define NIL_PGMPOOL_PHYSEXT_INDEX ((uint16_t)0xffff)
1256
1257/**
1258 * Node in the chain of physical cross reference extents.
1259 */
1260#pragma pack(1)
1261typedef struct PGMPOOLPHYSEXT
1262{
1263 /** The index to the next item in the chain. NIL_PGMPOOL_PHYSEXT_INDEX is no next. */
1264 uint16_t iNext;
1265 /** The user page index. */
1266 uint16_t aidx[3];
1267} PGMPOOLPHYSEXT, *PPGMPOOLPHYSEXT;
1268typedef const PGMPOOLPHYSEXT *PCPGMPOOLPHYSEXT;
1269#pragma pack()
1270
1271
1272/**
1273 * The kind of page that's being shadowed.
1274 */
1275typedef enum PGMPOOLKIND
1276{
1277 /** The virtual invalid 0 entry. */
1278 PGMPOOLKIND_INVALID = 0,
1279 /** The entry is free (=unused). */
1280 PGMPOOLKIND_FREE,
1281
1282 /** Shw: 32-bit page table; Gst: no paging */
1283 PGMPOOLKIND_32BIT_PT_FOR_PHYS,
1284 /** Shw: 32-bit page table; Gst: 32-bit page table. */
1285 PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT,
1286 /** Shw: 32-bit page table; Gst: 4MB page. */
1287 PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB,
1288 /** Shw: PAE page table; Gst: no paging */
1289 PGMPOOLKIND_PAE_PT_FOR_PHYS,
1290 /** Shw: PAE page table; Gst: 32-bit page table. */
1291 PGMPOOLKIND_PAE_PT_FOR_32BIT_PT,
1292 /** Shw: PAE page table; Gst: Half of a 4MB page. */
1293 PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB,
1294 /** Shw: PAE page table; Gst: PAE page table. */
1295 PGMPOOLKIND_PAE_PT_FOR_PAE_PT,
1296 /** Shw: PAE page table; Gst: 2MB page. */
1297 PGMPOOLKIND_PAE_PT_FOR_PAE_2MB,
1298
1299 /** Shw: PAE page directory; Gst: 32-bit page directory. */
1300 PGMPOOLKIND_PAE_PD_FOR_32BIT_PD,
1301 /** Shw: PAE page directory; Gst: PAE page directory. */
1302 PGMPOOLKIND_PAE_PD_FOR_PAE_PD,
1303
1304 /** Shw: 64-bit page directory pointer table; Gst: 64-bit page directory pointer table. */
1305 PGMPOOLKIND_64BIT_PDPTR_FOR_64BIT_PDPTR,
1306
1307 /** Shw: Root 32-bit page directory. */
1308 PGMPOOLKIND_ROOT_32BIT_PD,
1309 /** Shw: Root PAE page directory */
1310 PGMPOOLKIND_ROOT_PAE_PD,
1311 /** Shw: Root PAE page directory pointer table (legacy, 4 entries). */
1312 PGMPOOLKIND_ROOT_PDPTR,
1313 /** Shw: Root page map level-4 table. */
1314 PGMPOOLKIND_ROOT_PML4,
1315
1316 /** The last valid entry. */
1317 PGMPOOLKIND_LAST = PGMPOOLKIND_ROOT_PML4
1318} PGMPOOLKIND;
1319
1320
1321/**
1322 * The tracking data for a page in the pool.
1323 */
1324typedef struct PGMPOOLPAGE
1325{
1326 /** AVL node code with the (HC) physical address of this page. */
1327 AVLOHCPHYSNODECORE Core;
1328 /** Pointer to the HC mapping of the page. */
1329 R3R0PTRTYPE(void *) pvPageHC;
1330 /** The guest physical address. */
1331 RTGCPHYS GCPhys;
1332 /** The kind of page we're shadowing. (This is really a PGMPOOLKIND enum.) */
1333 uint8_t enmKind;
1334 uint8_t bPadding;
1335 /** The index of this page. */
1336 uint16_t idx;
1337 /** The next entry in the list this page currently resides in.
1338 * It's either in the free list or in the GCPhys hash. */
1339 uint16_t iNext;
1340#ifdef PGMPOOL_WITH_USER_TRACKING
1341 /** Head of the user chain. NIL_PGMPOOL_USER_INDEX if not currently in use. */
1342 uint16_t iUserHead;
1343 /** The number of present entries. */
1344 uint16_t cPresent;
1345 /** The first entry in the table which is present. */
1346 uint16_t iFirstPresent;
1347#endif
1348#ifdef PGMPOOL_WITH_MONITORING
1349 /** The number of modifications to the monitored page. */
1350 uint16_t cModifications;
1351 /** The next modified page. NIL_PGMPOOL_IDX if tail. */
1352 uint16_t iModifiedNext;
1353 /** The previous modified page. NIL_PGMPOOL_IDX if head. */
1354 uint16_t iModifiedPrev;
1355 /** The next page sharing access handler. NIL_PGMPOOL_IDX if tail. */
1356 uint16_t iMonitoredNext;
1357 /** The previous page sharing access handler. NIL_PGMPOOL_IDX if head. */
1358 uint16_t iMonitoredPrev;
1359#endif
1360#ifdef PGMPOOL_WITH_CACHE
1361 /** The next page in the age list. */
1362 uint16_t iAgeNext;
1363 /** The previous page in the age list. */
1364 uint16_t iAgePrev;
1365#endif /* PGMPOOL_WITH_CACHE */
1366 /** Used to indicate that the page is zeroed. */
1367 bool fZeroed;
1368 /** Used to indicate that a PT has non-global entries. */
1369 bool fSeenNonGlobal;
1370 /** Used to indicate that we're monitoring writes to the guest page. */
1371 bool fMonitored;
1372 /** Used to indicate that the page is in the cache (e.g. in the GCPhys hash).
1373 * (All pages are in the age list.) */
1374 bool fCached;
1375 /** This is used by the R3 access handlers when invoked by an async thread.
1376 * It's a hack required because of REMR3NotifyHandlerPhysicalDeregister. */
1377 bool volatile fReusedFlushPending;
1378 /** Used to indicate that the guest is mapping the page is also used as a CR3.
1379 * In these cases the access handler acts differently and will check
1380 * for mapping conflicts like the normal CR3 handler.
1381 * @todo When we change the CR3 shadowing to use pool pages, this flag can be
1382 * replaced by a list of pages which share access handler.
1383 */
1384 bool fCR3Mix;
1385//#if HC_ARCH_BITS == 64 || GC_ARCH_BITS == 64
1386// bool Alignment[4]; /**< Align the structure size on a 64-bit boundrary. */
1387//#endif
1388} PGMPOOLPAGE, *PPGMPOOLPAGE, **PPPGMPOOLPAGE;
1389
1390
1391#ifdef PGMPOOL_WITH_CACHE
1392/** The hash table size. */
1393# define PGMPOOL_HASH_SIZE 0x40
1394/** The hash function. */
1395# define PGMPOOL_HASH(GCPhys) ( ((GCPhys) >> PAGE_SHIFT) & (PGMPOOL_HASH_SIZE - 1) )
1396#endif
1397
1398
1399/**
1400 * The shadow page pool instance data.
1401 *
1402 * It's all one big allocation made at init time, except for the
1403 * pages that is. The user nodes follows immediatly after the
1404 * page structures.
1405 */
1406typedef struct PGMPOOL
1407{
1408 /** The VM handle - HC Ptr. */
1409 R3R0PTRTYPE(PVM) pVMHC;
1410 /** The VM handle - GC Ptr. */
1411 GCPTRTYPE(PVM) pVMGC;
1412 /** The max pool size. This includes the special IDs. */
1413 uint16_t cMaxPages;
1414 /** The current pool size. */
1415 uint16_t cCurPages;
1416 /** The head of the free page list. */
1417 uint16_t iFreeHead;
1418 /* Padding. */
1419 uint16_t u16Padding;
1420#ifdef PGMPOOL_WITH_USER_TRACKING
1421 /** Head of the chain of free user nodes. */
1422 uint16_t iUserFreeHead;
1423 /** The number of user nodes we've allocated. */
1424 uint16_t cMaxUsers;
1425 /** The number of present page table entries in the entire pool. */
1426 uint32_t cPresent;
1427 /** Pointer to the array of user nodes - GC pointer. */
1428 GCPTRTYPE(PPGMPOOLUSER) paUsersGC;
1429 /** Pointer to the array of user nodes - HC pointer. */
1430 R3R0PTRTYPE(PPGMPOOLUSER) paUsersHC;
1431#endif /* PGMPOOL_WITH_USER_TRACKING */
1432#ifdef PGMPOOL_WITH_GCPHYS_TRACKING
1433 /** Head of the chain of free phys ext nodes. */
1434 uint16_t iPhysExtFreeHead;
1435 /** The number of user nodes we've allocated. */
1436 uint16_t cMaxPhysExts;
1437 /** Pointer to the array of physical xref extent - GC pointer. */
1438 GCPTRTYPE(PPGMPOOLPHYSEXT) paPhysExtsGC;
1439 /** Pointer to the array of physical xref extent nodes - HC pointer. */
1440 R3R0PTRTYPE(PPGMPOOLPHYSEXT) paPhysExtsHC;
1441#endif /* PGMPOOL_WITH_GCPHYS_TRACKING */
1442#ifdef PGMPOOL_WITH_CACHE
1443 /** Hash table for GCPhys addresses. */
1444 uint16_t aiHash[PGMPOOL_HASH_SIZE];
1445 /** The head of the age list. */
1446 uint16_t iAgeHead;
1447 /** The tail of the age list. */
1448 uint16_t iAgeTail;
1449 /** Set if the cache is enabled. */
1450 bool fCacheEnabled;
1451#endif /* PGMPOOL_WITH_CACHE */
1452#ifdef PGMPOOL_WITH_MONITORING
1453 /** Head of the list of modified pages. */
1454 uint16_t iModifiedHead;
1455 /** The current number of modified pages. */
1456 uint16_t cModifiedPages;
1457 /** Access handler, GC. */
1458 GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnAccessHandlerGC;
1459 /** Access handler, R0. */
1460 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnAccessHandlerR0;
1461 /** Access handler, R3. */
1462 R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnAccessHandlerR3;
1463 /** The access handler description (HC ptr). */
1464 R3PTRTYPE(const char *) pszAccessHandler;
1465#endif /* PGMPOOL_WITH_MONITORING */
1466 /** The number of pages currently in use. */
1467 uint16_t cUsedPages;
1468#ifdef VBOX_WITH_STATISTICS
1469 /** The high wather mark for cUsedPages. */
1470 uint16_t cUsedPagesHigh;
1471 uint32_t Alignment1; /**< Align the next member on a 64-bit boundrary. */
1472 /** Profiling pgmPoolAlloc(). */
1473 STAMPROFILEADV StatAlloc;
1474 /** Profiling pgmPoolClearAll(). */
1475 STAMPROFILE StatClearAll;
1476 /** Profiling pgmPoolFlushAllInt(). */
1477 STAMPROFILE StatFlushAllInt;
1478 /** Profiling pgmPoolFlushPage(). */
1479 STAMPROFILE StatFlushPage;
1480 /** Profiling pgmPoolFree(). */
1481 STAMPROFILE StatFree;
1482 /** Profiling time spent zeroing pages. */
1483 STAMPROFILE StatZeroPage;
1484# ifdef PGMPOOL_WITH_USER_TRACKING
1485 /** Profiling of pgmPoolTrackDeref. */
1486 STAMPROFILE StatTrackDeref;
1487 /** Profiling pgmTrackFlushGCPhysPT. */
1488 STAMPROFILE StatTrackFlushGCPhysPT;
1489 /** Profiling pgmTrackFlushGCPhysPTs. */
1490 STAMPROFILE StatTrackFlushGCPhysPTs;
1491 /** Profiling pgmTrackFlushGCPhysPTsSlow. */
1492 STAMPROFILE StatTrackFlushGCPhysPTsSlow;
1493 /** Number of times we've been out of user records. */
1494 STAMCOUNTER StatTrackFreeUpOneUser;
1495# endif
1496# ifdef PGMPOOL_WITH_GCPHYS_TRACKING
1497 /** Profiling deref activity related tracking GC physical pages. */
1498 STAMPROFILE StatTrackDerefGCPhys;
1499 /** Number of linear searches for a HCPhys in the ram ranges. */
1500 STAMCOUNTER StatTrackLinearRamSearches;
1501 /** The number of failing pgmPoolTrackPhysExtAlloc calls. */
1502 STAMCOUNTER StamTrackPhysExtAllocFailures;
1503# endif
1504# ifdef PGMPOOL_WITH_MONITORING
1505 /** Profiling the GC PT access handler. */
1506 STAMPROFILE StatMonitorGC;
1507 /** Times we've failed interpreting the instruction. */
1508 STAMCOUNTER StatMonitorGCEmulateInstr;
1509 /** Profiling the pgmPoolFlushPage calls made from the GC PT access handler. */
1510 STAMPROFILE StatMonitorGCFlushPage;
1511 /** Times we've detected fork(). */
1512 STAMCOUNTER StatMonitorGCFork;
1513 /** Profiling the GC access we've handled (except REP STOSD). */
1514 STAMPROFILE StatMonitorGCHandled;
1515 /** Times we've failed interpreting a patch code instruction. */
1516 STAMCOUNTER StatMonitorGCIntrFailPatch1;
1517 /** Times we've failed interpreting a patch code instruction during flushing. */
1518 STAMCOUNTER StatMonitorGCIntrFailPatch2;
1519 /** The number of times we've seen rep prefixes we can't handle. */
1520 STAMCOUNTER StatMonitorGCRepPrefix;
1521 /** Profiling the REP STOSD cases we've handled. */
1522 STAMPROFILE StatMonitorGCRepStosd;
1523
1524 /** Profiling the HC PT access handler. */
1525 STAMPROFILE StatMonitorHC;
1526 /** Times we've failed interpreting the instruction. */
1527 STAMCOUNTER StatMonitorHCEmulateInstr;
1528 /** Profiling the pgmPoolFlushPage calls made from the HC PT access handler. */
1529 STAMPROFILE StatMonitorHCFlushPage;
1530 /** Times we've detected fork(). */
1531 STAMCOUNTER StatMonitorHCFork;
1532 /** Profiling the HC access we've handled (except REP STOSD). */
1533 STAMPROFILE StatMonitorHCHandled;
1534 /** The number of times we've seen rep prefixes we can't handle. */
1535 STAMCOUNTER StatMonitorHCRepPrefix;
1536 /** Profiling the REP STOSD cases we've handled. */
1537 STAMPROFILE StatMonitorHCRepStosd;
1538 /** The number of times we're called in an async thread an need to flush. */
1539 STAMCOUNTER StatMonitorHCAsync;
1540 /** The high wather mark for cModifiedPages. */
1541 uint16_t cModifiedPagesHigh;
1542 uint16_t Alignment2[3]; /**< Align the next member on a 64-bit boundrary. */
1543# endif
1544# ifdef PGMPOOL_WITH_CACHE
1545 /** The number of cache hits. */
1546 STAMCOUNTER StatCacheHits;
1547 /** The number of cache misses. */
1548 STAMCOUNTER StatCacheMisses;
1549 /** The number of times we've got a conflict of 'kind' in the cache. */
1550 STAMCOUNTER StatCacheKindMismatches;
1551 /** Number of times we've been out of pages. */
1552 STAMCOUNTER StatCacheFreeUpOne;
1553 /** The number of cacheable allocations. */
1554 STAMCOUNTER StatCacheCacheable;
1555 /** The number of uncacheable allocations. */
1556 STAMCOUNTER StatCacheUncacheable;
1557# endif
1558#elif HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32
1559 uint32_t Alignment1; /**< Align the next member on a 64-bit boundrary. */
1560#endif
1561 /** The AVL tree for looking up a page by its HC physical address. */
1562 AVLOHCPHYSTREE HCPhysTree;
1563 uint32_t Alignment3; /**< Align the next member on a 64-bit boundrary. */
1564 /** Array of pages. (cMaxPages in length)
1565 * The Id is the index into thist array.
1566 */
1567 PGMPOOLPAGE aPages[PGMPOOL_IDX_FIRST];
1568} PGMPOOL, *PPGMPOOL, **PPPGMPOOL;
1569
1570
1571/** @def PGMPOOL_PAGE_2_PTR
1572 * Maps a pool page pool into the current context.
1573 *
1574 * @returns VBox status code.
1575 * @param pVM The VM handle.
1576 * @param pPage The pool page.
1577 *
1578 * @remark In HC this uses PGMGCDynMapHCPage(), so it will consume of the
1579 * small page window employeed by that function. Be careful.
1580 * @remark There is no need to assert on the result.
1581 */
1582#ifdef IN_GC
1583# define PGMPOOL_PAGE_2_PTR(pVM, pPage) pgmGCPoolMapPage((pVM), (pPage))
1584#else
1585# define PGMPOOL_PAGE_2_PTR(pVM, pPage) ((pPage)->pvPageHC)
1586#endif
1587
1588
1589/**
1590 * Trees are using self relative offsets as pointers.
1591 * So, all its data, including the root pointer, must be in the heap for HC and GC
1592 * to have the same layout.
1593 */
1594typedef struct PGMTREES
1595{
1596 /** Physical access handlers (AVL range+offsetptr tree). */
1597 AVLROGCPHYSTREE PhysHandlers;
1598 /** Virtual access handlers (AVL range + GC ptr tree). */
1599 AVLROGCPTRTREE VirtHandlers;
1600 /** Virtual access handlers (Phys range AVL range + offsetptr tree). */
1601 AVLROGCPHYSTREE PhysToVirtHandlers;
1602 /** Virtual access handlers for the hypervisor (AVL range + GC ptr tree). */
1603 AVLROGCPTRTREE HyperVirtHandlers;
1604} PGMTREES;
1605/** Pointer to PGM trees. */
1606typedef PGMTREES *PPGMTREES;
1607
1608
1609/** @name Paging mode macros
1610 * @{ */
1611#ifdef IN_GC
1612# define PGM_CTX(a,b) a##GC##b
1613# define PGM_CTX_STR(a,b) a "GC" b
1614# define PGM_CTX_DECL(type) PGMGCDECL(type)
1615#else
1616# ifdef IN_RING3
1617# define PGM_CTX(a,b) a##R3##b
1618# define PGM_CTX_STR(a,b) a "R3" b
1619# define PGM_CTX_DECL(type) DECLCALLBACK(type)
1620# else
1621# define PGM_CTX(a,b) a##R0##b
1622# define PGM_CTX_STR(a,b) a "R0" b
1623# define PGM_CTX_DECL(type) PGMDECL(type)
1624# endif
1625#endif
1626
1627#define PGM_GST_NAME_REAL(name) PGM_CTX(pgm,GstReal##name)
1628#define PGM_GST_NAME_GC_REAL_STR(name) "pgmGCGstReal" #name
1629#define PGM_GST_NAME_R0_REAL_STR(name) "pgmR0GstReal" #name
1630#define PGM_GST_NAME_PROT(name) PGM_CTX(pgm,GstProt##name)
1631#define PGM_GST_NAME_GC_PROT_STR(name) "pgmGCGstProt" #name
1632#define PGM_GST_NAME_R0_PROT_STR(name) "pgmR0GstProt" #name
1633#define PGM_GST_NAME_32BIT(name) PGM_CTX(pgm,Gst32Bit##name)
1634#define PGM_GST_NAME_GC_32BIT_STR(name) "pgmGCGst32Bit" #name
1635#define PGM_GST_NAME_R0_32BIT_STR(name) "pgmR0Gst32Bit" #name
1636#define PGM_GST_NAME_PAE(name) PGM_CTX(pgm,GstPAE##name)
1637#define PGM_GST_NAME_GC_PAE_STR(name) "pgmGCGstPAE" #name
1638#define PGM_GST_NAME_R0_PAE_STR(name) "pgmR0GstPAE" #name
1639#define PGM_GST_NAME_AMD64(name) PGM_CTX(pgm,GstAMD64##name)
1640#define PGM_GST_NAME_GC_AMD64_STR(name) "pgmGCGstAMD64" #name
1641#define PGM_GST_NAME_R0_AMD64_STR(name) "pgmR0GstAMD64" #name
1642#define PGM_GST_PFN(name, pVM) ((pVM)->pgm.s.PGM_CTX(pfn,Gst##name))
1643#define PGM_GST_DECL(type, name) PGM_CTX_DECL(type) PGM_GST_NAME(name)
1644
1645#define PGM_SHW_NAME_32BIT(name) PGM_CTX(pgm,Shw32Bit##name)
1646#define PGM_SHW_NAME_GC_32BIT_STR(name) "pgmGCShw32Bit" #name
1647#define PGM_SHW_NAME_R0_32BIT_STR(name) "pgmR0Shw32Bit" #name
1648#define PGM_SHW_NAME_PAE(name) PGM_CTX(pgm,ShwPAE##name)
1649#define PGM_SHW_NAME_GC_PAE_STR(name) "pgmGCShwPAE" #name
1650#define PGM_SHW_NAME_R0_PAE_STR(name) "pgmR0ShwPAE" #name
1651#define PGM_SHW_NAME_AMD64(name) PGM_CTX(pgm,ShwAMD64##name)
1652#define PGM_SHW_NAME_GC_AMD64_STR(name) "pgmGCShwAMD64" #name
1653#define PGM_SHW_NAME_R0_AMD64_STR(name) "pgmR0ShwAMD64" #name
1654#define PGM_SHW_DECL(type, name) PGM_CTX_DECL(type) PGM_SHW_NAME(name)
1655#define PGM_SHW_PFN(name, pVM) ((pVM)->pgm.s.PGM_CTX(pfn,Shw##name))
1656
1657/* Shw_Gst */
1658#define PGM_BTH_NAME_32BIT_REAL(name) PGM_CTX(pgm,Bth32BitReal##name)
1659#define PGM_BTH_NAME_32BIT_PROT(name) PGM_CTX(pgm,Bth32BitProt##name)
1660#define PGM_BTH_NAME_32BIT_32BIT(name) PGM_CTX(pgm,Bth32Bit32Bit##name)
1661#define PGM_BTH_NAME_PAE_REAL(name) PGM_CTX(pgm,BthPAEReal##name)
1662#define PGM_BTH_NAME_PAE_PROT(name) PGM_CTX(pgm,BthPAEProt##name)
1663#define PGM_BTH_NAME_PAE_32BIT(name) PGM_CTX(pgm,BthPAE32Bit##name)
1664#define PGM_BTH_NAME_PAE_PAE(name) PGM_CTX(pgm,BthPAEPAE##name)
1665#define PGM_BTH_NAME_AMD64_REAL(name) PGM_CTX(pgm,BthAMD64Real##name)
1666#define PGM_BTH_NAME_AMD64_PROT(name) PGM_CTX(pgm,BthAMD64Prot##name)
1667#define PGM_BTH_NAME_AMD64_AMD64(name) PGM_CTX(pgm,BthAMD64AMD64##name)
1668#define PGM_BTH_NAME_GC_32BIT_REAL_STR(name) "pgmGCBth32BitReal" #name
1669#define PGM_BTH_NAME_GC_32BIT_PROT_STR(name) "pgmGCBth32BitProt" #name
1670#define PGM_BTH_NAME_GC_32BIT_32BIT_STR(name) "pgmGCBth32Bit32Bit" #name
1671#define PGM_BTH_NAME_GC_PAE_REAL_STR(name) "pgmGCBthPAEReal" #name
1672#define PGM_BTH_NAME_GC_PAE_PROT_STR(name) "pgmGCBthPAEProt" #name
1673#define PGM_BTH_NAME_GC_PAE_32BIT_STR(name) "pgmGCBthPAE32Bit" #name
1674#define PGM_BTH_NAME_GC_PAE_PAE_STR(name) "pgmGCBthPAEPAE" #name
1675#define PGM_BTH_NAME_GC_AMD64_REAL_STR(name) "pgmGCBthAMD64Real" #name
1676#define PGM_BTH_NAME_GC_AMD64_PROT_STR(name) "pgmGCBthAMD64Prot" #name
1677#define PGM_BTH_NAME_GC_AMD64_AMD64_STR(name) "pgmGCBthAMD64AMD64" #name
1678#define PGM_BTH_NAME_R0_32BIT_REAL_STR(name) "pgmR0Bth32BitReal" #name
1679#define PGM_BTH_NAME_R0_32BIT_PROT_STR(name) "pgmR0Bth32BitProt" #name
1680#define PGM_BTH_NAME_R0_32BIT_32BIT_STR(name) "pgmR0Bth32Bit32Bit" #name
1681#define PGM_BTH_NAME_R0_PAE_REAL_STR(name) "pgmR0BthPAEReal" #name
1682#define PGM_BTH_NAME_R0_PAE_PROT_STR(name) "pgmR0BthPAEProt" #name
1683#define PGM_BTH_NAME_R0_PAE_32BIT_STR(name) "pgmR0BthPAE32Bit" #name
1684#define PGM_BTH_NAME_R0_PAE_PAE_STR(name) "pgmR0BthPAEPAE" #name
1685#define PGM_BTH_NAME_R0_AMD64_REAL_STR(name) "pgmR0BthAMD64Real" #name
1686#define PGM_BTH_NAME_R0_AMD64_PROT_STR(name) "pgmR0BthAMD64Prot" #name
1687#define PGM_BTH_NAME_R0_AMD64_AMD64_STR(name) "pgmR0BthAMD64AMD64" #name
1688#define PGM_BTH_DECL(type, name) PGM_CTX_DECL(type) PGM_BTH_NAME(name)
1689#define PGM_BTH_PFN(name, pVM) ((pVM)->pgm.s.PGM_CTX(pfn,Bth##name))
1690/** @} */
1691
1692/**
1693 * Data for each paging mode.
1694 */
1695typedef struct PGMMODEDATA
1696{
1697 /** The guest mode type. */
1698 uint32_t uGstType;
1699 /** The shadow mode type. */
1700 uint32_t uShwType;
1701
1702 /** @name Function pointers for Shadow paging.
1703 * @{
1704 */
1705 DECLR3CALLBACKMEMBER(int, pfnR3ShwRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1706 DECLR3CALLBACKMEMBER(int, pfnR3ShwExit,(PVM pVM));
1707 DECLR3CALLBACKMEMBER(int, pfnR3ShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1708 DECLR3CALLBACKMEMBER(int, pfnR3ShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1709 DECLR3CALLBACKMEMBER(int, pfnR3ShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1710 DECLR3CALLBACKMEMBER(int, pfnR3ShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1711 DECLR3CALLBACKMEMBER(int, pfnR3ShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1712
1713 DECLGCCALLBACKMEMBER(int, pfnGCShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1714 DECLGCCALLBACKMEMBER(int, pfnGCShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1715 DECLGCCALLBACKMEMBER(int, pfnGCShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1716 DECLGCCALLBACKMEMBER(int, pfnGCShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1717 DECLGCCALLBACKMEMBER(int, pfnGCShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1718
1719 DECLR0CALLBACKMEMBER(int, pfnR0ShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1720 DECLR0CALLBACKMEMBER(int, pfnR0ShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1721 DECLR0CALLBACKMEMBER(int, pfnR0ShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1722 DECLR0CALLBACKMEMBER(int, pfnR0ShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1723 DECLR0CALLBACKMEMBER(int, pfnR0ShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1724 /** @} */
1725
1726 /** @name Function pointers for Guest paging.
1727 * @{
1728 */
1729 DECLR3CALLBACKMEMBER(int, pfnR3GstRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1730 DECLR3CALLBACKMEMBER(int, pfnR3GstExit,(PVM pVM));
1731 DECLR3CALLBACKMEMBER(int, pfnR3GstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1732 DECLR3CALLBACKMEMBER(int, pfnR3GstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1733 DECLR3CALLBACKMEMBER(int, pfnR3GstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1734 DECLR3CALLBACKMEMBER(int, pfnR3GstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1735 DECLR3CALLBACKMEMBER(int, pfnR3GstUnmonitorCR3,(PVM pVM));
1736 DECLR3CALLBACKMEMBER(int, pfnR3GstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1737 DECLR3CALLBACKMEMBER(int, pfnR3GstUnmapCR3,(PVM pVM));
1738 R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnR3GstWriteHandlerCR3;
1739 R3PTRTYPE(const char *) pszR3GstWriteHandlerCR3;
1740 R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnR3GstPAEWriteHandlerCR3;
1741 R3PTRTYPE(const char *) pszR3GstPAEWriteHandlerCR3;
1742
1743 DECLGCCALLBACKMEMBER(int, pfnGCGstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1744 DECLGCCALLBACKMEMBER(int, pfnGCGstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1745 DECLGCCALLBACKMEMBER(int, pfnGCGstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1746 DECLGCCALLBACKMEMBER(int, pfnGCGstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1747 DECLGCCALLBACKMEMBER(int, pfnGCGstUnmonitorCR3,(PVM pVM));
1748 DECLGCCALLBACKMEMBER(int, pfnGCGstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1749 DECLGCCALLBACKMEMBER(int, pfnGCGstUnmapCR3,(PVM pVM));
1750 GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnGCGstWriteHandlerCR3;
1751 GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnGCGstPAEWriteHandlerCR3;
1752
1753 DECLR0CALLBACKMEMBER(int, pfnR0GstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1754 DECLR0CALLBACKMEMBER(int, pfnR0GstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1755 DECLR0CALLBACKMEMBER(int, pfnR0GstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1756 DECLR0CALLBACKMEMBER(int, pfnR0GstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1757 DECLR0CALLBACKMEMBER(int, pfnR0GstUnmonitorCR3,(PVM pVM));
1758 DECLR0CALLBACKMEMBER(int, pfnR0GstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1759 DECLR0CALLBACKMEMBER(int, pfnR0GstUnmapCR3,(PVM pVM));
1760 R0PTRTYPE(PFNPGMGCPHYSHANDLER) pfnR0GstWriteHandlerCR3;
1761 R0PTRTYPE(PFNPGMGCPHYSHANDLER) pfnR0GstPAEWriteHandlerCR3;
1762 /** @} */
1763
1764 /** @name Function pointers for Both Shadow and Guest paging.
1765 * @{
1766 */
1767 DECLR3CALLBACKMEMBER(int, pfnR3BthRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1768 DECLR3CALLBACKMEMBER(int, pfnR3BthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1769 DECLR3CALLBACKMEMBER(int, pfnR3BthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1770 DECLR3CALLBACKMEMBER(int, pfnR3BthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
1771 DECLR3CALLBACKMEMBER(int, pfnR3BthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
1772 DECLR3CALLBACKMEMBER(int, pfnR3BthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
1773 DECLR3CALLBACKMEMBER(int, pfnR3BthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
1774#ifdef VBOX_STRICT
1775 DECLR3CALLBACKMEMBER(unsigned, pfnR3BthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
1776#endif
1777
1778 DECLGCCALLBACKMEMBER(int, pfnGCBthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1779 DECLGCCALLBACKMEMBER(int, pfnGCBthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1780 DECLGCCALLBACKMEMBER(int, pfnGCBthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
1781 DECLGCCALLBACKMEMBER(int, pfnGCBthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
1782 DECLGCCALLBACKMEMBER(int, pfnGCBthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
1783 DECLGCCALLBACKMEMBER(int, pfnGCBthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
1784#ifdef VBOX_STRICT
1785 DECLGCCALLBACKMEMBER(unsigned, pfnGCBthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
1786#endif
1787
1788 DECLR0CALLBACKMEMBER(int, pfnR0BthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1789 DECLR0CALLBACKMEMBER(int, pfnR0BthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1790 DECLR0CALLBACKMEMBER(int, pfnR0BthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
1791 DECLR0CALLBACKMEMBER(int, pfnR0BthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
1792 DECLR0CALLBACKMEMBER(int, pfnR0BthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
1793 DECLR0CALLBACKMEMBER(int, pfnR0BthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
1794#ifdef VBOX_STRICT
1795 DECLR0CALLBACKMEMBER(unsigned, pfnR0BthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
1796#endif
1797 /** @} */
1798} PGMMODEDATA, *PPGMMODEDATA;
1799
1800
1801
1802/**
1803 * Converts a PGM pointer into a VM pointer.
1804 * @returns Pointer to the VM structure the PGM is part of.
1805 * @param pPGM Pointer to PGM instance data.
1806 */
1807#define PGM2VM(pPGM) ( (PVM)((char*)pPGM - pPGM->offVM) )
1808
1809/**
1810 * PGM Data (part of VM)
1811 */
1812typedef struct PGM
1813{
1814 /** Offset to the VM structure. */
1815 RTINT offVM;
1816
1817 /*
1818 * This will be redefined at least two more times before we're done, I'm sure.
1819 * The current code is only to get on with the coding.
1820 * - 2004-06-10: initial version, bird.
1821 * - 2004-07-02: 1st time, bird.
1822 * - 2004-10-18: 2nd time, bird.
1823 * - 2005-07-xx: 3rd time, bird.
1824 */
1825
1826 /** Pointer to the page table entries for the dynamic page mapping area - GCPtr. */
1827 GCPTRTYPE(PX86PTE) paDynPageMap32BitPTEsGC;
1828 /** Pointer to the page table entries for the dynamic page mapping area - GCPtr. */
1829 GCPTRTYPE(PX86PTEPAE) paDynPageMapPaePTEsGC;
1830
1831 /** The host paging mode. (This is what SUPLib reports.) */
1832 SUPPAGINGMODE enmHostMode;
1833 /** The shadow paging mode. */
1834 PGMMODE enmShadowMode;
1835 /** The guest paging mode. */
1836 PGMMODE enmGuestMode;
1837
1838 /** The current physical address representing in the guest CR3 register. */
1839 RTGCPHYS GCPhysCR3;
1840 /** Pointer to the 5 page CR3 content mapping.
1841 * The first page is always the CR3 (in some form) while the 4 other pages
1842 * are used of the PDs in PAE mode. */
1843 RTGCPTR GCPtrCR3Mapping;
1844#if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32
1845 RTGCPTR GCPtrPadding0; /**< alignment padding. */
1846#endif
1847 /** The physical address of the currently monitored guest CR3 page.
1848 * When this value is NIL_RTGCPHYS no page is being monitored. */
1849 RTGCPHYS GCPhysGstCR3Monitored;
1850
1851 /** @name 32-bit Guest Paging.
1852 * @{ */
1853 /** The guest's page directory, HC pointer. */
1854 R3R0PTRTYPE(PVBOXPD) pGuestPDHC;
1855 /** The guest's page directory, static GC mapping. */
1856 GCPTRTYPE(PVBOXPD) pGuestPDGC;
1857 /** @} */
1858
1859 /** @name PAE Guest Paging.
1860 * @{ */
1861 /** The guest's page directory pointer table, static GC mapping. */
1862 GCPTRTYPE(PX86PDPTR) pGstPaePDPTRGC;
1863 /** The guest's page directory pointer table, HC pointer. */
1864 R3R0PTRTYPE(PX86PDPTR) pGstPaePDPTRHC;
1865 /** The guest's page directories, HC pointers.
1866 * These are individual pointers and doesn't have to be adjecent.
1867 * These doesn't have to be update to date - use pgmGstGetPaePD() to access them. */
1868 R3R0PTRTYPE(PX86PDPAE) apGstPaePDsHC[4];
1869 /** The guest's page directories, static GC mapping.
1870 * Unlike the HC array the first entry can be accessed as a 2048 entry PD.
1871 * These doesn't have to be update to date - use pgmGstGetPaePD() to access them. */
1872 GCPTRTYPE(PX86PDPAE) apGstPaePDsGC[4];
1873 /** The physical addresses of the guest page directories (PAE) pointed to by apGstPagePDsHC/GC. */
1874 RTGCPHYS aGCPhysGstPaePDs[4];
1875 /** The physical addresses of the monitored guest page directories (PAE). */
1876 RTGCPHYS aGCPhysGstPaePDsMonitored[4];
1877 /** @} */
1878
1879
1880 /** @name 32-bit Shadow Paging
1881 * @{ */
1882 /** The 32-Bit PD - HC Ptr. */
1883 R3R0PTRTYPE(PX86PD) pHC32BitPD;
1884 /** The 32-Bit PD - GC Ptr. */
1885 GCPTRTYPE(PX86PD) pGC32BitPD;
1886#if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32
1887 uint32_t u32Padding1; /**< alignment padding. */
1888#endif
1889 /** The Physical Address (HC) of the 32-Bit PD. */
1890 RTHCPHYS HCPhys32BitPD;
1891 /** @} */
1892
1893 /** @name PAE Shadow Paging
1894 * @{ */
1895 /** The four PDs for the low 4GB - HC Ptr.
1896 * Even though these are 4 pointers, what they point at is a single table.
1897 * Thus, it's possible to walk the 2048 entries starting where apHCPaePDs[0] points. */
1898 R3R0PTRTYPE(PX86PDPAE) apHCPaePDs[4];
1899 /** The four PDs for the low 4GB - GC Ptr.
1900 * Same kind of mapping as apHCPaePDs. */
1901 GCPTRTYPE(PX86PDPAE) apGCPaePDs[4];
1902 /** The Physical Address (HC) of the four PDs for the low 4GB.
1903 * These are *NOT* 4 contiguous pages. */
1904 RTHCPHYS aHCPhysPaePDs[4];
1905 /** The PAE PDPTR - HC Ptr. */
1906 R3R0PTRTYPE(PX86PDPTR) pHCPaePDPTR;
1907 /** The Physical Address (HC) of the PAE PDPTR. */
1908 RTHCPHYS HCPhysPaePDPTR;
1909 /** The PAE PDPTR - GC Ptr. */
1910 GCPTRTYPE(PX86PDPTR) pGCPaePDPTR;
1911 /** @} */
1912
1913 /** @name AMD64 Shadow Paging
1914 * Extends PAE Paging.
1915 * @{ */
1916 /** The Page Map Level 4 table - HC Ptr. */
1917 GCPTRTYPE(PX86PML4) pGCPaePML4;
1918 /** The Page Map Level 4 table - GC Ptr. */
1919 R3R0PTRTYPE(PX86PML4) pHCPaePML4;
1920 /** The Physical Address (HC) of the Page Map Level 4 table. */
1921 RTHCPHYS HCPhysPaePML4;
1922 /** @}*/
1923
1924 /** @name Function pointers for Shadow paging.
1925 * @{
1926 */
1927 DECLR3CALLBACKMEMBER(int, pfnR3ShwRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1928 DECLR3CALLBACKMEMBER(int, pfnR3ShwExit,(PVM pVM));
1929 DECLR3CALLBACKMEMBER(int, pfnR3ShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1930 DECLR3CALLBACKMEMBER(int, pfnR3ShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1931 DECLR3CALLBACKMEMBER(int, pfnR3ShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1932 DECLR3CALLBACKMEMBER(int, pfnR3ShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1933 DECLR3CALLBACKMEMBER(int, pfnR3ShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1934
1935 DECLGCCALLBACKMEMBER(int, pfnGCShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1936 DECLGCCALLBACKMEMBER(int, pfnGCShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1937 DECLGCCALLBACKMEMBER(int, pfnGCShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1938 DECLGCCALLBACKMEMBER(int, pfnGCShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1939 DECLGCCALLBACKMEMBER(int, pfnGCShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1940#if GC_ARCH_BITS == 32 && HC_ARCH_BITS == 64
1941 RTGCPTR alignment0; /**< structure size alignment. */
1942#endif
1943
1944 DECLR0CALLBACKMEMBER(int, pfnR0ShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1945 DECLR0CALLBACKMEMBER(int, pfnR0ShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1946 DECLR0CALLBACKMEMBER(int, pfnR0ShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1947 DECLR0CALLBACKMEMBER(int, pfnR0ShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1948 DECLR0CALLBACKMEMBER(int, pfnR0ShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1949
1950 /** @} */
1951
1952 /** @name Function pointers for Guest paging.
1953 * @{
1954 */
1955 DECLR3CALLBACKMEMBER(int, pfnR3GstRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1956 DECLR3CALLBACKMEMBER(int, pfnR3GstExit,(PVM pVM));
1957 DECLR3CALLBACKMEMBER(int, pfnR3GstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1958 DECLR3CALLBACKMEMBER(int, pfnR3GstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1959 DECLR3CALLBACKMEMBER(int, pfnR3GstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1960 DECLR3CALLBACKMEMBER(int, pfnR3GstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1961 DECLR3CALLBACKMEMBER(int, pfnR3GstUnmonitorCR3,(PVM pVM));
1962 DECLR3CALLBACKMEMBER(int, pfnR3GstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1963 DECLR3CALLBACKMEMBER(int, pfnR3GstUnmapCR3,(PVM pVM));
1964 R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnR3GstWriteHandlerCR3;
1965 R3PTRTYPE(const char *) pszR3GstWriteHandlerCR3;
1966 R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnR3GstPAEWriteHandlerCR3;
1967 R3PTRTYPE(const char *) pszR3GstPAEWriteHandlerCR3;
1968
1969 DECLGCCALLBACKMEMBER(int, pfnGCGstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1970 DECLGCCALLBACKMEMBER(int, pfnGCGstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1971 DECLGCCALLBACKMEMBER(int, pfnGCGstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1972 DECLGCCALLBACKMEMBER(int, pfnGCGstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1973 DECLGCCALLBACKMEMBER(int, pfnGCGstUnmonitorCR3,(PVM pVM));
1974 DECLGCCALLBACKMEMBER(int, pfnGCGstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1975 DECLGCCALLBACKMEMBER(int, pfnGCGstUnmapCR3,(PVM pVM));
1976 GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnGCGstWriteHandlerCR3;
1977 GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnGCGstPAEWriteHandlerCR3;
1978#if GC_ARCH_BITS == 32 && HC_ARCH_BITS == 64
1979 RTGCPTR alignment3; /**< structure size alignment. */
1980#endif
1981
1982 DECLR0CALLBACKMEMBER(int, pfnR0GstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1983 DECLR0CALLBACKMEMBER(int, pfnR0GstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1984 DECLR0CALLBACKMEMBER(int, pfnR0GstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1985 DECLR0CALLBACKMEMBER(int, pfnR0GstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1986 DECLR0CALLBACKMEMBER(int, pfnR0GstUnmonitorCR3,(PVM pVM));
1987 DECLR0CALLBACKMEMBER(int, pfnR0GstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1988 DECLR0CALLBACKMEMBER(int, pfnR0GstUnmapCR3,(PVM pVM));
1989 R0PTRTYPE(PFNPGMGCPHYSHANDLER) pfnR0GstWriteHandlerCR3;
1990 R0PTRTYPE(PFNPGMGCPHYSHANDLER) pfnR0GstPAEWriteHandlerCR3;
1991 /** @} */
1992
1993 /** @name Function pointers for Both Shadow and Guest paging.
1994 * @{
1995 */
1996 DECLR3CALLBACKMEMBER(int, pfnR3BthRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1997 DECLR3CALLBACKMEMBER(int, pfnR3BthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1998 DECLR3CALLBACKMEMBER(int, pfnR3BthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1999 DECLR3CALLBACKMEMBER(int, pfnR3BthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
2000 DECLR3CALLBACKMEMBER(int, pfnR3BthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
2001 DECLR3CALLBACKMEMBER(int, pfnR3BthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
2002 DECLR3CALLBACKMEMBER(int, pfnR3BthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
2003 DECLR3CALLBACKMEMBER(unsigned, pfnR3BthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
2004
2005 DECLR0CALLBACKMEMBER(int, pfnR0BthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
2006 DECLR0CALLBACKMEMBER(int, pfnR0BthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
2007 DECLR0CALLBACKMEMBER(int, pfnR0BthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
2008 DECLR0CALLBACKMEMBER(int, pfnR0BthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
2009 DECLR0CALLBACKMEMBER(int, pfnR0BthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
2010 DECLR0CALLBACKMEMBER(int, pfnR0BthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
2011 DECLR0CALLBACKMEMBER(unsigned, pfnR0BthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
2012
2013 DECLGCCALLBACKMEMBER(int, pfnGCBthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
2014 DECLGCCALLBACKMEMBER(int, pfnGCBthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
2015 DECLGCCALLBACKMEMBER(int, pfnGCBthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
2016 DECLGCCALLBACKMEMBER(int, pfnGCBthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
2017 DECLGCCALLBACKMEMBER(int, pfnGCBthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
2018 DECLGCCALLBACKMEMBER(int, pfnGCBthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
2019 DECLGCCALLBACKMEMBER(unsigned, pfnGCBthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
2020#if GC_ARCH_BITS == 32 && HC_ARCH_BITS == 64
2021 RTGCPTR alignment2; /**< structure size alignment. */
2022#endif
2023 /** @} */
2024
2025 /** Pointer to SHW+GST mode data (function pointers).
2026 * The index into this table is made up from */
2027 R3PTRTYPE(PPGMMODEDATA) paModeData;
2028
2029 /** Pointer to the list of RAM ranges (Phys GC -> Phys HC conversion) - for R3.
2030 * This is sorted by physical address and contains no overlapping ranges. */
2031 R3PTRTYPE(PPGMRAMRANGE) pRamRangesR3;
2032 /** R0 pointer corresponding to PGM::pRamRangesR3. */
2033 R0PTRTYPE(PPGMRAMRANGE) pRamRangesR0;
2034 /** GC pointer corresponding to PGM::pRamRangesR3. */
2035 GCPTRTYPE(PPGMRAMRANGE) pRamRangesGC;
2036 /** The configured RAM size. */
2037 RTUINT cbRamSize;
2038
2039 /** Pointer to the list of ROM ranges - for R3.
2040 * This is sorted by physical address and contains no overlapping ranges. */
2041 R3PTRTYPE(PPGMROMRANGE) pRomRangesR3;
2042 /** R0 pointer corresponding to PGM::pRomRangesR3. */
2043 R0PTRTYPE(PPGMRAMRANGE) pRomRangesR0;
2044 /** GC pointer corresponding to PGM::pRomRangesR3. */
2045 GCPTRTYPE(PPGMRAMRANGE) pRomRangesGC;
2046 /** Alignment padding. */
2047 RTGCPTR GCPtrPadding2;
2048
2049 /** PGM offset based trees - HC Ptr. */
2050 R3R0PTRTYPE(PPGMTREES) pTreesHC;
2051 /** PGM offset based trees - GC Ptr. */
2052 GCPTRTYPE(PPGMTREES) pTreesGC;
2053
2054 /** Linked list of GC mappings - for GC.
2055 * The list is sorted ascending on address.
2056 */
2057 GCPTRTYPE(PPGMMAPPING) pMappingsGC;
2058 /** Linked list of GC mappings - for HC.
2059 * The list is sorted ascending on address.
2060 */
2061 R3PTRTYPE(PPGMMAPPING) pMappingsR3;
2062 /** Linked list of GC mappings - for R0.
2063 * The list is sorted ascending on address.
2064 */
2065 R0PTRTYPE(PPGMMAPPING) pMappingsR0;
2066
2067 /** If set no conflict checks are required. (boolean) */
2068 bool fMappingsFixed;
2069 /** If set, then no mappings are put into the shadow page table. (boolean) */
2070 bool fDisableMappings;
2071 /** Size of fixed mapping */
2072 uint32_t cbMappingFixed;
2073 /** Base address (GC) of fixed mapping */
2074 RTGCPTR GCPtrMappingFixed;
2075#if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32
2076 uint32_t u32Padding0; /**< alignment padding. */
2077#endif
2078
2079
2080 /** @name Intermediate Context
2081 * @{ */
2082 /** Pointer to the intermediate page directory - Normal. */
2083 R3PTRTYPE(PX86PD) pInterPD;
2084 /** Pointer to the intermedate page tables - Normal.
2085 * There are two page tables, one for the identity mapping and one for
2086 * the host context mapping (of the core code). */
2087 R3PTRTYPE(PX86PT) apInterPTs[2];
2088 /** Pointer to the intermedate page tables - PAE. */
2089 R3PTRTYPE(PX86PTPAE) apInterPaePTs[2];
2090 /** Pointer to the intermedate page directory - PAE. */
2091 R3PTRTYPE(PX86PDPAE) apInterPaePDs[4];
2092 /** Pointer to the intermedate page directory - PAE. */
2093 R3PTRTYPE(PX86PDPTR) pInterPaePDPTR;
2094 /** Pointer to the intermedate page-map level 4 - AMD64. */
2095 R3PTRTYPE(PX86PML4) pInterPaePML4;
2096 /** Pointer to the intermedate page directory - AMD64. */
2097 R3PTRTYPE(PX86PDPTR) pInterPaePDPTR64;
2098 /** The Physical Address (HC) of the intermediate Page Directory - Normal. */
2099 RTHCPHYS HCPhysInterPD;
2100 /** The Physical Address (HC) of the intermediate Page Directory Pointer Table - PAE. */
2101 RTHCPHYS HCPhysInterPaePDPTR;
2102 /** The Physical Address (HC) of the intermediate Page Map Level 4 table - AMD64. */
2103 RTHCPHYS HCPhysInterPaePML4;
2104 /** @} */
2105
2106 /** Base address of the dynamic page mapping area.
2107 * The array is MM_HYPER_DYNAMIC_SIZE bytes big.
2108 */
2109 GCPTRTYPE(uint8_t *) pbDynPageMapBaseGC;
2110 /** The index of the last entry used in the dynamic page mapping area. */
2111 RTUINT iDynPageMapLast;
2112 /** Cache containing the last entries in the dynamic page mapping area.
2113 * The cache size is covering half of the mapping area. */
2114 RTHCPHYS aHCPhysDynPageMapCache[MM_HYPER_DYNAMIC_SIZE >> (PAGE_SHIFT + 1)];
2115
2116 /** A20 gate mask.
2117 * Our current approach to A20 emulation is to let REM do it and don't bother
2118 * anywhere else. The interesting Guests will be operating with it enabled anyway.
2119 * But whould need arrise, we'll subject physical addresses to this mask. */
2120 RTGCPHYS GCPhysA20Mask;
2121 /** A20 gate state - boolean! */
2122 RTUINT fA20Enabled;
2123
2124 /** What needs syncing (PGM_SYNC_*).
2125 * This is used to queue operations for PGMSyncCR3, PGMInvalidatePage,
2126 * PGMFlushTLB, and PGMR3Load. */
2127 RTUINT fSyncFlags;
2128
2129 /** PGM critical section.
2130 * This protects the physical & virtual access handlers, ram ranges,
2131 * and the page flag updating (some of it anyway).
2132 */
2133 PDMCRITSECT CritSect;
2134
2135 /** Shadow Page Pool - HC Ptr. */
2136 R3R0PTRTYPE(PPGMPOOL) pPoolHC;
2137 /** Shadow Page Pool - GC Ptr. */
2138 GCPTRTYPE(PPGMPOOL) pPoolGC;
2139
2140 /** We're not in a state which permits writes to guest memory.
2141 * (Only used in strict builds.) */
2142 bool fNoMorePhysWrites;
2143
2144 /** Flush the cache on the next access. */
2145 bool fPhysCacheFlushPending;
2146/** @todo r=bird: Fix member names!*/
2147 /** PGMPhysRead cache */
2148 PGMPHYSCACHE pgmphysreadcache;
2149 /** PGMPhysWrite cache */
2150 PGMPHYSCACHE pgmphyswritecache;
2151
2152 /**
2153 * Data associated with managing the ring-3 mappings of the allocation chunks.
2154 */
2155 struct
2156 {
2157 /** The chunk tree, ordered by chunk id. */
2158 R3R0PTRTYPE(PAVLU32NODECORE) pTree;
2159 /** The chunk mapping TLB. */
2160 PGMCHUNKR3MAPTLB Tlb;
2161 /** The number of mapped chunks. */
2162 uint32_t c;
2163 /** The maximum number of mapped chunks.
2164 * @cfgm PGM/MaxRing3Chunks */
2165 uint32_t cMax;
2166 /** The chunk age tree, ordered by ageing sequence number. */
2167 R3PTRTYPE(PAVLLU32NODECORE) pAgeTree;
2168 /** The current time. */
2169 uint32_t iNow;
2170 /** Number of pgmR3PhysChunkFindUnmapCandidate calls left to the next ageing. */
2171 uint32_t AgeingCountdown;
2172 } ChunkR3Map;
2173
2174 /**
2175 * The page mapping TLB for ring-3 and (for the time being) ring-0.
2176 */
2177 PGMPAGER3MAPTLB PhysTlbHC;
2178
2179 /** @name The zero page.
2180 * @{ */
2181 /** The host physical address of the zero page. */
2182 RTHCPHYS HCPhysZeroPg;
2183 /** The ring-3 mapping of the zero page. */
2184 RTR3PTR pvZeroPgR3;
2185 /** The ring-0 mapping of the zero page. */
2186 RTR0PTR pvZeroPgR0;
2187 /** The GC mapping of the zero page. */
2188 RTGCPTR pvZeroPgGC;
2189#if GC_ARCH_BITS != 32
2190 uint32_t u32ZeroAlignment; /**< Alignment padding. */
2191#endif
2192 /** @}*/
2193
2194 /** The number of handy pages. */
2195 uint32_t cHandyPages;
2196 /**
2197 * Array of handy pages.
2198 *
2199 * This array is used in a two way communication between pgmPhysAllocPage
2200 * and GMMR0AllocateHandyPages, with PGMR3PhysAllocateHandyPages serving as
2201 * an intermediary.
2202 *
2203 * The size of this array is important, see pgmPhysEnsureHandyPage for details.
2204 * (The current size of 32 pages, means 128 KB of handy memory.)
2205 */
2206 GMMPAGEDESC aHandyPages[32];
2207
2208 /** @name Release Statistics
2209 * @{ */
2210 uint32_t cAllPages; /**< The total number of pages. (Should be Private + Shared + Zero.) */
2211 uint32_t cPrivatePages; /**< The number of private pages. */
2212 uint32_t cSharedPages; /**< The number of shared pages. */
2213 uint32_t cZeroPages; /**< The number of zero backed pages. */
2214 /** The number of times the guest has switched mode since last reset or statistics reset. */
2215 STAMCOUNTER cGuestModeChanges;
2216 /** @} */
2217
2218#ifdef VBOX_WITH_STATISTICS
2219 /** GC: Which statistic this \#PF should be attributed to. */
2220 GCPTRTYPE(PSTAMPROFILE) pStatTrap0eAttributionGC;
2221 RTGCPTR padding0;
2222 /** HC: Which statistic this \#PF should be attributed to. */
2223 R3R0PTRTYPE(PSTAMPROFILE) pStatTrap0eAttributionHC;
2224 RTHCPTR padding1;
2225 STAMPROFILE StatGCTrap0e; /**< GC: PGMGCTrap0eHandler() profiling. */
2226 STAMPROFILE StatTrap0eCSAM; /**< Profiling of the Trap0eHandler body when the cause is CSAM. */
2227 STAMPROFILE StatTrap0eDirtyAndAccessedBits; /**< Profiling of the Trap0eHandler body when the cause is dirty and/or accessed bit emulation. */
2228 STAMPROFILE StatTrap0eGuestTrap; /**< Profiling of the Trap0eHandler body when the cause is a guest trap. */
2229 STAMPROFILE StatTrap0eHndPhys; /**< Profiling of the Trap0eHandler body when the cause is a physical handler. */
2230 STAMPROFILE StatTrap0eHndVirt; /**< Profiling of the Trap0eHandler body when the cause is a virtual handler. */
2231 STAMPROFILE StatTrap0eHndUnhandled; /**< Profiling of the Trap0eHandler body when the cause is access outside the monitored areas of a monitored page. */
2232 STAMPROFILE StatTrap0eMisc; /**< Profiling of the Trap0eHandler body when the cause is not known. */
2233 STAMPROFILE StatTrap0eOutOfSync; /**< Profiling of the Trap0eHandler body when the cause is an out-of-sync page. */
2234 STAMPROFILE StatTrap0eOutOfSyncHndPhys; /**< Profiling of the Trap0eHandler body when the cause is an out-of-sync physical handler page. */
2235 STAMPROFILE StatTrap0eOutOfSyncHndVirt; /**< Profiling of the Trap0eHandler body when the cause is an out-of-sync virtual handler page. */
2236 STAMPROFILE StatTrap0eOutOfSyncObsHnd; /**< Profiling of the Trap0eHandler body when the cause is an obsolete handler page. */
2237 STAMPROFILE StatTrap0eSyncPT; /**< Profiling of the Trap0eHandler body when the cause is lazy syncing of a PT. */
2238
2239 STAMCOUNTER StatTrap0eMapHandler; /**< Number of traps due to access handlers in mappings. */
2240 STAMCOUNTER StatGCTrap0eConflicts; /**< GC: The number of times \#PF was caused by an undetected conflict. */
2241
2242 STAMCOUNTER StatGCTrap0eUSNotPresentRead;
2243 STAMCOUNTER StatGCTrap0eUSNotPresentWrite;
2244 STAMCOUNTER StatGCTrap0eUSWrite;
2245 STAMCOUNTER StatGCTrap0eUSReserved;
2246 STAMCOUNTER StatGCTrap0eUSRead;
2247
2248 STAMCOUNTER StatGCTrap0eSVNotPresentRead;
2249 STAMCOUNTER StatGCTrap0eSVNotPresentWrite;
2250 STAMCOUNTER StatGCTrap0eSVWrite;
2251 STAMCOUNTER StatGCTrap0eSVReserved;
2252
2253 STAMCOUNTER StatGCTrap0eUnhandled;
2254 STAMCOUNTER StatGCTrap0eMap;
2255
2256 /** GC: PGMSyncPT() profiling. */
2257 STAMPROFILE StatGCSyncPT;
2258 /** GC: The number of times PGMSyncPT() needed to allocate page tables. */
2259 STAMCOUNTER StatGCSyncPTAlloc;
2260 /** GC: The number of times PGMSyncPT() detected conflicts. */
2261 STAMCOUNTER StatGCSyncPTConflict;
2262 /** GC: The number of times PGMSyncPT() failed. */
2263 STAMCOUNTER StatGCSyncPTFailed;
2264 /** GC: PGMGCInvalidatePage() profiling. */
2265 STAMPROFILE StatGCInvalidatePage;
2266 /** GC: The number of times PGMGCInvalidatePage() was called for a 4KB page. */
2267 STAMCOUNTER StatGCInvalidatePage4KBPages;
2268 /** GC: The number of times PGMGCInvalidatePage() was called for a 4MB page. */
2269 STAMCOUNTER StatGCInvalidatePage4MBPages;
2270 /** GC: The number of times PGMGCInvalidatePage() skipped a 4MB page. */
2271 STAMCOUNTER StatGCInvalidatePage4MBPagesSkip;
2272 /** GC: The number of times PGMGCInvalidatePage() was called for a not accessed page directory. */
2273 STAMCOUNTER StatGCInvalidatePagePDNAs;
2274 /** GC: The number of times PGMGCInvalidatePage() was called for a not present page directory. */
2275 STAMCOUNTER StatGCInvalidatePagePDNPs;
2276 /** GC: The number of times PGMGCInvalidatePage() was called for a page directory containing mappings (no conflict). */
2277 STAMCOUNTER StatGCInvalidatePagePDMappings;
2278 /** GC: The number of times PGMGCInvalidatePage() was called for an out of sync page directory. */
2279 STAMCOUNTER StatGCInvalidatePagePDOutOfSync;
2280 /** HC: The number of times PGMGCInvalidatePage() was skipped due to not present shw or pending pending SyncCR3. */
2281 STAMCOUNTER StatGCInvalidatePageSkipped;
2282 /** GC: The number of times user page is out of sync was detected in GC. */
2283 STAMCOUNTER StatGCPageOutOfSyncUser;
2284 /** GC: The number of times supervisor page is out of sync was detected in GC. */
2285 STAMCOUNTER StatGCPageOutOfSyncSupervisor;
2286 /** GC: The number of dynamic page mapping cache hits */
2287 STAMCOUNTER StatDynMapCacheMisses;
2288 /** GC: The number of dynamic page mapping cache misses */
2289 STAMCOUNTER StatDynMapCacheHits;
2290 /** GC: The number of times pgmGCGuestPDWriteHandler() was successfully called. */
2291 STAMCOUNTER StatGCGuestCR3WriteHandled;
2292 /** GC: The number of times pgmGCGuestPDWriteHandler() was called and we had to fall back to the recompiler. */
2293 STAMCOUNTER StatGCGuestCR3WriteUnhandled;
2294 /** GC: The number of times pgmGCGuestPDWriteHandler() was called and a conflict was detected. */
2295 STAMCOUNTER StatGCGuestCR3WriteConflict;
2296 /** GC: Number of out-of-sync handled pages. */
2297 STAMCOUNTER StatHandlersOutOfSync;
2298 /** GC: Number of traps due to physical access handlers. */
2299 STAMCOUNTER StatHandlersPhysical;
2300 /** GC: Number of traps due to virtual access handlers. */
2301 STAMCOUNTER StatHandlersVirtual;
2302 /** GC: Number of traps due to virtual access handlers found by physical address. */
2303 STAMCOUNTER StatHandlersVirtualByPhys;
2304 /** GC: Number of traps due to virtual access handlers found by virtual address (without proper physical flags). */
2305 STAMCOUNTER StatHandlersVirtualUnmarked;
2306 /** GC: Number of traps due to access outside range of monitored page(s). */
2307 STAMCOUNTER StatHandlersUnhandled;
2308
2309 /** GC: The number of times pgmGCGuestROMWriteHandler() was successfully called. */
2310 STAMCOUNTER StatGCGuestROMWriteHandled;
2311 /** GC: The number of times pgmGCGuestROMWriteHandler() was called and we had to fall back to the recompiler */
2312 STAMCOUNTER StatGCGuestROMWriteUnhandled;
2313
2314 /** HC: PGMR3InvalidatePage() profiling. */
2315 STAMPROFILE StatHCInvalidatePage;
2316 /** HC: The number of times PGMR3InvalidatePage() was called for a 4KB page. */
2317 STAMCOUNTER StatHCInvalidatePage4KBPages;
2318 /** HC: The number of times PGMR3InvalidatePage() was called for a 4MB page. */
2319 STAMCOUNTER StatHCInvalidatePage4MBPages;
2320 /** HC: The number of times PGMR3InvalidatePage() skipped a 4MB page. */
2321 STAMCOUNTER StatHCInvalidatePage4MBPagesSkip;
2322 /** HC: The number of times PGMR3InvalidatePage() was called for a not accessed page directory. */
2323 STAMCOUNTER StatHCInvalidatePagePDNAs;
2324 /** HC: The number of times PGMR3InvalidatePage() was called for a not present page directory. */
2325 STAMCOUNTER StatHCInvalidatePagePDNPs;
2326 /** HC: The number of times PGMR3InvalidatePage() was called for a page directory containing mappings (no conflict). */
2327 STAMCOUNTER StatHCInvalidatePagePDMappings;
2328 /** HC: The number of times PGMGCInvalidatePage() was called for an out of sync page directory. */
2329 STAMCOUNTER StatHCInvalidatePagePDOutOfSync;
2330 /** HC: The number of times PGMR3InvalidatePage() was skipped due to not present shw or pending pending SyncCR3. */
2331 STAMCOUNTER StatHCInvalidatePageSkipped;
2332 /** HC: PGMR3SyncPT() profiling. */
2333 STAMPROFILE StatHCSyncPT;
2334 /** HC: pgmr3SyncPTResolveConflict() profiling (includes the entire relocation). */
2335 STAMPROFILE StatHCResolveConflict;
2336 /** HC: Number of times PGMR3CheckMappingConflicts() detected a conflict. */
2337 STAMCOUNTER StatHCDetectedConflicts;
2338 /** HC: The total number of times pgmHCGuestPDWriteHandler() was called. */
2339 STAMCOUNTER StatHCGuestPDWrite;
2340 /** HC: The number of times pgmHCGuestPDWriteHandler() detected a conflict */
2341 STAMCOUNTER StatHCGuestPDWriteConflict;
2342
2343 /** HC: The number of pages marked not present for accessed bit emulation. */
2344 STAMCOUNTER StatHCAccessedPage;
2345 /** HC: The number of pages marked read-only for dirty bit tracking. */
2346 STAMCOUNTER StatHCDirtyPage;
2347 /** HC: The number of pages marked read-only for dirty bit tracking. */
2348 STAMCOUNTER StatHCDirtyPageBig;
2349 /** HC: The number of traps generated for dirty bit tracking. */
2350 STAMCOUNTER StatHCDirtyPageTrap;
2351 /** HC: The number of pages already dirty or readonly. */
2352 STAMCOUNTER StatHCDirtyPageSkipped;
2353
2354 /** GC: The number of pages marked not present for accessed bit emulation. */
2355 STAMCOUNTER StatGCAccessedPage;
2356 /** GC: The number of pages marked read-only for dirty bit tracking. */
2357 STAMCOUNTER StatGCDirtyPage;
2358 /** GC: The number of pages marked read-only for dirty bit tracking. */
2359 STAMCOUNTER StatGCDirtyPageBig;
2360 /** GC: The number of traps generated for dirty bit tracking. */
2361 STAMCOUNTER StatGCDirtyPageTrap;
2362 /** GC: The number of pages already dirty or readonly. */
2363 STAMCOUNTER StatGCDirtyPageSkipped;
2364 /** GC: The number of pages marked dirty because of write accesses. */
2365 STAMCOUNTER StatGCDirtiedPage;
2366 /** GC: The number of pages already marked dirty because of write accesses. */
2367 STAMCOUNTER StatGCPageAlreadyDirty;
2368 /** GC: The number of real pages faults during dirty bit tracking. */
2369 STAMCOUNTER StatGCDirtyTrackRealPF;
2370
2371 /** GC: Profiling of the PGMTrackDirtyBit() body */
2372 STAMPROFILE StatGCDirtyBitTracking;
2373 /** HC: Profiling of the PGMTrackDirtyBit() body */
2374 STAMPROFILE StatHCDirtyBitTracking;
2375
2376 /** GC: Profiling of the PGMGstModifyPage() body */
2377 STAMPROFILE StatGCGstModifyPage;
2378 /** HC: Profiling of the PGMGstModifyPage() body */
2379 STAMPROFILE StatHCGstModifyPage;
2380
2381 /** GC: The number of time we've marked a PD not present from SyncPage to virtualize the accessed bit. */
2382 STAMCOUNTER StatGCSyncPagePDNAs;
2383 /** GC: The number of time we've encountered an out-of-sync PD in SyncPage. */
2384 STAMCOUNTER StatGCSyncPagePDOutOfSync;
2385 /** HC: The number of time we've marked a PD not present from SyncPage to virtualize the accessed bit. */
2386 STAMCOUNTER StatHCSyncPagePDNAs;
2387 /** HC: The number of time we've encountered an out-of-sync PD in SyncPage. */
2388 STAMCOUNTER StatHCSyncPagePDOutOfSync;
2389
2390 STAMCOUNTER StatSynPT4kGC;
2391 STAMCOUNTER StatSynPT4kHC;
2392 STAMCOUNTER StatSynPT4MGC;
2393 STAMCOUNTER StatSynPT4MHC;
2394
2395 /** Profiling of the PGMFlushTLB() body. */
2396 STAMPROFILE StatFlushTLB;
2397 /** The number of times PGMFlushTLB was called with a new CR3, non-global. (switch) */
2398 STAMCOUNTER StatFlushTLBNewCR3;
2399 /** The number of times PGMFlushTLB was called with a new CR3, global. (switch) */
2400 STAMCOUNTER StatFlushTLBNewCR3Global;
2401 /** The number of times PGMFlushTLB was called with the same CR3, non-global. (flush) */
2402 STAMCOUNTER StatFlushTLBSameCR3;
2403 /** The number of times PGMFlushTLB was called with the same CR3, global. (flush) */
2404 STAMCOUNTER StatFlushTLBSameCR3Global;
2405
2406 STAMPROFILE StatGCSyncCR3; /**< GC: PGMSyncCR3() profiling. */
2407 STAMPROFILE StatGCSyncCR3Handlers; /**< GC: Profiling of the PGMSyncCR3() update handler section. */
2408 STAMPROFILE StatGCSyncCR3HandlerVirtualReset; /**< GC: Profiling of the virtual handler resets. */
2409 STAMPROFILE StatGCSyncCR3HandlerVirtualUpdate; /**< GC: Profiling of the virtual handler updates. */
2410 STAMCOUNTER StatGCSyncCR3Global; /**< GC: The number of global CR3 syncs. */
2411 STAMCOUNTER StatGCSyncCR3NotGlobal; /**< GC: The number of non-global CR3 syncs. */
2412 STAMCOUNTER StatGCSyncCR3DstFreed; /**< GC: The number of times we've had to free a shadow entry. */
2413 STAMCOUNTER StatGCSyncCR3DstFreedSrcNP; /**< GC: The number of times we've had to free a shadow entry for which the source entry was not present. */
2414 STAMCOUNTER StatGCSyncCR3DstNotPresent; /**< GC: The number of times we've encountered a not present shadow entry for a present guest entry. */
2415 STAMCOUNTER StatGCSyncCR3DstSkippedGlobalPD; /**< GC: The number of times a global page directory wasn't flushed. */
2416 STAMCOUNTER StatGCSyncCR3DstSkippedGlobalPT; /**< GC: The number of times a page table with only global entries wasn't flushed. */
2417 STAMCOUNTER StatGCSyncCR3DstCacheHit; /**< GC: The number of times we got some kind of cache hit on a page table. */
2418
2419 STAMPROFILE StatHCSyncCR3; /**< HC: PGMSyncCR3() profiling. */
2420 STAMPROFILE StatHCSyncCR3Handlers; /**< HC: Profiling of the PGMSyncCR3() update handler section. */
2421 STAMPROFILE StatHCSyncCR3HandlerVirtualReset; /**< HC: Profiling of the virtual handler resets. */
2422 STAMPROFILE StatHCSyncCR3HandlerVirtualUpdate; /**< HC: Profiling of the virtual handler updates. */
2423 STAMCOUNTER StatHCSyncCR3Global; /**< HC: The number of global CR3 syncs. */
2424 STAMCOUNTER StatHCSyncCR3NotGlobal; /**< HC: The number of non-global CR3 syncs. */
2425 STAMCOUNTER StatHCSyncCR3DstFreed; /**< HC: The number of times we've had to free a shadow entry. */
2426 STAMCOUNTER StatHCSyncCR3DstFreedSrcNP; /**< HC: The number of times we've had to free a shadow entry for which the source entry was not present. */
2427 STAMCOUNTER StatHCSyncCR3DstNotPresent; /**< HC: The number of times we've encountered a not present shadow entry for a present guest entry. */
2428 STAMCOUNTER StatHCSyncCR3DstSkippedGlobalPD; /**< HC: The number of times a global page directory wasn't flushed. */
2429 STAMCOUNTER StatHCSyncCR3DstSkippedGlobalPT; /**< HC: The number of times a page table with only global entries wasn't flushed. */
2430 STAMCOUNTER StatHCSyncCR3DstCacheHit; /**< HC: The number of times we got some kind of cache hit on a page table. */
2431
2432 /** GC: Profiling of pgmHandlerVirtualFindByPhysAddr. */
2433 STAMPROFILE StatVirtHandleSearchByPhysGC;
2434 /** HC: Profiling of pgmHandlerVirtualFindByPhysAddr. */
2435 STAMPROFILE StatVirtHandleSearchByPhysHC;
2436 /** HC: The number of times PGMR3HandlerPhysicalReset is called. */
2437 STAMCOUNTER StatHandlePhysicalReset;
2438
2439 STAMPROFILE StatCheckPageFault;
2440 STAMPROFILE StatLazySyncPT;
2441 STAMPROFILE StatMapping;
2442 STAMPROFILE StatOutOfSync;
2443 STAMPROFILE StatHandlers;
2444 STAMPROFILE StatEIPHandlers;
2445 STAMPROFILE StatHCPrefetch;
2446
2447# ifdef PGMPOOL_WITH_GCPHYS_TRACKING
2448 /** The number of first time shadowings. */
2449 STAMCOUNTER StatTrackVirgin;
2450 /** The number of times switching to cRef2, i.e. the page is being shadowed by two PTs. */
2451 STAMCOUNTER StatTrackAliased;
2452 /** The number of times we're tracking using cRef2. */
2453 STAMCOUNTER StatTrackAliasedMany;
2454 /** The number of times we're hitting pages which has overflowed cRef2. */
2455 STAMCOUNTER StatTrackAliasedLots;
2456 /** The number of times the extent list grows to long. */
2457 STAMCOUNTER StatTrackOverflows;
2458 /** Profiling of SyncPageWorkerTrackDeref (expensive). */
2459 STAMPROFILE StatTrackDeref;
2460# endif
2461
2462 /** Ring-3/0 page mapper TLB hits. */
2463 STAMCOUNTER StatPageHCMapTlbHits;
2464 /** Ring-3/0 page mapper TLB misses. */
2465 STAMCOUNTER StatPageHCMapTlbMisses;
2466 /** Ring-3/0 chunk mapper TLB hits. */
2467 STAMCOUNTER StatChunkR3MapTlbHits;
2468 /** Ring-3/0 chunk mapper TLB misses. */
2469 STAMCOUNTER StatChunkR3MapTlbMisses;
2470 /** Times a shared page has been replaced by a private one. */
2471 STAMCOUNTER StatPageReplaceShared;
2472 /** Times the zero page has been replaced by a private one. */
2473 STAMCOUNTER StatPageReplaceZero;
2474 /** The number of times we've executed GMMR3AllocateHandyPages. */
2475 STAMCOUNTER StatPageHandyAllocs;
2476
2477 /** Allocated mbs of guest ram */
2478 STAMCOUNTER StatDynRamTotal;
2479 /** Nr of pgmr3PhysGrowRange calls. */
2480 STAMCOUNTER StatDynRamGrow;
2481
2482 STAMCOUNTER StatGCTrap0ePD[X86_PG_ENTRIES];
2483 STAMCOUNTER StatGCSyncPtPD[X86_PG_ENTRIES];
2484 STAMCOUNTER StatGCSyncPagePD[X86_PG_ENTRIES];
2485#endif
2486} PGM, *PPGM;
2487
2488
2489/** @name PGM::fSyncFlags Flags
2490 * @{
2491 */
2492/** Updates the virtual access handler state bit in PGMPAGE. */
2493#define PGM_SYNC_UPDATE_PAGE_BIT_VIRTUAL RT_BIT(0)
2494/** Always sync CR3. */
2495#define PGM_SYNC_ALWAYS RT_BIT(1)
2496/** Check monitoring on next CR3 (re)load and invalidate page. */
2497#define PGM_SYNC_MONITOR_CR3 RT_BIT(2)
2498/** Clear the page pool (a light weight flush). */
2499#define PGM_SYNC_CLEAR_PGM_POOL RT_BIT(8)
2500/** @} */
2501
2502
2503__BEGIN_DECLS
2504
2505int pgmLock(PVM pVM);
2506void pgmUnlock(PVM pVM);
2507
2508PGMGCDECL(int) pgmGCGuestPDWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, void *pvFault, RTGCPHYS GCPhysFault, void *pvUser);
2509PGMDECL(int) pgmPhysRomWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, void *pvFault, RTGCPHYS GCPhysFault, void *pvUser);
2510int pgmR3ChangeMode(PVM pVM, PGMMODE enmGuestMode);
2511
2512int pgmR3SyncPTResolveConflict(PVM pVM, PPGMMAPPING pMapping, PVBOXPD pPDSrc, int iPDOld);
2513PPGMMAPPING pgmGetMapping(PVM pVM, RTGCPTR GCPtr);
2514void pgmR3MapRelocate(PVM pVM, PPGMMAPPING pMapping, int iPDOld, int iPDNew);
2515DECLCALLBACK(void) pgmR3MapInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
2516
2517void pgmR3HandlerPhysicalUpdateAll(PVM pVM);
2518int pgmHandlerVirtualFindByPhysAddr(PVM pVM, RTGCPHYS GCPhys, PPGMVIRTHANDLER *ppVirt, unsigned *piPage);
2519DECLCALLBACK(int) pgmHandlerVirtualResetOne(PAVLROGCPTRNODECORE pNode, void *pvUser);
2520#if defined(VBOX_STRICT) || defined(LOG_ENABLED)
2521void pgmHandlerVirtualDumpPhysPages(PVM pVM);
2522#else
2523# define pgmHandlerVirtualDumpPhysPages(a) do { } while (0)
2524#endif
2525DECLCALLBACK(void) pgmR3InfoHandlers(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
2526
2527
2528int pgmPhysPageLoadIntoTlb(PPGM pPGM, RTGCPHYS GCPhys);
2529int pgmPhysPageMakeWritable(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys);
2530int pgmPhysPageMap(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys, PPPGMPAGEMAP ppMap, void **ppv);
2531#ifdef IN_RING3
2532int pgmR3PhysChunkMap(PVM pVM, uint32_t idChunk, PPPGMCHUNKR3MAP ppChunk);
2533int pgmR3PhysRomReset(PVM pVM);
2534#ifndef VBOX_WITH_NEW_PHYS_CODE
2535int pgmr3PhysGrowRange(PVM pVM, RTGCPHYS GCPhys);
2536#endif
2537
2538int pgmR3PoolInit(PVM pVM);
2539void pgmR3PoolRelocate(PVM pVM);
2540void pgmR3PoolReset(PVM pVM);
2541
2542#endif /* IN_RING3 */
2543#ifdef IN_GC
2544void *pgmGCPoolMapPage(PVM pVM, PPGMPOOLPAGE pPage);
2545#endif
2546int pgmPoolAlloc(PVM pVM, RTGCPHYS GCPhys, PGMPOOLKIND enmKind, uint16_t iUser, uint16_t iUserTable, PPPGMPOOLPAGE ppPage);
2547PPGMPOOLPAGE pgmPoolGetPageByHCPhys(PVM pVM, RTHCPHYS HCPhys);
2548void pgmPoolFree(PVM pVM, RTHCPHYS HCPhys, uint16_t iUser, uint16_t iUserTable);
2549void pgmPoolFreeByPage(PPGMPOOL pPool, PPGMPOOLPAGE pPage, uint16_t iUser, uint16_t iUserTable);
2550int pgmPoolFlushPage(PPGMPOOL pPool, PPGMPOOLPAGE pPage);
2551void pgmPoolFlushAll(PVM pVM);
2552void pgmPoolClearAll(PVM pVM);
2553void pgmPoolTrackFlushGCPhysPT(PVM pVM, PPGMPAGE pPhysPage, uint16_t iShw, uint16_t cRefs);
2554void pgmPoolTrackFlushGCPhysPTs(PVM pVM, PPGMPAGE pPhysPage, uint16_t iPhysExt);
2555int pgmPoolTrackFlushGCPhysPTsSlow(PVM pVM, PPGMPAGE pPhysPage);
2556PPGMPOOLPHYSEXT pgmPoolTrackPhysExtAlloc(PVM pVM, uint16_t *piPhysExt);
2557void pgmPoolTrackPhysExtFree(PVM pVM, uint16_t iPhysExt);
2558void pgmPoolTrackPhysExtFreeList(PVM pVM, uint16_t iPhysExt);
2559uint16_t pgmPoolTrackPhysExtAddref(PVM pVM, uint16_t u16, uint16_t iShwPT);
2560void pgmPoolTrackPhysExtDerefGCPhys(PPGMPOOL pPool, PPGMPOOLPAGE pPoolPage, PPGMPAGE pPhysPage);
2561#ifdef PGMPOOL_WITH_MONITORING
2562# ifdef IN_RING3
2563void pgmPoolMonitorChainChanging(PPGMPOOL pPool, PPGMPOOLPAGE pPage, RTGCPHYS GCPhysFault, RTHCPTR pvAddress, PDISCPUSTATE pCpu);
2564# else
2565void pgmPoolMonitorChainChanging(PPGMPOOL pPool, PPGMPOOLPAGE pPage, RTGCPHYS GCPhysFault, RTGCPTR pvAddress, PDISCPUSTATE pCpu);
2566# endif
2567int pgmPoolMonitorChainFlush(PPGMPOOL pPool, PPGMPOOLPAGE pPage);
2568void pgmPoolMonitorModifiedInsert(PPGMPOOL pPool, PPGMPOOLPAGE pPage);
2569void pgmPoolMonitorModifiedClearAll(PVM pVM);
2570int pgmPoolMonitorMonitorCR3(PPGMPOOL pPool, uint16_t idxRoot, RTGCPHYS GCPhysCR3);
2571int pgmPoolMonitorUnmonitorCR3(PPGMPOOL pPool, uint16_t idxRoot);
2572#endif
2573
2574__END_DECLS
2575
2576
2577/**
2578 * Gets the PGMRAMRANGE structure for a guest page.
2579 *
2580 * @returns Pointer to the RAM range on success.
2581 * @returns NULL on a VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS condition.
2582 *
2583 * @param pPGM PGM handle.
2584 * @param GCPhys The GC physical address.
2585 */
2586DECLINLINE(PPGMRAMRANGE) pgmPhysGetRange(PPGM pPGM, RTGCPHYS GCPhys)
2587{
2588 /*
2589 * Optimize for the first range.
2590 */
2591 PPGMRAMRANGE pRam = CTXALLSUFF(pPGM->pRamRanges);
2592 RTGCPHYS off = GCPhys - pRam->GCPhys;
2593 if (RT_UNLIKELY(off >= pRam->cb))
2594 {
2595 do
2596 {
2597 pRam = CTXALLSUFF(pRam->pNext);
2598 if (RT_UNLIKELY(!pRam))
2599 break;
2600 off = GCPhys - pRam->GCPhys;
2601 } while (off >= pRam->cb);
2602 }
2603 return pRam;
2604}
2605
2606
2607/**
2608 * Gets the PGMPAGE structure for a guest page.
2609 *
2610 * @returns Pointer to the page on success.
2611 * @returns NULL on a VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS condition.
2612 *
2613 * @param pPGM PGM handle.
2614 * @param GCPhys The GC physical address.
2615 */
2616DECLINLINE(PPGMPAGE) pgmPhysGetPage(PPGM pPGM, RTGCPHYS GCPhys)
2617{
2618 /*
2619 * Optimize for the first range.
2620 */
2621 PPGMRAMRANGE pRam = CTXALLSUFF(pPGM->pRamRanges);
2622 RTGCPHYS off = GCPhys - pRam->GCPhys;
2623 if (RT_UNLIKELY(off >= pRam->cb))
2624 {
2625 do
2626 {
2627 pRam = CTXALLSUFF(pRam->pNext);
2628 if (RT_UNLIKELY(!pRam))
2629 return NULL;
2630 off = GCPhys - pRam->GCPhys;
2631 } while (off >= pRam->cb);
2632 }
2633 return &pRam->aPages[off >> PAGE_SHIFT];
2634}
2635
2636
2637/**
2638 * Gets the PGMPAGE structure for a guest page.
2639 *
2640 * Old Phys code: Will make sure the page is present.
2641 *
2642 * @returns VBox status code.
2643 * @retval VINF_SUCCESS and a valid *ppPage on success.
2644 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if the address isn't valid.
2645 *
2646 * @param pPGM PGM handle.
2647 * @param GCPhys The GC physical address.
2648 * @param ppPage Where to store the page poitner on success.
2649 */
2650DECLINLINE(int) pgmPhysGetPageEx(PPGM pPGM, RTGCPHYS GCPhys, PPPGMPAGE ppPage)
2651{
2652 /*
2653 * Optimize for the first range.
2654 */
2655 PPGMRAMRANGE pRam = CTXALLSUFF(pPGM->pRamRanges);
2656 RTGCPHYS off = GCPhys - pRam->GCPhys;
2657 if (RT_UNLIKELY(off >= pRam->cb))
2658 {
2659 do
2660 {
2661 pRam = CTXALLSUFF(pRam->pNext);
2662 if (RT_UNLIKELY(!pRam))
2663 {
2664 *ppPage = NULL; /* avoid incorrect and very annoying GCC warnings */
2665 return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2666 }
2667 off = GCPhys - pRam->GCPhys;
2668 } while (off >= pRam->cb);
2669 }
2670 *ppPage = &pRam->aPages[off >> PAGE_SHIFT];
2671#ifndef VBOX_WITH_NEW_PHYS_CODE
2672
2673 /*
2674 * Make sure it's present.
2675 */
2676 if (RT_UNLIKELY( !PGM_PAGE_GET_HCPHYS(*ppPage)
2677 && (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)))
2678 {
2679#ifdef IN_RING3
2680 int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
2681#else
2682 int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2683#endif
2684 if (VBOX_FAILURE(rc))
2685 {
2686 *ppPage = NULL; /* avoid incorrect and very annoying GCC warnings */
2687 return rc;
2688 }
2689 Assert(rc == VINF_SUCCESS);
2690 }
2691#endif
2692 return VINF_SUCCESS;
2693}
2694
2695
2696
2697
2698/**
2699 * Gets the PGMPAGE structure for a guest page.
2700 *
2701 * Old Phys code: Will make sure the page is present.
2702 *
2703 * @returns VBox status code.
2704 * @retval VINF_SUCCESS and a valid *ppPage on success.
2705 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if the address isn't valid.
2706 *
2707 * @param pPGM PGM handle.
2708 * @param GCPhys The GC physical address.
2709 * @param ppPage Where to store the page poitner on success.
2710 * @param ppRamHint Where to read and store the ram list hint.
2711 * The caller initializes this to NULL before the call.
2712 */
2713DECLINLINE(int) pgmPhysGetPageWithHintEx(PPGM pPGM, RTGCPHYS GCPhys, PPPGMPAGE ppPage, PPGMRAMRANGE *ppRamHint)
2714{
2715 RTGCPHYS off;
2716 PPGMRAMRANGE pRam = *ppRamHint;
2717 if ( !pRam
2718 || RT_UNLIKELY((off = GCPhys - pRam->GCPhys) >= pRam->cb))
2719 {
2720 pRam = CTXALLSUFF(pPGM->pRamRanges);
2721 off = GCPhys - pRam->GCPhys;
2722 if (RT_UNLIKELY(off >= pRam->cb))
2723 {
2724 do
2725 {
2726 pRam = CTXALLSUFF(pRam->pNext);
2727 if (RT_UNLIKELY(!pRam))
2728 {
2729 *ppPage = NULL; /* Kill the incorrect and extremely annoying GCC warnings. */
2730 return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2731 }
2732 off = GCPhys - pRam->GCPhys;
2733 } while (off >= pRam->cb);
2734 }
2735 *ppRamHint = pRam;
2736 }
2737 *ppPage = &pRam->aPages[off >> PAGE_SHIFT];
2738#ifndef VBOX_WITH_NEW_PHYS_CODE
2739
2740 /*
2741 * Make sure it's present.
2742 */
2743 if (RT_UNLIKELY( !PGM_PAGE_GET_HCPHYS(*ppPage)
2744 && (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)))
2745 {
2746#ifdef IN_RING3
2747 int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
2748#else
2749 int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2750#endif
2751 if (VBOX_FAILURE(rc))
2752 {
2753 *ppPage = NULL; /* Shut up annoying smart ass. */
2754 return rc;
2755 }
2756 Assert(rc == VINF_SUCCESS);
2757 }
2758#endif
2759 return VINF_SUCCESS;
2760}
2761
2762
2763/**
2764 * Gets the PGMPAGE structure for a guest page together with the PGMRAMRANGE.
2765 *
2766 * @returns Pointer to the page on success.
2767 * @returns NULL on a VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS condition.
2768 *
2769 * @param pPGM PGM handle.
2770 * @param GCPhys The GC physical address.
2771 * @param ppRam Where to store the pointer to the PGMRAMRANGE.
2772 */
2773DECLINLINE(PPGMPAGE) pgmPhysGetPageAndRange(PPGM pPGM, RTGCPHYS GCPhys, PPGMRAMRANGE *ppRam)
2774{
2775 /*
2776 * Optimize for the first range.
2777 */
2778 PPGMRAMRANGE pRam = CTXALLSUFF(pPGM->pRamRanges);
2779 RTGCPHYS off = GCPhys - pRam->GCPhys;
2780 if (RT_UNLIKELY(off >= pRam->cb))
2781 {
2782 do
2783 {
2784 pRam = CTXALLSUFF(pRam->pNext);
2785 if (RT_UNLIKELY(!pRam))
2786 return NULL;
2787 off = GCPhys - pRam->GCPhys;
2788 } while (off >= pRam->cb);
2789 }
2790 *ppRam = pRam;
2791 return &pRam->aPages[off >> PAGE_SHIFT];
2792}
2793
2794
2795
2796
2797/**
2798 * Gets the PGMPAGE structure for a guest page together with the PGMRAMRANGE.
2799 *
2800 * @returns Pointer to the page on success.
2801 * @returns NULL on a VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS condition.
2802 *
2803 * @param pPGM PGM handle.
2804 * @param GCPhys The GC physical address.
2805 * @param ppPage Where to store the pointer to the PGMPAGE structure.
2806 * @param ppRam Where to store the pointer to the PGMRAMRANGE structure.
2807 */
2808DECLINLINE(int) pgmPhysGetPageAndRangeEx(PPGM pPGM, RTGCPHYS GCPhys, PPPGMPAGE ppPage, PPGMRAMRANGE *ppRam)
2809{
2810 /*
2811 * Optimize for the first range.
2812 */
2813 PPGMRAMRANGE pRam = CTXALLSUFF(pPGM->pRamRanges);
2814 RTGCPHYS off = GCPhys - pRam->GCPhys;
2815 if (RT_UNLIKELY(off >= pRam->cb))
2816 {
2817 do
2818 {
2819 pRam = CTXALLSUFF(pRam->pNext);
2820 if (RT_UNLIKELY(!pRam))
2821 {
2822 *ppRam = NULL; /* Shut up silly GCC warnings. */
2823 *ppPage = NULL; /* ditto */
2824 return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2825 }
2826 off = GCPhys - pRam->GCPhys;
2827 } while (off >= pRam->cb);
2828 }
2829 *ppRam = pRam;
2830 *ppPage = &pRam->aPages[off >> PAGE_SHIFT];
2831#ifndef VBOX_WITH_NEW_PHYS_CODE
2832
2833 /*
2834 * Make sure it's present.
2835 */
2836 if (RT_UNLIKELY( !PGM_PAGE_GET_HCPHYS(*ppPage)
2837 && (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)))
2838 {
2839#ifdef IN_RING3
2840 int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
2841#else
2842 int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2843#endif
2844 if (VBOX_FAILURE(rc))
2845 {
2846 *ppPage = NULL; /* Shut up silly GCC warnings. */
2847 *ppPage = NULL; /* ditto */
2848 return rc;
2849 }
2850 Assert(rc == VINF_SUCCESS);
2851
2852 }
2853#endif
2854 return VINF_SUCCESS;
2855}
2856
2857
2858/**
2859 * Convert GC Phys to HC Phys.
2860 *
2861 * @returns VBox status.
2862 * @param pPGM PGM handle.
2863 * @param GCPhys The GC physical address.
2864 * @param pHCPhys Where to store the corresponding HC physical address.
2865 *
2866 * @deprecated Doesn't deal with zero, shared or write monitored pages.
2867 * Avoid when writing new code!
2868 */
2869DECLINLINE(int) pgmRamGCPhys2HCPhys(PPGM pPGM, RTGCPHYS GCPhys, PRTHCPHYS pHCPhys)
2870{
2871 PPGMPAGE pPage;
2872 int rc = pgmPhysGetPageEx(pPGM, GCPhys, &pPage);
2873 if (VBOX_FAILURE(rc))
2874 return rc;
2875 *pHCPhys = PGM_PAGE_GET_HCPHYS(pPage) | (GCPhys & PAGE_OFFSET_MASK);
2876 return VINF_SUCCESS;
2877}
2878
2879
2880#ifndef IN_GC
2881/**
2882 * Queries the Physical TLB entry for a physical guest page,
2883 * attemting to load the TLB entry if necessary.
2884 *
2885 * @returns VBox status code.
2886 * @retval VINF_SUCCESS on success
2887 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2888 * @param pPGM The PGM instance handle.
2889 * @param GCPhys The address of the guest page.
2890 * @param ppTlbe Where to store the pointer to the TLB entry.
2891 */
2892
2893DECLINLINE(int) pgmPhysPageQueryTlbe(PPGM pPGM, RTGCPHYS GCPhys, PPPGMPAGEMAPTLBE ppTlbe)
2894{
2895 int rc;
2896 PPGMPAGEMAPTLBE pTlbe = &pPGM->CTXSUFF(PhysTlb).aEntries[PGM_PAGEMAPTLB_IDX(GCPhys)];
2897 if (pTlbe->GCPhys == (GCPhys & X86_PTE_PAE_PG_MASK))
2898 {
2899 STAM_COUNTER_INC(&pPGM->CTXMID(StatPage,MapTlbHits));
2900 rc = VINF_SUCCESS;
2901 }
2902 else
2903 rc = pgmPhysPageLoadIntoTlb(pPGM, GCPhys);
2904 *ppTlbe = pTlbe;
2905 return rc;
2906}
2907#endif /* !IN_GC */
2908
2909
2910#ifndef VBOX_WITH_NEW_PHYS_CODE
2911/**
2912 * Convert GC Phys to HC Virt.
2913 *
2914 * @returns VBox status.
2915 * @param pPGM PGM handle.
2916 * @param GCPhys The GC physical address.
2917 * @param pHCPtr Where to store the corresponding HC virtual address.
2918 *
2919 * @deprecated This will be eliminated by PGMPhysGCPhys2CCPtr.
2920 */
2921DECLINLINE(int) pgmRamGCPhys2HCPtr(PPGM pPGM, RTGCPHYS GCPhys, PRTHCPTR pHCPtr)
2922{
2923 PPGMRAMRANGE pRam;
2924 PPGMPAGE pPage;
2925 int rc = pgmPhysGetPageAndRangeEx(pPGM, GCPhys, &pPage, &pRam);
2926 if (VBOX_FAILURE(rc))
2927 {
2928 *pHCPtr = 0; /* Shut up silly GCC warnings. */
2929 return rc;
2930 }
2931 RTGCPHYS off = GCPhys - pRam->GCPhys;
2932
2933 if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)
2934 {
2935 unsigned iChunk = off >> PGM_DYNAMIC_CHUNK_SHIFT;
2936 *pHCPtr = (RTHCPTR)((RTHCUINTPTR)CTXSUFF(pRam->pavHCChunk)[iChunk] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));
2937 return VINF_SUCCESS;
2938 }
2939 if (pRam->pvHC)
2940 {
2941 *pHCPtr = (RTHCPTR)((RTHCUINTPTR)pRam->pvHC + off);
2942 return VINF_SUCCESS;
2943 }
2944 *pHCPtr = 0; /* Shut up silly GCC warnings. */
2945 return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2946}
2947#endif /* !VBOX_WITH_NEW_PHYS_CODE */
2948
2949
2950/**
2951 * Convert GC Phys to HC Virt.
2952 *
2953 * @returns VBox status.
2954 * @param PVM VM handle.
2955 * @param pRam Ram range
2956 * @param GCPhys The GC physical address.
2957 * @param pHCPtr Where to store the corresponding HC virtual address.
2958 *
2959 * @deprecated This will be eliminated. Don't use it.
2960 */
2961DECLINLINE(int) pgmRamGCPhys2HCPtrWithRange(PVM pVM, PPGMRAMRANGE pRam, RTGCPHYS GCPhys, PRTHCPTR pHCPtr)
2962{
2963 RTGCPHYS off = GCPhys - pRam->GCPhys;
2964 Assert(off < pRam->cb);
2965
2966 if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)
2967 {
2968 unsigned idx = (off >> PGM_DYNAMIC_CHUNK_SHIFT);
2969 /* Physical chunk in dynamically allocated range not present? */
2970 if (RT_UNLIKELY(!CTXSUFF(pRam->pavHCChunk)[idx]))
2971 {
2972#ifdef IN_RING3
2973 int rc = pgmr3PhysGrowRange(pVM, GCPhys);
2974#else
2975 int rc = CTXALLMID(VMM, CallHost)(pVM, VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2976#endif
2977 if (rc != VINF_SUCCESS)
2978 {
2979 *pHCPtr = 0; /* GCC crap */
2980 return rc;
2981 }
2982 }
2983 *pHCPtr = (RTHCPTR)((RTHCUINTPTR)CTXSUFF(pRam->pavHCChunk)[idx] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));
2984 return VINF_SUCCESS;
2985 }
2986 if (pRam->pvHC)
2987 {
2988 *pHCPtr = (RTHCPTR)((RTHCUINTPTR)pRam->pvHC + off);
2989 return VINF_SUCCESS;
2990 }
2991 *pHCPtr = 0; /* GCC crap */
2992 return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2993}
2994
2995
2996/**
2997 * Convert GC Phys to HC Virt and HC Phys.
2998 *
2999 * @returns VBox status.
3000 * @param pPGM PGM handle.
3001 * @param GCPhys The GC physical address.
3002 * @param pHCPtr Where to store the corresponding HC virtual address.
3003 * @param pHCPhys Where to store the HC Physical address and its flags.
3004 *
3005 * @deprecated Will go away or be changed. Only user is MapCR3. MapCR3 will have to do ring-3
3006 * and ring-0 locking of the CR3 in a lazy fashion I'm fear... or perhaps not. we'll see.
3007 */
3008DECLINLINE(int) pgmRamGCPhys2HCPtrAndHCPhysWithFlags(PPGM pPGM, RTGCPHYS GCPhys, PRTHCPTR pHCPtr, PRTHCPHYS pHCPhys)
3009{
3010 PPGMRAMRANGE pRam;
3011 PPGMPAGE pPage;
3012 int rc = pgmPhysGetPageAndRangeEx(pPGM, GCPhys, &pPage, &pRam);
3013 if (VBOX_FAILURE(rc))
3014 {
3015 *pHCPtr = 0; /* Shut up crappy GCC warnings */
3016 *pHCPhys = 0; /* ditto */
3017 return rc;
3018 }
3019 RTGCPHYS off = GCPhys - pRam->GCPhys;
3020
3021 *pHCPhys = pPage->HCPhys; /** @todo PAGE FLAGS */
3022 if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)
3023 {
3024 unsigned idx = (off >> PGM_DYNAMIC_CHUNK_SHIFT);
3025 *pHCPtr = (RTHCPTR)((RTHCUINTPTR)CTXSUFF(pRam->pavHCChunk)[idx] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));
3026 return VINF_SUCCESS;
3027 }
3028 if (pRam->pvHC)
3029 {
3030 *pHCPtr = (RTHCPTR)((RTHCUINTPTR)pRam->pvHC + off);
3031 return VINF_SUCCESS;
3032 }
3033 *pHCPtr = 0;
3034 return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
3035}
3036
3037
3038/**
3039 * Clears flags associated with a RAM address.
3040 *
3041 * @returns VBox status code.
3042 * @param pPGM PGM handle.
3043 * @param GCPhys Guest context physical address.
3044 * @param fFlags fFlags to clear. (Bits 0-11.)
3045 */
3046DECLINLINE(int) pgmRamFlagsClearByGCPhys(PPGM pPGM, RTGCPHYS GCPhys, unsigned fFlags)
3047{
3048 PPGMPAGE pPage;
3049 int rc = pgmPhysGetPageEx(pPGM, GCPhys, &pPage);
3050 if (VBOX_FAILURE(rc))
3051 return rc;
3052
3053 fFlags &= ~X86_PTE_PAE_PG_MASK;
3054 pPage->HCPhys &= ~(RTHCPHYS)fFlags; /** @todo PAGE FLAGS */
3055 return VINF_SUCCESS;
3056}
3057
3058
3059/**
3060 * Clears flags associated with a RAM address.
3061 *
3062 * @returns VBox status code.
3063 * @param pPGM PGM handle.
3064 * @param GCPhys Guest context physical address.
3065 * @param fFlags fFlags to clear. (Bits 0-11.)
3066 * @param ppRamHint Where to read and store the ram list hint.
3067 * The caller initializes this to NULL before the call.
3068 */
3069DECLINLINE(int) pgmRamFlagsClearByGCPhysWithHint(PPGM pPGM, RTGCPHYS GCPhys, unsigned fFlags, PPGMRAMRANGE *ppRamHint)
3070{
3071 PPGMPAGE pPage;
3072 int rc = pgmPhysGetPageWithHintEx(pPGM, GCPhys, &pPage, ppRamHint);
3073 if (VBOX_FAILURE(rc))
3074 return rc;
3075
3076 fFlags &= ~X86_PTE_PAE_PG_MASK;
3077 pPage->HCPhys &= ~(RTHCPHYS)fFlags; /** @todo PAGE FLAGS */
3078 return VINF_SUCCESS;
3079}
3080
3081/**
3082 * Sets (bitwise OR) flags associated with a RAM address.
3083 *
3084 * @returns VBox status code.
3085 * @param pPGM PGM handle.
3086 * @param GCPhys Guest context physical address.
3087 * @param fFlags fFlags to set clear. (Bits 0-11.)
3088 */
3089DECLINLINE(int) pgmRamFlagsSetByGCPhys(PPGM pPGM, RTGCPHYS GCPhys, unsigned fFlags)
3090{
3091 PPGMPAGE pPage;
3092 int rc = pgmPhysGetPageEx(pPGM, GCPhys, &pPage);
3093 if (VBOX_FAILURE(rc))
3094 return rc;
3095
3096 fFlags &= ~X86_PTE_PAE_PG_MASK;
3097 pPage->HCPhys |= fFlags; /** @todo PAGE FLAGS */
3098 return VINF_SUCCESS;
3099}
3100
3101
3102/**
3103 * Sets (bitwise OR) flags associated with a RAM address.
3104 *
3105 * @returns VBox status code.
3106 * @param pPGM PGM handle.
3107 * @param GCPhys Guest context physical address.
3108 * @param fFlags fFlags to set clear. (Bits 0-11.)
3109 * @param ppRamHint Where to read and store the ram list hint.
3110 * The caller initializes this to NULL before the call.
3111 */
3112DECLINLINE(int) pgmRamFlagsSetByGCPhysWithHint(PPGM pPGM, RTGCPHYS GCPhys, unsigned fFlags, PPGMRAMRANGE *ppRamHint)
3113{
3114 PPGMPAGE pPage;
3115 int rc = pgmPhysGetPageWithHintEx(pPGM, GCPhys, &pPage, ppRamHint);
3116 if (VBOX_FAILURE(rc))
3117 return rc;
3118
3119 fFlags &= ~X86_PTE_PAE_PG_MASK;
3120 pPage->HCPhys |= fFlags; /** @todo PAGE FLAGS */
3121 return VINF_SUCCESS;
3122}
3123
3124
3125/**
3126 * Gets the page directory for the specified address.
3127 *
3128 * @returns Pointer to the page directory in question.
3129 * @returns NULL if the page directory is not present or on an invalid page.
3130 * @param pPGM Pointer to the PGM instance data.
3131 * @param GCPtr The address.
3132 */
3133DECLINLINE(PX86PDPAE) pgmGstGetPaePD(PPGM pPGM, RTGCUINTPTR GCPtr)
3134{
3135 const unsigned iPdPtr = GCPtr >> X86_PDPTR_SHIFT;
3136 if (CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].n.u1Present)
3137 {
3138 if ((CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK) == pPGM->aGCPhysGstPaePDs[iPdPtr])
3139 return CTXSUFF(pPGM->apGstPaePDs)[iPdPtr];
3140
3141 /* cache is out-of-sync. */
3142 PX86PDPAE pPD;
3143 int rc = PGM_GCPHYS_2_PTR(PGM2VM(pPGM), CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK, &pPD);
3144 if (VBOX_SUCCESS(rc))
3145 return pPD;
3146 AssertMsgFailed(("Impossible! rc=%d PDPE=%#llx\n", rc, CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u));
3147 /* returning NIL_RTGCPHYS is ok if we assume it's just an invalid page of some kind emulated as all 0s. */
3148 }
3149 return NULL;
3150}
3151
3152
3153/**
3154 * Gets the page directory entry for the specified address.
3155 *
3156 * @returns Pointer to the page directory entry in question.
3157 * @returns NULL if the page directory is not present or on an invalid page.
3158 * @param pPGM Pointer to the PGM instance data.
3159 * @param GCPtr The address.
3160 */
3161DECLINLINE(PX86PDEPAE) pgmGstGetPaePDEPtr(PPGM pPGM, RTGCUINTPTR GCPtr)
3162{
3163 const unsigned iPdPtr = GCPtr >> X86_PDPTR_SHIFT;
3164 if (CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].n.u1Present)
3165 {
3166 const unsigned iPD = (GCPtr >> X86_PD_PAE_SHIFT) & X86_PD_PAE_MASK;
3167 if ((CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK) == pPGM->aGCPhysGstPaePDs[iPdPtr])
3168 return &CTXSUFF(pPGM->apGstPaePDs)[iPdPtr]->a[iPD];
3169
3170 /* The cache is out-of-sync. */
3171 PX86PDPAE pPD;
3172 int rc = PGM_GCPHYS_2_PTR(PGM2VM(pPGM), CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK, &pPD);
3173 if (VBOX_SUCCESS(rc))
3174 return &pPD->a[iPD];
3175 AssertMsgFailed(("Impossible! rc=%Vrc PDPE=%RX64\n", rc, CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u));
3176 /* returning NIL_RTGCPHYS is ok if we assume it's just an invalid page or something which we'll emulate as all 0s. */
3177 }
3178 return NULL;
3179}
3180
3181
3182/**
3183 * Gets the page directory entry for the specified address.
3184 *
3185 * @returns The page directory entry in question.
3186 * @returns A non-present entry if the page directory is not present or on an invalid page.
3187 * @param pPGM Pointer to the PGM instance data.
3188 * @param GCPtr The address.
3189 */
3190DECLINLINE(uint64_t) pgmGstGetPaePDE(PPGM pPGM, RTGCUINTPTR GCPtr)
3191{
3192 const unsigned iPdPtr = GCPtr >> X86_PDPTR_SHIFT;
3193 if (CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].n.u1Present)
3194 {
3195 const unsigned iPD = (GCPtr >> X86_PD_PAE_SHIFT) & X86_PD_PAE_MASK;
3196 if ((CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK) == pPGM->aGCPhysGstPaePDs[iPdPtr])
3197 return CTXSUFF(pPGM->apGstPaePDs)[iPdPtr]->a[iPD].u;
3198
3199 /* cache is out-of-sync. */
3200 PX86PDPAE pPD;
3201 int rc = PGM_GCPHYS_2_PTR(PGM2VM(pPGM), CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK, &pPD);
3202 if (VBOX_SUCCESS(rc))
3203 return pPD->a[iPD].u;
3204 AssertMsgFailed(("Impossible! rc=%d PDPE=%#llx\n", rc, CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u));
3205 }
3206 return 0;
3207}
3208
3209
3210/**
3211 * Gets the page directory for the specified address and returns the index into the page directory
3212 *
3213 * @returns Pointer to the page directory in question.
3214 * @returns NULL if the page directory is not present or on an invalid page.
3215 * @param pPGM Pointer to the PGM instance data.
3216 * @param GCPtr The address.
3217 * @param piPD Receives the index into the returned page directory
3218 */
3219DECLINLINE(PX86PDPAE) pgmGstGetPaePDPtr(PPGM pPGM, RTGCUINTPTR GCPtr, unsigned *piPD)
3220{
3221 const unsigned iPdPtr = GCPtr >> X86_PDPTR_SHIFT;
3222 if (CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].n.u1Present)
3223 {
3224 const unsigned iPD = (GCPtr >> X86_PD_PAE_SHIFT) & X86_PD_PAE_MASK;
3225 if ((CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK) == pPGM->aGCPhysGstPaePDs[iPdPtr])
3226 {
3227 *piPD = iPD;
3228 return CTXSUFF(pPGM->apGstPaePDs)[iPdPtr];
3229 }
3230
3231 /* cache is out-of-sync. */
3232 PX86PDPAE pPD;
3233 int rc = PGM_GCPHYS_2_PTR(PGM2VM(pPGM), CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK, &pPD);
3234 if (VBOX_SUCCESS(rc))
3235 {
3236 *piPD = iPD;
3237 return pPD;
3238 }
3239 AssertMsgFailed(("Impossible! rc=%d PDPE=%#llx\n", rc, CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u));
3240 /* returning NIL_RTGCPHYS is ok if we assume it's just an invalid page of some kind emulated as all 0s. */
3241 }
3242 return NULL;
3243}
3244
3245
3246/**
3247 * Checks if any of the specified page flags are set for the given page.
3248 *
3249 * @returns true if any of the flags are set.
3250 * @returns false if all the flags are clear.
3251 * @param pPGM PGM handle.
3252 * @param GCPhys The GC physical address.
3253 * @param fFlags The flags to check for.
3254 */
3255DECLINLINE(bool) pgmRamTestFlags(PPGM pPGM, RTGCPHYS GCPhys, uint64_t fFlags)
3256{
3257 PPGMPAGE pPage = pgmPhysGetPage(pPGM, GCPhys);
3258 return pPage
3259 && (pPage->HCPhys & fFlags) != 0; /** @todo PAGE FLAGS */
3260}
3261
3262
3263/**
3264 * Gets the page state for a physical handler.
3265 *
3266 * @returns The physical handler page state.
3267 * @param pCur The physical handler in question.
3268 */
3269DECLINLINE(unsigned) pgmHandlerPhysicalCalcState(PPGMPHYSHANDLER pCur)
3270{
3271 switch (pCur->enmType)
3272 {
3273 case PGMPHYSHANDLERTYPE_PHYSICAL_WRITE:
3274 return PGM_PAGE_HNDL_PHYS_STATE_WRITE;
3275
3276 case PGMPHYSHANDLERTYPE_MMIO:
3277 case PGMPHYSHANDLERTYPE_PHYSICAL_ALL:
3278 return PGM_PAGE_HNDL_PHYS_STATE_ALL;
3279
3280 default:
3281 AssertFatalMsgFailed(("Invalid type %d\n", pCur->enmType));
3282 }
3283}
3284
3285
3286/**
3287 * Gets the page state for a virtual handler.
3288 *
3289 * @returns The virtual handler page state.
3290 * @param pCur The virtual handler in question.
3291 * @remarks This should never be used on a hypervisor access handler.
3292 */
3293DECLINLINE(unsigned) pgmHandlerVirtualCalcState(PPGMVIRTHANDLER pCur)
3294{
3295 switch (pCur->enmType)
3296 {
3297 case PGMVIRTHANDLERTYPE_WRITE:
3298 return PGM_PAGE_HNDL_VIRT_STATE_WRITE;
3299 case PGMVIRTHANDLERTYPE_ALL:
3300 return PGM_PAGE_HNDL_VIRT_STATE_ALL;
3301 default:
3302 AssertFatalMsgFailed(("Invalid type %d\n", pCur->enmType));
3303 }
3304}
3305
3306
3307/**
3308 * Clears one physical page of a virtual handler
3309 *
3310 * @param pPGM Pointer to the PGM instance.
3311 * @param pCur Virtual handler structure
3312 * @param iPage Physical page index
3313 *
3314 * @remark Only used when PGM_SYNC_UPDATE_PAGE_BIT_VIRTUAL is being set, so no
3315 * need to care about other handlers in the same page.
3316 */
3317DECLINLINE(void) pgmHandlerVirtualClearPage(PPGM pPGM, PPGMVIRTHANDLER pCur, unsigned iPage)
3318{
3319 const PPGMPHYS2VIRTHANDLER pPhys2Virt = &pCur->aPhysToVirt[iPage];
3320
3321 /*
3322 * Remove the node from the tree (it's supposed to be in the tree if we get here!).
3323 */
3324#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
3325 AssertReleaseMsg(pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_IN_TREE,
3326 ("pPhys2Virt=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32}\n",
3327 pPhys2Virt, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler, pPhys2Virt->offNextAlias));
3328#endif
3329 if (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_IS_HEAD)
3330 {
3331 /* We're the head of the alias chain. */
3332 PPGMPHYS2VIRTHANDLER pRemove = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysRemove(&pPGM->CTXSUFF(pTrees)->PhysToVirtHandlers, pPhys2Virt->Core.Key); NOREF(pRemove);
3333#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
3334 AssertReleaseMsg(pRemove != NULL,
3335 ("pPhys2Virt=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32}\n",
3336 pPhys2Virt, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler, pPhys2Virt->offNextAlias));
3337 AssertReleaseMsg(pRemove == pPhys2Virt,
3338 ("wanted: pPhys2Virt=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32}\n"
3339 " got: pRemove=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32}\n",
3340 pPhys2Virt, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler, pPhys2Virt->offNextAlias,
3341 pRemove, pRemove->Core.Key, pRemove->Core.KeyLast, pRemove->offVirtHandler, pRemove->offNextAlias));
3342#endif
3343 if (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK)
3344 {
3345 /* Insert the next list in the alias chain into the tree. */
3346 PPGMPHYS2VIRTHANDLER pNext = (PPGMPHYS2VIRTHANDLER)((intptr_t)pPhys2Virt + (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK));
3347#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
3348 AssertReleaseMsg(pNext->offNextAlias & PGMPHYS2VIRTHANDLER_IN_TREE,
3349 ("pNext=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32}\n",
3350 pNext, pNext->Core.Key, pNext->Core.KeyLast, pNext->offVirtHandler, pNext->offNextAlias));
3351#endif
3352 pNext->offNextAlias |= PGMPHYS2VIRTHANDLER_IS_HEAD;
3353 bool fRc = RTAvlroGCPhysInsert(&pPGM->CTXSUFF(pTrees)->PhysToVirtHandlers, &pNext->Core);
3354 AssertRelease(fRc);
3355 }
3356 }
3357 else
3358 {
3359 /* Locate the previous node in the alias chain. */
3360 PPGMPHYS2VIRTHANDLER pPrev = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysGet(&pPGM->CTXSUFF(pTrees)->PhysToVirtHandlers, pPhys2Virt->Core.Key);
3361#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
3362 AssertReleaseMsg(pPrev != pPhys2Virt,
3363 ("pPhys2Virt=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32} pPrev=%p\n",
3364 pPhys2Virt, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler, pPhys2Virt->offNextAlias, pPrev));
3365#endif
3366 for (;;)
3367 {
3368 PPGMPHYS2VIRTHANDLER pNext = (PPGMPHYS2VIRTHANDLER)((intptr_t)pPrev + (pPrev->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK));
3369 if (pNext == pPhys2Virt)
3370 {
3371 /* unlink. */
3372 LogFlow(("pgmHandlerVirtualClearPage: removed %p:{.offNextAlias=%#RX32} from alias chain. prev %p:{.offNextAlias=%#RX32} [%VGp-%VGp]\n",
3373 pPhys2Virt, pPhys2Virt->offNextAlias, pPrev, pPrev->offNextAlias, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast));
3374 if (!(pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK))
3375 pPrev->offNextAlias &= ~PGMPHYS2VIRTHANDLER_OFF_MASK;
3376 else
3377 {
3378 PPGMPHYS2VIRTHANDLER pNewNext = (PPGMPHYS2VIRTHANDLER)((intptr_t)pPhys2Virt + (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK));
3379 pPrev->offNextAlias = ((intptr_t)pNewNext - (intptr_t)pPrev)
3380 | (pPrev->offNextAlias & ~PGMPHYS2VIRTHANDLER_OFF_MASK);
3381 }
3382 break;
3383 }
3384
3385 /* next */
3386 if (pNext == pPrev)
3387 {
3388#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
3389 AssertReleaseMsg(pNext != pPrev,
3390 ("pPhys2Virt=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32} pPrev=%p\n",
3391 pPhys2Virt, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler, pPhys2Virt->offNextAlias, pPrev));
3392#endif
3393 break;
3394 }
3395 pPrev = pNext;
3396 }
3397 }
3398 Log2(("PHYS2VIRT: Removing %VGp-%VGp %#RX32 %s\n",
3399 pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offNextAlias, HCSTRING(pCur->pszDesc)));
3400 pPhys2Virt->offNextAlias = 0;
3401 pPhys2Virt->Core.KeyLast = NIL_RTGCPHYS; /* require reinsert */
3402
3403 /*
3404 * Clear the ram flags for this page.
3405 */
3406 PPGMPAGE pPage = pgmPhysGetPage(pPGM, pPhys2Virt->Core.Key);
3407 AssertReturnVoid(pPage);
3408 PGM_PAGE_SET_HNDL_VIRT_STATE(pPage, PGM_PAGE_HNDL_VIRT_STATE_NONE);
3409}
3410
3411
3412/**
3413 * Internal worker for finding a 'in-use' shadow page give by it's physical address.
3414 *
3415 * @returns Pointer to the shadow page structure.
3416 * @param pPool The pool.
3417 * @param HCPhys The HC physical address of the shadow page.
3418 */
3419DECLINLINE(PPGMPOOLPAGE) pgmPoolGetPage(PPGMPOOL pPool, RTHCPHYS HCPhys)
3420{
3421 /*
3422 * Look up the page.
3423 */
3424 PPGMPOOLPAGE pPage = (PPGMPOOLPAGE)RTAvloHCPhysGet(&pPool->HCPhysTree, HCPhys & X86_PTE_PAE_PG_MASK);
3425 AssertFatalMsg(pPage && pPage->enmKind != PGMPOOLKIND_FREE, ("HCPhys=%VHp pPage=%p type=%d\n", HCPhys, pPage, (pPage) ? pPage->enmKind : 0));
3426 return pPage;
3427}
3428
3429
3430/**
3431 * Internal worker for finding a 'in-use' shadow page give by it's physical address.
3432 *
3433 * @returns Pointer to the shadow page structure.
3434 * @param pPool The pool.
3435 * @param idx The pool page index.
3436 */
3437DECLINLINE(PPGMPOOLPAGE) pgmPoolGetPageByIdx(PPGMPOOL pPool, unsigned idx)
3438{
3439 AssertFatalMsg(idx >= PGMPOOL_IDX_FIRST && idx < pPool->cCurPages, ("idx=%d\n", idx));
3440 return &pPool->aPages[idx];
3441}
3442
3443
3444#ifdef PGMPOOL_WITH_GCPHYS_TRACKING
3445/**
3446 * Clear references to guest physical memory.
3447 *
3448 * @param pPool The pool.
3449 * @param pPoolPage The pool page.
3450 * @param pPhysPage The physical guest page tracking structure.
3451 */
3452DECLINLINE(void) pgmTrackDerefGCPhys(PPGMPOOL pPool, PPGMPOOLPAGE pPoolPage, PPGMPAGE pPhysPage)
3453{
3454 /*
3455 * Just deal with the simple case here.
3456 */
3457#ifdef LOG_ENABLED
3458 const RTHCPHYS HCPhysOrg = pPhysPage->HCPhys; /** @todo PAGE FLAGS */
3459#endif
3460 const unsigned cRefs = pPhysPage->HCPhys >> MM_RAM_FLAGS_CREFS_SHIFT; /** @todo PAGE FLAGS */
3461 if (cRefs == 1)
3462 {
3463 Assert(pPoolPage->idx == ((pPhysPage->HCPhys >> MM_RAM_FLAGS_IDX_SHIFT) & MM_RAM_FLAGS_IDX_MASK));
3464 pPhysPage->HCPhys = pPhysPage->HCPhys & MM_RAM_FLAGS_NO_REFS_MASK;
3465 }
3466 else
3467 pgmPoolTrackPhysExtDerefGCPhys(pPool, pPoolPage, pPhysPage);
3468 LogFlow(("pgmTrackDerefGCPhys: HCPhys=%RHp -> %RHp\n", HCPhysOrg, pPhysPage->HCPhys));
3469}
3470#endif
3471
3472
3473#ifdef PGMPOOL_WITH_CACHE
3474/**
3475 * Moves the page to the head of the age list.
3476 *
3477 * This is done when the cached page is used in one way or another.
3478 *
3479 * @param pPool The pool.
3480 * @param pPage The cached page.
3481 * @todo inline in PGMInternal.h!
3482 */
3483DECLINLINE(void) pgmPoolCacheUsed(PPGMPOOL pPool, PPGMPOOLPAGE pPage)
3484{
3485 /*
3486 * Move to the head of the age list.
3487 */
3488 if (pPage->iAgePrev != NIL_PGMPOOL_IDX)
3489 {
3490 /* unlink */
3491 pPool->aPages[pPage->iAgePrev].iAgeNext = pPage->iAgeNext;
3492 if (pPage->iAgeNext != NIL_PGMPOOL_IDX)
3493 pPool->aPages[pPage->iAgeNext].iAgePrev = pPage->iAgePrev;
3494 else
3495 pPool->iAgeTail = pPage->iAgePrev;
3496
3497 /* insert at head */
3498 pPage->iAgePrev = NIL_PGMPOOL_IDX;
3499 pPage->iAgeNext = pPool->iAgeHead;
3500 Assert(pPage->iAgeNext != NIL_PGMPOOL_IDX); /* we would've already been head then */
3501 pPool->iAgeHead = pPage->idx;
3502 pPool->aPages[pPage->iAgeNext].iAgePrev = pPage->idx;
3503 }
3504}
3505#endif /* PGMPOOL_WITH_CACHE */
3506
3507/**
3508 * Tells if mappings are to be put into the shadow page table or not
3509 *
3510 * @returns boolean result
3511 * @param pVM VM handle.
3512 */
3513
3514DECLINLINE(bool) pgmMapAreMappingsEnabled(PPGM pPGM)
3515{
3516 return !pPGM->fDisableMappings;
3517}
3518
3519/** @} */
3520
3521#endif
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