VirtualBox

source: vbox/trunk/src/VBox/VMM/PGMInternal.h@ 6869

Last change on this file since 6869 was 6869, checked in by vboxsync, 17 years ago

Use PGM_PAGE_SET/GET/IS/CLEAR/INIT macros.
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1/* $Id: PGMInternal.h 6869 2008-02-08 15:47:35Z vboxsync $ */
2/** @file
3 * PGM - Internal header file.
4 */
5
6/*
7 * Copyright (C) 2006-2007 innotek GmbH
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18#ifndef ___PGMInternal_h
19#define ___PGMInternal_h
20
21#include <VBox/cdefs.h>
22#include <VBox/types.h>
23#include <VBox/err.h>
24#include <VBox/stam.h>
25#include <VBox/param.h>
26#include <VBox/vmm.h>
27#include <VBox/mm.h>
28#include <VBox/pdmcritsect.h>
29#include <VBox/pdmapi.h>
30#include <VBox/dis.h>
31#include <VBox/dbgf.h>
32#include <VBox/log.h>
33#include <VBox/gmm.h>
34#include <iprt/avl.h>
35#include <iprt/assert.h>
36#include <iprt/critsect.h>
37
38#if !defined(IN_PGM_R3) && !defined(IN_PGM_R0) && !defined(IN_PGM_GC)
39# error "Not in PGM! This is an internal header!"
40#endif
41
42
43/** @defgroup grp_pgm_int Internals
44 * @ingroup grp_pgm
45 * @internal
46 * @{
47 */
48
49
50/** @name PGM Compile Time Config
51 * @{
52 */
53
54/**
55 * Solve page is out of sync issues inside Guest Context (in PGMGC.cpp).
56 * Comment it if it will break something.
57 */
58#define PGM_OUT_OF_SYNC_IN_GC
59
60/**
61 * Virtualize the dirty bit
62 * This also makes a half-hearted attempt at the accessed bit. For full
63 * accessed bit virtualization define PGM_SYNC_ACCESSED_BIT.
64 */
65#define PGM_SYNC_DIRTY_BIT
66
67/**
68 * Fully virtualize the accessed bit.
69 * @remark This requires SYNC_DIRTY_ACCESSED_BITS to be defined!
70 */
71#define PGM_SYNC_ACCESSED_BIT
72
73/**
74 * Check and skip global PDEs for non-global flushes
75 */
76#define PGM_SKIP_GLOBAL_PAGEDIRS_ON_NONGLOBAL_FLUSH
77
78/**
79 * Sync N pages instead of a whole page table
80 */
81#define PGM_SYNC_N_PAGES
82
83/**
84 * Number of pages to sync during a page fault
85 *
86 * When PGMPOOL_WITH_GCPHYS_TRACKING is enabled using high values here
87 * causes a lot of unnecessary extents and also is slower than taking more \#PFs.
88 */
89#define PGM_SYNC_NR_PAGES 8
90
91/**
92 * Number of PGMPhysRead/Write cache entries (must be <= sizeof(uint64_t))
93 */
94#define PGM_MAX_PHYSCACHE_ENTRIES 64
95#define PGM_MAX_PHYSCACHE_ENTRIES_MASK (PGM_MAX_PHYSCACHE_ENTRIES-1)
96
97/**
98 * Enable caching of PGMR3PhysRead/WriteByte/Word/Dword
99 */
100#define PGM_PHYSMEMACCESS_CACHING
101
102/*
103 * Assert Sanity.
104 */
105#if defined(PGM_SYNC_ACCESSED_BIT) && !defined(PGM_SYNC_DIRTY_BIT)
106# error "PGM_SYNC_ACCESSED_BIT requires PGM_SYNC_DIRTY_BIT!"
107#endif
108
109/** @def PGMPOOL_WITH_CACHE
110 * Enable agressive caching using the page pool.
111 *
112 * This requires PGMPOOL_WITH_USER_TRACKING and PGMPOOL_WITH_MONITORING.
113 */
114#define PGMPOOL_WITH_CACHE
115
116/** @def PGMPOOL_WITH_MIXED_PT_CR3
117 * When defined, we'll deal with 'uncachable' pages.
118 */
119#ifdef PGMPOOL_WITH_CACHE
120# define PGMPOOL_WITH_MIXED_PT_CR3
121#endif
122
123/** @def PGMPOOL_WITH_MONITORING
124 * Monitor the guest pages which are shadowed.
125 * When this is enabled, PGMPOOL_WITH_CACHE or PGMPOOL_WITH_GCPHYS_TRACKING must
126 * be enabled as well.
127 * @remark doesn't really work without caching now. (Mixed PT/CR3 change.)
128 */
129#ifdef PGMPOOL_WITH_CACHE
130# define PGMPOOL_WITH_MONITORING
131#endif
132
133/** @def PGMPOOL_WITH_GCPHYS_TRACKING
134 * Tracking the of shadow pages mapping guest physical pages.
135 *
136 * This is very expensive, the current cache prototype is trying to figure out
137 * whether it will be acceptable with an agressive caching policy.
138 */
139#if defined(PGMPOOL_WITH_CACHE) || defined(PGMPOOL_WITH_MONITORING)
140# define PGMPOOL_WITH_GCPHYS_TRACKING
141#endif
142
143/** @def PGMPOOL_WITH_USER_TRACKNG
144 * Tracking users of shadow pages. This is required for the linking of shadow page
145 * tables and physical guest addresses.
146 */
147#if defined(PGMPOOL_WITH_GCPHYS_TRACKING) || defined(PGMPOOL_WITH_CACHE) || defined(PGMPOOL_WITH_MONITORING)
148# define PGMPOOL_WITH_USER_TRACKING
149#endif
150
151/** @def PGMPOOL_CFG_MAX_GROW
152 * The maximum number of pages to add to the pool in one go.
153 */
154#define PGMPOOL_CFG_MAX_GROW (_256K >> PAGE_SHIFT)
155
156/** @def VBOX_STRICT_PGM_HANDLER_VIRTUAL
157 * Enables some extra assertions for virtual handlers (mainly phys2virt related).
158 */
159#ifdef VBOX_STRICT
160# define VBOX_STRICT_PGM_HANDLER_VIRTUAL
161#endif
162/** @} */
163
164
165/** @name PDPTR and PML4 flags.
166 * These are placed in the three bits available for system programs in
167 * the PDPTR and PML4 entries.
168 * @{ */
169/** The entry is a permanent one and it's must always be present.
170 * Never free such an entry. */
171#define PGM_PLXFLAGS_PERMANENT RT_BIT_64(10)
172/** @} */
173
174/** @name Page directory flags.
175 * These are placed in the three bits available for system programs in
176 * the page directory entries.
177 * @{ */
178/** Mapping (hypervisor allocated pagetable). */
179#define PGM_PDFLAGS_MAPPING RT_BIT_64(10)
180/** Made read-only to facilitate dirty bit tracking. */
181#define PGM_PDFLAGS_TRACK_DIRTY RT_BIT_64(11)
182/** @} */
183
184/** @name Page flags.
185 * These are placed in the three bits available for system programs in
186 * the page entries.
187 * @{ */
188/** Made read-only to facilitate dirty bit tracking. */
189#define PGM_PTFLAGS_TRACK_DIRTY RT_BIT_64(9)
190
191#ifndef PGM_PTFLAGS_CSAM_VALIDATED
192/** Scanned and approved by CSAM (tm).
193 * NOTE: Must be identical to the one defined in CSAMInternal.h!!
194 * @todo Move PGM_PTFLAGS_* and PGM_PDFLAGS_* to VBox/pgm.h. */
195#define PGM_PTFLAGS_CSAM_VALIDATED RT_BIT_64(11)
196#endif
197/** @} */
198
199/** @name Defines used to indicate the shadow and guest paging in the templates.
200 * @{ */
201#define PGM_TYPE_REAL 1
202#define PGM_TYPE_PROT 2
203#define PGM_TYPE_32BIT 3
204#define PGM_TYPE_PAE 4
205#define PGM_TYPE_AMD64 5
206/** @} */
207
208/** Macro for checking if the guest is using paging.
209 * @param uType PGM_TYPE_*
210 * @remark ASSUMES certain order of the PGM_TYPE_* values.
211 */
212#define PGM_WITH_PAGING(uType) ((uType) >= PGM_TYPE_32BIT)
213
214
215/** @def PGM_HCPHYS_2_PTR
216 * Maps a HC physical page pool address to a virtual address.
217 *
218 * @returns VBox status code.
219 * @param pVM The VM handle.
220 * @param HCPhys The HC physical address to map to a virtual one.
221 * @param ppv Where to store the virtual address. No need to cast this.
222 *
223 * @remark In GC this uses PGMGCDynMapHCPage(), so it will consume of the
224 * small page window employeed by that function. Be careful.
225 * @remark There is no need to assert on the result.
226 */
227#ifdef IN_GC
228# define PGM_HCPHYS_2_PTR(pVM, HCPhys, ppv) PGMGCDynMapHCPage(pVM, HCPhys, (void **)(ppv))
229#else
230# define PGM_HCPHYS_2_PTR(pVM, HCPhys, ppv) MMPagePhys2PageEx(pVM, HCPhys, (void **)(ppv))
231#endif
232
233/** @def PGM_GCPHYS_2_PTR
234 * Maps a GC physical page address to a virtual address.
235 *
236 * @returns VBox status code.
237 * @param pVM The VM handle.
238 * @param GCPhys The GC physical address to map to a virtual one.
239 * @param ppv Where to store the virtual address. No need to cast this.
240 *
241 * @remark In GC this uses PGMGCDynMapGCPage(), so it will consume of the
242 * small page window employeed by that function. Be careful.
243 * @remark There is no need to assert on the result.
244 */
245#ifdef IN_GC
246# define PGM_GCPHYS_2_PTR(pVM, GCPhys, ppv) PGMGCDynMapGCPage(pVM, GCPhys, (void **)(ppv))
247#else
248# define PGM_GCPHYS_2_PTR(pVM, GCPhys, ppv) PGMPhysGCPhys2HCPtr(pVM, GCPhys, 1 /* one page only */, (void **)(ppv)) /** @todo this isn't asserting, use PGMRamGCPhys2HCPtr! */
249#endif
250
251/** @def PGM_GCPHYS_2_PTR_EX
252 * Maps a unaligned GC physical page address to a virtual address.
253 *
254 * @returns VBox status code.
255 * @param pVM The VM handle.
256 * @param GCPhys The GC physical address to map to a virtual one.
257 * @param ppv Where to store the virtual address. No need to cast this.
258 *
259 * @remark In GC this uses PGMGCDynMapGCPage(), so it will consume of the
260 * small page window employeed by that function. Be careful.
261 * @remark There is no need to assert on the result.
262 */
263#ifdef IN_GC
264# define PGM_GCPHYS_2_PTR_EX(pVM, GCPhys, ppv) PGMGCDynMapGCPageEx(pVM, GCPhys, (void **)(ppv))
265#else
266# define PGM_GCPHYS_2_PTR_EX(pVM, GCPhys, ppv) PGMPhysGCPhys2HCPtr(pVM, GCPhys, 1 /* one page only */, (void **)(ppv)) /** @todo this isn't asserting, use PGMRamGCPhys2HCPtr! */
267#endif
268
269/** @def PGM_INVL_PG
270 * Invalidates a page when in GC does nothing in HC.
271 *
272 * @param GCVirt The virtual address of the page to invalidate.
273 */
274#ifdef IN_GC
275# define PGM_INVL_PG(GCVirt) ASMInvalidatePage((void *)(GCVirt))
276#else
277# define PGM_INVL_PG(GCVirt) ((void)0)
278#endif
279
280/** @def PGM_INVL_BIG_PG
281 * Invalidates a 4MB page directory entry when in GC does nothing in HC.
282 *
283 * @param GCVirt The virtual address within the page directory to invalidate.
284 */
285#ifdef IN_GC
286# define PGM_INVL_BIG_PG(GCVirt) ASMReloadCR3()
287#else
288# define PGM_INVL_BIG_PG(GCVirt) ((void)0)
289#endif
290
291/** @def PGM_INVL_GUEST_TLBS()
292 * Invalidates all guest TLBs.
293 */
294#ifdef IN_GC
295# define PGM_INVL_GUEST_TLBS() ASMReloadCR3()
296#else
297# define PGM_INVL_GUEST_TLBS() ((void)0)
298#endif
299
300
301/**
302 * Structure for tracking GC Mappings.
303 *
304 * This structure is used by linked list in both GC and HC.
305 */
306typedef struct PGMMAPPING
307{
308 /** Pointer to next entry. */
309 R3PTRTYPE(struct PGMMAPPING *) pNextR3;
310 /** Pointer to next entry. */
311 R0PTRTYPE(struct PGMMAPPING *) pNextR0;
312 /** Pointer to next entry. */
313 GCPTRTYPE(struct PGMMAPPING *) pNextGC;
314 /** Start Virtual address. */
315 RTGCUINTPTR GCPtr;
316 /** Last Virtual address (inclusive). */
317 RTGCUINTPTR GCPtrLast;
318 /** Range size (bytes). */
319 RTGCUINTPTR cb;
320 /** Pointer to relocation callback function. */
321 R3PTRTYPE(PFNPGMRELOCATE) pfnRelocate;
322 /** User argument to the callback. */
323 R3PTRTYPE(void *) pvUser;
324 /** Mapping description / name. For easing debugging. */
325 R3PTRTYPE(const char *) pszDesc;
326 /** Number of page tables. */
327 RTUINT cPTs;
328#if HC_ARCH_BITS != GC_ARCH_BITS
329 RTUINT uPadding0; /**< Alignment padding. */
330#endif
331 /** Array of page table mapping data. Each entry
332 * describes one page table. The array can be longer
333 * than the declared length.
334 */
335 struct
336 {
337 /** The HC physical address of the page table. */
338 RTHCPHYS HCPhysPT;
339 /** The HC physical address of the first PAE page table. */
340 RTHCPHYS HCPhysPaePT0;
341 /** The HC physical address of the second PAE page table. */
342 RTHCPHYS HCPhysPaePT1;
343 /** The HC virtual address of the 32-bit page table. */
344 R3PTRTYPE(PVBOXPT) pPTR3;
345 /** The HC virtual address of the two PAE page table. (i.e 1024 entries instead of 512) */
346 R3PTRTYPE(PX86PTPAE) paPaePTsR3;
347 /** The GC virtual address of the 32-bit page table. */
348 GCPTRTYPE(PVBOXPT) pPTGC;
349 /** The GC virtual address of the two PAE page table. */
350 GCPTRTYPE(PX86PTPAE) paPaePTsGC;
351 /** The GC virtual address of the 32-bit page table. */
352 R0PTRTYPE(PVBOXPT) pPTR0;
353 /** The GC virtual address of the two PAE page table. */
354 R0PTRTYPE(PX86PTPAE) paPaePTsR0;
355 } aPTs[1];
356} PGMMAPPING;
357/** Pointer to structure for tracking GC Mappings. */
358typedef struct PGMMAPPING *PPGMMAPPING;
359
360
361/**
362 * Physical page access handler structure.
363 *
364 * This is used to keep track of physical address ranges
365 * which are being monitored in some kind of way.
366 */
367typedef struct PGMPHYSHANDLER
368{
369 AVLROGCPHYSNODECORE Core;
370 /** Alignment padding. */
371 uint32_t u32Padding;
372 /** Access type. */
373 PGMPHYSHANDLERTYPE enmType;
374 /** Number of pages to update. */
375 uint32_t cPages;
376 /** Pointer to R3 callback function. */
377 R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3;
378 /** User argument for R3 handlers. */
379 R3PTRTYPE(void *) pvUserR3;
380 /** Pointer to R0 callback function. */
381 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0;
382 /** User argument for R0 handlers. */
383 R0PTRTYPE(void *) pvUserR0;
384 /** Pointer to GC callback function. */
385 GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnHandlerGC;
386 /** User argument for GC handlers. */
387 GCPTRTYPE(void *) pvUserGC;
388 /** Description / Name. For easing debugging. */
389 R3PTRTYPE(const char *) pszDesc;
390#ifdef VBOX_WITH_STATISTICS
391 /** Profiling of this handler. */
392 STAMPROFILE Stat;
393#endif
394} PGMPHYSHANDLER;
395/** Pointer to a physical page access handler structure. */
396typedef PGMPHYSHANDLER *PPGMPHYSHANDLER;
397
398
399/**
400 * Cache node for the physical addresses covered by a virtual handler.
401 */
402typedef struct PGMPHYS2VIRTHANDLER
403{
404 /** Core node for the tree based on physical ranges. */
405 AVLROGCPHYSNODECORE Core;
406 /** Offset from this struct to the PGMVIRTHANDLER structure. */
407 RTGCINTPTR offVirtHandler;
408 /** Offset of the next alias relativer to this one.
409 * Bit 0 is used for indicating whether we're in the tree.
410 * Bit 1 is used for indicating that we're the head node.
411 */
412 int32_t offNextAlias;
413} PGMPHYS2VIRTHANDLER;
414/** Pointer to a phys to virtual handler structure. */
415typedef PGMPHYS2VIRTHANDLER *PPGMPHYS2VIRTHANDLER;
416
417/** The bit in PGMPHYS2VIRTHANDLER::offNextAlias used to indicate that the
418 * node is in the tree. */
419#define PGMPHYS2VIRTHANDLER_IN_TREE RT_BIT(0)
420/** The bit in PGMPHYS2VIRTHANDLER::offNextAlias used to indicate that the
421 * node is in the head of an alias chain.
422 * The PGMPHYS2VIRTHANDLER_IN_TREE is always set if this bit is set. */
423#define PGMPHYS2VIRTHANDLER_IS_HEAD RT_BIT(1)
424/** The mask to apply to PGMPHYS2VIRTHANDLER::offNextAlias to get the offset. */
425#define PGMPHYS2VIRTHANDLER_OFF_MASK (~(int32_t)3)
426
427
428/**
429 * Virtual page access handler structure.
430 *
431 * This is used to keep track of virtual address ranges
432 * which are being monitored in some kind of way.
433 */
434typedef struct PGMVIRTHANDLER
435{
436 /** Core node for the tree based on virtual ranges. */
437 AVLROGCPTRNODECORE Core;
438 /** Number of cache pages. */
439 uint32_t u32Padding;
440 /** Access type. */
441 PGMVIRTHANDLERTYPE enmType;
442 /** Number of cache pages. */
443 uint32_t cPages;
444
445/** @todo The next two members are redundant. It adds some readability though. */
446 /** Start of the range. */
447 RTGCPTR GCPtr;
448 /** End of the range (exclusive). */
449 RTGCPTR GCPtrLast;
450 /** Size of the range (in bytes). */
451 RTGCUINTPTR cb;
452 /** Pointer to the GC callback function. */
453 GCPTRTYPE(PFNPGMGCVIRTHANDLER) pfnHandlerGC;
454 /** Pointer to the HC callback function for invalidation. */
455 R3PTRTYPE(PFNPGMHCVIRTINVALIDATE) pfnInvalidateHC;
456 /** Pointer to the HC callback function. */
457 R3PTRTYPE(PFNPGMHCVIRTHANDLER) pfnHandlerHC;
458 /** Description / Name. For easing debugging. */
459 R3PTRTYPE(const char *) pszDesc;
460#ifdef VBOX_WITH_STATISTICS
461 /** Profiling of this handler. */
462 STAMPROFILE Stat;
463#endif
464 /** Array of cached physical addresses for the monitored ranged. */
465 PGMPHYS2VIRTHANDLER aPhysToVirt[HC_ARCH_BITS == 32 ? 1 : 2];
466} PGMVIRTHANDLER;
467/** Pointer to a virtual page access handler structure. */
468typedef PGMVIRTHANDLER *PPGMVIRTHANDLER;
469
470
471/**
472 * Page type.
473 * @remarks This enum has to fit in a 3-bit field (see PGMPAGE::u3Type).
474 */
475typedef enum PGMPAGETYPE
476{
477 /** The usual invalid zero entry. */
478 PGMPAGETYPE_INVALID = 0,
479 /** RAM page. (RWX) */
480 PGMPAGETYPE_RAM,
481 /** MMIO2 page. (RWX) */
482 PGMPAGETYPE_MMIO2,
483 /** Shadowed ROM. (RWX) */
484 PGMPAGETYPE_ROM_SHADOW,
485 /** ROM page. (R-X) */
486 PGMPAGETYPE_ROM,
487 /** MMIO page. (---) */
488 PGMPAGETYPE_MMIO,
489 /** End of valid entries. */
490 PGMPAGETYPE_END
491} PGMPAGETYPE;
492AssertCompile(PGMPAGETYPE_END < 7);
493
494/** @name Page type predicates.
495 * @{ */
496#define PGMPAGETYPE_IS_READABLE(type) ( (type) <= PGMPAGETYPE_ROM )
497#define PGMPAGETYPE_IS_WRITEABLE(type) ( (type) <= PGMPAGETYPE_ROM_SHADOW )
498#define PGMPAGETYPE_IS_RWX(type) ( (type) <= PGMPAGETYPE_ROM_SHADOW )
499#define PGMPAGETYPE_IS_ROX(type) ( (type) == PGMPAGETYPE_ROM )
500#define PGMPAGETYPE_IS_NP(type) ( (type) == PGMPAGETYPE_MMIO )
501/** @} */
502
503
504/**
505 * A Physical Guest Page tracking structure.
506 *
507 * The format of this structure is complicated because we have to fit a lot
508 * of information into as few bits as possible. The format is also subject
509 * to change (there is one comming up soon). Which means that for we'll be
510 * using PGM_PAGE_GET_*, PGM_PAGE_IS_ and PGM_PAGE_SET_* macros for *all*
511 * accessess to the structure.
512 */
513typedef struct PGMPAGE
514{
515 /** The physical address and a whole lot of other stuff. All bits are used! */
516 RTHCPHYS HCPhys;
517 /** The page state. */
518 uint32_t u2StateX : 2;
519 /** Flag indicating that a write monitored page was written to when set. */
520 uint32_t fWrittenToX : 1;
521 /** For later. */
522 uint32_t fSomethingElse : 1;
523 /** The Page ID.
524 * @todo Merge with HCPhys once we've liberated HCPhys of its stuff.
525 * The HCPhys will be 100% static. */
526 uint32_t idPageX : 28;
527 /** The page type (PGMPAGETYPE). */
528 uint32_t u3Type : 3;
529 uint32_t u29B : 29;
530} PGMPAGE;
531AssertCompileSize(PGMPAGE, 16);
532/** Pointer to a physical guest page. */
533typedef PGMPAGE *PPGMPAGE;
534/** Pointer to a const physical guest page. */
535typedef const PGMPAGE *PCPGMPAGE;
536/** Pointer to a physical guest page pointer. */
537typedef PPGMPAGE *PPPGMPAGE;
538
539
540/**
541 * Clears the page structure.
542 * @param pPage Pointer to the physical guest page tracking structure.
543 */
544#define PGM_PAGE_CLEAR(pPage) \
545 do { \
546 (pPage)->HCPhys = 0; \
547 (pPage)->u2StateX = 0; \
548 (pPage)->fWrittenToX = 0; \
549 (pPage)->fSomethingElse = 0; \
550 (pPage)->idPageX = 0; \
551 (pPage)->u3Type = 0; \
552 (pPage)->u29B = 0; \
553 } while (0)
554
555/**
556 * Clears the page structure.
557 * @param pPage Pointer to the physical guest page tracking structure.
558 */
559#define PGM_PAGE_INIT(pPage, _HCPhys, _idPage, _uType, _uState) \
560 do { \
561 (pPage)->HCPhys = (_HCPhys); \
562 (pPage)->u2StateX = (_uState); \
563 (pPage)->fWrittenToX = 0; \
564 (pPage)->fSomethingElse = 0; \
565 (pPage)->idPageX = (_idPage); \
566 (pPage)->u3Type = (_uType); \
567 (pPage)->u29B = 0; \
568 } while (0)
569
570/**
571 * Clears the page structure.
572 * @param pPage Pointer to the physical guest page tracking structure.
573 */
574#ifdef VBOX_WITH_NEW_PHYS_CODE
575# define PGM_PAGE_INIT_ZERO(pPage, pVM, _uType) \
576 PGM_PAGE_INIT(pPage, (pVM)->pgm.s.HCPhysZeroPg, NIL_GMM_PAGEID, PGM_PAGE_STATE_ZERO, (_uType))
577#else
578# define PGM_PAGE_INIT_ZERO(pPage, pVM, _uType) \
579 PGM_PAGE_INIT(pPage, 0, NIL_GMM_PAGEID, PGM_PAGE_STATE_ZERO, (_uType))
580#endif
581/** Temporary hack. Replaced by PGM_PAGE_INIT_ZERO once the old code is kicked out. */
582# define PGM_PAGE_INIT_ZERO_REAL(pPage, pVM, _uType) \
583 PGM_PAGE_INIT(pPage, (pVM)->pgm.s.HCPhysZeroPg, NIL_GMM_PAGEID, PGM_PAGE_STATE_ZERO, (_uType))
584
585
586/** @name The Page state, PGMPAGE::u2StateX.
587 * @{ */
588/** The zero page.
589 * This is a per-VM page that's never ever mapped writable. */
590#define PGM_PAGE_STATE_ZERO 0
591/** A allocated page.
592 * This is a per-VM page allocated from the page pool.
593 */
594#define PGM_PAGE_STATE_ALLOCATED 1
595/** A allocated page that's being monitored for writes.
596 * The shadow page table mappings are read-only. When a write occurs, the
597 * fWrittenTo member is set, the page remapped as read-write and the state
598 * moved back to allocated. */
599#define PGM_PAGE_STATE_WRITE_MONITORED 2
600/** The page is shared, aka. copy-on-write.
601 * This is a page that's shared with other VMs. */
602#define PGM_PAGE_STATE_SHARED 3
603/** @} */
604
605
606/**
607 * Gets the page state.
608 * @returns page state (PGM_PAGE_STATE_*).
609 * @param pPage Pointer to the physical guest page tracking structure.
610 */
611#define PGM_PAGE_GET_STATE(pPage) ( (pPage)->u2StateX )
612
613/**
614 * Sets the page state.
615 * @param pPage Pointer to the physical guest page tracking structure.
616 * @param _uState The new page state.
617 */
618#define PGM_PAGE_SET_STATE(pPage, _uState) \
619 do { (pPage)->u2StateX = (_uState); } while (0)
620
621
622/**
623 * Gets the host physical address of the guest page.
624 * @returns host physical address (RTHCPHYS).
625 * @param pPage Pointer to the physical guest page tracking structure.
626 */
627#define PGM_PAGE_GET_HCPHYS(pPage) ( (pPage)->HCPhys & UINT64_C(0x0000fffffffff000) )
628
629/**
630 * Sets the host physical address of the guest page.
631 * @param pPage Pointer to the physical guest page tracking structure.
632 * @param _HCPhys The new host physical address.
633 */
634#define PGM_PAGE_SET_HCPHYS(pPage, _HCPhys) \
635 do { (pPage)->HCPhys = (((pPage)->HCPhys) & UINT64_C(0xffff000000000fff)) \
636 | ((_HCPhys) & UINT64_C(0x0000fffffffff000)); } while (0)
637
638/**
639 * Get the Page ID.
640 * @returns The Page ID; NIL_GMM_PAGEID if it's a ZERO page.
641 * @param pPage Pointer to the physical guest page tracking structure.
642 */
643#define PGM_PAGE_GET_PAGEID(pPage) ( (pPage)->idPageX )
644/* later:
645#define PGM_PAGE_GET_PAGEID(pPage) ( ((uint32_t)(pPage)->HCPhys >> (48 - 12))
646 | ((uint32_t)(pPage)->HCPhys & 0xfff) )
647*/
648/**
649 * Sets the Page ID.
650 * @param pPage Pointer to the physical guest page tracking structure.
651 */
652#define PGM_PAGE_SET_PAGEID(pPage, _idPage) do { (pPage)->idPageX = (_idPage); } while (0)
653/* later:
654#define PGM_PAGE_SET_PAGEID(pPage, _idPage) do { (pPage)->HCPhys = (((pPage)->HCPhys) & UINT64_C(0x0000fffffffff000)) \
655 | ((_idPage) & 0xfff) \
656 | (((_idPage) & 0x0ffff000) << (48-12)); } while (0)
657*/
658
659/**
660 * Get the Chunk ID.
661 * @returns The Chunk ID; NIL_GMM_CHUNKID if it's a ZERO page.
662 * @param pPage Pointer to the physical guest page tracking structure.
663 */
664#define PGM_PAGE_GET_CHUNKID(pPage) ( (pPage)->idPageX >> GMM_CHUNKID_SHIFT )
665/* later:
666#if GMM_CHUNKID_SHIFT == 12
667# define PGM_PAGE_GET_CHUNKID(pPage) ( (uint32_t)((pPage)->HCPhys >> 48) )
668#elif GMM_CHUNKID_SHIFT > 12
669# define PGM_PAGE_GET_CHUNKID(pPage) ( (uint32_t)((pPage)->HCPhys >> (48 + (GMM_CHUNKID_SHIFT - 12)) )
670#elif GMM_CHUNKID_SHIFT < 12
671# define PGM_PAGE_GET_CHUNKID(pPage) ( ( (uint32_t)((pPage)->HCPhys >> 48) << (12 - GMM_CHUNKID_SHIFT) ) \
672 | ( (uint32_t)((pPage)->HCPhys & 0xfff) >> GMM_CHUNKID_SHIFT ) )
673#else
674# error "GMM_CHUNKID_SHIFT isn't defined or something."
675#endif
676*/
677
678/**
679 * Get the index of the page within the allocaiton chunk.
680 * @returns The page index.
681 * @param pPage Pointer to the physical guest page tracking structure.
682 */
683#define PGM_PAGE_GET_PAGE_IN_CHUNK(pPage) ( (pPage)->idPageX & GMM_PAGEID_IDX_MASK )
684/* later:
685#if GMM_CHUNKID_SHIFT <= 12
686# define PGM_PAGE_GET_PAGE_IN_CHUNK(pPage) ( (uint32_t)((pPage)->HCPhys & GMM_PAGEID_IDX_MASK) )
687#else
688# define PGM_PAGE_GET_PAGE_IN_CHUNK(pPage) ( (uint32_t)((pPage)->HCPhys & 0xfff) \
689 | ( (uint32_t)((pPage)->HCPhys >> 48) & (RT_BIT_32(GMM_CHUNKID_SHIFT - 12) - 1) ) )
690#endif
691*/
692
693
694/**
695 * Gets the page type.
696 * @returns The page type.
697 * @param pPage Pointer to the physical guest page tracking structure.
698 */
699#define PGM_PAGE_GET_TYPE(pPage) (pPage)->u3Type
700
701/**
702 * Sets the page type.
703 * @param pPage Pointer to the physical guest page tracking structure.
704 * @param _enmType The new page type (PGMPAGETYPE).
705 */
706#define PGM_PAGE_SET_TYPE(pPage, _enmType) \
707 do { (pPage)->u3Type = (_enmType); } while (0)
708
709
710/**
711 * Checks if the page is 'reserved'.
712 * @returns true/false.
713 * @param pPage Pointer to the physical guest page tracking structure.
714 */
715#define PGM_PAGE_IS_RESERVED(pPage) ( !!((pPage)->HCPhys & MM_RAM_FLAGS_RESERVED) )
716
717/**
718 * Checks if the page is marked for MMIO.
719 * @returns true/false.
720 * @param pPage Pointer to the physical guest page tracking structure.
721 */
722#define PGM_PAGE_IS_MMIO(pPage) ( !!((pPage)->HCPhys & MM_RAM_FLAGS_MMIO) )
723
724/**
725 * Checks if the page is backed by the ZERO page.
726 * @returns true/false.
727 * @param pPage Pointer to the physical guest page tracking structure.
728 */
729#define PGM_PAGE_IS_ZERO(pPage) ( (pPage)->u2StateX == PGM_PAGE_STATE_ZERO )
730
731/**
732 * Checks if the page is backed by a SHARED page.
733 * @returns true/false.
734 * @param pPage Pointer to the physical guest page tracking structure.
735 */
736#define PGM_PAGE_IS_SHARED(pPage) ( (pPage)->u2StateX == PGM_PAGE_STATE_SHARED )
737
738
739/**
740 * Marks the paget as written to (for GMM change monitoring).
741 * @param pPage Pointer to the physical guest page tracking structure.
742 */
743#define PGM_PAGE_SET_WRITTEN_TO(pPage) do { (pPage)->fWrittenToX = 1; } while (0)
744
745/**
746 * Clears the written-to indicator.
747 * @param pPage Pointer to the physical guest page tracking structure.
748 */
749#define PGM_PAGE_CLEAR_WRITTEN_TO(pPage) do { (pPage)->fWrittenToX = 0; } while (0)
750
751/**
752 * Checks if the page was marked as written-to.
753 * @returns true/false.
754 * @param pPage Pointer to the physical guest page tracking structure.
755 */
756#define PGM_PAGE_IS_WRITTEN_TO(pPage) ( (pPage)->fWrittenToX )
757
758/**
759 * Ram range for GC Phys to HC Phys conversion.
760 *
761 * Can be used for HC Virt to GC Phys and HC Virt to HC Phys
762 * conversions too, but we'll let MM handle that for now.
763 *
764 * This structure is used by linked lists in both GC and HC.
765 */
766typedef struct PGMRAMRANGE
767{
768 /** Pointer to the next RAM range - for R3. */
769 R3PTRTYPE(struct PGMRAMRANGE *) pNextR3;
770 /** Pointer to the next RAM range - for R0. */
771 R0PTRTYPE(struct PGMRAMRANGE *) pNextR0;
772 /** Pointer to the next RAM range - for GC. */
773 GCPTRTYPE(struct PGMRAMRANGE *) pNextGC;
774 /** Start of the range. Page aligned. */
775 RTGCPHYS GCPhys;
776 /** Last address in the range (inclusive). Page aligned (-1). */
777 RTGCPHYS GCPhysLast;
778 /** Size of the range. (Page aligned of course). */
779 RTGCPHYS cb;
780 /** MM_RAM_* flags */
781 uint32_t fFlags;
782#ifdef VBOX_WITH_NEW_PHYS_CODE
783 uint32_t u32Alignment; /**< alignment. */
784#else
785 /** HC virtual lookup ranges for chunks. Currently only used with MM_RAM_FLAGS_DYNAMIC_ALLOC ranges. */
786 GCPTRTYPE(PRTHCPTR) pavHCChunkGC;
787 /** HC virtual lookup ranges for chunks. Currently only used with MM_RAM_FLAGS_DYNAMIC_ALLOC ranges. */
788 R3R0PTRTYPE(PRTHCPTR) pavHCChunkHC;
789#endif
790 /** Start of the HC mapping of the range. This is only used for MMIO2. */
791 R3PTRTYPE(void *) pvHC;
792 /** The range description. */
793 R3PTRTYPE(const char *) pszDesc;
794
795#ifdef VBOX_WITH_NEW_PHYS_CODE
796 /** Padding to make aPage aligned on sizeof(PGMPAGE). */
797 uint32_t au32Reserved[2];
798#else
799# if HC_ARCH_BITS == 32
800 /** Padding to make aPage aligned on sizeof(PGMPAGE). */
801 uint32_t u32Reserved;
802# endif
803#endif
804
805 /** Array of physical guest page tracking structures. */
806 PGMPAGE aPages[1];
807} PGMRAMRANGE;
808/** Pointer to Ram range for GC Phys to HC Phys conversion. */
809typedef PGMRAMRANGE *PPGMRAMRANGE;
810
811/** Return hc ptr corresponding to the ram range and physical offset */
812#define PGMRAMRANGE_GETHCPTR(pRam, off) \
813 (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC) ? (RTHCPTR)((RTHCUINTPTR)CTXSUFF(pRam->pavHCChunk)[(off >> PGM_DYNAMIC_CHUNK_SHIFT)] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK)) \
814 : (RTHCPTR)((RTHCUINTPTR)pRam->pvHC + off);
815
816/**
817 * Per page tracking structure for ROM image.
818 *
819 * A ROM image may have a shadow page, in which case we may have
820 * two pages backing it. This structure contains the PGMPAGE for
821 * both while PGMRAMRANGE have a copy of the active one. It is
822 * important that these aren't out of sync in any regard other
823 * than page pool tracking data.
824 */
825typedef struct PGMROMPAGE
826{
827 /** The page structure for the virgin ROM page. */
828 PGMPAGE Virgin;
829 /** The page structure for the shadow RAM page. */
830 PGMPAGE Shadow;
831 /** The current protection setting. */
832 PGMROMPROT enmProt;
833 /** Pad the structure size to a multiple of 8. */
834 uint32_t u32Padding;
835} PGMROMPAGE;
836/** Pointer to a ROM page tracking structure. */
837typedef PGMROMPAGE *PPGMROMPAGE;
838
839
840/**
841 * A registered ROM image.
842 *
843 * This is needed to keep track of ROM image since they generally
844 * intrude into a PGMRAMRANGE. It also keeps track of additional
845 * info like the two page sets (read-only virgin and read-write shadow),
846 * the current state of each page.
847 *
848 * Because access handlers cannot easily be executed in a different
849 * context, the ROM ranges needs to be accessible and in all contexts.
850 */
851typedef struct PGMROMRANGE
852{
853 /** Pointer to the next range - R3. */
854 R3PTRTYPE(struct PGMROMRANGE *) pNextR3;
855 /** Pointer to the next range - R0. */
856 R0PTRTYPE(struct PGMROMRANGE *) pNextR0;
857 /** Pointer to the next range - R0. */
858 GCPTRTYPE(struct PGMROMRANGE *) pNextGC;
859 /** Address of the range. */
860 RTGCPHYS GCPhys;
861 /** Address of the last byte in the range. */
862 RTGCPHYS GCPhysLast;
863 /** Size of the range. */
864 RTGCPHYS cb;
865 /** The flags (PGMPHYS_ROM_FLAG_*). */
866 uint32_t fFlags;
867 /**< Alignment padding ensuring that aPages is sizeof(PGMROMPAGE) aligned. */
868 uint32_t au32Alignemnt[HC_ARCH_BITS == 32 ? 7 : 3];
869 /** Pointer to the original bits when PGMPHYS_ROM_FLAG_PERMANENT_BINARY was specified.
870 * This is used for strictness checks. */
871 R3PTRTYPE(const void *) pvOriginal;
872 /** The ROM description. */
873 R3PTRTYPE(const char *) pszDesc;
874 /** The per page tracking structures. */
875 PGMROMPAGE aPages[1];
876} PGMROMRANGE;
877/** Pointer to a ROM range. */
878typedef PGMROMRANGE *PPGMROMRANGE;
879
880
881
882
883/** @todo r=bird: fix typename. */
884/**
885 * PGMPhysRead/Write cache entry
886 */
887typedef struct PGMPHYSCACHE_ENTRY
888{
889 /** HC pointer to physical page */
890 R3PTRTYPE(uint8_t *) pbHC;
891 /** GC Physical address for cache entry */
892 RTGCPHYS GCPhys;
893#if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32
894 RTGCPHYS u32Padding0; /**< alignment padding. */
895#endif
896} PGMPHYSCACHE_ENTRY;
897
898/**
899 * PGMPhysRead/Write cache to reduce REM memory access overhead
900 */
901typedef struct PGMPHYSCACHE
902{
903 /** Bitmap of valid cache entries */
904 uint64_t aEntries;
905 /** Cache entries */
906 PGMPHYSCACHE_ENTRY Entry[PGM_MAX_PHYSCACHE_ENTRIES];
907} PGMPHYSCACHE;
908
909
910/** Pointer to an allocation chunk ring-3 mapping. */
911typedef struct PGMCHUNKR3MAP *PPGMCHUNKR3MAP;
912/** Pointer to an allocation chunk ring-3 mapping pointer. */
913typedef PPGMCHUNKR3MAP *PPPGMCHUNKR3MAP;
914
915/**
916 * Ring-3 tracking structore for an allocation chunk ring-3 mapping.
917 *
918 * The primary tree (Core) uses the chunk id as key.
919 * The secondary tree (AgeCore) is used for ageing and uses ageing sequence number as key.
920 */
921typedef struct PGMCHUNKR3MAP
922{
923 /** The key is the chunk id. */
924 AVLU32NODECORE Core;
925 /** The key is the ageing sequence number. */
926 AVLLU32NODECORE AgeCore;
927 /** The current age thingy. */
928 uint32_t iAge;
929 /** The current reference count. */
930 uint32_t volatile cRefs;
931 /** The current permanent reference count. */
932 uint32_t volatile cPermRefs;
933 /** The mapping address. */
934 void *pv;
935} PGMCHUNKR3MAP;
936
937/**
938 * Allocation chunk ring-3 mapping TLB entry.
939 */
940typedef struct PGMCHUNKR3MAPTLBE
941{
942 /** The chunk id. */
943 uint32_t volatile idChunk;
944#if HC_ARCH_BITS == 64
945 uint32_t u32Padding; /**< alignment padding. */
946#endif
947 /** The chunk map. */
948 R3R0PTRTYPE(PPGMCHUNKR3MAP) volatile pChunk;
949} PGMCHUNKR3MAPTLBE;
950/** Pointer to the an allocation chunk ring-3 mapping TLB entry. */
951typedef PGMCHUNKR3MAPTLBE *PPGMCHUNKR3MAPTLBE;
952
953/** The number of TLB entries in PGMCHUNKR3MAPTLB.
954 * @remark Must be a power of two value. */
955#define PGM_CHUNKR3MAPTLB_ENTRIES 32
956
957/**
958 * Allocation chunk ring-3 mapping TLB.
959 *
960 * @remarks We use a TLB to speed up lookups by avoiding walking the AVL.
961 * At first glance this might look kinda odd since AVL trees are
962 * supposed to give the most optimial lookup times of all trees
963 * due to their balancing. However, take a tree with 1023 nodes
964 * in it, that's 10 levels, meaning that most searches has to go
965 * down 9 levels before they find what they want. This isn't fast
966 * compared to a TLB hit. There is the factor of cache misses,
967 * and of course the problem with trees and branch prediction.
968 * This is why we use TLBs in front of most of the trees.
969 *
970 * @todo Generalize this TLB + AVL stuff, shouldn't be all that
971 * difficult when we switch to inlined AVL trees (from kStuff).
972 */
973typedef struct PGMCHUNKR3MAPTLB
974{
975 /** The TLB entries. */
976 PGMCHUNKR3MAPTLBE aEntries[PGM_CHUNKR3MAPTLB_ENTRIES];
977} PGMCHUNKR3MAPTLB;
978
979/**
980 * Calculates the index of a guest page in the Ring-3 Chunk TLB.
981 * @returns Chunk TLB index.
982 * @param idChunk The Chunk ID.
983 */
984#define PGM_CHUNKR3MAPTLB_IDX(idChunk) ( (idChunk) & (PGM_CHUNKR3MAPTLB_ENTRIES - 1) )
985
986
987/**
988 * Ring-3 guest page mapping TLB entry.
989 * @remarks used in ring-0 as well at the moment.
990 */
991typedef struct PGMPAGER3MAPTLBE
992{
993 /** Address of the page. */
994 RTGCPHYS volatile GCPhys;
995#if HC_ARCH_BITS == 64
996 uint32_t u32Padding; /**< alignment padding. */
997#endif
998 /** The guest page. */
999 R3R0PTRTYPE(PPGMPAGE) volatile pPage;
1000 /** Pointer to the page mapping tracking structure, PGMCHUNKR3MAP. */
1001 R3R0PTRTYPE(PPGMCHUNKR3MAP) volatile pMap;
1002 /** The address */
1003 R3R0PTRTYPE(void *) volatile pv;
1004} PGMPAGER3MAPTLBE;
1005/** Pointer to an entry in the HC physical TLB. */
1006typedef PGMPAGER3MAPTLBE *PPGMPAGER3MAPTLBE;
1007
1008
1009/** The number of entries in the ring-3 guest page mapping TLB.
1010 * @remarks The value must be a power of two. */
1011#define PGM_PAGER3MAPTLB_ENTRIES 64
1012
1013/**
1014 * Ring-3 guest page mapping TLB.
1015 * @remarks used in ring-0 as well at the moment.
1016 */
1017typedef struct PGMPAGER3MAPTLB
1018{
1019 /** The TLB entries. */
1020 PGMPAGER3MAPTLBE aEntries[PGM_PAGER3MAPTLB_ENTRIES];
1021} PGMPAGER3MAPTLB;
1022/** Pointer to the ring-3 guest page mapping TLB. */
1023typedef PGMPAGER3MAPTLB *PPGMPAGER3MAPTLB;
1024
1025/**
1026 * Calculates the index of the TLB entry for the specified guest page.
1027 * @returns Physical TLB index.
1028 * @param GCPhys The guest physical address.
1029 */
1030#define PGM_PAGER3MAPTLB_IDX(GCPhys) ( ((GCPhys) >> PAGE_SHIFT) & (PGM_PAGER3MAPTLB_ENTRIES - 1) )
1031
1032
1033/** @name Context neutrual page mapper TLB.
1034 *
1035 * Hoping to avoid some code and bug duplication parts of the GCxxx->CCPtr
1036 * code is writting in a kind of context neutrual way. Time will show whether
1037 * this actually makes sense or not...
1038 *
1039 * @{ */
1040/** @typedef PPGMPAGEMAPTLB
1041 * The page mapper TLB pointer type for the current context. */
1042/** @typedef PPGMPAGEMAPTLB
1043 * The page mapper TLB entry pointer type for the current context. */
1044/** @typedef PPGMPAGEMAPTLB
1045 * The page mapper TLB entry pointer pointer type for the current context. */
1046/** @def PGMPAGEMAPTLB_ENTRIES
1047 * The number of TLB entries in the page mapper TLB for the current context. */
1048/** @def PGM_PAGEMAPTLB_IDX
1049 * Calculate the TLB index for a guest physical address.
1050 * @returns The TLB index.
1051 * @param GCPhys The guest physical address. */
1052/** @typedef PPGMPAGEMAP
1053 * Pointer to a page mapper unit for current context. */
1054/** @typedef PPPGMPAGEMAP
1055 * Pointer to a page mapper unit pointer for current context. */
1056#ifdef IN_GC
1057// typedef PPGMPAGEGCMAPTLB PPGMPAGEMAPTLB;
1058// typedef PPGMPAGEGCMAPTLBE PPGMPAGEMAPTLBE;
1059// typedef PPGMPAGEGCMAPTLBE *PPPGMPAGEMAPTLBE;
1060# define PGM_PAGEMAPTLB_ENTRIES PGM_PAGEGCMAPTLB_ENTRIES
1061# define PGM_PAGEMAPTLB_IDX(GCPhys) PGM_PAGEGCMAPTLB_IDX(GCPhys)
1062 typedef void * PPGMPAGEMAP;
1063 typedef void ** PPPGMPAGEMAP;
1064//#elif IN_RING0
1065// typedef PPGMPAGER0MAPTLB PPGMPAGEMAPTLB;
1066// typedef PPGMPAGER0MAPTLBE PPGMPAGEMAPTLBE;
1067// typedef PPGMPAGER0MAPTLBE *PPPGMPAGEMAPTLBE;
1068//# define PGM_PAGEMAPTLB_ENTRIES PGM_PAGER0MAPTLB_ENTRIES
1069//# define PGM_PAGEMAPTLB_IDX(GCPhys) PGM_PAGER0MAPTLB_IDX(GCPhys)
1070// typedef PPGMCHUNKR0MAP PPGMPAGEMAP;
1071// typedef PPPGMCHUNKR0MAP PPPGMPAGEMAP;
1072#else
1073 typedef PPGMPAGER3MAPTLB PPGMPAGEMAPTLB;
1074 typedef PPGMPAGER3MAPTLBE PPGMPAGEMAPTLBE;
1075 typedef PPGMPAGER3MAPTLBE *PPPGMPAGEMAPTLBE;
1076# define PGM_PAGEMAPTLB_ENTRIES PGM_PAGER3MAPTLB_ENTRIES
1077# define PGM_PAGEMAPTLB_IDX(GCPhys) PGM_PAGER3MAPTLB_IDX(GCPhys)
1078 typedef PPGMCHUNKR3MAP PPGMPAGEMAP;
1079 typedef PPPGMCHUNKR3MAP PPPGMPAGEMAP;
1080#endif
1081/** @} */
1082
1083
1084/** @name PGM Pool Indexes.
1085 * Aka. the unique shadow page identifier.
1086 * @{ */
1087/** NIL page pool IDX. */
1088#define NIL_PGMPOOL_IDX 0
1089/** The first normal index. */
1090#define PGMPOOL_IDX_FIRST_SPECIAL 1
1091/** Page directory (32-bit root). */
1092#define PGMPOOL_IDX_PD 1
1093/** The extended PAE page directory (2048 entries, works as root currently). */
1094#define PGMPOOL_IDX_PAE_PD 2
1095/** Page Directory Pointer Table (PAE root, not currently used). */
1096#define PGMPOOL_IDX_PDPTR 3
1097/** Page Map Level-4 (64-bit root). */
1098#define PGMPOOL_IDX_PML4 4
1099/** The first normal index. */
1100#define PGMPOOL_IDX_FIRST 5
1101/** The last valid index. (inclusive, 14 bits) */
1102#define PGMPOOL_IDX_LAST 0x3fff
1103/** @} */
1104
1105/** The NIL index for the parent chain. */
1106#define NIL_PGMPOOL_USER_INDEX ((uint16_t)0xffff)
1107
1108/**
1109 * Node in the chain linking a shadowed page to it's parent (user).
1110 */
1111#pragma pack(1)
1112typedef struct PGMPOOLUSER
1113{
1114 /** The index to the next item in the chain. NIL_PGMPOOL_USER_INDEX is no next. */
1115 uint16_t iNext;
1116 /** The user page index. */
1117 uint16_t iUser;
1118 /** Index into the user table. */
1119 uint16_t iUserTable;
1120} PGMPOOLUSER, *PPGMPOOLUSER;
1121typedef const PGMPOOLUSER *PCPGMPOOLUSER;
1122#pragma pack()
1123
1124
1125/** The NIL index for the phys ext chain. */
1126#define NIL_PGMPOOL_PHYSEXT_INDEX ((uint16_t)0xffff)
1127
1128/**
1129 * Node in the chain of physical cross reference extents.
1130 */
1131#pragma pack(1)
1132typedef struct PGMPOOLPHYSEXT
1133{
1134 /** The index to the next item in the chain. NIL_PGMPOOL_PHYSEXT_INDEX is no next. */
1135 uint16_t iNext;
1136 /** The user page index. */
1137 uint16_t aidx[3];
1138} PGMPOOLPHYSEXT, *PPGMPOOLPHYSEXT;
1139typedef const PGMPOOLPHYSEXT *PCPGMPOOLPHYSEXT;
1140#pragma pack()
1141
1142
1143/**
1144 * The kind of page that's being shadowed.
1145 */
1146typedef enum PGMPOOLKIND
1147{
1148 /** The virtual invalid 0 entry. */
1149 PGMPOOLKIND_INVALID = 0,
1150 /** The entry is free (=unused). */
1151 PGMPOOLKIND_FREE,
1152
1153 /** Shw: 32-bit page table; Gst: no paging */
1154 PGMPOOLKIND_32BIT_PT_FOR_PHYS,
1155 /** Shw: 32-bit page table; Gst: 32-bit page table. */
1156 PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT,
1157 /** Shw: 32-bit page table; Gst: 4MB page. */
1158 PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB,
1159 /** Shw: PAE page table; Gst: no paging */
1160 PGMPOOLKIND_PAE_PT_FOR_PHYS,
1161 /** Shw: PAE page table; Gst: 32-bit page table. */
1162 PGMPOOLKIND_PAE_PT_FOR_32BIT_PT,
1163 /** Shw: PAE page table; Gst: Half of a 4MB page. */
1164 PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB,
1165 /** Shw: PAE page table; Gst: PAE page table. */
1166 PGMPOOLKIND_PAE_PT_FOR_PAE_PT,
1167 /** Shw: PAE page table; Gst: 2MB page. */
1168 PGMPOOLKIND_PAE_PT_FOR_PAE_2MB,
1169
1170 /** Shw: PAE page directory; Gst: 32-bit page directory. */
1171 PGMPOOLKIND_PAE_PD_FOR_32BIT_PD,
1172 /** Shw: PAE page directory; Gst: PAE page directory. */
1173 PGMPOOLKIND_PAE_PD_FOR_PAE_PD,
1174
1175 /** Shw: 64-bit page directory pointer table; Gst: 64-bit page directory pointer table. */
1176 PGMPOOLKIND_64BIT_PDPTR_FOR_64BIT_PDPTR,
1177
1178 /** Shw: Root 32-bit page directory. */
1179 PGMPOOLKIND_ROOT_32BIT_PD,
1180 /** Shw: Root PAE page directory */
1181 PGMPOOLKIND_ROOT_PAE_PD,
1182 /** Shw: Root PAE page directory pointer table (legacy, 4 entries). */
1183 PGMPOOLKIND_ROOT_PDPTR,
1184 /** Shw: Root page map level-4 table. */
1185 PGMPOOLKIND_ROOT_PML4,
1186
1187 /** The last valid entry. */
1188 PGMPOOLKIND_LAST = PGMPOOLKIND_ROOT_PML4
1189} PGMPOOLKIND;
1190
1191
1192/**
1193 * The tracking data for a page in the pool.
1194 */
1195typedef struct PGMPOOLPAGE
1196{
1197 /** AVL node code with the (HC) physical address of this page. */
1198 AVLOHCPHYSNODECORE Core;
1199 /** Pointer to the HC mapping of the page. */
1200 R3R0PTRTYPE(void *) pvPageHC;
1201 /** The guest physical address. */
1202 RTGCPHYS GCPhys;
1203 /** The kind of page we're shadowing. (This is really a PGMPOOLKIND enum.) */
1204 uint8_t enmKind;
1205 uint8_t bPadding;
1206 /** The index of this page. */
1207 uint16_t idx;
1208 /** The next entry in the list this page currently resides in.
1209 * It's either in the free list or in the GCPhys hash. */
1210 uint16_t iNext;
1211#ifdef PGMPOOL_WITH_USER_TRACKING
1212 /** Head of the user chain. NIL_PGMPOOL_USER_INDEX if not currently in use. */
1213 uint16_t iUserHead;
1214 /** The number of present entries. */
1215 uint16_t cPresent;
1216 /** The first entry in the table which is present. */
1217 uint16_t iFirstPresent;
1218#endif
1219#ifdef PGMPOOL_WITH_MONITORING
1220 /** The number of modifications to the monitored page. */
1221 uint16_t cModifications;
1222 /** The next modified page. NIL_PGMPOOL_IDX if tail. */
1223 uint16_t iModifiedNext;
1224 /** The previous modified page. NIL_PGMPOOL_IDX if head. */
1225 uint16_t iModifiedPrev;
1226 /** The next page sharing access handler. NIL_PGMPOOL_IDX if tail. */
1227 uint16_t iMonitoredNext;
1228 /** The previous page sharing access handler. NIL_PGMPOOL_IDX if head. */
1229 uint16_t iMonitoredPrev;
1230#endif
1231#ifdef PGMPOOL_WITH_CACHE
1232 /** The next page in the age list. */
1233 uint16_t iAgeNext;
1234 /** The previous page in the age list. */
1235 uint16_t iAgePrev;
1236#endif /* PGMPOOL_WITH_CACHE */
1237 /** Used to indicate that the page is zeroed. */
1238 bool fZeroed;
1239 /** Used to indicate that a PT has non-global entries. */
1240 bool fSeenNonGlobal;
1241 /** Used to indicate that we're monitoring writes to the guest page. */
1242 bool fMonitored;
1243 /** Used to indicate that the page is in the cache (e.g. in the GCPhys hash).
1244 * (All pages are in the age list.) */
1245 bool fCached;
1246 /** This is used by the R3 access handlers when invoked by an async thread.
1247 * It's a hack required because of REMR3NotifyHandlerPhysicalDeregister. */
1248 bool volatile fReusedFlushPending;
1249 /** Used to indicate that the guest is mapping the page is also used as a CR3.
1250 * In these cases the access handler acts differently and will check
1251 * for mapping conflicts like the normal CR3 handler.
1252 * @todo When we change the CR3 shadowing to use pool pages, this flag can be
1253 * replaced by a list of pages which share access handler.
1254 */
1255 bool fCR3Mix;
1256#if HC_ARCH_BITS == 64 || GC_ARCH_BITS == 64
1257 bool Alignment[4]; /**< Align the structure size on a 64-bit boundrary. */
1258#endif
1259} PGMPOOLPAGE, *PPGMPOOLPAGE, **PPPGMPOOLPAGE;
1260
1261
1262#ifdef PGMPOOL_WITH_CACHE
1263/** The hash table size. */
1264# define PGMPOOL_HASH_SIZE 0x40
1265/** The hash function. */
1266# define PGMPOOL_HASH(GCPhys) ( ((GCPhys) >> PAGE_SHIFT) & (PGMPOOL_HASH_SIZE - 1) )
1267#endif
1268
1269
1270/**
1271 * The shadow page pool instance data.
1272 *
1273 * It's all one big allocation made at init time, except for the
1274 * pages that is. The user nodes follows immediatly after the
1275 * page structures.
1276 */
1277typedef struct PGMPOOL
1278{
1279 /** The VM handle - HC Ptr. */
1280 R3R0PTRTYPE(PVM) pVMHC;
1281 /** The VM handle - GC Ptr. */
1282 GCPTRTYPE(PVM) pVMGC;
1283 /** The max pool size. This includes the special IDs. */
1284 uint16_t cMaxPages;
1285 /** The current pool size. */
1286 uint16_t cCurPages;
1287 /** The head of the free page list. */
1288 uint16_t iFreeHead;
1289 /* Padding. */
1290 uint16_t u16Padding;
1291#ifdef PGMPOOL_WITH_USER_TRACKING
1292 /** Head of the chain of free user nodes. */
1293 uint16_t iUserFreeHead;
1294 /** The number of user nodes we've allocated. */
1295 uint16_t cMaxUsers;
1296 /** The number of present page table entries in the entire pool. */
1297 uint32_t cPresent;
1298 /** Pointer to the array of user nodes - GC pointer. */
1299 GCPTRTYPE(PPGMPOOLUSER) paUsersGC;
1300 /** Pointer to the array of user nodes - HC pointer. */
1301 R3R0PTRTYPE(PPGMPOOLUSER) paUsersHC;
1302#endif /* PGMPOOL_WITH_USER_TRACKING */
1303#ifdef PGMPOOL_WITH_GCPHYS_TRACKING
1304 /** Head of the chain of free phys ext nodes. */
1305 uint16_t iPhysExtFreeHead;
1306 /** The number of user nodes we've allocated. */
1307 uint16_t cMaxPhysExts;
1308 /** Pointer to the array of physical xref extent - GC pointer. */
1309 GCPTRTYPE(PPGMPOOLPHYSEXT) paPhysExtsGC;
1310 /** Pointer to the array of physical xref extent nodes - HC pointer. */
1311 R3R0PTRTYPE(PPGMPOOLPHYSEXT) paPhysExtsHC;
1312#endif /* PGMPOOL_WITH_GCPHYS_TRACKING */
1313#ifdef PGMPOOL_WITH_CACHE
1314 /** Hash table for GCPhys addresses. */
1315 uint16_t aiHash[PGMPOOL_HASH_SIZE];
1316 /** The head of the age list. */
1317 uint16_t iAgeHead;
1318 /** The tail of the age list. */
1319 uint16_t iAgeTail;
1320 /** Set if the cache is enabled. */
1321 bool fCacheEnabled;
1322#endif /* PGMPOOL_WITH_CACHE */
1323#ifdef PGMPOOL_WITH_MONITORING
1324 /** Head of the list of modified pages. */
1325 uint16_t iModifiedHead;
1326 /** The current number of modified pages. */
1327 uint16_t cModifiedPages;
1328 /** Access handler, GC. */
1329 GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnAccessHandlerGC;
1330 /** Access handler, R0. */
1331 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnAccessHandlerR0;
1332 /** Access handler, R3. */
1333 R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnAccessHandlerR3;
1334 /** The access handler description (HC ptr). */
1335 R3PTRTYPE(const char *) pszAccessHandler;
1336#endif /* PGMPOOL_WITH_MONITORING */
1337 /** The number of pages currently in use. */
1338 uint16_t cUsedPages;
1339#ifdef VBOX_WITH_STATISTICS
1340 /** The high wather mark for cUsedPages. */
1341 uint16_t cUsedPagesHigh;
1342 uint32_t Alignment1; /**< Align the next member on a 64-bit boundrary. */
1343 /** Profiling pgmPoolAlloc(). */
1344 STAMPROFILEADV StatAlloc;
1345 /** Profiling pgmPoolClearAll(). */
1346 STAMPROFILE StatClearAll;
1347 /** Profiling pgmPoolFlushAllInt(). */
1348 STAMPROFILE StatFlushAllInt;
1349 /** Profiling pgmPoolFlushPage(). */
1350 STAMPROFILE StatFlushPage;
1351 /** Profiling pgmPoolFree(). */
1352 STAMPROFILE StatFree;
1353 /** Profiling time spent zeroing pages. */
1354 STAMPROFILE StatZeroPage;
1355# ifdef PGMPOOL_WITH_USER_TRACKING
1356 /** Profiling of pgmPoolTrackDeref. */
1357 STAMPROFILE StatTrackDeref;
1358 /** Profiling pgmTrackFlushGCPhysPT. */
1359 STAMPROFILE StatTrackFlushGCPhysPT;
1360 /** Profiling pgmTrackFlushGCPhysPTs. */
1361 STAMPROFILE StatTrackFlushGCPhysPTs;
1362 /** Profiling pgmTrackFlushGCPhysPTsSlow. */
1363 STAMPROFILE StatTrackFlushGCPhysPTsSlow;
1364 /** Number of times we've been out of user records. */
1365 STAMCOUNTER StatTrackFreeUpOneUser;
1366# endif
1367# ifdef PGMPOOL_WITH_GCPHYS_TRACKING
1368 /** Profiling deref activity related tracking GC physical pages. */
1369 STAMPROFILE StatTrackDerefGCPhys;
1370 /** Number of linear searches for a HCPhys in the ram ranges. */
1371 STAMCOUNTER StatTrackLinearRamSearches;
1372 /** The number of failing pgmPoolTrackPhysExtAlloc calls. */
1373 STAMCOUNTER StamTrackPhysExtAllocFailures;
1374# endif
1375# ifdef PGMPOOL_WITH_MONITORING
1376 /** Profiling the GC PT access handler. */
1377 STAMPROFILE StatMonitorGC;
1378 /** Times we've failed interpreting the instruction. */
1379 STAMCOUNTER StatMonitorGCEmulateInstr;
1380 /** Profiling the pgmPoolFlushPage calls made from the GC PT access handler. */
1381 STAMPROFILE StatMonitorGCFlushPage;
1382 /** Times we've detected fork(). */
1383 STAMCOUNTER StatMonitorGCFork;
1384 /** Profiling the GC access we've handled (except REP STOSD). */
1385 STAMPROFILE StatMonitorGCHandled;
1386 /** Times we've failed interpreting a patch code instruction. */
1387 STAMCOUNTER StatMonitorGCIntrFailPatch1;
1388 /** Times we've failed interpreting a patch code instruction during flushing. */
1389 STAMCOUNTER StatMonitorGCIntrFailPatch2;
1390 /** The number of times we've seen rep prefixes we can't handle. */
1391 STAMCOUNTER StatMonitorGCRepPrefix;
1392 /** Profiling the REP STOSD cases we've handled. */
1393 STAMPROFILE StatMonitorGCRepStosd;
1394
1395 /** Profiling the HC PT access handler. */
1396 STAMPROFILE StatMonitorHC;
1397 /** Times we've failed interpreting the instruction. */
1398 STAMCOUNTER StatMonitorHCEmulateInstr;
1399 /** Profiling the pgmPoolFlushPage calls made from the HC PT access handler. */
1400 STAMPROFILE StatMonitorHCFlushPage;
1401 /** Times we've detected fork(). */
1402 STAMCOUNTER StatMonitorHCFork;
1403 /** Profiling the HC access we've handled (except REP STOSD). */
1404 STAMPROFILE StatMonitorHCHandled;
1405 /** The number of times we've seen rep prefixes we can't handle. */
1406 STAMCOUNTER StatMonitorHCRepPrefix;
1407 /** Profiling the REP STOSD cases we've handled. */
1408 STAMPROFILE StatMonitorHCRepStosd;
1409 /** The number of times we're called in an async thread an need to flush. */
1410 STAMCOUNTER StatMonitorHCAsync;
1411 /** The high wather mark for cModifiedPages. */
1412 uint16_t cModifiedPagesHigh;
1413 uint16_t Alignment2[3]; /**< Align the next member on a 64-bit boundrary. */
1414# endif
1415# ifdef PGMPOOL_WITH_CACHE
1416 /** The number of cache hits. */
1417 STAMCOUNTER StatCacheHits;
1418 /** The number of cache misses. */
1419 STAMCOUNTER StatCacheMisses;
1420 /** The number of times we've got a conflict of 'kind' in the cache. */
1421 STAMCOUNTER StatCacheKindMismatches;
1422 /** Number of times we've been out of pages. */
1423 STAMCOUNTER StatCacheFreeUpOne;
1424 /** The number of cacheable allocations. */
1425 STAMCOUNTER StatCacheCacheable;
1426 /** The number of uncacheable allocations. */
1427 STAMCOUNTER StatCacheUncacheable;
1428# endif
1429#elif HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32
1430 uint32_t Alignment1; /**< Align the next member on a 64-bit boundrary. */
1431#endif
1432 /** The AVL tree for looking up a page by its HC physical address. */
1433 AVLOHCPHYSTREE HCPhysTree;
1434 uint32_t Alignment3; /**< Align the next member on a 64-bit boundrary. */
1435 /** Array of pages. (cMaxPages in length)
1436 * The Id is the index into thist array.
1437 */
1438 PGMPOOLPAGE aPages[PGMPOOL_IDX_FIRST];
1439} PGMPOOL, *PPGMPOOL, **PPPGMPOOL;
1440
1441
1442/** @def PGMPOOL_PAGE_2_PTR
1443 * Maps a pool page pool into the current context.
1444 *
1445 * @returns VBox status code.
1446 * @param pVM The VM handle.
1447 * @param pPage The pool page.
1448 *
1449 * @remark In HC this uses PGMGCDynMapHCPage(), so it will consume of the
1450 * small page window employeed by that function. Be careful.
1451 * @remark There is no need to assert on the result.
1452 */
1453#ifdef IN_GC
1454# define PGMPOOL_PAGE_2_PTR(pVM, pPage) pgmGCPoolMapPage((pVM), (pPage))
1455#else
1456# define PGMPOOL_PAGE_2_PTR(pVM, pPage) ((pPage)->pvPageHC)
1457#endif
1458
1459
1460/**
1461 * Trees are using self relative offsets as pointers.
1462 * So, all its data, including the root pointer, must be in the heap for HC and GC
1463 * to have the same layout.
1464 */
1465typedef struct PGMTREES
1466{
1467 /** Physical access handlers (AVL range+offsetptr tree). */
1468 AVLROGCPHYSTREE PhysHandlers;
1469 /** Virtual access handlers (AVL range + GC ptr tree). */
1470 AVLROGCPTRTREE VirtHandlers;
1471 /** Virtual access handlers (Phys range AVL range + offsetptr tree). */
1472 AVLROGCPHYSTREE PhysToVirtHandlers;
1473 uint32_t auPadding[1];
1474} PGMTREES;
1475/** Pointer to PGM trees. */
1476typedef PGMTREES *PPGMTREES;
1477
1478
1479/** @name Paging mode macros
1480 * @{ */
1481#ifdef IN_GC
1482# define PGM_CTX(a,b) a##GC##b
1483# define PGM_CTX_STR(a,b) a "GC" b
1484# define PGM_CTX_DECL(type) PGMGCDECL(type)
1485#else
1486# ifdef IN_RING3
1487# define PGM_CTX(a,b) a##R3##b
1488# define PGM_CTX_STR(a,b) a "R3" b
1489# define PGM_CTX_DECL(type) DECLCALLBACK(type)
1490# else
1491# define PGM_CTX(a,b) a##R0##b
1492# define PGM_CTX_STR(a,b) a "R0" b
1493# define PGM_CTX_DECL(type) PGMDECL(type)
1494# endif
1495#endif
1496
1497#define PGM_GST_NAME_REAL(name) PGM_CTX(pgm,GstReal##name)
1498#define PGM_GST_NAME_GC_REAL_STR(name) "pgmGCGstReal" #name
1499#define PGM_GST_NAME_R0_REAL_STR(name) "pgmR0GstReal" #name
1500#define PGM_GST_NAME_PROT(name) PGM_CTX(pgm,GstProt##name)
1501#define PGM_GST_NAME_GC_PROT_STR(name) "pgmGCGstProt" #name
1502#define PGM_GST_NAME_R0_PROT_STR(name) "pgmR0GstProt" #name
1503#define PGM_GST_NAME_32BIT(name) PGM_CTX(pgm,Gst32Bit##name)
1504#define PGM_GST_NAME_GC_32BIT_STR(name) "pgmGCGst32Bit" #name
1505#define PGM_GST_NAME_R0_32BIT_STR(name) "pgmR0Gst32Bit" #name
1506#define PGM_GST_NAME_PAE(name) PGM_CTX(pgm,GstPAE##name)
1507#define PGM_GST_NAME_GC_PAE_STR(name) "pgmGCGstPAE" #name
1508#define PGM_GST_NAME_R0_PAE_STR(name) "pgmR0GstPAE" #name
1509#define PGM_GST_NAME_AMD64(name) PGM_CTX(pgm,GstAMD64##name)
1510#define PGM_GST_NAME_GC_AMD64_STR(name) "pgmGCGstAMD64" #name
1511#define PGM_GST_NAME_R0_AMD64_STR(name) "pgmR0GstAMD64" #name
1512#define PGM_GST_PFN(name, pVM) ((pVM)->pgm.s.PGM_CTX(pfn,Gst##name))
1513#define PGM_GST_DECL(type, name) PGM_CTX_DECL(type) PGM_GST_NAME(name)
1514
1515#define PGM_SHW_NAME_32BIT(name) PGM_CTX(pgm,Shw32Bit##name)
1516#define PGM_SHW_NAME_GC_32BIT_STR(name) "pgmGCShw32Bit" #name
1517#define PGM_SHW_NAME_R0_32BIT_STR(name) "pgmR0Shw32Bit" #name
1518#define PGM_SHW_NAME_PAE(name) PGM_CTX(pgm,ShwPAE##name)
1519#define PGM_SHW_NAME_GC_PAE_STR(name) "pgmGCShwPAE" #name
1520#define PGM_SHW_NAME_R0_PAE_STR(name) "pgmR0ShwPAE" #name
1521#define PGM_SHW_NAME_AMD64(name) PGM_CTX(pgm,ShwAMD64##name)
1522#define PGM_SHW_NAME_GC_AMD64_STR(name) "pgmGCShwAMD64" #name
1523#define PGM_SHW_NAME_R0_AMD64_STR(name) "pgmR0ShwAMD64" #name
1524#define PGM_SHW_DECL(type, name) PGM_CTX_DECL(type) PGM_SHW_NAME(name)
1525#define PGM_SHW_PFN(name, pVM) ((pVM)->pgm.s.PGM_CTX(pfn,Shw##name))
1526
1527/* Shw_Gst */
1528#define PGM_BTH_NAME_32BIT_REAL(name) PGM_CTX(pgm,Bth32BitReal##name)
1529#define PGM_BTH_NAME_32BIT_PROT(name) PGM_CTX(pgm,Bth32BitProt##name)
1530#define PGM_BTH_NAME_32BIT_32BIT(name) PGM_CTX(pgm,Bth32Bit32Bit##name)
1531#define PGM_BTH_NAME_PAE_REAL(name) PGM_CTX(pgm,BthPAEReal##name)
1532#define PGM_BTH_NAME_PAE_PROT(name) PGM_CTX(pgm,BthPAEProt##name)
1533#define PGM_BTH_NAME_PAE_32BIT(name) PGM_CTX(pgm,BthPAE32Bit##name)
1534#define PGM_BTH_NAME_PAE_PAE(name) PGM_CTX(pgm,BthPAEPAE##name)
1535#define PGM_BTH_NAME_AMD64_REAL(name) PGM_CTX(pgm,BthAMD64Real##name)
1536#define PGM_BTH_NAME_AMD64_PROT(name) PGM_CTX(pgm,BthAMD64Prot##name)
1537#define PGM_BTH_NAME_AMD64_AMD64(name) PGM_CTX(pgm,BthAMD64AMD64##name)
1538#define PGM_BTH_NAME_GC_32BIT_REAL_STR(name) "pgmGCBth32BitReal" #name
1539#define PGM_BTH_NAME_GC_32BIT_PROT_STR(name) "pgmGCBth32BitProt" #name
1540#define PGM_BTH_NAME_GC_32BIT_32BIT_STR(name) "pgmGCBth32Bit32Bit" #name
1541#define PGM_BTH_NAME_GC_PAE_REAL_STR(name) "pgmGCBthPAEReal" #name
1542#define PGM_BTH_NAME_GC_PAE_PROT_STR(name) "pgmGCBthPAEProt" #name
1543#define PGM_BTH_NAME_GC_PAE_32BIT_STR(name) "pgmGCBthPAE32Bit" #name
1544#define PGM_BTH_NAME_GC_PAE_PAE_STR(name) "pgmGCBthPAEPAE" #name
1545#define PGM_BTH_NAME_GC_AMD64_REAL_STR(name) "pgmGCBthAMD64Real" #name
1546#define PGM_BTH_NAME_GC_AMD64_PROT_STR(name) "pgmGCBthAMD64Prot" #name
1547#define PGM_BTH_NAME_GC_AMD64_AMD64_STR(name) "pgmGCBthAMD64AMD64" #name
1548#define PGM_BTH_NAME_R0_32BIT_REAL_STR(name) "pgmR0Bth32BitReal" #name
1549#define PGM_BTH_NAME_R0_32BIT_PROT_STR(name) "pgmR0Bth32BitProt" #name
1550#define PGM_BTH_NAME_R0_32BIT_32BIT_STR(name) "pgmR0Bth32Bit32Bit" #name
1551#define PGM_BTH_NAME_R0_PAE_REAL_STR(name) "pgmR0BthPAEReal" #name
1552#define PGM_BTH_NAME_R0_PAE_PROT_STR(name) "pgmR0BthPAEProt" #name
1553#define PGM_BTH_NAME_R0_PAE_32BIT_STR(name) "pgmR0BthPAE32Bit" #name
1554#define PGM_BTH_NAME_R0_PAE_PAE_STR(name) "pgmR0BthPAEPAE" #name
1555#define PGM_BTH_NAME_R0_AMD64_REAL_STR(name) "pgmR0BthAMD64Real" #name
1556#define PGM_BTH_NAME_R0_AMD64_PROT_STR(name) "pgmR0BthAMD64Prot" #name
1557#define PGM_BTH_NAME_R0_AMD64_AMD64_STR(name) "pgmR0BthAMD64AMD64" #name
1558#define PGM_BTH_DECL(type, name) PGM_CTX_DECL(type) PGM_BTH_NAME(name)
1559#define PGM_BTH_PFN(name, pVM) ((pVM)->pgm.s.PGM_CTX(pfn,Bth##name))
1560/** @} */
1561
1562/**
1563 * Data for each paging mode.
1564 */
1565typedef struct PGMMODEDATA
1566{
1567 /** The guest mode type. */
1568 uint32_t uGstType;
1569 /** The shadow mode type. */
1570 uint32_t uShwType;
1571
1572 /** @name Function pointers for Shadow paging.
1573 * @{
1574 */
1575 DECLR3CALLBACKMEMBER(int, pfnR3ShwRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1576 DECLR3CALLBACKMEMBER(int, pfnR3ShwExit,(PVM pVM));
1577 DECLR3CALLBACKMEMBER(int, pfnR3ShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1578 DECLR3CALLBACKMEMBER(int, pfnR3ShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1579 DECLR3CALLBACKMEMBER(int, pfnR3ShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1580 DECLR3CALLBACKMEMBER(int, pfnR3ShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1581 DECLR3CALLBACKMEMBER(int, pfnR3ShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1582
1583 DECLGCCALLBACKMEMBER(int, pfnGCShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1584 DECLGCCALLBACKMEMBER(int, pfnGCShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1585 DECLGCCALLBACKMEMBER(int, pfnGCShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1586 DECLGCCALLBACKMEMBER(int, pfnGCShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1587 DECLGCCALLBACKMEMBER(int, pfnGCShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1588
1589 DECLR0CALLBACKMEMBER(int, pfnR0ShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1590 DECLR0CALLBACKMEMBER(int, pfnR0ShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1591 DECLR0CALLBACKMEMBER(int, pfnR0ShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1592 DECLR0CALLBACKMEMBER(int, pfnR0ShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1593 DECLR0CALLBACKMEMBER(int, pfnR0ShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1594 /** @} */
1595
1596 /** @name Function pointers for Guest paging.
1597 * @{
1598 */
1599 DECLR3CALLBACKMEMBER(int, pfnR3GstRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1600 DECLR3CALLBACKMEMBER(int, pfnR3GstExit,(PVM pVM));
1601 DECLR3CALLBACKMEMBER(int, pfnR3GstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1602 DECLR3CALLBACKMEMBER(int, pfnR3GstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1603 DECLR3CALLBACKMEMBER(int, pfnR3GstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1604 DECLR3CALLBACKMEMBER(int, pfnR3GstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1605 DECLR3CALLBACKMEMBER(int, pfnR3GstUnmonitorCR3,(PVM pVM));
1606 DECLR3CALLBACKMEMBER(int, pfnR3GstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1607 DECLR3CALLBACKMEMBER(int, pfnR3GstUnmapCR3,(PVM pVM));
1608 R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnR3GstWriteHandlerCR3;
1609 R3PTRTYPE(const char *) pszR3GstWriteHandlerCR3;
1610 R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnR3GstPAEWriteHandlerCR3;
1611 R3PTRTYPE(const char *) pszR3GstPAEWriteHandlerCR3;
1612
1613 DECLGCCALLBACKMEMBER(int, pfnGCGstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1614 DECLGCCALLBACKMEMBER(int, pfnGCGstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1615 DECLGCCALLBACKMEMBER(int, pfnGCGstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1616 DECLGCCALLBACKMEMBER(int, pfnGCGstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1617 DECLGCCALLBACKMEMBER(int, pfnGCGstUnmonitorCR3,(PVM pVM));
1618 DECLGCCALLBACKMEMBER(int, pfnGCGstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1619 DECLGCCALLBACKMEMBER(int, pfnGCGstUnmapCR3,(PVM pVM));
1620 GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnGCGstWriteHandlerCR3;
1621 GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnGCGstPAEWriteHandlerCR3;
1622
1623 DECLR0CALLBACKMEMBER(int, pfnR0GstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1624 DECLR0CALLBACKMEMBER(int, pfnR0GstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1625 DECLR0CALLBACKMEMBER(int, pfnR0GstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1626 DECLR0CALLBACKMEMBER(int, pfnR0GstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1627 DECLR0CALLBACKMEMBER(int, pfnR0GstUnmonitorCR3,(PVM pVM));
1628 DECLR0CALLBACKMEMBER(int, pfnR0GstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1629 DECLR0CALLBACKMEMBER(int, pfnR0GstUnmapCR3,(PVM pVM));
1630 R0PTRTYPE(PFNPGMGCPHYSHANDLER) pfnR0GstWriteHandlerCR3;
1631 R0PTRTYPE(PFNPGMGCPHYSHANDLER) pfnR0GstPAEWriteHandlerCR3;
1632 /** @} */
1633
1634 /** @name Function pointers for Both Shadow and Guest paging.
1635 * @{
1636 */
1637 DECLR3CALLBACKMEMBER(int, pfnR3BthRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1638 DECLR3CALLBACKMEMBER(int, pfnR3BthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1639 DECLR3CALLBACKMEMBER(int, pfnR3BthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1640 DECLR3CALLBACKMEMBER(int, pfnR3BthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
1641 DECLR3CALLBACKMEMBER(int, pfnR3BthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
1642 DECLR3CALLBACKMEMBER(int, pfnR3BthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
1643 DECLR3CALLBACKMEMBER(int, pfnR3BthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
1644#ifdef VBOX_STRICT
1645 DECLR3CALLBACKMEMBER(unsigned, pfnR3BthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
1646#endif
1647
1648 DECLGCCALLBACKMEMBER(int, pfnGCBthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1649 DECLGCCALLBACKMEMBER(int, pfnGCBthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1650 DECLGCCALLBACKMEMBER(int, pfnGCBthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
1651 DECLGCCALLBACKMEMBER(int, pfnGCBthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
1652 DECLGCCALLBACKMEMBER(int, pfnGCBthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
1653 DECLGCCALLBACKMEMBER(int, pfnGCBthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
1654#ifdef VBOX_STRICT
1655 DECLGCCALLBACKMEMBER(unsigned, pfnGCBthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
1656#endif
1657
1658 DECLR0CALLBACKMEMBER(int, pfnR0BthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1659 DECLR0CALLBACKMEMBER(int, pfnR0BthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1660 DECLR0CALLBACKMEMBER(int, pfnR0BthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
1661 DECLR0CALLBACKMEMBER(int, pfnR0BthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
1662 DECLR0CALLBACKMEMBER(int, pfnR0BthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
1663 DECLR0CALLBACKMEMBER(int, pfnR0BthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
1664#ifdef VBOX_STRICT
1665 DECLR0CALLBACKMEMBER(unsigned, pfnR0BthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
1666#endif
1667 /** @} */
1668} PGMMODEDATA, *PPGMMODEDATA;
1669
1670
1671
1672/**
1673 * Converts a PGM pointer into a VM pointer.
1674 * @returns Pointer to the VM structure the PGM is part of.
1675 * @param pPGM Pointer to PGM instance data.
1676 */
1677#define PGM2VM(pPGM) ( (PVM)((char*)pPGM - pPGM->offVM) )
1678
1679/**
1680 * PGM Data (part of VM)
1681 */
1682typedef struct PGM
1683{
1684 /** Offset to the VM structure. */
1685 RTINT offVM;
1686
1687 /*
1688 * This will be redefined at least two more times before we're done, I'm sure.
1689 * The current code is only to get on with the coding.
1690 * - 2004-06-10: initial version, bird.
1691 * - 2004-07-02: 1st time, bird.
1692 * - 2004-10-18: 2nd time, bird.
1693 * - 2005-07-xx: 3rd time, bird.
1694 */
1695
1696 /** Pointer to the page table entries for the dynamic page mapping area - GCPtr. */
1697 GCPTRTYPE(PX86PTE) paDynPageMap32BitPTEsGC;
1698 /** Pointer to the page table entries for the dynamic page mapping area - GCPtr. */
1699 GCPTRTYPE(PX86PTEPAE) paDynPageMapPaePTEsGC;
1700
1701 /** The host paging mode. (This is what SUPLib reports.) */
1702 SUPPAGINGMODE enmHostMode;
1703 /** The shadow paging mode. */
1704 PGMMODE enmShadowMode;
1705 /** The guest paging mode. */
1706 PGMMODE enmGuestMode;
1707
1708 /** The current physical address representing in the guest CR3 register. */
1709 RTGCPHYS GCPhysCR3;
1710 /** Pointer to the 5 page CR3 content mapping.
1711 * The first page is always the CR3 (in some form) while the 4 other pages
1712 * are used of the PDs in PAE mode. */
1713 RTGCPTR GCPtrCR3Mapping;
1714 /** The physical address of the currently monitored guest CR3 page.
1715 * When this value is NIL_RTGCPHYS no page is being monitored. */
1716 RTGCPHYS GCPhysGstCR3Monitored;
1717#if HC_ARCH_BITS == 64 || GC_ARCH_BITS == 64
1718 RTGCPHYS GCPhysPadding0; /**< alignment padding. */
1719#endif
1720
1721 /** @name 32-bit Guest Paging.
1722 * @{ */
1723 /** The guest's page directory, HC pointer. */
1724 R3R0PTRTYPE(PVBOXPD) pGuestPDHC;
1725 /** The guest's page directory, static GC mapping. */
1726 GCPTRTYPE(PVBOXPD) pGuestPDGC;
1727 /** @} */
1728
1729 /** @name PAE Guest Paging.
1730 * @{ */
1731 /** The guest's page directory pointer table, static GC mapping. */
1732 GCPTRTYPE(PX86PDPTR) pGstPaePDPTRGC;
1733 /** The guest's page directory pointer table, HC pointer. */
1734 R3R0PTRTYPE(PX86PDPTR) pGstPaePDPTRHC;
1735 /** The guest's page directories, HC pointers.
1736 * These are individual pointers and doesn't have to be adjecent.
1737 * These doesn't have to be update to date - use pgmGstGetPaePD() to access them. */
1738 R3R0PTRTYPE(PX86PDPAE) apGstPaePDsHC[4];
1739 /** The guest's page directories, static GC mapping.
1740 * Unlike the HC array the first entry can be accessed as a 2048 entry PD.
1741 * These doesn't have to be update to date - use pgmGstGetPaePD() to access them. */
1742 GCPTRTYPE(PX86PDPAE) apGstPaePDsGC[4];
1743 /** The physical addresses of the guest page directories (PAE) pointed to by apGstPagePDsHC/GC. */
1744 RTGCPHYS aGCPhysGstPaePDs[4];
1745 /** The physical addresses of the monitored guest page directories (PAE). */
1746 RTGCPHYS aGCPhysGstPaePDsMonitored[4];
1747 /** @} */
1748
1749
1750 /** @name 32-bit Shadow Paging
1751 * @{ */
1752 /** The 32-Bit PD - HC Ptr. */
1753 R3R0PTRTYPE(PX86PD) pHC32BitPD;
1754 /** The 32-Bit PD - GC Ptr. */
1755 GCPTRTYPE(PX86PD) pGC32BitPD;
1756#if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32
1757 uint32_t u32Padding1; /**< alignment padding. */
1758#endif
1759 /** The Physical Address (HC) of the 32-Bit PD. */
1760 RTHCPHYS HCPhys32BitPD;
1761 /** @} */
1762
1763 /** @name PAE Shadow Paging
1764 * @{ */
1765 /** The four PDs for the low 4GB - HC Ptr.
1766 * Even though these are 4 pointers, what they point at is a single table.
1767 * Thus, it's possible to walk the 2048 entries starting where apHCPaePDs[0] points. */
1768 R3R0PTRTYPE(PX86PDPAE) apHCPaePDs[4];
1769 /** The four PDs for the low 4GB - GC Ptr.
1770 * Same kind of mapping as apHCPaePDs. */
1771 GCPTRTYPE(PX86PDPAE) apGCPaePDs[4];
1772 /** The Physical Address (HC) of the four PDs for the low 4GB.
1773 * These are *NOT* 4 contiguous pages. */
1774 RTHCPHYS aHCPhysPaePDs[4];
1775 /** The PAE PDPTR - HC Ptr. */
1776 R3R0PTRTYPE(PX86PDPTR) pHCPaePDPTR;
1777 /** The Physical Address (HC) of the PAE PDPTR. */
1778 RTHCPHYS HCPhysPaePDPTR;
1779 /** The PAE PDPTR - GC Ptr. */
1780 GCPTRTYPE(PX86PDPTR) pGCPaePDPTR;
1781 /** @} */
1782
1783 /** @name AMD64 Shadow Paging
1784 * Extends PAE Paging.
1785 * @{ */
1786 /** The Page Map Level 4 table - HC Ptr. */
1787 GCPTRTYPE(PX86PML4) pGCPaePML4;
1788 /** The Page Map Level 4 table - GC Ptr. */
1789 R3R0PTRTYPE(PX86PML4) pHCPaePML4;
1790 /** The Physical Address (HC) of the Page Map Level 4 table. */
1791 RTHCPHYS HCPhysPaePML4;
1792 /** @}*/
1793
1794 /** @name Function pointers for Shadow paging.
1795 * @{
1796 */
1797 DECLR3CALLBACKMEMBER(int, pfnR3ShwRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1798 DECLR3CALLBACKMEMBER(int, pfnR3ShwExit,(PVM pVM));
1799 DECLR3CALLBACKMEMBER(int, pfnR3ShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1800 DECLR3CALLBACKMEMBER(int, pfnR3ShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1801 DECLR3CALLBACKMEMBER(int, pfnR3ShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1802 DECLR3CALLBACKMEMBER(int, pfnR3ShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1803 DECLR3CALLBACKMEMBER(int, pfnR3ShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1804
1805 DECLGCCALLBACKMEMBER(int, pfnGCShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1806 DECLGCCALLBACKMEMBER(int, pfnGCShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1807 DECLGCCALLBACKMEMBER(int, pfnGCShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1808 DECLGCCALLBACKMEMBER(int, pfnGCShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1809 DECLGCCALLBACKMEMBER(int, pfnGCShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1810#if GC_ARCH_BITS == 32 && HC_ARCH_BITS == 64
1811 RTGCPTR alignment0; /**< structure size alignment. */
1812#endif
1813
1814 DECLR0CALLBACKMEMBER(int, pfnR0ShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1815 DECLR0CALLBACKMEMBER(int, pfnR0ShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1816 DECLR0CALLBACKMEMBER(int, pfnR0ShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1817 DECLR0CALLBACKMEMBER(int, pfnR0ShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1818 DECLR0CALLBACKMEMBER(int, pfnR0ShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1819
1820 /** @} */
1821
1822 /** @name Function pointers for Guest paging.
1823 * @{
1824 */
1825 DECLR3CALLBACKMEMBER(int, pfnR3GstRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1826 DECLR3CALLBACKMEMBER(int, pfnR3GstExit,(PVM pVM));
1827 DECLR3CALLBACKMEMBER(int, pfnR3GstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1828 DECLR3CALLBACKMEMBER(int, pfnR3GstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1829 DECLR3CALLBACKMEMBER(int, pfnR3GstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1830 DECLR3CALLBACKMEMBER(int, pfnR3GstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1831 DECLR3CALLBACKMEMBER(int, pfnR3GstUnmonitorCR3,(PVM pVM));
1832 DECLR3CALLBACKMEMBER(int, pfnR3GstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1833 DECLR3CALLBACKMEMBER(int, pfnR3GstUnmapCR3,(PVM pVM));
1834 R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnR3GstWriteHandlerCR3;
1835 R3PTRTYPE(const char *) pszR3GstWriteHandlerCR3;
1836 R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnR3GstPAEWriteHandlerCR3;
1837 R3PTRTYPE(const char *) pszR3GstPAEWriteHandlerCR3;
1838
1839 DECLGCCALLBACKMEMBER(int, pfnGCGstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1840 DECLGCCALLBACKMEMBER(int, pfnGCGstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1841 DECLGCCALLBACKMEMBER(int, pfnGCGstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1842 DECLGCCALLBACKMEMBER(int, pfnGCGstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1843 DECLGCCALLBACKMEMBER(int, pfnGCGstUnmonitorCR3,(PVM pVM));
1844 DECLGCCALLBACKMEMBER(int, pfnGCGstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1845 DECLGCCALLBACKMEMBER(int, pfnGCGstUnmapCR3,(PVM pVM));
1846 GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnGCGstWriteHandlerCR3;
1847 GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnGCGstPAEWriteHandlerCR3;
1848#if GC_ARCH_BITS == 32 && HC_ARCH_BITS == 64
1849 RTGCPTR alignment3; /**< structure size alignment. */
1850#endif
1851
1852 DECLR0CALLBACKMEMBER(int, pfnR0GstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1853 DECLR0CALLBACKMEMBER(int, pfnR0GstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1854 DECLR0CALLBACKMEMBER(int, pfnR0GstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1855 DECLR0CALLBACKMEMBER(int, pfnR0GstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1856 DECLR0CALLBACKMEMBER(int, pfnR0GstUnmonitorCR3,(PVM pVM));
1857 DECLR0CALLBACKMEMBER(int, pfnR0GstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1858 DECLR0CALLBACKMEMBER(int, pfnR0GstUnmapCR3,(PVM pVM));
1859 R0PTRTYPE(PFNPGMGCPHYSHANDLER) pfnR0GstWriteHandlerCR3;
1860 R0PTRTYPE(PFNPGMGCPHYSHANDLER) pfnR0GstPAEWriteHandlerCR3;
1861 /** @} */
1862
1863 /** @name Function pointers for Both Shadow and Guest paging.
1864 * @{
1865 */
1866 DECLR3CALLBACKMEMBER(int, pfnR3BthRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1867 DECLR3CALLBACKMEMBER(int, pfnR3BthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1868 DECLR3CALLBACKMEMBER(int, pfnR3BthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1869 DECLR3CALLBACKMEMBER(int, pfnR3BthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
1870 DECLR3CALLBACKMEMBER(int, pfnR3BthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
1871 DECLR3CALLBACKMEMBER(int, pfnR3BthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
1872 DECLR3CALLBACKMEMBER(int, pfnR3BthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
1873 DECLR3CALLBACKMEMBER(unsigned, pfnR3BthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
1874
1875 DECLR0CALLBACKMEMBER(int, pfnR0BthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1876 DECLR0CALLBACKMEMBER(int, pfnR0BthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1877 DECLR0CALLBACKMEMBER(int, pfnR0BthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
1878 DECLR0CALLBACKMEMBER(int, pfnR0BthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
1879 DECLR0CALLBACKMEMBER(int, pfnR0BthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
1880 DECLR0CALLBACKMEMBER(int, pfnR0BthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
1881 DECLR0CALLBACKMEMBER(unsigned, pfnR0BthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
1882
1883 DECLGCCALLBACKMEMBER(int, pfnGCBthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1884 DECLGCCALLBACKMEMBER(int, pfnGCBthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1885 DECLGCCALLBACKMEMBER(int, pfnGCBthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
1886 DECLGCCALLBACKMEMBER(int, pfnGCBthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
1887 DECLGCCALLBACKMEMBER(int, pfnGCBthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
1888 DECLGCCALLBACKMEMBER(int, pfnGCBthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
1889 DECLGCCALLBACKMEMBER(unsigned, pfnGCBthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
1890#if GC_ARCH_BITS == 32 && HC_ARCH_BITS == 64
1891 RTGCPTR alignment2; /**< structure size alignment. */
1892#endif
1893 /** @} */
1894
1895 /** Pointer to SHW+GST mode data (function pointers).
1896 * The index into this table is made up from */
1897 R3PTRTYPE(PPGMMODEDATA) paModeData;
1898
1899 /** Pointer to the list of RAM ranges (Phys GC -> Phys HC conversion) - for R3.
1900 * This is sorted by physical address and contains no overlapping ranges. */
1901 R3PTRTYPE(PPGMRAMRANGE) pRamRangesR3;
1902 /** R0 pointer corresponding to PGM::pRamRangesR3. */
1903 R0PTRTYPE(PPGMRAMRANGE) pRamRangesR0;
1904 /** GC pointer corresponding to PGM::pRamRangesR3. */
1905 GCPTRTYPE(PPGMRAMRANGE) pRamRangesGC;
1906 /** The configured RAM size. */
1907 RTUINT cbRamSize;
1908
1909 /** Pointer to the list of ROM ranges - for R3.
1910 * This is sorted by physical address and contains no overlapping ranges. */
1911 R3PTRTYPE(PPGMROMRANGE) pRomRangesR3;
1912 /** R0 pointer corresponding to PGM::pRomRangesR3. */
1913 R0PTRTYPE(PPGMRAMRANGE) pRomRangesR0;
1914 /** GC pointer corresponding to PGM::pRomRangesR3. */
1915 GCPTRTYPE(PPGMRAMRANGE) pRomRangesGC;
1916 /** Alignment padding. */
1917 RTGCPTR GCPtrPadding2;
1918
1919 /** PGM offset based trees - HC Ptr. */
1920 R3R0PTRTYPE(PPGMTREES) pTreesHC;
1921 /** PGM offset based trees - GC Ptr. */
1922 GCPTRTYPE(PPGMTREES) pTreesGC;
1923
1924 /** Linked list of GC mappings - for GC.
1925 * The list is sorted ascending on address.
1926 */
1927 GCPTRTYPE(PPGMMAPPING) pMappingsGC;
1928 /** Linked list of GC mappings - for HC.
1929 * The list is sorted ascending on address.
1930 */
1931 R3PTRTYPE(PPGMMAPPING) pMappingsR3;
1932 /** Linked list of GC mappings - for R0.
1933 * The list is sorted ascending on address.
1934 */
1935 R0PTRTYPE(PPGMMAPPING) pMappingsR0;
1936
1937 /** If set no conflict checks are required. (boolean) */
1938 bool fMappingsFixed;
1939 /** If set, then no mappings are put into the shadow page table. (boolean) */
1940 bool fDisableMappings;
1941 /** Size of fixed mapping */
1942 uint32_t cbMappingFixed;
1943 /** Base address (GC) of fixed mapping */
1944 RTGCPTR GCPtrMappingFixed;
1945#if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32
1946 uint32_t u32Padding0; /**< alignment padding. */
1947#endif
1948
1949
1950 /** @name Intermediate Context
1951 * @{ */
1952 /** Pointer to the intermediate page directory - Normal. */
1953 R3PTRTYPE(PX86PD) pInterPD;
1954 /** Pointer to the intermedate page tables - Normal.
1955 * There are two page tables, one for the identity mapping and one for
1956 * the host context mapping (of the core code). */
1957 R3PTRTYPE(PX86PT) apInterPTs[2];
1958 /** Pointer to the intermedate page tables - PAE. */
1959 R3PTRTYPE(PX86PTPAE) apInterPaePTs[2];
1960 /** Pointer to the intermedate page directory - PAE. */
1961 R3PTRTYPE(PX86PDPAE) apInterPaePDs[4];
1962 /** Pointer to the intermedate page directory - PAE. */
1963 R3PTRTYPE(PX86PDPTR) pInterPaePDPTR;
1964 /** Pointer to the intermedate page-map level 4 - AMD64. */
1965 R3PTRTYPE(PX86PML4) pInterPaePML4;
1966 /** Pointer to the intermedate page directory - AMD64. */
1967 R3PTRTYPE(PX86PDPTR) pInterPaePDPTR64;
1968 /** The Physical Address (HC) of the intermediate Page Directory - Normal. */
1969 RTHCPHYS HCPhysInterPD;
1970 /** The Physical Address (HC) of the intermediate Page Directory Pointer Table - PAE. */
1971 RTHCPHYS HCPhysInterPaePDPTR;
1972 /** The Physical Address (HC) of the intermediate Page Map Level 4 table - AMD64. */
1973 RTHCPHYS HCPhysInterPaePML4;
1974 /** @} */
1975
1976 /** Base address of the dynamic page mapping area.
1977 * The array is MM_HYPER_DYNAMIC_SIZE bytes big.
1978 */
1979 GCPTRTYPE(uint8_t *) pbDynPageMapBaseGC;
1980 /** The index of the last entry used in the dynamic page mapping area. */
1981 RTUINT iDynPageMapLast;
1982 /** Cache containing the last entries in the dynamic page mapping area.
1983 * The cache size is covering half of the mapping area. */
1984 RTHCPHYS aHCPhysDynPageMapCache[MM_HYPER_DYNAMIC_SIZE >> (PAGE_SHIFT + 1)];
1985
1986 /** A20 gate mask.
1987 * Our current approach to A20 emulation is to let REM do it and don't bother
1988 * anywhere else. The interesting Guests will be operating with it enabled anyway.
1989 * But whould need arrise, we'll subject physical addresses to this mask. */
1990 RTGCPHYS GCPhysA20Mask;
1991 /** A20 gate state - boolean! */
1992 RTUINT fA20Enabled;
1993
1994 /** What needs syncing (PGM_SYNC_*).
1995 * This is used to queue operations for PGMSyncCR3, PGMInvalidatePage,
1996 * PGMFlushTLB, and PGMR3Load. */
1997 RTUINT fSyncFlags;
1998
1999#if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32
2000 RTUINT uPadding3; /**< alignment padding. */
2001#endif
2002 /** PGM critical section.
2003 * This protects the physical & virtual access handlers, ram ranges,
2004 * and the page flag updating (some of it anyway).
2005 */
2006 PDMCRITSECT CritSect;
2007
2008 /** Shadow Page Pool - HC Ptr. */
2009 R3R0PTRTYPE(PPGMPOOL) pPoolHC;
2010 /** Shadow Page Pool - GC Ptr. */
2011 GCPTRTYPE(PPGMPOOL) pPoolGC;
2012
2013 /** We're not in a state which permits writes to guest memory.
2014 * (Only used in strict builds.) */
2015 bool fNoMorePhysWrites;
2016
2017 /** Flush the cache on the next access. */
2018 bool fPhysCacheFlushPending;
2019/** @todo r=bird: Fix member names!*/
2020 /** PGMPhysRead cache */
2021 PGMPHYSCACHE pgmphysreadcache;
2022 /** PGMPhysWrite cache */
2023 PGMPHYSCACHE pgmphyswritecache;
2024
2025 /**
2026 * Data associated with managing the ring-3 mappings of the allocation chunks.
2027 */
2028 struct
2029 {
2030 /** The chunk tree, ordered by chunk id. */
2031 R3R0PTRTYPE(PAVLU32NODECORE) pTree;
2032 /** The chunk mapping TLB. */
2033 PGMCHUNKR3MAPTLB Tlb;
2034 /** The number of mapped chunks. */
2035 uint32_t c;
2036 /** The maximum number of mapped chunks.
2037 * @cfgm PGM/MaxRing3Chunks */
2038 uint32_t cMax;
2039 /** The chunk age tree, ordered by ageing sequence number. */
2040 R3PTRTYPE(PAVLLU32NODECORE) pAgeTree;
2041 /** The current time. */
2042 uint32_t iNow;
2043 /** Number of pgmR3PhysChunkFindUnmapCandidate calls left to the next ageing. */
2044 uint32_t AgeingCountdown;
2045 } ChunkR3Map;
2046
2047 /**
2048 * The page mapping TLB for ring-3 and (for the time being) ring-0.
2049 */
2050 PGMPAGER3MAPTLB PhysTlbHC;
2051
2052 /** @name The zero page.
2053 * @{ */
2054 /** The host physical address of the zero page. */
2055 RTHCPHYS HCPhysZeroPg;
2056 /** The ring-3 mapping of the zero page. */
2057 RTR3PTR pvZeroPgR3;
2058 /** The ring-0 mapping of the zero page. */
2059 RTR0PTR pvZeroPgR0;
2060 /** The GC mapping of the zero page. */
2061 RTGCPTR pvZeroPgGC;
2062#if GC_ARCH_BITS != 32
2063 uint32_t u32ZeroAlignment; /**< Alignment padding. */
2064#endif
2065 /** @}*/
2066
2067 /** The number of handy pages. */
2068 uint32_t cHandyPages;
2069 /**
2070 * Array of handy pages.
2071 *
2072 * This array is used in a two way communication between pgmPhysAllocPage
2073 * and GMMR0AllocateHandyPages, with PGMR3PhysAllocateHandyPages serving as
2074 * an intermediary.
2075 *
2076 * The size of this array is important, see pgmPhysEnsureHandyPage for details.
2077 * (The current size of 32 pages, means 128 KB of handy memory.)
2078 */
2079 GMMPAGEDESC aHandyPages[32];
2080
2081 /** @name Release Statistics
2082 * @{ */
2083 uint32_t cAllPages; /**< The total number of pages. (Should be Private + Shared + Zero.) */
2084 uint32_t cPrivatePages; /**< The number of private pages. */
2085 uint32_t cSharedPages; /**< The number of shared pages. */
2086 uint32_t cZeroPages; /**< The number of zero backed pages. */
2087 /** The number of times the guest has switched mode since last reset or statistics reset. */
2088 STAMCOUNTER cGuestModeChanges;
2089 /** @} */
2090
2091#ifdef VBOX_WITH_STATISTICS
2092 /** GC: Which statistic this \#PF should be attributed to. */
2093 GCPTRTYPE(PSTAMPROFILE) pStatTrap0eAttributionGC;
2094 RTGCPTR padding0;
2095 /** HC: Which statistic this \#PF should be attributed to. */
2096 R3R0PTRTYPE(PSTAMPROFILE) pStatTrap0eAttributionHC;
2097 RTHCPTR padding1;
2098 STAMPROFILE StatGCTrap0e; /**< GC: PGMGCTrap0eHandler() profiling. */
2099 STAMPROFILE StatTrap0eCSAM; /**< Profiling of the Trap0eHandler body when the cause is CSAM. */
2100 STAMPROFILE StatTrap0eDirtyAndAccessedBits; /**< Profiling of the Trap0eHandler body when the cause is dirty and/or accessed bit emulation. */
2101 STAMPROFILE StatTrap0eGuestTrap; /**< Profiling of the Trap0eHandler body when the cause is a guest trap. */
2102 STAMPROFILE StatTrap0eHndPhys; /**< Profiling of the Trap0eHandler body when the cause is a physical handler. */
2103 STAMPROFILE StatTrap0eHndVirt; /**< Profiling of the Trap0eHandler body when the cause is a virtual handler. */
2104 STAMPROFILE StatTrap0eHndUnhandled; /**< Profiling of the Trap0eHandler body when the cause is access outside the monitored areas of a monitored page. */
2105 STAMPROFILE StatTrap0eMisc; /**< Profiling of the Trap0eHandler body when the cause is not known. */
2106 STAMPROFILE StatTrap0eOutOfSync; /**< Profiling of the Trap0eHandler body when the cause is an out-of-sync page. */
2107 STAMPROFILE StatTrap0eOutOfSyncHndPhys; /**< Profiling of the Trap0eHandler body when the cause is an out-of-sync physical handler page. */
2108 STAMPROFILE StatTrap0eOutOfSyncHndVirt; /**< Profiling of the Trap0eHandler body when the cause is an out-of-sync virtual handler page. */
2109 STAMPROFILE StatTrap0eOutOfSyncObsHnd; /**< Profiling of the Trap0eHandler body when the cause is an obsolete handler page. */
2110 STAMPROFILE StatTrap0eSyncPT; /**< Profiling of the Trap0eHandler body when the cause is lazy syncing of a PT. */
2111
2112 STAMCOUNTER StatTrap0eMapHandler; /**< Number of traps due to access handlers in mappings. */
2113 STAMCOUNTER StatGCTrap0eConflicts; /**< GC: The number of times \#PF was caused by an undetected conflict. */
2114
2115 STAMCOUNTER StatGCTrap0eUSNotPresentRead;
2116 STAMCOUNTER StatGCTrap0eUSNotPresentWrite;
2117 STAMCOUNTER StatGCTrap0eUSWrite;
2118 STAMCOUNTER StatGCTrap0eUSReserved;
2119 STAMCOUNTER StatGCTrap0eUSRead;
2120
2121 STAMCOUNTER StatGCTrap0eSVNotPresentRead;
2122 STAMCOUNTER StatGCTrap0eSVNotPresentWrite;
2123 STAMCOUNTER StatGCTrap0eSVWrite;
2124 STAMCOUNTER StatGCTrap0eSVReserved;
2125
2126 STAMCOUNTER StatGCTrap0eUnhandled;
2127 STAMCOUNTER StatGCTrap0eMap;
2128
2129 /** GC: PGMSyncPT() profiling. */
2130 STAMPROFILE StatGCSyncPT;
2131 /** GC: The number of times PGMSyncPT() needed to allocate page tables. */
2132 STAMCOUNTER StatGCSyncPTAlloc;
2133 /** GC: The number of times PGMSyncPT() detected conflicts. */
2134 STAMCOUNTER StatGCSyncPTConflict;
2135 /** GC: The number of times PGMSyncPT() failed. */
2136 STAMCOUNTER StatGCSyncPTFailed;
2137 /** GC: PGMGCInvalidatePage() profiling. */
2138 STAMPROFILE StatGCInvalidatePage;
2139 /** GC: The number of times PGMGCInvalidatePage() was called for a 4KB page. */
2140 STAMCOUNTER StatGCInvalidatePage4KBPages;
2141 /** GC: The number of times PGMGCInvalidatePage() was called for a 4MB page. */
2142 STAMCOUNTER StatGCInvalidatePage4MBPages;
2143 /** GC: The number of times PGMGCInvalidatePage() skipped a 4MB page. */
2144 STAMCOUNTER StatGCInvalidatePage4MBPagesSkip;
2145 /** GC: The number of times PGMGCInvalidatePage() was called for a not accessed page directory. */
2146 STAMCOUNTER StatGCInvalidatePagePDNAs;
2147 /** GC: The number of times PGMGCInvalidatePage() was called for a not present page directory. */
2148 STAMCOUNTER StatGCInvalidatePagePDNPs;
2149 /** GC: The number of times PGMGCInvalidatePage() was called for a page directory containing mappings (no conflict). */
2150 STAMCOUNTER StatGCInvalidatePagePDMappings;
2151 /** GC: The number of times PGMGCInvalidatePage() was called for an out of sync page directory. */
2152 STAMCOUNTER StatGCInvalidatePagePDOutOfSync;
2153 /** HC: The number of times PGMGCInvalidatePage() was skipped due to not present shw or pending pending SyncCR3. */
2154 STAMCOUNTER StatGCInvalidatePageSkipped;
2155 /** GC: The number of times user page is out of sync was detected in GC. */
2156 STAMCOUNTER StatGCPageOutOfSyncUser;
2157 /** GC: The number of times supervisor page is out of sync was detected in GC. */
2158 STAMCOUNTER StatGCPageOutOfSyncSupervisor;
2159 /** GC: The number of dynamic page mapping cache hits */
2160 STAMCOUNTER StatDynMapCacheMisses;
2161 /** GC: The number of dynamic page mapping cache misses */
2162 STAMCOUNTER StatDynMapCacheHits;
2163 /** GC: The number of times pgmGCGuestPDWriteHandler() was successfully called. */
2164 STAMCOUNTER StatGCGuestCR3WriteHandled;
2165 /** GC: The number of times pgmGCGuestPDWriteHandler() was called and we had to fall back to the recompiler. */
2166 STAMCOUNTER StatGCGuestCR3WriteUnhandled;
2167 /** GC: The number of times pgmGCGuestPDWriteHandler() was called and a conflict was detected. */
2168 STAMCOUNTER StatGCGuestCR3WriteConflict;
2169 /** GC: Number of out-of-sync handled pages. */
2170 STAMCOUNTER StatHandlersOutOfSync;
2171 /** GC: Number of traps due to physical access handlers. */
2172 STAMCOUNTER StatHandlersPhysical;
2173 /** GC: Number of traps due to virtual access handlers. */
2174 STAMCOUNTER StatHandlersVirtual;
2175 /** GC: Number of traps due to virtual access handlers found by physical address. */
2176 STAMCOUNTER StatHandlersVirtualByPhys;
2177 /** GC: Number of traps due to virtual access handlers found by virtual address (without proper physical flags). */
2178 STAMCOUNTER StatHandlersVirtualUnmarked;
2179 /** GC: Number of traps due to access outside range of monitored page(s). */
2180 STAMCOUNTER StatHandlersUnhandled;
2181
2182 /** GC: The number of times pgmGCGuestROMWriteHandler() was successfully called. */
2183 STAMCOUNTER StatGCGuestROMWriteHandled;
2184 /** GC: The number of times pgmGCGuestROMWriteHandler() was called and we had to fall back to the recompiler */
2185 STAMCOUNTER StatGCGuestROMWriteUnhandled;
2186
2187 /** HC: PGMR3InvalidatePage() profiling. */
2188 STAMPROFILE StatHCInvalidatePage;
2189 /** HC: The number of times PGMR3InvalidatePage() was called for a 4KB page. */
2190 STAMCOUNTER StatHCInvalidatePage4KBPages;
2191 /** HC: The number of times PGMR3InvalidatePage() was called for a 4MB page. */
2192 STAMCOUNTER StatHCInvalidatePage4MBPages;
2193 /** HC: The number of times PGMR3InvalidatePage() skipped a 4MB page. */
2194 STAMCOUNTER StatHCInvalidatePage4MBPagesSkip;
2195 /** HC: The number of times PGMR3InvalidatePage() was called for a not accessed page directory. */
2196 STAMCOUNTER StatHCInvalidatePagePDNAs;
2197 /** HC: The number of times PGMR3InvalidatePage() was called for a not present page directory. */
2198 STAMCOUNTER StatHCInvalidatePagePDNPs;
2199 /** HC: The number of times PGMR3InvalidatePage() was called for a page directory containing mappings (no conflict). */
2200 STAMCOUNTER StatHCInvalidatePagePDMappings;
2201 /** HC: The number of times PGMGCInvalidatePage() was called for an out of sync page directory. */
2202 STAMCOUNTER StatHCInvalidatePagePDOutOfSync;
2203 /** HC: The number of times PGMR3InvalidatePage() was skipped due to not present shw or pending pending SyncCR3. */
2204 STAMCOUNTER StatHCInvalidatePageSkipped;
2205 /** HC: PGMR3SyncPT() profiling. */
2206 STAMPROFILE StatHCSyncPT;
2207 /** HC: pgmr3SyncPTResolveConflict() profiling (includes the entire relocation). */
2208 STAMPROFILE StatHCResolveConflict;
2209 /** HC: Number of times PGMR3CheckMappingConflicts() detected a conflict. */
2210 STAMCOUNTER StatHCDetectedConflicts;
2211 /** HC: The total number of times pgmHCGuestPDWriteHandler() was called. */
2212 STAMCOUNTER StatHCGuestPDWrite;
2213 /** HC: The number of times pgmHCGuestPDWriteHandler() detected a conflict */
2214 STAMCOUNTER StatHCGuestPDWriteConflict;
2215
2216 /** HC: The number of pages marked not present for accessed bit emulation. */
2217 STAMCOUNTER StatHCAccessedPage;
2218 /** HC: The number of pages marked read-only for dirty bit tracking. */
2219 STAMCOUNTER StatHCDirtyPage;
2220 /** HC: The number of pages marked read-only for dirty bit tracking. */
2221 STAMCOUNTER StatHCDirtyPageBig;
2222 /** HC: The number of traps generated for dirty bit tracking. */
2223 STAMCOUNTER StatHCDirtyPageTrap;
2224 /** HC: The number of pages already dirty or readonly. */
2225 STAMCOUNTER StatHCDirtyPageSkipped;
2226
2227 /** GC: The number of pages marked not present for accessed bit emulation. */
2228 STAMCOUNTER StatGCAccessedPage;
2229 /** GC: The number of pages marked read-only for dirty bit tracking. */
2230 STAMCOUNTER StatGCDirtyPage;
2231 /** GC: The number of pages marked read-only for dirty bit tracking. */
2232 STAMCOUNTER StatGCDirtyPageBig;
2233 /** GC: The number of traps generated for dirty bit tracking. */
2234 STAMCOUNTER StatGCDirtyPageTrap;
2235 /** GC: The number of pages already dirty or readonly. */
2236 STAMCOUNTER StatGCDirtyPageSkipped;
2237 /** GC: The number of pages marked dirty because of write accesses. */
2238 STAMCOUNTER StatGCDirtiedPage;
2239 /** GC: The number of pages already marked dirty because of write accesses. */
2240 STAMCOUNTER StatGCPageAlreadyDirty;
2241 /** GC: The number of real pages faults during dirty bit tracking. */
2242 STAMCOUNTER StatGCDirtyTrackRealPF;
2243
2244 /** GC: Profiling of the PGMTrackDirtyBit() body */
2245 STAMPROFILE StatGCDirtyBitTracking;
2246 /** HC: Profiling of the PGMTrackDirtyBit() body */
2247 STAMPROFILE StatHCDirtyBitTracking;
2248
2249 /** GC: Profiling of the PGMGstModifyPage() body */
2250 STAMPROFILE StatGCGstModifyPage;
2251 /** HC: Profiling of the PGMGstModifyPage() body */
2252 STAMPROFILE StatHCGstModifyPage;
2253
2254 /** GC: The number of time we've marked a PD not present from SyncPage to virtualize the accessed bit. */
2255 STAMCOUNTER StatGCSyncPagePDNAs;
2256 /** GC: The number of time we've encountered an out-of-sync PD in SyncPage. */
2257 STAMCOUNTER StatGCSyncPagePDOutOfSync;
2258 /** HC: The number of time we've marked a PD not present from SyncPage to virtualize the accessed bit. */
2259 STAMCOUNTER StatHCSyncPagePDNAs;
2260 /** HC: The number of time we've encountered an out-of-sync PD in SyncPage. */
2261 STAMCOUNTER StatHCSyncPagePDOutOfSync;
2262
2263 STAMCOUNTER StatSynPT4kGC;
2264 STAMCOUNTER StatSynPT4kHC;
2265 STAMCOUNTER StatSynPT4MGC;
2266 STAMCOUNTER StatSynPT4MHC;
2267
2268 /** Profiling of the PGMFlushTLB() body. */
2269 STAMPROFILE StatFlushTLB;
2270 /** The number of times PGMFlushTLB was called with a new CR3, non-global. (switch) */
2271 STAMCOUNTER StatFlushTLBNewCR3;
2272 /** The number of times PGMFlushTLB was called with a new CR3, global. (switch) */
2273 STAMCOUNTER StatFlushTLBNewCR3Global;
2274 /** The number of times PGMFlushTLB was called with the same CR3, non-global. (flush) */
2275 STAMCOUNTER StatFlushTLBSameCR3;
2276 /** The number of times PGMFlushTLB was called with the same CR3, global. (flush) */
2277 STAMCOUNTER StatFlushTLBSameCR3Global;
2278
2279 STAMPROFILE StatGCSyncCR3; /**< GC: PGMSyncCR3() profiling. */
2280 STAMPROFILE StatGCSyncCR3Handlers; /**< GC: Profiling of the PGMSyncCR3() update handler section. */
2281 STAMPROFILE StatGCSyncCR3HandlerVirtualReset; /**< GC: Profiling of the virtual handler resets. */
2282 STAMPROFILE StatGCSyncCR3HandlerVirtualUpdate; /**< GC: Profiling of the virtual handler updates. */
2283 STAMCOUNTER StatGCSyncCR3Global; /**< GC: The number of global CR3 syncs. */
2284 STAMCOUNTER StatGCSyncCR3NotGlobal; /**< GC: The number of non-global CR3 syncs. */
2285 STAMCOUNTER StatGCSyncCR3DstFreed; /**< GC: The number of times we've had to free a shadow entry. */
2286 STAMCOUNTER StatGCSyncCR3DstFreedSrcNP; /**< GC: The number of times we've had to free a shadow entry for which the source entry was not present. */
2287 STAMCOUNTER StatGCSyncCR3DstNotPresent; /**< GC: The number of times we've encountered a not present shadow entry for a present guest entry. */
2288 STAMCOUNTER StatGCSyncCR3DstSkippedGlobalPD; /**< GC: The number of times a global page directory wasn't flushed. */
2289 STAMCOUNTER StatGCSyncCR3DstSkippedGlobalPT; /**< GC: The number of times a page table with only global entries wasn't flushed. */
2290 STAMCOUNTER StatGCSyncCR3DstCacheHit; /**< GC: The number of times we got some kind of cache hit on a page table. */
2291
2292 STAMPROFILE StatHCSyncCR3; /**< HC: PGMSyncCR3() profiling. */
2293 STAMPROFILE StatHCSyncCR3Handlers; /**< HC: Profiling of the PGMSyncCR3() update handler section. */
2294 STAMPROFILE StatHCSyncCR3HandlerVirtualReset; /**< HC: Profiling of the virtual handler resets. */
2295 STAMPROFILE StatHCSyncCR3HandlerVirtualUpdate; /**< HC: Profiling of the virtual handler updates. */
2296 STAMCOUNTER StatHCSyncCR3Global; /**< HC: The number of global CR3 syncs. */
2297 STAMCOUNTER StatHCSyncCR3NotGlobal; /**< HC: The number of non-global CR3 syncs. */
2298 STAMCOUNTER StatHCSyncCR3DstFreed; /**< HC: The number of times we've had to free a shadow entry. */
2299 STAMCOUNTER StatHCSyncCR3DstFreedSrcNP; /**< HC: The number of times we've had to free a shadow entry for which the source entry was not present. */
2300 STAMCOUNTER StatHCSyncCR3DstNotPresent; /**< HC: The number of times we've encountered a not present shadow entry for a present guest entry. */
2301 STAMCOUNTER StatHCSyncCR3DstSkippedGlobalPD; /**< HC: The number of times a global page directory wasn't flushed. */
2302 STAMCOUNTER StatHCSyncCR3DstSkippedGlobalPT; /**< HC: The number of times a page table with only global entries wasn't flushed. */
2303 STAMCOUNTER StatHCSyncCR3DstCacheHit; /**< HC: The number of times we got some kind of cache hit on a page table. */
2304
2305 /** GC: Profiling of pgmHandlerVirtualFindByPhysAddr. */
2306 STAMPROFILE StatVirtHandleSearchByPhysGC;
2307 /** HC: Profiling of pgmHandlerVirtualFindByPhysAddr. */
2308 STAMPROFILE StatVirtHandleSearchByPhysHC;
2309 /** HC: The number of times PGMR3HandlerPhysicalReset is called. */
2310 STAMCOUNTER StatHandlePhysicalReset;
2311
2312 STAMPROFILE StatCheckPageFault;
2313 STAMPROFILE StatLazySyncPT;
2314 STAMPROFILE StatMapping;
2315 STAMPROFILE StatOutOfSync;
2316 STAMPROFILE StatHandlers;
2317 STAMPROFILE StatEIPHandlers;
2318 STAMPROFILE StatHCPrefetch;
2319
2320# ifdef PGMPOOL_WITH_GCPHYS_TRACKING
2321 /** The number of first time shadowings. */
2322 STAMCOUNTER StatTrackVirgin;
2323 /** The number of times switching to cRef2, i.e. the page is being shadowed by two PTs. */
2324 STAMCOUNTER StatTrackAliased;
2325 /** The number of times we're tracking using cRef2. */
2326 STAMCOUNTER StatTrackAliasedMany;
2327 /** The number of times we're hitting pages which has overflowed cRef2. */
2328 STAMCOUNTER StatTrackAliasedLots;
2329 /** The number of times the extent list grows to long. */
2330 STAMCOUNTER StatTrackOverflows;
2331 /** Profiling of SyncPageWorkerTrackDeref (expensive). */
2332 STAMPROFILE StatTrackDeref;
2333# endif
2334
2335 /** Ring-3/0 page mapper TLB hits. */
2336 STAMCOUNTER StatPageHCMapTlbHits;
2337 /** Ring-3/0 page mapper TLB misses. */
2338 STAMCOUNTER StatPageHCMapTlbMisses;
2339 /** Ring-3/0 chunk mapper TLB hits. */
2340 STAMCOUNTER StatChunkR3MapTlbHits;
2341 /** Ring-3/0 chunk mapper TLB misses. */
2342 STAMCOUNTER StatChunkR3MapTlbMisses;
2343 /** Times a shared page has been replaced by a private one. */
2344 STAMCOUNTER StatPageReplaceShared;
2345 /** Times the zero page has been replaced by a private one. */
2346 STAMCOUNTER StatPageReplaceZero;
2347 /** The number of times we've executed GMMR3AllocateHandyPages. */
2348 STAMCOUNTER StatPageHandyAllocs;
2349
2350 /** Allocated mbs of guest ram */
2351 STAMCOUNTER StatDynRamTotal;
2352 /** Nr of pgmr3PhysGrowRange calls. */
2353 STAMCOUNTER StatDynRamGrow;
2354
2355 STAMCOUNTER StatGCTrap0ePD[X86_PG_ENTRIES];
2356 STAMCOUNTER StatGCSyncPtPD[X86_PG_ENTRIES];
2357 STAMCOUNTER StatGCSyncPagePD[X86_PG_ENTRIES];
2358#endif
2359} PGM, *PPGM;
2360
2361
2362/** @name PGM::fSyncFlags Flags
2363 * @{
2364 */
2365/** Updates the MM_RAM_FLAGS_VIRTUAL_HANDLER page bit. */
2366#define PGM_SYNC_UPDATE_PAGE_BIT_VIRTUAL RT_BIT(0)
2367/** Always sync CR3. */
2368#define PGM_SYNC_ALWAYS RT_BIT(1)
2369/** Check monitoring on next CR3 (re)load and invalidate page. */
2370#define PGM_SYNC_MONITOR_CR3 RT_BIT(2)
2371/** Clear the page pool (a light weight flush). */
2372#define PGM_SYNC_CLEAR_PGM_POOL RT_BIT(8)
2373/** @} */
2374
2375
2376__BEGIN_DECLS
2377
2378PGMGCDECL(int) pgmGCGuestPDWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, void *pvFault, RTGCPHYS GCPhysFault, void *pvUser);
2379PGMDECL(int) pgmPhysRomWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, void *pvFault, RTGCPHYS GCPhysFault, void *pvUser);
2380PGMGCDECL(int) pgmCachePTWriteGC(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser);
2381int pgmR3SyncPTResolveConflict(PVM pVM, PPGMMAPPING pMapping, PVBOXPD pPDSrc, int iPDOld);
2382PPGMMAPPING pgmGetMapping(PVM pVM, RTGCPTR GCPtr);
2383void pgmR3MapRelocate(PVM pVM, PPGMMAPPING pMapping, int iPDOld, int iPDNew);
2384int pgmR3ChangeMode(PVM pVM, PGMMODE enmGuestMode);
2385int pgmLock(PVM pVM);
2386void pgmUnlock(PVM pVM);
2387
2388void pgmR3HandlerPhysicalUpdateAll(PVM pVM);
2389int pgmHandlerVirtualFindByPhysAddr(PVM pVM, RTGCPHYS GCPhys, PPGMVIRTHANDLER *ppVirt, unsigned *piPage);
2390DECLCALLBACK(int) pgmHandlerVirtualResetOne(PAVLROGCPTRNODECORE pNode, void *pvUser);
2391#ifdef VBOX_STRICT
2392void pgmHandlerVirtualDumpPhysPages(PVM pVM);
2393#else
2394# define pgmHandlerVirtualDumpPhysPages(a) do { } while (0)
2395#endif
2396DECLCALLBACK(void) pgmR3InfoHandlers(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
2397
2398
2399int pgmPhysPageLoadIntoTlb(PPGM pPGM, RTGCPHYS GCPhys);
2400int pgmPhysPageMakeWritable(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys);
2401int pgmPhysPageMap(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys, PPPGMPAGEMAP ppMap, void **ppv);
2402#ifdef IN_RING3
2403int pgmR3PhysChunkMap(PVM pVM, uint32_t idChunk, PPPGMCHUNKR3MAP ppChunk);
2404int pgmR3PhysRomReset(PVM pVM);
2405#ifndef VBOX_WITH_NEW_PHYS_CODE
2406int pgmr3PhysGrowRange(PVM pVM, RTGCPHYS GCPhys);
2407#endif
2408
2409int pgmR3PoolInit(PVM pVM);
2410void pgmR3PoolRelocate(PVM pVM);
2411void pgmR3PoolReset(PVM pVM);
2412
2413#endif /* IN_RING3 */
2414#ifdef IN_GC
2415void *pgmGCPoolMapPage(PVM pVM, PPGMPOOLPAGE pPage);
2416#endif
2417int pgmPoolAlloc(PVM pVM, RTGCPHYS GCPhys, PGMPOOLKIND enmKind, uint16_t iUser, uint16_t iUserTable, PPPGMPOOLPAGE ppPage);
2418PPGMPOOLPAGE pgmPoolGetPageByHCPhys(PVM pVM, RTHCPHYS HCPhys);
2419void pgmPoolFree(PVM pVM, RTHCPHYS HCPhys, uint16_t iUser, uint16_t iUserTable);
2420void pgmPoolFreeByPage(PPGMPOOL pPool, PPGMPOOLPAGE pPage, uint16_t iUser, uint16_t iUserTable);
2421int pgmPoolFlushPage(PPGMPOOL pPool, PPGMPOOLPAGE pPage);
2422void pgmPoolFlushAll(PVM pVM);
2423void pgmPoolClearAll(PVM pVM);
2424void pgmPoolTrackFlushGCPhysPT(PVM pVM, PPGMPAGE pPhysPage, uint16_t iShw, uint16_t cRefs);
2425void pgmPoolTrackFlushGCPhysPTs(PVM pVM, PPGMPAGE pPhysPage, uint16_t iPhysExt);
2426int pgmPoolTrackFlushGCPhysPTsSlow(PVM pVM, PPGMPAGE pPhysPage);
2427PPGMPOOLPHYSEXT pgmPoolTrackPhysExtAlloc(PVM pVM, uint16_t *piPhysExt);
2428void pgmPoolTrackPhysExtFree(PVM pVM, uint16_t iPhysExt);
2429void pgmPoolTrackPhysExtFreeList(PVM pVM, uint16_t iPhysExt);
2430uint16_t pgmPoolTrackPhysExtAddref(PVM pVM, uint16_t u16, uint16_t iShwPT);
2431void pgmPoolTrackPhysExtDerefGCPhys(PPGMPOOL pPool, PPGMPOOLPAGE pPoolPage, PPGMPAGE pPhysPage);
2432#ifdef PGMPOOL_WITH_MONITORING
2433# ifdef IN_RING3
2434void pgmPoolMonitorChainChanging(PPGMPOOL pPool, PPGMPOOLPAGE pPage, RTGCPHYS GCPhysFault, RTHCPTR pvAddress, PDISCPUSTATE pCpu);
2435# else
2436void pgmPoolMonitorChainChanging(PPGMPOOL pPool, PPGMPOOLPAGE pPage, RTGCPHYS GCPhysFault, RTGCPTR pvAddress, PDISCPUSTATE pCpu);
2437# endif
2438int pgmPoolMonitorChainFlush(PPGMPOOL pPool, PPGMPOOLPAGE pPage);
2439void pgmPoolMonitorModifiedInsert(PPGMPOOL pPool, PPGMPOOLPAGE pPage);
2440void pgmPoolMonitorModifiedClearAll(PVM pVM);
2441int pgmPoolMonitorMonitorCR3(PPGMPOOL pPool, uint16_t idxRoot, RTGCPHYS GCPhysCR3);
2442int pgmPoolMonitorUnmonitorCR3(PPGMPOOL pPool, uint16_t idxRoot);
2443#endif
2444
2445__END_DECLS
2446
2447
2448/**
2449 * Gets the PGMPAGE structure for a guest page.
2450 *
2451 * @returns Pointer to the page on success.
2452 * @returns NULL on a VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS condition.
2453 *
2454 * @param pPGM PGM handle.
2455 * @param GCPhys The GC physical address.
2456 */
2457DECLINLINE(PPGMPAGE) pgmPhysGetPage(PPGM pPGM, RTGCPHYS GCPhys)
2458{
2459 /*
2460 * Optimize for the first range.
2461 */
2462 PPGMRAMRANGE pRam = CTXALLSUFF(pPGM->pRamRanges);
2463 RTGCPHYS off = GCPhys - pRam->GCPhys;
2464 if (RT_UNLIKELY(off >= pRam->cb))
2465 {
2466 do
2467 {
2468 pRam = CTXALLSUFF(pRam->pNext);
2469 if (RT_UNLIKELY(!pRam))
2470 return NULL;
2471 off = GCPhys - pRam->GCPhys;
2472 } while (off >= pRam->cb);
2473 }
2474 return &pRam->aPages[off >> PAGE_SHIFT];
2475}
2476
2477
2478/**
2479 * Gets the PGMPAGE structure for a guest page.
2480 *
2481 * Old Phys code: Will make sure the page is present.
2482 *
2483 * @returns VBox status code.
2484 * @retval VINF_SUCCESS and a valid *ppPage on success.
2485 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if the address isn't valid.
2486 *
2487 * @param pPGM PGM handle.
2488 * @param GCPhys The GC physical address.
2489 * @param ppPage Where to store the page poitner on success.
2490 */
2491DECLINLINE(int) pgmPhysGetPageEx(PPGM pPGM, RTGCPHYS GCPhys, PPPGMPAGE ppPage)
2492{
2493 /*
2494 * Optimize for the first range.
2495 */
2496 PPGMRAMRANGE pRam = CTXALLSUFF(pPGM->pRamRanges);
2497 RTGCPHYS off = GCPhys - pRam->GCPhys;
2498 if (RT_UNLIKELY(off >= pRam->cb))
2499 {
2500 do
2501 {
2502 pRam = CTXALLSUFF(pRam->pNext);
2503 if (RT_UNLIKELY(!pRam))
2504 {
2505 *ppPage = NULL; /* avoid incorrect and very annoying GCC warnings */
2506 return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2507 }
2508 off = GCPhys - pRam->GCPhys;
2509 } while (off >= pRam->cb);
2510 }
2511 *ppPage = &pRam->aPages[off >> PAGE_SHIFT];
2512#ifndef VBOX_WITH_NEW_PHYS_CODE
2513
2514 /*
2515 * Make sure it's present.
2516 */
2517 if (RT_UNLIKELY( !PGM_PAGE_GET_HCPHYS(*ppPage)
2518 && (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)))
2519 {
2520#ifdef IN_RING3
2521 int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
2522#else
2523 int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2524#endif
2525 if (VBOX_FAILURE(rc))
2526 {
2527 *ppPage = NULL; /* avoid incorrect and very annoying GCC warnings */
2528 return rc;
2529 }
2530 Assert(rc == VINF_SUCCESS);
2531 }
2532#endif
2533 return VINF_SUCCESS;
2534}
2535
2536
2537
2538
2539/**
2540 * Gets the PGMPAGE structure for a guest page.
2541 *
2542 * Old Phys code: Will make sure the page is present.
2543 *
2544 * @returns VBox status code.
2545 * @retval VINF_SUCCESS and a valid *ppPage on success.
2546 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if the address isn't valid.
2547 *
2548 * @param pPGM PGM handle.
2549 * @param GCPhys The GC physical address.
2550 * @param ppPage Where to store the page poitner on success.
2551 * @param ppRamHint Where to read and store the ram list hint.
2552 * The caller initializes this to NULL before the call.
2553 */
2554DECLINLINE(int) pgmPhysGetPageWithHintEx(PPGM pPGM, RTGCPHYS GCPhys, PPPGMPAGE ppPage, PPGMRAMRANGE *ppRamHint)
2555{
2556 RTGCPHYS off;
2557 PPGMRAMRANGE pRam = *ppRamHint;
2558 if ( !pRam
2559 || RT_UNLIKELY((off = GCPhys - pRam->GCPhys) >= pRam->cb))
2560 {
2561 pRam = CTXALLSUFF(pPGM->pRamRanges);
2562 off = GCPhys - pRam->GCPhys;
2563 if (RT_UNLIKELY(off >= pRam->cb))
2564 {
2565 do
2566 {
2567 pRam = CTXALLSUFF(pRam->pNext);
2568 if (RT_UNLIKELY(!pRam))
2569 {
2570 *ppPage = NULL; /* Kill the incorrect and extremely annoying GCC warnings. */
2571 return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2572 }
2573 off = GCPhys - pRam->GCPhys;
2574 } while (off >= pRam->cb);
2575 }
2576 *ppRamHint = pRam;
2577 }
2578 *ppPage = &pRam->aPages[off >> PAGE_SHIFT];
2579#ifndef VBOX_WITH_NEW_PHYS_CODE
2580
2581 /*
2582 * Make sure it's present.
2583 */
2584 if (RT_UNLIKELY( !PGM_PAGE_GET_HCPHYS(*ppPage)
2585 && (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)))
2586 {
2587#ifdef IN_RING3
2588 int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
2589#else
2590 int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2591#endif
2592 if (VBOX_FAILURE(rc))
2593 {
2594 *ppPage = NULL; /* Shut up annoying smart ass. */
2595 return rc;
2596 }
2597 Assert(rc == VINF_SUCCESS);
2598 }
2599#endif
2600 return VINF_SUCCESS;
2601}
2602
2603
2604/**
2605 * Gets the PGMPAGE structure for a guest page together with the PGMRAMRANGE.
2606 *
2607 * @returns Pointer to the page on success.
2608 * @returns NULL on a VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS condition.
2609 *
2610 * @param pPGM PGM handle.
2611 * @param GCPhys The GC physical address.
2612 * @param ppRam Where to store the pointer to the PGMRAMRANGE.
2613 */
2614DECLINLINE(PPGMPAGE) pgmPhysGetPageAndRange(PPGM pPGM, RTGCPHYS GCPhys, PPGMRAMRANGE *ppRam)
2615{
2616 /*
2617 * Optimize for the first range.
2618 */
2619 PPGMRAMRANGE pRam = CTXALLSUFF(pPGM->pRamRanges);
2620 RTGCPHYS off = GCPhys - pRam->GCPhys;
2621 if (RT_UNLIKELY(off >= pRam->cb))
2622 {
2623 do
2624 {
2625 pRam = CTXALLSUFF(pRam->pNext);
2626 if (RT_UNLIKELY(!pRam))
2627 return NULL;
2628 off = GCPhys - pRam->GCPhys;
2629 } while (off >= pRam->cb);
2630 }
2631 *ppRam = pRam;
2632 return &pRam->aPages[off >> PAGE_SHIFT];
2633}
2634
2635
2636
2637
2638/**
2639 * Gets the PGMPAGE structure for a guest page together with the PGMRAMRANGE.
2640 *
2641 * @returns Pointer to the page on success.
2642 * @returns NULL on a VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS condition.
2643 *
2644 * @param pPGM PGM handle.
2645 * @param GCPhys The GC physical address.
2646 * @param ppPage Where to store the pointer to the PGMPAGE structure.
2647 * @param ppRam Where to store the pointer to the PGMRAMRANGE structure.
2648 */
2649DECLINLINE(int) pgmPhysGetPageAndRangeEx(PPGM pPGM, RTGCPHYS GCPhys, PPPGMPAGE ppPage, PPGMRAMRANGE *ppRam)
2650{
2651 /*
2652 * Optimize for the first range.
2653 */
2654 PPGMRAMRANGE pRam = CTXALLSUFF(pPGM->pRamRanges);
2655 RTGCPHYS off = GCPhys - pRam->GCPhys;
2656 if (RT_UNLIKELY(off >= pRam->cb))
2657 {
2658 do
2659 {
2660 pRam = CTXALLSUFF(pRam->pNext);
2661 if (RT_UNLIKELY(!pRam))
2662 {
2663 *ppRam = NULL; /* Shut up silly GCC warnings. */
2664 *ppPage = NULL; /* ditto */
2665 return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2666 }
2667 off = GCPhys - pRam->GCPhys;
2668 } while (off >= pRam->cb);
2669 }
2670 *ppRam = pRam;
2671 *ppPage = &pRam->aPages[off >> PAGE_SHIFT];
2672#ifndef VBOX_WITH_NEW_PHYS_CODE
2673
2674 /*
2675 * Make sure it's present.
2676 */
2677 if (RT_UNLIKELY( !PGM_PAGE_GET_HCPHYS(*ppPage)
2678 && (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)))
2679 {
2680#ifdef IN_RING3
2681 int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
2682#else
2683 int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2684#endif
2685 if (VBOX_FAILURE(rc))
2686 {
2687 *ppPage = NULL; /* Shut up silly GCC warnings. */
2688 *ppPage = NULL; /* ditto */
2689 return rc;
2690 }
2691 Assert(rc == VINF_SUCCESS);
2692
2693 }
2694#endif
2695 return VINF_SUCCESS;
2696}
2697
2698
2699/**
2700 * Convert GC Phys to HC Phys.
2701 *
2702 * @returns VBox status.
2703 * @param pPGM PGM handle.
2704 * @param GCPhys The GC physical address.
2705 * @param pHCPhys Where to store the corresponding HC physical address.
2706 *
2707 * @deprecated Doesn't deal with zero, shared or write monitored pages.
2708 * Avoid when writing new code!
2709 */
2710DECLINLINE(int) pgmRamGCPhys2HCPhys(PPGM pPGM, RTGCPHYS GCPhys, PRTHCPHYS pHCPhys)
2711{
2712 PPGMPAGE pPage;
2713 int rc = pgmPhysGetPageEx(pPGM, GCPhys, &pPage);
2714 if (VBOX_FAILURE(rc))
2715 return rc;
2716 *pHCPhys = PGM_PAGE_GET_HCPHYS(pPage) | (GCPhys & PAGE_OFFSET_MASK);
2717 return VINF_SUCCESS;
2718}
2719
2720
2721#ifndef IN_GC
2722/**
2723 * Queries the Physical TLB entry for a physical guest page,
2724 * attemting to load the TLB entry if necessary.
2725 *
2726 * @returns VBox status code.
2727 * @retval VINF_SUCCESS on success
2728 * @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2729 * @param pPGM The PGM instance handle.
2730 * @param GCPhys The address of the guest page.
2731 * @param ppTlbe Where to store the pointer to the TLB entry.
2732 */
2733
2734DECLINLINE(int) pgmPhysPageQueryTlbe(PPGM pPGM, RTGCPHYS GCPhys, PPPGMPAGEMAPTLBE ppTlbe)
2735{
2736 int rc;
2737 PPGMPAGEMAPTLBE pTlbe = &pPGM->CTXSUFF(PhysTlb).aEntries[PGM_PAGEMAPTLB_IDX(GCPhys)];
2738 if (pTlbe->GCPhys == (GCPhys & X86_PTE_PAE_PG_MASK))
2739 {
2740 STAM_COUNTER_INC(&pPGM->CTXMID(StatPage,MapTlbHits));
2741 rc = VINF_SUCCESS;
2742 }
2743 else
2744 rc = pgmPhysPageLoadIntoTlb(pPGM, GCPhys);
2745 *ppTlbe = pTlbe;
2746 return rc;
2747}
2748#endif /* !IN_GC */
2749
2750
2751#ifndef VBOX_WITH_NEW_PHYS_CODE
2752/**
2753 * Convert GC Phys to HC Virt.
2754 *
2755 * @returns VBox status.
2756 * @param pPGM PGM handle.
2757 * @param GCPhys The GC physical address.
2758 * @param pHCPtr Where to store the corresponding HC virtual address.
2759 *
2760 * @deprecated This will be eliminated by PGMPhysGCPhys2CCPtr.
2761 */
2762DECLINLINE(int) pgmRamGCPhys2HCPtr(PPGM pPGM, RTGCPHYS GCPhys, PRTHCPTR pHCPtr)
2763{
2764 PPGMRAMRANGE pRam;
2765 PPGMPAGE pPage;
2766 int rc = pgmPhysGetPageAndRangeEx(pPGM, GCPhys, &pPage, &pRam);
2767 if (VBOX_FAILURE(rc))
2768 {
2769 *pHCPtr = 0; /* Shut up silly GCC warnings. */
2770 return rc;
2771 }
2772 RTGCPHYS off = GCPhys - pRam->GCPhys;
2773
2774 if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)
2775 {
2776 unsigned iChunk = off >> PGM_DYNAMIC_CHUNK_SHIFT;
2777 *pHCPtr = (RTHCPTR)((RTHCUINTPTR)CTXSUFF(pRam->pavHCChunk)[iChunk] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));
2778 return VINF_SUCCESS;
2779 }
2780 if (pRam->pvHC)
2781 {
2782 *pHCPtr = (RTHCPTR)((RTHCUINTPTR)pRam->pvHC + off);
2783 return VINF_SUCCESS;
2784 }
2785 *pHCPtr = 0; /* Shut up silly GCC warnings. */
2786 return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2787}
2788#endif /* !VBOX_WITH_NEW_PHYS_CODE */
2789
2790
2791/**
2792 * Convert GC Phys to HC Virt.
2793 *
2794 * @returns VBox status.
2795 * @param PVM VM handle.
2796 * @param pRam Ram range
2797 * @param GCPhys The GC physical address.
2798 * @param pHCPtr Where to store the corresponding HC virtual address.
2799 *
2800 * @deprecated This will be eliminated. Don't use it.
2801 */
2802DECLINLINE(int) pgmRamGCPhys2HCPtrWithRange(PVM pVM, PPGMRAMRANGE pRam, RTGCPHYS GCPhys, PRTHCPTR pHCPtr)
2803{
2804 RTGCPHYS off = GCPhys - pRam->GCPhys;
2805 Assert(off < pRam->cb);
2806
2807 if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)
2808 {
2809 unsigned idx = (off >> PGM_DYNAMIC_CHUNK_SHIFT);
2810 /* Physical chunk in dynamically allocated range not present? */
2811 if (RT_UNLIKELY(!CTXSUFF(pRam->pavHCChunk)[idx]))
2812 {
2813#ifdef IN_RING3
2814 int rc = pgmr3PhysGrowRange(pVM, GCPhys);
2815#else
2816 int rc = CTXALLMID(VMM, CallHost)(pVM, VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2817#endif
2818 if (rc != VINF_SUCCESS)
2819 {
2820 *pHCPtr = 0; /* GCC crap */
2821 return rc;
2822 }
2823 }
2824 *pHCPtr = (RTHCPTR)((RTHCUINTPTR)CTXSUFF(pRam->pavHCChunk)[idx] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));
2825 return VINF_SUCCESS;
2826 }
2827 if (pRam->pvHC)
2828 {
2829 *pHCPtr = (RTHCPTR)((RTHCUINTPTR)pRam->pvHC + off);
2830 return VINF_SUCCESS;
2831 }
2832 *pHCPtr = 0; /* GCC crap */
2833 return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2834}
2835
2836
2837/**
2838 * Convert GC Phys to HC Virt and HC Phys.
2839 *
2840 * @returns VBox status.
2841 * @param pPGM PGM handle.
2842 * @param GCPhys The GC physical address.
2843 * @param pHCPtr Where to store the corresponding HC virtual address.
2844 * @param pHCPhys Where to store the HC Physical address and its flags.
2845 *
2846 * @deprecated Will go away or be changed. Only user is MapCR3. MapCR3 will have to do ring-3
2847 * and ring-0 locking of the CR3 in a lazy fashion I'm fear... or perhaps not. we'll see.
2848 */
2849DECLINLINE(int) pgmRamGCPhys2HCPtrAndHCPhysWithFlags(PPGM pPGM, RTGCPHYS GCPhys, PRTHCPTR pHCPtr, PRTHCPHYS pHCPhys)
2850{
2851 PPGMRAMRANGE pRam;
2852 PPGMPAGE pPage;
2853 int rc = pgmPhysGetPageAndRangeEx(pPGM, GCPhys, &pPage, &pRam);
2854 if (VBOX_FAILURE(rc))
2855 {
2856 *pHCPtr = 0; /* Shut up crappy GCC warnings */
2857 *pHCPhys = 0; /* ditto */
2858 return rc;
2859 }
2860 RTGCPHYS off = GCPhys - pRam->GCPhys;
2861
2862 *pHCPhys = pPage->HCPhys; /** @todo PAGE FLAGS */
2863 if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)
2864 {
2865 unsigned idx = (off >> PGM_DYNAMIC_CHUNK_SHIFT);
2866 *pHCPtr = (RTHCPTR)((RTHCUINTPTR)CTXSUFF(pRam->pavHCChunk)[idx] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));
2867 return VINF_SUCCESS;
2868 }
2869 if (pRam->pvHC)
2870 {
2871 *pHCPtr = (RTHCPTR)((RTHCUINTPTR)pRam->pvHC + off);
2872 return VINF_SUCCESS;
2873 }
2874 *pHCPtr = 0;
2875 return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2876}
2877
2878
2879/**
2880 * Clears flags associated with a RAM address.
2881 *
2882 * @returns VBox status code.
2883 * @param pPGM PGM handle.
2884 * @param GCPhys Guest context physical address.
2885 * @param fFlags fFlags to clear. (Bits 0-11.)
2886 */
2887DECLINLINE(int) pgmRamFlagsClearByGCPhys(PPGM pPGM, RTGCPHYS GCPhys, unsigned fFlags)
2888{
2889 PPGMPAGE pPage;
2890 int rc = pgmPhysGetPageEx(pPGM, GCPhys, &pPage);
2891 if (VBOX_FAILURE(rc))
2892 return rc;
2893
2894 fFlags &= ~X86_PTE_PAE_PG_MASK;
2895 pPage->HCPhys &= ~(RTHCPHYS)fFlags; /** @todo PAGE FLAGS */
2896 return VINF_SUCCESS;
2897}
2898
2899
2900/**
2901 * Clears flags associated with a RAM address.
2902 *
2903 * @returns VBox status code.
2904 * @param pPGM PGM handle.
2905 * @param GCPhys Guest context physical address.
2906 * @param fFlags fFlags to clear. (Bits 0-11.)
2907 * @param ppRamHint Where to read and store the ram list hint.
2908 * The caller initializes this to NULL before the call.
2909 */
2910DECLINLINE(int) pgmRamFlagsClearByGCPhysWithHint(PPGM pPGM, RTGCPHYS GCPhys, unsigned fFlags, PPGMRAMRANGE *ppRamHint)
2911{
2912 PPGMPAGE pPage;
2913 int rc = pgmPhysGetPageWithHintEx(pPGM, GCPhys, &pPage, ppRamHint);
2914 if (VBOX_FAILURE(rc))
2915 return rc;
2916
2917 fFlags &= ~X86_PTE_PAE_PG_MASK;
2918 pPage->HCPhys &= ~(RTHCPHYS)fFlags; /** @todo PAGE FLAGS */
2919 return VINF_SUCCESS;
2920}
2921
2922/**
2923 * Sets (bitwise OR) flags associated with a RAM address.
2924 *
2925 * @returns VBox status code.
2926 * @param pPGM PGM handle.
2927 * @param GCPhys Guest context physical address.
2928 * @param fFlags fFlags to set clear. (Bits 0-11.)
2929 */
2930DECLINLINE(int) pgmRamFlagsSetByGCPhys(PPGM pPGM, RTGCPHYS GCPhys, unsigned fFlags)
2931{
2932 PPGMPAGE pPage;
2933 int rc = pgmPhysGetPageEx(pPGM, GCPhys, &pPage);
2934 if (VBOX_FAILURE(rc))
2935 return rc;
2936
2937 fFlags &= ~X86_PTE_PAE_PG_MASK;
2938 pPage->HCPhys |= fFlags; /** @todo PAGE FLAGS */
2939 return VINF_SUCCESS;
2940}
2941
2942
2943/**
2944 * Sets (bitwise OR) flags associated with a RAM address.
2945 *
2946 * @returns VBox status code.
2947 * @param pPGM PGM handle.
2948 * @param GCPhys Guest context physical address.
2949 * @param fFlags fFlags to set clear. (Bits 0-11.)
2950 * @param ppRamHint Where to read and store the ram list hint.
2951 * The caller initializes this to NULL before the call.
2952 */
2953DECLINLINE(int) pgmRamFlagsSetByGCPhysWithHint(PPGM pPGM, RTGCPHYS GCPhys, unsigned fFlags, PPGMRAMRANGE *ppRamHint)
2954{
2955 PPGMPAGE pPage;
2956 int rc = pgmPhysGetPageWithHintEx(pPGM, GCPhys, &pPage, ppRamHint);
2957 if (VBOX_FAILURE(rc))
2958 return rc;
2959
2960 fFlags &= ~X86_PTE_PAE_PG_MASK;
2961 pPage->HCPhys |= fFlags; /** @todo PAGE FLAGS */
2962 return VINF_SUCCESS;
2963}
2964
2965
2966/**
2967 * Gets the page directory for the specified address.
2968 *
2969 * @returns Pointer to the page directory in question.
2970 * @returns NULL if the page directory is not present or on an invalid page.
2971 * @param pPGM Pointer to the PGM instance data.
2972 * @param GCPtr The address.
2973 */
2974DECLINLINE(PX86PDPAE) pgmGstGetPaePD(PPGM pPGM, RTGCUINTPTR GCPtr)
2975{
2976 const unsigned iPdPtr = GCPtr >> X86_PDPTR_SHIFT;
2977 if (CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].n.u1Present)
2978 {
2979 if ((CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK) == pPGM->aGCPhysGstPaePDs[iPdPtr])
2980 return CTXSUFF(pPGM->apGstPaePDs)[iPdPtr];
2981
2982 /* cache is out-of-sync. */
2983 PX86PDPAE pPD;
2984 int rc = PGM_GCPHYS_2_PTR(PGM2VM(pPGM), CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK, &pPD);
2985 if (VBOX_SUCCESS(rc))
2986 return pPD;
2987 AssertMsgFailed(("Impossible! rc=%d PDPE=%#llx\n", rc, CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u));
2988 /* returning NIL_RTGCPHYS is ok if we assume it's just an invalid page of some kind emulated as all 0s. */
2989 }
2990 return NULL;
2991}
2992
2993
2994/**
2995 * Gets the page directory entry for the specified address.
2996 *
2997 * @returns Pointer to the page directory entry in question.
2998 * @returns NULL if the page directory is not present or on an invalid page.
2999 * @param pPGM Pointer to the PGM instance data.
3000 * @param GCPtr The address.
3001 */
3002DECLINLINE(PX86PDEPAE) pgmGstGetPaePDEPtr(PPGM pPGM, RTGCUINTPTR GCPtr)
3003{
3004 const unsigned iPdPtr = GCPtr >> X86_PDPTR_SHIFT;
3005 if (CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].n.u1Present)
3006 {
3007 const unsigned iPD = (GCPtr >> X86_PD_PAE_SHIFT) & X86_PD_PAE_MASK;
3008 if ((CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK) == pPGM->aGCPhysGstPaePDs[iPdPtr])
3009 return &CTXSUFF(pPGM->apGstPaePDs)[iPdPtr]->a[iPD];
3010
3011 /* The cache is out-of-sync. */
3012 PX86PDPAE pPD;
3013 int rc = PGM_GCPHYS_2_PTR(PGM2VM(pPGM), CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK, &pPD);
3014 if (VBOX_SUCCESS(rc))
3015 return &pPD->a[iPD];
3016 AssertMsgFailed(("Impossible! rc=%Vrc PDPE=%RX64\n", rc, CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u));
3017 /* returning NIL_RTGCPHYS is ok if we assume it's just an invalid page or something which we'll emulate as all 0s. */
3018 }
3019 return NULL;
3020}
3021
3022
3023/**
3024 * Gets the page directory entry for the specified address.
3025 *
3026 * @returns The page directory entry in question.
3027 * @returns A non-present entry if the page directory is not present or on an invalid page.
3028 * @param pPGM Pointer to the PGM instance data.
3029 * @param GCPtr The address.
3030 */
3031DECLINLINE(uint64_t) pgmGstGetPaePDE(PPGM pPGM, RTGCUINTPTR GCPtr)
3032{
3033 const unsigned iPdPtr = GCPtr >> X86_PDPTR_SHIFT;
3034 if (CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].n.u1Present)
3035 {
3036 const unsigned iPD = (GCPtr >> X86_PD_PAE_SHIFT) & X86_PD_PAE_MASK;
3037 if ((CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK) == pPGM->aGCPhysGstPaePDs[iPdPtr])
3038 return CTXSUFF(pPGM->apGstPaePDs)[iPdPtr]->a[iPD].u;
3039
3040 /* cache is out-of-sync. */
3041 PX86PDPAE pPD;
3042 int rc = PGM_GCPHYS_2_PTR(PGM2VM(pPGM), CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK, &pPD);
3043 if (VBOX_SUCCESS(rc))
3044 return pPD->a[iPD].u;
3045 AssertMsgFailed(("Impossible! rc=%d PDPE=%#llx\n", rc, CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u));
3046 }
3047 return 0;
3048}
3049
3050
3051/**
3052 * Gets the page directory for the specified address and returns the index into the page directory
3053 *
3054 * @returns Pointer to the page directory in question.
3055 * @returns NULL if the page directory is not present or on an invalid page.
3056 * @param pPGM Pointer to the PGM instance data.
3057 * @param GCPtr The address.
3058 * @param piPD Receives the index into the returned page directory
3059 */
3060DECLINLINE(PX86PDPAE) pgmGstGetPaePDPtr(PPGM pPGM, RTGCUINTPTR GCPtr, unsigned *piPD)
3061{
3062 const unsigned iPdPtr = GCPtr >> X86_PDPTR_SHIFT;
3063 if (CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].n.u1Present)
3064 {
3065 const unsigned iPD = (GCPtr >> X86_PD_PAE_SHIFT) & X86_PD_PAE_MASK;
3066 if ((CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK) == pPGM->aGCPhysGstPaePDs[iPdPtr])
3067 {
3068 *piPD = iPD;
3069 return CTXSUFF(pPGM->apGstPaePDs)[iPdPtr];
3070 }
3071
3072 /* cache is out-of-sync. */
3073 PX86PDPAE pPD;
3074 int rc = PGM_GCPHYS_2_PTR(PGM2VM(pPGM), CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK, &pPD);
3075 if (VBOX_SUCCESS(rc))
3076 {
3077 *piPD = iPD;
3078 return pPD;
3079 }
3080 AssertMsgFailed(("Impossible! rc=%d PDPE=%#llx\n", rc, CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u));
3081 /* returning NIL_RTGCPHYS is ok if we assume it's just an invalid page of some kind emulated as all 0s. */
3082 }
3083 return NULL;
3084}
3085
3086
3087/**
3088 * Checks if any of the specified page flags are set for the given page.
3089 *
3090 * @returns true if any of the flags are set.
3091 * @returns false if all the flags are clear.
3092 * @param pPGM PGM handle.
3093 * @param GCPhys The GC physical address.
3094 * @param fFlags The flags to check for.
3095 */
3096DECLINLINE(bool) pgmRamTestFlags(PPGM pPGM, RTGCPHYS GCPhys, uint64_t fFlags)
3097{
3098 PPGMPAGE pPage = pgmPhysGetPage(pPGM, GCPhys);
3099 return pPage
3100 && (pPage->HCPhys & fFlags) != 0; /** @todo PAGE FLAGS */
3101}
3102
3103
3104/**
3105 * Gets the ram flags for a handler.
3106 *
3107 * @returns The ram flags.
3108 * @param pCur The physical handler in question.
3109 */
3110DECLINLINE(unsigned) pgmHandlerPhysicalCalcFlags(PPGMPHYSHANDLER pCur)
3111{
3112 switch (pCur->enmType)
3113 {
3114 case PGMPHYSHANDLERTYPE_PHYSICAL_WRITE:
3115 return MM_RAM_FLAGS_PHYSICAL_HANDLER | MM_RAM_FLAGS_PHYSICAL_WRITE;
3116
3117 case PGMPHYSHANDLERTYPE_MMIO:
3118 case PGMPHYSHANDLERTYPE_PHYSICAL_ALL:
3119 return MM_RAM_FLAGS_PHYSICAL_HANDLER | MM_RAM_FLAGS_PHYSICAL_ALL;
3120
3121 default:
3122 AssertFatalMsgFailed(("Invalid type %d\n", pCur->enmType));
3123 }
3124}
3125
3126
3127/**
3128 * Clears one physical page of a virtual handler
3129 *
3130 * @param pPGM Pointer to the PGM instance.
3131 * @param pCur Virtual handler structure
3132 * @param iPage Physical page index
3133 */
3134DECLINLINE(void) pgmHandlerVirtualClearPage(PPGM pPGM, PPGMVIRTHANDLER pCur, unsigned iPage)
3135{
3136 const PPGMPHYS2VIRTHANDLER pPhys2Virt = &pCur->aPhysToVirt[iPage];
3137
3138 /*
3139 * Remove the node from the tree (it's supposed to be in the tree if we get here!).
3140 */
3141#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
3142 AssertReleaseMsg(pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_IN_TREE,
3143 ("pPhys2Virt=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32}\n",
3144 pPhys2Virt, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler, pPhys2Virt->offNextAlias));
3145#endif
3146 if (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_IS_HEAD)
3147 {
3148 /* We're the head of the alias chain. */
3149 PPGMPHYS2VIRTHANDLER pRemove = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysRemove(&pPGM->CTXSUFF(pTrees)->PhysToVirtHandlers, pPhys2Virt->Core.Key); NOREF(pRemove);
3150#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
3151 AssertReleaseMsg(pRemove != NULL,
3152 ("pPhys2Virt=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32}\n",
3153 pPhys2Virt, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler, pPhys2Virt->offNextAlias));
3154 AssertReleaseMsg(pRemove == pPhys2Virt,
3155 ("wanted: pPhys2Virt=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32}\n"
3156 " got: pRemove=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32}\n",
3157 pPhys2Virt, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler, pPhys2Virt->offNextAlias,
3158 pRemove, pRemove->Core.Key, pRemove->Core.KeyLast, pRemove->offVirtHandler, pRemove->offNextAlias));
3159#endif
3160 if (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK)
3161 {
3162 /* Insert the next list in the alias chain into the tree. */
3163 PPGMPHYS2VIRTHANDLER pNext = (PPGMPHYS2VIRTHANDLER)((intptr_t)pPhys2Virt + (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK));
3164#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
3165 AssertReleaseMsg(pNext->offNextAlias & PGMPHYS2VIRTHANDLER_IN_TREE,
3166 ("pNext=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32}\n",
3167 pNext, pNext->Core.Key, pNext->Core.KeyLast, pNext->offVirtHandler, pNext->offNextAlias));
3168#endif
3169 pNext->offNextAlias |= PGMPHYS2VIRTHANDLER_IS_HEAD;
3170 bool fRc = RTAvlroGCPhysInsert(&pPGM->CTXSUFF(pTrees)->PhysToVirtHandlers, &pNext->Core);
3171 AssertRelease(fRc);
3172 }
3173 }
3174 else
3175 {
3176 /* Locate the previous node in the alias chain. */
3177 PPGMPHYS2VIRTHANDLER pPrev = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysGet(&pPGM->CTXSUFF(pTrees)->PhysToVirtHandlers, pPhys2Virt->Core.Key);
3178#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
3179 AssertReleaseMsg(pPrev != pPhys2Virt,
3180 ("pPhys2Virt=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32} pPrev=%p\n",
3181 pPhys2Virt, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler, pPhys2Virt->offNextAlias, pPrev));
3182#endif
3183 for (;;)
3184 {
3185 PPGMPHYS2VIRTHANDLER pNext = (PPGMPHYS2VIRTHANDLER)((intptr_t)pPrev + (pPrev->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK));
3186 if (pNext == pPhys2Virt)
3187 {
3188 /* unlink. */
3189 LogFlow(("pgmHandlerVirtualClearPage: removed %p:{.offNextAlias=%#RX32} from alias chain. prev %p:{.offNextAlias=%#RX32} [%VGp-%VGp]\n",
3190 pPhys2Virt, pPhys2Virt->offNextAlias, pPrev, pPrev->offNextAlias, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast));
3191 if (!(pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK))
3192 pPrev->offNextAlias &= ~PGMPHYS2VIRTHANDLER_OFF_MASK;
3193 else
3194 {
3195 PPGMPHYS2VIRTHANDLER pNewNext = (PPGMPHYS2VIRTHANDLER)((intptr_t)pPhys2Virt + (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK));
3196 pPrev->offNextAlias = ((intptr_t)pNewNext - (intptr_t)pPrev)
3197 | (pPrev->offNextAlias & ~PGMPHYS2VIRTHANDLER_OFF_MASK);
3198 }
3199 break;
3200 }
3201
3202 /* next */
3203 if (pNext == pPrev)
3204 {
3205#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
3206 AssertReleaseMsg(pNext != pPrev,
3207 ("pPhys2Virt=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32} pPrev=%p\n",
3208 pPhys2Virt, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler, pPhys2Virt->offNextAlias, pPrev));
3209#endif
3210 break;
3211 }
3212 pPrev = pNext;
3213 }
3214 }
3215 Log2(("PHYS2VIRT: Removing %VGp-%VGp %#RX32 %s\n",
3216 pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offNextAlias, HCSTRING(pCur->pszDesc)));
3217 pPhys2Virt->offNextAlias = 0;
3218 pPhys2Virt->Core.KeyLast = NIL_RTGCPHYS; /* require reinsert */
3219
3220 /*
3221 * Clear the ram flags for this page.
3222 */
3223 int rc = pgmRamFlagsClearByGCPhys(pPGM, pPhys2Virt->Core.Key,
3224 MM_RAM_FLAGS_VIRTUAL_HANDLER | MM_RAM_FLAGS_VIRTUAL_ALL | MM_RAM_FLAGS_VIRTUAL_WRITE);
3225 AssertRC(rc);
3226}
3227
3228
3229/**
3230 * Internal worker for finding a 'in-use' shadow page give by it's physical address.
3231 *
3232 * @returns Pointer to the shadow page structure.
3233 * @param pPool The pool.
3234 * @param HCPhys The HC physical address of the shadow page.
3235 */
3236DECLINLINE(PPGMPOOLPAGE) pgmPoolGetPage(PPGMPOOL pPool, RTHCPHYS HCPhys)
3237{
3238 /*
3239 * Look up the page.
3240 */
3241 PPGMPOOLPAGE pPage = (PPGMPOOLPAGE)RTAvloHCPhysGet(&pPool->HCPhysTree, HCPhys & X86_PTE_PAE_PG_MASK);
3242 AssertFatalMsg(pPage && pPage->enmKind != PGMPOOLKIND_FREE, ("HCPhys=%VHp pPage=%p type=%d\n", HCPhys, pPage, (pPage) ? pPage->enmKind : 0));
3243 return pPage;
3244}
3245
3246
3247/**
3248 * Internal worker for finding a 'in-use' shadow page give by it's physical address.
3249 *
3250 * @returns Pointer to the shadow page structure.
3251 * @param pPool The pool.
3252 * @param idx The pool page index.
3253 */
3254DECLINLINE(PPGMPOOLPAGE) pgmPoolGetPageByIdx(PPGMPOOL pPool, unsigned idx)
3255{
3256 AssertFatalMsg(idx >= PGMPOOL_IDX_FIRST && idx < pPool->cCurPages, ("idx=%d\n", idx));
3257 return &pPool->aPages[idx];
3258}
3259
3260
3261#ifdef PGMPOOL_WITH_GCPHYS_TRACKING
3262/**
3263 * Clear references to guest physical memory.
3264 *
3265 * @param pPool The pool.
3266 * @param pPoolPage The pool page.
3267 * @param pPhysPage The physical guest page tracking structure.
3268 */
3269DECLINLINE(void) pgmTrackDerefGCPhys(PPGMPOOL pPool, PPGMPOOLPAGE pPoolPage, PPGMPAGE pPhysPage)
3270{
3271 /*
3272 * Just deal with the simple case here.
3273 */
3274#ifdef LOG_ENABLED
3275 const RTHCPHYS HCPhysOrg = pPhysPage->HCPhys; /** @todo PAGE FLAGS */
3276#endif
3277 const unsigned cRefs = pPhysPage->HCPhys >> MM_RAM_FLAGS_CREFS_SHIFT; /** @todo PAGE FLAGS */
3278 if (cRefs == 1)
3279 {
3280 Assert(pPoolPage->idx == ((pPhysPage->HCPhys >> MM_RAM_FLAGS_IDX_SHIFT) & MM_RAM_FLAGS_IDX_MASK));
3281 pPhysPage->HCPhys = pPhysPage->HCPhys & MM_RAM_FLAGS_NO_REFS_MASK;
3282 }
3283 else
3284 pgmPoolTrackPhysExtDerefGCPhys(pPool, pPoolPage, pPhysPage);
3285 LogFlow(("pgmTrackDerefGCPhys: HCPhys=%RHp -> %RHp\n", HCPhysOrg, pPhysPage->HCPhys));
3286}
3287#endif
3288
3289
3290#ifdef PGMPOOL_WITH_CACHE
3291/**
3292 * Moves the page to the head of the age list.
3293 *
3294 * This is done when the cached page is used in one way or another.
3295 *
3296 * @param pPool The pool.
3297 * @param pPage The cached page.
3298 * @todo inline in PGMInternal.h!
3299 */
3300DECLINLINE(void) pgmPoolCacheUsed(PPGMPOOL pPool, PPGMPOOLPAGE pPage)
3301{
3302 /*
3303 * Move to the head of the age list.
3304 */
3305 if (pPage->iAgePrev != NIL_PGMPOOL_IDX)
3306 {
3307 /* unlink */
3308 pPool->aPages[pPage->iAgePrev].iAgeNext = pPage->iAgeNext;
3309 if (pPage->iAgeNext != NIL_PGMPOOL_IDX)
3310 pPool->aPages[pPage->iAgeNext].iAgePrev = pPage->iAgePrev;
3311 else
3312 pPool->iAgeTail = pPage->iAgePrev;
3313
3314 /* insert at head */
3315 pPage->iAgePrev = NIL_PGMPOOL_IDX;
3316 pPage->iAgeNext = pPool->iAgeHead;
3317 Assert(pPage->iAgeNext != NIL_PGMPOOL_IDX); /* we would've already been head then */
3318 pPool->iAgeHead = pPage->idx;
3319 pPool->aPages[pPage->iAgeNext].iAgePrev = pPage->idx;
3320 }
3321}
3322#endif /* PGMPOOL_WITH_CACHE */
3323
3324/**
3325 * Tells if mappings are to be put into the shadow page table or not
3326 *
3327 * @returns boolean result
3328 * @param pVM VM handle.
3329 */
3330
3331DECLINLINE(bool) pgmMapAreMappingsEnabled(PPGM pPGM)
3332{
3333 return !pPGM->fDisableMappings;
3334}
3335
3336/** @} */
3337
3338#endif
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