PGMInternal.h@ 552

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1	/* $Id: PGMInternal.h 457 2007-01-31 01:18:59Z vboxsync $ */
2	/** @file
3	* PGM - Internal header file.
4	*/
5
6	/*
7	* Copyright (C) 2006 InnoTek Systemberatung GmbH
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License as published by the Free Software Foundation,
13	* in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
14	* distribution. VirtualBox OSE is distributed in the hope that it will
15	* be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* If you received this file as part of a commercial VirtualBox
18	* distribution, then only the terms of your commercial VirtualBox
19	* license agreement apply instead of the previous paragraph.
20	*/
21
22	#ifndef __PGMInternal_h__
23	#define __PGMInternal_h__
24
25	#include <VBox/cdefs.h>
26	#include <VBox/types.h>
27	#include <VBox/err.h>
28	#include <VBox/stam.h>
29	#include <VBox/param.h>
30	#include <VBox/vmm.h>
31	#include <VBox/mm.h>
32	#include <VBox/pdm.h>
33	#include <iprt/avl.h>
34	#include <iprt/assert.h>
35	#include <iprt/critsect.h>
36
37	#if !defined(IN_PGM_R3) && !defined(IN_PGM_R0) && !defined(IN_PGM_GC)
38	# error "Not in PGM! This is an internal header!"
39	#endif
40
41
42	/** @defgroup grp_pgm_int Internals
43	* @ingroup grp_pgm
44	* @internal
45	* @{
46	*/
47
48
49	/** @name PGM Compile Time Config
50	* @{
51	*/
52
53	/**
54	* Solve page is out of sync issues inside Guest Context (in PGMGC.cpp).
55	* Comment it if it will break something.
56	*/
57	#define PGM_OUT_OF_SYNC_IN_GC
58
59	/**
60	* Virtualize the dirty bit
61	* This also makes a half-hearted attempt at the accessed bit. For full
62	* accessed bit virtualization define PGM_SYNC_ACCESSED_BIT.
63	*/
64	#define PGM_SYNC_DIRTY_BIT
65
66	/**
67	* Fully virtualize the accessed bit.
68	* @remark This requires SYNC_DIRTY_ACCESSED_BITS to be defined!
69	*/
70	#define PGM_SYNC_ACCESSED_BIT
71
72	/**
73	* Check and skip global PDEs for non-global flushes
74	*/
75	#define PGM_SKIP_GLOBAL_PAGEDIRS_ON_NONGLOBAL_FLUSH
76
77	/**
78	* Sync N pages instead of a whole page table
79	*/
80	#define PGM_SYNC_N_PAGES
81
82	/**
83	* Number of pages to sync during a page fault
84	*
85	* When PGMPOOL_WITH_GCPHYS_TRACKING is enabled using high values here
86	* causes a lot of unnecessary extents and also is slower than taking more \#PFs.
87	*/
88	#define PGM_SYNC_NR_PAGES 8
89
90	/**
91	* Number of PGMPhysRead/Write cache entries (must be <= sizeof(uint64_t))
92	*/
93	#define PGM_MAX_PHYSCACHE_ENTRIES 64
94	#define PGM_MAX_PHYSCACHE_ENTRIES_MASK (PGM_MAX_PHYSCACHE_ENTRIES-1)
95
96	/**
97	* Enable caching of PGMR3PhysRead/WriteByte/Word/Dword
98	*/
99	#define PGM_PHYSMEMACCESS_CACHING
100
101	/*
102	* Assert Sanity.
103	*/
104	#if defined(PGM_SYNC_ACCESSED_BIT) && !defined(PGM_SYNC_DIRTY_BIT)
105	# error "PGM_SYNC_ACCESSED_BIT requires PGM_SYNC_DIRTY_BIT!"
106	#endif
107
108	/** @def PGMPOOL_WITH_CACHE
109	* Enable agressive caching using the page pool.
110	*
111	* This requires PGMPOOL_WITH_USER_TRACKING and PGMPOOL_WITH_MONITORING.
112	*/
113	#define PGMPOOL_WITH_CACHE
114
115	/** @def PGMPOOL_WITH_MIXED_PT_CR3
116	* When defined, we'll deal with 'uncachable' pages.
117	*/
118	#ifdef PGMPOOL_WITH_CACHE
119	# define PGMPOOL_WITH_MIXED_PT_CR3
120	#endif
121
122	/** @def PGMPOOL_WITH_MONITORING
123	* Monitor the guest pages which are shadowed.
124	* When this is enabled, PGMPOOL_WITH_CACHE or PGMPOOL_WITH_GCPHYS_TRACKING must
125	* be enabled as well.
126	* @remark doesn't really work without caching now. (Mixed PT/CR3 change.)
127	*/
128	#ifdef PGMPOOL_WITH_CACHE
129	# define PGMPOOL_WITH_MONITORING
130	#endif
131
132	/** @def PGMPOOL_WITH_GCPHYS_TRACKING
133	* Tracking the of shadow pages mapping guest physical pages.
134	*
135	* This is very expensive, the current cache prototype is trying to figure out
136	* whether it will be acceptable with an agressive caching policy.
137	*/
138	#if defined(PGMPOOL_WITH_CACHE) \|\| defined(PGMPOOL_WITH_MONITORING)
139	# define PGMPOOL_WITH_GCPHYS_TRACKING
140	#endif
141
142	/** @def PGMPOOL_WITH_USER_TRACKING
143	* Tracking users of shadow pages. This is required for the linking of shadow page
144	* tables and physical guest addresses.
145	*/
146	#if defined(PGMPOOL_WITH_GCPHYS_TRACKING) \|\| defined(PGMPOOL_WITH_CACHE) \|\| defined(PGMPOOL_WITH_MONITORING)
147	# define PGMPOOL_WITH_USER_TRACKING
148	#endif
149
150	/** @def PGMPOOL_CFG_MAX_GROW
151	* The maximum number of pages to add to the pool in one go.
152	*/
153	#define PGMPOOL_CFG_MAX_GROW (_256K >> PAGE_SHIFT)
154
155	/** @def VBOX_STRICT_PGM_HANDLER_VIRTUAL
156	* Enables some extra assertions for virtual handlers (mainly phys2virt related).
157	*/
158	#ifdef VBOX_STRICT
159	# define VBOX_STRICT_PGM_HANDLER_VIRTUAL
160	#endif
161	/** @} */
162
163
164	/** @name PDPTR and PML4 flags.
165	* These are placed in the three bits available for system programs in
166	* the PDPTR and PML4 entries.
167	* @{ */
168	/** The entry is a permanent one and it's must always be present.
169	* Never free such an entry. */
170	#define PGM_PLXFLAGS_PERMANENT BIT64(10)
171	/** @} */
172
173	/** @name Page directory flags.
174	* These are placed in the three bits available for system programs in
175	* the page directory entries.
176	* @{ */
177	/** Mapping (hypervisor allocated pagetable). */
178	#define PGM_PDFLAGS_MAPPING BIT64(10)
179	/** Made read-only to facilitate dirty bit tracking. */
180	#define PGM_PDFLAGS_TRACK_DIRTY BIT64(11)
181	/** @} */
182
183	/** @name Page flags.
184	* These are placed in the three bits available for system programs in
185	* the page entries.
186	* @{ */
187	/** Made read-only to facilitate dirty bit tracking. */
188	#define PGM_PTFLAGS_TRACK_DIRTY BIT64(9)
189
190	#ifndef PGM_PTFLAGS_CSAM_VALIDATED
191	/** Scanned and approved by CSAM (tm).
192	* NOTE: Must be identical to the one defined in CSAMInternal.h!!
193	* @todo Move PGM_PTFLAGS_* and PGM_PDFLAGS_* to VBox/pgm.h. */
194	#define PGM_PTFLAGS_CSAM_VALIDATED BIT64(11)
195	#endif
196	/** @} */
197
198	/** @name Defines used to indicate the shadow and guest paging in the templates.
199	* @{ */
200	#define PGM_TYPE_REAL 1
201	#define PGM_TYPE_PROT 2
202	#define PGM_TYPE_32BIT 3
203	#define PGM_TYPE_PAE 4
204	#define PGM_TYPE_AMD64 5
205	/** @} */
206
207	/** @def PGM_HCPHYS_2_PTR
208	* Maps a HC physical page pool address to a virtual address.
209	*
210	* @returns VBox status code.
211	* @param pVM The VM handle.
212	* @param HCPhys The HC physical address to map to a virtual one.
213	* @param ppv Where to store the virtual address. No need to cast this.
214	*
215	* @remark In GC this uses PGMGCDynMapHCPage(), so it will consume of the
216	* small page window employeed by that function. Be careful.
217	* @remark There is no need to assert on the result.
218	*/
219	#ifdef IN_GC
220	# define PGM_HCPHYS_2_PTR(pVM, HCPhys, ppv) PGMGCDynMapHCPage(pVM, HCPhys, (void **)(ppv))
221	#else
222	# define PGM_HCPHYS_2_PTR(pVM, HCPhys, ppv) MMPagePhys2PageEx(pVM, HCPhys, (void **)(ppv))
223	#endif
224
225	/** @def PGM_GCPHYS_2_PTR
226	* Maps a GC physical page address to a virtual address.
227	*
228	* @returns VBox status code.
229	* @param pVM The VM handle.
230	* @param GCPhys The GC physical address to map to a virtual one.
231	* @param ppv Where to store the virtual address. No need to cast this.
232	*
233	* @remark In GC this uses PGMGCDynMapGCPage(), so it will consume of the
234	* small page window employeed by that function. Be careful.
235	* @remark There is no need to assert on the result.
236	*/
237	#ifdef IN_GC
238	# define PGM_GCPHYS_2_PTR(pVM, GCPhys, ppv) PGMGCDynMapGCPage(pVM, GCPhys, (void **)(ppv))
239	#else
240	# define PGM_GCPHYS_2_PTR(pVM, GCPhys, ppv) PGMPhysGCPhys2HCPtr(pVM, GCPhys, (void )(ppv)) / @todo this isn't asserting, use PGMRamGCPhys2HCPtr! */
241	#endif
242
243	/** @def PGM_GCPHYS_2_PTR_EX
244	* Maps a unaligned GC physical page address to a virtual address.
245	*
246	* @returns VBox status code.
247	* @param pVM The VM handle.
248	* @param GCPhys The GC physical address to map to a virtual one.
249	* @param ppv Where to store the virtual address. No need to cast this.
250	*
251	* @remark In GC this uses PGMGCDynMapGCPage(), so it will consume of the
252	* small page window employeed by that function. Be careful.
253	* @remark There is no need to assert on the result.
254	*/
255	#ifdef IN_GC
256	# define PGM_GCPHYS_2_PTR_EX(pVM, GCPhys, ppv) PGMGCDynMapGCPageEx(pVM, GCPhys, (void **)(ppv))
257	#else
258	# define PGM_GCPHYS_2_PTR_EX(pVM, GCPhys, ppv) PGMPhysGCPhys2HCPtr(pVM, GCPhys, (void )(ppv)) / @todo this isn't asserting, use PGMRamGCPhys2HCPtr! */
259	#endif
260
261	/** @def PGM_INVL_PG
262	* Invalidates a page when in GC does nothing in HC.
263	*
264	* @param GCVirt The virtual address of the page to invalidate.
265	*/
266	#ifdef IN_GC
267	# define PGM_INVL_PG(GCVirt) ASMInvalidatePage((void *)(GCVirt))
268	#else
269	# define PGM_INVL_PG(GCVirt) ((void)0)
270	#endif
271
272	/** @def PGM_INVL_BIG_PG
273	* Invalidates a 4MB page directory entry when in GC does nothing in HC.
274	*
275	* @param GCVirt The virtual address within the page directory to invalidate.
276	*/
277	#ifdef IN_GC
278	# define PGM_INVL_BIG_PG(GCVirt) ASMReloadCR3()
279	#else
280	# define PGM_INVL_BIG_PG(GCVirt) ((void)0)
281	#endif
282
283	/** @def PGM_INVL_GUEST_TLBS()
284	* Invalidates all guest TLBs.
285	*/
286	#ifdef IN_GC
287	# define PGM_INVL_GUEST_TLBS() ASMReloadCR3()
288	#else
289	# define PGM_INVL_GUEST_TLBS() ((void)0)
290	#endif
291
292
293	/**
294	* Structure for tracking GC Mappings.
295	*
296	* This structure is used by linked list in both GC and HC.
297	*/
298	typedef struct PGMMAPPING
299	{
300	/** Pointer to next entry. */
301	HCPTRTYPE(struct PGMMAPPING *) pNextHC;
302	/** Pointer to next entry. */
303	GCPTRTYPE(struct PGMMAPPING *) pNextGC;
304	/** Start Virtual address. */
305	RTGCUINTPTR GCPtr;
306	/** Last Virtual address (inclusive). */
307	RTGCUINTPTR GCPtrLast;
308	/** Range size (bytes). */
309	RTGCUINTPTR cb;
310	/** Pointer to relocation callback function. */
311	HCPTRTYPE(PFNPGMRELOCATE) pfnRelocate;
312	/** User argument to the callback. */
313	HCPTRTYPE(void *) pvUser;
314	/** Mapping description / name. For easing debugging. */
315	HCPTRTYPE(const char *) pszDesc;
316	/** Number of page tables. */
317	RTUINT cPTs;
318	#if HC_ARCH_BITS != GC_ARCH_BITS
319	RTUINT uPadding0; /*< Alignment padding. /
320	#endif
321	/** Array of page table mapping data. Each entry
322	* describes one page table. The array can be longer
323	* than the declared length.
324	*/
325	struct
326	{
327	/** The HC physical address of the page table. */
328	RTHCPHYS HCPhysPT;
329	/** The HC physical address of the first PAE page table. */
330	RTHCPHYS HCPhysPaePT0;
331	/** The HC physical address of the second PAE page table. */
332	RTHCPHYS HCPhysPaePT1;
333	/** The HC virtual address of the 32-bit page table. */
334	HCPTRTYPE(PVBOXPT) pPTHC;
335	/** The HC virtual address of the two PAE page table. (i.e 1024 entries instead of 512) */
336	HCPTRTYPE(PX86PTPAE) paPaePTsHC;
337	/** The GC virtual address of the 32-bit page table. */
338	GCPTRTYPE(PVBOXPT) pPTGC;
339	/** The GC virtual address of the two PAE page table. */
340	GCPTRTYPE(PX86PTPAE) paPaePTsGC;
341	} aPTs[1];
342	} PGMMAPPING;
343	/** Pointer to structure for tracking GC Mappings. */
344	typedef struct PGMMAPPING *PPGMMAPPING;
345
346
347	/**
348	* Physical page access handler structure.
349	*
350	* This is used to keep track of physical address ranges
351	* which are being monitored in some kind of way.
352	*/
353	typedef struct PGMPHYSHANDLER
354	{
355	AVLROGCPHYSNODECORE Core;
356	/** Alignment padding. */
357	uint32_t u32Padding;
358	/** Access type. */
359	PGMPHYSHANDLERTYPE enmType;
360	/** Number of pages to update. */
361	uint32_t cPages;
362	/** Pointer to R3 callback function. */
363	HCPTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3;
364	/** User argument for R3 handlers. */
365	HCPTRTYPE(void *) pvUserR3;
366	/** Pointer to R0 callback function. */
367	R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0;
368	/** User argument for R0 handlers. */
369	HCPTRTYPE(void *) pvUserR0;
370	/** Pointer to GC callback function. */
371	GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnHandlerGC;
372	/** User argument for GC handlers. */
373	GCPTRTYPE(void *) pvUserGC;
374	/** Description / Name. For easing debugging. */
375	HCPTRTYPE(const char *) pszDesc;
376	#ifdef VBOX_WITH_STATISTICS
377	/** Profiling of this handler. */
378	STAMPROFILE Stat;
379	#endif
380	} PGMPHYSHANDLER;
381	/** Pointer to a physical page access handler structure. */
382	typedef PGMPHYSHANDLER *PPGMPHYSHANDLER;
383
384
385	/**
386	* Cache node for the physical addresses covered by a virtual handler.
387	*/
388	typedef struct PGMPHYS2VIRTHANDLER
389	{
390	/** Core node for the tree based on physical ranges. */
391	AVLROGCPHYSNODECORE Core;
392	/** Offset from this struct to the PGMVIRTHANDLER structure. */
393	RTGCINTPTR offVirtHandler;
394	/** Offset of the next alias relativer to this one.
395	* Bit 0 is used for indicating whether we're in the tree.
396	* Bit 1 is used for indicating that we're the head node.
397	*/
398	int32_t offNextAlias;
399	} PGMPHYS2VIRTHANDLER;
400	/** Pointer to a phys to virtual handler structure. */
401	typedef PGMPHYS2VIRTHANDLER *PPGMPHYS2VIRTHANDLER;
402
403	/** The bit in PGMPHYS2VIRTHANDLER::offNextAlias used to indicate that the
404	* node is in the tree. */
405	#define PGMPHYS2VIRTHANDLER_IN_TREE BIT(0)
406	/** The bit in PGMPHYS2VIRTHANDLER::offNextAlias used to indicate that the
407	* node is in the head of an alias chain.
408	* The PGMPHYS2VIRTHANDLER_IN_TREE is always set if this bit is set. */
409	#define PGMPHYS2VIRTHANDLER_IS_HEAD BIT(1)
410	/** The mask to apply to PGMPHYS2VIRTHANDLER::offNextAlias to get the offset. */
411	#define PGMPHYS2VIRTHANDLER_OFF_MASK (~(int32_t)3)
412
413
414	/**
415	* Virtual page access handler structure.
416	*
417	* This is used to keep track of virtual address ranges
418	* which are being monitored in some kind of way.
419	*/
420	typedef struct PGMVIRTHANDLER
421	{
422	/** Core node for the tree based on virtual ranges. */
423	AVLROGCPTRNODECORE Core;
424	/** Number of cache pages. */
425	uint32_t u32Padding;
426	/** Access type. */
427	PGMVIRTHANDLERTYPE enmType;
428	/** Number of cache pages. */
429	uint32_t cPages;
430
431	/** @todo The next two members are redundant. It adds some readability though. */
432	/** Start of the range. */
433	RTGCPTR GCPtr;
434	/** End of the range (exclusive). */
435	RTGCPTR GCPtrLast;
436	/** Size of the range (in bytes). */
437	RTGCUINTPTR cb;
438	/** Pointer to the GC callback function. */
439	GCPTRTYPE(PFNPGMGCVIRTHANDLER) pfnHandlerGC;
440	/** Pointer to the HC callback function for invalidation. */
441	HCPTRTYPE(PFNPGMHCVIRTINVALIDATE) pfnInvalidateHC;
442	/** Pointer to the HC callback function. */
443	HCPTRTYPE(PFNPGMHCVIRTHANDLER) pfnHandlerHC;
444	/** Description / Name. For easing debugging. */
445	HCPTRTYPE(const char *) pszDesc;
446	#ifdef VBOX_WITH_STATISTICS
447	/** Profiling of this handler. */
448	STAMPROFILE Stat;
449	#endif
450	/** Array of cached physical addresses for the monitored ranged. */
451	PGMPHYS2VIRTHANDLER aPhysToVirt[HC_ARCH_BITS == 32 ? 1 : 2];
452	} PGMVIRTHANDLER;
453	/** Pointer to a virtual page access handler structure. */
454	typedef PGMVIRTHANDLER *PPGMVIRTHANDLER;
455
456
457	/**
458	* Ram range for GC Phys to HC Phys conversion.
459	*
460	* Can be used for HC Virt to GC Phys and HC Virt to HC Phys
461	* conversions too, but we'll let MM handle that for now.
462	*
463	* This structure is used by linked lists in both GC and HC.
464	*/
465	typedef struct PGMRAMRANGE
466	{
467	/** Pointer to the next RAM range - for HC. */
468	HCPTRTYPE(struct PGMRAMRANGE *) pNextHC;
469	/** Pointer to the next RAM range - for GC. */
470	GCPTRTYPE(struct PGMRAMRANGE *) pNextGC;
471	/** Start of the range. Page aligned. */
472	RTGCPHYS GCPhys;
473	/** Last address in the range (inclusive). Page aligned (-1). */
474	RTGCPHYS GCPhysLast;
475	/** Size of the range. (Page aligned of course). */
476	RTGCPHYS cb;
477	/** MM_RAM_* flags */
478	uint32_t fFlags;
479
480	/** HC virtual lookup ranges for chunks. Currently only used with MM_RAM_FLAGS_DYNAMIC_ALLOC ranges. */
481	GCPTRTYPE(void **) pavHCChunkGC;
482	/** HC virtual lookup ranges for chunks. Currently only used with MM_RAM_FLAGS_DYNAMIC_ALLOC ranges. */
483	HCPTRTYPE(void **) pavHCChunkHC;
484
485	/** Start of the HC mapping of the range.
486	* For pure MMIO and dynamically allocated ranges this is NULL, while for all ranges this is a valid pointer. */
487	HCPTRTYPE(void *) pvHC;
488
489	/** Array of the flags and HC physical addresses corresponding to the range.
490	* The index is the page number in the range. The size is cb >> PAGE_SHIFT.
491	*
492	* The 12 lower bits of the physical address are flags and must be masked
493	* off to get the correct physical address.
494	*
495	* For pure MMIO ranges only the flags are valid.
496	*/
497	RTHCPHYS aHCPhys[1];
498	} PGMRAMRANGE;
499	/** Pointer to Ram range for GC Phys to HC Phys conversion. */
500	typedef PGMRAMRANGE *PPGMRAMRANGE;
501
502	/** Return hc ptr corresponding to the ram range and physical offset */
503	#define PGMRAMRANGE_GETHCPTR(pRam, off) \
504	(pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC) ? (RTHCPTR)((RTHCUINTPTR)CTXSUFF(pRam->pavHCChunk)[(off >> PGM_DYNAMIC_CHUNK_SHIFT)] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK)) \
505	: (RTHCPTR)((RTHCUINTPTR)pRam->pvHC + off);
506
507	/** @todo r=bird: fix typename. */
508	/**
509	* PGMPhysRead/Write cache entry
510	*/
511	typedef struct PGMPHYSCACHE_ENTRY
512	{
513	/** HC pointer to physical page */
514	HCPTRTYPE(uint8_t *) pbHC;
515	/** GC Physical address for cache entry */
516	RTGCPHYS GCPhys;
517	#if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32
518	RTGCPHYS u32Padding0; /*< alignment padding. /
519	#endif
520	} PGMPHYSCACHE_ENTRY;
521
522	/**
523	* PGMPhysRead/Write cache to reduce REM memory access overhead
524	*/
525	typedef struct PGMPHYSCACHE
526	{
527	/** Bitmap of valid cache entries */
528	uint64_t aEntries;
529	/** Cache entries */
530	PGMPHYSCACHE_ENTRY Entry[PGM_MAX_PHYSCACHE_ENTRIES];
531	} PGMPHYSCACHE;
532
533
534	/** @name PGM Pool Indexes.
535	* Aka. the unique shadow page identifier.
536	* @{ */
537	/** NIL page pool IDX. */
538	#define NIL_PGMPOOL_IDX 0
539	/** The first normal index. */
540	#define PGMPOOL_IDX_FIRST_SPECIAL 1
541	/** Page directory (32-bit root). */
542	#define PGMPOOL_IDX_PD 1
543	/** The extended PAE page directory (2048 entries, works as root currently). */
544	#define PGMPOOL_IDX_PAE_PD 2
545	/** Page Directory Pointer Table (PAE root, not currently used). */
546	#define PGMPOOL_IDX_PDPTR 3
547	/** Page Map Level-4 (64-bit root). */
548	#define PGMPOOL_IDX_PML4 4
549	/** The first normal index. */
550	#define PGMPOOL_IDX_FIRST 5
551	/** The last valid index. (inclusive, 14 bits) */
552	#define PGMPOOL_IDX_LAST 0x3fff
553	/** @} */
554
555	/** The NIL index for the parent chain. */
556	#define NIL_PGMPOOL_USER_INDEX ((uint16_t)0xffff)
557
558	/**
559	* Node in the chain linking a shadowed page to it's parent (user).
560	*/
561	#pragma pack(1)
562	typedef struct PGMPOOLUSER
563	{
564	/** The index to the next item in the chain. NIL_PGMPOOL_USER_INDEX is no next. */
565	uint16_t iNext;
566	/** The user page index. */
567	uint16_t iUser;
568	/** Index into the user table. */
569	uint16_t iUserTable;
570	} PGMPOOLUSER, *PPGMPOOLUSER;
571	typedef const PGMPOOLUSER *PCPGMPOOLUSER;
572	#pragma pack()
573
574
575	/** The NIL index for the phys ext chain. */
576	#define NIL_PGMPOOL_PHYSEXT_INDEX ((uint16_t)0xffff)
577
578	/**
579	* Node in the chain of physical cross reference extents.
580	*/
581	#pragma pack(1)
582	typedef struct PGMPOOLPHYSEXT
583	{
584	/** The index to the next item in the chain. NIL_PGMPOOL_PHYSEXT_INDEX is no next. */
585	uint16_t iNext;
586	/** The user page index. */
587	uint16_t aidx[3];
588	} PGMPOOLPHYSEXT, *PPGMPOOLPHYSEXT;
589	typedef const PGMPOOLPHYSEXT *PCPGMPOOLPHYSEXT;
590	#pragma pack()
591
592
593	/**
594	* The kind of page that's being shadowed.
595	*/
596	typedef enum PGMPOOLKIND
597	{
598	/** The ritual invalid 0 entry. */
599	PGMPOOLKIND_INVALID = 0,
600	/** The entry is free (=unused). */
601	PGMPOOLKIND_FREE,
602
603	/** Shw: 32-bit page table; Gst: 32-bit page table. */
604	PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT,
605	/** Shw: 32-bit page table; Gst: 4MB page. */
606	PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB,
607	/** Shw: PAE page table; Gst: 32-bit page table. */
608	PGMPOOLKIND_PAE_PT_FOR_32BIT_PT,
609	/** Shw: PAE page table; Gst: Half of a 4MB page. */
610	PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB,
611	/** Shw: PAE page table; Gst: PAE page table. */
612	PGMPOOLKIND_PAE_PT_FOR_PAE_PT,
613	/** Shw: PAE page table; Gst: 2MB page. */
614	PGMPOOLKIND_PAE_PT_FOR_PAE_2MB,
615
616	/** Shw: PAE page directory; Gst: 32-bit page directory. */
617	PGMPOOLKIND_PAE_PD_FOR_32BIT_PD,
618	/** Shw: PAE page directory; Gst: PAE page directory. */
619	PGMPOOLKIND_PAE_PD_FOR_PAE_PD,
620
621	/** Shw: 64-bit page directory pointer table; Gst: 64-bit page directory pointer table. */
622	PGMPOOLKIND_64BIT_PDPTR_FOR_64BIT_PDPTR,
623
624	/** Shw: Root 32-bit page directory. */
625	PGMPOOLKIND_ROOT_32BIT_PD,
626	/** Shw: Root PAE page directory */
627	PGMPOOLKIND_ROOT_PAE_PD,
628	/** Shw: Root PAE page directory pointer table (legacy, 4 entries). */
629	PGMPOOLKIND_ROOT_PDPTR,
630	/** Shw: Root page map level-4 table. */
631	PGMPOOLKIND_ROOT_PML4,
632
633	/** The last valid entry. */
634	PGMPOOLKIND_LAST = PGMPOOLKIND_ROOT_PML4
635	} PGMPOOLKIND;
636
637
638	/**
639	* The tracking data for a page in the pool.
640	*/
641	typedef struct PGMPOOLPAGE
642	{
643	/** AVL node code with the (HC) physical address of this page. */
644	AVLOHCPHYSNODECORE Core;
645	#if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32 && defined(IN_GC)
646	uint32_t Alignment0; /*< Alignment. /
647	#endif
648	/** Pointer to the HC mapping of the page. */
649	HCPTRTYPE(void *) pvPageHC;
650	/** The guest physical address. */
651	RTGCPHYS GCPhys;
652	/** The kind of page we're shadowing. (This is really a PGMPOOLKIND enum.) */
653	uint8_t enmKind;
654	uint8_t bPadding;
655	/** The index of this page. */
656	uint16_t idx;
657	/** The next entry in the list this page currently resides in.
658	* It's either in the free list or in the GCPhys hash. */
659	uint16_t iNext;
660	#ifdef PGMPOOL_WITH_USER_TRACKING
661	/** Head of the user chain. NIL_PGMPOOL_USER_INDEX if not currently in use. */
662	uint16_t iUserHead;
663	/** The number of present entries. */
664	uint16_t cPresent;
665	/** The first entry in the table which is present. */
666	uint16_t iFirstPresent;
667	#endif
668	#ifdef PGMPOOL_WITH_MONITORING
669	/** The number of modifications to the monitored page. */
670	uint16_t cModifications;
671	/** The next modified page. NIL_PGMPOOL_IDX if tail. */
672	uint16_t iModifiedNext;
673	/** The previous modified page. NIL_PGMPOOL_IDX if head. */
674	uint16_t iModifiedPrev;
675	/** The next page sharing access handler. NIL_PGMPOOL_IDX if tail. */
676	uint16_t iMonitoredNext;
677	/** The previous page sharing access handler. NIL_PGMPOOL_IDX if head. */
678	uint16_t iMonitoredPrev;
679	#endif
680	#ifdef PGMPOOL_WITH_CACHE
681	/** The next page in the age list. */
682	uint16_t iAgeNext;
683	/** The previous page in the age list. */
684	uint16_t iAgePrev;
685	/** @todo add more from PGMCache.h when merging with it. */
686	#endif /* PGMPOOL_WITH_CACHE */
687	/** Used to indicate that the page is zeroed. */
688	bool fZeroed;
689	/** Used to indicate that a PT has non-global entries. */
690	bool fSeenNonGlobal;
691	/** Used to indicate that we're monitoring writes to the guest page. */
692	bool fMonitored;
693	/** Used to indicate that the page is in the cache (e.g. in the GCPhys hash).
694	* (All pages are in the age list.) */
695	bool fCached;
696	/** This is used by the R3 access handlers when invoked by an async thread.
697	* It's a hack required because of REMR3NotifyHandlerPhysicalDeregister. */
698	bool volatile fReusedFlushPending;
699	/** Used to indicate that the guest is mapping the page is also used as a CR3.
700	* In these cases the access handler acts differently and will check
701	* for mapping conflicts like the normal CR3 handler.
702	* @todo When we change the CR3 shadowing to use pool pages, this flag can be
703	* replaced by a list of pages which share access handler.
704	*/
705	bool fCR3Mix;
706	#if HC_ARCH_BITS == 64 \|\| GC_ARCH_BITS == 64
707	bool Alignment[4]; /*< Align the structure size on a 64-bit boundrary. /
708	#endif
709	} PGMPOOLPAGE, PPGMPOOLPAGE, *PPPGMPOOLPAGE;
710
711
712	#ifdef PGMPOOL_WITH_CACHE
713	/** The hash table size. */
714	# define PGMPOOL_HASH_SIZE 0x40
715	/** The hash function. */
716	# define PGMPOOL_HASH(GCPhys) ( ((GCPhys) >> PAGE_SHIFT) & (PGMPOOL_HASH_SIZE - 1) )
717	#endif
718
719
720	/**
721	* The shadow page pool instance data.
722	*
723	* It's all one big allocation made at init time, except for the
724	* pages that is. The user nodes follows immediatly after the
725	* page structures.
726	*/
727	typedef struct PGMPOOL
728	{
729	/** The VM handle - HC Ptr. */
730	HCPTRTYPE(PVM) pVMHC;
731	/** The VM handle - GC Ptr. */
732	GCPTRTYPE(PVM) pVMGC;
733	/** The max pool size. This includes the special IDs. */
734	uint16_t cMaxPages;
735	/** The current pool size. */
736	uint16_t cCurPages;
737	/** The head of the free page list. */
738	uint16_t iFreeHead;
739	/* Padding. */
740	uint16_t u16Padding;
741	#ifdef PGMPOOL_WITH_USER_TRACKING
742	/** Head of the chain of free user nodes. */
743	uint16_t iUserFreeHead;
744	/** The number of user nodes we've allocated. */
745	uint16_t cMaxUsers;
746	/** The number of present page table entries in the entire pool. */
747	uint32_t cPresent;
748	/** Pointer to the array of user nodes - GC pointer. */
749	GCPTRTYPE(PPGMPOOLUSER) paUsersGC;
750	/** Pointer to the array of user nodes - HC pointer. */
751	HCPTRTYPE(PPGMPOOLUSER) paUsersHC;
752	#endif /* PGMPOOL_WITH_USER_TRACKING */
753	#ifdef PGMPOOL_WITH_GCPHYS_TRACKING
754	/** Head of the chain of free phys ext nodes. */
755	uint16_t iPhysExtFreeHead;
756	/** The number of user nodes we've allocated. */
757	uint16_t cMaxPhysExts;
758	/** Pointer to the array of physical xref extent - GC pointer. */
759	GCPTRTYPE(PPGMPOOLPHYSEXT) paPhysExtsGC;
760	/** Pointer to the array of physical xref extent nodes - HC pointer. */
761	HCPTRTYPE(PPGMPOOLPHYSEXT) paPhysExtsHC;
762	#endif /* PGMPOOL_WITH_GCPHYS_TRACKING */
763	#ifdef PGMPOOL_WITH_CACHE
764	/** Hash table for GCPhys addresses. */
765	uint16_t aiHash[PGMPOOL_HASH_SIZE];
766	/** The head of the age list. */
767	uint16_t iAgeHead;
768	/** The tail of the age list. */
769	uint16_t iAgeTail;
770	/** Set if the cache is enabled. */
771	bool fCacheEnabled;
772	#endif /* PGMPOOL_WITH_CACHE */
773	#ifdef PGMPOOL_WITH_MONITORING
774	/** Head of the list of modified pages. */
775	uint16_t iModifiedHead;
776	/** The current number of modified pages. */
777	uint16_t cModifiedPages;
778	/** Access handler, GC. */
779	GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnAccessHandlerGC;
780	/** Access handler, R0. */
781	R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnAccessHandlerR0;
782	/** Access handler, R3. */
783	HCPTRTYPE(PFNPGMR3PHYSHANDLER) pfnAccessHandlerR3;
784	/** The access handler description (HC ptr). */
785	HCPTRTYPE(const char *) pszAccessHandler;
786	#endif /* PGMPOOL_WITH_MONITORING */
787	/** The number of pages currently in use. */
788	uint16_t cUsedPages;
789	#ifdef VBOX_WITH_STATISTICS
790	/** The high wather mark for cUsedPages. */
791	uint16_t cUsedPagesHigh;
792	uint32_t Alignment1; /*< Align the next member on a 64-bit boundrary. /
793	/** Profiling pgmPoolAlloc(). */
794	STAMPROFILEADV StatAlloc;
795	/** Profiling pgmPoolClearAll(). */
796	STAMPROFILE StatClearAll;
797	/** Profiling pgmPoolFlushAllInt(). */
798	STAMPROFILE StatFlushAllInt;
799	/** Profiling pgmPoolFlushPage(). */
800	STAMPROFILE StatFlushPage;
801	/** Profiling pgmPoolFree(). */
802	STAMPROFILE StatFree;
803	/** Profiling time spent zeroing pages. */
804	STAMPROFILE StatZeroPage;
805	# ifdef PGMPOOL_WITH_USER_TRACKING
806	/** Profiling of pgmPoolTrackDeref. */
807	STAMPROFILE StatTrackDeref;
808	/** Profiling pgmTrackFlushGCPhysPT. */
809	STAMPROFILE StatTrackFlushGCPhysPT;
810	/** Profiling pgmTrackFlushGCPhysPTs. */
811	STAMPROFILE StatTrackFlushGCPhysPTs;
812	/** Profiling pgmTrackFlushGCPhysPTsSlow. */
813	STAMPROFILE StatTrackFlushGCPhysPTsSlow;
814	/** Number of times we've been out of user records. */
815	STAMCOUNTER StatTrackFreeUpOneUser;
816	# endif
817	# ifdef PGMPOOL_WITH_GCPHYS_TRACKING
818	/** Profiling deref activity related tracking GC physical pages. */
819	STAMPROFILE StatTrackDerefGCPhys;
820	/** Number of linear searches for a HCPhys in the ram ranges. */
821	STAMCOUNTER StatTrackLinearRamSearches;
822	/** The number of failing pgmPoolTrackPhysExtAlloc calls. */
823	STAMCOUNTER StamTrackPhysExtAllocFailures;
824	# endif
825	# ifdef PGMPOOL_WITH_MONITORING
826	/** Profiling the GC PT access handler. */
827	STAMPROFILE StatMonitorGC;
828	/** Times we've failed interpreting the instruction. */
829	STAMCOUNTER StatMonitorGCEmulateInstr;
830	/** Profiling the pgmPoolFlushPage calls made from the GC PT access handler. */
831	STAMPROFILE StatMonitorGCFlushPage;
832	/** Times we've detected fork(). */
833	STAMCOUNTER StatMonitorGCFork;
834	/** Profiling the GC access we've handled (except REP STOSD). */
835	STAMPROFILE StatMonitorGCHandled;
836	/** Times we've failed interpreting a patch code instruction. */
837	STAMCOUNTER StatMonitorGCIntrFailPatch1;
838	/** Times we've failed interpreting a patch code instruction during flushing. */
839	STAMCOUNTER StatMonitorGCIntrFailPatch2;
840	/** The number of times we've seen rep prefixes we can't handle. */
841	STAMCOUNTER StatMonitorGCRepPrefix;
842	/** Profiling the REP STOSD cases we've handled. */
843	STAMPROFILE StatMonitorGCRepStosd;
844
845	/** Profiling the HC PT access handler. */
846	STAMPROFILE StatMonitorHC;
847	/** Times we've failed interpreting the instruction. */
848	STAMCOUNTER StatMonitorHCEmulateInstr;
849	/** Profiling the pgmPoolFlushPage calls made from the HC PT access handler. */
850	STAMPROFILE StatMonitorHCFlushPage;
851	/** Times we've detected fork(). */
852	STAMCOUNTER StatMonitorHCFork;
853	/** Profiling the HC access we've handled (except REP STOSD). */
854	STAMPROFILE StatMonitorHCHandled;
855	/** The number of times we've seen rep prefixes we can't handle. */
856	STAMCOUNTER StatMonitorHCRepPrefix;
857	/** Profiling the REP STOSD cases we've handled. */
858	STAMPROFILE StatMonitorHCRepStosd;
859	/** The number of times we're called in an async thread an need to flush. */
860	STAMCOUNTER StatMonitorHCAsync;
861	/** The high wather mark for cModifiedPages. */
862	uint16_t cModifiedPagesHigh;
863	uint16_t Alignment2[3]; /*< Align the next member on a 64-bit boundrary. /
864	# endif
865	# ifdef PGMPOOL_WITH_CACHE
866	/** The number of cache hits. */
867	STAMCOUNTER StatCacheHits;
868	/** The number of cache misses. */
869	STAMCOUNTER StatCacheMisses;
870	/** The number of times we've got a conflict of 'kind' in the cache. */
871	STAMCOUNTER StatCacheKindMismatches;
872	/** Number of times we've been out of pages. */
873	STAMCOUNTER StatCacheFreeUpOne;
874	/** The number of cacheable allocations. */
875	STAMCOUNTER StatCacheCacheable;
876	/** The number of uncacheable allocations. */
877	STAMCOUNTER StatCacheUncacheable;
878	# endif
879	#elif HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32
880	uint32_t Alignment1; /*< Align the next member on a 64-bit boundrary. /
881	#endif
882	/** The AVL tree for looking up a page by its HC physical address. */
883	AVLOHCPHYSTREE HCPhysTree;
884	uint32_t Alignment3; /*< Align the next member on a 64-bit boundrary. /
885	/** Array of pages. (cMaxPages in length)
886	* The Id is the index into thist array.
887	*/
888	PGMPOOLPAGE aPages[PGMPOOL_IDX_FIRST];
889	} PGMPOOL, PPGMPOOL, *PPPGMPOOL;
890
891
892	/** @def PGMPOOL_PAGE_2_PTR
893	* Maps a pool page pool into the current context.
894	*
895	* @returns VBox status code.
896	* @param pVM The VM handle.
897	* @param pPage The pool page.
898	*
899	* @remark In HC this uses PGMGCDynMapHCPage(), so it will consume of the
900	* small page window employeed by that function. Be careful.
901	* @remark There is no need to assert on the result.
902	*/
903	#ifdef IN_GC
904	# define PGMPOOL_PAGE_2_PTR(pVM, pPage) pgmGCPoolMapPage((pVM), (pPage))
905	#else
906	# define PGMPOOL_PAGE_2_PTR(pVM, pPage) ((pPage)->pvPageHC)
907	#endif
908
909
910	/**
911	* Trees are using self relative offsets as pointers.
912	* So, all its data, including the root pointer, must be in the heap for HC and GC
913	* to have the same layout.
914	*/
915	typedef struct PGMTREES
916	{
917	/** Physical access handlers (AVL range+offsetptr tree). */
918	AVLROGCPHYSTREE PhysHandlers;
919	/** Virtual access handlers (AVL range + GC ptr tree). */
920	AVLROGCPTRTREE VirtHandlers;
921	/** Virtual access handlers (Phys range AVL range + offsetptr tree). */
922	AVLROGCPHYSTREE PhysToVirtHandlers;
923	uint32_t auPadding[1];
924	} PGMTREES;
925	/** Pointer to PGM trees. */
926	typedef PGMTREES *PPGMTREES;
927
928
929	/** @name Paging mode macros
930	* @{ */
931	#ifdef IN_GC
932	# define PGM_CTX(a,b) a##GC##b
933	# define PGM_CTX_STR(a,b) a "GC" b
934	# define PGM_CTX_DECL(type) PGMGCDECL(type)
935	#else
936	# ifdef IN_RING3
937	# define PGM_CTX(a,b) a##R3##b
938	# define PGM_CTX_STR(a,b) a "R3" b
939	# define PGM_CTX_DECL(type) DECLCALLBACK(type)
940	# else
941	# define PGM_CTX(a,b) a##R0##b
942	# define PGM_CTX_STR(a,b) a "R0" b
943	# define PGM_CTX_DECL(type) PGMDECL(type)
944	# endif
945	#endif
946
947	#define PGM_GST_NAME_REAL(name) PGM_CTX(pgm,GstReal##name)
948	#define PGM_GST_NAME_GC_REAL_STR(name) "pgmGCGstReal" #name
949	#define PGM_GST_NAME_R0_REAL_STR(name) "pgmR0GstReal" #name
950	#define PGM_GST_NAME_PROT(name) PGM_CTX(pgm,GstProt##name)
951	#define PGM_GST_NAME_GC_PROT_STR(name) "pgmGCGstProt" #name
952	#define PGM_GST_NAME_R0_PROT_STR(name) "pgmR0GstProt" #name
953	#define PGM_GST_NAME_32BIT(name) PGM_CTX(pgm,Gst32Bit##name)
954	#define PGM_GST_NAME_GC_32BIT_STR(name) "pgmGCGst32Bit" #name
955	#define PGM_GST_NAME_R0_32BIT_STR(name) "pgmR0Gst32Bit" #name
956	#define PGM_GST_NAME_PAE(name) PGM_CTX(pgm,GstPAE##name)
957	#define PGM_GST_NAME_GC_PAE_STR(name) "pgmGCGstPAE" #name
958	#define PGM_GST_NAME_R0_PAE_STR(name) "pgmR0GstPAE" #name
959	#define PGM_GST_NAME_AMD64(name) PGM_CTX(pgm,GstAMD64##name)
960	#define PGM_GST_NAME_GC_AMD64_STR(name) "pgmGCGstAMD64" #name
961	#define PGM_GST_NAME_R0_AMD64_STR(name) "pgmR0GstAMD64" #name
962	#define PGM_GST_PFN(name, pVM) ((pVM)->pgm.s.PGM_CTX(pfn,Gst##name))
963	#define PGM_GST_DECL(type, name) PGM_CTX_DECL(type) PGM_GST_NAME(name)
964
965	#define PGM_SHW_NAME_32BIT(name) PGM_CTX(pgm,Shw32Bit##name)
966	#define PGM_SHW_NAME_GC_32BIT_STR(name) "pgmGCShw32Bit" #name
967	#define PGM_SHW_NAME_R0_32BIT_STR(name) "pgmR0Shw32Bit" #name
968	#define PGM_SHW_NAME_PAE(name) PGM_CTX(pgm,ShwPAE##name)
969	#define PGM_SHW_NAME_GC_PAE_STR(name) "pgmGCShwPAE" #name
970	#define PGM_SHW_NAME_R0_PAE_STR(name) "pgmR0ShwPAE" #name
971	#define PGM_SHW_NAME_AMD64(name) PGM_CTX(pgm,ShwAMD64##name)
972	#define PGM_SHW_NAME_GC_AMD64_STR(name) "pgmGCShwAMD64" #name
973	#define PGM_SHW_NAME_R0_AMD64_STR(name) "pgmR0ShwAMD64" #name
974	#define PGM_SHW_DECL(type, name) PGM_CTX_DECL(type) PGM_SHW_NAME(name)
975	#define PGM_SHW_PFN(name, pVM) ((pVM)->pgm.s.PGM_CTX(pfn,Shw##name))
976
977	/* Shw_Gst */
978	#define PGM_BTH_NAME_32BIT_REAL(name) PGM_CTX(pgm,Bth32BitReal##name)
979	#define PGM_BTH_NAME_32BIT_PROT(name) PGM_CTX(pgm,Bth32BitProt##name)
980	#define PGM_BTH_NAME_32BIT_32BIT(name) PGM_CTX(pgm,Bth32Bit32Bit##name)
981	#define PGM_BTH_NAME_PAE_REAL(name) PGM_CTX(pgm,BthPAEReal##name)
982	#define PGM_BTH_NAME_PAE_PROT(name) PGM_CTX(pgm,BthPAEProt##name)
983	#define PGM_BTH_NAME_PAE_32BIT(name) PGM_CTX(pgm,BthPAE32Bit##name)
984	#define PGM_BTH_NAME_PAE_PAE(name) PGM_CTX(pgm,BthPAEPAE##name)
985	#define PGM_BTH_NAME_AMD64_REAL(name) PGM_CTX(pgm,BthAMD64Real##name)
986	#define PGM_BTH_NAME_AMD64_PROT(name) PGM_CTX(pgm,BthAMD64Prot##name)
987	#define PGM_BTH_NAME_AMD64_AMD64(name) PGM_CTX(pgm,BthAMD64AMD64##name)
988	#define PGM_BTH_NAME_GC_32BIT_REAL_STR(name) "pgmGCBth32BitReal" #name
989	#define PGM_BTH_NAME_GC_32BIT_PROT_STR(name) "pgmGCBth32BitProt" #name
990	#define PGM_BTH_NAME_GC_32BIT_32BIT_STR(name) "pgmGCBth32Bit32Bit" #name
991	#define PGM_BTH_NAME_GC_PAE_REAL_STR(name) "pgmGCBthPAEReal" #name
992	#define PGM_BTH_NAME_GC_PAE_PROT_STR(name) "pgmGCBthPAEProt" #name
993	#define PGM_BTH_NAME_GC_PAE_32BIT_STR(name) "pgmGCBthPAE32Bit" #name
994	#define PGM_BTH_NAME_GC_PAE_PAE_STR(name) "pgmGCBthPAEPAE" #name
995	#define PGM_BTH_NAME_GC_AMD64_REAL_STR(name) "pgmGCBthAMD64Real" #name
996	#define PGM_BTH_NAME_GC_AMD64_PROT_STR(name) "pgmGCBthAMD64Prot" #name
997	#define PGM_BTH_NAME_GC_AMD64_AMD64_STR(name) "pgmGCBthAMD64AMD64" #name
998	#define PGM_BTH_NAME_R0_32BIT_REAL_STR(name) "pgmR0Bth32BitReal" #name
999	#define PGM_BTH_NAME_R0_32BIT_PROT_STR(name) "pgmR0Bth32BitProt" #name
1000	#define PGM_BTH_NAME_R0_32BIT_32BIT_STR(name) "pgmR0Bth32Bit32Bit" #name
1001	#define PGM_BTH_NAME_R0_PAE_REAL_STR(name) "pgmR0BthPAEReal" #name
1002	#define PGM_BTH_NAME_R0_PAE_PROT_STR(name) "pgmR0BthPAEProt" #name
1003	#define PGM_BTH_NAME_R0_PAE_32BIT_STR(name) "pgmR0BthPAE32Bit" #name
1004	#define PGM_BTH_NAME_R0_PAE_PAE_STR(name) "pgmR0BthPAEPAE" #name
1005	#define PGM_BTH_NAME_R0_AMD64_REAL_STR(name) "pgmR0BthAMD64Real" #name
1006	#define PGM_BTH_NAME_R0_AMD64_PROT_STR(name) "pgmR0BthAMD64Prot" #name
1007	#define PGM_BTH_NAME_R0_AMD64_AMD64_STR(name) "pgmR0BthAMD64AMD64" #name
1008	#define PGM_BTH_DECL(type, name) PGM_CTX_DECL(type) PGM_BTH_NAME(name)
1009	#define PGM_BTH_PFN(name, pVM) ((pVM)->pgm.s.PGM_CTX(pfn,Bth##name))
1010	/** @} */
1011
1012	/**
1013	* Data for each paging mode.
1014	*/
1015	typedef struct PGMMODEDATA
1016	{
1017	/** The guest mode type. */
1018	uint32_t uGstType;
1019	/** The shadow mode type. */
1020	uint32_t uShwType;
1021
1022	/** @name Function pointers for Shadow paging.
1023	* @{
1024	*/
1025	DECLR3CALLBACKMEMBER(int, pfnR3ShwRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1026	DECLR3CALLBACKMEMBER(int, pfnR3ShwExit,(PVM pVM));
1027	DECLR3CALLBACKMEMBER(int, pfnR3ShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1028	DECLR3CALLBACKMEMBER(int, pfnR3ShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1029	DECLR3CALLBACKMEMBER(int, pfnR3ShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1030	DECLR3CALLBACKMEMBER(int, pfnR3ShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1031	DECLR3CALLBACKMEMBER(int, pfnR3ShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1032
1033	DECLGCCALLBACKMEMBER(int, pfnGCShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1034	DECLGCCALLBACKMEMBER(int, pfnGCShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1035	DECLGCCALLBACKMEMBER(int, pfnGCShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1036	DECLGCCALLBACKMEMBER(int, pfnGCShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1037	DECLGCCALLBACKMEMBER(int, pfnGCShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1038
1039	DECLR0CALLBACKMEMBER(int, pfnR0ShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1040	DECLR0CALLBACKMEMBER(int, pfnR0ShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1041	DECLR0CALLBACKMEMBER(int, pfnR0ShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1042	DECLR0CALLBACKMEMBER(int, pfnR0ShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1043	DECLR0CALLBACKMEMBER(int, pfnR0ShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1044	/** @} */
1045
1046	/** @name Function pointers for Guest paging.
1047	* @{
1048	*/
1049	DECLR3CALLBACKMEMBER(int, pfnR3GstRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1050	DECLR3CALLBACKMEMBER(int, pfnR3GstExit,(PVM pVM));
1051	DECLR3CALLBACKMEMBER(int, pfnR3GstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1052	DECLR3CALLBACKMEMBER(int, pfnR3GstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1053	DECLR3CALLBACKMEMBER(int, pfnR3GstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1054	DECLR3CALLBACKMEMBER(int, pfnR3GstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1055	DECLR3CALLBACKMEMBER(int, pfnR3GstUnmonitorCR3,(PVM pVM));
1056	DECLR3CALLBACKMEMBER(int, pfnR3GstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1057	DECLR3CALLBACKMEMBER(int, pfnR3GstUnmapCR3,(PVM pVM));
1058	HCPTRTYPE(PFNPGMR3PHYSHANDLER) pfnHCGstWriteHandlerCR3;
1059	HCPTRTYPE(const char *) pszHCGstWriteHandlerCR3;
1060
1061	DECLGCCALLBACKMEMBER(int, pfnGCGstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1062	DECLGCCALLBACKMEMBER(int, pfnGCGstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1063	DECLGCCALLBACKMEMBER(int, pfnGCGstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1064	DECLGCCALLBACKMEMBER(int, pfnGCGstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1065	DECLGCCALLBACKMEMBER(int, pfnGCGstUnmonitorCR3,(PVM pVM));
1066	DECLGCCALLBACKMEMBER(int, pfnGCGstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1067	DECLGCCALLBACKMEMBER(int, pfnGCGstUnmapCR3,(PVM pVM));
1068	GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnGCGstWriteHandlerCR3;
1069
1070	DECLR0CALLBACKMEMBER(int, pfnR0GstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1071	DECLR0CALLBACKMEMBER(int, pfnR0GstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1072	DECLR0CALLBACKMEMBER(int, pfnR0GstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1073	DECLR0CALLBACKMEMBER(int, pfnR0GstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1074	DECLR0CALLBACKMEMBER(int, pfnR0GstUnmonitorCR3,(PVM pVM));
1075	DECLR0CALLBACKMEMBER(int, pfnR0GstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1076	DECLR0CALLBACKMEMBER(int, pfnR0GstUnmapCR3,(PVM pVM));
1077	R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnR0GstWriteHandlerCR3;
1078	/** @} */
1079
1080	/** @name Function pointers for Both Shadow and Guest paging.
1081	* @{
1082	*/
1083	DECLR3CALLBACKMEMBER(int, pfnR3BthRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1084	DECLR3CALLBACKMEMBER(int, pfnR3BthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1085	DECLR3CALLBACKMEMBER(int, pfnR3BthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1086	DECLR3CALLBACKMEMBER(int, pfnR3BthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
1087	DECLR3CALLBACKMEMBER(int, pfnR3BthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
1088	DECLR3CALLBACKMEMBER(int, pfnR3BthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
1089	DECLR3CALLBACKMEMBER(int, pfnR3BthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
1090	#ifdef VBOX_STRICT
1091	DECLR3CALLBACKMEMBER(unsigned, pfnR3BthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
1092	#endif
1093
1094	DECLGCCALLBACKMEMBER(int, pfnGCBthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1095	DECLGCCALLBACKMEMBER(int, pfnGCBthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1096	DECLGCCALLBACKMEMBER(int, pfnGCBthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
1097	DECLGCCALLBACKMEMBER(int, pfnGCBthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
1098	DECLGCCALLBACKMEMBER(int, pfnGCBthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
1099	DECLGCCALLBACKMEMBER(int, pfnGCBthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
1100	#ifdef VBOX_STRICT
1101	DECLGCCALLBACKMEMBER(unsigned, pfnGCBthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
1102	#endif
1103
1104	DECLR0CALLBACKMEMBER(int, pfnR0BthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1105	DECLR0CALLBACKMEMBER(int, pfnR0BthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1106	DECLR0CALLBACKMEMBER(int, pfnR0BthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
1107	DECLR0CALLBACKMEMBER(int, pfnR0BthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
1108	DECLR0CALLBACKMEMBER(int, pfnR0BthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
1109	DECLR0CALLBACKMEMBER(int, pfnR0BthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
1110	#ifdef VBOX_STRICT
1111	DECLR0CALLBACKMEMBER(unsigned, pfnR0BthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
1112	#endif
1113	/** @} */
1114	} PGMMODEDATA, *PPGMMODEDATA;
1115
1116
1117
1118	/**
1119	* Converts a PGM pointer into a VM pointer.
1120	* @returns Pointer to the VM structure the PGM is part of.
1121	* @param pPGM Pointer to PGM instance data.
1122	*/
1123	#define PGM2VM(pPGM) ( (PVM)((char*)pPGM - pPGM->offVM) )
1124
1125	/**
1126	* PGM Data (part of VM)
1127	*/
1128	typedef struct PGM
1129	{
1130	/** Offset to the VM structure. */
1131	RTINT offVM;
1132
1133	/*
1134	* This will be redefined at least two more times before we're done, I'm sure.
1135	* The current code is only to get on with the coding.
1136	* - 2004-06-10: initial version, bird.
1137	* - 2004-07-02: 1st time, bird.
1138	* - 2004-10-18: 2nd time, bird.
1139	* - 2005-07-xx: 3rd time, bird.
1140	*/
1141
1142	/** Pointer to the page table entries for the dynamic page mapping area - GCPtr. */
1143	GCPTRTYPE(PX86PTE) paDynPageMap32BitPTEsGC;
1144	/** Pointer to the page table entries for the dynamic page mapping area - GCPtr. */
1145	GCPTRTYPE(PX86PTEPAE) paDynPageMapPaePTEsGC;
1146
1147	/** The host paging mode. (This is what SUPLib reports.) */
1148	SUPPAGINGMODE enmHostMode;
1149	/** The shadow paging mode. */
1150	PGMMODE enmShadowMode;
1151	/** The guest paging mode. */
1152	PGMMODE enmGuestMode;
1153
1154	/** The current physical address representing in the guest CR3 register. */
1155	RTGCPHYS GCPhysCR3;
1156	/** Pointer to the 5 page CR3 content mapping.
1157	* The first page is always the CR3 (in some form) while the 4 other pages
1158	* are used of the PDs in PAE mode. */
1159	RTGCPTR GCPtrCR3Mapping;
1160	/** The physical address of the currently monitored guest CR3 page.
1161	* When this value is NIL_RTGCPHYS no page is being monitored. */
1162	RTGCPHYS GCPhysGstCR3Monitored;
1163	#if HC_ARCH_BITS == 64 \|\| GC_ARCH_BITS == 64
1164	RTGCPHYS GCPhysPadding0; /*< alignment padding. /
1165	#endif
1166
1167	/** @name 32-bit Guest Paging.
1168	* @{ */
1169	/** The guest's page directory, HC pointer. */
1170	HCPTRTYPE(PVBOXPD) pGuestPDHC;
1171	/** The guest's page directory, static GC mapping. */
1172	GCPTRTYPE(PVBOXPD) pGuestPDGC;
1173	/** @} */
1174
1175	/** @name PAE Guest Paging.
1176	* @{ */
1177	/** The guest's page directory pointer table, static GC mapping. */
1178	GCPTRTYPE(PX86PDPTR) pGstPaePDPTRGC;
1179	/** The guest's page directory pointer table, HC pointer. */
1180	HCPTRTYPE(PX86PDPTR) pGstPaePDPTRHC;
1181	/** The guest's page directories, HC pointers.
1182	* These are individual pointers and doesn't have to be adjecent.
1183	* These doesn't have to be update to date - use pgmGstGetPaePD() to access them. */
1184	HCPTRTYPE(PX86PDPAE) apGstPaePDsHC[4];
1185	/** The guest's page directories, static GC mapping.
1186	* Unlike the HC array the first entry can be accessed as a 2048 entry PD.
1187	* These doesn't have to be update to date - use pgmGstGetPaePD() to access them. */
1188	GCPTRTYPE(PX86PDPAE) apGstPaePDsGC[4];
1189	/** The physical addresses of the guest page directories (PAE) pointed to by apGstPagePDsHC/GC. */
1190	RTGCPHYS aGCPhysGstPaePDs[4];
1191	/** The physical addresses of the monitored guest page directories (PAE). */
1192	RTGCPHYS aGCPhysGstPaePDsMonitored[4];
1193	/** @} */
1194
1195
1196	/** @name 32-bit Shadow Paging
1197	* @{ */
1198	/** The 32-Bit PD - HC Ptr. */
1199	HCPTRTYPE(PX86PD) pHC32BitPD;
1200	/** The 32-Bit PD - GC Ptr. */
1201	GCPTRTYPE(PX86PD) pGC32BitPD;
1202	#if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32
1203	uint32_t u32Padding1; /*< alignment padding. /
1204	#endif
1205	/** The Physical Address (HC) of the 32-Bit PD. */
1206	RTHCPHYS HCPhys32BitPD;
1207	/** @} */
1208
1209	/** @name PAE Shadow Paging
1210	* @{ */
1211	/** The four PDs for the low 4GB - HC Ptr.
1212	* Even though these are 4 pointers, what they point at is a single table.
1213	* Thus, it's possible to walk the 2048 entries starting where apHCPaePDs[0] points. */
1214	HCPTRTYPE(PX86PDPAE) apHCPaePDs[4];
1215	/** The four PDs for the low 4GB - GC Ptr.
1216	* Same kind of mapping as apHCPaePDs. */
1217	GCPTRTYPE(PX86PDPAE) apGCPaePDs[4];
1218	/** The Physical Address (HC) of the four PDs for the low 4GB.
1219	* These are NOT 4 contiguous pages. */
1220	RTHCPHYS aHCPhysPaePDs[4];
1221	/** The PAE PDPTR - HC Ptr. */
1222	HCPTRTYPE(PX86PDPTR) pHCPaePDPTR;
1223	/** The Physical Address (HC) of the PAE PDPTR. */
1224	RTHCPHYS HCPhysPaePDPTR;
1225	/** The PAE PDPTR - GC Ptr. */
1226	GCPTRTYPE(PX86PDPTR) pGCPaePDPTR;
1227	/** @} */
1228
1229	/** @name AMD64 Shadow Paging
1230	* Extends PAE Paging.
1231	* @{ */
1232	/** The Page Map Level 4 table - HC Ptr. */
1233	GCPTRTYPE(PX86PML4) pGCPaePML4;
1234	/** The Page Map Level 4 table - GC Ptr. */
1235	HCPTRTYPE(PX86PML4) pHCPaePML4;
1236	/** The Physical Address (HC) of the Page Map Level 4 table. */
1237	RTHCPHYS HCPhysPaePML4;
1238	/** @}*/
1239
1240	/** @name Function pointers for Shadow paging.
1241	* @{
1242	*/
1243	DECLR3CALLBACKMEMBER(int, pfnR3ShwRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1244	DECLR3CALLBACKMEMBER(int, pfnR3ShwExit,(PVM pVM));
1245	DECLR3CALLBACKMEMBER(int, pfnR3ShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1246	DECLR3CALLBACKMEMBER(int, pfnR3ShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1247	DECLR3CALLBACKMEMBER(int, pfnR3ShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1248	DECLR3CALLBACKMEMBER(int, pfnR3ShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1249	DECLR3CALLBACKMEMBER(int, pfnR3ShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1250
1251	DECLGCCALLBACKMEMBER(int, pfnGCShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1252	DECLGCCALLBACKMEMBER(int, pfnGCShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1253	DECLGCCALLBACKMEMBER(int, pfnGCShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1254	DECLGCCALLBACKMEMBER(int, pfnGCShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1255	DECLGCCALLBACKMEMBER(int, pfnGCShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1256	#if GC_ARCH_BITS == 32 && HC_ARCH_BITS == 64
1257	RTGCPTR alignment0; /*< structure size alignment. /
1258	#endif
1259
1260	DECLR0CALLBACKMEMBER(int, pfnR0ShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1261	DECLR0CALLBACKMEMBER(int, pfnR0ShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1262	DECLR0CALLBACKMEMBER(int, pfnR0ShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1263	DECLR0CALLBACKMEMBER(int, pfnR0ShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1264	DECLR0CALLBACKMEMBER(int, pfnR0ShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1265
1266	/** @} */
1267
1268	/** @name Function pointers for Guest paging.
1269	* @{
1270	*/
1271	DECLR3CALLBACKMEMBER(int, pfnR3GstRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1272	DECLR3CALLBACKMEMBER(int, pfnR3GstExit,(PVM pVM));
1273	DECLR3CALLBACKMEMBER(int, pfnR3GstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1274	DECLR3CALLBACKMEMBER(int, pfnR3GstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1275	DECLR3CALLBACKMEMBER(int, pfnR3GstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1276	DECLR3CALLBACKMEMBER(int, pfnR3GstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1277	DECLR3CALLBACKMEMBER(int, pfnR3GstUnmonitorCR3,(PVM pVM));
1278	DECLR3CALLBACKMEMBER(int, pfnR3GstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1279	DECLR3CALLBACKMEMBER(int, pfnR3GstUnmapCR3,(PVM pVM));
1280	HCPTRTYPE(PFNPGMR3PHYSHANDLER) pfnHCGstWriteHandlerCR3;
1281	HCPTRTYPE(const char *) pszHCGstWriteHandlerCR3;
1282
1283	DECLGCCALLBACKMEMBER(int, pfnGCGstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1284	DECLGCCALLBACKMEMBER(int, pfnGCGstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1285	DECLGCCALLBACKMEMBER(int, pfnGCGstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1286	DECLGCCALLBACKMEMBER(int, pfnGCGstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1287	DECLGCCALLBACKMEMBER(int, pfnGCGstUnmonitorCR3,(PVM pVM));
1288	DECLGCCALLBACKMEMBER(int, pfnGCGstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1289	DECLGCCALLBACKMEMBER(int, pfnGCGstUnmapCR3,(PVM pVM));
1290	GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnGCGstWriteHandlerCR3;
1291
1292	DECLR0CALLBACKMEMBER(int, pfnR0GstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1293	DECLR0CALLBACKMEMBER(int, pfnR0GstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1294	DECLR0CALLBACKMEMBER(int, pfnR0GstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1295	DECLR0CALLBACKMEMBER(int, pfnR0GstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1296	DECLR0CALLBACKMEMBER(int, pfnR0GstUnmonitorCR3,(PVM pVM));
1297	DECLR0CALLBACKMEMBER(int, pfnR0GstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1298	DECLR0CALLBACKMEMBER(int, pfnR0GstUnmapCR3,(PVM pVM));
1299	R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnR0GstWriteHandlerCR3;
1300	/** @} */
1301
1302	/** @name Function pointers for Both Shadow and Guest paging.
1303	* @{
1304	*/
1305	DECLR3CALLBACKMEMBER(int, pfnR3BthRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1306	DECLR3CALLBACKMEMBER(int, pfnR3BthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1307	DECLR3CALLBACKMEMBER(int, pfnR3BthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1308	DECLR3CALLBACKMEMBER(int, pfnR3BthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
1309	DECLR3CALLBACKMEMBER(int, pfnR3BthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
1310	DECLR3CALLBACKMEMBER(int, pfnR3BthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
1311	DECLR3CALLBACKMEMBER(int, pfnR3BthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
1312	DECLR3CALLBACKMEMBER(unsigned, pfnR3BthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
1313
1314	DECLR0CALLBACKMEMBER(int, pfnR0BthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1315	DECLR0CALLBACKMEMBER(int, pfnR0BthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1316	DECLR0CALLBACKMEMBER(int, pfnR0BthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
1317	DECLR0CALLBACKMEMBER(int, pfnR0BthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
1318	DECLR0CALLBACKMEMBER(int, pfnR0BthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
1319	DECLR0CALLBACKMEMBER(int, pfnR0BthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
1320	DECLR0CALLBACKMEMBER(unsigned, pfnR0BthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
1321
1322	DECLGCCALLBACKMEMBER(int, pfnGCBthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1323	DECLGCCALLBACKMEMBER(int, pfnGCBthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1324	DECLGCCALLBACKMEMBER(int, pfnGCBthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
1325	DECLGCCALLBACKMEMBER(int, pfnGCBthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
1326	DECLGCCALLBACKMEMBER(int, pfnGCBthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
1327	DECLGCCALLBACKMEMBER(int, pfnGCBthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
1328	DECLGCCALLBACKMEMBER(unsigned, pfnGCBthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
1329	#if GC_ARCH_BITS == 32 && HC_ARCH_BITS == 64
1330	RTGCPTR alignment2; /*< structure size alignment. /
1331	#endif
1332	/** @} */
1333
1334	/** Pointer to SHW+GST mode data (function pointers).
1335	* The index into this table is made up from */
1336	R3PTRTYPE(PPGMMODEDATA) paModeData;
1337
1338
1339	/** Pointer to the list of RAM ranges (Phys GC -> Phys HC conversion) - for HC.
1340	* This is sorted by physical address and contains no overlaps.
1341	* The memory locks and other conversions are managed by MM at the moment.
1342	*/
1343	HCPTRTYPE(PPGMRAMRANGE) pRamRangesHC;
1344	/** Pointer to the list of RAM ranges (Phys GC -> Phys HC conversion) - for GC.
1345	* This is sorted by physical address and contains no overlaps.
1346	* The memory locks and other conversions are managed by MM at the moment.
1347	*/
1348	GCPTRTYPE(PPGMRAMRANGE) pRamRangesGC;
1349	/** The configured RAM size. */
1350	RTUINT cbRamSize;
1351
1352	/** PGM offset based trees - HC Ptr. */
1353	HCPTRTYPE(PPGMTREES) pTreesHC;
1354	/** PGM offset based trees - GC Ptr. */
1355	GCPTRTYPE(PPGMTREES) pTreesGC;
1356
1357	/** Linked list of GC mappings - for GC.
1358	* The list is sorted ascending on address.
1359	*/
1360	GCPTRTYPE(PPGMMAPPING) pMappingsGC;
1361	/** Linked list of GC mappings - for HC.
1362	* The list is sorted ascending on address.
1363	*/
1364	HCPTRTYPE(PPGMMAPPING) pMappingsHC;
1365
1366	/** If set no conflict checks are required. (boolean) */
1367	bool fMappingsFixed;
1368	/** If set, then no mappings are put into the shadow page table. (boolean) */
1369	bool fDisableMappings;
1370	/** Size of fixed mapping */
1371	uint32_t cbMappingFixed;
1372	/** Base address (GC) of fixed mapping */
1373	RTGCPTR GCPtrMappingFixed;
1374	#if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32
1375	uint32_t u32Padding0; /*< alignment padding. /
1376	#endif
1377
1378
1379	/** @name Intermediate Context
1380	* @{ */
1381	/** Pointer to the intermediate page directory - Normal. */
1382	HCPTRTYPE(PX86PD) pInterPD;
1383	/** Pointer to the intermedate page tables - Normal.
1384	* There are two page tables, one for the identity mapping and one for
1385	* the host context mapping (of the core code). */
1386	HCPTRTYPE(PX86PT) apInterPTs[2];
1387	/** Pointer to the intermedate page tables - PAE. */
1388	HCPTRTYPE(PX86PTPAE) apInterPaePTs[2];
1389	/** Pointer to the intermedate page directory - PAE. */
1390	HCPTRTYPE(PX86PDPAE) apInterPaePDs[4];
1391	/** Pointer to the intermedate page directory - PAE. */
1392	HCPTRTYPE(PX86PDPTR) pInterPaePDPTR;
1393	/** Pointer to the intermedate page-map level 4 - AMD64. */
1394	HCPTRTYPE(PX86PML4) pInterPaePML4;
1395	/** Pointer to the intermedate page directory - AMD64. */
1396	HCPTRTYPE(PX86PDPTR) pInterPaePDPTR64;
1397	/** The Physical Address (HC) of the intermediate Page Directory - Normal. */
1398	RTHCPHYS HCPhysInterPD;
1399	/** The Physical Address (HC) of the intermediate Page Directory Pointer Table - PAE. */
1400	RTHCPHYS HCPhysInterPaePDPTR;
1401	/** The Physical Address (HC) of the intermediate Page Map Level 4 table - AMD64. */
1402	RTHCPHYS HCPhysInterPaePML4;
1403	/** @} */
1404
1405	/** Base address of the dynamic page mapping area.
1406	* The array is MM_HYPER_DYNAMIC_SIZE bytes big.
1407	*/
1408	GCPTRTYPE(uint8_t *) pbDynPageMapBaseGC;
1409	/** The index of the last entry used in the dynamic page mapping area. */
1410	RTUINT iDynPageMapLast;
1411	/** Cache containing the last entries in the dynamic page mapping area.
1412	* The cache size is covering half of the mapping area. */
1413	RTHCPHYS aHCPhysDynPageMapCache[MM_HYPER_DYNAMIC_SIZE >> (PAGE_SHIFT + 1)];
1414
1415	/** A20 gate mask.
1416	* Our current approach to A20 emulation is to let REM do it and don't bother
1417	* anywhere else. The interesting Guests will be operating with it enabled anyway.
1418	* But whould need arrise, we'll subject physical addresses to this mask. */
1419	RTGCPHYS GCPhysA20Mask;
1420	/** A20 gate state - boolean! */
1421	RTUINT fA20Enabled;
1422
1423	/** What needs syncing (PGM_SYNC_*).
1424	* This is used to queue operations for PGMSyncCR3, PGMInvalidatePage,
1425	* PGMFlushTLB, and PGMR3Load. */
1426	RTUINT fSyncFlags;
1427
1428	#if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32
1429	RTUINT uPadding3; /*< alignment padding. /
1430	#endif
1431	/** PGM critical section.
1432	* This protects the physical & virtual access handlers, ram ranges,
1433	* and the page flag updating (some of it anyway).
1434	*/
1435	PDMCRITSECT CritSect;
1436
1437	/** Shadow Page Pool - HC Ptr. */
1438	HCPTRTYPE(PPGMPOOL) pPoolHC;
1439	/** Shadow Page Pool - GC Ptr. */
1440	GCPTRTYPE(PPGMPOOL) pPoolGC;
1441
1442	/** Flush the cache on the next access. */
1443	bool fPhysCacheFlushPending;
1444	/** @todo r=bird: Fix member names!*/
1445	/** PGMPhysRead cache */
1446	PGMPHYSCACHE pgmphysreadcache;
1447	/** PGMPhysWrite cache */
1448	PGMPHYSCACHE pgmphyswritecache;
1449
1450	/** @name Release Statistics
1451	* @{ */
1452	/** The number of times the guest has switched mode since last reset or statistics reset. */
1453	STAMCOUNTER cGuestModeChanges;
1454	/** @} */
1455
1456	#ifdef VBOX_WITH_STATISTICS
1457	/** GC: Which statistic this \#PF should be attributed to. */
1458	GCPTRTYPE(PSTAMPROFILE) pStatTrap0eAttributionGC;
1459	RTGCPTR padding0;
1460	/** HC: Which statistic this \#PF should be attributed to. */
1461	HCPTRTYPE(PSTAMPROFILE) pStatTrap0eAttributionHC;
1462	RTHCPTR padding1;
1463	STAMPROFILE StatGCTrap0e; /*< GC: PGMGCTrap0eHandler() profiling. /
1464	STAMPROFILE StatTrap0eCSAM; /*< Profiling of the Trap0eHandler body when the cause is CSAM. /
1465	STAMPROFILE StatTrap0eDirtyAndAccessedBits; /*< Profiling of the Trap0eHandler body when the cause is dirty and/or accessed bit emulation. /
1466	STAMPROFILE StatTrap0eGuestTrap; /*< Profiling of the Trap0eHandler body when the cause is a guest trap. /
1467	STAMPROFILE StatTrap0eHndPhys; /*< Profiling of the Trap0eHandler body when the cause is a physical handler. /
1468	STAMPROFILE StatTrap0eHndVirt; /*< Profiling of the Trap0eHandler body when the cause is a virtual handler. /
1469	STAMPROFILE StatTrap0eHndUnhandled; /*< Profiling of the Trap0eHandler body when the cause is access outside the monitored areas of a monitored page. /
1470	STAMPROFILE StatTrap0eMisc; /*< Profiling of the Trap0eHandler body when the cause is not known. /
1471	STAMPROFILE StatTrap0eOutOfSync; /*< Profiling of the Trap0eHandler body when the cause is an out-of-sync page. /
1472	STAMPROFILE StatTrap0eOutOfSyncHndPhys; /*< Profiling of the Trap0eHandler body when the cause is an out-of-sync physical handler page. /
1473	STAMPROFILE StatTrap0eOutOfSyncHndVirt; /*< Profiling of the Trap0eHandler body when the cause is an out-of-sync virtual handler page. /
1474	STAMPROFILE StatTrap0eOutOfSyncObsHnd; /*< Profiling of the Trap0eHandler body when the cause is an obsolete handler page. /
1475	STAMPROFILE StatTrap0eSyncPT; /*< Profiling of the Trap0eHandler body when the cause is lazy syncing of a PT. /
1476
1477	STAMCOUNTER StatTrap0eMapHandler; /*< Number of traps due to access handlers in mappings. /
1478	STAMCOUNTER StatGCTrap0eConflicts; /*< GC: The number of times \#PF was caused by an undetected conflict. /
1479
1480	STAMCOUNTER StatGCTrap0eUSNotPresentRead;
1481	STAMCOUNTER StatGCTrap0eUSNotPresentWrite;
1482	STAMCOUNTER StatGCTrap0eUSWrite;
1483	STAMCOUNTER StatGCTrap0eUSReserved;
1484	STAMCOUNTER StatGCTrap0eUSRead;
1485
1486	STAMCOUNTER StatGCTrap0eSVNotPresentRead;
1487	STAMCOUNTER StatGCTrap0eSVNotPresentWrite;
1488	STAMCOUNTER StatGCTrap0eSVWrite;
1489	STAMCOUNTER StatGCTrap0eSVReserved;
1490
1491	STAMCOUNTER StatGCTrap0eUnhandled;
1492	STAMCOUNTER StatGCTrap0eMap;
1493
1494	/** GC: PGMSyncPT() profiling. */
1495	STAMPROFILE StatGCSyncPT;
1496	/** GC: The number of times PGMSyncPT() needed to allocate page tables. */
1497	STAMCOUNTER StatGCSyncPTAlloc;
1498	/** GC: The number of times PGMSyncPT() detected conflicts. */
1499	STAMCOUNTER StatGCSyncPTConflict;
1500	/** GC: The number of times PGMSyncPT() failed. */
1501	STAMCOUNTER StatGCSyncPTFailed;
1502	/** GC: PGMGCInvalidatePage() profiling. */
1503	STAMPROFILE StatGCInvalidatePage;
1504	/** GC: The number of times PGMGCInvalidatePage() was called for a 4KB page. */
1505	STAMCOUNTER StatGCInvalidatePage4KBPages;
1506	/** GC: The number of times PGMGCInvalidatePage() was called for a 4MB page. */
1507	STAMCOUNTER StatGCInvalidatePage4MBPages;
1508	/** GC: The number of times PGMGCInvalidatePage() skipped a 4MB page. */
1509	STAMCOUNTER StatGCInvalidatePage4MBPagesSkip;
1510	/** GC: The number of times PGMGCInvalidatePage() was called for a not accessed page directory. */
1511	STAMCOUNTER StatGCInvalidatePagePDNAs;
1512	/** GC: The number of times PGMGCInvalidatePage() was called for a not present page directory. */
1513	STAMCOUNTER StatGCInvalidatePagePDNPs;
1514	/** GC: The number of times PGMGCInvalidatePage() was called for a page directory containing mappings (no conflict). */
1515	STAMCOUNTER StatGCInvalidatePagePDMappings;
1516	/** GC: The number of times PGMGCInvalidatePage() was called for an out of sync page directory. */
1517	STAMCOUNTER StatGCInvalidatePagePDOutOfSync;
1518	/** HC: The number of times PGMGCInvalidatePage() was skipped due to not present shw or pending pending SyncCR3. */
1519	STAMCOUNTER StatGCInvalidatePageSkipped;
1520	/** GC: The number of times user page is out of sync was detected in GC. */
1521	STAMCOUNTER StatGCPageOutOfSyncUser;
1522	/** GC: The number of times supervisor page is out of sync was detected in GC. */
1523	STAMCOUNTER StatGCPageOutOfSyncSupervisor;
1524	/** GC: The number of dynamic page mapping cache hits */
1525	STAMCOUNTER StatDynMapCacheMisses;
1526	/** GC: The number of dynamic page mapping cache misses */
1527	STAMCOUNTER StatDynMapCacheHits;
1528	/** GC: The number of times pgmGCGuestPDWriteHandler() was successfully called. */
1529	STAMCOUNTER StatGCGuestCR3WriteHandled;
1530	/** GC: The number of times pgmGCGuestPDWriteHandler() was called and we had to fall back to the recompiler. */
1531	STAMCOUNTER StatGCGuestCR3WriteUnhandled;
1532	/** GC: The number of times pgmGCGuestPDWriteHandler() was called and a conflict was detected. */
1533	STAMCOUNTER StatGCGuestCR3WriteConflict;
1534	/** GC: Number of out-of-sync handled pages. */
1535	STAMCOUNTER StatHandlersOutOfSync;
1536	/** GC: Number of traps due to physical access handlers. */
1537	STAMCOUNTER StatHandlersPhysical;
1538	/** GC: Number of traps due to virtual access handlers. */
1539	STAMCOUNTER StatHandlersVirtual;
1540	/** GC: Number of traps due to virtual access handlers found by physical address. */
1541	STAMCOUNTER StatHandlersVirtualByPhys;
1542	/** GC: Number of traps due to virtual access handlers found by virtual address (without proper physical flags). */
1543	STAMCOUNTER StatHandlersVirtualUnmarked;
1544	/** GC: Number of traps due to access outside range of monitored page(s). */
1545	STAMCOUNTER StatHandlersUnhandled;
1546
1547	/** GC: The number of times pgmGCGuestROMWriteHandler() was successfully called. */
1548	STAMCOUNTER StatGCGuestROMWriteHandled;
1549	/** GC: The number of times pgmGCGuestROMWriteHandler() was called and we had to fall back to the recompiler */
1550	STAMCOUNTER StatGCGuestROMWriteUnhandled;
1551
1552	/** HC: PGMR3InvalidatePage() profiling. */
1553	STAMPROFILE StatHCInvalidatePage;
1554	/** HC: The number of times PGMR3InvalidatePage() was called for a 4KB page. */
1555	STAMCOUNTER StatHCInvalidatePage4KBPages;
1556	/** HC: The number of times PGMR3InvalidatePage() was called for a 4MB page. */
1557	STAMCOUNTER StatHCInvalidatePage4MBPages;
1558	/** HC: The number of times PGMR3InvalidatePage() skipped a 4MB page. */
1559	STAMCOUNTER StatHCInvalidatePage4MBPagesSkip;
1560	/** HC: The number of times PGMR3InvalidatePage() was called for a not accessed page directory. */
1561	STAMCOUNTER StatHCInvalidatePagePDNAs;
1562	/** HC: The number of times PGMR3InvalidatePage() was called for a not present page directory. */
1563	STAMCOUNTER StatHCInvalidatePagePDNPs;
1564	/** HC: The number of times PGMR3InvalidatePage() was called for a page directory containing mappings (no conflict). */
1565	STAMCOUNTER StatHCInvalidatePagePDMappings;
1566	/** HC: The number of times PGMGCInvalidatePage() was called for an out of sync page directory. */
1567	STAMCOUNTER StatHCInvalidatePagePDOutOfSync;
1568	/** HC: The number of times PGMR3InvalidatePage() was skipped due to not present shw or pending pending SyncCR3. */
1569	STAMCOUNTER StatHCInvalidatePageSkipped;
1570	/** HC: PGMR3SyncPT() profiling. */
1571	STAMPROFILE StatHCSyncPT;
1572	/** HC: pgmr3SyncPTResolveConflict() profiling (includes the entire relocation). */
1573	STAMPROFILE StatHCResolveConflict;
1574	/** HC: Number of times PGMR3CheckMappingConflicts() detected a conflict. */
1575	STAMCOUNTER StatHCDetectedConflicts;
1576	/** HC: The total number of times pgmHCGuestPDWriteHandler() was called. */
1577	STAMCOUNTER StatHCGuestPDWrite;
1578	/** HC: The number of times pgmHCGuestPDWriteHandler() detected a conflict */
1579	STAMCOUNTER StatHCGuestPDWriteConflict;
1580
1581	/** HC: The number of pages marked not present for accessed bit emulation. */
1582	STAMCOUNTER StatHCAccessedPage;
1583	/** HC: The number of pages marked read-only for dirty bit tracking. */
1584	STAMCOUNTER StatHCDirtyPage;
1585	/** HC: The number of pages marked read-only for dirty bit tracking. */
1586	STAMCOUNTER StatHCDirtyPageBig;
1587	/** HC: The number of traps generated for dirty bit tracking. */
1588	STAMCOUNTER StatHCDirtyPageTrap;
1589	/** HC: The number of pages already dirty or readonly. */
1590	STAMCOUNTER StatHCDirtyPageSkipped;
1591
1592	/** GC: The number of pages marked not present for accessed bit emulation. */
1593	STAMCOUNTER StatGCAccessedPage;
1594	/** GC: The number of pages marked read-only for dirty bit tracking. */
1595	STAMCOUNTER StatGCDirtyPage;
1596	/** GC: The number of pages marked read-only for dirty bit tracking. */
1597	STAMCOUNTER StatGCDirtyPageBig;
1598	/** GC: The number of traps generated for dirty bit tracking. */
1599	STAMCOUNTER StatGCDirtyPageTrap;
1600	/** GC: The number of pages already dirty or readonly. */
1601	STAMCOUNTER StatGCDirtyPageSkipped;
1602	/** GC: The number of pages marked dirty because of write accesses. */
1603	STAMCOUNTER StatGCDirtiedPage;
1604	/** GC: The number of pages already marked dirty because of write accesses. */
1605	STAMCOUNTER StatGCPageAlreadyDirty;
1606	/** GC: The number of real pages faults during dirty bit tracking. */
1607	STAMCOUNTER StatGCDirtyTrackRealPF;
1608
1609	/** GC: Profiling of the PGMTrackDirtyBit() body */
1610	STAMPROFILE StatGCDirtyBitTracking;
1611	/** HC: Profiling of the PGMTrackDirtyBit() body */
1612	STAMPROFILE StatHCDirtyBitTracking;
1613
1614	/** GC: Profiling of the PGMGstModifyPage() body */
1615	STAMPROFILE StatGCGstModifyPage;
1616	/** HC: Profiling of the PGMGstModifyPage() body */
1617	STAMPROFILE StatHCGstModifyPage;
1618
1619	/** GC: The number of time we've marked a PD not present from SyncPage to virtualize the accessed bit. */
1620	STAMCOUNTER StatGCSyncPagePDNAs;
1621	/** GC: The number of time we've encountered an out-of-sync PD in SyncPage. */
1622	STAMCOUNTER StatGCSyncPagePDOutOfSync;
1623	/** HC: The number of time we've marked a PD not present from SyncPage to virtualize the accessed bit. */
1624	STAMCOUNTER StatHCSyncPagePDNAs;
1625	/** HC: The number of time we've encountered an out-of-sync PD in SyncPage. */
1626	STAMCOUNTER StatHCSyncPagePDOutOfSync;
1627
1628	STAMCOUNTER StatSynPT4kGC;
1629	STAMCOUNTER StatSynPT4kHC;
1630	STAMCOUNTER StatSynPT4MGC;
1631	STAMCOUNTER StatSynPT4MHC;
1632
1633	/** Profiling of the PGMFlushTLB() body. */
1634	STAMPROFILE StatFlushTLB;
1635	/** The number of times PGMFlushTLB was called with a new CR3, non-global. (switch) */
1636	STAMCOUNTER StatFlushTLBNewCR3;
1637	/** The number of times PGMFlushTLB was called with a new CR3, global. (switch) */
1638	STAMCOUNTER StatFlushTLBNewCR3Global;
1639	/** The number of times PGMFlushTLB was called with the same CR3, non-global. (flush) */
1640	STAMCOUNTER StatFlushTLBSameCR3;
1641	/** The number of times PGMFlushTLB was called with the same CR3, global. (flush) */
1642	STAMCOUNTER StatFlushTLBSameCR3Global;
1643
1644	STAMPROFILE StatGCSyncCR3; /*< GC: PGMSyncCR3() profiling. /
1645	STAMPROFILE StatGCSyncCR3Handlers; /*< GC: Profiling of the PGMSyncCR3() update handler section. /
1646	STAMPROFILE StatGCSyncCR3HandlerVirtualReset; /*< GC: Profiling of the virtual handler resets. /
1647	STAMPROFILE StatGCSyncCR3HandlerVirtualUpdate; /*< GC: Profiling of the virtual handler updates. /
1648	STAMCOUNTER StatGCSyncCR3Global; /*< GC: The number of global CR3 syncs. /
1649	STAMCOUNTER StatGCSyncCR3NotGlobal; /*< GC: The number of non-global CR3 syncs. /
1650	STAMCOUNTER StatGCSyncCR3DstFreed; /*< GC: The number of times we've had to free a shadow entry. /
1651	STAMCOUNTER StatGCSyncCR3DstFreedSrcNP; /*< GC: The number of times we've had to free a shadow entry for which the source entry was not present. /
1652	STAMCOUNTER StatGCSyncCR3DstNotPresent; /*< GC: The number of times we've encountered a not present shadow entry for a present guest entry. /
1653	STAMCOUNTER StatGCSyncCR3DstSkippedGlobalPD; /*< GC: The number of times a global page directory wasn't flushed. /
1654	STAMCOUNTER StatGCSyncCR3DstSkippedGlobalPT; /*< GC: The number of times a page table with only global entries wasn't flushed. /
1655	STAMCOUNTER StatGCSyncCR3DstCacheHit; /*< GC: The number of times we got some kind of cache hit on a page table. /
1656
1657	STAMPROFILE StatHCSyncCR3; /*< HC: PGMSyncCR3() profiling. /
1658	STAMPROFILE StatHCSyncCR3Handlers; /*< HC: Profiling of the PGMSyncCR3() update handler section. /
1659	STAMPROFILE StatHCSyncCR3HandlerVirtualReset; /*< HC: Profiling of the virtual handler resets. /
1660	STAMPROFILE StatHCSyncCR3HandlerVirtualUpdate; /*< HC: Profiling of the virtual handler updates. /
1661	STAMCOUNTER StatHCSyncCR3Global; /*< HC: The number of global CR3 syncs. /
1662	STAMCOUNTER StatHCSyncCR3NotGlobal; /*< HC: The number of non-global CR3 syncs. /
1663	STAMCOUNTER StatHCSyncCR3DstFreed; /*< HC: The number of times we've had to free a shadow entry. /
1664	STAMCOUNTER StatHCSyncCR3DstFreedSrcNP; /*< HC: The number of times we've had to free a shadow entry for which the source entry was not present. /
1665	STAMCOUNTER StatHCSyncCR3DstNotPresent; /*< HC: The number of times we've encountered a not present shadow entry for a present guest entry. /
1666	STAMCOUNTER StatHCSyncCR3DstSkippedGlobalPD; /*< HC: The number of times a global page directory wasn't flushed. /
1667	STAMCOUNTER StatHCSyncCR3DstSkippedGlobalPT; /*< HC: The number of times a page table with only global entries wasn't flushed. /
1668	STAMCOUNTER StatHCSyncCR3DstCacheHit; /*< HC: The number of times we got some kind of cache hit on a page table. /
1669
1670	/** GC: Profiling of pgmHandlerVirtualFindByPhysAddr. */
1671	STAMPROFILE StatVirtHandleSearchByPhysGC;
1672	/** HC: Profiling of pgmHandlerVirtualFindByPhysAddr. */
1673	STAMPROFILE StatVirtHandleSearchByPhysHC;
1674	/** HC: The number of times PGMR3HandlerPhysicalReset is called. */
1675	STAMCOUNTER StatHandlePhysicalReset;
1676
1677	STAMPROFILE StatCheckPageFault;
1678	STAMPROFILE StatLazySyncPT;
1679	STAMPROFILE StatMapping;
1680	STAMPROFILE StatOutOfSync;
1681	STAMPROFILE StatHandlers;
1682	STAMPROFILE StatEIPHandlers;
1683	STAMPROFILE StatHCPrefetch;
1684
1685	# ifdef PGMPOOL_WITH_GCPHYS_TRACKING
1686	/** The number of first time shadowings. */
1687	STAMCOUNTER StatTrackVirgin;
1688	/** The number of times switching to cRef2, i.e. the page is being shadowed by two PTs. */
1689	STAMCOUNTER StatTrackAliased;
1690	/** The number of times we're tracking using cRef2. */
1691	STAMCOUNTER StatTrackAliasedMany;
1692	/** The number of times we're hitting pages which has overflowed cRef2. */
1693	STAMCOUNTER StatTrackAliasedLots;
1694	/** The number of times the extent list grows to long. */
1695	STAMCOUNTER StatTrackOverflows;
1696	/** Profiling of SyncPageWorkerTrackDeref (expensive). */
1697	STAMPROFILE StatTrackDeref;
1698	# endif
1699
1700	/** Allocated mbs of guest ram */
1701	STAMCOUNTER StatDynRamTotal;
1702	/** Nr of pgmr3PhysGrowRange calls. */
1703	STAMCOUNTER StatDynRamGrow;
1704
1705	STAMCOUNTER StatGCTrap0ePD[X86_PG_ENTRIES];
1706	STAMCOUNTER StatGCSyncPtPD[X86_PG_ENTRIES];
1707	STAMCOUNTER StatGCSyncPagePD[X86_PG_ENTRIES];
1708	#endif
1709	} PGM, *PPGM;
1710
1711
1712	/** @name PGM::fSyncFlags Flags
1713	* @{
1714	*/
1715	/** Updates the MM_RAM_FLAGS_VIRTUAL_HANDLER page bit. */
1716	#define PGM_SYNC_UPDATE_PAGE_BIT_VIRTUAL BIT(0)
1717	/** Always sync CR3. */
1718	#define PGM_SYNC_ALWAYS BIT(1)
1719	/** Check monitoring on next CR3 (re)load and invalidate page. */
1720	#define PGM_SYNC_MONITOR_CR3 BIT(2)
1721	/** Clear the page pool (a light weight flush). */
1722	#define PGM_SYNC_CLEAR_PGM_POOL BIT(8)
1723	/** @} */
1724
1725
1726	__BEGIN_DECLS
1727
1728	PGMGCDECL(int) pgmGCGuestPDWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, void pvFault, RTGCPHYS GCPhysFault, void pvUser);
1729	PGMDECL(int) pgmGuestROMWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, void pvFault, RTGCPHYS GCPhysFault, void pvUser);
1730	PGMGCDECL(int) pgmCachePTWriteGC(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser);
1731	int pgmR3SyncPTResolveConflict(PVM pVM, PPGMMAPPING pMapping, PVBOXPD pPDSrc, int iPDOld);
1732	PPGMMAPPING pgmGetMapping(PVM pVM, RTGCPTR GCPtr);
1733	void pgmR3MapRelocate(PVM pVM, PPGMMAPPING pMapping, int iPDOld, int iPDNew);
1734	int pgmR3ChangeMode(PVM pVM, PGMMODE enmGuestMode);
1735	int pgmLock(PVM pVM);
1736	void pgmUnlock(PVM pVM);
1737
1738	void pgmR3HandlerPhysicalUpdateAll(PVM pVM);
1739	int pgmHandlerVirtualFindByPhysAddr(PVM pVM, RTGCPHYS GCPhys, PPGMVIRTHANDLER ppVirt, unsigned piPage);
1740	DECLCALLBACK(int) pgmHandlerVirtualResetOne(PAVLROGCPTRNODECORE pNode, void *pvUser);
1741	#ifdef VBOX_STRICT
1742	void pgmHandlerVirtualDumpPhysPages(PVM pVM);
1743	#else
1744	# define pgmHandlerVirtualDumpPhysPages(a) do { } while (0)
1745	#endif
1746	DECLCALLBACK(void) pgmR3InfoHandlers(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
1747
1748
1749	#ifdef IN_RING3
1750	int pgmr3PhysGrowRange(PVM pVM, RTGCPHYS GCPhys);
1751
1752	int pgmR3PoolInit(PVM pVM);
1753	void pgmR3PoolRelocate(PVM pVM);
1754	void pgmR3PoolReset(PVM pVM);
1755
1756	#endif
1757	#ifdef IN_GC
1758	void *pgmGCPoolMapPage(PVM pVM, PPGMPOOLPAGE pPage);
1759	#endif
1760	int pgmPoolAlloc(PVM pVM, RTGCPHYS GCPhys, PGMPOOLKIND enmKind, uint16_t iUser, uint16_t iUserTable, PPPGMPOOLPAGE ppPage);
1761	PPGMPOOLPAGE pgmPoolGetPageByHCPhys(PVM pVM, RTHCPHYS HCPhys);
1762	void pgmPoolFree(PVM pVM, RTHCPHYS HCPhys, uint16_t iUser, uint16_t iUserTable);
1763	void pgmPoolFreeByPage(PPGMPOOL pPool, PPGMPOOLPAGE pPage, uint16_t iUser, uint16_t iUserTable);
1764	int pgmPoolFlushPage(PPGMPOOL pPool, PPGMPOOLPAGE pPage);
1765	void pgmPoolFlushAll(PVM pVM);
1766	void pgmPoolClearAll(PVM pVM);
1767	void pgmPoolTrackFlushGCPhysPT(PVM pVM, PRTHCPHYS pHCPhys, uint16_t iShw, uint16_t cRefs);
1768	void pgmPoolTrackFlushGCPhysPTs(PVM pVM, PRTHCPHYS pHCPhys, uint16_t iPhysExt);
1769	int pgmPoolTrackFlushGCPhysPTsSlow(PVM pVM, PRTHCPHYS pHCPhys);
1770	PPGMPOOLPHYSEXT pgmPoolTrackPhysExtAlloc(PVM pVM, uint16_t *piPhysExt);
1771	void pgmPoolTrackPhysExtFree(PVM pVM, uint16_t iPhysExt);
1772	void pgmPoolTrackPhysExtFreeList(PVM pVM, uint16_t iPhysExt);
1773	uint16_t pgmPoolTrackPhysExtAddref(PVM pVM, uint16_t u16, uint16_t iShwPT);
1774	void pgmPoolTrackPhysExtDerefGCPhys(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PRTHCPHYS pHCPhys);
1775	#ifdef PGMPOOL_WITH_MONITORING
1776	# ifdef IN_RING3
1777	void pgmPoolMonitorChainChanging(PPGMPOOL pPool, PPGMPOOLPAGE pPage, RTGCPHYS GCPhysFault, RTHCPTR pvAddress, PDISCPUSTATE pCpu);
1778	# else
1779	void pgmPoolMonitorChainChanging(PPGMPOOL pPool, PPGMPOOLPAGE pPage, RTGCPHYS GCPhysFault, RTGCPTR pvAddress, PDISCPUSTATE pCpu);
1780	# endif
1781	int pgmPoolMonitorChainFlush(PPGMPOOL pPool, PPGMPOOLPAGE pPage);
1782	void pgmPoolMonitorModifiedInsert(PPGMPOOL pPool, PPGMPOOLPAGE pPage);
1783	void pgmPoolMonitorModifiedClearAll(PVM pVM);
1784	int pgmPoolMonitorMonitorCR3(PPGMPOOL pPool, uint16_t idxRoot, RTGCPHYS GCPhysCR3);
1785	int pgmPoolMonitorUnmonitorCR3(PPGMPOOL pPool, uint16_t idxRoot);
1786	#endif
1787
1788	__END_DECLS
1789
1790
1791	/**
1792	* Convert GC Phys to HC Phys.
1793	*
1794	* @returns VBox status.
1795	* @param pPGM PGM handle.
1796	* @param GCPhys The GC physical address.
1797	* @param pHCPhys Where to store the corresponding HC physical address.
1798	*/
1799	DECLINLINE(int) PGMRamGCPhys2HCPhys(PPGM pPGM, RTGCPHYS GCPhys, PRTHCPHYS pHCPhys)
1800	{
1801	/*
1802	* Walk range list.
1803	*/
1804	PPGMRAMRANGE pRam = CTXSUFF(pPGM->pRamRanges);
1805	while (pRam)
1806	{
1807	RTGCPHYS off = GCPhys - pRam->GCPhys;
1808	if (off < pRam->cb)
1809	{
1810	unsigned iPage = off >> PAGE_SHIFT;
1811	/* Physical chunk in dynamically allocated range not present? */
1812	if (RT_UNLIKELY(!(pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK)))
1813	{
1814	#ifdef IN_RING3
1815	int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
1816	#else
1817	int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
1818	#endif
1819	if (rc != VINF_SUCCESS)
1820	return rc;
1821	}
1822	*pHCPhys = (pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK) \| (off & PAGE_OFFSET_MASK);
1823	return VINF_SUCCESS;
1824	}
1825
1826	pRam = CTXSUFF(pRam->pNext);
1827	}
1828	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
1829	}
1830
1831
1832	/**
1833	* Convert GC Phys to HC Virt.
1834	*
1835	* @returns VBox status.
1836	* @param pPGM PGM handle.
1837	* @param GCPhys The GC physical address.
1838	* @param pHCPtr Where to store the corresponding HC virtual address.
1839	*/
1840	DECLINLINE(int) PGMRamGCPhys2HCPtr(PPGM pPGM, RTGCPHYS GCPhys, PRTHCPTR pHCPtr)
1841	{
1842	/*
1843	* Walk range list.
1844	*/
1845	PPGMRAMRANGE pRam = CTXSUFF(pPGM->pRamRanges);
1846	while (pRam)
1847	{
1848	RTGCPHYS off = GCPhys - pRam->GCPhys;
1849	if (off < pRam->cb)
1850	{
1851	if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)
1852	{
1853	unsigned idx = (off >> PGM_DYNAMIC_CHUNK_SHIFT);
1854	/* Physical chunk in dynamically allocated range not present? */
1855	if (RT_UNLIKELY(!CTXSUFF(pRam->pavHCChunk)[idx]))
1856	{
1857	#ifdef IN_RING3
1858	int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
1859	#else
1860	int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
1861	#endif
1862	if (rc != VINF_SUCCESS)
1863	return rc;
1864	}
1865	*pHCPtr = (RTHCPTR)((RTHCUINTPTR)CTXSUFF(pRam->pavHCChunk)[idx] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));
1866	return VINF_SUCCESS;
1867	}
1868	if (pRam->pvHC)
1869	{
1870	*pHCPtr = (RTHCPTR)((RTHCUINTPTR)pRam->pvHC + off);
1871	return VINF_SUCCESS;
1872	}
1873	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
1874	}
1875
1876	pRam = CTXSUFF(pRam->pNext);
1877	}
1878	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
1879	}
1880
1881
1882	/**
1883	* Convert GC Phys to HC Virt.
1884	*
1885	* @returns VBox status.
1886	* @param PVM VM handle.
1887	* @param pRam Ram range
1888	* @param GCPhys The GC physical address.
1889	* @param pHCPtr Where to store the corresponding HC virtual address.
1890	*/
1891	DECLINLINE(int) PGMRamGCPhys2HCPtr(PVM pVM, PPGMRAMRANGE pRam, RTGCPHYS GCPhys, PRTHCPTR pHCPtr)
1892	{
1893	RTGCPHYS off = GCPhys - pRam->GCPhys;
1894	Assert(off < pRam->cb);
1895
1896	if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)
1897	{
1898	unsigned idx = (off >> PGM_DYNAMIC_CHUNK_SHIFT);
1899	/* Physical chunk in dynamically allocated range not present? */
1900	if (RT_UNLIKELY(!CTXSUFF(pRam->pavHCChunk)[idx]))
1901	{
1902	#ifdef IN_RING3
1903	int rc = pgmr3PhysGrowRange(pVM, GCPhys);
1904	#else
1905	int rc = CTXALLMID(VMM, CallHost)(pVM, VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
1906	#endif
1907	if (rc != VINF_SUCCESS)
1908	return rc;
1909	}
1910	*pHCPtr = (RTHCPTR)((RTHCUINTPTR)CTXSUFF(pRam->pavHCChunk)[idx] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));
1911	return VINF_SUCCESS;
1912	}
1913	if (pRam->pvHC)
1914	{
1915	*pHCPtr = (RTHCPTR)((RTHCUINTPTR)pRam->pvHC + off);
1916	return VINF_SUCCESS;
1917	}
1918	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
1919	}
1920
1921
1922	/**
1923	* Convert GC Phys to HC Virt and HC Phys.
1924	*
1925	* @returns VBox status.
1926	* @param pPGM PGM handle.
1927	* @param GCPhys The GC physical address.
1928	* @param pHCPtr Where to store the corresponding HC virtual address.
1929	* @param pHCPhys Where to store the HC Physical address and its flags.
1930	*/
1931	DECLINLINE(int) PGMRamGCPhys2HCPtrAndHCPhysWithFlags(PPGM pPGM, RTGCPHYS GCPhys, PRTHCPTR pHCPtr, PRTHCPHYS pHCPhys)
1932	{
1933	/*
1934	* Walk range list.
1935	*/
1936	PPGMRAMRANGE pRam = CTXSUFF(pPGM->pRamRanges);
1937	while (pRam)
1938	{
1939	RTGCPHYS off = GCPhys - pRam->GCPhys;
1940	if (off < pRam->cb)
1941	{
1942	unsigned iPage = off >> PAGE_SHIFT;
1943	/* Physical chunk in dynamically allocated range not present? */
1944	if (RT_UNLIKELY(!(pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK)))
1945	{
1946	#ifdef IN_RING3
1947	int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
1948	#else
1949	int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
1950	#endif
1951	if (rc != VINF_SUCCESS)
1952	return rc;
1953	}
1954	*pHCPhys = pRam->aHCPhys[iPage];
1955
1956	if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)
1957	{
1958	unsigned idx = (off >> PGM_DYNAMIC_CHUNK_SHIFT);
1959	*pHCPtr = (RTHCPTR)((RTHCUINTPTR)CTXSUFF(pRam->pavHCChunk)[idx] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));
1960	return VINF_SUCCESS;
1961	}
1962	if (pRam->pvHC)
1963	{
1964	*pHCPtr = (RTHCPTR)((RTHCUINTPTR)pRam->pvHC + off);
1965	return VINF_SUCCESS;
1966	}
1967	*pHCPtr = 0;
1968	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
1969	}
1970
1971	pRam = CTXSUFF(pRam->pNext);
1972	}
1973	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
1974	}
1975
1976
1977	/**
1978	* Convert GC Phys page to a page entry pointer.
1979	*
1980	* This is used by code which may have to update the flags.
1981	*
1982	* @returns VBox status.
1983	* @param pPGM PGM handle.
1984	* @param GCPhys The GC physical address.
1985	* @param ppHCPhys Where to store the pointer to the page entry.
1986	*/
1987	DECLINLINE(int) PGMRamGCPhys2PagePtr(PPGM pPGM, RTGCPHYS GCPhys, PRTHCPHYS *ppHCPhys)
1988	{
1989	/*
1990	* Walk range list.
1991	*/
1992	PPGMRAMRANGE pRam = CTXSUFF(pPGM->pRamRanges);
1993	while (pRam)
1994	{
1995	RTGCPHYS off = GCPhys - pRam->GCPhys;
1996	if (off < pRam->cb)
1997	{
1998	unsigned iPage = off >> PAGE_SHIFT;
1999	/* Physical chunk in dynamically allocated range not present? */
2000	if (RT_UNLIKELY(!(pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK)))
2001	{
2002	#ifdef IN_RING3
2003	int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
2004	#else
2005	int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2006	#endif
2007	if (rc != VINF_SUCCESS)
2008	return rc;
2009	}
2010	*ppHCPhys = &pRam->aHCPhys[iPage];
2011	return VINF_SUCCESS;
2012	}
2013
2014	pRam = CTXSUFF(pRam->pNext);
2015	}
2016	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2017	}
2018
2019
2020	/**
2021	* Convert GC Phys page to HC Phys page and flags.
2022	*
2023	* @returns VBox status.
2024	* @param pPGM PGM handle.
2025	* @param GCPhys The GC physical address.
2026	* @param pHCPhys Where to store the corresponding HC physical address of the page
2027	* and the page flags.
2028	*/
2029	DECLINLINE(int) PGMRamGCPhys2HCPhysWithFlags(PPGM pPGM, RTGCPHYS GCPhys, PRTHCPHYS pHCPhys)
2030	{
2031	/*
2032	* Walk range list.
2033	*/
2034	PPGMRAMRANGE pRam = CTXSUFF(pPGM->pRamRanges);
2035	while (pRam)
2036	{
2037	RTGCPHYS off = GCPhys - pRam->GCPhys;
2038	if (off < pRam->cb)
2039	{
2040	unsigned iPage = off >> PAGE_SHIFT;
2041	/* Physical chunk in dynamically allocated range not present? */
2042	if (RT_UNLIKELY(!(pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK)))
2043	{
2044	#ifdef IN_RING3
2045	int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
2046	#else
2047	int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2048	#endif
2049	if (rc != VINF_SUCCESS)
2050	return rc;
2051	}
2052	*pHCPhys = pRam->aHCPhys[iPage];
2053	return VINF_SUCCESS;
2054	}
2055
2056	pRam = CTXSUFF(pRam->pNext);
2057	}
2058	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2059	}
2060
2061
2062	/**
2063	* Clears flags associated with a RAM address.
2064	*
2065	* @returns VBox status code.
2066	* @param pPGM PGM handle.
2067	* @param GCPhys Guest context physical address.
2068	* @param fFlags fFlags to clear. (Bits 0-11.)
2069	*/
2070	DECLINLINE(int) PGMRamFlagsClearByGCPhys(PPGM pPGM, RTGCPHYS GCPhys, unsigned fFlags)
2071	{
2072	/*
2073	* Walk range list.
2074	*/
2075	PPGMRAMRANGE pRam = CTXSUFF(pPGM->pRamRanges);
2076	while (pRam)
2077	{
2078	RTGCPHYS off = GCPhys - pRam->GCPhys;
2079	if (off < pRam->cb)
2080	{
2081	unsigned iPage = off >> PAGE_SHIFT;
2082	/* Physical chunk in dynamically allocated range not present? */
2083	if (RT_UNLIKELY(!(pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK)))
2084	{
2085	#ifdef IN_RING3
2086	int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
2087	#else
2088	int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2089	#endif
2090	if (rc != VINF_SUCCESS)
2091	return rc;
2092	}
2093	fFlags &= ~X86_PTE_PAE_PG_MASK;
2094	pRam->aHCPhys[iPage] &= ~(RTHCPHYS)fFlags;
2095	return VINF_SUCCESS;
2096	}
2097
2098	pRam = CTXSUFF(pRam->pNext);
2099	}
2100	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2101	}
2102
2103
2104	/**
2105	* Clears flags associated with a RAM address.
2106	*
2107	* @returns VBox status code.
2108	* @param pPGM PGM handle.
2109	* @param GCPhys Guest context physical address.
2110	* @param fFlags fFlags to clear. (Bits 0-11.)
2111	* @param ppRamHint Where to read and store the ram list hint.
2112	* The caller initializes this to NULL before the call.
2113	*/
2114	DECLINLINE(int) PGMRamFlagsClearByGCPhysWithHint(PPGM pPGM, RTGCPHYS GCPhys, unsigned fFlags, PPGMRAMRANGE *ppRamHint)
2115	{
2116	/*
2117	* Check the hint.
2118	*/
2119	PPGMRAMRANGE pRam = *ppRamHint;
2120	if (pRam)
2121	{
2122	RTGCPHYS off = GCPhys - pRam->GCPhys;
2123	if (off < pRam->cb)
2124	{
2125	unsigned iPage = off >> PAGE_SHIFT;
2126	/* Physical chunk in dynamically allocated range not present? */
2127	if (RT_UNLIKELY(!(pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK)))
2128	{
2129	#ifdef IN_RING3
2130	int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
2131	#else
2132	int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2133	#endif
2134	if (rc != VINF_SUCCESS)
2135	return rc;
2136	}
2137	fFlags &= ~X86_PTE_PAE_PG_MASK;
2138	pRam->aHCPhys[iPage] &= ~(RTHCPHYS)fFlags;
2139	return VINF_SUCCESS;
2140	}
2141	}
2142
2143	/*
2144	* Walk range list.
2145	*/
2146	pRam = CTXSUFF(pPGM->pRamRanges);
2147	while (pRam)
2148	{
2149	RTGCPHYS off = GCPhys - pRam->GCPhys;
2150	if (off < pRam->cb)
2151	{
2152	unsigned iPage = off >> PAGE_SHIFT;
2153	/* Physical chunk in dynamically allocated range not present? */
2154	if (RT_UNLIKELY(!(pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK)))
2155	{
2156	#ifdef IN_RING3
2157	int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
2158	#else
2159	int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2160	#endif
2161	if (rc != VINF_SUCCESS)
2162	return rc;
2163	}
2164	fFlags &= ~X86_PTE_PAE_PG_MASK;
2165	pRam->aHCPhys[iPage] &= ~(RTHCPHYS)fFlags;
2166	*ppRamHint = pRam;
2167	return VINF_SUCCESS;
2168	}
2169
2170	pRam = CTXSUFF(pRam->pNext);
2171	}
2172	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2173	}
2174
2175	/**
2176	* Sets (bitwise OR) flags associated with a RAM address.
2177	*
2178	* @returns VBox status code.
2179	* @param pPGM PGM handle.
2180	* @param GCPhys Guest context physical address.
2181	* @param fFlags fFlags to set clear. (Bits 0-11.)
2182	*/
2183	DECLINLINE(int) PGMRamFlagsSetByGCPhys(PPGM pPGM, RTGCPHYS GCPhys, unsigned fFlags)
2184	{
2185	/*
2186	* Walk range list.
2187	*/
2188	PPGMRAMRANGE pRam = CTXSUFF(pPGM->pRamRanges);
2189	while (pRam)
2190	{
2191	RTGCPHYS off = GCPhys - pRam->GCPhys;
2192	if (off < pRam->cb)
2193	{
2194	unsigned iPage = off >> PAGE_SHIFT;
2195	/* Physical chunk in dynamically allocated range not present? */
2196	if (RT_UNLIKELY(!(pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK)))
2197	{
2198	#ifdef IN_RING3
2199	int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
2200	#else
2201	int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2202	#endif
2203	if (rc != VINF_SUCCESS)
2204	return rc;
2205	}
2206	fFlags &= ~X86_PTE_PAE_PG_MASK;
2207	pRam->aHCPhys[iPage] \|= fFlags;
2208	return VINF_SUCCESS;
2209	}
2210
2211	pRam = CTXSUFF(pRam->pNext);
2212	}
2213	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2214	}
2215
2216	/**
2217	* Sets (bitwise OR) flags associated with a RAM address.
2218	*
2219	* @returns VBox status code.
2220	* @param pPGM PGM handle.
2221	* @param GCPhys Guest context physical address.
2222	* @param fFlags fFlags to set clear. (Bits 0-11.)
2223	* @param ppRamHint Where to read and store the ram list hint.
2224	* The caller initializes this to NULL before the call.
2225	*/
2226	DECLINLINE(int) PGMRamFlagsSetByGCPhysWithHint(PPGM pPGM, RTGCPHYS GCPhys, unsigned fFlags, PPGMRAMRANGE *ppRamHint)
2227	{
2228	/*
2229	* Check the hint.
2230	*/
2231	PPGMRAMRANGE pRam = *ppRamHint;
2232	if (pRam)
2233	{
2234	RTGCPHYS off = GCPhys - pRam->GCPhys;
2235	if (off < pRam->cb)
2236	{
2237	unsigned iPage = off >> PAGE_SHIFT;
2238	/* Physical chunk in dynamically allocated range not present? */
2239	if (RT_UNLIKELY(!(pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK)))
2240	{
2241	#ifdef IN_RING3
2242	int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
2243	#else
2244	int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2245	#endif
2246	if (rc != VINF_SUCCESS)
2247	return rc;
2248	}
2249	fFlags &= ~X86_PTE_PAE_PG_MASK;
2250	pRam->aHCPhys[iPage] \|= fFlags;
2251	return VINF_SUCCESS;
2252	}
2253	}
2254
2255	/*
2256	* Walk range list.
2257	*/
2258	pRam = CTXSUFF(pPGM->pRamRanges);
2259	while (pRam)
2260	{
2261	RTGCPHYS off = GCPhys - pRam->GCPhys;
2262	if (off < pRam->cb)
2263	{
2264	unsigned iPage = off >> PAGE_SHIFT;
2265	/* Physical chunk in dynamically allocated range not present? */
2266	if (RT_UNLIKELY(!(pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK)))
2267	{
2268	#ifdef IN_RING3
2269	int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
2270	#else
2271	int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2272	#endif
2273	if (rc != VINF_SUCCESS)
2274	return rc;
2275	}
2276	fFlags &= ~X86_PTE_PAE_PG_MASK;
2277	pRam->aHCPhys[iPage] \|= fFlags;
2278	*ppRamHint = pRam;
2279	return VINF_SUCCESS;
2280	}
2281
2282	pRam = CTXSUFF(pRam->pNext);
2283	}
2284	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2285	}
2286
2287
2288	/**
2289	* Gets the page directory for the specified address.
2290	*
2291	* @returns Pointer to the page directory in question.
2292	* @returns NULL if the page directory is not present or on an invalid page.
2293	* @param pPGM Pointer to the PGM instance data.
2294	* @param GCPtr The address.
2295	*/
2296	DECLINLINE(PX86PDPAE) pgmGstGetPaePD(PPGM pPGM, RTGCUINTPTR GCPtr)
2297	{
2298	const unsigned iPdPtr = GCPtr >> X86_PDPTR_SHIFT;
2299	if (CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].n.u1Present)
2300	{
2301	if ((CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK) == pPGM->aGCPhysGstPaePDs[iPdPtr])
2302	return CTXSUFF(pPGM->apGstPaePDs)[iPdPtr];
2303
2304	/* cache is out-of-sync. */
2305	PX86PDPAE pPD;
2306	int rc = PGM_GCPHYS_2_PTR(PGM2VM(pPGM), CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK, &pPD);
2307	if (VBOX_SUCCESS(rc))
2308	return pPD;
2309	AssertMsgFailed(("Impossible! rc=%d PDPE=%#llx\n", rc, CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u));
2310	/* returning NIL_RTGCPHYS is ok if we assume it's just an invalid page of some kind emualted as all 0s. */
2311	}
2312	return NULL;
2313	}
2314
2315
2316	/**
2317	* Gets the page directory entry for the specified address.
2318	*
2319	* @returns Pointer to the page directory entry in question.
2320	* @returns NULL if the page directory is not present or on an invalid page.
2321	* @param pPGM Pointer to the PGM instance data.
2322	* @param GCPtr The address.
2323	*/
2324	DECLINLINE(PX86PDEPAE) pgmGstGetPaePDEPtr(PPGM pPGM, RTGCUINTPTR GCPtr)
2325	{
2326	const unsigned iPdPtr = GCPtr >> X86_PDPTR_SHIFT;
2327	if (CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].n.u1Present)
2328	{
2329	const unsigned iPD = (GCPtr >> X86_PD_PAE_SHIFT) & X86_PD_PAE_MASK;
2330	if ((CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK) == pPGM->aGCPhysGstPaePDs[iPdPtr])
2331	return &CTXSUFF(pPGM->apGstPaePDs)[iPdPtr]->a[iPD];
2332
2333	/* cache is out-of-sync. */
2334	PX86PDPAE pPD;
2335	int rc = PGM_GCPHYS_2_PTR(PGM2VM(pPGM), CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK, &pPD);
2336	if (VBOX_SUCCESS(rc))
2337	return &pPD->a[iPD];
2338	AssertMsgFailed(("Impossible! rc=%d PDPE=%#llx\n", rc, CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u));
2339	/* returning NIL_RTGCPHYS is ok if we assume it's just an invalid page or something which we'll emulate as all 0s. */
2340	}
2341	return NULL;
2342	}
2343
2344
2345	/**
2346	* Gets the page directory entry for the specified address.
2347	*
2348	* @returns The page directory entry in question.
2349	* @returns A non-present entry if the page directory is not present or on an invalid page.
2350	* @param pPGM Pointer to the PGM instance data.
2351	* @param GCPtr The address.
2352	*/
2353	DECLINLINE(uint64_t) pgmGstGetPaePDE(PPGM pPGM, RTGCUINTPTR GCPtr)
2354	{
2355	const unsigned iPdPtr = GCPtr >> X86_PDPTR_SHIFT;
2356	if (CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].n.u1Present)
2357	{
2358	const unsigned iPD = (GCPtr >> X86_PD_PAE_SHIFT) & X86_PD_PAE_MASK;
2359	if ((CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK) == pPGM->aGCPhysGstPaePDs[iPdPtr])
2360	return CTXSUFF(pPGM->apGstPaePDs)[iPdPtr]->a[iPD].u;
2361
2362	/* cache is out-of-sync. */
2363	PX86PDPAE pPD;
2364	int rc = PGM_GCPHYS_2_PTR(PGM2VM(pPGM), CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK, &pPD);
2365	if (VBOX_SUCCESS(rc))
2366	return pPD->a[iPD].u;
2367	AssertMsgFailed(("Impossible! rc=%d PDPE=%#llx\n", rc, CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u));
2368	}
2369	return 0;
2370	}
2371
2372
2373	/**
2374	* Checks if any of the specified page flags are set for the given page.
2375	*
2376	* @returns true if any of the flags are set.
2377	* @returns false if all the flags are clear.
2378	* @param pPGM PGM handle.
2379	* @param GCPhys The GC physical address.
2380	* @param fFlags The flags to check for.
2381	*/
2382	DECLINLINE(bool) PGMRamTestFlags(PPGM pPGM, RTGCPHYS GCPhys, uint64_t fFlags)
2383	{
2384	/*
2385	* Walk range list.
2386	*/
2387	for (PPGMRAMRANGE pRam = CTXSUFF(pPGM->pRamRanges);
2388	pRam;
2389	pRam = CTXSUFF(pRam->pNext))
2390	{
2391	RTGCPHYS off = GCPhys - pRam->GCPhys;
2392	if (off < pRam->cb)
2393	return (pRam->aHCPhys[off >> PAGE_SHIFT] & fFlags) != 0;
2394	}
2395	return false;
2396	}
2397
2398
2399	/**
2400	* Gets the ram flags for a handler.
2401	*
2402	* @returns The ram flags.
2403	* @param pCur The physical handler in question.
2404	*/
2405	DECLINLINE(unsigned) pgmHandlerPhysicalCalcFlags(PPGMPHYSHANDLER pCur)
2406	{
2407	switch (pCur->enmType)
2408	{
2409	case PGMPHYSHANDLERTYPE_PHYSICAL:
2410	return MM_RAM_FLAGS_PHYSICAL_HANDLER;
2411
2412	case PGMPHYSHANDLERTYPE_PHYSICAL_WRITE:
2413	return MM_RAM_FLAGS_PHYSICAL_HANDLER \| MM_RAM_FLAGS_PHYSICAL_WRITE;
2414
2415	case PGMPHYSHANDLERTYPE_MMIO:
2416	case PGMPHYSHANDLERTYPE_PHYSICAL_ALL:
2417	return MM_RAM_FLAGS_PHYSICAL_HANDLER \| MM_RAM_FLAGS_PHYSICAL_ALL;
2418
2419	default:
2420	AssertFatalMsgFailed(("Invalid type %d\n", pCur->enmType));
2421	}
2422	}
2423
2424
2425	/**
2426	* Clears one physical page of a virtual handler
2427	*
2428	* @param pPGM Pointer to the PGM instance.
2429	* @param pCur Virtual handler structure
2430	* @param iPage Physical page index
2431	*/
2432	DECLINLINE(void) pgmHandlerVirtualClearPage(PPGM pPGM, PPGMVIRTHANDLER pCur, unsigned iPage)
2433	{
2434	const PPGMPHYS2VIRTHANDLER pPhys2Virt = &pCur->aPhysToVirt[iPage];
2435
2436	/*
2437	* Remove the node from the tree (it's supposed to be in the tree if we get here!).
2438	*/
2439	#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
2440	AssertReleaseMsg(pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_IN_TREE,
2441	("pPhys2Virt=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32}\n",
2442	pPhys2Virt, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler, pPhys2Virt->offNextAlias));
2443	#endif
2444	if (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_IS_HEAD)
2445	{
2446	/* We're the head of the alias chain. */
2447	PPGMPHYS2VIRTHANDLER pRemove = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysRemove(&pPGM->CTXSUFF(pTrees)->PhysToVirtHandlers, pPhys2Virt->Core.Key); NOREF(pRemove);
2448	#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
2449	AssertReleaseMsg(pRemove != NULL,
2450	("pPhys2Virt=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32}\n",
2451	pPhys2Virt, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler, pPhys2Virt->offNextAlias));
2452	AssertReleaseMsg(pRemove == pPhys2Virt,
2453	("wanted: pPhys2Virt=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32}\n"
2454	" got: pRemove=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32}\n",
2455	pPhys2Virt, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler, pPhys2Virt->offNextAlias,
2456	pRemove, pRemove->Core.Key, pRemove->Core.KeyLast, pRemove->offVirtHandler, pRemove->offNextAlias));
2457	#endif
2458	if (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK)
2459	{
2460	/* Insert the next list in the alias chain into the tree. */
2461	PPGMPHYS2VIRTHANDLER pNext = (PPGMPHYS2VIRTHANDLER)((intptr_t)pPhys2Virt + (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK));
2462	#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
2463	AssertReleaseMsg(pNext->offNextAlias & PGMPHYS2VIRTHANDLER_IN_TREE,
2464	("pNext=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32}\n",
2465	pNext, pNext->Core.Key, pNext->Core.KeyLast, pNext->offVirtHandler, pNext->offNextAlias));
2466	#endif
2467	pNext->offNextAlias \|= PGMPHYS2VIRTHANDLER_IS_HEAD;
2468	bool fRc = RTAvlroGCPhysInsert(&pPGM->CTXSUFF(pTrees)->PhysToVirtHandlers, &pNext->Core);
2469	AssertRelease(fRc);
2470	}
2471	}
2472	else
2473	{
2474	/* Locate the previous node in the alias chain. */
2475	PPGMPHYS2VIRTHANDLER pPrev = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysGet(&pPGM->CTXSUFF(pTrees)->PhysToVirtHandlers, pPhys2Virt->Core.Key);
2476	#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
2477	AssertReleaseMsg(pPrev != pPhys2Virt,
2478	("pPhys2Virt=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32} pPrev=%p\n",
2479	pPhys2Virt, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler, pPhys2Virt->offNextAlias, pPrev));
2480	#endif
2481	for (;;)
2482	{
2483	PPGMPHYS2VIRTHANDLER pNext = (PPGMPHYS2VIRTHANDLER)((intptr_t)pPrev + (pPrev->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK));
2484	if (pNext == pPhys2Virt)
2485	{
2486	/* unlink. */
2487	LogFlow(("pgmHandlerVirtualClearPage: removed %p:{.offNextAlias=%#RX32} from alias chain. prev %p:{.offNextAlias=%#RX32} [%VGp-%VGp]\n",
2488	pPhys2Virt, pPhys2Virt->offNextAlias, pPrev, pPrev->offNextAlias, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast));
2489	if (!(pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK))
2490	pPrev->offNextAlias &= ~PGMPHYS2VIRTHANDLER_OFF_MASK;
2491	else
2492	{
2493	PPGMPHYS2VIRTHANDLER pNewNext = (PPGMPHYS2VIRTHANDLER)((intptr_t)pPhys2Virt + (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK));
2494	pPrev->offNextAlias = ((intptr_t)pNewNext - (intptr_t)pPrev)
2495	\| (pPrev->offNextAlias & ~PGMPHYS2VIRTHANDLER_OFF_MASK);
2496	}
2497	break;
2498	}
2499
2500	/* next */
2501	if (pNext == pPrev)
2502	{
2503	#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
2504	AssertReleaseMsg(pNext != pPrev,
2505	("pPhys2Virt=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32} pPrev=%p\n",
2506	pPhys2Virt, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler, pPhys2Virt->offNextAlias, pPrev));
2507	#endif
2508	break;
2509	}
2510	pPrev = pNext;
2511	}
2512	}
2513	Log2(("PHYS2VIRT: Removing %VGp-%VGp %#RX32 %s\n",
2514	pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offNextAlias, HCSTRING(pCur->pszDesc)));
2515	pPhys2Virt->offNextAlias = 0;
2516	pPhys2Virt->Core.KeyLast = NIL_RTGCPHYS; /* require reinsert */
2517
2518	/*
2519	* Clear the ram flags for this page.
2520	*/
2521	int rc = PGMRamFlagsClearByGCPhys(pPGM, pPhys2Virt->Core.Key,
2522	MM_RAM_FLAGS_VIRTUAL_HANDLER \| MM_RAM_FLAGS_VIRTUAL_ALL \| MM_RAM_FLAGS_VIRTUAL_WRITE);
2523	AssertRC(rc);
2524	}
2525
2526
2527	/**
2528	* Internal worker for finding a 'in-use' shadow page give by it's physical address.
2529	*
2530	* @returns Pointer to the shadow page structure.
2531	* @param pPool The pool.
2532	* @param HCPhys The HC physical address of the shadow page.
2533	*/
2534	DECLINLINE(PPGMPOOLPAGE) pgmPoolGetPage(PPGMPOOL pPool, RTHCPHYS HCPhys)
2535	{
2536	/*
2537	* Look up the page.
2538	*/
2539	PPGMPOOLPAGE pPage = (PPGMPOOLPAGE)RTAvloHCPhysGet(&pPool->HCPhysTree, HCPhys & X86_PTE_PAE_PG_MASK);
2540	AssertFatalMsg(pPage && pPage->enmKind != PGMPOOLKIND_FREE, ("HCPhys=%VHp pPage=%p type=%d\n", HCPhys, pPage, (pPage) ? pPage->enmKind : 0));
2541	return pPage;
2542	}
2543
2544
2545	/**
2546	* Internal worker for finding a 'in-use' shadow page give by it's physical address.
2547	*
2548	* @returns Pointer to the shadow page structure.
2549	* @param pPool The pool.
2550	* @param idx The pool page index.
2551	*/
2552	DECLINLINE(PPGMPOOLPAGE) pgmPoolGetPageByIdx(PPGMPOOL pPool, unsigned idx)
2553	{
2554	AssertFatalMsg(idx >= PGMPOOL_IDX_FIRST && idx < pPool->cCurPages, ("idx=%d\n", idx));
2555	return &pPool->aPages[idx];
2556	}
2557
2558
2559	#ifdef PGMPOOL_WITH_GCPHYS_TRACKING
2560	/**
2561	* Clear references to guest physical memory.
2562	*
2563	* @param pPool The pool.
2564	* @param pPage The page.
2565	* @param pHCPhys Pointer to the aHCPhys entry in the ram range.
2566	*/
2567	DECLINLINE(void) pgmTrackDerefGCPhys(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PRTHCPHYS pHCPhys)
2568	{
2569	/*
2570	* Just deal with the simple case here.
2571	*/
2572	#ifdef LOG_ENABLED
2573	const RTHCPHYS HCPhysOrg = *pHCPhys;
2574	#endif
2575	const unsigned cRefs = *pHCPhys >> MM_RAM_FLAGS_CREFS_SHIFT;
2576	if (cRefs == 1)
2577	{
2578	Assert(pPage->idx == ((*pHCPhys >> MM_RAM_FLAGS_IDX_SHIFT) & MM_RAM_FLAGS_IDX_MASK));
2579	pHCPhys = pHCPhys & MM_RAM_FLAGS_NO_REFS_MASK;
2580	}
2581	else
2582	pgmPoolTrackPhysExtDerefGCPhys(pPool, pPage, pHCPhys);
2583	LogFlow(("pgmTrackDerefGCPhys: pHCPhys=%RHp -> %RHp\n", HCPhysOrg, pHCPhys));
2584	}
2585	#endif
2586
2587
2588	#ifdef PGMPOOL_WITH_CACHE
2589	/**
2590	* Moves the page to the head of the age list.
2591	*
2592	* This is done when the cached page is used in one way or another.
2593	*
2594	* @param pPool The pool.
2595	* @param pPage The cached page.
2596	* @todo inline in PGMInternal.h!
2597	*/
2598	DECLINLINE(void) pgmPoolCacheUsed(PPGMPOOL pPool, PPGMPOOLPAGE pPage)
2599	{
2600	/*
2601	* Move to the head of the age list.
2602	*/
2603	if (pPage->iAgePrev != NIL_PGMPOOL_IDX)
2604	{
2605	/* unlink */
2606	pPool->aPages[pPage->iAgePrev].iAgeNext = pPage->iAgeNext;
2607	if (pPage->iAgeNext != NIL_PGMPOOL_IDX)
2608	pPool->aPages[pPage->iAgeNext].iAgePrev = pPage->iAgePrev;
2609	else
2610	pPool->iAgeTail = pPage->iAgePrev;
2611
2612	/* insert at head */
2613	pPage->iAgePrev = NIL_PGMPOOL_IDX;
2614	pPage->iAgeNext = pPool->iAgeHead;
2615	Assert(pPage->iAgeNext != NIL_PGMPOOL_IDX); /* we would've already been head then */
2616	pPool->iAgeHead = pPage->idx;
2617	pPool->aPages[pPage->iAgeNext].iAgePrev = pPage->idx;
2618	}
2619	}
2620	#endif /* PGMPOOL_WITH_CACHE */
2621
2622	/**
2623	* Tells if mappings are to be put into the shadow page table or not
2624	*
2625	* @returns boolean result
2626	* @param pVM VM handle.
2627	*/
2628
2629	DECLINLINE(bool) pgmMapAreMappingsEnabled(PPGM pPGM)
2630	{
2631	return !pPGM->fDisableMappings;
2632	}
2633
2634	/** @} */
2635
2636	#endif

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source: vbox/trunk/src/VBox/VMM/PGMInternal.h@ 552

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