VirtualBox

source: vbox/trunk/src/VBox/VMM/PGMInternal.h@ 454

Last change on this file since 454 was 454, checked in by vboxsync, 18 years ago

Aligned PGMPOOL and PGMPOOLPAGE.
  • Property svn:eol-style set to native
  • Property svn:keywords set to Id
File size: 110.3 KB
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1/* $Id: PGMInternal.h 454 2007-01-31 00:02:36Z vboxsync $ */
2/** @file
3 * PGM - Internal header file.
4 */
5
6/*
7 * Copyright (C) 2006 InnoTek Systemberatung GmbH
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License as published by the Free Software Foundation,
13 * in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
14 * distribution. VirtualBox OSE is distributed in the hope that it will
15 * be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * If you received this file as part of a commercial VirtualBox
18 * distribution, then only the terms of your commercial VirtualBox
19 * license agreement apply instead of the previous paragraph.
20 */
21
22#ifndef __PGMInternal_h__
23#define __PGMInternal_h__
24
25#include <VBox/cdefs.h>
26#include <VBox/types.h>
27#include <VBox/err.h>
28#include <VBox/stam.h>
29#include <VBox/param.h>
30#include <VBox/vmm.h>
31#include <VBox/mm.h>
32#include <VBox/pdm.h>
33#include <iprt/avl.h>
34#include <iprt/assert.h>
35#include <iprt/critsect.h>
36
37#if !defined(IN_PGM_R3) && !defined(IN_PGM_R0) && !defined(IN_PGM_GC)
38# error "Not in PGM! This is an internal header!"
39#endif
40
41
42/** @defgroup grp_pgm_int Internals
43 * @ingroup grp_pgm
44 * @internal
45 * @{
46 */
47
48
49/** @name PGM Compile Time Config
50 * @{
51 */
52
53/**
54 * Solve page is out of sync issues inside Guest Context (in PGMGC.cpp).
55 * Comment it if it will break something.
56 */
57#define PGM_OUT_OF_SYNC_IN_GC
58
59/**
60 * Virtualize the dirty bit
61 * This also makes a half-hearted attempt at the accessed bit. For full
62 * accessed bit virtualization define PGM_SYNC_ACCESSED_BIT.
63 */
64#define PGM_SYNC_DIRTY_BIT
65
66/**
67 * Fully virtualize the accessed bit.
68 * @remark This requires SYNC_DIRTY_ACCESSED_BITS to be defined!
69 */
70#define PGM_SYNC_ACCESSED_BIT
71
72/**
73 * Check and skip global PDEs for non-global flushes
74 */
75#define PGM_SKIP_GLOBAL_PAGEDIRS_ON_NONGLOBAL_FLUSH
76
77/**
78 * Sync N pages instead of a whole page table
79 */
80#define PGM_SYNC_N_PAGES
81
82/**
83 * Number of pages to sync during a page fault
84 *
85 * When PGMPOOL_WITH_GCPHYS_TRACKING is enabled using high values here
86 * causes a lot of unnecessary extents and also is slower than taking more \#PFs.
87 */
88#define PGM_SYNC_NR_PAGES 8
89
90/**
91 * Number of PGMPhysRead/Write cache entries (must be <= sizeof(uint64_t))
92 */
93#define PGM_MAX_PHYSCACHE_ENTRIES 64
94#define PGM_MAX_PHYSCACHE_ENTRIES_MASK (PGM_MAX_PHYSCACHE_ENTRIES-1)
95
96/**
97 * Enable caching of PGMR3PhysRead/WriteByte/Word/Dword
98 */
99#define PGM_PHYSMEMACCESS_CACHING
100
101/*
102 * Assert Sanity.
103 */
104#if defined(PGM_SYNC_ACCESSED_BIT) && !defined(PGM_SYNC_DIRTY_BIT)
105# error "PGM_SYNC_ACCESSED_BIT requires PGM_SYNC_DIRTY_BIT!"
106#endif
107
108/** @def PGMPOOL_WITH_CACHE
109 * Enable agressive caching using the page pool.
110 *
111 * This requires PGMPOOL_WITH_USER_TRACKING and PGMPOOL_WITH_MONITORING.
112 */
113#define PGMPOOL_WITH_CACHE
114
115/** @def PGMPOOL_WITH_MIXED_PT_CR3
116 * When defined, we'll deal with 'uncachable' pages.
117 */
118#ifdef PGMPOOL_WITH_CACHE
119# define PGMPOOL_WITH_MIXED_PT_CR3
120#endif
121
122/** @def PGMPOOL_WITH_MONITORING
123 * Monitor the guest pages which are shadowed.
124 * When this is enabled, PGMPOOL_WITH_CACHE or PGMPOOL_WITH_GCPHYS_TRACKING must
125 * be enabled as well.
126 * @remark doesn't really work without caching now. (Mixed PT/CR3 change.)
127 */
128#ifdef PGMPOOL_WITH_CACHE
129# define PGMPOOL_WITH_MONITORING
130#endif
131
132/** @def PGMPOOL_WITH_GCPHYS_TRACKING
133 * Tracking the of shadow pages mapping guest physical pages.
134 *
135 * This is very expensive, the current cache prototype is trying to figure out
136 * whether it will be acceptable with an agressive caching policy.
137 */
138#if defined(PGMPOOL_WITH_CACHE) || defined(PGMPOOL_WITH_MONITORING)
139# define PGMPOOL_WITH_GCPHYS_TRACKING
140#endif
141
142/** @def PGMPOOL_WITH_USER_TRACKING
143 * Tracking users of shadow pages. This is required for the linking of shadow page
144 * tables and physical guest addresses.
145 */
146#if defined(PGMPOOL_WITH_GCPHYS_TRACKING) || defined(PGMPOOL_WITH_CACHE) || defined(PGMPOOL_WITH_MONITORING)
147# define PGMPOOL_WITH_USER_TRACKING
148#endif
149
150/** @def PGMPOOL_CFG_MAX_GROW
151 * The maximum number of pages to add to the pool in one go.
152 */
153#define PGMPOOL_CFG_MAX_GROW (_256K >> PAGE_SHIFT)
154
155/** @def VBOX_STRICT_PGM_HANDLER_VIRTUAL
156 * Enables some extra assertions for virtual handlers (mainly phys2virt related).
157 */
158#ifdef VBOX_STRICT
159# define VBOX_STRICT_PGM_HANDLER_VIRTUAL
160#endif
161/** @} */
162
163
164/** @name PDPTR and PML4 flags.
165 * These are placed in the three bits available for system programs in
166 * the PDPTR and PML4 entries.
167 * @{ */
168/** The entry is a permanent one and it's must always be present.
169 * Never free such an entry. */
170#define PGM_PLXFLAGS_PERMANENT BIT64(10)
171/** @} */
172
173/** @name Page directory flags.
174 * These are placed in the three bits available for system programs in
175 * the page directory entries.
176 * @{ */
177/** Mapping (hypervisor allocated pagetable). */
178#define PGM_PDFLAGS_MAPPING BIT64(10)
179/** Made read-only to facilitate dirty bit tracking. */
180#define PGM_PDFLAGS_TRACK_DIRTY BIT64(11)
181/** @} */
182
183/** @name Page flags.
184 * These are placed in the three bits available for system programs in
185 * the page entries.
186 * @{ */
187/** Made read-only to facilitate dirty bit tracking. */
188#define PGM_PTFLAGS_TRACK_DIRTY BIT64(9)
189
190#ifndef PGM_PTFLAGS_CSAM_VALIDATED
191/** Scanned and approved by CSAM (tm).
192 * NOTE: Must be identical to the one defined in CSAMInternal.h!!
193 * @todo Move PGM_PTFLAGS_* and PGM_PDFLAGS_* to VBox/pgm.h. */
194#define PGM_PTFLAGS_CSAM_VALIDATED BIT64(11)
195#endif
196/** @} */
197
198/** @name Defines used to indicate the shadow and guest paging in the templates.
199 * @{ */
200#define PGM_TYPE_REAL 1
201#define PGM_TYPE_PROT 2
202#define PGM_TYPE_32BIT 3
203#define PGM_TYPE_PAE 4
204#define PGM_TYPE_AMD64 5
205/** @} */
206
207/** @def PGM_HCPHYS_2_PTR
208 * Maps a HC physical page pool address to a virtual address.
209 *
210 * @returns VBox status code.
211 * @param pVM The VM handle.
212 * @param HCPhys The HC physical address to map to a virtual one.
213 * @param ppv Where to store the virtual address. No need to cast this.
214 *
215 * @remark In GC this uses PGMGCDynMapHCPage(), so it will consume of the
216 * small page window employeed by that function. Be careful.
217 * @remark There is no need to assert on the result.
218 */
219#ifdef IN_GC
220# define PGM_HCPHYS_2_PTR(pVM, HCPhys, ppv) PGMGCDynMapHCPage(pVM, HCPhys, (void **)(ppv))
221#else
222# define PGM_HCPHYS_2_PTR(pVM, HCPhys, ppv) MMPagePhys2PageEx(pVM, HCPhys, (void **)(ppv))
223#endif
224
225/** @def PGM_GCPHYS_2_PTR
226 * Maps a GC physical page address to a virtual address.
227 *
228 * @returns VBox status code.
229 * @param pVM The VM handle.
230 * @param GCPhys The GC physical address to map to a virtual one.
231 * @param ppv Where to store the virtual address. No need to cast this.
232 *
233 * @remark In GC this uses PGMGCDynMapGCPage(), so it will consume of the
234 * small page window employeed by that function. Be careful.
235 * @remark There is no need to assert on the result.
236 */
237#ifdef IN_GC
238# define PGM_GCPHYS_2_PTR(pVM, GCPhys, ppv) PGMGCDynMapGCPage(pVM, GCPhys, (void **)(ppv))
239#else
240# define PGM_GCPHYS_2_PTR(pVM, GCPhys, ppv) PGMPhysGCPhys2HCPtr(pVM, GCPhys, (void **)(ppv)) /** @todo this isn't asserting, use PGMRamGCPhys2HCPtr! */
241#endif
242
243/** @def PGM_GCPHYS_2_PTR_EX
244 * Maps a unaligned GC physical page address to a virtual address.
245 *
246 * @returns VBox status code.
247 * @param pVM The VM handle.
248 * @param GCPhys The GC physical address to map to a virtual one.
249 * @param ppv Where to store the virtual address. No need to cast this.
250 *
251 * @remark In GC this uses PGMGCDynMapGCPage(), so it will consume of the
252 * small page window employeed by that function. Be careful.
253 * @remark There is no need to assert on the result.
254 */
255#ifdef IN_GC
256# define PGM_GCPHYS_2_PTR_EX(pVM, GCPhys, ppv) PGMGCDynMapGCPageEx(pVM, GCPhys, (void **)(ppv))
257#else
258# define PGM_GCPHYS_2_PTR_EX(pVM, GCPhys, ppv) PGMPhysGCPhys2HCPtr(pVM, GCPhys, (void **)(ppv)) /** @todo this isn't asserting, use PGMRamGCPhys2HCPtr! */
259#endif
260
261/** @def PGM_INVL_PG
262 * Invalidates a page when in GC does nothing in HC.
263 *
264 * @param GCVirt The virtual address of the page to invalidate.
265 */
266#ifdef IN_GC
267# define PGM_INVL_PG(GCVirt) ASMInvalidatePage((void *)(GCVirt))
268#else
269# define PGM_INVL_PG(GCVirt) ((void)0)
270#endif
271
272/** @def PGM_INVL_BIG_PG
273 * Invalidates a 4MB page directory entry when in GC does nothing in HC.
274 *
275 * @param GCVirt The virtual address within the page directory to invalidate.
276 */
277#ifdef IN_GC
278# define PGM_INVL_BIG_PG(GCVirt) ASMReloadCR3()
279#else
280# define PGM_INVL_BIG_PG(GCVirt) ((void)0)
281#endif
282
283/** @def PGM_INVL_GUEST_TLBS()
284 * Invalidates all guest TLBs.
285 */
286#ifdef IN_GC
287# define PGM_INVL_GUEST_TLBS() ASMReloadCR3()
288#else
289# define PGM_INVL_GUEST_TLBS() ((void)0)
290#endif
291
292
293/**
294 * Structure for tracking GC Mappings.
295 *
296 * This structure is used by linked list in both GC and HC.
297 */
298typedef struct PGMMAPPING
299{
300 /** Pointer to next entry. */
301 HCPTRTYPE(struct PGMMAPPING *) pNextHC;
302 /** Pointer to next entry. */
303 GCPTRTYPE(struct PGMMAPPING *) pNextGC;
304 /** Start Virtual address. */
305 RTGCUINTPTR GCPtr;
306 /** Last Virtual address (inclusive). */
307 RTGCUINTPTR GCPtrLast;
308 /** Range size (bytes). */
309 RTGCUINTPTR cb;
310 /** Pointer to relocation callback function. */
311 HCPTRTYPE(PFNPGMRELOCATE) pfnRelocate;
312 /** User argument to the callback. */
313 HCPTRTYPE(void *) pvUser;
314 /** Mapping description / name. For easing debugging. */
315 HCPTRTYPE(const char *) pszDesc;
316 /** Number of page tables. */
317 RTUINT cPTs;
318#if HC_ARCH_BITS != GC_ARCH_BITS
319 RTUINT uPadding0; /**< Alignment padding. */
320#endif
321 /** Array of page table mapping data. Each entry
322 * describes one page table. The array can be longer
323 * than the declared length.
324 */
325 struct
326 {
327 /** The HC physical address of the page table. */
328 RTHCPHYS HCPhysPT;
329 /** The HC physical address of the first PAE page table. */
330 RTHCPHYS HCPhysPaePT0;
331 /** The HC physical address of the second PAE page table. */
332 RTHCPHYS HCPhysPaePT1;
333 /** The HC virtual address of the 32-bit page table. */
334 HCPTRTYPE(PVBOXPT) pPTHC;
335 /** The HC virtual address of the two PAE page table. (i.e 1024 entries instead of 512) */
336 HCPTRTYPE(PX86PTPAE) paPaePTsHC;
337 /** The GC virtual address of the 32-bit page table. */
338 GCPTRTYPE(PVBOXPT) pPTGC;
339 /** The GC virtual address of the two PAE page table. */
340 GCPTRTYPE(PX86PTPAE) paPaePTsGC;
341 } aPTs[1];
342} PGMMAPPING;
343/** Pointer to structure for tracking GC Mappings. */
344typedef struct PGMMAPPING *PPGMMAPPING;
345
346
347/**
348 * Physical page access handler structure.
349 *
350 * This is used to keep track of physical address ranges
351 * which are being monitored in some kind of way.
352 */
353typedef struct PGMPHYSHANDLER
354{
355 AVLROGCPHYSNODECORE Core;
356 /** Alignment padding. */
357 uint32_t u32Padding;
358 /** Access type. */
359 PGMPHYSHANDLERTYPE enmType;
360 /** Number of pages to update. */
361 uint32_t cPages;
362 /** Pointer to R3 callback function. */
363 HCPTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3;
364 /** User argument for R3 handlers. */
365 HCPTRTYPE(void *) pvUserR3;
366 /** Pointer to R0 callback function. */
367 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0;
368 /** User argument for R0 handlers. */
369 HCPTRTYPE(void *) pvUserR0;
370 /** Pointer to GC callback function. */
371 GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnHandlerGC;
372 /** User argument for GC handlers. */
373 GCPTRTYPE(void *) pvUserGC;
374 /** Description / Name. For easing debugging. */
375 HCPTRTYPE(const char *) pszDesc;
376#ifdef VBOX_WITH_STATISTICS
377 /** Profiling of this handler. */
378 STAMPROFILE Stat;
379#endif
380} PGMPHYSHANDLER;
381/** Pointer to a physical page access handler structure. */
382typedef PGMPHYSHANDLER *PPGMPHYSHANDLER;
383
384
385/**
386 * Cache node for the physical addresses covered by a virtual handler.
387 */
388typedef struct PGMPHYS2VIRTHANDLER
389{
390 /** Core node for the tree based on physical ranges. */
391 AVLROGCPHYSNODECORE Core;
392 /** Offset from this struct to the PGMVIRTHANDLER structure. */
393 RTGCINTPTR offVirtHandler;
394 /** Offset of the next alias relativer to this one.
395 * Bit 0 is used for indicating whether we're in the tree.
396 * Bit 1 is used for indicating that we're the head node.
397 */
398 int32_t offNextAlias;
399} PGMPHYS2VIRTHANDLER;
400/** Pointer to a phys to virtual handler structure. */
401typedef PGMPHYS2VIRTHANDLER *PPGMPHYS2VIRTHANDLER;
402
403/** The bit in PGMPHYS2VIRTHANDLER::offNextAlias used to indicate that the
404 * node is in the tree. */
405#define PGMPHYS2VIRTHANDLER_IN_TREE BIT(0)
406/** The bit in PGMPHYS2VIRTHANDLER::offNextAlias used to indicate that the
407 * node is in the head of an alias chain.
408 * The PGMPHYS2VIRTHANDLER_IN_TREE is always set if this bit is set. */
409#define PGMPHYS2VIRTHANDLER_IS_HEAD BIT(1)
410/** The mask to apply to PGMPHYS2VIRTHANDLER::offNextAlias to get the offset. */
411#define PGMPHYS2VIRTHANDLER_OFF_MASK (~(int32_t)3)
412
413
414/**
415 * Virtual page access handler structure.
416 *
417 * This is used to keep track of virtual address ranges
418 * which are being monitored in some kind of way.
419 */
420typedef struct PGMVIRTHANDLER
421{
422 /** Core node for the tree based on virtual ranges. */
423 AVLROGCPTRNODECORE Core;
424 /** Number of cache pages. */
425 uint32_t u32Padding;
426 /** Access type. */
427 PGMVIRTHANDLERTYPE enmType;
428 /** Number of cache pages. */
429 uint32_t cPages;
430
431/** @todo The next two members are redundant. It adds some readability though. */
432 /** Start of the range. */
433 RTGCPTR GCPtr;
434 /** End of the range (exclusive). */
435 RTGCPTR GCPtrLast;
436 /** Size of the range (in bytes). */
437 RTGCUINTPTR cb;
438 /** Pointer to the GC callback function. */
439 GCPTRTYPE(PFNPGMGCVIRTHANDLER) pfnHandlerGC;
440 /** Pointer to the HC callback function for invalidation. */
441 HCPTRTYPE(PFNPGMHCVIRTINVALIDATE) pfnInvalidateHC;
442 /** Pointer to the HC callback function. */
443 HCPTRTYPE(PFNPGMHCVIRTHANDLER) pfnHandlerHC;
444 /** Description / Name. For easing debugging. */
445 HCPTRTYPE(const char *) pszDesc;
446#ifdef VBOX_WITH_STATISTICS
447 /** Profiling of this handler. */
448 STAMPROFILE Stat;
449#endif
450 /** Array of cached physical addresses for the monitored ranged. */
451 PGMPHYS2VIRTHANDLER aPhysToVirt[HC_ARCH_BITS == 32 ? 1 : 2];
452} PGMVIRTHANDLER;
453/** Pointer to a virtual page access handler structure. */
454typedef PGMVIRTHANDLER *PPGMVIRTHANDLER;
455
456
457/**
458 * Ram range for GC Phys to HC Phys conversion.
459 *
460 * Can be used for HC Virt to GC Phys and HC Virt to HC Phys
461 * conversions too, but we'll let MM handle that for now.
462 *
463 * This structure is used by linked lists in both GC and HC.
464 */
465typedef struct PGMRAMRANGE
466{
467 /** Pointer to the next RAM range - for HC. */
468 HCPTRTYPE(struct PGMRAMRANGE *) pNextHC;
469 /** Pointer to the next RAM range - for GC. */
470 GCPTRTYPE(struct PGMRAMRANGE *) pNextGC;
471 /** Start of the range. Page aligned. */
472 RTGCPHYS GCPhys;
473 /** Last address in the range (inclusive). Page aligned (-1). */
474 RTGCPHYS GCPhysLast;
475 /** Size of the range. (Page aligned of course). */
476 RTGCPHYS cb;
477 /** MM_RAM_* flags */
478 uint32_t fFlags;
479
480 /** HC virtual lookup ranges for chunks. Currently only used with MM_RAM_FLAGS_DYNAMIC_ALLOC ranges. */
481 GCPTRTYPE(void **) pavHCChunkGC;
482 /** HC virtual lookup ranges for chunks. Currently only used with MM_RAM_FLAGS_DYNAMIC_ALLOC ranges. */
483 HCPTRTYPE(void **) pavHCChunkHC;
484
485 /** Start of the HC mapping of the range.
486 * For pure MMIO and dynamically allocated ranges this is NULL, while for all ranges this is a valid pointer. */
487 HCPTRTYPE(void *) pvHC;
488
489 /** Array of the flags and HC physical addresses corresponding to the range.
490 * The index is the page number in the range. The size is cb >> PAGE_SHIFT.
491 *
492 * The 12 lower bits of the physical address are flags and must be masked
493 * off to get the correct physical address.
494 *
495 * For pure MMIO ranges only the flags are valid.
496 */
497 RTHCPHYS aHCPhys[1];
498} PGMRAMRANGE;
499/** Pointer to Ram range for GC Phys to HC Phys conversion. */
500typedef PGMRAMRANGE *PPGMRAMRANGE;
501
502/** Return hc ptr corresponding to the ram range and physical offset */
503#define PGMRAMRANGE_GETHCPTR(pRam, off) \
504 (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC) ? (RTHCPTR)((RTHCUINTPTR)CTXSUFF(pRam->pavHCChunk)[(off >> PGM_DYNAMIC_CHUNK_SHIFT)] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK)) \
505 : (RTHCPTR)((RTHCUINTPTR)pRam->pvHC + off);
506
507/** @todo r=bird: fix typename. */
508/**
509 * PGMPhysRead/Write cache entry
510 */
511typedef struct PGMPHYSCACHE_ENTRY
512{
513 /** HC pointer to physical page */
514 HCPTRTYPE(uint8_t *) pbHC;
515 /** GC Physical address for cache entry */
516 RTGCPHYS GCPhys;
517#if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32
518 RTGCPHYS u32Padding0; /**< alignment padding. */
519#endif
520} PGMPHYSCACHE_ENTRY;
521
522/**
523 * PGMPhysRead/Write cache to reduce REM memory access overhead
524 */
525typedef struct PGMPHYSCACHE
526{
527 /** Bitmap of valid cache entries */
528 uint64_t aEntries;
529 /** Cache entries */
530 PGMPHYSCACHE_ENTRY Entry[PGM_MAX_PHYSCACHE_ENTRIES];
531} PGMPHYSCACHE;
532
533
534/** @name PGM Pool Indexes.
535 * Aka. the unique shadow page identifier.
536 * @{ */
537/** NIL page pool IDX. */
538#define NIL_PGMPOOL_IDX 0
539/** The first normal index. */
540#define PGMPOOL_IDX_FIRST_SPECIAL 1
541/** Page directory (32-bit root). */
542#define PGMPOOL_IDX_PD 1
543/** The extended PAE page directory (2048 entries, works as root currently). */
544#define PGMPOOL_IDX_PAE_PD 2
545/** Page Directory Pointer Table (PAE root, not currently used). */
546#define PGMPOOL_IDX_PDPTR 3
547/** Page Map Level-4 (64-bit root). */
548#define PGMPOOL_IDX_PML4 4
549/** The first normal index. */
550#define PGMPOOL_IDX_FIRST 5
551/** The last valid index. (inclusive, 14 bits) */
552#define PGMPOOL_IDX_LAST 0x3fff
553/** @} */
554
555/** The NIL index for the parent chain. */
556#define NIL_PGMPOOL_USER_INDEX ((uint16_t)0xffff)
557
558/**
559 * Node in the chain linking a shadowed page to it's parent (user).
560 */
561#pragma pack(1)
562typedef struct PGMPOOLUSER
563{
564 /** The index to the next item in the chain. NIL_PGMPOOL_USER_INDEX is no next. */
565 uint16_t iNext;
566 /** The user page index. */
567 uint16_t iUser;
568 /** Index into the user table. */
569 uint16_t iUserTable;
570} PGMPOOLUSER, *PPGMPOOLUSER;
571typedef const PGMPOOLUSER *PCPGMPOOLUSER;
572#pragma pack()
573
574
575/** The NIL index for the phys ext chain. */
576#define NIL_PGMPOOL_PHYSEXT_INDEX ((uint16_t)0xffff)
577
578/**
579 * Node in the chain of physical cross reference extents.
580 */
581#pragma pack(1)
582typedef struct PGMPOOLPHYSEXT
583{
584 /** The index to the next item in the chain. NIL_PGMPOOL_PHYSEXT_INDEX is no next. */
585 uint16_t iNext;
586 /** The user page index. */
587 uint16_t aidx[3];
588} PGMPOOLPHYSEXT, *PPGMPOOLPHYSEXT;
589typedef const PGMPOOLPHYSEXT *PCPGMPOOLPHYSEXT;
590#pragma pack()
591
592
593/**
594 * The kind of page that's being shadowed.
595 */
596typedef enum PGMPOOLKIND
597{
598 /** The ritual invalid 0 entry. */
599 PGMPOOLKIND_INVALID = 0,
600 /** The entry is free (=unused). */
601 PGMPOOLKIND_FREE,
602
603 /** Shw: 32-bit page table; Gst: 32-bit page table. */
604 PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT,
605 /** Shw: 32-bit page table; Gst: 4MB page. */
606 PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB,
607 /** Shw: PAE page table; Gst: 32-bit page table. */
608 PGMPOOLKIND_PAE_PT_FOR_32BIT_PT,
609 /** Shw: PAE page table; Gst: Half of a 4MB page. */
610 PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB,
611 /** Shw: PAE page table; Gst: PAE page table. */
612 PGMPOOLKIND_PAE_PT_FOR_PAE_PT,
613 /** Shw: PAE page table; Gst: 2MB page. */
614 PGMPOOLKIND_PAE_PT_FOR_PAE_2MB,
615
616 /** Shw: PAE page directory; Gst: 32-bit page directory. */
617 PGMPOOLKIND_PAE_PD_FOR_32BIT_PD,
618 /** Shw: PAE page directory; Gst: PAE page directory. */
619 PGMPOOLKIND_PAE_PD_FOR_PAE_PD,
620
621 /** Shw: 64-bit page directory pointer table; Gst: 64-bit page directory pointer table. */
622 PGMPOOLKIND_64BIT_PDPTR_FOR_64BIT_PDPTR,
623
624 /** Shw: Root 32-bit page directory. */
625 PGMPOOLKIND_ROOT_32BIT_PD,
626 /** Shw: Root PAE page directory */
627 PGMPOOLKIND_ROOT_PAE_PD,
628 /** Shw: Root PAE page directory pointer table (legacy, 4 entries). */
629 PGMPOOLKIND_ROOT_PDPTR,
630 /** Shw: Root page map level-4 table. */
631 PGMPOOLKIND_ROOT_PML4,
632
633 /** The last valid entry. */
634 PGMPOOLKIND_LAST = PGMPOOLKIND_ROOT_PML4
635} PGMPOOLKIND;
636
637
638/**
639 * The tracking data for a page in the pool.
640 */
641typedef struct PGMPOOLPAGE
642{
643 /** AVL node code with the (HC) physical address of this page. */
644 AVLOHCPHYSNODECORE Core;
645#if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32 && defined(IN_GC)
646 uint32_t Alignment0; /**< Alignment. */
647#endif
648 /** Pointer to the HC mapping of the page. */
649 HCPTRTYPE(void *) pvPageHC;
650 /** The guest physical address. */
651 RTGCPHYS GCPhys;
652 /** The kind of page we're shadowing. (This is really a PGMPOOLKIND enum.) */
653 uint8_t enmKind;
654 uint8_t bPadding;
655 /** The index of this page. */
656 uint16_t idx;
657 /** The next entry in the list this page currently resides in.
658 * It's either in the free list or in the GCPhys hash. */
659 uint16_t iNext;
660#ifdef PGMPOOL_WITH_USER_TRACKING
661 /** Head of the user chain. NIL_PGMPOOL_USER_INDEX if not currently in use. */
662 uint16_t iUserHead;
663 /** The number of present entries. */
664 uint16_t cPresent;
665 /** The first entry in the table which is present. */
666 uint16_t iFirstPresent;
667#endif
668#ifdef PGMPOOL_WITH_MONITORING
669 /** The number of modifications to the monitored page. */
670 uint16_t cModifications;
671 /** The next modified page. NIL_PGMPOOL_IDX if tail. */
672 uint16_t iModifiedNext;
673 /** The previous modified page. NIL_PGMPOOL_IDX if head. */
674 uint16_t iModifiedPrev;
675 /** The next page sharing access handler. NIL_PGMPOOL_IDX if tail. */
676 uint16_t iMonitoredNext;
677 /** The previous page sharing access handler. NIL_PGMPOOL_IDX if head. */
678 uint16_t iMonitoredPrev;
679#endif
680#ifdef PGMPOOL_WITH_CACHE
681 /** The next page in the age list. */
682 uint16_t iAgeNext;
683 /** The previous page in the age list. */
684 uint16_t iAgePrev;
685/** @todo add more from PGMCache.h when merging with it. */
686#endif /* PGMPOOL_WITH_CACHE */
687 /** Used to indicate that the page is zeroed. */
688 bool fZeroed;
689 /** Used to indicate that a PT has non-global entries. */
690 bool fSeenNonGlobal;
691 /** Used to indicate that we're monitoring writes to the guest page. */
692 bool fMonitored;
693 /** Used to indicate that the page is in the cache (e.g. in the GCPhys hash).
694 * (All pages are in the age list.) */
695 bool fCached;
696 /** This is used by the R3 access handlers when invoked by an async thread.
697 * It's a hack required because of REMR3NotifyHandlerPhysicalDeregister. */
698 bool volatile fReusedFlushPending;
699 /** Used to indicate that the guest is mapping the page is also used as a CR3.
700 * In these cases the access handler acts differently and will check
701 * for mapping conflicts like the normal CR3 handler.
702 * @todo When we change the CR3 shadowing to use pool pages, this flag can be
703 * replaced by a list of pages which share access handler.
704 */
705 bool fCR3Mix;
706#if HC_ARCH_BITS == 64 || GC_ARCH_BITS == 64
707 bool Alignment[4]; /**< Align the structure size on a 64-bit boundrary. */
708#endif
709} PGMPOOLPAGE, *PPGMPOOLPAGE, **PPPGMPOOLPAGE;
710
711
712#ifdef PGMPOOL_WITH_CACHE
713/** The hash table size. */
714# define PGMPOOL_HASH_SIZE 0x40
715/** The hash function. */
716# define PGMPOOL_HASH(GCPhys) ( ((GCPhys) >> PAGE_SHIFT) & (PGMPOOL_HASH_SIZE - 1) )
717#endif
718
719
720/**
721 * The shadow page pool instance data.
722 *
723 * It's all one big allocation made at init time, except for the
724 * pages that is. The user nodes follows immediatly after the
725 * page structures.
726 */
727typedef struct PGMPOOL
728{
729 /** The VM handle - HC Ptr. */
730 HCPTRTYPE(PVM) pVMHC;
731 /** The VM handle - GC Ptr. */
732 GCPTRTYPE(PVM) pVMGC;
733 /** The max pool size. This includes the special IDs. */
734 uint16_t cMaxPages;
735 /** The current pool size. */
736 uint16_t cCurPages;
737 /** The head of the free page list. */
738 uint16_t iFreeHead;
739 /* Padding. */
740 uint16_t u16Padding;
741#ifdef PGMPOOL_WITH_USER_TRACKING
742 /** Head of the chain of free user nodes. */
743 uint16_t iUserFreeHead;
744 /** The number of user nodes we've allocated. */
745 uint16_t cMaxUsers;
746 /** The number of present page table entries in the entire pool. */
747 uint32_t cPresent;
748 /** Pointer to the array of user nodes - GC pointer. */
749 GCPTRTYPE(PPGMPOOLUSER) paUsersGC;
750 /** Pointer to the array of user nodes - HC pointer. */
751 HCPTRTYPE(PPGMPOOLUSER) paUsersHC;
752#endif /* PGMPOOL_WITH_USER_TRACKING */
753#ifdef PGMPOOL_WITH_GCPHYS_TRACKING
754 /** Head of the chain of free phys ext nodes. */
755 uint16_t iPhysExtFreeHead;
756 /** The number of user nodes we've allocated. */
757 uint16_t cMaxPhysExts;
758 /** Pointer to the array of physical xref extent - GC pointer. */
759 GCPTRTYPE(PPGMPOOLPHYSEXT) paPhysExtsGC;
760 /** Pointer to the array of physical xref extent nodes - HC pointer. */
761 HCPTRTYPE(PPGMPOOLPHYSEXT) paPhysExtsHC;
762#endif /* PGMPOOL_WITH_GCPHYS_TRACKING */
763#ifdef PGMPOOL_WITH_CACHE
764 /** Hash table for GCPhys addresses. */
765 uint16_t aiHash[PGMPOOL_HASH_SIZE];
766 /** The head of the age list. */
767 uint16_t iAgeHead;
768 /** The tail of the age list. */
769 uint16_t iAgeTail;
770 /** Set if the cache is enabled. */
771 bool fCacheEnabled;
772#endif /* PGMPOOL_WITH_CACHE */
773#ifdef PGMPOOL_WITH_MONITORING
774 /** Head of the list of modified pages. */
775 uint16_t iModifiedHead;
776 /** The current number of modified pages. */
777 uint16_t cModifiedPages;
778 /** Access handler, GC. */
779 GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnAccessHandlerGC;
780 /** Access handler, R0. */
781 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnAccessHandlerR0;
782 /** Access handler, R3. */
783 HCPTRTYPE(PFNPGMR3PHYSHANDLER) pfnAccessHandlerR3;
784 /** The access handler description (HC ptr). */
785 HCPTRTYPE(const char *) pszAccessHandler;
786#endif /* PGMPOOL_WITH_MONITORING */
787 /** The number of pages currently in use. */
788 uint16_t cUsedPages;
789#ifdef VBOX_WITH_STATISTICS
790 /** The high wather mark for cUsedPages. */
791 uint16_t cUsedPagesHigh;
792 uint32_t Alignment1; /**< Align the next member on a 64-bit boundrary. */
793 /** Profiling pgmPoolAlloc(). */
794 STAMPROFILEADV StatAlloc;
795 /** Profiling pgmPoolClearAll(). */
796 STAMPROFILE StatClearAll;
797 /** Profiling pgmPoolFlushAllInt(). */
798 STAMPROFILE StatFlushAllInt;
799 /** Profiling pgmPoolFlushPage(). */
800 STAMPROFILE StatFlushPage;
801 /** Profiling pgmPoolFree(). */
802 STAMPROFILE StatFree;
803 /** Profiling time spent zeroing pages. */
804 STAMPROFILE StatZeroPage;
805# ifdef PGMPOOL_WITH_USER_TRACKING
806 /** Profiling of pgmPoolTrackDeref. */
807 STAMPROFILE StatTrackDeref;
808 /** Profiling pgmTrackFlushGCPhysPT. */
809 STAMPROFILE StatTrackFlushGCPhysPT;
810 /** Profiling pgmTrackFlushGCPhysPTs. */
811 STAMPROFILE StatTrackFlushGCPhysPTs;
812 /** Profiling pgmTrackFlushGCPhysPTsSlow. */
813 STAMPROFILE StatTrackFlushGCPhysPTsSlow;
814 /** Number of times we've been out of user records. */
815 STAMCOUNTER StatTrackFreeUpOneUser;
816# endif
817# ifdef PGMPOOL_WITH_GCPHYS_TRACKING
818 /** Profiling deref activity related tracking GC physical pages. */
819 STAMPROFILE StatTrackDerefGCPhys;
820 /** Number of linear searches for a HCPhys in the ram ranges. */
821 STAMCOUNTER StatTrackLinearRamSearches;
822 /** The number of failing pgmPoolTrackPhysExtAlloc calls. */
823 STAMCOUNTER StamTrackPhysExtAllocFailures;
824# endif
825# ifdef PGMPOOL_WITH_MONITORING
826 /** Profiling the GC PT access handler. */
827 STAMPROFILE StatMonitorGC;
828 /** Times we've failed interpreting the instruction. */
829 STAMCOUNTER StatMonitorGCEmulateInstr;
830 /** Profiling the pgmPoolFlushPage calls made from the GC PT access handler. */
831 STAMPROFILE StatMonitorGCFlushPage;
832 /** Times we've detected fork(). */
833 STAMCOUNTER StatMonitorGCFork;
834 /** Profiling the GC access we've handled (except REP STOSD). */
835 STAMPROFILE StatMonitorGCHandled;
836 /** Times we've failed interpreting a patch code instruction. */
837 STAMCOUNTER StatMonitorGCIntrFailPatch1;
838 /** Times we've failed interpreting a patch code instruction during flushing. */
839 STAMCOUNTER StatMonitorGCIntrFailPatch2;
840 /** The number of times we've seen rep prefixes we can't handle. */
841 STAMCOUNTER StatMonitorGCRepPrefix;
842 /** Profiling the REP STOSD cases we've handled. */
843 STAMPROFILE StatMonitorGCRepStosd;
844
845 /** Profiling the HC PT access handler. */
846 STAMPROFILE StatMonitorHC;
847 /** Times we've failed interpreting the instruction. */
848 STAMCOUNTER StatMonitorHCEmulateInstr;
849 /** Profiling the pgmPoolFlushPage calls made from the HC PT access handler. */
850 STAMPROFILE StatMonitorHCFlushPage;
851 /** Times we've detected fork(). */
852 STAMCOUNTER StatMonitorHCFork;
853 /** Profiling the HC access we've handled (except REP STOSD). */
854 STAMPROFILE StatMonitorHCHandled;
855 /** The number of times we've seen rep prefixes we can't handle. */
856 STAMCOUNTER StatMonitorHCRepPrefix;
857 /** Profiling the REP STOSD cases we've handled. */
858 STAMPROFILE StatMonitorHCRepStosd;
859 /** The number of times we're called in an async thread an need to flush. */
860 STAMCOUNTER StatMonitorHCAsync;
861 /** The high wather mark for cModifiedPages. */
862 uint16_t cModifiedPagesHigh;
863 uint16_t Alignment2[3]; /**< Align the next member on a 64-bit boundrary. */
864# endif
865# ifdef PGMPOOL_WITH_CACHE
866 /** The number of cache hits. */
867 STAMCOUNTER StatCacheHits;
868 /** The number of cache misses. */
869 STAMCOUNTER StatCacheMisses;
870 /** The number of times we've got a conflict of 'kind' in the cache. */
871 STAMCOUNTER StatCacheKindMismatches;
872 /** Number of times we've been out of pages. */
873 STAMCOUNTER StatCacheFreeUpOne;
874 /** The number of cacheable allocations. */
875 STAMCOUNTER StatCacheCacheable;
876 /** The number of uncacheable allocations. */
877 STAMCOUNTER StatCacheUncacheable;
878# endif
879#endif
880 /** The AVL tree for looking up a page by its HC physical address. */
881 AVLOHCPHYSTREE HCPhysTree;
882 uint32_t Alignment3; /**< Align the next member on a 64-bit boundrary. */
883 /** Array of pages. (cMaxPages in length)
884 * The Id is the index into thist array.
885 */
886 PGMPOOLPAGE aPages[PGMPOOL_IDX_FIRST];
887} PGMPOOL, *PPGMPOOL, **PPPGMPOOL;
888
889
890/** @def PGMPOOL_PAGE_2_PTR
891 * Maps a pool page pool into the current context.
892 *
893 * @returns VBox status code.
894 * @param pVM The VM handle.
895 * @param pPage The pool page.
896 *
897 * @remark In HC this uses PGMGCDynMapHCPage(), so it will consume of the
898 * small page window employeed by that function. Be careful.
899 * @remark There is no need to assert on the result.
900 */
901#ifdef IN_GC
902# define PGMPOOL_PAGE_2_PTR(pVM, pPage) pgmGCPoolMapPage((pVM), (pPage))
903#else
904# define PGMPOOL_PAGE_2_PTR(pVM, pPage) ((pPage)->pvPageHC)
905#endif
906
907
908/**
909 * Trees are using self relative offsets as pointers.
910 * So, all its data, including the root pointer, must be in the heap for HC and GC
911 * to have the same layout.
912 */
913typedef struct PGMTREES
914{
915 /** Physical access handlers (AVL range+offsetptr tree). */
916 AVLROGCPHYSTREE PhysHandlers;
917 /** Virtual access handlers (AVL range + GC ptr tree). */
918 AVLROGCPTRTREE VirtHandlers;
919 /** Virtual access handlers (Phys range AVL range + offsetptr tree). */
920 AVLROGCPHYSTREE PhysToVirtHandlers;
921 uint32_t auPadding[1];
922} PGMTREES;
923/** Pointer to PGM trees. */
924typedef PGMTREES *PPGMTREES;
925
926
927/** @name Paging mode macros
928 * @{ */
929#ifdef IN_GC
930# define PGM_CTX(a,b) a##GC##b
931# define PGM_CTX_STR(a,b) a "GC" b
932# define PGM_CTX_DECL(type) PGMGCDECL(type)
933#else
934# ifdef IN_RING3
935# define PGM_CTX(a,b) a##R3##b
936# define PGM_CTX_STR(a,b) a "R3" b
937# define PGM_CTX_DECL(type) DECLCALLBACK(type)
938# else
939# define PGM_CTX(a,b) a##R0##b
940# define PGM_CTX_STR(a,b) a "R0" b
941# define PGM_CTX_DECL(type) PGMDECL(type)
942# endif
943#endif
944
945#define PGM_GST_NAME_REAL(name) PGM_CTX(pgm,GstReal##name)
946#define PGM_GST_NAME_GC_REAL_STR(name) "pgmGCGstReal" #name
947#define PGM_GST_NAME_R0_REAL_STR(name) "pgmR0GstReal" #name
948#define PGM_GST_NAME_PROT(name) PGM_CTX(pgm,GstProt##name)
949#define PGM_GST_NAME_GC_PROT_STR(name) "pgmGCGstProt" #name
950#define PGM_GST_NAME_R0_PROT_STR(name) "pgmR0GstProt" #name
951#define PGM_GST_NAME_32BIT(name) PGM_CTX(pgm,Gst32Bit##name)
952#define PGM_GST_NAME_GC_32BIT_STR(name) "pgmGCGst32Bit" #name
953#define PGM_GST_NAME_R0_32BIT_STR(name) "pgmR0Gst32Bit" #name
954#define PGM_GST_NAME_PAE(name) PGM_CTX(pgm,GstPAE##name)
955#define PGM_GST_NAME_GC_PAE_STR(name) "pgmGCGstPAE" #name
956#define PGM_GST_NAME_R0_PAE_STR(name) "pgmR0GstPAE" #name
957#define PGM_GST_NAME_AMD64(name) PGM_CTX(pgm,GstAMD64##name)
958#define PGM_GST_NAME_GC_AMD64_STR(name) "pgmGCGstAMD64" #name
959#define PGM_GST_NAME_R0_AMD64_STR(name) "pgmR0GstAMD64" #name
960#define PGM_GST_PFN(name, pVM) ((pVM)->pgm.s.PGM_CTX(pfn,Gst##name))
961#define PGM_GST_DECL(type, name) PGM_CTX_DECL(type) PGM_GST_NAME(name)
962
963#define PGM_SHW_NAME_32BIT(name) PGM_CTX(pgm,Shw32Bit##name)
964#define PGM_SHW_NAME_GC_32BIT_STR(name) "pgmGCShw32Bit" #name
965#define PGM_SHW_NAME_R0_32BIT_STR(name) "pgmR0Shw32Bit" #name
966#define PGM_SHW_NAME_PAE(name) PGM_CTX(pgm,ShwPAE##name)
967#define PGM_SHW_NAME_GC_PAE_STR(name) "pgmGCShwPAE" #name
968#define PGM_SHW_NAME_R0_PAE_STR(name) "pgmR0ShwPAE" #name
969#define PGM_SHW_NAME_AMD64(name) PGM_CTX(pgm,ShwAMD64##name)
970#define PGM_SHW_NAME_GC_AMD64_STR(name) "pgmGCShwAMD64" #name
971#define PGM_SHW_NAME_R0_AMD64_STR(name) "pgmR0ShwAMD64" #name
972#define PGM_SHW_DECL(type, name) PGM_CTX_DECL(type) PGM_SHW_NAME(name)
973#define PGM_SHW_PFN(name, pVM) ((pVM)->pgm.s.PGM_CTX(pfn,Shw##name))
974
975/* Shw_Gst */
976#define PGM_BTH_NAME_32BIT_REAL(name) PGM_CTX(pgm,Bth32BitReal##name)
977#define PGM_BTH_NAME_32BIT_PROT(name) PGM_CTX(pgm,Bth32BitProt##name)
978#define PGM_BTH_NAME_32BIT_32BIT(name) PGM_CTX(pgm,Bth32Bit32Bit##name)
979#define PGM_BTH_NAME_PAE_REAL(name) PGM_CTX(pgm,BthPAEReal##name)
980#define PGM_BTH_NAME_PAE_PROT(name) PGM_CTX(pgm,BthPAEProt##name)
981#define PGM_BTH_NAME_PAE_32BIT(name) PGM_CTX(pgm,BthPAE32Bit##name)
982#define PGM_BTH_NAME_PAE_PAE(name) PGM_CTX(pgm,BthPAEPAE##name)
983#define PGM_BTH_NAME_AMD64_REAL(name) PGM_CTX(pgm,BthAMD64Real##name)
984#define PGM_BTH_NAME_AMD64_PROT(name) PGM_CTX(pgm,BthAMD64Prot##name)
985#define PGM_BTH_NAME_AMD64_AMD64(name) PGM_CTX(pgm,BthAMD64AMD64##name)
986#define PGM_BTH_NAME_GC_32BIT_REAL_STR(name) "pgmGCBth32BitReal" #name
987#define PGM_BTH_NAME_GC_32BIT_PROT_STR(name) "pgmGCBth32BitProt" #name
988#define PGM_BTH_NAME_GC_32BIT_32BIT_STR(name) "pgmGCBth32Bit32Bit" #name
989#define PGM_BTH_NAME_GC_PAE_REAL_STR(name) "pgmGCBthPAEReal" #name
990#define PGM_BTH_NAME_GC_PAE_PROT_STR(name) "pgmGCBthPAEProt" #name
991#define PGM_BTH_NAME_GC_PAE_32BIT_STR(name) "pgmGCBthPAE32Bit" #name
992#define PGM_BTH_NAME_GC_PAE_PAE_STR(name) "pgmGCBthPAEPAE" #name
993#define PGM_BTH_NAME_GC_AMD64_REAL_STR(name) "pgmGCBthAMD64Real" #name
994#define PGM_BTH_NAME_GC_AMD64_PROT_STR(name) "pgmGCBthAMD64Prot" #name
995#define PGM_BTH_NAME_GC_AMD64_AMD64_STR(name) "pgmGCBthAMD64AMD64" #name
996#define PGM_BTH_NAME_R0_32BIT_REAL_STR(name) "pgmR0Bth32BitReal" #name
997#define PGM_BTH_NAME_R0_32BIT_PROT_STR(name) "pgmR0Bth32BitProt" #name
998#define PGM_BTH_NAME_R0_32BIT_32BIT_STR(name) "pgmR0Bth32Bit32Bit" #name
999#define PGM_BTH_NAME_R0_PAE_REAL_STR(name) "pgmR0BthPAEReal" #name
1000#define PGM_BTH_NAME_R0_PAE_PROT_STR(name) "pgmR0BthPAEProt" #name
1001#define PGM_BTH_NAME_R0_PAE_32BIT_STR(name) "pgmR0BthPAE32Bit" #name
1002#define PGM_BTH_NAME_R0_PAE_PAE_STR(name) "pgmR0BthPAEPAE" #name
1003#define PGM_BTH_NAME_R0_AMD64_REAL_STR(name) "pgmR0BthAMD64Real" #name
1004#define PGM_BTH_NAME_R0_AMD64_PROT_STR(name) "pgmR0BthAMD64Prot" #name
1005#define PGM_BTH_NAME_R0_AMD64_AMD64_STR(name) "pgmR0BthAMD64AMD64" #name
1006#define PGM_BTH_DECL(type, name) PGM_CTX_DECL(type) PGM_BTH_NAME(name)
1007#define PGM_BTH_PFN(name, pVM) ((pVM)->pgm.s.PGM_CTX(pfn,Bth##name))
1008/** @} */
1009
1010/**
1011 * Data for each paging mode.
1012 */
1013typedef struct PGMMODEDATA
1014{
1015 /** The guest mode type. */
1016 uint32_t uGstType;
1017 /** The shadow mode type. */
1018 uint32_t uShwType;
1019
1020 /** @name Function pointers for Shadow paging.
1021 * @{
1022 */
1023 DECLR3CALLBACKMEMBER(int, pfnR3ShwRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1024 DECLR3CALLBACKMEMBER(int, pfnR3ShwExit,(PVM pVM));
1025 DECLR3CALLBACKMEMBER(int, pfnR3ShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1026 DECLR3CALLBACKMEMBER(int, pfnR3ShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1027 DECLR3CALLBACKMEMBER(int, pfnR3ShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1028 DECLR3CALLBACKMEMBER(int, pfnR3ShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1029 DECLR3CALLBACKMEMBER(int, pfnR3ShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1030
1031 DECLGCCALLBACKMEMBER(int, pfnGCShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1032 DECLGCCALLBACKMEMBER(int, pfnGCShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1033 DECLGCCALLBACKMEMBER(int, pfnGCShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1034 DECLGCCALLBACKMEMBER(int, pfnGCShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1035 DECLGCCALLBACKMEMBER(int, pfnGCShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1036
1037 DECLR0CALLBACKMEMBER(int, pfnR0ShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1038 DECLR0CALLBACKMEMBER(int, pfnR0ShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1039 DECLR0CALLBACKMEMBER(int, pfnR0ShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1040 DECLR0CALLBACKMEMBER(int, pfnR0ShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1041 DECLR0CALLBACKMEMBER(int, pfnR0ShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1042 /** @} */
1043
1044 /** @name Function pointers for Guest paging.
1045 * @{
1046 */
1047 DECLR3CALLBACKMEMBER(int, pfnR3GstRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1048 DECLR3CALLBACKMEMBER(int, pfnR3GstExit,(PVM pVM));
1049 DECLR3CALLBACKMEMBER(int, pfnR3GstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1050 DECLR3CALLBACKMEMBER(int, pfnR3GstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1051 DECLR3CALLBACKMEMBER(int, pfnR3GstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1052 DECLR3CALLBACKMEMBER(int, pfnR3GstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1053 DECLR3CALLBACKMEMBER(int, pfnR3GstUnmonitorCR3,(PVM pVM));
1054 DECLR3CALLBACKMEMBER(int, pfnR3GstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1055 DECLR3CALLBACKMEMBER(int, pfnR3GstUnmapCR3,(PVM pVM));
1056 HCPTRTYPE(PFNPGMR3PHYSHANDLER) pfnHCGstWriteHandlerCR3;
1057 HCPTRTYPE(const char *) pszHCGstWriteHandlerCR3;
1058
1059 DECLGCCALLBACKMEMBER(int, pfnGCGstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1060 DECLGCCALLBACKMEMBER(int, pfnGCGstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1061 DECLGCCALLBACKMEMBER(int, pfnGCGstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1062 DECLGCCALLBACKMEMBER(int, pfnGCGstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1063 DECLGCCALLBACKMEMBER(int, pfnGCGstUnmonitorCR3,(PVM pVM));
1064 DECLGCCALLBACKMEMBER(int, pfnGCGstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1065 DECLGCCALLBACKMEMBER(int, pfnGCGstUnmapCR3,(PVM pVM));
1066 GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnGCGstWriteHandlerCR3;
1067
1068 DECLR0CALLBACKMEMBER(int, pfnR0GstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1069 DECLR0CALLBACKMEMBER(int, pfnR0GstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1070 DECLR0CALLBACKMEMBER(int, pfnR0GstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1071 DECLR0CALLBACKMEMBER(int, pfnR0GstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1072 DECLR0CALLBACKMEMBER(int, pfnR0GstUnmonitorCR3,(PVM pVM));
1073 DECLR0CALLBACKMEMBER(int, pfnR0GstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1074 DECLR0CALLBACKMEMBER(int, pfnR0GstUnmapCR3,(PVM pVM));
1075 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnR0GstWriteHandlerCR3;
1076 /** @} */
1077
1078 /** @name Function pointers for Both Shadow and Guest paging.
1079 * @{
1080 */
1081 DECLR3CALLBACKMEMBER(int, pfnR3BthRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1082 DECLR3CALLBACKMEMBER(int, pfnR3BthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1083 DECLR3CALLBACKMEMBER(int, pfnR3BthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1084 DECLR3CALLBACKMEMBER(int, pfnR3BthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
1085 DECLR3CALLBACKMEMBER(int, pfnR3BthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
1086 DECLR3CALLBACKMEMBER(int, pfnR3BthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
1087 DECLR3CALLBACKMEMBER(int, pfnR3BthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
1088#ifdef VBOX_STRICT
1089 DECLR3CALLBACKMEMBER(unsigned, pfnR3BthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
1090#endif
1091
1092 DECLGCCALLBACKMEMBER(int, pfnGCBthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1093 DECLGCCALLBACKMEMBER(int, pfnGCBthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1094 DECLGCCALLBACKMEMBER(int, pfnGCBthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
1095 DECLGCCALLBACKMEMBER(int, pfnGCBthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
1096 DECLGCCALLBACKMEMBER(int, pfnGCBthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
1097 DECLGCCALLBACKMEMBER(int, pfnGCBthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
1098#ifdef VBOX_STRICT
1099 DECLGCCALLBACKMEMBER(unsigned, pfnGCBthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
1100#endif
1101
1102 DECLR0CALLBACKMEMBER(int, pfnR0BthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1103 DECLR0CALLBACKMEMBER(int, pfnR0BthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1104 DECLR0CALLBACKMEMBER(int, pfnR0BthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
1105 DECLR0CALLBACKMEMBER(int, pfnR0BthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
1106 DECLR0CALLBACKMEMBER(int, pfnR0BthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
1107 DECLR0CALLBACKMEMBER(int, pfnR0BthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
1108#ifdef VBOX_STRICT
1109 DECLR0CALLBACKMEMBER(unsigned, pfnR0BthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
1110#endif
1111 /** @} */
1112} PGMMODEDATA, *PPGMMODEDATA;
1113
1114
1115
1116/**
1117 * Converts a PGM pointer into a VM pointer.
1118 * @returns Pointer to the VM structure the PGM is part of.
1119 * @param pPGM Pointer to PGM instance data.
1120 */
1121#define PGM2VM(pPGM) ( (PVM)((char*)pPGM - pPGM->offVM) )
1122
1123/**
1124 * PGM Data (part of VM)
1125 */
1126typedef struct PGM
1127{
1128 /** Offset to the VM structure. */
1129 RTINT offVM;
1130
1131 /*
1132 * This will be redefined at least two more times before we're done, I'm sure.
1133 * The current code is only to get on with the coding.
1134 * - 2004-06-10: initial version, bird.
1135 * - 2004-07-02: 1st time, bird.
1136 * - 2004-10-18: 2nd time, bird.
1137 * - 2005-07-xx: 3rd time, bird.
1138 */
1139
1140 /** Pointer to the page table entries for the dynamic page mapping area - GCPtr. */
1141 GCPTRTYPE(PX86PTE) paDynPageMap32BitPTEsGC;
1142 /** Pointer to the page table entries for the dynamic page mapping area - GCPtr. */
1143 GCPTRTYPE(PX86PTEPAE) paDynPageMapPaePTEsGC;
1144
1145 /** The host paging mode. (This is what SUPLib reports.) */
1146 SUPPAGINGMODE enmHostMode;
1147 /** The shadow paging mode. */
1148 PGMMODE enmShadowMode;
1149 /** The guest paging mode. */
1150 PGMMODE enmGuestMode;
1151
1152 /** The current physical address representing in the guest CR3 register. */
1153 RTGCPHYS GCPhysCR3;
1154 /** Pointer to the 5 page CR3 content mapping.
1155 * The first page is always the CR3 (in some form) while the 4 other pages
1156 * are used of the PDs in PAE mode. */
1157 RTGCPTR GCPtrCR3Mapping;
1158 /** The physical address of the currently monitored guest CR3 page.
1159 * When this value is NIL_RTGCPHYS no page is being monitored. */
1160 RTGCPHYS GCPhysGstCR3Monitored;
1161#if HC_ARCH_BITS == 64 || GC_ARCH_BITS == 64
1162 RTGCPHYS GCPhysPadding0; /**< alignment padding. */
1163#endif
1164
1165 /** @name 32-bit Guest Paging.
1166 * @{ */
1167 /** The guest's page directory, HC pointer. */
1168 HCPTRTYPE(PVBOXPD) pGuestPDHC;
1169 /** The guest's page directory, static GC mapping. */
1170 GCPTRTYPE(PVBOXPD) pGuestPDGC;
1171 /** @} */
1172
1173 /** @name PAE Guest Paging.
1174 * @{ */
1175 /** The guest's page directory pointer table, static GC mapping. */
1176 GCPTRTYPE(PX86PDPTR) pGstPaePDPTRGC;
1177 /** The guest's page directory pointer table, HC pointer. */
1178 HCPTRTYPE(PX86PDPTR) pGstPaePDPTRHC;
1179 /** The guest's page directories, HC pointers.
1180 * These are individual pointers and doesn't have to be adjecent.
1181 * These doesn't have to be update to date - use pgmGstGetPaePD() to access them. */
1182 HCPTRTYPE(PX86PDPAE) apGstPaePDsHC[4];
1183 /** The guest's page directories, static GC mapping.
1184 * Unlike the HC array the first entry can be accessed as a 2048 entry PD.
1185 * These doesn't have to be update to date - use pgmGstGetPaePD() to access them. */
1186 GCPTRTYPE(PX86PDPAE) apGstPaePDsGC[4];
1187 /** The physical addresses of the guest page directories (PAE) pointed to by apGstPagePDsHC/GC. */
1188 RTGCPHYS aGCPhysGstPaePDs[4];
1189 /** The physical addresses of the monitored guest page directories (PAE). */
1190 RTGCPHYS aGCPhysGstPaePDsMonitored[4];
1191 /** @} */
1192
1193
1194 /** @name 32-bit Shadow Paging
1195 * @{ */
1196 /** The 32-Bit PD - HC Ptr. */
1197 HCPTRTYPE(PX86PD) pHC32BitPD;
1198 /** The 32-Bit PD - GC Ptr. */
1199 GCPTRTYPE(PX86PD) pGC32BitPD;
1200#if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32
1201 uint32_t u32Padding1; /**< alignment padding. */
1202#endif
1203 /** The Physical Address (HC) of the 32-Bit PD. */
1204 RTHCPHYS HCPhys32BitPD;
1205 /** @} */
1206
1207 /** @name PAE Shadow Paging
1208 * @{ */
1209 /** The four PDs for the low 4GB - HC Ptr.
1210 * Even though these are 4 pointers, what they point at is a single table.
1211 * Thus, it's possible to walk the 2048 entries starting where apHCPaePDs[0] points. */
1212 HCPTRTYPE(PX86PDPAE) apHCPaePDs[4];
1213 /** The four PDs for the low 4GB - GC Ptr.
1214 * Same kind of mapping as apHCPaePDs. */
1215 GCPTRTYPE(PX86PDPAE) apGCPaePDs[4];
1216 /** The Physical Address (HC) of the four PDs for the low 4GB.
1217 * These are *NOT* 4 contiguous pages. */
1218 RTHCPHYS aHCPhysPaePDs[4];
1219 /** The PAE PDPTR - HC Ptr. */
1220 HCPTRTYPE(PX86PDPTR) pHCPaePDPTR;
1221 /** The Physical Address (HC) of the PAE PDPTR. */
1222 RTHCPHYS HCPhysPaePDPTR;
1223 /** The PAE PDPTR - GC Ptr. */
1224 GCPTRTYPE(PX86PDPTR) pGCPaePDPTR;
1225 /** @} */
1226
1227 /** @name AMD64 Shadow Paging
1228 * Extends PAE Paging.
1229 * @{ */
1230 /** The Page Map Level 4 table - HC Ptr. */
1231 GCPTRTYPE(PX86PML4) pGCPaePML4;
1232 /** The Page Map Level 4 table - GC Ptr. */
1233 HCPTRTYPE(PX86PML4) pHCPaePML4;
1234 /** The Physical Address (HC) of the Page Map Level 4 table. */
1235 RTHCPHYS HCPhysPaePML4;
1236 /** @}*/
1237
1238 /** @name Function pointers for Shadow paging.
1239 * @{
1240 */
1241 DECLR3CALLBACKMEMBER(int, pfnR3ShwRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1242 DECLR3CALLBACKMEMBER(int, pfnR3ShwExit,(PVM pVM));
1243 DECLR3CALLBACKMEMBER(int, pfnR3ShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1244 DECLR3CALLBACKMEMBER(int, pfnR3ShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1245 DECLR3CALLBACKMEMBER(int, pfnR3ShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1246 DECLR3CALLBACKMEMBER(int, pfnR3ShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1247 DECLR3CALLBACKMEMBER(int, pfnR3ShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1248
1249 DECLGCCALLBACKMEMBER(int, pfnGCShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1250 DECLGCCALLBACKMEMBER(int, pfnGCShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1251 DECLGCCALLBACKMEMBER(int, pfnGCShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1252 DECLGCCALLBACKMEMBER(int, pfnGCShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1253 DECLGCCALLBACKMEMBER(int, pfnGCShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1254#if GC_ARCH_BITS == 32 && HC_ARCH_BITS == 64
1255 RTGCPTR alignment0; /**< structure size alignment. */
1256#endif
1257
1258 DECLR0CALLBACKMEMBER(int, pfnR0ShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1259 DECLR0CALLBACKMEMBER(int, pfnR0ShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1260 DECLR0CALLBACKMEMBER(int, pfnR0ShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1261 DECLR0CALLBACKMEMBER(int, pfnR0ShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1262 DECLR0CALLBACKMEMBER(int, pfnR0ShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1263
1264 /** @} */
1265
1266 /** @name Function pointers for Guest paging.
1267 * @{
1268 */
1269 DECLR3CALLBACKMEMBER(int, pfnR3GstRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1270 DECLR3CALLBACKMEMBER(int, pfnR3GstExit,(PVM pVM));
1271 DECLR3CALLBACKMEMBER(int, pfnR3GstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1272 DECLR3CALLBACKMEMBER(int, pfnR3GstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1273 DECLR3CALLBACKMEMBER(int, pfnR3GstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1274 DECLR3CALLBACKMEMBER(int, pfnR3GstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1275 DECLR3CALLBACKMEMBER(int, pfnR3GstUnmonitorCR3,(PVM pVM));
1276 DECLR3CALLBACKMEMBER(int, pfnR3GstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1277 DECLR3CALLBACKMEMBER(int, pfnR3GstUnmapCR3,(PVM pVM));
1278 HCPTRTYPE(PFNPGMR3PHYSHANDLER) pfnHCGstWriteHandlerCR3;
1279 HCPTRTYPE(const char *) pszHCGstWriteHandlerCR3;
1280
1281 DECLGCCALLBACKMEMBER(int, pfnGCGstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1282 DECLGCCALLBACKMEMBER(int, pfnGCGstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1283 DECLGCCALLBACKMEMBER(int, pfnGCGstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1284 DECLGCCALLBACKMEMBER(int, pfnGCGstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1285 DECLGCCALLBACKMEMBER(int, pfnGCGstUnmonitorCR3,(PVM pVM));
1286 DECLGCCALLBACKMEMBER(int, pfnGCGstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1287 DECLGCCALLBACKMEMBER(int, pfnGCGstUnmapCR3,(PVM pVM));
1288 GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnGCGstWriteHandlerCR3;
1289
1290 DECLR0CALLBACKMEMBER(int, pfnR0GstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1291 DECLR0CALLBACKMEMBER(int, pfnR0GstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1292 DECLR0CALLBACKMEMBER(int, pfnR0GstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1293 DECLR0CALLBACKMEMBER(int, pfnR0GstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1294 DECLR0CALLBACKMEMBER(int, pfnR0GstUnmonitorCR3,(PVM pVM));
1295 DECLR0CALLBACKMEMBER(int, pfnR0GstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1296 DECLR0CALLBACKMEMBER(int, pfnR0GstUnmapCR3,(PVM pVM));
1297 R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnR0GstWriteHandlerCR3;
1298 /** @} */
1299
1300 /** @name Function pointers for Both Shadow and Guest paging.
1301 * @{
1302 */
1303 DECLR3CALLBACKMEMBER(int, pfnR3BthRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1304 DECLR3CALLBACKMEMBER(int, pfnR3BthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1305 DECLR3CALLBACKMEMBER(int, pfnR3BthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1306 DECLR3CALLBACKMEMBER(int, pfnR3BthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
1307 DECLR3CALLBACKMEMBER(int, pfnR3BthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
1308 DECLR3CALLBACKMEMBER(int, pfnR3BthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
1309 DECLR3CALLBACKMEMBER(int, pfnR3BthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
1310 DECLR3CALLBACKMEMBER(unsigned, pfnR3BthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
1311
1312 DECLR0CALLBACKMEMBER(int, pfnR0BthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1313 DECLR0CALLBACKMEMBER(int, pfnR0BthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1314 DECLR0CALLBACKMEMBER(int, pfnR0BthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
1315 DECLR0CALLBACKMEMBER(int, pfnR0BthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
1316 DECLR0CALLBACKMEMBER(int, pfnR0BthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
1317 DECLR0CALLBACKMEMBER(int, pfnR0BthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
1318 DECLR0CALLBACKMEMBER(unsigned, pfnR0BthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
1319
1320 DECLGCCALLBACKMEMBER(int, pfnGCBthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1321 DECLGCCALLBACKMEMBER(int, pfnGCBthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1322 DECLGCCALLBACKMEMBER(int, pfnGCBthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
1323 DECLGCCALLBACKMEMBER(int, pfnGCBthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
1324 DECLGCCALLBACKMEMBER(int, pfnGCBthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
1325 DECLGCCALLBACKMEMBER(int, pfnGCBthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
1326 DECLGCCALLBACKMEMBER(unsigned, pfnGCBthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
1327#if GC_ARCH_BITS == 32 && HC_ARCH_BITS == 64
1328 RTGCPTR alignment2; /**< structure size alignment. */
1329#endif
1330 /** @} */
1331
1332 /** Pointer to SHW+GST mode data (function pointers).
1333 * The index into this table is made up from */
1334 R3PTRTYPE(PPGMMODEDATA) paModeData;
1335
1336
1337 /** Pointer to the list of RAM ranges (Phys GC -> Phys HC conversion) - for HC.
1338 * This is sorted by physical address and contains no overlaps.
1339 * The memory locks and other conversions are managed by MM at the moment.
1340 */
1341 HCPTRTYPE(PPGMRAMRANGE) pRamRangesHC;
1342 /** Pointer to the list of RAM ranges (Phys GC -> Phys HC conversion) - for GC.
1343 * This is sorted by physical address and contains no overlaps.
1344 * The memory locks and other conversions are managed by MM at the moment.
1345 */
1346 GCPTRTYPE(PPGMRAMRANGE) pRamRangesGC;
1347 /** The configured RAM size. */
1348 RTUINT cbRamSize;
1349
1350 /** PGM offset based trees - HC Ptr. */
1351 HCPTRTYPE(PPGMTREES) pTreesHC;
1352 /** PGM offset based trees - GC Ptr. */
1353 GCPTRTYPE(PPGMTREES) pTreesGC;
1354
1355 /** Linked list of GC mappings - for GC.
1356 * The list is sorted ascending on address.
1357 */
1358 GCPTRTYPE(PPGMMAPPING) pMappingsGC;
1359 /** Linked list of GC mappings - for HC.
1360 * The list is sorted ascending on address.
1361 */
1362 HCPTRTYPE(PPGMMAPPING) pMappingsHC;
1363
1364 /** If set no conflict checks are required. (boolean) */
1365 bool fMappingsFixed;
1366 /** If set, then no mappings are put into the shadow page table. (boolean) */
1367 bool fDisableMappings;
1368 /** Size of fixed mapping */
1369 uint32_t cbMappingFixed;
1370 /** Base address (GC) of fixed mapping */
1371 RTGCPTR GCPtrMappingFixed;
1372#if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32
1373 uint32_t u32Padding0; /**< alignment padding. */
1374#endif
1375
1376
1377 /** @name Intermediate Context
1378 * @{ */
1379 /** Pointer to the intermediate page directory - Normal. */
1380 HCPTRTYPE(PX86PD) pInterPD;
1381 /** Pointer to the intermedate page tables - Normal.
1382 * There are two page tables, one for the identity mapping and one for
1383 * the host context mapping (of the core code). */
1384 HCPTRTYPE(PX86PT) apInterPTs[2];
1385 /** Pointer to the intermedate page tables - PAE. */
1386 HCPTRTYPE(PX86PTPAE) apInterPaePTs[2];
1387 /** Pointer to the intermedate page directory - PAE. */
1388 HCPTRTYPE(PX86PDPAE) apInterPaePDs[4];
1389 /** Pointer to the intermedate page directory - PAE. */
1390 HCPTRTYPE(PX86PDPTR) pInterPaePDPTR;
1391 /** Pointer to the intermedate page-map level 4 - AMD64. */
1392 HCPTRTYPE(PX86PML4) pInterPaePML4;
1393 /** Pointer to the intermedate page directory - AMD64. */
1394 HCPTRTYPE(PX86PDPTR) pInterPaePDPTR64;
1395 /** The Physical Address (HC) of the intermediate Page Directory - Normal. */
1396 RTHCPHYS HCPhysInterPD;
1397 /** The Physical Address (HC) of the intermediate Page Directory Pointer Table - PAE. */
1398 RTHCPHYS HCPhysInterPaePDPTR;
1399 /** The Physical Address (HC) of the intermediate Page Map Level 4 table - AMD64. */
1400 RTHCPHYS HCPhysInterPaePML4;
1401 /** @} */
1402
1403 /** Base address of the dynamic page mapping area.
1404 * The array is MM_HYPER_DYNAMIC_SIZE bytes big.
1405 */
1406 GCPTRTYPE(uint8_t *) pbDynPageMapBaseGC;
1407 /** The index of the last entry used in the dynamic page mapping area. */
1408 RTUINT iDynPageMapLast;
1409 /** Cache containing the last entries in the dynamic page mapping area.
1410 * The cache size is covering half of the mapping area. */
1411 RTHCPHYS aHCPhysDynPageMapCache[MM_HYPER_DYNAMIC_SIZE >> (PAGE_SHIFT + 1)];
1412
1413 /** A20 gate mask.
1414 * Our current approach to A20 emulation is to let REM do it and don't bother
1415 * anywhere else. The interesting Guests will be operating with it enabled anyway.
1416 * But whould need arrise, we'll subject physical addresses to this mask. */
1417 RTGCPHYS GCPhysA20Mask;
1418 /** A20 gate state - boolean! */
1419 RTUINT fA20Enabled;
1420
1421 /** What needs syncing (PGM_SYNC_*).
1422 * This is used to queue operations for PGMSyncCR3, PGMInvalidatePage,
1423 * PGMFlushTLB, and PGMR3Load. */
1424 RTUINT fSyncFlags;
1425
1426#if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32
1427 RTUINT uPadding3; /**< alignment padding. */
1428#endif
1429 /** PGM critical section.
1430 * This protects the physical & virtual access handlers, ram ranges,
1431 * and the page flag updating (some of it anyway).
1432 */
1433 PDMCRITSECT CritSect;
1434
1435 /** Shadow Page Pool - HC Ptr. */
1436 HCPTRTYPE(PPGMPOOL) pPoolHC;
1437 /** Shadow Page Pool - GC Ptr. */
1438 GCPTRTYPE(PPGMPOOL) pPoolGC;
1439
1440 /** Flush the cache on the next access. */
1441 bool fPhysCacheFlushPending;
1442/** @todo r=bird: Fix member names!*/
1443 /** PGMPhysRead cache */
1444 PGMPHYSCACHE pgmphysreadcache;
1445 /** PGMPhysWrite cache */
1446 PGMPHYSCACHE pgmphyswritecache;
1447
1448 /** @name Release Statistics
1449 * @{ */
1450 /** The number of times the guest has switched mode since last reset or statistics reset. */
1451 STAMCOUNTER cGuestModeChanges;
1452 /** @} */
1453
1454#ifdef VBOX_WITH_STATISTICS
1455 /** GC: Which statistic this \#PF should be attributed to. */
1456 GCPTRTYPE(PSTAMPROFILE) pStatTrap0eAttributionGC;
1457 RTGCPTR padding0;
1458 /** HC: Which statistic this \#PF should be attributed to. */
1459 HCPTRTYPE(PSTAMPROFILE) pStatTrap0eAttributionHC;
1460 RTHCPTR padding1;
1461 STAMPROFILE StatGCTrap0e; /**< GC: PGMGCTrap0eHandler() profiling. */
1462 STAMPROFILE StatTrap0eCSAM; /**< Profiling of the Trap0eHandler body when the cause is CSAM. */
1463 STAMPROFILE StatTrap0eDirtyAndAccessedBits; /**< Profiling of the Trap0eHandler body when the cause is dirty and/or accessed bit emulation. */
1464 STAMPROFILE StatTrap0eGuestTrap; /**< Profiling of the Trap0eHandler body when the cause is a guest trap. */
1465 STAMPROFILE StatTrap0eHndPhys; /**< Profiling of the Trap0eHandler body when the cause is a physical handler. */
1466 STAMPROFILE StatTrap0eHndVirt; /**< Profiling of the Trap0eHandler body when the cause is a virtual handler. */
1467 STAMPROFILE StatTrap0eHndUnhandled; /**< Profiling of the Trap0eHandler body when the cause is access outside the monitored areas of a monitored page. */
1468 STAMPROFILE StatTrap0eMisc; /**< Profiling of the Trap0eHandler body when the cause is not known. */
1469 STAMPROFILE StatTrap0eOutOfSync; /**< Profiling of the Trap0eHandler body when the cause is an out-of-sync page. */
1470 STAMPROFILE StatTrap0eOutOfSyncHndPhys; /**< Profiling of the Trap0eHandler body when the cause is an out-of-sync physical handler page. */
1471 STAMPROFILE StatTrap0eOutOfSyncHndVirt; /**< Profiling of the Trap0eHandler body when the cause is an out-of-sync virtual handler page. */
1472 STAMPROFILE StatTrap0eOutOfSyncObsHnd; /**< Profiling of the Trap0eHandler body when the cause is an obsolete handler page. */
1473 STAMPROFILE StatTrap0eSyncPT; /**< Profiling of the Trap0eHandler body when the cause is lazy syncing of a PT. */
1474
1475 STAMCOUNTER StatTrap0eMapHandler; /**< Number of traps due to access handlers in mappings. */
1476 STAMCOUNTER StatGCTrap0eConflicts; /**< GC: The number of times \#PF was caused by an undetected conflict. */
1477
1478 STAMCOUNTER StatGCTrap0eUSNotPresentRead;
1479 STAMCOUNTER StatGCTrap0eUSNotPresentWrite;
1480 STAMCOUNTER StatGCTrap0eUSWrite;
1481 STAMCOUNTER StatGCTrap0eUSReserved;
1482 STAMCOUNTER StatGCTrap0eUSRead;
1483
1484 STAMCOUNTER StatGCTrap0eSVNotPresentRead;
1485 STAMCOUNTER StatGCTrap0eSVNotPresentWrite;
1486 STAMCOUNTER StatGCTrap0eSVWrite;
1487 STAMCOUNTER StatGCTrap0eSVReserved;
1488
1489 STAMCOUNTER StatGCTrap0eUnhandled;
1490 STAMCOUNTER StatGCTrap0eMap;
1491
1492 /** GC: PGMSyncPT() profiling. */
1493 STAMPROFILE StatGCSyncPT;
1494 /** GC: The number of times PGMSyncPT() needed to allocate page tables. */
1495 STAMCOUNTER StatGCSyncPTAlloc;
1496 /** GC: The number of times PGMSyncPT() detected conflicts. */
1497 STAMCOUNTER StatGCSyncPTConflict;
1498 /** GC: The number of times PGMSyncPT() failed. */
1499 STAMCOUNTER StatGCSyncPTFailed;
1500 /** GC: PGMGCInvalidatePage() profiling. */
1501 STAMPROFILE StatGCInvalidatePage;
1502 /** GC: The number of times PGMGCInvalidatePage() was called for a 4KB page. */
1503 STAMCOUNTER StatGCInvalidatePage4KBPages;
1504 /** GC: The number of times PGMGCInvalidatePage() was called for a 4MB page. */
1505 STAMCOUNTER StatGCInvalidatePage4MBPages;
1506 /** GC: The number of times PGMGCInvalidatePage() skipped a 4MB page. */
1507 STAMCOUNTER StatGCInvalidatePage4MBPagesSkip;
1508 /** GC: The number of times PGMGCInvalidatePage() was called for a not accessed page directory. */
1509 STAMCOUNTER StatGCInvalidatePagePDNAs;
1510 /** GC: The number of times PGMGCInvalidatePage() was called for a not present page directory. */
1511 STAMCOUNTER StatGCInvalidatePagePDNPs;
1512 /** GC: The number of times PGMGCInvalidatePage() was called for a page directory containing mappings (no conflict). */
1513 STAMCOUNTER StatGCInvalidatePagePDMappings;
1514 /** GC: The number of times PGMGCInvalidatePage() was called for an out of sync page directory. */
1515 STAMCOUNTER StatGCInvalidatePagePDOutOfSync;
1516 /** HC: The number of times PGMGCInvalidatePage() was skipped due to not present shw or pending pending SyncCR3. */
1517 STAMCOUNTER StatGCInvalidatePageSkipped;
1518 /** GC: The number of times user page is out of sync was detected in GC. */
1519 STAMCOUNTER StatGCPageOutOfSyncUser;
1520 /** GC: The number of times supervisor page is out of sync was detected in GC. */
1521 STAMCOUNTER StatGCPageOutOfSyncSupervisor;
1522 /** GC: The number of dynamic page mapping cache hits */
1523 STAMCOUNTER StatDynMapCacheMisses;
1524 /** GC: The number of dynamic page mapping cache misses */
1525 STAMCOUNTER StatDynMapCacheHits;
1526 /** GC: The number of times pgmGCGuestPDWriteHandler() was successfully called. */
1527 STAMCOUNTER StatGCGuestCR3WriteHandled;
1528 /** GC: The number of times pgmGCGuestPDWriteHandler() was called and we had to fall back to the recompiler. */
1529 STAMCOUNTER StatGCGuestCR3WriteUnhandled;
1530 /** GC: The number of times pgmGCGuestPDWriteHandler() was called and a conflict was detected. */
1531 STAMCOUNTER StatGCGuestCR3WriteConflict;
1532 /** GC: Number of out-of-sync handled pages. */
1533 STAMCOUNTER StatHandlersOutOfSync;
1534 /** GC: Number of traps due to physical access handlers. */
1535 STAMCOUNTER StatHandlersPhysical;
1536 /** GC: Number of traps due to virtual access handlers. */
1537 STAMCOUNTER StatHandlersVirtual;
1538 /** GC: Number of traps due to virtual access handlers found by physical address. */
1539 STAMCOUNTER StatHandlersVirtualByPhys;
1540 /** GC: Number of traps due to virtual access handlers found by virtual address (without proper physical flags). */
1541 STAMCOUNTER StatHandlersVirtualUnmarked;
1542 /** GC: Number of traps due to access outside range of monitored page(s). */
1543 STAMCOUNTER StatHandlersUnhandled;
1544
1545 /** GC: The number of times pgmGCGuestROMWriteHandler() was successfully called. */
1546 STAMCOUNTER StatGCGuestROMWriteHandled;
1547 /** GC: The number of times pgmGCGuestROMWriteHandler() was called and we had to fall back to the recompiler */
1548 STAMCOUNTER StatGCGuestROMWriteUnhandled;
1549
1550 /** HC: PGMR3InvalidatePage() profiling. */
1551 STAMPROFILE StatHCInvalidatePage;
1552 /** HC: The number of times PGMR3InvalidatePage() was called for a 4KB page. */
1553 STAMCOUNTER StatHCInvalidatePage4KBPages;
1554 /** HC: The number of times PGMR3InvalidatePage() was called for a 4MB page. */
1555 STAMCOUNTER StatHCInvalidatePage4MBPages;
1556 /** HC: The number of times PGMR3InvalidatePage() skipped a 4MB page. */
1557 STAMCOUNTER StatHCInvalidatePage4MBPagesSkip;
1558 /** HC: The number of times PGMR3InvalidatePage() was called for a not accessed page directory. */
1559 STAMCOUNTER StatHCInvalidatePagePDNAs;
1560 /** HC: The number of times PGMR3InvalidatePage() was called for a not present page directory. */
1561 STAMCOUNTER StatHCInvalidatePagePDNPs;
1562 /** HC: The number of times PGMR3InvalidatePage() was called for a page directory containing mappings (no conflict). */
1563 STAMCOUNTER StatHCInvalidatePagePDMappings;
1564 /** HC: The number of times PGMGCInvalidatePage() was called for an out of sync page directory. */
1565 STAMCOUNTER StatHCInvalidatePagePDOutOfSync;
1566 /** HC: The number of times PGMR3InvalidatePage() was skipped due to not present shw or pending pending SyncCR3. */
1567 STAMCOUNTER StatHCInvalidatePageSkipped;
1568 /** HC: PGMR3SyncPT() profiling. */
1569 STAMPROFILE StatHCSyncPT;
1570 /** HC: pgmr3SyncPTResolveConflict() profiling (includes the entire relocation). */
1571 STAMPROFILE StatHCResolveConflict;
1572 /** HC: Number of times PGMR3CheckMappingConflicts() detected a conflict. */
1573 STAMCOUNTER StatHCDetectedConflicts;
1574 /** HC: The total number of times pgmHCGuestPDWriteHandler() was called. */
1575 STAMCOUNTER StatHCGuestPDWrite;
1576 /** HC: The number of times pgmHCGuestPDWriteHandler() detected a conflict */
1577 STAMCOUNTER StatHCGuestPDWriteConflict;
1578
1579 /** HC: The number of pages marked not present for accessed bit emulation. */
1580 STAMCOUNTER StatHCAccessedPage;
1581 /** HC: The number of pages marked read-only for dirty bit tracking. */
1582 STAMCOUNTER StatHCDirtyPage;
1583 /** HC: The number of pages marked read-only for dirty bit tracking. */
1584 STAMCOUNTER StatHCDirtyPageBig;
1585 /** HC: The number of traps generated for dirty bit tracking. */
1586 STAMCOUNTER StatHCDirtyPageTrap;
1587 /** HC: The number of pages already dirty or readonly. */
1588 STAMCOUNTER StatHCDirtyPageSkipped;
1589
1590 /** GC: The number of pages marked not present for accessed bit emulation. */
1591 STAMCOUNTER StatGCAccessedPage;
1592 /** GC: The number of pages marked read-only for dirty bit tracking. */
1593 STAMCOUNTER StatGCDirtyPage;
1594 /** GC: The number of pages marked read-only for dirty bit tracking. */
1595 STAMCOUNTER StatGCDirtyPageBig;
1596 /** GC: The number of traps generated for dirty bit tracking. */
1597 STAMCOUNTER StatGCDirtyPageTrap;
1598 /** GC: The number of pages already dirty or readonly. */
1599 STAMCOUNTER StatGCDirtyPageSkipped;
1600 /** GC: The number of pages marked dirty because of write accesses. */
1601 STAMCOUNTER StatGCDirtiedPage;
1602 /** GC: The number of pages already marked dirty because of write accesses. */
1603 STAMCOUNTER StatGCPageAlreadyDirty;
1604 /** GC: The number of real pages faults during dirty bit tracking. */
1605 STAMCOUNTER StatGCDirtyTrackRealPF;
1606
1607 /** GC: Profiling of the PGMTrackDirtyBit() body */
1608 STAMPROFILE StatGCDirtyBitTracking;
1609 /** HC: Profiling of the PGMTrackDirtyBit() body */
1610 STAMPROFILE StatHCDirtyBitTracking;
1611
1612 /** GC: Profiling of the PGMGstModifyPage() body */
1613 STAMPROFILE StatGCGstModifyPage;
1614 /** HC: Profiling of the PGMGstModifyPage() body */
1615 STAMPROFILE StatHCGstModifyPage;
1616
1617 /** GC: The number of time we've marked a PD not present from SyncPage to virtualize the accessed bit. */
1618 STAMCOUNTER StatGCSyncPagePDNAs;
1619 /** GC: The number of time we've encountered an out-of-sync PD in SyncPage. */
1620 STAMCOUNTER StatGCSyncPagePDOutOfSync;
1621 /** HC: The number of time we've marked a PD not present from SyncPage to virtualize the accessed bit. */
1622 STAMCOUNTER StatHCSyncPagePDNAs;
1623 /** HC: The number of time we've encountered an out-of-sync PD in SyncPage. */
1624 STAMCOUNTER StatHCSyncPagePDOutOfSync;
1625
1626 STAMCOUNTER StatSynPT4kGC;
1627 STAMCOUNTER StatSynPT4kHC;
1628 STAMCOUNTER StatSynPT4MGC;
1629 STAMCOUNTER StatSynPT4MHC;
1630
1631 /** Profiling of the PGMFlushTLB() body. */
1632 STAMPROFILE StatFlushTLB;
1633 /** The number of times PGMFlushTLB was called with a new CR3, non-global. (switch) */
1634 STAMCOUNTER StatFlushTLBNewCR3;
1635 /** The number of times PGMFlushTLB was called with a new CR3, global. (switch) */
1636 STAMCOUNTER StatFlushTLBNewCR3Global;
1637 /** The number of times PGMFlushTLB was called with the same CR3, non-global. (flush) */
1638 STAMCOUNTER StatFlushTLBSameCR3;
1639 /** The number of times PGMFlushTLB was called with the same CR3, global. (flush) */
1640 STAMCOUNTER StatFlushTLBSameCR3Global;
1641
1642 STAMPROFILE StatGCSyncCR3; /**< GC: PGMSyncCR3() profiling. */
1643 STAMPROFILE StatGCSyncCR3Handlers; /**< GC: Profiling of the PGMSyncCR3() update handler section. */
1644 STAMPROFILE StatGCSyncCR3HandlerVirtualReset; /**< GC: Profiling of the virtual handler resets. */
1645 STAMPROFILE StatGCSyncCR3HandlerVirtualUpdate; /**< GC: Profiling of the virtual handler updates. */
1646 STAMCOUNTER StatGCSyncCR3Global; /**< GC: The number of global CR3 syncs. */
1647 STAMCOUNTER StatGCSyncCR3NotGlobal; /**< GC: The number of non-global CR3 syncs. */
1648 STAMCOUNTER StatGCSyncCR3DstFreed; /**< GC: The number of times we've had to free a shadow entry. */
1649 STAMCOUNTER StatGCSyncCR3DstFreedSrcNP; /**< GC: The number of times we've had to free a shadow entry for which the source entry was not present. */
1650 STAMCOUNTER StatGCSyncCR3DstNotPresent; /**< GC: The number of times we've encountered a not present shadow entry for a present guest entry. */
1651 STAMCOUNTER StatGCSyncCR3DstSkippedGlobalPD; /**< GC: The number of times a global page directory wasn't flushed. */
1652 STAMCOUNTER StatGCSyncCR3DstSkippedGlobalPT; /**< GC: The number of times a page table with only global entries wasn't flushed. */
1653 STAMCOUNTER StatGCSyncCR3DstCacheHit; /**< GC: The number of times we got some kind of cache hit on a page table. */
1654
1655 STAMPROFILE StatHCSyncCR3; /**< HC: PGMSyncCR3() profiling. */
1656 STAMPROFILE StatHCSyncCR3Handlers; /**< HC: Profiling of the PGMSyncCR3() update handler section. */
1657 STAMPROFILE StatHCSyncCR3HandlerVirtualReset; /**< HC: Profiling of the virtual handler resets. */
1658 STAMPROFILE StatHCSyncCR3HandlerVirtualUpdate; /**< HC: Profiling of the virtual handler updates. */
1659 STAMCOUNTER StatHCSyncCR3Global; /**< HC: The number of global CR3 syncs. */
1660 STAMCOUNTER StatHCSyncCR3NotGlobal; /**< HC: The number of non-global CR3 syncs. */
1661 STAMCOUNTER StatHCSyncCR3DstFreed; /**< HC: The number of times we've had to free a shadow entry. */
1662 STAMCOUNTER StatHCSyncCR3DstFreedSrcNP; /**< HC: The number of times we've had to free a shadow entry for which the source entry was not present. */
1663 STAMCOUNTER StatHCSyncCR3DstNotPresent; /**< HC: The number of times we've encountered a not present shadow entry for a present guest entry. */
1664 STAMCOUNTER StatHCSyncCR3DstSkippedGlobalPD; /**< HC: The number of times a global page directory wasn't flushed. */
1665 STAMCOUNTER StatHCSyncCR3DstSkippedGlobalPT; /**< HC: The number of times a page table with only global entries wasn't flushed. */
1666 STAMCOUNTER StatHCSyncCR3DstCacheHit; /**< HC: The number of times we got some kind of cache hit on a page table. */
1667
1668 /** GC: Profiling of pgmHandlerVirtualFindByPhysAddr. */
1669 STAMPROFILE StatVirtHandleSearchByPhysGC;
1670 /** HC: Profiling of pgmHandlerVirtualFindByPhysAddr. */
1671 STAMPROFILE StatVirtHandleSearchByPhysHC;
1672 /** HC: The number of times PGMR3HandlerPhysicalReset is called. */
1673 STAMCOUNTER StatHandlePhysicalReset;
1674
1675 STAMPROFILE StatCheckPageFault;
1676 STAMPROFILE StatLazySyncPT;
1677 STAMPROFILE StatMapping;
1678 STAMPROFILE StatOutOfSync;
1679 STAMPROFILE StatHandlers;
1680 STAMPROFILE StatEIPHandlers;
1681 STAMPROFILE StatHCPrefetch;
1682
1683# ifdef PGMPOOL_WITH_GCPHYS_TRACKING
1684 /** The number of first time shadowings. */
1685 STAMCOUNTER StatTrackVirgin;
1686 /** The number of times switching to cRef2, i.e. the page is being shadowed by two PTs. */
1687 STAMCOUNTER StatTrackAliased;
1688 /** The number of times we're tracking using cRef2. */
1689 STAMCOUNTER StatTrackAliasedMany;
1690 /** The number of times we're hitting pages which has overflowed cRef2. */
1691 STAMCOUNTER StatTrackAliasedLots;
1692 /** The number of times the extent list grows to long. */
1693 STAMCOUNTER StatTrackOverflows;
1694 /** Profiling of SyncPageWorkerTrackDeref (expensive). */
1695 STAMPROFILE StatTrackDeref;
1696# endif
1697
1698 /** Allocated mbs of guest ram */
1699 STAMCOUNTER StatDynRamTotal;
1700 /** Nr of pgmr3PhysGrowRange calls. */
1701 STAMCOUNTER StatDynRamGrow;
1702
1703 STAMCOUNTER StatGCTrap0ePD[X86_PG_ENTRIES];
1704 STAMCOUNTER StatGCSyncPtPD[X86_PG_ENTRIES];
1705 STAMCOUNTER StatGCSyncPagePD[X86_PG_ENTRIES];
1706#endif
1707} PGM, *PPGM;
1708
1709
1710/** @name PGM::fSyncFlags Flags
1711 * @{
1712 */
1713/** Updates the MM_RAM_FLAGS_VIRTUAL_HANDLER page bit. */
1714#define PGM_SYNC_UPDATE_PAGE_BIT_VIRTUAL BIT(0)
1715/** Always sync CR3. */
1716#define PGM_SYNC_ALWAYS BIT(1)
1717/** Check monitoring on next CR3 (re)load and invalidate page. */
1718#define PGM_SYNC_MONITOR_CR3 BIT(2)
1719/** Clear the page pool (a light weight flush). */
1720#define PGM_SYNC_CLEAR_PGM_POOL BIT(8)
1721/** @} */
1722
1723
1724__BEGIN_DECLS
1725
1726PGMGCDECL(int) pgmGCGuestPDWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, void *pvFault, RTGCPHYS GCPhysFault, void *pvUser);
1727PGMDECL(int) pgmGuestROMWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, void *pvFault, RTGCPHYS GCPhysFault, void *pvUser);
1728PGMGCDECL(int) pgmCachePTWriteGC(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser);
1729int pgmR3SyncPTResolveConflict(PVM pVM, PPGMMAPPING pMapping, PVBOXPD pPDSrc, int iPDOld);
1730PPGMMAPPING pgmGetMapping(PVM pVM, RTGCPTR GCPtr);
1731void pgmR3MapRelocate(PVM pVM, PPGMMAPPING pMapping, int iPDOld, int iPDNew);
1732int pgmR3ChangeMode(PVM pVM, PGMMODE enmGuestMode);
1733int pgmLock(PVM pVM);
1734void pgmUnlock(PVM pVM);
1735
1736void pgmR3HandlerPhysicalUpdateAll(PVM pVM);
1737int pgmHandlerVirtualFindByPhysAddr(PVM pVM, RTGCPHYS GCPhys, PPGMVIRTHANDLER *ppVirt, unsigned *piPage);
1738DECLCALLBACK(int) pgmHandlerVirtualResetOne(PAVLROGCPTRNODECORE pNode, void *pvUser);
1739#ifdef VBOX_STRICT
1740void pgmHandlerVirtualDumpPhysPages(PVM pVM);
1741#else
1742# define pgmHandlerVirtualDumpPhysPages(a) do { } while (0)
1743#endif
1744DECLCALLBACK(void) pgmR3InfoHandlers(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
1745
1746
1747#ifdef IN_RING3
1748int pgmr3PhysGrowRange(PVM pVM, RTGCPHYS GCPhys);
1749
1750int pgmR3PoolInit(PVM pVM);
1751void pgmR3PoolRelocate(PVM pVM);
1752void pgmR3PoolReset(PVM pVM);
1753
1754#endif
1755#ifdef IN_GC
1756void *pgmGCPoolMapPage(PVM pVM, PPGMPOOLPAGE pPage);
1757#endif
1758int pgmPoolAlloc(PVM pVM, RTGCPHYS GCPhys, PGMPOOLKIND enmKind, uint16_t iUser, uint16_t iUserTable, PPPGMPOOLPAGE ppPage);
1759PPGMPOOLPAGE pgmPoolGetPageByHCPhys(PVM pVM, RTHCPHYS HCPhys);
1760void pgmPoolFree(PVM pVM, RTHCPHYS HCPhys, uint16_t iUser, uint16_t iUserTable);
1761void pgmPoolFreeByPage(PPGMPOOL pPool, PPGMPOOLPAGE pPage, uint16_t iUser, uint16_t iUserTable);
1762int pgmPoolFlushPage(PPGMPOOL pPool, PPGMPOOLPAGE pPage);
1763void pgmPoolFlushAll(PVM pVM);
1764void pgmPoolClearAll(PVM pVM);
1765void pgmPoolTrackFlushGCPhysPT(PVM pVM, PRTHCPHYS pHCPhys, uint16_t iShw, uint16_t cRefs);
1766void pgmPoolTrackFlushGCPhysPTs(PVM pVM, PRTHCPHYS pHCPhys, uint16_t iPhysExt);
1767int pgmPoolTrackFlushGCPhysPTsSlow(PVM pVM, PRTHCPHYS pHCPhys);
1768PPGMPOOLPHYSEXT pgmPoolTrackPhysExtAlloc(PVM pVM, uint16_t *piPhysExt);
1769void pgmPoolTrackPhysExtFree(PVM pVM, uint16_t iPhysExt);
1770void pgmPoolTrackPhysExtFreeList(PVM pVM, uint16_t iPhysExt);
1771uint16_t pgmPoolTrackPhysExtAddref(PVM pVM, uint16_t u16, uint16_t iShwPT);
1772void pgmPoolTrackPhysExtDerefGCPhys(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PRTHCPHYS pHCPhys);
1773#ifdef PGMPOOL_WITH_MONITORING
1774# ifdef IN_RING3
1775void pgmPoolMonitorChainChanging(PPGMPOOL pPool, PPGMPOOLPAGE pPage, RTGCPHYS GCPhysFault, RTHCPTR pvAddress, PDISCPUSTATE pCpu);
1776# else
1777void pgmPoolMonitorChainChanging(PPGMPOOL pPool, PPGMPOOLPAGE pPage, RTGCPHYS GCPhysFault, RTGCPTR pvAddress, PDISCPUSTATE pCpu);
1778# endif
1779int pgmPoolMonitorChainFlush(PPGMPOOL pPool, PPGMPOOLPAGE pPage);
1780void pgmPoolMonitorModifiedInsert(PPGMPOOL pPool, PPGMPOOLPAGE pPage);
1781void pgmPoolMonitorModifiedClearAll(PVM pVM);
1782int pgmPoolMonitorMonitorCR3(PPGMPOOL pPool, uint16_t idxRoot, RTGCPHYS GCPhysCR3);
1783int pgmPoolMonitorUnmonitorCR3(PPGMPOOL pPool, uint16_t idxRoot);
1784#endif
1785
1786__END_DECLS
1787
1788
1789/**
1790 * Convert GC Phys to HC Phys.
1791 *
1792 * @returns VBox status.
1793 * @param pPGM PGM handle.
1794 * @param GCPhys The GC physical address.
1795 * @param pHCPhys Where to store the corresponding HC physical address.
1796 */
1797DECLINLINE(int) PGMRamGCPhys2HCPhys(PPGM pPGM, RTGCPHYS GCPhys, PRTHCPHYS pHCPhys)
1798{
1799 /*
1800 * Walk range list.
1801 */
1802 PPGMRAMRANGE pRam = CTXSUFF(pPGM->pRamRanges);
1803 while (pRam)
1804 {
1805 RTGCPHYS off = GCPhys - pRam->GCPhys;
1806 if (off < pRam->cb)
1807 {
1808 unsigned iPage = off >> PAGE_SHIFT;
1809 /* Physical chunk in dynamically allocated range not present? */
1810 if (RT_UNLIKELY(!(pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK)))
1811 {
1812#ifdef IN_RING3
1813 int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
1814#else
1815 int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
1816#endif
1817 if (rc != VINF_SUCCESS)
1818 return rc;
1819 }
1820 *pHCPhys = (pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK) | (off & PAGE_OFFSET_MASK);
1821 return VINF_SUCCESS;
1822 }
1823
1824 pRam = CTXSUFF(pRam->pNext);
1825 }
1826 return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
1827}
1828
1829
1830/**
1831 * Convert GC Phys to HC Virt.
1832 *
1833 * @returns VBox status.
1834 * @param pPGM PGM handle.
1835 * @param GCPhys The GC physical address.
1836 * @param pHCPtr Where to store the corresponding HC virtual address.
1837 */
1838DECLINLINE(int) PGMRamGCPhys2HCPtr(PPGM pPGM, RTGCPHYS GCPhys, PRTHCPTR pHCPtr)
1839{
1840 /*
1841 * Walk range list.
1842 */
1843 PPGMRAMRANGE pRam = CTXSUFF(pPGM->pRamRanges);
1844 while (pRam)
1845 {
1846 RTGCPHYS off = GCPhys - pRam->GCPhys;
1847 if (off < pRam->cb)
1848 {
1849 if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)
1850 {
1851 unsigned idx = (off >> PGM_DYNAMIC_CHUNK_SHIFT);
1852 /* Physical chunk in dynamically allocated range not present? */
1853 if (RT_UNLIKELY(!CTXSUFF(pRam->pavHCChunk)[idx]))
1854 {
1855#ifdef IN_RING3
1856 int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
1857#else
1858 int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
1859#endif
1860 if (rc != VINF_SUCCESS)
1861 return rc;
1862 }
1863 *pHCPtr = (RTHCPTR)((RTHCUINTPTR)CTXSUFF(pRam->pavHCChunk)[idx] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));
1864 return VINF_SUCCESS;
1865 }
1866 if (pRam->pvHC)
1867 {
1868 *pHCPtr = (RTHCPTR)((RTHCUINTPTR)pRam->pvHC + off);
1869 return VINF_SUCCESS;
1870 }
1871 return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
1872 }
1873
1874 pRam = CTXSUFF(pRam->pNext);
1875 }
1876 return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
1877}
1878
1879
1880/**
1881 * Convert GC Phys to HC Virt.
1882 *
1883 * @returns VBox status.
1884 * @param PVM VM handle.
1885 * @param pRam Ram range
1886 * @param GCPhys The GC physical address.
1887 * @param pHCPtr Where to store the corresponding HC virtual address.
1888 */
1889DECLINLINE(int) PGMRamGCPhys2HCPtr(PVM pVM, PPGMRAMRANGE pRam, RTGCPHYS GCPhys, PRTHCPTR pHCPtr)
1890{
1891 RTGCPHYS off = GCPhys - pRam->GCPhys;
1892 Assert(off < pRam->cb);
1893
1894 if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)
1895 {
1896 unsigned idx = (off >> PGM_DYNAMIC_CHUNK_SHIFT);
1897 /* Physical chunk in dynamically allocated range not present? */
1898 if (RT_UNLIKELY(!CTXSUFF(pRam->pavHCChunk)[idx]))
1899 {
1900#ifdef IN_RING3
1901 int rc = pgmr3PhysGrowRange(pVM, GCPhys);
1902#else
1903 int rc = CTXALLMID(VMM, CallHost)(pVM, VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
1904#endif
1905 if (rc != VINF_SUCCESS)
1906 return rc;
1907 }
1908 *pHCPtr = (RTHCPTR)((RTHCUINTPTR)CTXSUFF(pRam->pavHCChunk)[idx] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));
1909 return VINF_SUCCESS;
1910 }
1911 if (pRam->pvHC)
1912 {
1913 *pHCPtr = (RTHCPTR)((RTHCUINTPTR)pRam->pvHC + off);
1914 return VINF_SUCCESS;
1915 }
1916 return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
1917}
1918
1919
1920/**
1921 * Convert GC Phys to HC Virt and HC Phys.
1922 *
1923 * @returns VBox status.
1924 * @param pPGM PGM handle.
1925 * @param GCPhys The GC physical address.
1926 * @param pHCPtr Where to store the corresponding HC virtual address.
1927 * @param pHCPhys Where to store the HC Physical address and its flags.
1928 */
1929DECLINLINE(int) PGMRamGCPhys2HCPtrAndHCPhysWithFlags(PPGM pPGM, RTGCPHYS GCPhys, PRTHCPTR pHCPtr, PRTHCPHYS pHCPhys)
1930{
1931 /*
1932 * Walk range list.
1933 */
1934 PPGMRAMRANGE pRam = CTXSUFF(pPGM->pRamRanges);
1935 while (pRam)
1936 {
1937 RTGCPHYS off = GCPhys - pRam->GCPhys;
1938 if (off < pRam->cb)
1939 {
1940 unsigned iPage = off >> PAGE_SHIFT;
1941 /* Physical chunk in dynamically allocated range not present? */
1942 if (RT_UNLIKELY(!(pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK)))
1943 {
1944#ifdef IN_RING3
1945 int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
1946#else
1947 int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
1948#endif
1949 if (rc != VINF_SUCCESS)
1950 return rc;
1951 }
1952 *pHCPhys = pRam->aHCPhys[iPage];
1953
1954 if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)
1955 {
1956 unsigned idx = (off >> PGM_DYNAMIC_CHUNK_SHIFT);
1957 *pHCPtr = (RTHCPTR)((RTHCUINTPTR)CTXSUFF(pRam->pavHCChunk)[idx] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));
1958 return VINF_SUCCESS;
1959 }
1960 if (pRam->pvHC)
1961 {
1962 *pHCPtr = (RTHCPTR)((RTHCUINTPTR)pRam->pvHC + off);
1963 return VINF_SUCCESS;
1964 }
1965 *pHCPtr = 0;
1966 return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
1967 }
1968
1969 pRam = CTXSUFF(pRam->pNext);
1970 }
1971 return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
1972}
1973
1974
1975/**
1976 * Convert GC Phys page to a page entry pointer.
1977 *
1978 * This is used by code which may have to update the flags.
1979 *
1980 * @returns VBox status.
1981 * @param pPGM PGM handle.
1982 * @param GCPhys The GC physical address.
1983 * @param ppHCPhys Where to store the pointer to the page entry.
1984 */
1985DECLINLINE(int) PGMRamGCPhys2PagePtr(PPGM pPGM, RTGCPHYS GCPhys, PRTHCPHYS *ppHCPhys)
1986{
1987 /*
1988 * Walk range list.
1989 */
1990 PPGMRAMRANGE pRam = CTXSUFF(pPGM->pRamRanges);
1991 while (pRam)
1992 {
1993 RTGCPHYS off = GCPhys - pRam->GCPhys;
1994 if (off < pRam->cb)
1995 {
1996 unsigned iPage = off >> PAGE_SHIFT;
1997 /* Physical chunk in dynamically allocated range not present? */
1998 if (RT_UNLIKELY(!(pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK)))
1999 {
2000#ifdef IN_RING3
2001 int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
2002#else
2003 int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2004#endif
2005 if (rc != VINF_SUCCESS)
2006 return rc;
2007 }
2008 *ppHCPhys = &pRam->aHCPhys[iPage];
2009 return VINF_SUCCESS;
2010 }
2011
2012 pRam = CTXSUFF(pRam->pNext);
2013 }
2014 return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2015}
2016
2017
2018/**
2019 * Convert GC Phys page to HC Phys page and flags.
2020 *
2021 * @returns VBox status.
2022 * @param pPGM PGM handle.
2023 * @param GCPhys The GC physical address.
2024 * @param pHCPhys Where to store the corresponding HC physical address of the page
2025 * and the page flags.
2026 */
2027DECLINLINE(int) PGMRamGCPhys2HCPhysWithFlags(PPGM pPGM, RTGCPHYS GCPhys, PRTHCPHYS pHCPhys)
2028{
2029 /*
2030 * Walk range list.
2031 */
2032 PPGMRAMRANGE pRam = CTXSUFF(pPGM->pRamRanges);
2033 while (pRam)
2034 {
2035 RTGCPHYS off = GCPhys - pRam->GCPhys;
2036 if (off < pRam->cb)
2037 {
2038 unsigned iPage = off >> PAGE_SHIFT;
2039 /* Physical chunk in dynamically allocated range not present? */
2040 if (RT_UNLIKELY(!(pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK)))
2041 {
2042#ifdef IN_RING3
2043 int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
2044#else
2045 int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2046#endif
2047 if (rc != VINF_SUCCESS)
2048 return rc;
2049 }
2050 *pHCPhys = pRam->aHCPhys[iPage];
2051 return VINF_SUCCESS;
2052 }
2053
2054 pRam = CTXSUFF(pRam->pNext);
2055 }
2056 return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2057}
2058
2059
2060/**
2061 * Clears flags associated with a RAM address.
2062 *
2063 * @returns VBox status code.
2064 * @param pPGM PGM handle.
2065 * @param GCPhys Guest context physical address.
2066 * @param fFlags fFlags to clear. (Bits 0-11.)
2067 */
2068DECLINLINE(int) PGMRamFlagsClearByGCPhys(PPGM pPGM, RTGCPHYS GCPhys, unsigned fFlags)
2069{
2070 /*
2071 * Walk range list.
2072 */
2073 PPGMRAMRANGE pRam = CTXSUFF(pPGM->pRamRanges);
2074 while (pRam)
2075 {
2076 RTGCPHYS off = GCPhys - pRam->GCPhys;
2077 if (off < pRam->cb)
2078 {
2079 unsigned iPage = off >> PAGE_SHIFT;
2080 /* Physical chunk in dynamically allocated range not present? */
2081 if (RT_UNLIKELY(!(pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK)))
2082 {
2083#ifdef IN_RING3
2084 int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
2085#else
2086 int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2087#endif
2088 if (rc != VINF_SUCCESS)
2089 return rc;
2090 }
2091 fFlags &= ~X86_PTE_PAE_PG_MASK;
2092 pRam->aHCPhys[iPage] &= ~(RTHCPHYS)fFlags;
2093 return VINF_SUCCESS;
2094 }
2095
2096 pRam = CTXSUFF(pRam->pNext);
2097 }
2098 return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2099}
2100
2101
2102/**
2103 * Clears flags associated with a RAM address.
2104 *
2105 * @returns VBox status code.
2106 * @param pPGM PGM handle.
2107 * @param GCPhys Guest context physical address.
2108 * @param fFlags fFlags to clear. (Bits 0-11.)
2109 * @param ppRamHint Where to read and store the ram list hint.
2110 * The caller initializes this to NULL before the call.
2111 */
2112DECLINLINE(int) PGMRamFlagsClearByGCPhysWithHint(PPGM pPGM, RTGCPHYS GCPhys, unsigned fFlags, PPGMRAMRANGE *ppRamHint)
2113{
2114 /*
2115 * Check the hint.
2116 */
2117 PPGMRAMRANGE pRam = *ppRamHint;
2118 if (pRam)
2119 {
2120 RTGCPHYS off = GCPhys - pRam->GCPhys;
2121 if (off < pRam->cb)
2122 {
2123 unsigned iPage = off >> PAGE_SHIFT;
2124 /* Physical chunk in dynamically allocated range not present? */
2125 if (RT_UNLIKELY(!(pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK)))
2126 {
2127#ifdef IN_RING3
2128 int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
2129#else
2130 int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2131#endif
2132 if (rc != VINF_SUCCESS)
2133 return rc;
2134 }
2135 fFlags &= ~X86_PTE_PAE_PG_MASK;
2136 pRam->aHCPhys[iPage] &= ~(RTHCPHYS)fFlags;
2137 return VINF_SUCCESS;
2138 }
2139 }
2140
2141 /*
2142 * Walk range list.
2143 */
2144 pRam = CTXSUFF(pPGM->pRamRanges);
2145 while (pRam)
2146 {
2147 RTGCPHYS off = GCPhys - pRam->GCPhys;
2148 if (off < pRam->cb)
2149 {
2150 unsigned iPage = off >> PAGE_SHIFT;
2151 /* Physical chunk in dynamically allocated range not present? */
2152 if (RT_UNLIKELY(!(pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK)))
2153 {
2154#ifdef IN_RING3
2155 int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
2156#else
2157 int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2158#endif
2159 if (rc != VINF_SUCCESS)
2160 return rc;
2161 }
2162 fFlags &= ~X86_PTE_PAE_PG_MASK;
2163 pRam->aHCPhys[iPage] &= ~(RTHCPHYS)fFlags;
2164 *ppRamHint = pRam;
2165 return VINF_SUCCESS;
2166 }
2167
2168 pRam = CTXSUFF(pRam->pNext);
2169 }
2170 return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2171}
2172
2173/**
2174 * Sets (bitwise OR) flags associated with a RAM address.
2175 *
2176 * @returns VBox status code.
2177 * @param pPGM PGM handle.
2178 * @param GCPhys Guest context physical address.
2179 * @param fFlags fFlags to set clear. (Bits 0-11.)
2180 */
2181DECLINLINE(int) PGMRamFlagsSetByGCPhys(PPGM pPGM, RTGCPHYS GCPhys, unsigned fFlags)
2182{
2183 /*
2184 * Walk range list.
2185 */
2186 PPGMRAMRANGE pRam = CTXSUFF(pPGM->pRamRanges);
2187 while (pRam)
2188 {
2189 RTGCPHYS off = GCPhys - pRam->GCPhys;
2190 if (off < pRam->cb)
2191 {
2192 unsigned iPage = off >> PAGE_SHIFT;
2193 /* Physical chunk in dynamically allocated range not present? */
2194 if (RT_UNLIKELY(!(pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK)))
2195 {
2196#ifdef IN_RING3
2197 int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
2198#else
2199 int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2200#endif
2201 if (rc != VINF_SUCCESS)
2202 return rc;
2203 }
2204 fFlags &= ~X86_PTE_PAE_PG_MASK;
2205 pRam->aHCPhys[iPage] |= fFlags;
2206 return VINF_SUCCESS;
2207 }
2208
2209 pRam = CTXSUFF(pRam->pNext);
2210 }
2211 return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2212}
2213
2214/**
2215 * Sets (bitwise OR) flags associated with a RAM address.
2216 *
2217 * @returns VBox status code.
2218 * @param pPGM PGM handle.
2219 * @param GCPhys Guest context physical address.
2220 * @param fFlags fFlags to set clear. (Bits 0-11.)
2221 * @param ppRamHint Where to read and store the ram list hint.
2222 * The caller initializes this to NULL before the call.
2223 */
2224DECLINLINE(int) PGMRamFlagsSetByGCPhysWithHint(PPGM pPGM, RTGCPHYS GCPhys, unsigned fFlags, PPGMRAMRANGE *ppRamHint)
2225{
2226 /*
2227 * Check the hint.
2228 */
2229 PPGMRAMRANGE pRam = *ppRamHint;
2230 if (pRam)
2231 {
2232 RTGCPHYS off = GCPhys - pRam->GCPhys;
2233 if (off < pRam->cb)
2234 {
2235 unsigned iPage = off >> PAGE_SHIFT;
2236 /* Physical chunk in dynamically allocated range not present? */
2237 if (RT_UNLIKELY(!(pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK)))
2238 {
2239#ifdef IN_RING3
2240 int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
2241#else
2242 int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2243#endif
2244 if (rc != VINF_SUCCESS)
2245 return rc;
2246 }
2247 fFlags &= ~X86_PTE_PAE_PG_MASK;
2248 pRam->aHCPhys[iPage] |= fFlags;
2249 return VINF_SUCCESS;
2250 }
2251 }
2252
2253 /*
2254 * Walk range list.
2255 */
2256 pRam = CTXSUFF(pPGM->pRamRanges);
2257 while (pRam)
2258 {
2259 RTGCPHYS off = GCPhys - pRam->GCPhys;
2260 if (off < pRam->cb)
2261 {
2262 unsigned iPage = off >> PAGE_SHIFT;
2263 /* Physical chunk in dynamically allocated range not present? */
2264 if (RT_UNLIKELY(!(pRam->aHCPhys[iPage] & X86_PTE_PAE_PG_MASK)))
2265 {
2266#ifdef IN_RING3
2267 int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
2268#else
2269 int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2270#endif
2271 if (rc != VINF_SUCCESS)
2272 return rc;
2273 }
2274 fFlags &= ~X86_PTE_PAE_PG_MASK;
2275 pRam->aHCPhys[iPage] |= fFlags;
2276 *ppRamHint = pRam;
2277 return VINF_SUCCESS;
2278 }
2279
2280 pRam = CTXSUFF(pRam->pNext);
2281 }
2282 return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2283}
2284
2285
2286/**
2287 * Gets the page directory for the specified address.
2288 *
2289 * @returns Pointer to the page directory in question.
2290 * @returns NULL if the page directory is not present or on an invalid page.
2291 * @param pPGM Pointer to the PGM instance data.
2292 * @param GCPtr The address.
2293 */
2294DECLINLINE(PX86PDPAE) pgmGstGetPaePD(PPGM pPGM, RTGCUINTPTR GCPtr)
2295{
2296 const unsigned iPdPtr = GCPtr >> X86_PDPTR_SHIFT;
2297 if (CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].n.u1Present)
2298 {
2299 if ((CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK) == pPGM->aGCPhysGstPaePDs[iPdPtr])
2300 return CTXSUFF(pPGM->apGstPaePDs)[iPdPtr];
2301
2302 /* cache is out-of-sync. */
2303 PX86PDPAE pPD;
2304 int rc = PGM_GCPHYS_2_PTR(PGM2VM(pPGM), CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK, &pPD);
2305 if (VBOX_SUCCESS(rc))
2306 return pPD;
2307 AssertMsgFailed(("Impossible! rc=%d PDPE=%#llx\n", rc, CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u));
2308 /* returning NIL_RTGCPHYS is ok if we assume it's just an invalid page of some kind emualted as all 0s. */
2309 }
2310 return NULL;
2311}
2312
2313
2314/**
2315 * Gets the page directory entry for the specified address.
2316 *
2317 * @returns Pointer to the page directory entry in question.
2318 * @returns NULL if the page directory is not present or on an invalid page.
2319 * @param pPGM Pointer to the PGM instance data.
2320 * @param GCPtr The address.
2321 */
2322DECLINLINE(PX86PDEPAE) pgmGstGetPaePDEPtr(PPGM pPGM, RTGCUINTPTR GCPtr)
2323{
2324 const unsigned iPdPtr = GCPtr >> X86_PDPTR_SHIFT;
2325 if (CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].n.u1Present)
2326 {
2327 const unsigned iPD = (GCPtr >> X86_PD_PAE_SHIFT) & X86_PD_PAE_MASK;
2328 if ((CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK) == pPGM->aGCPhysGstPaePDs[iPdPtr])
2329 return &CTXSUFF(pPGM->apGstPaePDs)[iPdPtr]->a[iPD];
2330
2331 /* cache is out-of-sync. */
2332 PX86PDPAE pPD;
2333 int rc = PGM_GCPHYS_2_PTR(PGM2VM(pPGM), CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK, &pPD);
2334 if (VBOX_SUCCESS(rc))
2335 return &pPD->a[iPD];
2336 AssertMsgFailed(("Impossible! rc=%d PDPE=%#llx\n", rc, CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u));
2337 /* returning NIL_RTGCPHYS is ok if we assume it's just an invalid page or something which we'll emulate as all 0s. */
2338 }
2339 return NULL;
2340}
2341
2342
2343/**
2344 * Gets the page directory entry for the specified address.
2345 *
2346 * @returns The page directory entry in question.
2347 * @returns A non-present entry if the page directory is not present or on an invalid page.
2348 * @param pPGM Pointer to the PGM instance data.
2349 * @param GCPtr The address.
2350 */
2351DECLINLINE(uint64_t) pgmGstGetPaePDE(PPGM pPGM, RTGCUINTPTR GCPtr)
2352{
2353 const unsigned iPdPtr = GCPtr >> X86_PDPTR_SHIFT;
2354 if (CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].n.u1Present)
2355 {
2356 const unsigned iPD = (GCPtr >> X86_PD_PAE_SHIFT) & X86_PD_PAE_MASK;
2357 if ((CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK) == pPGM->aGCPhysGstPaePDs[iPdPtr])
2358 return CTXSUFF(pPGM->apGstPaePDs)[iPdPtr]->a[iPD].u;
2359
2360 /* cache is out-of-sync. */
2361 PX86PDPAE pPD;
2362 int rc = PGM_GCPHYS_2_PTR(PGM2VM(pPGM), CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK, &pPD);
2363 if (VBOX_SUCCESS(rc))
2364 return pPD->a[iPD].u;
2365 AssertMsgFailed(("Impossible! rc=%d PDPE=%#llx\n", rc, CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u));
2366 }
2367 return 0;
2368}
2369
2370
2371/**
2372 * Checks if any of the specified page flags are set for the given page.
2373 *
2374 * @returns true if any of the flags are set.
2375 * @returns false if all the flags are clear.
2376 * @param pPGM PGM handle.
2377 * @param GCPhys The GC physical address.
2378 * @param fFlags The flags to check for.
2379 */
2380DECLINLINE(bool) PGMRamTestFlags(PPGM pPGM, RTGCPHYS GCPhys, uint64_t fFlags)
2381{
2382 /*
2383 * Walk range list.
2384 */
2385 for (PPGMRAMRANGE pRam = CTXSUFF(pPGM->pRamRanges);
2386 pRam;
2387 pRam = CTXSUFF(pRam->pNext))
2388 {
2389 RTGCPHYS off = GCPhys - pRam->GCPhys;
2390 if (off < pRam->cb)
2391 return (pRam->aHCPhys[off >> PAGE_SHIFT] & fFlags) != 0;
2392 }
2393 return false;
2394}
2395
2396
2397/**
2398 * Gets the ram flags for a handler.
2399 *
2400 * @returns The ram flags.
2401 * @param pCur The physical handler in question.
2402 */
2403DECLINLINE(unsigned) pgmHandlerPhysicalCalcFlags(PPGMPHYSHANDLER pCur)
2404{
2405 switch (pCur->enmType)
2406 {
2407 case PGMPHYSHANDLERTYPE_PHYSICAL:
2408 return MM_RAM_FLAGS_PHYSICAL_HANDLER;
2409
2410 case PGMPHYSHANDLERTYPE_PHYSICAL_WRITE:
2411 return MM_RAM_FLAGS_PHYSICAL_HANDLER | MM_RAM_FLAGS_PHYSICAL_WRITE;
2412
2413 case PGMPHYSHANDLERTYPE_MMIO:
2414 case PGMPHYSHANDLERTYPE_PHYSICAL_ALL:
2415 return MM_RAM_FLAGS_PHYSICAL_HANDLER | MM_RAM_FLAGS_PHYSICAL_ALL;
2416
2417 default:
2418 AssertFatalMsgFailed(("Invalid type %d\n", pCur->enmType));
2419 }
2420}
2421
2422
2423/**
2424 * Clears one physical page of a virtual handler
2425 *
2426 * @param pPGM Pointer to the PGM instance.
2427 * @param pCur Virtual handler structure
2428 * @param iPage Physical page index
2429 */
2430DECLINLINE(void) pgmHandlerVirtualClearPage(PPGM pPGM, PPGMVIRTHANDLER pCur, unsigned iPage)
2431{
2432 const PPGMPHYS2VIRTHANDLER pPhys2Virt = &pCur->aPhysToVirt[iPage];
2433
2434 /*
2435 * Remove the node from the tree (it's supposed to be in the tree if we get here!).
2436 */
2437#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
2438 AssertReleaseMsg(pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_IN_TREE,
2439 ("pPhys2Virt=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32}\n",
2440 pPhys2Virt, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler, pPhys2Virt->offNextAlias));
2441#endif
2442 if (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_IS_HEAD)
2443 {
2444 /* We're the head of the alias chain. */
2445 PPGMPHYS2VIRTHANDLER pRemove = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysRemove(&pPGM->CTXSUFF(pTrees)->PhysToVirtHandlers, pPhys2Virt->Core.Key); NOREF(pRemove);
2446#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
2447 AssertReleaseMsg(pRemove != NULL,
2448 ("pPhys2Virt=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32}\n",
2449 pPhys2Virt, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler, pPhys2Virt->offNextAlias));
2450 AssertReleaseMsg(pRemove == pPhys2Virt,
2451 ("wanted: pPhys2Virt=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32}\n"
2452 " got: pRemove=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32}\n",
2453 pPhys2Virt, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler, pPhys2Virt->offNextAlias,
2454 pRemove, pRemove->Core.Key, pRemove->Core.KeyLast, pRemove->offVirtHandler, pRemove->offNextAlias));
2455#endif
2456 if (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK)
2457 {
2458 /* Insert the next list in the alias chain into the tree. */
2459 PPGMPHYS2VIRTHANDLER pNext = (PPGMPHYS2VIRTHANDLER)((intptr_t)pPhys2Virt + (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK));
2460#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
2461 AssertReleaseMsg(pNext->offNextAlias & PGMPHYS2VIRTHANDLER_IN_TREE,
2462 ("pNext=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32}\n",
2463 pNext, pNext->Core.Key, pNext->Core.KeyLast, pNext->offVirtHandler, pNext->offNextAlias));
2464#endif
2465 pNext->offNextAlias |= PGMPHYS2VIRTHANDLER_IS_HEAD;
2466 bool fRc = RTAvlroGCPhysInsert(&pPGM->CTXSUFF(pTrees)->PhysToVirtHandlers, &pNext->Core);
2467 AssertRelease(fRc);
2468 }
2469 }
2470 else
2471 {
2472 /* Locate the previous node in the alias chain. */
2473 PPGMPHYS2VIRTHANDLER pPrev = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysGet(&pPGM->CTXSUFF(pTrees)->PhysToVirtHandlers, pPhys2Virt->Core.Key);
2474#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
2475 AssertReleaseMsg(pPrev != pPhys2Virt,
2476 ("pPhys2Virt=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32} pPrev=%p\n",
2477 pPhys2Virt, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler, pPhys2Virt->offNextAlias, pPrev));
2478#endif
2479 for (;;)
2480 {
2481 PPGMPHYS2VIRTHANDLER pNext = (PPGMPHYS2VIRTHANDLER)((intptr_t)pPrev + (pPrev->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK));
2482 if (pNext == pPhys2Virt)
2483 {
2484 /* unlink. */
2485 LogFlow(("pgmHandlerVirtualClearPage: removed %p:{.offNextAlias=%#RX32} from alias chain. prev %p:{.offNextAlias=%#RX32} [%VGp-%VGp]\n",
2486 pPhys2Virt, pPhys2Virt->offNextAlias, pPrev, pPrev->offNextAlias, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast));
2487 if (!(pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK))
2488 pPrev->offNextAlias &= ~PGMPHYS2VIRTHANDLER_OFF_MASK;
2489 else
2490 {
2491 PPGMPHYS2VIRTHANDLER pNewNext = (PPGMPHYS2VIRTHANDLER)((intptr_t)pPhys2Virt + (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK));
2492 pPrev->offNextAlias = ((intptr_t)pNewNext - (intptr_t)pPrev)
2493 | (pPrev->offNextAlias & ~PGMPHYS2VIRTHANDLER_OFF_MASK);
2494 }
2495 break;
2496 }
2497
2498 /* next */
2499 if (pNext == pPrev)
2500 {
2501#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
2502 AssertReleaseMsg(pNext != pPrev,
2503 ("pPhys2Virt=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32} pPrev=%p\n",
2504 pPhys2Virt, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler, pPhys2Virt->offNextAlias, pPrev));
2505#endif
2506 break;
2507 }
2508 pPrev = pNext;
2509 }
2510 }
2511 Log2(("PHYS2VIRT: Removing %VGp-%VGp %#RX32 %s\n",
2512 pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offNextAlias, HCSTRING(pCur->pszDesc)));
2513 pPhys2Virt->offNextAlias = 0;
2514 pPhys2Virt->Core.KeyLast = NIL_RTGCPHYS; /* require reinsert */
2515
2516 /*
2517 * Clear the ram flags for this page.
2518 */
2519 int rc = PGMRamFlagsClearByGCPhys(pPGM, pPhys2Virt->Core.Key,
2520 MM_RAM_FLAGS_VIRTUAL_HANDLER | MM_RAM_FLAGS_VIRTUAL_ALL | MM_RAM_FLAGS_VIRTUAL_WRITE);
2521 AssertRC(rc);
2522}
2523
2524
2525/**
2526 * Internal worker for finding a 'in-use' shadow page give by it's physical address.
2527 *
2528 * @returns Pointer to the shadow page structure.
2529 * @param pPool The pool.
2530 * @param HCPhys The HC physical address of the shadow page.
2531 */
2532DECLINLINE(PPGMPOOLPAGE) pgmPoolGetPage(PPGMPOOL pPool, RTHCPHYS HCPhys)
2533{
2534 /*
2535 * Look up the page.
2536 */
2537 PPGMPOOLPAGE pPage = (PPGMPOOLPAGE)RTAvloHCPhysGet(&pPool->HCPhysTree, HCPhys & X86_PTE_PAE_PG_MASK);
2538 AssertFatalMsg(pPage && pPage->enmKind != PGMPOOLKIND_FREE, ("HCPhys=%VHp pPage=%p type=%d\n", HCPhys, pPage, (pPage) ? pPage->enmKind : 0));
2539 return pPage;
2540}
2541
2542
2543/**
2544 * Internal worker for finding a 'in-use' shadow page give by it's physical address.
2545 *
2546 * @returns Pointer to the shadow page structure.
2547 * @param pPool The pool.
2548 * @param idx The pool page index.
2549 */
2550DECLINLINE(PPGMPOOLPAGE) pgmPoolGetPageByIdx(PPGMPOOL pPool, unsigned idx)
2551{
2552 AssertFatalMsg(idx >= PGMPOOL_IDX_FIRST && idx < pPool->cCurPages, ("idx=%d\n", idx));
2553 return &pPool->aPages[idx];
2554}
2555
2556
2557#ifdef PGMPOOL_WITH_GCPHYS_TRACKING
2558/**
2559 * Clear references to guest physical memory.
2560 *
2561 * @param pPool The pool.
2562 * @param pPage The page.
2563 * @param pHCPhys Pointer to the aHCPhys entry in the ram range.
2564 */
2565DECLINLINE(void) pgmTrackDerefGCPhys(PPGMPOOL pPool, PPGMPOOLPAGE pPage, PRTHCPHYS pHCPhys)
2566{
2567 /*
2568 * Just deal with the simple case here.
2569 */
2570#ifdef LOG_ENABLED
2571 const RTHCPHYS HCPhysOrg = *pHCPhys;
2572#endif
2573 const unsigned cRefs = *pHCPhys >> MM_RAM_FLAGS_CREFS_SHIFT;
2574 if (cRefs == 1)
2575 {
2576 Assert(pPage->idx == ((*pHCPhys >> MM_RAM_FLAGS_IDX_SHIFT) & MM_RAM_FLAGS_IDX_MASK));
2577 *pHCPhys = *pHCPhys & MM_RAM_FLAGS_NO_REFS_MASK;
2578 }
2579 else
2580 pgmPoolTrackPhysExtDerefGCPhys(pPool, pPage, pHCPhys);
2581 LogFlow(("pgmTrackDerefGCPhys: *pHCPhys=%RHp -> %RHp\n", HCPhysOrg, *pHCPhys));
2582}
2583#endif
2584
2585
2586#ifdef PGMPOOL_WITH_CACHE
2587/**
2588 * Moves the page to the head of the age list.
2589 *
2590 * This is done when the cached page is used in one way or another.
2591 *
2592 * @param pPool The pool.
2593 * @param pPage The cached page.
2594 * @todo inline in PGMInternal.h!
2595 */
2596DECLINLINE(void) pgmPoolCacheUsed(PPGMPOOL pPool, PPGMPOOLPAGE pPage)
2597{
2598 /*
2599 * Move to the head of the age list.
2600 */
2601 if (pPage->iAgePrev != NIL_PGMPOOL_IDX)
2602 {
2603 /* unlink */
2604 pPool->aPages[pPage->iAgePrev].iAgeNext = pPage->iAgeNext;
2605 if (pPage->iAgeNext != NIL_PGMPOOL_IDX)
2606 pPool->aPages[pPage->iAgeNext].iAgePrev = pPage->iAgePrev;
2607 else
2608 pPool->iAgeTail = pPage->iAgePrev;
2609
2610 /* insert at head */
2611 pPage->iAgePrev = NIL_PGMPOOL_IDX;
2612 pPage->iAgeNext = pPool->iAgeHead;
2613 Assert(pPage->iAgeNext != NIL_PGMPOOL_IDX); /* we would've already been head then */
2614 pPool->iAgeHead = pPage->idx;
2615 pPool->aPages[pPage->iAgeNext].iAgePrev = pPage->idx;
2616 }
2617}
2618#endif /* PGMPOOL_WITH_CACHE */
2619
2620/**
2621 * Tells if mappings are to be put into the shadow page table or not
2622 *
2623 * @returns boolean result
2624 * @param pVM VM handle.
2625 */
2626
2627DECLINLINE(bool) pgmMapAreMappingsEnabled(PPGM pPGM)
2628{
2629 return !pPGM->fDisableMappings;
2630}
2631
2632/** @} */
2633
2634#endif
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