PGMInternal.h@ 6862

Last change on this file since 6862 was 6862, checked in by vboxsync, 17 years ago
Removed the PGMPHYSHANDLERTYPE_PHYSICAL value as it was never and will never be used.
Property svn:eol-style set to `native` Property svn:keywords set to `Id`
File size: 133.8 KB

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1	/* $Id: PGMInternal.h 6862 2008-02-08 10:38:38Z vboxsync $ */
2	/** @file
3	* PGM - Internal header file.
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 innotek GmbH
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	#ifndef ___PGMInternal_h
19	#define ___PGMInternal_h
20
21	#include <VBox/cdefs.h>
22	#include <VBox/types.h>
23	#include <VBox/err.h>
24	#include <VBox/stam.h>
25	#include <VBox/param.h>
26	#include <VBox/vmm.h>
27	#include <VBox/mm.h>
28	#include <VBox/pdmcritsect.h>
29	#include <VBox/pdmapi.h>
30	#include <VBox/dis.h>
31	#include <VBox/dbgf.h>
32	#include <VBox/log.h>
33	#include <VBox/gmm.h>
34	#include <iprt/avl.h>
35	#include <iprt/assert.h>
36	#include <iprt/critsect.h>
37
38	#if !defined(IN_PGM_R3) && !defined(IN_PGM_R0) && !defined(IN_PGM_GC)
39	# error "Not in PGM! This is an internal header!"
40	#endif
41
42
43	/** @defgroup grp_pgm_int Internals
44	* @ingroup grp_pgm
45	* @internal
46	* @{
47	*/
48
49
50	/** @name PGM Compile Time Config
51	* @{
52	*/
53
54	/**
55	* Solve page is out of sync issues inside Guest Context (in PGMGC.cpp).
56	* Comment it if it will break something.
57	*/
58	#define PGM_OUT_OF_SYNC_IN_GC
59
60	/**
61	* Virtualize the dirty bit
62	* This also makes a half-hearted attempt at the accessed bit. For full
63	* accessed bit virtualization define PGM_SYNC_ACCESSED_BIT.
64	*/
65	#define PGM_SYNC_DIRTY_BIT
66
67	/**
68	* Fully virtualize the accessed bit.
69	* @remark This requires SYNC_DIRTY_ACCESSED_BITS to be defined!
70	*/
71	#define PGM_SYNC_ACCESSED_BIT
72
73	/**
74	* Check and skip global PDEs for non-global flushes
75	*/
76	#define PGM_SKIP_GLOBAL_PAGEDIRS_ON_NONGLOBAL_FLUSH
77
78	/**
79	* Sync N pages instead of a whole page table
80	*/
81	#define PGM_SYNC_N_PAGES
82
83	/**
84	* Number of pages to sync during a page fault
85	*
86	* When PGMPOOL_WITH_GCPHYS_TRACKING is enabled using high values here
87	* causes a lot of unnecessary extents and also is slower than taking more \#PFs.
88	*/
89	#define PGM_SYNC_NR_PAGES 8
90
91	/**
92	* Number of PGMPhysRead/Write cache entries (must be <= sizeof(uint64_t))
93	*/
94	#define PGM_MAX_PHYSCACHE_ENTRIES 64
95	#define PGM_MAX_PHYSCACHE_ENTRIES_MASK (PGM_MAX_PHYSCACHE_ENTRIES-1)
96
97	/**
98	* Enable caching of PGMR3PhysRead/WriteByte/Word/Dword
99	*/
100	#define PGM_PHYSMEMACCESS_CACHING
101
102	/*
103	* Assert Sanity.
104	*/
105	#if defined(PGM_SYNC_ACCESSED_BIT) && !defined(PGM_SYNC_DIRTY_BIT)
106	# error "PGM_SYNC_ACCESSED_BIT requires PGM_SYNC_DIRTY_BIT!"
107	#endif
108
109	/** @def PGMPOOL_WITH_CACHE
110	* Enable agressive caching using the page pool.
111	*
112	* This requires PGMPOOL_WITH_USER_TRACKING and PGMPOOL_WITH_MONITORING.
113	*/
114	#define PGMPOOL_WITH_CACHE
115
116	/** @def PGMPOOL_WITH_MIXED_PT_CR3
117	* When defined, we'll deal with 'uncachable' pages.
118	*/
119	#ifdef PGMPOOL_WITH_CACHE
120	# define PGMPOOL_WITH_MIXED_PT_CR3
121	#endif
122
123	/** @def PGMPOOL_WITH_MONITORING
124	* Monitor the guest pages which are shadowed.
125	* When this is enabled, PGMPOOL_WITH_CACHE or PGMPOOL_WITH_GCPHYS_TRACKING must
126	* be enabled as well.
127	* @remark doesn't really work without caching now. (Mixed PT/CR3 change.)
128	*/
129	#ifdef PGMPOOL_WITH_CACHE
130	# define PGMPOOL_WITH_MONITORING
131	#endif
132
133	/** @def PGMPOOL_WITH_GCPHYS_TRACKING
134	* Tracking the of shadow pages mapping guest physical pages.
135	*
136	* This is very expensive, the current cache prototype is trying to figure out
137	* whether it will be acceptable with an agressive caching policy.
138	*/
139	#if defined(PGMPOOL_WITH_CACHE) \|\| defined(PGMPOOL_WITH_MONITORING)
140	# define PGMPOOL_WITH_GCPHYS_TRACKING
141	#endif
142
143	/** @def PGMPOOL_WITH_USER_TRACKNG
144	* Tracking users of shadow pages. This is required for the linking of shadow page
145	* tables and physical guest addresses.
146	*/
147	#if defined(PGMPOOL_WITH_GCPHYS_TRACKING) \|\| defined(PGMPOOL_WITH_CACHE) \|\| defined(PGMPOOL_WITH_MONITORING)
148	# define PGMPOOL_WITH_USER_TRACKING
149	#endif
150
151	/** @def PGMPOOL_CFG_MAX_GROW
152	* The maximum number of pages to add to the pool in one go.
153	*/
154	#define PGMPOOL_CFG_MAX_GROW (_256K >> PAGE_SHIFT)
155
156	/** @def VBOX_STRICT_PGM_HANDLER_VIRTUAL
157	* Enables some extra assertions for virtual handlers (mainly phys2virt related).
158	*/
159	#ifdef VBOX_STRICT
160	# define VBOX_STRICT_PGM_HANDLER_VIRTUAL
161	#endif
162	/** @} */
163
164
165	/** @name PDPTR and PML4 flags.
166	* These are placed in the three bits available for system programs in
167	* the PDPTR and PML4 entries.
168	* @{ */
169	/** The entry is a permanent one and it's must always be present.
170	* Never free such an entry. */
171	#define PGM_PLXFLAGS_PERMANENT RT_BIT_64(10)
172	/** @} */
173
174	/** @name Page directory flags.
175	* These are placed in the three bits available for system programs in
176	* the page directory entries.
177	* @{ */
178	/** Mapping (hypervisor allocated pagetable). */
179	#define PGM_PDFLAGS_MAPPING RT_BIT_64(10)
180	/** Made read-only to facilitate dirty bit tracking. */
181	#define PGM_PDFLAGS_TRACK_DIRTY RT_BIT_64(11)
182	/** @} */
183
184	/** @name Page flags.
185	* These are placed in the three bits available for system programs in
186	* the page entries.
187	* @{ */
188	/** Made read-only to facilitate dirty bit tracking. */
189	#define PGM_PTFLAGS_TRACK_DIRTY RT_BIT_64(9)
190
191	#ifndef PGM_PTFLAGS_CSAM_VALIDATED
192	/** Scanned and approved by CSAM (tm).
193	* NOTE: Must be identical to the one defined in CSAMInternal.h!!
194	* @todo Move PGM_PTFLAGS_* and PGM_PDFLAGS_* to VBox/pgm.h. */
195	#define PGM_PTFLAGS_CSAM_VALIDATED RT_BIT_64(11)
196	#endif
197	/** @} */
198
199	/** @name Defines used to indicate the shadow and guest paging in the templates.
200	* @{ */
201	#define PGM_TYPE_REAL 1
202	#define PGM_TYPE_PROT 2
203	#define PGM_TYPE_32BIT 3
204	#define PGM_TYPE_PAE 4
205	#define PGM_TYPE_AMD64 5
206	/** @} */
207
208	/** Macro for checking if the guest is using paging.
209	* @param uType PGM_TYPE_*
210	* @remark ASSUMES certain order of the PGM_TYPE_* values.
211	*/
212	#define PGM_WITH_PAGING(uType) ((uType) >= PGM_TYPE_32BIT)
213
214
215	/** @def PGM_HCPHYS_2_PTR
216	* Maps a HC physical page pool address to a virtual address.
217	*
218	* @returns VBox status code.
219	* @param pVM The VM handle.
220	* @param HCPhys The HC physical address to map to a virtual one.
221	* @param ppv Where to store the virtual address. No need to cast this.
222	*
223	* @remark In GC this uses PGMGCDynMapHCPage(), so it will consume of the
224	* small page window employeed by that function. Be careful.
225	* @remark There is no need to assert on the result.
226	*/
227	#ifdef IN_GC
228	# define PGM_HCPHYS_2_PTR(pVM, HCPhys, ppv) PGMGCDynMapHCPage(pVM, HCPhys, (void **)(ppv))
229	#else
230	# define PGM_HCPHYS_2_PTR(pVM, HCPhys, ppv) MMPagePhys2PageEx(pVM, HCPhys, (void **)(ppv))
231	#endif
232
233	/** @def PGM_GCPHYS_2_PTR
234	* Maps a GC physical page address to a virtual address.
235	*
236	* @returns VBox status code.
237	* @param pVM The VM handle.
238	* @param GCPhys The GC physical address to map to a virtual one.
239	* @param ppv Where to store the virtual address. No need to cast this.
240	*
241	* @remark In GC this uses PGMGCDynMapGCPage(), so it will consume of the
242	* small page window employeed by that function. Be careful.
243	* @remark There is no need to assert on the result.
244	*/
245	#ifdef IN_GC
246	# define PGM_GCPHYS_2_PTR(pVM, GCPhys, ppv) PGMGCDynMapGCPage(pVM, GCPhys, (void **)(ppv))
247	#else
248	# define PGM_GCPHYS_2_PTR(pVM, GCPhys, ppv) PGMPhysGCPhys2HCPtr(pVM, GCPhys, 1 /* one page only /, (void )(ppv)) /* @todo this isn't asserting, use PGMRamGCPhys2HCPtr! */
249	#endif
250
251	/** @def PGM_GCPHYS_2_PTR_EX
252	* Maps a unaligned GC physical page address to a virtual address.
253	*
254	* @returns VBox status code.
255	* @param pVM The VM handle.
256	* @param GCPhys The GC physical address to map to a virtual one.
257	* @param ppv Where to store the virtual address. No need to cast this.
258	*
259	* @remark In GC this uses PGMGCDynMapGCPage(), so it will consume of the
260	* small page window employeed by that function. Be careful.
261	* @remark There is no need to assert on the result.
262	*/
263	#ifdef IN_GC
264	# define PGM_GCPHYS_2_PTR_EX(pVM, GCPhys, ppv) PGMGCDynMapGCPageEx(pVM, GCPhys, (void **)(ppv))
265	#else
266	# define PGM_GCPHYS_2_PTR_EX(pVM, GCPhys, ppv) PGMPhysGCPhys2HCPtr(pVM, GCPhys, 1 /* one page only /, (void )(ppv)) /* @todo this isn't asserting, use PGMRamGCPhys2HCPtr! */
267	#endif
268
269	/** @def PGM_INVL_PG
270	* Invalidates a page when in GC does nothing in HC.
271	*
272	* @param GCVirt The virtual address of the page to invalidate.
273	*/
274	#ifdef IN_GC
275	# define PGM_INVL_PG(GCVirt) ASMInvalidatePage((void *)(GCVirt))
276	#else
277	# define PGM_INVL_PG(GCVirt) ((void)0)
278	#endif
279
280	/** @def PGM_INVL_BIG_PG
281	* Invalidates a 4MB page directory entry when in GC does nothing in HC.
282	*
283	* @param GCVirt The virtual address within the page directory to invalidate.
284	*/
285	#ifdef IN_GC
286	# define PGM_INVL_BIG_PG(GCVirt) ASMReloadCR3()
287	#else
288	# define PGM_INVL_BIG_PG(GCVirt) ((void)0)
289	#endif
290
291	/** @def PGM_INVL_GUEST_TLBS()
292	* Invalidates all guest TLBs.
293	*/
294	#ifdef IN_GC
295	# define PGM_INVL_GUEST_TLBS() ASMReloadCR3()
296	#else
297	# define PGM_INVL_GUEST_TLBS() ((void)0)
298	#endif
299
300
301	/**
302	* Structure for tracking GC Mappings.
303	*
304	* This structure is used by linked list in both GC and HC.
305	*/
306	typedef struct PGMMAPPING
307	{
308	/** Pointer to next entry. */
309	R3PTRTYPE(struct PGMMAPPING *) pNextR3;
310	/** Pointer to next entry. */
311	R0PTRTYPE(struct PGMMAPPING *) pNextR0;
312	/** Pointer to next entry. */
313	GCPTRTYPE(struct PGMMAPPING *) pNextGC;
314	/** Start Virtual address. */
315	RTGCUINTPTR GCPtr;
316	/** Last Virtual address (inclusive). */
317	RTGCUINTPTR GCPtrLast;
318	/** Range size (bytes). */
319	RTGCUINTPTR cb;
320	/** Pointer to relocation callback function. */
321	R3PTRTYPE(PFNPGMRELOCATE) pfnRelocate;
322	/** User argument to the callback. */
323	R3PTRTYPE(void *) pvUser;
324	/** Mapping description / name. For easing debugging. */
325	R3PTRTYPE(const char *) pszDesc;
326	/** Number of page tables. */
327	RTUINT cPTs;
328	#if HC_ARCH_BITS != GC_ARCH_BITS
329	RTUINT uPadding0; /*< Alignment padding. /
330	#endif
331	/** Array of page table mapping data. Each entry
332	* describes one page table. The array can be longer
333	* than the declared length.
334	*/
335	struct
336	{
337	/** The HC physical address of the page table. */
338	RTHCPHYS HCPhysPT;
339	/** The HC physical address of the first PAE page table. */
340	RTHCPHYS HCPhysPaePT0;
341	/** The HC physical address of the second PAE page table. */
342	RTHCPHYS HCPhysPaePT1;
343	/** The HC virtual address of the 32-bit page table. */
344	R3PTRTYPE(PVBOXPT) pPTR3;
345	/** The HC virtual address of the two PAE page table. (i.e 1024 entries instead of 512) */
346	R3PTRTYPE(PX86PTPAE) paPaePTsR3;
347	/** The GC virtual address of the 32-bit page table. */
348	GCPTRTYPE(PVBOXPT) pPTGC;
349	/** The GC virtual address of the two PAE page table. */
350	GCPTRTYPE(PX86PTPAE) paPaePTsGC;
351	/** The GC virtual address of the 32-bit page table. */
352	R0PTRTYPE(PVBOXPT) pPTR0;
353	/** The GC virtual address of the two PAE page table. */
354	R0PTRTYPE(PX86PTPAE) paPaePTsR0;
355	} aPTs[1];
356	} PGMMAPPING;
357	/** Pointer to structure for tracking GC Mappings. */
358	typedef struct PGMMAPPING *PPGMMAPPING;
359
360
361	/**
362	* Physical page access handler structure.
363	*
364	* This is used to keep track of physical address ranges
365	* which are being monitored in some kind of way.
366	*/
367	typedef struct PGMPHYSHANDLER
368	{
369	AVLROGCPHYSNODECORE Core;
370	/** Alignment padding. */
371	uint32_t u32Padding;
372	/** Access type. */
373	PGMPHYSHANDLERTYPE enmType;
374	/** Number of pages to update. */
375	uint32_t cPages;
376	/** Pointer to R3 callback function. */
377	R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnHandlerR3;
378	/** User argument for R3 handlers. */
379	R3PTRTYPE(void *) pvUserR3;
380	/** Pointer to R0 callback function. */
381	R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnHandlerR0;
382	/** User argument for R0 handlers. */
383	R0PTRTYPE(void *) pvUserR0;
384	/** Pointer to GC callback function. */
385	GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnHandlerGC;
386	/** User argument for GC handlers. */
387	GCPTRTYPE(void *) pvUserGC;
388	/** Description / Name. For easing debugging. */
389	R3PTRTYPE(const char *) pszDesc;
390	#ifdef VBOX_WITH_STATISTICS
391	/** Profiling of this handler. */
392	STAMPROFILE Stat;
393	#endif
394	} PGMPHYSHANDLER;
395	/** Pointer to a physical page access handler structure. */
396	typedef PGMPHYSHANDLER *PPGMPHYSHANDLER;
397
398
399	/**
400	* Cache node for the physical addresses covered by a virtual handler.
401	*/
402	typedef struct PGMPHYS2VIRTHANDLER
403	{
404	/** Core node for the tree based on physical ranges. */
405	AVLROGCPHYSNODECORE Core;
406	/** Offset from this struct to the PGMVIRTHANDLER structure. */
407	RTGCINTPTR offVirtHandler;
408	/** Offset of the next alias relativer to this one.
409	* Bit 0 is used for indicating whether we're in the tree.
410	* Bit 1 is used for indicating that we're the head node.
411	*/
412	int32_t offNextAlias;
413	} PGMPHYS2VIRTHANDLER;
414	/** Pointer to a phys to virtual handler structure. */
415	typedef PGMPHYS2VIRTHANDLER *PPGMPHYS2VIRTHANDLER;
416
417	/** The bit in PGMPHYS2VIRTHANDLER::offNextAlias used to indicate that the
418	* node is in the tree. */
419	#define PGMPHYS2VIRTHANDLER_IN_TREE RT_BIT(0)
420	/** The bit in PGMPHYS2VIRTHANDLER::offNextAlias used to indicate that the
421	* node is in the head of an alias chain.
422	* The PGMPHYS2VIRTHANDLER_IN_TREE is always set if this bit is set. */
423	#define PGMPHYS2VIRTHANDLER_IS_HEAD RT_BIT(1)
424	/** The mask to apply to PGMPHYS2VIRTHANDLER::offNextAlias to get the offset. */
425	#define PGMPHYS2VIRTHANDLER_OFF_MASK (~(int32_t)3)
426
427
428	/**
429	* Virtual page access handler structure.
430	*
431	* This is used to keep track of virtual address ranges
432	* which are being monitored in some kind of way.
433	*/
434	typedef struct PGMVIRTHANDLER
435	{
436	/** Core node for the tree based on virtual ranges. */
437	AVLROGCPTRNODECORE Core;
438	/** Number of cache pages. */
439	uint32_t u32Padding;
440	/** Access type. */
441	PGMVIRTHANDLERTYPE enmType;
442	/** Number of cache pages. */
443	uint32_t cPages;
444
445	/** @todo The next two members are redundant. It adds some readability though. */
446	/** Start of the range. */
447	RTGCPTR GCPtr;
448	/** End of the range (exclusive). */
449	RTGCPTR GCPtrLast;
450	/** Size of the range (in bytes). */
451	RTGCUINTPTR cb;
452	/** Pointer to the GC callback function. */
453	GCPTRTYPE(PFNPGMGCVIRTHANDLER) pfnHandlerGC;
454	/** Pointer to the HC callback function for invalidation. */
455	R3PTRTYPE(PFNPGMHCVIRTINVALIDATE) pfnInvalidateHC;
456	/** Pointer to the HC callback function. */
457	R3PTRTYPE(PFNPGMHCVIRTHANDLER) pfnHandlerHC;
458	/** Description / Name. For easing debugging. */
459	R3PTRTYPE(const char *) pszDesc;
460	#ifdef VBOX_WITH_STATISTICS
461	/** Profiling of this handler. */
462	STAMPROFILE Stat;
463	#endif
464	/** Array of cached physical addresses for the monitored ranged. */
465	PGMPHYS2VIRTHANDLER aPhysToVirt[HC_ARCH_BITS == 32 ? 1 : 2];
466	} PGMVIRTHANDLER;
467	/** Pointer to a virtual page access handler structure. */
468	typedef PGMVIRTHANDLER *PPGMVIRTHANDLER;
469
470
471	/**
472	* Page type.
473	* @remarks This enum has to fit in a 3-bit field (see PGMPAGE::u3Type).
474	*/
475	typedef enum PGMPAGETYPE
476	{
477	/** The usual invalid zero entry. */
478	PGMPAGETYPE_INVALID = 0,
479	/** RAM page. (RWX) */
480	PGMPAGETYPE_RAM,
481	/** MMIO2 page. (RWX) */
482	PGMPAGETYPE_MMIO2,
483	/** Shadowed ROM. (RWX) */
484	PGMPAGETYPE_ROM_SHADOW,
485	/** ROM page. (R-X) */
486	PGMPAGETYPE_ROM,
487	/** MMIO page. (---) */
488	PGMPAGETYPE_MMIO,
489	/** End of valid entries. */
490	PGMPAGETYPE_END
491	} PGMPAGETYPE;
492	AssertCompile(PGMPAGETYPE_END < 7);
493
494	/** @name Page type predicates.
495	* @{ */
496	#define PGMPAGETYPE_IS_READABLE(type) ( (type) <= PGMPAGETYPE_ROM )
497	#define PGMPAGETYPE_IS_WRITEABLE(type) ( (type) <= PGMPAGETYPE_ROM_SHADOW )
498	#define PGMPAGETYPE_IS_RWX(type) ( (type) <= PGMPAGETYPE_ROM_SHADOW )
499	#define PGMPAGETYPE_IS_ROX(type) ( (type) == PGMPAGETYPE_ROM )
500	#define PGMPAGETYPE_IS_NP(type) ( (type) == PGMPAGETYPE_MMIO )
501	/** @} */
502
503
504	/**
505	* A Physical Guest Page tracking structure.
506	*
507	* The format of this structure is complicated because we have to fit a lot
508	* of information into as few bits as possible. The format is also subject
509	* to change (there is one comming up soon). Which means that for we'll be
510	* using PGM_PAGE_GET_* and PGM_PAGE_SET_* macros for all accessess to the
511	* structure.
512	*/
513	typedef struct PGMPAGE
514	{
515	/** The physical address and a whole lot of other stuff. All bits are used! */
516	RTHCPHYS HCPhys;
517	/** The page state. */
518	uint32_t u2State : 2;
519	/** Flag indicating that a write monitored page was written to when set. */
520	uint32_t fWrittenTo : 1;
521	/** For later. */
522	uint32_t fSomethingElse : 1;
523	/** The Page ID.
524	* @todo Merge with HCPhys once we've liberated HCPhys of its stuff.
525	* The HCPhys will be 100% static. */
526	uint32_t idPage : 28;
527	/** The page type (PGMPAGETYPE). */
528	uint32_t u3Type : 3;
529	uint32_t u29B : 29;
530	} PGMPAGE;
531	AssertCompileSize(PGMPAGE, 16);
532	/** Pointer to a physical guest page. */
533	typedef PGMPAGE *PPGMPAGE;
534	/** Pointer to a const physical guest page. */
535	typedef const PGMPAGE *PCPGMPAGE;
536	/** Pointer to a physical guest page pointer. */
537	typedef PPGMPAGE *PPPGMPAGE;
538
539	/** @name The Page state, PGMPAGE::u2State.
540	* @{ */
541	/** The zero page.
542	* This is a per-VM page that's never ever mapped writable. */
543	#define PGM_PAGE_STATE_ZERO 0
544	/** A allocated page.
545	* This is a per-VM page allocated from the page pool.
546	*/
547	#define PGM_PAGE_STATE_ALLOCATED 1
548	/** A allocated page that's being monitored for writes.
549	* The shadow page table mappings are read-only. When a write occurs, the
550	* fWrittenTo member is set, the page remapped as read-write and the state
551	* moved back to allocated. */
552	#define PGM_PAGE_STATE_WRITE_MONITORED 2
553	/** The page is shared, aka. copy-on-write.
554	* This is a page that's shared with other VMs. */
555	#define PGM_PAGE_STATE_SHARED 3
556	/** @} */
557
558
559	/**
560	* Gets the page state.
561	* @returns page state (PGM_PAGE_STATE_*).
562	* @param pPage Pointer to the physical guest page tracking structure.
563	*/
564	#define PGM_PAGE_GET_STATE(pPage) ( (pPage)->u2State )
565
566	/**
567	* Sets the page state.
568	* @param pPage Pointer to the physical guest page tracking structure.
569	* @param _uState The new page state.
570	*/
571	#define PGM_PAGE_SET_STATE(pPage, _uState) \
572	do { (pPage)->u2State = (_uState); } while (0)
573
574
575	/**
576	* Gets the host physical address of the guest page.
577	* @returns host physical address (RTHCPHYS).
578	* @param pPage Pointer to the physical guest page tracking structure.
579	*/
580	#define PGM_PAGE_GET_HCPHYS(pPage) ( (pPage)->HCPhys & UINT64_C(0x0000fffffffff000) )
581
582	/**
583	* Sets the host physical address of the guest page.
584	* @param pPage Pointer to the physical guest page tracking structure.
585	* @param _HCPhys The new host physical address.
586	*/
587	#define PGM_PAGE_SET_HCPHYS(pPage, _HCPhys) \
588	do { (pPage)->HCPhys = (((pPage)->HCPhys) & UINT64_C(0xffff000000000fff)) \
589	\| ((_HCPhys) & UINT64_C(0x0000fffffffff000)); } while (0)
590
591	/**
592	* Get the Page ID.
593	* @returns The Page ID; NIL_GMM_PAGEID if it's a ZERO page.
594	* @param pPage Pointer to the physical guest page tracking structure.
595	*/
596	#define PGM_PAGE_GET_PAGEID(pPage) ( (pPage)->idPage )
597	/* later:
598	#define PGM_PAGE_GET_PAGEID(pPage) ( ((uint32_t)(pPage)->HCPhys >> (48 - 12))
599	\| ((uint32_t)(pPage)->HCPhys & 0xfff) )
600	*/
601	/**
602	* Sets the Page ID.
603	* @param pPage Pointer to the physical guest page tracking structure.
604	*/
605	#define PGM_PAGE_SET_PAGEID(pPage, _idPage) do { (pPage)->idPage = (_idPage); } while (0)
606	/* later:
607	#define PGM_PAGE_SET_PAGEID(pPage, _idPage) do { (pPage)->HCPhys = (((pPage)->HCPhys) & UINT64_C(0x0000fffffffff000)) \
608	\| ((_idPage) & 0xfff) \
609	\| (((_idPage) & 0x0ffff000) << (48-12)); } while (0)
610	*/
611
612	/**
613	* Get the Chunk ID.
614	* @returns The Chunk ID; NIL_GMM_CHUNKID if it's a ZERO page.
615	* @param pPage Pointer to the physical guest page tracking structure.
616	*/
617	#define PGM_PAGE_GET_CHUNKID(pPage) ( (pPage)->idPage >> GMM_CHUNKID_SHIFT )
618	/* later:
619	#if GMM_CHUNKID_SHIFT == 12
620	# define PGM_PAGE_GET_CHUNKID(pPage) ( (uint32_t)((pPage)->HCPhys >> 48) )
621	#elif GMM_CHUNKID_SHIFT > 12
622	# define PGM_PAGE_GET_CHUNKID(pPage) ( (uint32_t)((pPage)->HCPhys >> (48 + (GMM_CHUNKID_SHIFT - 12)) )
623	#elif GMM_CHUNKID_SHIFT < 12
624	# define PGM_PAGE_GET_CHUNKID(pPage) ( ( (uint32_t)((pPage)->HCPhys >> 48) << (12 - GMM_CHUNKID_SHIFT) ) \
625	\| ( (uint32_t)((pPage)->HCPhys & 0xfff) >> GMM_CHUNKID_SHIFT ) )
626	#else
627	# error "GMM_CHUNKID_SHIFT isn't defined or something."
628	#endif
629	*/
630
631	/**
632	* Get the index of the page within the allocaiton chunk.
633	* @returns The page index.
634	* @param pPage Pointer to the physical guest page tracking structure.
635	*/
636	#define PGM_PAGE_GET_PAGE_IN_CHUNK(pPage) ( (pPage)->idPage & GMM_PAGEID_IDX_MASK )
637	/* later:
638	#if GMM_CHUNKID_SHIFT <= 12
639	# define PGM_PAGE_GET_PAGE_IN_CHUNK(pPage) ( (uint32_t)((pPage)->HCPhys & GMM_PAGEID_IDX_MASK) )
640	#else
641	# define PGM_PAGE_GET_PAGE_IN_CHUNK(pPage) ( (uint32_t)((pPage)->HCPhys & 0xfff) \
642	\| ( (uint32_t)((pPage)->HCPhys >> 48) & (RT_BIT_32(GMM_CHUNKID_SHIFT - 12) - 1) ) )
643	#endif
644	*/
645
646
647	/**
648	* Gets the page type.
649	* @returns The page type.
650	* @param pPage Pointer to the physical guest page tracking structure.
651	*/
652	#define PGM_PAGE_GET_TYPE(pPage) (pPage)->u3Type
653
654	/**
655	* Sets the page type.
656	* @param pPage Pointer to the physical guest page tracking structure.
657	* @param _enmType The new page type (PGMPAGETYPE).
658	*/
659	#define PGM_PAGE_SET_TYPE(pPage, _enmType) \
660	do { (pPage)->u3Type = (_enmType); } while (0)
661
662
663	/**
664	* Checks if the page is 'reserved'.
665	* @returns true/false.
666	* @param pPage Pointer to the physical guest page tracking structure.
667	*/
668	#define PGM_PAGE_IS_RESERVED(pPage) ( !!((pPage)->HCPhys & MM_RAM_FLAGS_RESERVED) )
669
670	/**
671	* Checks if the page is marked for MMIO.
672	* @returns true/false.
673	* @param pPage Pointer to the physical guest page tracking structure.
674	*/
675	#define PGM_PAGE_IS_MMIO(pPage) ( !!((pPage)->HCPhys & MM_RAM_FLAGS_MMIO) )
676
677	/**
678	* Checks if the page is backed by the ZERO page.
679	* @returns true/false.
680	* @param pPage Pointer to the physical guest page tracking structure.
681	*/
682	#define PGM_PAGE_IS_ZERO(pPage) ( (pPage)->u2State == PGM_PAGE_STATE_ZERO )
683
684	/**
685	* Checks if the page is backed by a SHARED page.
686	* @returns true/false.
687	* @param pPage Pointer to the physical guest page tracking structure.
688	*/
689	#define PGM_PAGE_IS_SHARED(pPage) ( (pPage)->u2State == PGM_PAGE_STATE_SHARED )
690
691
692	/**
693	* Ram range for GC Phys to HC Phys conversion.
694	*
695	* Can be used for HC Virt to GC Phys and HC Virt to HC Phys
696	* conversions too, but we'll let MM handle that for now.
697	*
698	* This structure is used by linked lists in both GC and HC.
699	*/
700	typedef struct PGMRAMRANGE
701	{
702	/** Pointer to the next RAM range - for R3. */
703	R3PTRTYPE(struct PGMRAMRANGE *) pNextR3;
704	/** Pointer to the next RAM range - for R0. */
705	R0PTRTYPE(struct PGMRAMRANGE *) pNextR0;
706	/** Pointer to the next RAM range - for GC. */
707	GCPTRTYPE(struct PGMRAMRANGE *) pNextGC;
708	/** Start of the range. Page aligned. */
709	RTGCPHYS GCPhys;
710	/** Last address in the range (inclusive). Page aligned (-1). */
711	RTGCPHYS GCPhysLast;
712	/** Size of the range. (Page aligned of course). */
713	RTGCPHYS cb;
714	/** MM_RAM_* flags */
715	uint32_t fFlags;
716	#ifdef VBOX_WITH_NEW_PHYS_CODE
717	uint32_t u32Alignment; /*< alignment. /
718	#else
719	/** HC virtual lookup ranges for chunks. Currently only used with MM_RAM_FLAGS_DYNAMIC_ALLOC ranges. */
720	GCPTRTYPE(PRTHCPTR) pavHCChunkGC;
721	/** HC virtual lookup ranges for chunks. Currently only used with MM_RAM_FLAGS_DYNAMIC_ALLOC ranges. */
722	R3R0PTRTYPE(PRTHCPTR) pavHCChunkHC;
723	#endif
724	/** Start of the HC mapping of the range. This is only used for MMIO2. */
725	R3PTRTYPE(void *) pvHC;
726	/** The range description. */
727	R3PTRTYPE(const char *) pszDesc;
728
729	#ifdef VBOX_WITH_NEW_PHYS_CODE
730	/** Padding to make aPage aligned on sizeof(PGMPAGE). */
731	uint32_t au32Reserved[2];
732	#else
733	# if HC_ARCH_BITS == 32
734	/** Padding to make aPage aligned on sizeof(PGMPAGE). */
735	uint32_t u32Reserved;
736	# endif
737	#endif
738
739	/** Array of physical guest page tracking structures. */
740	PGMPAGE aPages[1];
741	} PGMRAMRANGE;
742	/** Pointer to Ram range for GC Phys to HC Phys conversion. */
743	typedef PGMRAMRANGE *PPGMRAMRANGE;
744
745	/** Return hc ptr corresponding to the ram range and physical offset */
746	#define PGMRAMRANGE_GETHCPTR(pRam, off) \
747	(pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC) ? (RTHCPTR)((RTHCUINTPTR)CTXSUFF(pRam->pavHCChunk)[(off >> PGM_DYNAMIC_CHUNK_SHIFT)] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK)) \
748	: (RTHCPTR)((RTHCUINTPTR)pRam->pvHC + off);
749
750	/**
751	* Per page tracking structure for ROM image.
752	*
753	* A ROM image may have a shadow page, in which case we may have
754	* two pages backing it. This structure contains the PGMPAGE for
755	* both while PGMRAMRANGE have a copy of the active one. It is
756	* important that these aren't out of sync in any regard other
757	* than page pool tracking data.
758	*/
759	typedef struct PGMROMPAGE
760	{
761	/** The page structure for the virgin ROM page. */
762	PGMPAGE Virgin;
763	/** The page structure for the shadow RAM page. */
764	PGMPAGE Shadow;
765	/** The current protection setting. */
766	PGMROMPROT enmProt;
767	/** Pad the structure size to a multiple of 8. */
768	uint32_t u32Padding;
769	} PGMROMPAGE;
770	/** Pointer to a ROM page tracking structure. */
771	typedef PGMROMPAGE *PPGMROMPAGE;
772
773
774	/**
775	* A registered ROM image.
776	*
777	* This is needed to keep track of ROM image since they generally
778	* intrude into a PGMRAMRANGE. It also keeps track of additional
779	* info like the two page sets (read-only virgin and read-write shadow),
780	* the current state of each page.
781	*
782	* Because access handlers cannot easily be executed in a different
783	* context, the ROM ranges needs to be accessible and in all contexts.
784	*/
785	typedef struct PGMROMRANGE
786	{
787	/** Pointer to the next range - R3. */
788	R3PTRTYPE(struct PGMROMRANGE *) pNextR3;
789	/** Pointer to the next range - R0. */
790	R0PTRTYPE(struct PGMROMRANGE *) pNextR0;
791	/** Pointer to the next range - R0. */
792	GCPTRTYPE(struct PGMROMRANGE *) pNextGC;
793	/** Address of the range. */
794	RTGCPHYS GCPhys;
795	/** Address of the last byte in the range. */
796	RTGCPHYS GCPhysLast;
797	/** Size of the range. */
798	RTGCPHYS cb;
799	/** The flags (PGMPHYS_ROM_FLAG_). /
800	uint32_t fFlags;
801	/*< Alignment padding ensuring that aPages is sizeof(PGMROMPAGE) aligned. /
802	uint32_t au32Alignemnt[HC_ARCH_BITS == 32 ? 7 : 3];
803	/** Pointer to the original bits when PGMPHYS_ROM_FLAG_PERMANENT_BINARY was specified.
804	* This is used for strictness checks. */
805	R3PTRTYPE(const void *) pvOriginal;
806	/** The ROM description. */
807	R3PTRTYPE(const char *) pszDesc;
808	/** The per page tracking structures. */
809	PGMROMPAGE aPages[1];
810	} PGMROMRANGE;
811	/** Pointer to a ROM range. */
812	typedef PGMROMRANGE *PPGMROMRANGE;
813
814
815
816
817	/** @todo r=bird: fix typename. */
818	/**
819	* PGMPhysRead/Write cache entry
820	*/
821	typedef struct PGMPHYSCACHE_ENTRY
822	{
823	/** HC pointer to physical page */
824	R3PTRTYPE(uint8_t *) pbHC;
825	/** GC Physical address for cache entry */
826	RTGCPHYS GCPhys;
827	#if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32
828	RTGCPHYS u32Padding0; /*< alignment padding. /
829	#endif
830	} PGMPHYSCACHE_ENTRY;
831
832	/**
833	* PGMPhysRead/Write cache to reduce REM memory access overhead
834	*/
835	typedef struct PGMPHYSCACHE
836	{
837	/** Bitmap of valid cache entries */
838	uint64_t aEntries;
839	/** Cache entries */
840	PGMPHYSCACHE_ENTRY Entry[PGM_MAX_PHYSCACHE_ENTRIES];
841	} PGMPHYSCACHE;
842
843
844	/** Pointer to an allocation chunk ring-3 mapping. */
845	typedef struct PGMCHUNKR3MAP *PPGMCHUNKR3MAP;
846	/** Pointer to an allocation chunk ring-3 mapping pointer. */
847	typedef PPGMCHUNKR3MAP *PPPGMCHUNKR3MAP;
848
849	/**
850	* Ring-3 tracking structore for an allocation chunk ring-3 mapping.
851	*
852	* The primary tree (Core) uses the chunk id as key.
853	* The secondary tree (AgeCore) is used for ageing and uses ageing sequence number as key.
854	*/
855	typedef struct PGMCHUNKR3MAP
856	{
857	/** The key is the chunk id. */
858	AVLU32NODECORE Core;
859	/** The key is the ageing sequence number. */
860	AVLLU32NODECORE AgeCore;
861	/** The current age thingy. */
862	uint32_t iAge;
863	/** The current reference count. */
864	uint32_t volatile cRefs;
865	/** The current permanent reference count. */
866	uint32_t volatile cPermRefs;
867	/** The mapping address. */
868	void *pv;
869	} PGMCHUNKR3MAP;
870
871	/**
872	* Allocation chunk ring-3 mapping TLB entry.
873	*/
874	typedef struct PGMCHUNKR3MAPTLBE
875	{
876	/** The chunk id. */
877	uint32_t volatile idChunk;
878	#if HC_ARCH_BITS == 64
879	uint32_t u32Padding; /*< alignment padding. /
880	#endif
881	/** The chunk map. */
882	R3R0PTRTYPE(PPGMCHUNKR3MAP) volatile pChunk;
883	} PGMCHUNKR3MAPTLBE;
884	/** Pointer to the an allocation chunk ring-3 mapping TLB entry. */
885	typedef PGMCHUNKR3MAPTLBE *PPGMCHUNKR3MAPTLBE;
886
887	/** The number of TLB entries in PGMCHUNKR3MAPTLB.
888	* @remark Must be a power of two value. */
889	#define PGM_CHUNKR3MAPTLB_ENTRIES 32
890
891	/**
892	* Allocation chunk ring-3 mapping TLB.
893	*
894	* @remarks We use a TLB to speed up lookups by avoiding walking the AVL.
895	* At first glance this might look kinda odd since AVL trees are
896	* supposed to give the most optimial lookup times of all trees
897	* due to their balancing. However, take a tree with 1023 nodes
898	* in it, that's 10 levels, meaning that most searches has to go
899	* down 9 levels before they find what they want. This isn't fast
900	* compared to a TLB hit. There is the factor of cache misses,
901	* and of course the problem with trees and branch prediction.
902	* This is why we use TLBs in front of most of the trees.
903	*
904	* @todo Generalize this TLB + AVL stuff, shouldn't be all that
905	* difficult when we switch to inlined AVL trees (from kStuff).
906	*/
907	typedef struct PGMCHUNKR3MAPTLB
908	{
909	/** The TLB entries. */
910	PGMCHUNKR3MAPTLBE aEntries[PGM_CHUNKR3MAPTLB_ENTRIES];
911	} PGMCHUNKR3MAPTLB;
912
913	/**
914	* Calculates the index of a guest page in the Ring-3 Chunk TLB.
915	* @returns Chunk TLB index.
916	* @param idChunk The Chunk ID.
917	*/
918	#define PGM_CHUNKR3MAPTLB_IDX(idChunk) ( (idChunk) & (PGM_CHUNKR3MAPTLB_ENTRIES - 1) )
919
920
921	/**
922	* Ring-3 guest page mapping TLB entry.
923	* @remarks used in ring-0 as well at the moment.
924	*/
925	typedef struct PGMPAGER3MAPTLBE
926	{
927	/** Address of the page. */
928	RTGCPHYS volatile GCPhys;
929	#if HC_ARCH_BITS == 64
930	uint32_t u32Padding; /*< alignment padding. /
931	#endif
932	/** The guest page. */
933	R3R0PTRTYPE(PPGMPAGE) volatile pPage;
934	/** Pointer to the page mapping tracking structure, PGMCHUNKR3MAP. */
935	R3R0PTRTYPE(PPGMCHUNKR3MAP) volatile pMap;
936	/** The address */
937	R3R0PTRTYPE(void *) volatile pv;
938	} PGMPAGER3MAPTLBE;
939	/** Pointer to an entry in the HC physical TLB. */
940	typedef PGMPAGER3MAPTLBE *PPGMPAGER3MAPTLBE;
941
942
943	/** The number of entries in the ring-3 guest page mapping TLB.
944	* @remarks The value must be a power of two. */
945	#define PGM_PAGER3MAPTLB_ENTRIES 64
946
947	/**
948	* Ring-3 guest page mapping TLB.
949	* @remarks used in ring-0 as well at the moment.
950	*/
951	typedef struct PGMPAGER3MAPTLB
952	{
953	/** The TLB entries. */
954	PGMPAGER3MAPTLBE aEntries[PGM_PAGER3MAPTLB_ENTRIES];
955	} PGMPAGER3MAPTLB;
956	/** Pointer to the ring-3 guest page mapping TLB. */
957	typedef PGMPAGER3MAPTLB *PPGMPAGER3MAPTLB;
958
959	/**
960	* Calculates the index of the TLB entry for the specified guest page.
961	* @returns Physical TLB index.
962	* @param GCPhys The guest physical address.
963	*/
964	#define PGM_PAGER3MAPTLB_IDX(GCPhys) ( ((GCPhys) >> PAGE_SHIFT) & (PGM_PAGER3MAPTLB_ENTRIES - 1) )
965
966
967	/** @name Context neutrual page mapper TLB.
968	*
969	* Hoping to avoid some code and bug duplication parts of the GCxxx->CCPtr
970	* code is writting in a kind of context neutrual way. Time will show whether
971	* this actually makes sense or not...
972	*
973	* @{ */
974	/** @typedef PPGMPAGEMAPTLB
975	* The page mapper TLB pointer type for the current context. */
976	/** @typedef PPGMPAGEMAPTLB
977	* The page mapper TLB entry pointer type for the current context. */
978	/** @typedef PPGMPAGEMAPTLB
979	* The page mapper TLB entry pointer pointer type for the current context. */
980	/** @def PGMPAGEMAPTLB_ENTRIES
981	* The number of TLB entries in the page mapper TLB for the current context. */
982	/** @def PGM_PAGEMAPTLB_IDX
983	* Calculate the TLB index for a guest physical address.
984	* @returns The TLB index.
985	* @param GCPhys The guest physical address. */
986	/** @typedef PPGMPAGEMAP
987	* Pointer to a page mapper unit for current context. */
988	/** @typedef PPPGMPAGEMAP
989	* Pointer to a page mapper unit pointer for current context. */
990	#ifdef IN_GC
991	// typedef PPGMPAGEGCMAPTLB PPGMPAGEMAPTLB;
992	// typedef PPGMPAGEGCMAPTLBE PPGMPAGEMAPTLBE;
993	// typedef PPGMPAGEGCMAPTLBE *PPPGMPAGEMAPTLBE;
994	# define PGM_PAGEMAPTLB_ENTRIES PGM_PAGEGCMAPTLB_ENTRIES
995	# define PGM_PAGEMAPTLB_IDX(GCPhys) PGM_PAGEGCMAPTLB_IDX(GCPhys)
996	typedef void * PPGMPAGEMAP;
997	typedef void ** PPPGMPAGEMAP;
998	//#elif IN_RING0
999	// typedef PPGMPAGER0MAPTLB PPGMPAGEMAPTLB;
1000	// typedef PPGMPAGER0MAPTLBE PPGMPAGEMAPTLBE;
1001	// typedef PPGMPAGER0MAPTLBE *PPPGMPAGEMAPTLBE;
1002	//# define PGM_PAGEMAPTLB_ENTRIES PGM_PAGER0MAPTLB_ENTRIES
1003	//# define PGM_PAGEMAPTLB_IDX(GCPhys) PGM_PAGER0MAPTLB_IDX(GCPhys)
1004	// typedef PPGMCHUNKR0MAP PPGMPAGEMAP;
1005	// typedef PPPGMCHUNKR0MAP PPPGMPAGEMAP;
1006	#else
1007	typedef PPGMPAGER3MAPTLB PPGMPAGEMAPTLB;
1008	typedef PPGMPAGER3MAPTLBE PPGMPAGEMAPTLBE;
1009	typedef PPGMPAGER3MAPTLBE *PPPGMPAGEMAPTLBE;
1010	# define PGM_PAGEMAPTLB_ENTRIES PGM_PAGER3MAPTLB_ENTRIES
1011	# define PGM_PAGEMAPTLB_IDX(GCPhys) PGM_PAGER3MAPTLB_IDX(GCPhys)
1012	typedef PPGMCHUNKR3MAP PPGMPAGEMAP;
1013	typedef PPPGMCHUNKR3MAP PPPGMPAGEMAP;
1014	#endif
1015	/** @} */
1016
1017
1018	/** @name PGM Pool Indexes.
1019	* Aka. the unique shadow page identifier.
1020	* @{ */
1021	/** NIL page pool IDX. */
1022	#define NIL_PGMPOOL_IDX 0
1023	/** The first normal index. */
1024	#define PGMPOOL_IDX_FIRST_SPECIAL 1
1025	/** Page directory (32-bit root). */
1026	#define PGMPOOL_IDX_PD 1
1027	/** The extended PAE page directory (2048 entries, works as root currently). */
1028	#define PGMPOOL_IDX_PAE_PD 2
1029	/** Page Directory Pointer Table (PAE root, not currently used). */
1030	#define PGMPOOL_IDX_PDPTR 3
1031	/** Page Map Level-4 (64-bit root). */
1032	#define PGMPOOL_IDX_PML4 4
1033	/** The first normal index. */
1034	#define PGMPOOL_IDX_FIRST 5
1035	/** The last valid index. (inclusive, 14 bits) */
1036	#define PGMPOOL_IDX_LAST 0x3fff
1037	/** @} */
1038
1039	/** The NIL index for the parent chain. */
1040	#define NIL_PGMPOOL_USER_INDEX ((uint16_t)0xffff)
1041
1042	/**
1043	* Node in the chain linking a shadowed page to it's parent (user).
1044	*/
1045	#pragma pack(1)
1046	typedef struct PGMPOOLUSER
1047	{
1048	/** The index to the next item in the chain. NIL_PGMPOOL_USER_INDEX is no next. */
1049	uint16_t iNext;
1050	/** The user page index. */
1051	uint16_t iUser;
1052	/** Index into the user table. */
1053	uint16_t iUserTable;
1054	} PGMPOOLUSER, *PPGMPOOLUSER;
1055	typedef const PGMPOOLUSER *PCPGMPOOLUSER;
1056	#pragma pack()
1057
1058
1059	/** The NIL index for the phys ext chain. */
1060	#define NIL_PGMPOOL_PHYSEXT_INDEX ((uint16_t)0xffff)
1061
1062	/**
1063	* Node in the chain of physical cross reference extents.
1064	*/
1065	#pragma pack(1)
1066	typedef struct PGMPOOLPHYSEXT
1067	{
1068	/** The index to the next item in the chain. NIL_PGMPOOL_PHYSEXT_INDEX is no next. */
1069	uint16_t iNext;
1070	/** The user page index. */
1071	uint16_t aidx[3];
1072	} PGMPOOLPHYSEXT, *PPGMPOOLPHYSEXT;
1073	typedef const PGMPOOLPHYSEXT *PCPGMPOOLPHYSEXT;
1074	#pragma pack()
1075
1076
1077	/**
1078	* The kind of page that's being shadowed.
1079	*/
1080	typedef enum PGMPOOLKIND
1081	{
1082	/** The virtual invalid 0 entry. */
1083	PGMPOOLKIND_INVALID = 0,
1084	/** The entry is free (=unused). */
1085	PGMPOOLKIND_FREE,
1086
1087	/** Shw: 32-bit page table; Gst: no paging */
1088	PGMPOOLKIND_32BIT_PT_FOR_PHYS,
1089	/** Shw: 32-bit page table; Gst: 32-bit page table. */
1090	PGMPOOLKIND_32BIT_PT_FOR_32BIT_PT,
1091	/** Shw: 32-bit page table; Gst: 4MB page. */
1092	PGMPOOLKIND_32BIT_PT_FOR_32BIT_4MB,
1093	/** Shw: PAE page table; Gst: no paging */
1094	PGMPOOLKIND_PAE_PT_FOR_PHYS,
1095	/** Shw: PAE page table; Gst: 32-bit page table. */
1096	PGMPOOLKIND_PAE_PT_FOR_32BIT_PT,
1097	/** Shw: PAE page table; Gst: Half of a 4MB page. */
1098	PGMPOOLKIND_PAE_PT_FOR_32BIT_4MB,
1099	/** Shw: PAE page table; Gst: PAE page table. */
1100	PGMPOOLKIND_PAE_PT_FOR_PAE_PT,
1101	/** Shw: PAE page table; Gst: 2MB page. */
1102	PGMPOOLKIND_PAE_PT_FOR_PAE_2MB,
1103
1104	/** Shw: PAE page directory; Gst: 32-bit page directory. */
1105	PGMPOOLKIND_PAE_PD_FOR_32BIT_PD,
1106	/** Shw: PAE page directory; Gst: PAE page directory. */
1107	PGMPOOLKIND_PAE_PD_FOR_PAE_PD,
1108
1109	/** Shw: 64-bit page directory pointer table; Gst: 64-bit page directory pointer table. */
1110	PGMPOOLKIND_64BIT_PDPTR_FOR_64BIT_PDPTR,
1111
1112	/** Shw: Root 32-bit page directory. */
1113	PGMPOOLKIND_ROOT_32BIT_PD,
1114	/** Shw: Root PAE page directory */
1115	PGMPOOLKIND_ROOT_PAE_PD,
1116	/** Shw: Root PAE page directory pointer table (legacy, 4 entries). */
1117	PGMPOOLKIND_ROOT_PDPTR,
1118	/** Shw: Root page map level-4 table. */
1119	PGMPOOLKIND_ROOT_PML4,
1120
1121	/** The last valid entry. */
1122	PGMPOOLKIND_LAST = PGMPOOLKIND_ROOT_PML4
1123	} PGMPOOLKIND;
1124
1125
1126	/**
1127	* The tracking data for a page in the pool.
1128	*/
1129	typedef struct PGMPOOLPAGE
1130	{
1131	/** AVL node code with the (HC) physical address of this page. */
1132	AVLOHCPHYSNODECORE Core;
1133	/** Pointer to the HC mapping of the page. */
1134	R3R0PTRTYPE(void *) pvPageHC;
1135	/** The guest physical address. */
1136	RTGCPHYS GCPhys;
1137	/** The kind of page we're shadowing. (This is really a PGMPOOLKIND enum.) */
1138	uint8_t enmKind;
1139	uint8_t bPadding;
1140	/** The index of this page. */
1141	uint16_t idx;
1142	/** The next entry in the list this page currently resides in.
1143	* It's either in the free list or in the GCPhys hash. */
1144	uint16_t iNext;
1145	#ifdef PGMPOOL_WITH_USER_TRACKING
1146	/** Head of the user chain. NIL_PGMPOOL_USER_INDEX if not currently in use. */
1147	uint16_t iUserHead;
1148	/** The number of present entries. */
1149	uint16_t cPresent;
1150	/** The first entry in the table which is present. */
1151	uint16_t iFirstPresent;
1152	#endif
1153	#ifdef PGMPOOL_WITH_MONITORING
1154	/** The number of modifications to the monitored page. */
1155	uint16_t cModifications;
1156	/** The next modified page. NIL_PGMPOOL_IDX if tail. */
1157	uint16_t iModifiedNext;
1158	/** The previous modified page. NIL_PGMPOOL_IDX if head. */
1159	uint16_t iModifiedPrev;
1160	/** The next page sharing access handler. NIL_PGMPOOL_IDX if tail. */
1161	uint16_t iMonitoredNext;
1162	/** The previous page sharing access handler. NIL_PGMPOOL_IDX if head. */
1163	uint16_t iMonitoredPrev;
1164	#endif
1165	#ifdef PGMPOOL_WITH_CACHE
1166	/** The next page in the age list. */
1167	uint16_t iAgeNext;
1168	/** The previous page in the age list. */
1169	uint16_t iAgePrev;
1170	#endif /* PGMPOOL_WITH_CACHE */
1171	/** Used to indicate that the page is zeroed. */
1172	bool fZeroed;
1173	/** Used to indicate that a PT has non-global entries. */
1174	bool fSeenNonGlobal;
1175	/** Used to indicate that we're monitoring writes to the guest page. */
1176	bool fMonitored;
1177	/** Used to indicate that the page is in the cache (e.g. in the GCPhys hash).
1178	* (All pages are in the age list.) */
1179	bool fCached;
1180	/** This is used by the R3 access handlers when invoked by an async thread.
1181	* It's a hack required because of REMR3NotifyHandlerPhysicalDeregister. */
1182	bool volatile fReusedFlushPending;
1183	/** Used to indicate that the guest is mapping the page is also used as a CR3.
1184	* In these cases the access handler acts differently and will check
1185	* for mapping conflicts like the normal CR3 handler.
1186	* @todo When we change the CR3 shadowing to use pool pages, this flag can be
1187	* replaced by a list of pages which share access handler.
1188	*/
1189	bool fCR3Mix;
1190	#if HC_ARCH_BITS == 64 \|\| GC_ARCH_BITS == 64
1191	bool Alignment[4]; /*< Align the structure size on a 64-bit boundrary. /
1192	#endif
1193	} PGMPOOLPAGE, PPGMPOOLPAGE, *PPPGMPOOLPAGE;
1194
1195
1196	#ifdef PGMPOOL_WITH_CACHE
1197	/** The hash table size. */
1198	# define PGMPOOL_HASH_SIZE 0x40
1199	/** The hash function. */
1200	# define PGMPOOL_HASH(GCPhys) ( ((GCPhys) >> PAGE_SHIFT) & (PGMPOOL_HASH_SIZE - 1) )
1201	#endif
1202
1203
1204	/**
1205	* The shadow page pool instance data.
1206	*
1207	* It's all one big allocation made at init time, except for the
1208	* pages that is. The user nodes follows immediatly after the
1209	* page structures.
1210	*/
1211	typedef struct PGMPOOL
1212	{
1213	/** The VM handle - HC Ptr. */
1214	R3R0PTRTYPE(PVM) pVMHC;
1215	/** The VM handle - GC Ptr. */
1216	GCPTRTYPE(PVM) pVMGC;
1217	/** The max pool size. This includes the special IDs. */
1218	uint16_t cMaxPages;
1219	/** The current pool size. */
1220	uint16_t cCurPages;
1221	/** The head of the free page list. */
1222	uint16_t iFreeHead;
1223	/* Padding. */
1224	uint16_t u16Padding;
1225	#ifdef PGMPOOL_WITH_USER_TRACKING
1226	/** Head of the chain of free user nodes. */
1227	uint16_t iUserFreeHead;
1228	/** The number of user nodes we've allocated. */
1229	uint16_t cMaxUsers;
1230	/** The number of present page table entries in the entire pool. */
1231	uint32_t cPresent;
1232	/** Pointer to the array of user nodes - GC pointer. */
1233	GCPTRTYPE(PPGMPOOLUSER) paUsersGC;
1234	/** Pointer to the array of user nodes - HC pointer. */
1235	R3R0PTRTYPE(PPGMPOOLUSER) paUsersHC;
1236	#endif /* PGMPOOL_WITH_USER_TRACKING */
1237	#ifdef PGMPOOL_WITH_GCPHYS_TRACKING
1238	/** Head of the chain of free phys ext nodes. */
1239	uint16_t iPhysExtFreeHead;
1240	/** The number of user nodes we've allocated. */
1241	uint16_t cMaxPhysExts;
1242	/** Pointer to the array of physical xref extent - GC pointer. */
1243	GCPTRTYPE(PPGMPOOLPHYSEXT) paPhysExtsGC;
1244	/** Pointer to the array of physical xref extent nodes - HC pointer. */
1245	R3R0PTRTYPE(PPGMPOOLPHYSEXT) paPhysExtsHC;
1246	#endif /* PGMPOOL_WITH_GCPHYS_TRACKING */
1247	#ifdef PGMPOOL_WITH_CACHE
1248	/** Hash table for GCPhys addresses. */
1249	uint16_t aiHash[PGMPOOL_HASH_SIZE];
1250	/** The head of the age list. */
1251	uint16_t iAgeHead;
1252	/** The tail of the age list. */
1253	uint16_t iAgeTail;
1254	/** Set if the cache is enabled. */
1255	bool fCacheEnabled;
1256	#endif /* PGMPOOL_WITH_CACHE */
1257	#ifdef PGMPOOL_WITH_MONITORING
1258	/** Head of the list of modified pages. */
1259	uint16_t iModifiedHead;
1260	/** The current number of modified pages. */
1261	uint16_t cModifiedPages;
1262	/** Access handler, GC. */
1263	GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnAccessHandlerGC;
1264	/** Access handler, R0. */
1265	R0PTRTYPE(PFNPGMR0PHYSHANDLER) pfnAccessHandlerR0;
1266	/** Access handler, R3. */
1267	R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnAccessHandlerR3;
1268	/** The access handler description (HC ptr). */
1269	R3PTRTYPE(const char *) pszAccessHandler;
1270	#endif /* PGMPOOL_WITH_MONITORING */
1271	/** The number of pages currently in use. */
1272	uint16_t cUsedPages;
1273	#ifdef VBOX_WITH_STATISTICS
1274	/** The high wather mark for cUsedPages. */
1275	uint16_t cUsedPagesHigh;
1276	uint32_t Alignment1; /*< Align the next member on a 64-bit boundrary. /
1277	/** Profiling pgmPoolAlloc(). */
1278	STAMPROFILEADV StatAlloc;
1279	/** Profiling pgmPoolClearAll(). */
1280	STAMPROFILE StatClearAll;
1281	/** Profiling pgmPoolFlushAllInt(). */
1282	STAMPROFILE StatFlushAllInt;
1283	/** Profiling pgmPoolFlushPage(). */
1284	STAMPROFILE StatFlushPage;
1285	/** Profiling pgmPoolFree(). */
1286	STAMPROFILE StatFree;
1287	/** Profiling time spent zeroing pages. */
1288	STAMPROFILE StatZeroPage;
1289	# ifdef PGMPOOL_WITH_USER_TRACKING
1290	/** Profiling of pgmPoolTrackDeref. */
1291	STAMPROFILE StatTrackDeref;
1292	/** Profiling pgmTrackFlushGCPhysPT. */
1293	STAMPROFILE StatTrackFlushGCPhysPT;
1294	/** Profiling pgmTrackFlushGCPhysPTs. */
1295	STAMPROFILE StatTrackFlushGCPhysPTs;
1296	/** Profiling pgmTrackFlushGCPhysPTsSlow. */
1297	STAMPROFILE StatTrackFlushGCPhysPTsSlow;
1298	/** Number of times we've been out of user records. */
1299	STAMCOUNTER StatTrackFreeUpOneUser;
1300	# endif
1301	# ifdef PGMPOOL_WITH_GCPHYS_TRACKING
1302	/** Profiling deref activity related tracking GC physical pages. */
1303	STAMPROFILE StatTrackDerefGCPhys;
1304	/** Number of linear searches for a HCPhys in the ram ranges. */
1305	STAMCOUNTER StatTrackLinearRamSearches;
1306	/** The number of failing pgmPoolTrackPhysExtAlloc calls. */
1307	STAMCOUNTER StamTrackPhysExtAllocFailures;
1308	# endif
1309	# ifdef PGMPOOL_WITH_MONITORING
1310	/** Profiling the GC PT access handler. */
1311	STAMPROFILE StatMonitorGC;
1312	/** Times we've failed interpreting the instruction. */
1313	STAMCOUNTER StatMonitorGCEmulateInstr;
1314	/** Profiling the pgmPoolFlushPage calls made from the GC PT access handler. */
1315	STAMPROFILE StatMonitorGCFlushPage;
1316	/** Times we've detected fork(). */
1317	STAMCOUNTER StatMonitorGCFork;
1318	/** Profiling the GC access we've handled (except REP STOSD). */
1319	STAMPROFILE StatMonitorGCHandled;
1320	/** Times we've failed interpreting a patch code instruction. */
1321	STAMCOUNTER StatMonitorGCIntrFailPatch1;
1322	/** Times we've failed interpreting a patch code instruction during flushing. */
1323	STAMCOUNTER StatMonitorGCIntrFailPatch2;
1324	/** The number of times we've seen rep prefixes we can't handle. */
1325	STAMCOUNTER StatMonitorGCRepPrefix;
1326	/** Profiling the REP STOSD cases we've handled. */
1327	STAMPROFILE StatMonitorGCRepStosd;
1328
1329	/** Profiling the HC PT access handler. */
1330	STAMPROFILE StatMonitorHC;
1331	/** Times we've failed interpreting the instruction. */
1332	STAMCOUNTER StatMonitorHCEmulateInstr;
1333	/** Profiling the pgmPoolFlushPage calls made from the HC PT access handler. */
1334	STAMPROFILE StatMonitorHCFlushPage;
1335	/** Times we've detected fork(). */
1336	STAMCOUNTER StatMonitorHCFork;
1337	/** Profiling the HC access we've handled (except REP STOSD). */
1338	STAMPROFILE StatMonitorHCHandled;
1339	/** The number of times we've seen rep prefixes we can't handle. */
1340	STAMCOUNTER StatMonitorHCRepPrefix;
1341	/** Profiling the REP STOSD cases we've handled. */
1342	STAMPROFILE StatMonitorHCRepStosd;
1343	/** The number of times we're called in an async thread an need to flush. */
1344	STAMCOUNTER StatMonitorHCAsync;
1345	/** The high wather mark for cModifiedPages. */
1346	uint16_t cModifiedPagesHigh;
1347	uint16_t Alignment2[3]; /*< Align the next member on a 64-bit boundrary. /
1348	# endif
1349	# ifdef PGMPOOL_WITH_CACHE
1350	/** The number of cache hits. */
1351	STAMCOUNTER StatCacheHits;
1352	/** The number of cache misses. */
1353	STAMCOUNTER StatCacheMisses;
1354	/** The number of times we've got a conflict of 'kind' in the cache. */
1355	STAMCOUNTER StatCacheKindMismatches;
1356	/** Number of times we've been out of pages. */
1357	STAMCOUNTER StatCacheFreeUpOne;
1358	/** The number of cacheable allocations. */
1359	STAMCOUNTER StatCacheCacheable;
1360	/** The number of uncacheable allocations. */
1361	STAMCOUNTER StatCacheUncacheable;
1362	# endif
1363	#elif HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32
1364	uint32_t Alignment1; /*< Align the next member on a 64-bit boundrary. /
1365	#endif
1366	/** The AVL tree for looking up a page by its HC physical address. */
1367	AVLOHCPHYSTREE HCPhysTree;
1368	uint32_t Alignment3; /*< Align the next member on a 64-bit boundrary. /
1369	/** Array of pages. (cMaxPages in length)
1370	* The Id is the index into thist array.
1371	*/
1372	PGMPOOLPAGE aPages[PGMPOOL_IDX_FIRST];
1373	} PGMPOOL, PPGMPOOL, *PPPGMPOOL;
1374
1375
1376	/** @def PGMPOOL_PAGE_2_PTR
1377	* Maps a pool page pool into the current context.
1378	*
1379	* @returns VBox status code.
1380	* @param pVM The VM handle.
1381	* @param pPage The pool page.
1382	*
1383	* @remark In HC this uses PGMGCDynMapHCPage(), so it will consume of the
1384	* small page window employeed by that function. Be careful.
1385	* @remark There is no need to assert on the result.
1386	*/
1387	#ifdef IN_GC
1388	# define PGMPOOL_PAGE_2_PTR(pVM, pPage) pgmGCPoolMapPage((pVM), (pPage))
1389	#else
1390	# define PGMPOOL_PAGE_2_PTR(pVM, pPage) ((pPage)->pvPageHC)
1391	#endif
1392
1393
1394	/**
1395	* Trees are using self relative offsets as pointers.
1396	* So, all its data, including the root pointer, must be in the heap for HC and GC
1397	* to have the same layout.
1398	*/
1399	typedef struct PGMTREES
1400	{
1401	/** Physical access handlers (AVL range+offsetptr tree). */
1402	AVLROGCPHYSTREE PhysHandlers;
1403	/** Virtual access handlers (AVL range + GC ptr tree). */
1404	AVLROGCPTRTREE VirtHandlers;
1405	/** Virtual access handlers (Phys range AVL range + offsetptr tree). */
1406	AVLROGCPHYSTREE PhysToVirtHandlers;
1407	uint32_t auPadding[1];
1408	} PGMTREES;
1409	/** Pointer to PGM trees. */
1410	typedef PGMTREES *PPGMTREES;
1411
1412
1413	/** @name Paging mode macros
1414	* @{ */
1415	#ifdef IN_GC
1416	# define PGM_CTX(a,b) a##GC##b
1417	# define PGM_CTX_STR(a,b) a "GC" b
1418	# define PGM_CTX_DECL(type) PGMGCDECL(type)
1419	#else
1420	# ifdef IN_RING3
1421	# define PGM_CTX(a,b) a##R3##b
1422	# define PGM_CTX_STR(a,b) a "R3" b
1423	# define PGM_CTX_DECL(type) DECLCALLBACK(type)
1424	# else
1425	# define PGM_CTX(a,b) a##R0##b
1426	# define PGM_CTX_STR(a,b) a "R0" b
1427	# define PGM_CTX_DECL(type) PGMDECL(type)
1428	# endif
1429	#endif
1430
1431	#define PGM_GST_NAME_REAL(name) PGM_CTX(pgm,GstReal##name)
1432	#define PGM_GST_NAME_GC_REAL_STR(name) "pgmGCGstReal" #name
1433	#define PGM_GST_NAME_R0_REAL_STR(name) "pgmR0GstReal" #name
1434	#define PGM_GST_NAME_PROT(name) PGM_CTX(pgm,GstProt##name)
1435	#define PGM_GST_NAME_GC_PROT_STR(name) "pgmGCGstProt" #name
1436	#define PGM_GST_NAME_R0_PROT_STR(name) "pgmR0GstProt" #name
1437	#define PGM_GST_NAME_32BIT(name) PGM_CTX(pgm,Gst32Bit##name)
1438	#define PGM_GST_NAME_GC_32BIT_STR(name) "pgmGCGst32Bit" #name
1439	#define PGM_GST_NAME_R0_32BIT_STR(name) "pgmR0Gst32Bit" #name
1440	#define PGM_GST_NAME_PAE(name) PGM_CTX(pgm,GstPAE##name)
1441	#define PGM_GST_NAME_GC_PAE_STR(name) "pgmGCGstPAE" #name
1442	#define PGM_GST_NAME_R0_PAE_STR(name) "pgmR0GstPAE" #name
1443	#define PGM_GST_NAME_AMD64(name) PGM_CTX(pgm,GstAMD64##name)
1444	#define PGM_GST_NAME_GC_AMD64_STR(name) "pgmGCGstAMD64" #name
1445	#define PGM_GST_NAME_R0_AMD64_STR(name) "pgmR0GstAMD64" #name
1446	#define PGM_GST_PFN(name, pVM) ((pVM)->pgm.s.PGM_CTX(pfn,Gst##name))
1447	#define PGM_GST_DECL(type, name) PGM_CTX_DECL(type) PGM_GST_NAME(name)
1448
1449	#define PGM_SHW_NAME_32BIT(name) PGM_CTX(pgm,Shw32Bit##name)
1450	#define PGM_SHW_NAME_GC_32BIT_STR(name) "pgmGCShw32Bit" #name
1451	#define PGM_SHW_NAME_R0_32BIT_STR(name) "pgmR0Shw32Bit" #name
1452	#define PGM_SHW_NAME_PAE(name) PGM_CTX(pgm,ShwPAE##name)
1453	#define PGM_SHW_NAME_GC_PAE_STR(name) "pgmGCShwPAE" #name
1454	#define PGM_SHW_NAME_R0_PAE_STR(name) "pgmR0ShwPAE" #name
1455	#define PGM_SHW_NAME_AMD64(name) PGM_CTX(pgm,ShwAMD64##name)
1456	#define PGM_SHW_NAME_GC_AMD64_STR(name) "pgmGCShwAMD64" #name
1457	#define PGM_SHW_NAME_R0_AMD64_STR(name) "pgmR0ShwAMD64" #name
1458	#define PGM_SHW_DECL(type, name) PGM_CTX_DECL(type) PGM_SHW_NAME(name)
1459	#define PGM_SHW_PFN(name, pVM) ((pVM)->pgm.s.PGM_CTX(pfn,Shw##name))
1460
1461	/* Shw_Gst */
1462	#define PGM_BTH_NAME_32BIT_REAL(name) PGM_CTX(pgm,Bth32BitReal##name)
1463	#define PGM_BTH_NAME_32BIT_PROT(name) PGM_CTX(pgm,Bth32BitProt##name)
1464	#define PGM_BTH_NAME_32BIT_32BIT(name) PGM_CTX(pgm,Bth32Bit32Bit##name)
1465	#define PGM_BTH_NAME_PAE_REAL(name) PGM_CTX(pgm,BthPAEReal##name)
1466	#define PGM_BTH_NAME_PAE_PROT(name) PGM_CTX(pgm,BthPAEProt##name)
1467	#define PGM_BTH_NAME_PAE_32BIT(name) PGM_CTX(pgm,BthPAE32Bit##name)
1468	#define PGM_BTH_NAME_PAE_PAE(name) PGM_CTX(pgm,BthPAEPAE##name)
1469	#define PGM_BTH_NAME_AMD64_REAL(name) PGM_CTX(pgm,BthAMD64Real##name)
1470	#define PGM_BTH_NAME_AMD64_PROT(name) PGM_CTX(pgm,BthAMD64Prot##name)
1471	#define PGM_BTH_NAME_AMD64_AMD64(name) PGM_CTX(pgm,BthAMD64AMD64##name)
1472	#define PGM_BTH_NAME_GC_32BIT_REAL_STR(name) "pgmGCBth32BitReal" #name
1473	#define PGM_BTH_NAME_GC_32BIT_PROT_STR(name) "pgmGCBth32BitProt" #name
1474	#define PGM_BTH_NAME_GC_32BIT_32BIT_STR(name) "pgmGCBth32Bit32Bit" #name
1475	#define PGM_BTH_NAME_GC_PAE_REAL_STR(name) "pgmGCBthPAEReal" #name
1476	#define PGM_BTH_NAME_GC_PAE_PROT_STR(name) "pgmGCBthPAEProt" #name
1477	#define PGM_BTH_NAME_GC_PAE_32BIT_STR(name) "pgmGCBthPAE32Bit" #name
1478	#define PGM_BTH_NAME_GC_PAE_PAE_STR(name) "pgmGCBthPAEPAE" #name
1479	#define PGM_BTH_NAME_GC_AMD64_REAL_STR(name) "pgmGCBthAMD64Real" #name
1480	#define PGM_BTH_NAME_GC_AMD64_PROT_STR(name) "pgmGCBthAMD64Prot" #name
1481	#define PGM_BTH_NAME_GC_AMD64_AMD64_STR(name) "pgmGCBthAMD64AMD64" #name
1482	#define PGM_BTH_NAME_R0_32BIT_REAL_STR(name) "pgmR0Bth32BitReal" #name
1483	#define PGM_BTH_NAME_R0_32BIT_PROT_STR(name) "pgmR0Bth32BitProt" #name
1484	#define PGM_BTH_NAME_R0_32BIT_32BIT_STR(name) "pgmR0Bth32Bit32Bit" #name
1485	#define PGM_BTH_NAME_R0_PAE_REAL_STR(name) "pgmR0BthPAEReal" #name
1486	#define PGM_BTH_NAME_R0_PAE_PROT_STR(name) "pgmR0BthPAEProt" #name
1487	#define PGM_BTH_NAME_R0_PAE_32BIT_STR(name) "pgmR0BthPAE32Bit" #name
1488	#define PGM_BTH_NAME_R0_PAE_PAE_STR(name) "pgmR0BthPAEPAE" #name
1489	#define PGM_BTH_NAME_R0_AMD64_REAL_STR(name) "pgmR0BthAMD64Real" #name
1490	#define PGM_BTH_NAME_R0_AMD64_PROT_STR(name) "pgmR0BthAMD64Prot" #name
1491	#define PGM_BTH_NAME_R0_AMD64_AMD64_STR(name) "pgmR0BthAMD64AMD64" #name
1492	#define PGM_BTH_DECL(type, name) PGM_CTX_DECL(type) PGM_BTH_NAME(name)
1493	#define PGM_BTH_PFN(name, pVM) ((pVM)->pgm.s.PGM_CTX(pfn,Bth##name))
1494	/** @} */
1495
1496	/**
1497	* Data for each paging mode.
1498	*/
1499	typedef struct PGMMODEDATA
1500	{
1501	/** The guest mode type. */
1502	uint32_t uGstType;
1503	/** The shadow mode type. */
1504	uint32_t uShwType;
1505
1506	/** @name Function pointers for Shadow paging.
1507	* @{
1508	*/
1509	DECLR3CALLBACKMEMBER(int, pfnR3ShwRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1510	DECLR3CALLBACKMEMBER(int, pfnR3ShwExit,(PVM pVM));
1511	DECLR3CALLBACKMEMBER(int, pfnR3ShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1512	DECLR3CALLBACKMEMBER(int, pfnR3ShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1513	DECLR3CALLBACKMEMBER(int, pfnR3ShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1514	DECLR3CALLBACKMEMBER(int, pfnR3ShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1515	DECLR3CALLBACKMEMBER(int, pfnR3ShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1516
1517	DECLGCCALLBACKMEMBER(int, pfnGCShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1518	DECLGCCALLBACKMEMBER(int, pfnGCShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1519	DECLGCCALLBACKMEMBER(int, pfnGCShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1520	DECLGCCALLBACKMEMBER(int, pfnGCShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1521	DECLGCCALLBACKMEMBER(int, pfnGCShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1522
1523	DECLR0CALLBACKMEMBER(int, pfnR0ShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1524	DECLR0CALLBACKMEMBER(int, pfnR0ShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1525	DECLR0CALLBACKMEMBER(int, pfnR0ShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1526	DECLR0CALLBACKMEMBER(int, pfnR0ShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1527	DECLR0CALLBACKMEMBER(int, pfnR0ShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1528	/** @} */
1529
1530	/** @name Function pointers for Guest paging.
1531	* @{
1532	*/
1533	DECLR3CALLBACKMEMBER(int, pfnR3GstRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1534	DECLR3CALLBACKMEMBER(int, pfnR3GstExit,(PVM pVM));
1535	DECLR3CALLBACKMEMBER(int, pfnR3GstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1536	DECLR3CALLBACKMEMBER(int, pfnR3GstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1537	DECLR3CALLBACKMEMBER(int, pfnR3GstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1538	DECLR3CALLBACKMEMBER(int, pfnR3GstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1539	DECLR3CALLBACKMEMBER(int, pfnR3GstUnmonitorCR3,(PVM pVM));
1540	DECLR3CALLBACKMEMBER(int, pfnR3GstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1541	DECLR3CALLBACKMEMBER(int, pfnR3GstUnmapCR3,(PVM pVM));
1542	R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnR3GstWriteHandlerCR3;
1543	R3PTRTYPE(const char *) pszR3GstWriteHandlerCR3;
1544	R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnR3GstPAEWriteHandlerCR3;
1545	R3PTRTYPE(const char *) pszR3GstPAEWriteHandlerCR3;
1546
1547	DECLGCCALLBACKMEMBER(int, pfnGCGstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1548	DECLGCCALLBACKMEMBER(int, pfnGCGstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1549	DECLGCCALLBACKMEMBER(int, pfnGCGstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1550	DECLGCCALLBACKMEMBER(int, pfnGCGstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1551	DECLGCCALLBACKMEMBER(int, pfnGCGstUnmonitorCR3,(PVM pVM));
1552	DECLGCCALLBACKMEMBER(int, pfnGCGstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1553	DECLGCCALLBACKMEMBER(int, pfnGCGstUnmapCR3,(PVM pVM));
1554	GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnGCGstWriteHandlerCR3;
1555	GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnGCGstPAEWriteHandlerCR3;
1556
1557	DECLR0CALLBACKMEMBER(int, pfnR0GstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1558	DECLR0CALLBACKMEMBER(int, pfnR0GstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1559	DECLR0CALLBACKMEMBER(int, pfnR0GstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1560	DECLR0CALLBACKMEMBER(int, pfnR0GstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1561	DECLR0CALLBACKMEMBER(int, pfnR0GstUnmonitorCR3,(PVM pVM));
1562	DECLR0CALLBACKMEMBER(int, pfnR0GstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1563	DECLR0CALLBACKMEMBER(int, pfnR0GstUnmapCR3,(PVM pVM));
1564	R0PTRTYPE(PFNPGMGCPHYSHANDLER) pfnR0GstWriteHandlerCR3;
1565	R0PTRTYPE(PFNPGMGCPHYSHANDLER) pfnR0GstPAEWriteHandlerCR3;
1566	/** @} */
1567
1568	/** @name Function pointers for Both Shadow and Guest paging.
1569	* @{
1570	*/
1571	DECLR3CALLBACKMEMBER(int, pfnR3BthRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1572	DECLR3CALLBACKMEMBER(int, pfnR3BthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1573	DECLR3CALLBACKMEMBER(int, pfnR3BthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1574	DECLR3CALLBACKMEMBER(int, pfnR3BthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
1575	DECLR3CALLBACKMEMBER(int, pfnR3BthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
1576	DECLR3CALLBACKMEMBER(int, pfnR3BthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
1577	DECLR3CALLBACKMEMBER(int, pfnR3BthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
1578	#ifdef VBOX_STRICT
1579	DECLR3CALLBACKMEMBER(unsigned, pfnR3BthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
1580	#endif
1581
1582	DECLGCCALLBACKMEMBER(int, pfnGCBthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1583	DECLGCCALLBACKMEMBER(int, pfnGCBthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1584	DECLGCCALLBACKMEMBER(int, pfnGCBthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
1585	DECLGCCALLBACKMEMBER(int, pfnGCBthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
1586	DECLGCCALLBACKMEMBER(int, pfnGCBthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
1587	DECLGCCALLBACKMEMBER(int, pfnGCBthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
1588	#ifdef VBOX_STRICT
1589	DECLGCCALLBACKMEMBER(unsigned, pfnGCBthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
1590	#endif
1591
1592	DECLR0CALLBACKMEMBER(int, pfnR0BthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1593	DECLR0CALLBACKMEMBER(int, pfnR0BthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1594	DECLR0CALLBACKMEMBER(int, pfnR0BthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
1595	DECLR0CALLBACKMEMBER(int, pfnR0BthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
1596	DECLR0CALLBACKMEMBER(int, pfnR0BthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
1597	DECLR0CALLBACKMEMBER(int, pfnR0BthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
1598	#ifdef VBOX_STRICT
1599	DECLR0CALLBACKMEMBER(unsigned, pfnR0BthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
1600	#endif
1601	/** @} */
1602	} PGMMODEDATA, *PPGMMODEDATA;
1603
1604
1605
1606	/**
1607	* Converts a PGM pointer into a VM pointer.
1608	* @returns Pointer to the VM structure the PGM is part of.
1609	* @param pPGM Pointer to PGM instance data.
1610	*/
1611	#define PGM2VM(pPGM) ( (PVM)((char*)pPGM - pPGM->offVM) )
1612
1613	/**
1614	* PGM Data (part of VM)
1615	*/
1616	typedef struct PGM
1617	{
1618	/** Offset to the VM structure. */
1619	RTINT offVM;
1620
1621	/*
1622	* This will be redefined at least two more times before we're done, I'm sure.
1623	* The current code is only to get on with the coding.
1624	* - 2004-06-10: initial version, bird.
1625	* - 2004-07-02: 1st time, bird.
1626	* - 2004-10-18: 2nd time, bird.
1627	* - 2005-07-xx: 3rd time, bird.
1628	*/
1629
1630	/** Pointer to the page table entries for the dynamic page mapping area - GCPtr. */
1631	GCPTRTYPE(PX86PTE) paDynPageMap32BitPTEsGC;
1632	/** Pointer to the page table entries for the dynamic page mapping area - GCPtr. */
1633	GCPTRTYPE(PX86PTEPAE) paDynPageMapPaePTEsGC;
1634
1635	/** The host paging mode. (This is what SUPLib reports.) */
1636	SUPPAGINGMODE enmHostMode;
1637	/** The shadow paging mode. */
1638	PGMMODE enmShadowMode;
1639	/** The guest paging mode. */
1640	PGMMODE enmGuestMode;
1641
1642	/** The current physical address representing in the guest CR3 register. */
1643	RTGCPHYS GCPhysCR3;
1644	/** Pointer to the 5 page CR3 content mapping.
1645	* The first page is always the CR3 (in some form) while the 4 other pages
1646	* are used of the PDs in PAE mode. */
1647	RTGCPTR GCPtrCR3Mapping;
1648	/** The physical address of the currently monitored guest CR3 page.
1649	* When this value is NIL_RTGCPHYS no page is being monitored. */
1650	RTGCPHYS GCPhysGstCR3Monitored;
1651	#if HC_ARCH_BITS == 64 \|\| GC_ARCH_BITS == 64
1652	RTGCPHYS GCPhysPadding0; /*< alignment padding. /
1653	#endif
1654
1655	/** @name 32-bit Guest Paging.
1656	* @{ */
1657	/** The guest's page directory, HC pointer. */
1658	R3R0PTRTYPE(PVBOXPD) pGuestPDHC;
1659	/** The guest's page directory, static GC mapping. */
1660	GCPTRTYPE(PVBOXPD) pGuestPDGC;
1661	/** @} */
1662
1663	/** @name PAE Guest Paging.
1664	* @{ */
1665	/** The guest's page directory pointer table, static GC mapping. */
1666	GCPTRTYPE(PX86PDPTR) pGstPaePDPTRGC;
1667	/** The guest's page directory pointer table, HC pointer. */
1668	R3R0PTRTYPE(PX86PDPTR) pGstPaePDPTRHC;
1669	/** The guest's page directories, HC pointers.
1670	* These are individual pointers and doesn't have to be adjecent.
1671	* These doesn't have to be update to date - use pgmGstGetPaePD() to access them. */
1672	R3R0PTRTYPE(PX86PDPAE) apGstPaePDsHC[4];
1673	/** The guest's page directories, static GC mapping.
1674	* Unlike the HC array the first entry can be accessed as a 2048 entry PD.
1675	* These doesn't have to be update to date - use pgmGstGetPaePD() to access them. */
1676	GCPTRTYPE(PX86PDPAE) apGstPaePDsGC[4];
1677	/** The physical addresses of the guest page directories (PAE) pointed to by apGstPagePDsHC/GC. */
1678	RTGCPHYS aGCPhysGstPaePDs[4];
1679	/** The physical addresses of the monitored guest page directories (PAE). */
1680	RTGCPHYS aGCPhysGstPaePDsMonitored[4];
1681	/** @} */
1682
1683
1684	/** @name 32-bit Shadow Paging
1685	* @{ */
1686	/** The 32-Bit PD - HC Ptr. */
1687	R3R0PTRTYPE(PX86PD) pHC32BitPD;
1688	/** The 32-Bit PD - GC Ptr. */
1689	GCPTRTYPE(PX86PD) pGC32BitPD;
1690	#if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32
1691	uint32_t u32Padding1; /*< alignment padding. /
1692	#endif
1693	/** The Physical Address (HC) of the 32-Bit PD. */
1694	RTHCPHYS HCPhys32BitPD;
1695	/** @} */
1696
1697	/** @name PAE Shadow Paging
1698	* @{ */
1699	/** The four PDs for the low 4GB - HC Ptr.
1700	* Even though these are 4 pointers, what they point at is a single table.
1701	* Thus, it's possible to walk the 2048 entries starting where apHCPaePDs[0] points. */
1702	R3R0PTRTYPE(PX86PDPAE) apHCPaePDs[4];
1703	/** The four PDs for the low 4GB - GC Ptr.
1704	* Same kind of mapping as apHCPaePDs. */
1705	GCPTRTYPE(PX86PDPAE) apGCPaePDs[4];
1706	/** The Physical Address (HC) of the four PDs for the low 4GB.
1707	* These are NOT 4 contiguous pages. */
1708	RTHCPHYS aHCPhysPaePDs[4];
1709	/** The PAE PDPTR - HC Ptr. */
1710	R3R0PTRTYPE(PX86PDPTR) pHCPaePDPTR;
1711	/** The Physical Address (HC) of the PAE PDPTR. */
1712	RTHCPHYS HCPhysPaePDPTR;
1713	/** The PAE PDPTR - GC Ptr. */
1714	GCPTRTYPE(PX86PDPTR) pGCPaePDPTR;
1715	/** @} */
1716
1717	/** @name AMD64 Shadow Paging
1718	* Extends PAE Paging.
1719	* @{ */
1720	/** The Page Map Level 4 table - HC Ptr. */
1721	GCPTRTYPE(PX86PML4) pGCPaePML4;
1722	/** The Page Map Level 4 table - GC Ptr. */
1723	R3R0PTRTYPE(PX86PML4) pHCPaePML4;
1724	/** The Physical Address (HC) of the Page Map Level 4 table. */
1725	RTHCPHYS HCPhysPaePML4;
1726	/** @}*/
1727
1728	/** @name Function pointers for Shadow paging.
1729	* @{
1730	*/
1731	DECLR3CALLBACKMEMBER(int, pfnR3ShwRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1732	DECLR3CALLBACKMEMBER(int, pfnR3ShwExit,(PVM pVM));
1733	DECLR3CALLBACKMEMBER(int, pfnR3ShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1734	DECLR3CALLBACKMEMBER(int, pfnR3ShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1735	DECLR3CALLBACKMEMBER(int, pfnR3ShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1736	DECLR3CALLBACKMEMBER(int, pfnR3ShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1737	DECLR3CALLBACKMEMBER(int, pfnR3ShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1738
1739	DECLGCCALLBACKMEMBER(int, pfnGCShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1740	DECLGCCALLBACKMEMBER(int, pfnGCShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1741	DECLGCCALLBACKMEMBER(int, pfnGCShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1742	DECLGCCALLBACKMEMBER(int, pfnGCShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1743	DECLGCCALLBACKMEMBER(int, pfnGCShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1744	#if GC_ARCH_BITS == 32 && HC_ARCH_BITS == 64
1745	RTGCPTR alignment0; /*< structure size alignment. /
1746	#endif
1747
1748	DECLR0CALLBACKMEMBER(int, pfnR0ShwGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys));
1749	DECLR0CALLBACKMEMBER(int, pfnR0ShwModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1750	DECLR0CALLBACKMEMBER(int, pfnR0ShwGetPDEByIndex,(PVM pVM, uint32_t iPD, PX86PDEPAE pPde));
1751	DECLR0CALLBACKMEMBER(int, pfnR0ShwSetPDEByIndex,(PVM pVM, uint32_t iPD, X86PDEPAE Pde));
1752	DECLR0CALLBACKMEMBER(int, pfnR0ShwModifyPDEByIndex,(PVM pVM, uint32_t iPD, uint64_t fFlags, uint64_t fMask));
1753
1754	/** @} */
1755
1756	/** @name Function pointers for Guest paging.
1757	* @{
1758	*/
1759	DECLR3CALLBACKMEMBER(int, pfnR3GstRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1760	DECLR3CALLBACKMEMBER(int, pfnR3GstExit,(PVM pVM));
1761	DECLR3CALLBACKMEMBER(int, pfnR3GstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1762	DECLR3CALLBACKMEMBER(int, pfnR3GstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1763	DECLR3CALLBACKMEMBER(int, pfnR3GstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1764	DECLR3CALLBACKMEMBER(int, pfnR3GstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1765	DECLR3CALLBACKMEMBER(int, pfnR3GstUnmonitorCR3,(PVM pVM));
1766	DECLR3CALLBACKMEMBER(int, pfnR3GstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1767	DECLR3CALLBACKMEMBER(int, pfnR3GstUnmapCR3,(PVM pVM));
1768	R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnR3GstWriteHandlerCR3;
1769	R3PTRTYPE(const char *) pszR3GstWriteHandlerCR3;
1770	R3PTRTYPE(PFNPGMR3PHYSHANDLER) pfnR3GstPAEWriteHandlerCR3;
1771	R3PTRTYPE(const char *) pszR3GstPAEWriteHandlerCR3;
1772
1773	DECLGCCALLBACKMEMBER(int, pfnGCGstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1774	DECLGCCALLBACKMEMBER(int, pfnGCGstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1775	DECLGCCALLBACKMEMBER(int, pfnGCGstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1776	DECLGCCALLBACKMEMBER(int, pfnGCGstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1777	DECLGCCALLBACKMEMBER(int, pfnGCGstUnmonitorCR3,(PVM pVM));
1778	DECLGCCALLBACKMEMBER(int, pfnGCGstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1779	DECLGCCALLBACKMEMBER(int, pfnGCGstUnmapCR3,(PVM pVM));
1780	GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnGCGstWriteHandlerCR3;
1781	GCPTRTYPE(PFNPGMGCPHYSHANDLER) pfnGCGstPAEWriteHandlerCR3;
1782	#if GC_ARCH_BITS == 32 && HC_ARCH_BITS == 64
1783	RTGCPTR alignment3; /*< structure size alignment. /
1784	#endif
1785
1786	DECLR0CALLBACKMEMBER(int, pfnR0GstGetPage,(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys));
1787	DECLR0CALLBACKMEMBER(int, pfnR0GstModifyPage,(PVM pVM, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask));
1788	DECLR0CALLBACKMEMBER(int, pfnR0GstGetPDE,(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPde));
1789	DECLR0CALLBACKMEMBER(int, pfnR0GstMonitorCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1790	DECLR0CALLBACKMEMBER(int, pfnR0GstUnmonitorCR3,(PVM pVM));
1791	DECLR0CALLBACKMEMBER(int, pfnR0GstMapCR3,(PVM pVM, RTGCPHYS GCPhysCR3));
1792	DECLR0CALLBACKMEMBER(int, pfnR0GstUnmapCR3,(PVM pVM));
1793	R0PTRTYPE(PFNPGMGCPHYSHANDLER) pfnR0GstWriteHandlerCR3;
1794	R0PTRTYPE(PFNPGMGCPHYSHANDLER) pfnR0GstPAEWriteHandlerCR3;
1795	/** @} */
1796
1797	/** @name Function pointers for Both Shadow and Guest paging.
1798	* @{
1799	*/
1800	DECLR3CALLBACKMEMBER(int, pfnR3BthRelocate,(PVM pVM, RTGCUINTPTR offDelta));
1801	DECLR3CALLBACKMEMBER(int, pfnR3BthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1802	DECLR3CALLBACKMEMBER(int, pfnR3BthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1803	DECLR3CALLBACKMEMBER(int, pfnR3BthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
1804	DECLR3CALLBACKMEMBER(int, pfnR3BthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
1805	DECLR3CALLBACKMEMBER(int, pfnR3BthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
1806	DECLR3CALLBACKMEMBER(int, pfnR3BthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
1807	DECLR3CALLBACKMEMBER(unsigned, pfnR3BthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
1808
1809	DECLR0CALLBACKMEMBER(int, pfnR0BthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1810	DECLR0CALLBACKMEMBER(int, pfnR0BthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1811	DECLR0CALLBACKMEMBER(int, pfnR0BthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
1812	DECLR0CALLBACKMEMBER(int, pfnR0BthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
1813	DECLR0CALLBACKMEMBER(int, pfnR0BthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
1814	DECLR0CALLBACKMEMBER(int, pfnR0BthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
1815	DECLR0CALLBACKMEMBER(unsigned, pfnR0BthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
1816
1817	DECLGCCALLBACKMEMBER(int, pfnGCBthTrap0eHandler,(PVM pVM, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault));
1818	DECLGCCALLBACKMEMBER(int, pfnGCBthInvalidatePage,(PVM pVM, RTGCPTR GCPtrPage));
1819	DECLGCCALLBACKMEMBER(int, pfnGCBthSyncCR3,(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4, bool fGlobal));
1820	DECLGCCALLBACKMEMBER(int, pfnGCBthSyncPage,(PVM pVM, VBOXPDE PdeSrc, RTGCUINTPTR GCPtrPage, unsigned cPages, unsigned uError));
1821	DECLGCCALLBACKMEMBER(int, pfnGCBthPrefetchPage,(PVM pVM, RTGCUINTPTR GCPtrPage));
1822	DECLGCCALLBACKMEMBER(int, pfnGCBthVerifyAccessSyncPage,(PVM pVM, RTGCUINTPTR GCPtrPage, unsigned fFlags, unsigned uError));
1823	DECLGCCALLBACKMEMBER(unsigned, pfnGCBthAssertCR3,(PVM pVM, uint32_t cr3, uint32_t cr4, RTGCUINTPTR GCPtr, RTGCUINTPTR cb));
1824	#if GC_ARCH_BITS == 32 && HC_ARCH_BITS == 64
1825	RTGCPTR alignment2; /*< structure size alignment. /
1826	#endif
1827	/** @} */
1828
1829	/** Pointer to SHW+GST mode data (function pointers).
1830	* The index into this table is made up from */
1831	R3PTRTYPE(PPGMMODEDATA) paModeData;
1832
1833	/** Pointer to the list of RAM ranges (Phys GC -> Phys HC conversion) - for R3.
1834	* This is sorted by physical address and contains no overlapping ranges. */
1835	R3PTRTYPE(PPGMRAMRANGE) pRamRangesR3;
1836	/** R0 pointer corresponding to PGM::pRamRangesR3. */
1837	R0PTRTYPE(PPGMRAMRANGE) pRamRangesR0;
1838	/** GC pointer corresponding to PGM::pRamRangesR3. */
1839	GCPTRTYPE(PPGMRAMRANGE) pRamRangesGC;
1840	/** The configured RAM size. */
1841	RTUINT cbRamSize;
1842
1843	/** Pointer to the list of ROM ranges - for R3.
1844	* This is sorted by physical address and contains no overlapping ranges. */
1845	R3PTRTYPE(PPGMROMRANGE) pRomRangesR3;
1846	/** R0 pointer corresponding to PGM::pRomRangesR3. */
1847	R0PTRTYPE(PPGMRAMRANGE) pRomRangesR0;
1848	/** GC pointer corresponding to PGM::pRomRangesR3. */
1849	GCPTRTYPE(PPGMRAMRANGE) pRomRangesGC;
1850	/** Alignment padding. */
1851	RTGCPTR GCPtrPadding2;
1852
1853	/** PGM offset based trees - HC Ptr. */
1854	R3R0PTRTYPE(PPGMTREES) pTreesHC;
1855	/** PGM offset based trees - GC Ptr. */
1856	GCPTRTYPE(PPGMTREES) pTreesGC;
1857
1858	/** Linked list of GC mappings - for GC.
1859	* The list is sorted ascending on address.
1860	*/
1861	GCPTRTYPE(PPGMMAPPING) pMappingsGC;
1862	/** Linked list of GC mappings - for HC.
1863	* The list is sorted ascending on address.
1864	*/
1865	R3PTRTYPE(PPGMMAPPING) pMappingsR3;
1866	/** Linked list of GC mappings - for R0.
1867	* The list is sorted ascending on address.
1868	*/
1869	R0PTRTYPE(PPGMMAPPING) pMappingsR0;
1870
1871	/** If set no conflict checks are required. (boolean) */
1872	bool fMappingsFixed;
1873	/** If set, then no mappings are put into the shadow page table. (boolean) */
1874	bool fDisableMappings;
1875	/** Size of fixed mapping */
1876	uint32_t cbMappingFixed;
1877	/** Base address (GC) of fixed mapping */
1878	RTGCPTR GCPtrMappingFixed;
1879	#if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32
1880	uint32_t u32Padding0; /*< alignment padding. /
1881	#endif
1882
1883
1884	/** @name Intermediate Context
1885	* @{ */
1886	/** Pointer to the intermediate page directory - Normal. */
1887	R3PTRTYPE(PX86PD) pInterPD;
1888	/** Pointer to the intermedate page tables - Normal.
1889	* There are two page tables, one for the identity mapping and one for
1890	* the host context mapping (of the core code). */
1891	R3PTRTYPE(PX86PT) apInterPTs[2];
1892	/** Pointer to the intermedate page tables - PAE. */
1893	R3PTRTYPE(PX86PTPAE) apInterPaePTs[2];
1894	/** Pointer to the intermedate page directory - PAE. */
1895	R3PTRTYPE(PX86PDPAE) apInterPaePDs[4];
1896	/** Pointer to the intermedate page directory - PAE. */
1897	R3PTRTYPE(PX86PDPTR) pInterPaePDPTR;
1898	/** Pointer to the intermedate page-map level 4 - AMD64. */
1899	R3PTRTYPE(PX86PML4) pInterPaePML4;
1900	/** Pointer to the intermedate page directory - AMD64. */
1901	R3PTRTYPE(PX86PDPTR) pInterPaePDPTR64;
1902	/** The Physical Address (HC) of the intermediate Page Directory - Normal. */
1903	RTHCPHYS HCPhysInterPD;
1904	/** The Physical Address (HC) of the intermediate Page Directory Pointer Table - PAE. */
1905	RTHCPHYS HCPhysInterPaePDPTR;
1906	/** The Physical Address (HC) of the intermediate Page Map Level 4 table - AMD64. */
1907	RTHCPHYS HCPhysInterPaePML4;
1908	/** @} */
1909
1910	/** Base address of the dynamic page mapping area.
1911	* The array is MM_HYPER_DYNAMIC_SIZE bytes big.
1912	*/
1913	GCPTRTYPE(uint8_t *) pbDynPageMapBaseGC;
1914	/** The index of the last entry used in the dynamic page mapping area. */
1915	RTUINT iDynPageMapLast;
1916	/** Cache containing the last entries in the dynamic page mapping area.
1917	* The cache size is covering half of the mapping area. */
1918	RTHCPHYS aHCPhysDynPageMapCache[MM_HYPER_DYNAMIC_SIZE >> (PAGE_SHIFT + 1)];
1919
1920	/** A20 gate mask.
1921	* Our current approach to A20 emulation is to let REM do it and don't bother
1922	* anywhere else. The interesting Guests will be operating with it enabled anyway.
1923	* But whould need arrise, we'll subject physical addresses to this mask. */
1924	RTGCPHYS GCPhysA20Mask;
1925	/** A20 gate state - boolean! */
1926	RTUINT fA20Enabled;
1927
1928	/** What needs syncing (PGM_SYNC_*).
1929	* This is used to queue operations for PGMSyncCR3, PGMInvalidatePage,
1930	* PGMFlushTLB, and PGMR3Load. */
1931	RTUINT fSyncFlags;
1932
1933	#if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32
1934	RTUINT uPadding3; /*< alignment padding. /
1935	#endif
1936	/** PGM critical section.
1937	* This protects the physical & virtual access handlers, ram ranges,
1938	* and the page flag updating (some of it anyway).
1939	*/
1940	PDMCRITSECT CritSect;
1941
1942	/** Shadow Page Pool - HC Ptr. */
1943	R3R0PTRTYPE(PPGMPOOL) pPoolHC;
1944	/** Shadow Page Pool - GC Ptr. */
1945	GCPTRTYPE(PPGMPOOL) pPoolGC;
1946
1947	/** We're not in a state which permits writes to guest memory.
1948	* (Only used in strict builds.) */
1949	bool fNoMorePhysWrites;
1950
1951	/** Flush the cache on the next access. */
1952	bool fPhysCacheFlushPending;
1953	/** @todo r=bird: Fix member names!*/
1954	/** PGMPhysRead cache */
1955	PGMPHYSCACHE pgmphysreadcache;
1956	/** PGMPhysWrite cache */
1957	PGMPHYSCACHE pgmphyswritecache;
1958
1959	/**
1960	* Data associated with managing the ring-3 mappings of the allocation chunks.
1961	*/
1962	struct
1963	{
1964	/** The chunk tree, ordered by chunk id. */
1965	R3R0PTRTYPE(PAVLU32NODECORE) pTree;
1966	/** The chunk mapping TLB. */
1967	PGMCHUNKR3MAPTLB Tlb;
1968	/** The number of mapped chunks. */
1969	uint32_t c;
1970	/** The maximum number of mapped chunks.
1971	* @cfgm PGM/MaxRing3Chunks */
1972	uint32_t cMax;
1973	/** The chunk age tree, ordered by ageing sequence number. */
1974	R3PTRTYPE(PAVLLU32NODECORE) pAgeTree;
1975	/** The current time. */
1976	uint32_t iNow;
1977	/** Number of pgmR3PhysChunkFindUnmapCandidate calls left to the next ageing. */
1978	uint32_t AgeingCountdown;
1979	} ChunkR3Map;
1980
1981	/**
1982	* The page mapping TLB for ring-3 and (for the time being) ring-0.
1983	*/
1984	PGMPAGER3MAPTLB PhysTlbHC;
1985
1986	/** @name The zero page.
1987	* @{ */
1988	/** The host physical address of the zero page. */
1989	RTHCPHYS HCPhysZeroPg;
1990	/** The ring-3 mapping of the zero page. */
1991	RTR3PTR pvZeroPgR3;
1992	/** The ring-0 mapping of the zero page. */
1993	RTR0PTR pvZeroPgR0;
1994	/** The GC mapping of the zero page. */
1995	RTGCPTR pvZeroPgGC;
1996	#if GC_ARCH_BITS != 32
1997	uint32_t u32ZeroAlignment; /*< Alignment padding. /
1998	#endif
1999	/** @}*/
2000
2001	/** The number of handy pages. */
2002	uint32_t cHandyPages;
2003	/**
2004	* Array of handy pages.
2005	*
2006	* This array is used in a two way communication between pgmPhysAllocPage
2007	* and GMMR0AllocateHandyPages, with PGMR3PhysAllocateHandyPages serving as
2008	* an intermediary.
2009	*
2010	* The size of this array is important, see pgmPhysEnsureHandyPage for details.
2011	* (The current size of 32 pages, means 128 KB of handy memory.)
2012	*/
2013	GMMPAGEDESC aHandyPages[32];
2014
2015	/** @name Release Statistics
2016	* @{ */
2017	uint32_t cAllPages; /*< The total number of pages. (Should be Private + Shared + Zero.) /
2018	uint32_t cPrivatePages; /*< The number of private pages. /
2019	uint32_t cSharedPages; /*< The number of shared pages. /
2020	uint32_t cZeroPages; /*< The number of zero backed pages. /
2021	/** The number of times the guest has switched mode since last reset or statistics reset. */
2022	STAMCOUNTER cGuestModeChanges;
2023	/** @} */
2024
2025	#ifdef VBOX_WITH_STATISTICS
2026	/** GC: Which statistic this \#PF should be attributed to. */
2027	GCPTRTYPE(PSTAMPROFILE) pStatTrap0eAttributionGC;
2028	RTGCPTR padding0;
2029	/** HC: Which statistic this \#PF should be attributed to. */
2030	R3R0PTRTYPE(PSTAMPROFILE) pStatTrap0eAttributionHC;
2031	RTHCPTR padding1;
2032	STAMPROFILE StatGCTrap0e; /*< GC: PGMGCTrap0eHandler() profiling. /
2033	STAMPROFILE StatTrap0eCSAM; /*< Profiling of the Trap0eHandler body when the cause is CSAM. /
2034	STAMPROFILE StatTrap0eDirtyAndAccessedBits; /*< Profiling of the Trap0eHandler body when the cause is dirty and/or accessed bit emulation. /
2035	STAMPROFILE StatTrap0eGuestTrap; /*< Profiling of the Trap0eHandler body when the cause is a guest trap. /
2036	STAMPROFILE StatTrap0eHndPhys; /*< Profiling of the Trap0eHandler body when the cause is a physical handler. /
2037	STAMPROFILE StatTrap0eHndVirt; /*< Profiling of the Trap0eHandler body when the cause is a virtual handler. /
2038	STAMPROFILE StatTrap0eHndUnhandled; /*< Profiling of the Trap0eHandler body when the cause is access outside the monitored areas of a monitored page. /
2039	STAMPROFILE StatTrap0eMisc; /*< Profiling of the Trap0eHandler body when the cause is not known. /
2040	STAMPROFILE StatTrap0eOutOfSync; /*< Profiling of the Trap0eHandler body when the cause is an out-of-sync page. /
2041	STAMPROFILE StatTrap0eOutOfSyncHndPhys; /*< Profiling of the Trap0eHandler body when the cause is an out-of-sync physical handler page. /
2042	STAMPROFILE StatTrap0eOutOfSyncHndVirt; /*< Profiling of the Trap0eHandler body when the cause is an out-of-sync virtual handler page. /
2043	STAMPROFILE StatTrap0eOutOfSyncObsHnd; /*< Profiling of the Trap0eHandler body when the cause is an obsolete handler page. /
2044	STAMPROFILE StatTrap0eSyncPT; /*< Profiling of the Trap0eHandler body when the cause is lazy syncing of a PT. /
2045
2046	STAMCOUNTER StatTrap0eMapHandler; /*< Number of traps due to access handlers in mappings. /
2047	STAMCOUNTER StatGCTrap0eConflicts; /*< GC: The number of times \#PF was caused by an undetected conflict. /
2048
2049	STAMCOUNTER StatGCTrap0eUSNotPresentRead;
2050	STAMCOUNTER StatGCTrap0eUSNotPresentWrite;
2051	STAMCOUNTER StatGCTrap0eUSWrite;
2052	STAMCOUNTER StatGCTrap0eUSReserved;
2053	STAMCOUNTER StatGCTrap0eUSRead;
2054
2055	STAMCOUNTER StatGCTrap0eSVNotPresentRead;
2056	STAMCOUNTER StatGCTrap0eSVNotPresentWrite;
2057	STAMCOUNTER StatGCTrap0eSVWrite;
2058	STAMCOUNTER StatGCTrap0eSVReserved;
2059
2060	STAMCOUNTER StatGCTrap0eUnhandled;
2061	STAMCOUNTER StatGCTrap0eMap;
2062
2063	/** GC: PGMSyncPT() profiling. */
2064	STAMPROFILE StatGCSyncPT;
2065	/** GC: The number of times PGMSyncPT() needed to allocate page tables. */
2066	STAMCOUNTER StatGCSyncPTAlloc;
2067	/** GC: The number of times PGMSyncPT() detected conflicts. */
2068	STAMCOUNTER StatGCSyncPTConflict;
2069	/** GC: The number of times PGMSyncPT() failed. */
2070	STAMCOUNTER StatGCSyncPTFailed;
2071	/** GC: PGMGCInvalidatePage() profiling. */
2072	STAMPROFILE StatGCInvalidatePage;
2073	/** GC: The number of times PGMGCInvalidatePage() was called for a 4KB page. */
2074	STAMCOUNTER StatGCInvalidatePage4KBPages;
2075	/** GC: The number of times PGMGCInvalidatePage() was called for a 4MB page. */
2076	STAMCOUNTER StatGCInvalidatePage4MBPages;
2077	/** GC: The number of times PGMGCInvalidatePage() skipped a 4MB page. */
2078	STAMCOUNTER StatGCInvalidatePage4MBPagesSkip;
2079	/** GC: The number of times PGMGCInvalidatePage() was called for a not accessed page directory. */
2080	STAMCOUNTER StatGCInvalidatePagePDNAs;
2081	/** GC: The number of times PGMGCInvalidatePage() was called for a not present page directory. */
2082	STAMCOUNTER StatGCInvalidatePagePDNPs;
2083	/** GC: The number of times PGMGCInvalidatePage() was called for a page directory containing mappings (no conflict). */
2084	STAMCOUNTER StatGCInvalidatePagePDMappings;
2085	/** GC: The number of times PGMGCInvalidatePage() was called for an out of sync page directory. */
2086	STAMCOUNTER StatGCInvalidatePagePDOutOfSync;
2087	/** HC: The number of times PGMGCInvalidatePage() was skipped due to not present shw or pending pending SyncCR3. */
2088	STAMCOUNTER StatGCInvalidatePageSkipped;
2089	/** GC: The number of times user page is out of sync was detected in GC. */
2090	STAMCOUNTER StatGCPageOutOfSyncUser;
2091	/** GC: The number of times supervisor page is out of sync was detected in GC. */
2092	STAMCOUNTER StatGCPageOutOfSyncSupervisor;
2093	/** GC: The number of dynamic page mapping cache hits */
2094	STAMCOUNTER StatDynMapCacheMisses;
2095	/** GC: The number of dynamic page mapping cache misses */
2096	STAMCOUNTER StatDynMapCacheHits;
2097	/** GC: The number of times pgmGCGuestPDWriteHandler() was successfully called. */
2098	STAMCOUNTER StatGCGuestCR3WriteHandled;
2099	/** GC: The number of times pgmGCGuestPDWriteHandler() was called and we had to fall back to the recompiler. */
2100	STAMCOUNTER StatGCGuestCR3WriteUnhandled;
2101	/** GC: The number of times pgmGCGuestPDWriteHandler() was called and a conflict was detected. */
2102	STAMCOUNTER StatGCGuestCR3WriteConflict;
2103	/** GC: Number of out-of-sync handled pages. */
2104	STAMCOUNTER StatHandlersOutOfSync;
2105	/** GC: Number of traps due to physical access handlers. */
2106	STAMCOUNTER StatHandlersPhysical;
2107	/** GC: Number of traps due to virtual access handlers. */
2108	STAMCOUNTER StatHandlersVirtual;
2109	/** GC: Number of traps due to virtual access handlers found by physical address. */
2110	STAMCOUNTER StatHandlersVirtualByPhys;
2111	/** GC: Number of traps due to virtual access handlers found by virtual address (without proper physical flags). */
2112	STAMCOUNTER StatHandlersVirtualUnmarked;
2113	/** GC: Number of traps due to access outside range of monitored page(s). */
2114	STAMCOUNTER StatHandlersUnhandled;
2115
2116	/** GC: The number of times pgmGCGuestROMWriteHandler() was successfully called. */
2117	STAMCOUNTER StatGCGuestROMWriteHandled;
2118	/** GC: The number of times pgmGCGuestROMWriteHandler() was called and we had to fall back to the recompiler */
2119	STAMCOUNTER StatGCGuestROMWriteUnhandled;
2120
2121	/** HC: PGMR3InvalidatePage() profiling. */
2122	STAMPROFILE StatHCInvalidatePage;
2123	/** HC: The number of times PGMR3InvalidatePage() was called for a 4KB page. */
2124	STAMCOUNTER StatHCInvalidatePage4KBPages;
2125	/** HC: The number of times PGMR3InvalidatePage() was called for a 4MB page. */
2126	STAMCOUNTER StatHCInvalidatePage4MBPages;
2127	/** HC: The number of times PGMR3InvalidatePage() skipped a 4MB page. */
2128	STAMCOUNTER StatHCInvalidatePage4MBPagesSkip;
2129	/** HC: The number of times PGMR3InvalidatePage() was called for a not accessed page directory. */
2130	STAMCOUNTER StatHCInvalidatePagePDNAs;
2131	/** HC: The number of times PGMR3InvalidatePage() was called for a not present page directory. */
2132	STAMCOUNTER StatHCInvalidatePagePDNPs;
2133	/** HC: The number of times PGMR3InvalidatePage() was called for a page directory containing mappings (no conflict). */
2134	STAMCOUNTER StatHCInvalidatePagePDMappings;
2135	/** HC: The number of times PGMGCInvalidatePage() was called for an out of sync page directory. */
2136	STAMCOUNTER StatHCInvalidatePagePDOutOfSync;
2137	/** HC: The number of times PGMR3InvalidatePage() was skipped due to not present shw or pending pending SyncCR3. */
2138	STAMCOUNTER StatHCInvalidatePageSkipped;
2139	/** HC: PGMR3SyncPT() profiling. */
2140	STAMPROFILE StatHCSyncPT;
2141	/** HC: pgmr3SyncPTResolveConflict() profiling (includes the entire relocation). */
2142	STAMPROFILE StatHCResolveConflict;
2143	/** HC: Number of times PGMR3CheckMappingConflicts() detected a conflict. */
2144	STAMCOUNTER StatHCDetectedConflicts;
2145	/** HC: The total number of times pgmHCGuestPDWriteHandler() was called. */
2146	STAMCOUNTER StatHCGuestPDWrite;
2147	/** HC: The number of times pgmHCGuestPDWriteHandler() detected a conflict */
2148	STAMCOUNTER StatHCGuestPDWriteConflict;
2149
2150	/** HC: The number of pages marked not present for accessed bit emulation. */
2151	STAMCOUNTER StatHCAccessedPage;
2152	/** HC: The number of pages marked read-only for dirty bit tracking. */
2153	STAMCOUNTER StatHCDirtyPage;
2154	/** HC: The number of pages marked read-only for dirty bit tracking. */
2155	STAMCOUNTER StatHCDirtyPageBig;
2156	/** HC: The number of traps generated for dirty bit tracking. */
2157	STAMCOUNTER StatHCDirtyPageTrap;
2158	/** HC: The number of pages already dirty or readonly. */
2159	STAMCOUNTER StatHCDirtyPageSkipped;
2160
2161	/** GC: The number of pages marked not present for accessed bit emulation. */
2162	STAMCOUNTER StatGCAccessedPage;
2163	/** GC: The number of pages marked read-only for dirty bit tracking. */
2164	STAMCOUNTER StatGCDirtyPage;
2165	/** GC: The number of pages marked read-only for dirty bit tracking. */
2166	STAMCOUNTER StatGCDirtyPageBig;
2167	/** GC: The number of traps generated for dirty bit tracking. */
2168	STAMCOUNTER StatGCDirtyPageTrap;
2169	/** GC: The number of pages already dirty or readonly. */
2170	STAMCOUNTER StatGCDirtyPageSkipped;
2171	/** GC: The number of pages marked dirty because of write accesses. */
2172	STAMCOUNTER StatGCDirtiedPage;
2173	/** GC: The number of pages already marked dirty because of write accesses. */
2174	STAMCOUNTER StatGCPageAlreadyDirty;
2175	/** GC: The number of real pages faults during dirty bit tracking. */
2176	STAMCOUNTER StatGCDirtyTrackRealPF;
2177
2178	/** GC: Profiling of the PGMTrackDirtyBit() body */
2179	STAMPROFILE StatGCDirtyBitTracking;
2180	/** HC: Profiling of the PGMTrackDirtyBit() body */
2181	STAMPROFILE StatHCDirtyBitTracking;
2182
2183	/** GC: Profiling of the PGMGstModifyPage() body */
2184	STAMPROFILE StatGCGstModifyPage;
2185	/** HC: Profiling of the PGMGstModifyPage() body */
2186	STAMPROFILE StatHCGstModifyPage;
2187
2188	/** GC: The number of time we've marked a PD not present from SyncPage to virtualize the accessed bit. */
2189	STAMCOUNTER StatGCSyncPagePDNAs;
2190	/** GC: The number of time we've encountered an out-of-sync PD in SyncPage. */
2191	STAMCOUNTER StatGCSyncPagePDOutOfSync;
2192	/** HC: The number of time we've marked a PD not present from SyncPage to virtualize the accessed bit. */
2193	STAMCOUNTER StatHCSyncPagePDNAs;
2194	/** HC: The number of time we've encountered an out-of-sync PD in SyncPage. */
2195	STAMCOUNTER StatHCSyncPagePDOutOfSync;
2196
2197	STAMCOUNTER StatSynPT4kGC;
2198	STAMCOUNTER StatSynPT4kHC;
2199	STAMCOUNTER StatSynPT4MGC;
2200	STAMCOUNTER StatSynPT4MHC;
2201
2202	/** Profiling of the PGMFlushTLB() body. */
2203	STAMPROFILE StatFlushTLB;
2204	/** The number of times PGMFlushTLB was called with a new CR3, non-global. (switch) */
2205	STAMCOUNTER StatFlushTLBNewCR3;
2206	/** The number of times PGMFlushTLB was called with a new CR3, global. (switch) */
2207	STAMCOUNTER StatFlushTLBNewCR3Global;
2208	/** The number of times PGMFlushTLB was called with the same CR3, non-global. (flush) */
2209	STAMCOUNTER StatFlushTLBSameCR3;
2210	/** The number of times PGMFlushTLB was called with the same CR3, global. (flush) */
2211	STAMCOUNTER StatFlushTLBSameCR3Global;
2212
2213	STAMPROFILE StatGCSyncCR3; /*< GC: PGMSyncCR3() profiling. /
2214	STAMPROFILE StatGCSyncCR3Handlers; /*< GC: Profiling of the PGMSyncCR3() update handler section. /
2215	STAMPROFILE StatGCSyncCR3HandlerVirtualReset; /*< GC: Profiling of the virtual handler resets. /
2216	STAMPROFILE StatGCSyncCR3HandlerVirtualUpdate; /*< GC: Profiling of the virtual handler updates. /
2217	STAMCOUNTER StatGCSyncCR3Global; /*< GC: The number of global CR3 syncs. /
2218	STAMCOUNTER StatGCSyncCR3NotGlobal; /*< GC: The number of non-global CR3 syncs. /
2219	STAMCOUNTER StatGCSyncCR3DstFreed; /*< GC: The number of times we've had to free a shadow entry. /
2220	STAMCOUNTER StatGCSyncCR3DstFreedSrcNP; /*< GC: The number of times we've had to free a shadow entry for which the source entry was not present. /
2221	STAMCOUNTER StatGCSyncCR3DstNotPresent; /*< GC: The number of times we've encountered a not present shadow entry for a present guest entry. /
2222	STAMCOUNTER StatGCSyncCR3DstSkippedGlobalPD; /*< GC: The number of times a global page directory wasn't flushed. /
2223	STAMCOUNTER StatGCSyncCR3DstSkippedGlobalPT; /*< GC: The number of times a page table with only global entries wasn't flushed. /
2224	STAMCOUNTER StatGCSyncCR3DstCacheHit; /*< GC: The number of times we got some kind of cache hit on a page table. /
2225
2226	STAMPROFILE StatHCSyncCR3; /*< HC: PGMSyncCR3() profiling. /
2227	STAMPROFILE StatHCSyncCR3Handlers; /*< HC: Profiling of the PGMSyncCR3() update handler section. /
2228	STAMPROFILE StatHCSyncCR3HandlerVirtualReset; /*< HC: Profiling of the virtual handler resets. /
2229	STAMPROFILE StatHCSyncCR3HandlerVirtualUpdate; /*< HC: Profiling of the virtual handler updates. /
2230	STAMCOUNTER StatHCSyncCR3Global; /*< HC: The number of global CR3 syncs. /
2231	STAMCOUNTER StatHCSyncCR3NotGlobal; /*< HC: The number of non-global CR3 syncs. /
2232	STAMCOUNTER StatHCSyncCR3DstFreed; /*< HC: The number of times we've had to free a shadow entry. /
2233	STAMCOUNTER StatHCSyncCR3DstFreedSrcNP; /*< HC: The number of times we've had to free a shadow entry for which the source entry was not present. /
2234	STAMCOUNTER StatHCSyncCR3DstNotPresent; /*< HC: The number of times we've encountered a not present shadow entry for a present guest entry. /
2235	STAMCOUNTER StatHCSyncCR3DstSkippedGlobalPD; /*< HC: The number of times a global page directory wasn't flushed. /
2236	STAMCOUNTER StatHCSyncCR3DstSkippedGlobalPT; /*< HC: The number of times a page table with only global entries wasn't flushed. /
2237	STAMCOUNTER StatHCSyncCR3DstCacheHit; /*< HC: The number of times we got some kind of cache hit on a page table. /
2238
2239	/** GC: Profiling of pgmHandlerVirtualFindByPhysAddr. */
2240	STAMPROFILE StatVirtHandleSearchByPhysGC;
2241	/** HC: Profiling of pgmHandlerVirtualFindByPhysAddr. */
2242	STAMPROFILE StatVirtHandleSearchByPhysHC;
2243	/** HC: The number of times PGMR3HandlerPhysicalReset is called. */
2244	STAMCOUNTER StatHandlePhysicalReset;
2245
2246	STAMPROFILE StatCheckPageFault;
2247	STAMPROFILE StatLazySyncPT;
2248	STAMPROFILE StatMapping;
2249	STAMPROFILE StatOutOfSync;
2250	STAMPROFILE StatHandlers;
2251	STAMPROFILE StatEIPHandlers;
2252	STAMPROFILE StatHCPrefetch;
2253
2254	# ifdef PGMPOOL_WITH_GCPHYS_TRACKING
2255	/** The number of first time shadowings. */
2256	STAMCOUNTER StatTrackVirgin;
2257	/** The number of times switching to cRef2, i.e. the page is being shadowed by two PTs. */
2258	STAMCOUNTER StatTrackAliased;
2259	/** The number of times we're tracking using cRef2. */
2260	STAMCOUNTER StatTrackAliasedMany;
2261	/** The number of times we're hitting pages which has overflowed cRef2. */
2262	STAMCOUNTER StatTrackAliasedLots;
2263	/** The number of times the extent list grows to long. */
2264	STAMCOUNTER StatTrackOverflows;
2265	/** Profiling of SyncPageWorkerTrackDeref (expensive). */
2266	STAMPROFILE StatTrackDeref;
2267	# endif
2268
2269	/** Ring-3/0 page mapper TLB hits. */
2270	STAMCOUNTER StatPageHCMapTlbHits;
2271	/** Ring-3/0 page mapper TLB misses. */
2272	STAMCOUNTER StatPageHCMapTlbMisses;
2273	/** Ring-3/0 chunk mapper TLB hits. */
2274	STAMCOUNTER StatChunkR3MapTlbHits;
2275	/** Ring-3/0 chunk mapper TLB misses. */
2276	STAMCOUNTER StatChunkR3MapTlbMisses;
2277	/** Times a shared page has been replaced by a private one. */
2278	STAMCOUNTER StatPageReplaceShared;
2279	/** Times the zero page has been replaced by a private one. */
2280	STAMCOUNTER StatPageReplaceZero;
2281	/** The number of times we've executed GMMR3AllocateHandyPages. */
2282	STAMCOUNTER StatPageHandyAllocs;
2283
2284	/** Allocated mbs of guest ram */
2285	STAMCOUNTER StatDynRamTotal;
2286	/** Nr of pgmr3PhysGrowRange calls. */
2287	STAMCOUNTER StatDynRamGrow;
2288
2289	STAMCOUNTER StatGCTrap0ePD[X86_PG_ENTRIES];
2290	STAMCOUNTER StatGCSyncPtPD[X86_PG_ENTRIES];
2291	STAMCOUNTER StatGCSyncPagePD[X86_PG_ENTRIES];
2292	#endif
2293	} PGM, *PPGM;
2294
2295
2296	/** @name PGM::fSyncFlags Flags
2297	* @{
2298	*/
2299	/** Updates the MM_RAM_FLAGS_VIRTUAL_HANDLER page bit. */
2300	#define PGM_SYNC_UPDATE_PAGE_BIT_VIRTUAL RT_BIT(0)
2301	/** Always sync CR3. */
2302	#define PGM_SYNC_ALWAYS RT_BIT(1)
2303	/** Check monitoring on next CR3 (re)load and invalidate page. */
2304	#define PGM_SYNC_MONITOR_CR3 RT_BIT(2)
2305	/** Clear the page pool (a light weight flush). */
2306	#define PGM_SYNC_CLEAR_PGM_POOL RT_BIT(8)
2307	/** @} */
2308
2309
2310	__BEGIN_DECLS
2311
2312	PGMGCDECL(int) pgmGCGuestPDWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, void pvFault, RTGCPHYS GCPhysFault, void pvUser);
2313	PGMDECL(int) pgmPhysRomWriteHandler(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, void pvFault, RTGCPHYS GCPhysFault, void pvUser);
2314	PGMGCDECL(int) pgmCachePTWriteGC(PVM pVM, RTGCUINT uErrorCode, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser);
2315	int pgmR3SyncPTResolveConflict(PVM pVM, PPGMMAPPING pMapping, PVBOXPD pPDSrc, int iPDOld);
2316	PPGMMAPPING pgmGetMapping(PVM pVM, RTGCPTR GCPtr);
2317	void pgmR3MapRelocate(PVM pVM, PPGMMAPPING pMapping, int iPDOld, int iPDNew);
2318	int pgmR3ChangeMode(PVM pVM, PGMMODE enmGuestMode);
2319	int pgmLock(PVM pVM);
2320	void pgmUnlock(PVM pVM);
2321
2322	void pgmR3HandlerPhysicalUpdateAll(PVM pVM);
2323	int pgmHandlerVirtualFindByPhysAddr(PVM pVM, RTGCPHYS GCPhys, PPGMVIRTHANDLER ppVirt, unsigned piPage);
2324	DECLCALLBACK(int) pgmHandlerVirtualResetOne(PAVLROGCPTRNODECORE pNode, void *pvUser);
2325	#ifdef VBOX_STRICT
2326	void pgmHandlerVirtualDumpPhysPages(PVM pVM);
2327	#else
2328	# define pgmHandlerVirtualDumpPhysPages(a) do { } while (0)
2329	#endif
2330	DECLCALLBACK(void) pgmR3InfoHandlers(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
2331
2332
2333	int pgmPhysPageLoadIntoTlb(PPGM pPGM, RTGCPHYS GCPhys);
2334	int pgmPhysPageMakeWritable(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys);
2335	int pgmPhysPageMap(PVM pVM, PPGMPAGE pPage, RTGCPHYS GCPhys, PPPGMPAGEMAP ppMap, void **ppv);
2336	#ifdef IN_RING3
2337	int pgmR3PhysChunkMap(PVM pVM, uint32_t idChunk, PPPGMCHUNKR3MAP ppChunk);
2338	int pgmR3PhysRomReset(PVM pVM);
2339	#ifndef VBOX_WITH_NEW_PHYS_CODE
2340	int pgmr3PhysGrowRange(PVM pVM, RTGCPHYS GCPhys);
2341	#endif
2342
2343	int pgmR3PoolInit(PVM pVM);
2344	void pgmR3PoolRelocate(PVM pVM);
2345	void pgmR3PoolReset(PVM pVM);
2346
2347	#endif /* IN_RING3 */
2348	#ifdef IN_GC
2349	void *pgmGCPoolMapPage(PVM pVM, PPGMPOOLPAGE pPage);
2350	#endif
2351	int pgmPoolAlloc(PVM pVM, RTGCPHYS GCPhys, PGMPOOLKIND enmKind, uint16_t iUser, uint16_t iUserTable, PPPGMPOOLPAGE ppPage);
2352	PPGMPOOLPAGE pgmPoolGetPageByHCPhys(PVM pVM, RTHCPHYS HCPhys);
2353	void pgmPoolFree(PVM pVM, RTHCPHYS HCPhys, uint16_t iUser, uint16_t iUserTable);
2354	void pgmPoolFreeByPage(PPGMPOOL pPool, PPGMPOOLPAGE pPage, uint16_t iUser, uint16_t iUserTable);
2355	int pgmPoolFlushPage(PPGMPOOL pPool, PPGMPOOLPAGE pPage);
2356	void pgmPoolFlushAll(PVM pVM);
2357	void pgmPoolClearAll(PVM pVM);
2358	void pgmPoolTrackFlushGCPhysPT(PVM pVM, PPGMPAGE pPhysPage, uint16_t iShw, uint16_t cRefs);
2359	void pgmPoolTrackFlushGCPhysPTs(PVM pVM, PPGMPAGE pPhysPage, uint16_t iPhysExt);
2360	int pgmPoolTrackFlushGCPhysPTsSlow(PVM pVM, PPGMPAGE pPhysPage);
2361	PPGMPOOLPHYSEXT pgmPoolTrackPhysExtAlloc(PVM pVM, uint16_t *piPhysExt);
2362	void pgmPoolTrackPhysExtFree(PVM pVM, uint16_t iPhysExt);
2363	void pgmPoolTrackPhysExtFreeList(PVM pVM, uint16_t iPhysExt);
2364	uint16_t pgmPoolTrackPhysExtAddref(PVM pVM, uint16_t u16, uint16_t iShwPT);
2365	void pgmPoolTrackPhysExtDerefGCPhys(PPGMPOOL pPool, PPGMPOOLPAGE pPoolPage, PPGMPAGE pPhysPage);
2366	#ifdef PGMPOOL_WITH_MONITORING
2367	# ifdef IN_RING3
2368	void pgmPoolMonitorChainChanging(PPGMPOOL pPool, PPGMPOOLPAGE pPage, RTGCPHYS GCPhysFault, RTHCPTR pvAddress, PDISCPUSTATE pCpu);
2369	# else
2370	void pgmPoolMonitorChainChanging(PPGMPOOL pPool, PPGMPOOLPAGE pPage, RTGCPHYS GCPhysFault, RTGCPTR pvAddress, PDISCPUSTATE pCpu);
2371	# endif
2372	int pgmPoolMonitorChainFlush(PPGMPOOL pPool, PPGMPOOLPAGE pPage);
2373	void pgmPoolMonitorModifiedInsert(PPGMPOOL pPool, PPGMPOOLPAGE pPage);
2374	void pgmPoolMonitorModifiedClearAll(PVM pVM);
2375	int pgmPoolMonitorMonitorCR3(PPGMPOOL pPool, uint16_t idxRoot, RTGCPHYS GCPhysCR3);
2376	int pgmPoolMonitorUnmonitorCR3(PPGMPOOL pPool, uint16_t idxRoot);
2377	#endif
2378
2379	__END_DECLS
2380
2381
2382	/**
2383	* Gets the PGMPAGE structure for a guest page.
2384	*
2385	* @returns Pointer to the page on success.
2386	* @returns NULL on a VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS condition.
2387	*
2388	* @param pPGM PGM handle.
2389	* @param GCPhys The GC physical address.
2390	*/
2391	DECLINLINE(PPGMPAGE) pgmPhysGetPage(PPGM pPGM, RTGCPHYS GCPhys)
2392	{
2393	/*
2394	* Optimize for the first range.
2395	*/
2396	PPGMRAMRANGE pRam = CTXALLSUFF(pPGM->pRamRanges);
2397	RTGCPHYS off = GCPhys - pRam->GCPhys;
2398	if (RT_UNLIKELY(off >= pRam->cb))
2399	{
2400	do
2401	{
2402	pRam = CTXALLSUFF(pRam->pNext);
2403	if (RT_UNLIKELY(!pRam))
2404	return NULL;
2405	off = GCPhys - pRam->GCPhys;
2406	} while (off >= pRam->cb);
2407	}
2408	return &pRam->aPages[off >> PAGE_SHIFT];
2409	}
2410
2411
2412	/**
2413	* Gets the PGMPAGE structure for a guest page.
2414	*
2415	* Old Phys code: Will make sure the page is present.
2416	*
2417	* @returns VBox status code.
2418	* @retval VINF_SUCCESS and a valid *ppPage on success.
2419	* @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if the address isn't valid.
2420	*
2421	* @param pPGM PGM handle.
2422	* @param GCPhys The GC physical address.
2423	* @param ppPage Where to store the page poitner on success.
2424	*/
2425	DECLINLINE(int) pgmPhysGetPageEx(PPGM pPGM, RTGCPHYS GCPhys, PPPGMPAGE ppPage)
2426	{
2427	/*
2428	* Optimize for the first range.
2429	*/
2430	PPGMRAMRANGE pRam = CTXALLSUFF(pPGM->pRamRanges);
2431	RTGCPHYS off = GCPhys - pRam->GCPhys;
2432	if (RT_UNLIKELY(off >= pRam->cb))
2433	{
2434	do
2435	{
2436	pRam = CTXALLSUFF(pRam->pNext);
2437	if (RT_UNLIKELY(!pRam))
2438	{
2439	ppPage = NULL; / avoid incorrect and very annoying GCC warnings */
2440	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2441	}
2442	off = GCPhys - pRam->GCPhys;
2443	} while (off >= pRam->cb);
2444	}
2445	*ppPage = &pRam->aPages[off >> PAGE_SHIFT];
2446	#ifndef VBOX_WITH_NEW_PHYS_CODE
2447
2448	/*
2449	* Make sure it's present.
2450	*/
2451	if (RT_UNLIKELY( !PGM_PAGE_GET_HCPHYS(*ppPage)
2452	&& (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)))
2453	{
2454	#ifdef IN_RING3
2455	int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
2456	#else
2457	int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2458	#endif
2459	if (VBOX_FAILURE(rc))
2460	{
2461	ppPage = NULL; / avoid incorrect and very annoying GCC warnings */
2462	return rc;
2463	}
2464	Assert(rc == VINF_SUCCESS);
2465	}
2466	#endif
2467	return VINF_SUCCESS;
2468	}
2469
2470
2471
2472
2473	/**
2474	* Gets the PGMPAGE structure for a guest page.
2475	*
2476	* Old Phys code: Will make sure the page is present.
2477	*
2478	* @returns VBox status code.
2479	* @retval VINF_SUCCESS and a valid *ppPage on success.
2480	* @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if the address isn't valid.
2481	*
2482	* @param pPGM PGM handle.
2483	* @param GCPhys The GC physical address.
2484	* @param ppPage Where to store the page poitner on success.
2485	* @param ppRamHint Where to read and store the ram list hint.
2486	* The caller initializes this to NULL before the call.
2487	*/
2488	DECLINLINE(int) pgmPhysGetPageWithHintEx(PPGM pPGM, RTGCPHYS GCPhys, PPPGMPAGE ppPage, PPGMRAMRANGE *ppRamHint)
2489	{
2490	RTGCPHYS off;
2491	PPGMRAMRANGE pRam = *ppRamHint;
2492	if ( !pRam
2493	\|\| RT_UNLIKELY((off = GCPhys - pRam->GCPhys) >= pRam->cb))
2494	{
2495	pRam = CTXALLSUFF(pPGM->pRamRanges);
2496	off = GCPhys - pRam->GCPhys;
2497	if (RT_UNLIKELY(off >= pRam->cb))
2498	{
2499	do
2500	{
2501	pRam = CTXALLSUFF(pRam->pNext);
2502	if (RT_UNLIKELY(!pRam))
2503	{
2504	ppPage = NULL; / Kill the incorrect and extremely annoying GCC warnings. */
2505	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2506	}
2507	off = GCPhys - pRam->GCPhys;
2508	} while (off >= pRam->cb);
2509	}
2510	*ppRamHint = pRam;
2511	}
2512	*ppPage = &pRam->aPages[off >> PAGE_SHIFT];
2513	#ifndef VBOX_WITH_NEW_PHYS_CODE
2514
2515	/*
2516	* Make sure it's present.
2517	*/
2518	if (RT_UNLIKELY( !PGM_PAGE_GET_HCPHYS(*ppPage)
2519	&& (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)))
2520	{
2521	#ifdef IN_RING3
2522	int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
2523	#else
2524	int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2525	#endif
2526	if (VBOX_FAILURE(rc))
2527	{
2528	ppPage = NULL; / Shut up annoying smart ass. */
2529	return rc;
2530	}
2531	Assert(rc == VINF_SUCCESS);
2532	}
2533	#endif
2534	return VINF_SUCCESS;
2535	}
2536
2537
2538	/**
2539	* Gets the PGMPAGE structure for a guest page together with the PGMRAMRANGE.
2540	*
2541	* @returns Pointer to the page on success.
2542	* @returns NULL on a VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS condition.
2543	*
2544	* @param pPGM PGM handle.
2545	* @param GCPhys The GC physical address.
2546	* @param ppRam Where to store the pointer to the PGMRAMRANGE.
2547	*/
2548	DECLINLINE(PPGMPAGE) pgmPhysGetPageAndRange(PPGM pPGM, RTGCPHYS GCPhys, PPGMRAMRANGE *ppRam)
2549	{
2550	/*
2551	* Optimize for the first range.
2552	*/
2553	PPGMRAMRANGE pRam = CTXALLSUFF(pPGM->pRamRanges);
2554	RTGCPHYS off = GCPhys - pRam->GCPhys;
2555	if (RT_UNLIKELY(off >= pRam->cb))
2556	{
2557	do
2558	{
2559	pRam = CTXALLSUFF(pRam->pNext);
2560	if (RT_UNLIKELY(!pRam))
2561	return NULL;
2562	off = GCPhys - pRam->GCPhys;
2563	} while (off >= pRam->cb);
2564	}
2565	*ppRam = pRam;
2566	return &pRam->aPages[off >> PAGE_SHIFT];
2567	}
2568
2569
2570
2571
2572	/**
2573	* Gets the PGMPAGE structure for a guest page together with the PGMRAMRANGE.
2574	*
2575	* @returns Pointer to the page on success.
2576	* @returns NULL on a VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS condition.
2577	*
2578	* @param pPGM PGM handle.
2579	* @param GCPhys The GC physical address.
2580	* @param ppPage Where to store the pointer to the PGMPAGE structure.
2581	* @param ppRam Where to store the pointer to the PGMRAMRANGE structure.
2582	*/
2583	DECLINLINE(int) pgmPhysGetPageAndRangeEx(PPGM pPGM, RTGCPHYS GCPhys, PPPGMPAGE ppPage, PPGMRAMRANGE *ppRam)
2584	{
2585	/*
2586	* Optimize for the first range.
2587	*/
2588	PPGMRAMRANGE pRam = CTXALLSUFF(pPGM->pRamRanges);
2589	RTGCPHYS off = GCPhys - pRam->GCPhys;
2590	if (RT_UNLIKELY(off >= pRam->cb))
2591	{
2592	do
2593	{
2594	pRam = CTXALLSUFF(pRam->pNext);
2595	if (RT_UNLIKELY(!pRam))
2596	{
2597	ppRam = NULL; / Shut up silly GCC warnings. */
2598	ppPage = NULL; / ditto */
2599	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2600	}
2601	off = GCPhys - pRam->GCPhys;
2602	} while (off >= pRam->cb);
2603	}
2604	*ppRam = pRam;
2605	*ppPage = &pRam->aPages[off >> PAGE_SHIFT];
2606	#ifndef VBOX_WITH_NEW_PHYS_CODE
2607
2608	/*
2609	* Make sure it's present.
2610	*/
2611	if (RT_UNLIKELY( !PGM_PAGE_GET_HCPHYS(*ppPage)
2612	&& (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)))
2613	{
2614	#ifdef IN_RING3
2615	int rc = pgmr3PhysGrowRange(PGM2VM(pPGM), GCPhys);
2616	#else
2617	int rc = CTXALLMID(VMM, CallHost)(PGM2VM(pPGM), VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2618	#endif
2619	if (VBOX_FAILURE(rc))
2620	{
2621	ppPage = NULL; / Shut up silly GCC warnings. */
2622	ppPage = NULL; / ditto */
2623	return rc;
2624	}
2625	Assert(rc == VINF_SUCCESS);
2626
2627	}
2628	#endif
2629	return VINF_SUCCESS;
2630	}
2631
2632
2633	/**
2634	* Convert GC Phys to HC Phys.
2635	*
2636	* @returns VBox status.
2637	* @param pPGM PGM handle.
2638	* @param GCPhys The GC physical address.
2639	* @param pHCPhys Where to store the corresponding HC physical address.
2640	*
2641	* @deprecated Doesn't deal with zero, shared or write monitored pages.
2642	* Avoid when writing new code!
2643	*/
2644	DECLINLINE(int) pgmRamGCPhys2HCPhys(PPGM pPGM, RTGCPHYS GCPhys, PRTHCPHYS pHCPhys)
2645	{
2646	PPGMPAGE pPage;
2647	int rc = pgmPhysGetPageEx(pPGM, GCPhys, &pPage);
2648	if (VBOX_FAILURE(rc))
2649	return rc;
2650	*pHCPhys = PGM_PAGE_GET_HCPHYS(pPage) \| (GCPhys & PAGE_OFFSET_MASK);
2651	return VINF_SUCCESS;
2652	}
2653
2654
2655	#ifndef IN_GC
2656	/**
2657	* Queries the Physical TLB entry for a physical guest page,
2658	* attemting to load the TLB entry if necessary.
2659	*
2660	* @returns VBox status code.
2661	* @retval VINF_SUCCESS on success
2662	* @retval VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS if it's not a valid physical address.
2663	* @param pPGM The PGM instance handle.
2664	* @param GCPhys The address of the guest page.
2665	* @param ppTlbe Where to store the pointer to the TLB entry.
2666	*/
2667
2668	DECLINLINE(int) pgmPhysPageQueryTlbe(PPGM pPGM, RTGCPHYS GCPhys, PPPGMPAGEMAPTLBE ppTlbe)
2669	{
2670	int rc;
2671	PPGMPAGEMAPTLBE pTlbe = &pPGM->CTXSUFF(PhysTlb).aEntries[PGM_PAGEMAPTLB_IDX(GCPhys)];
2672	if (pTlbe->GCPhys == (GCPhys & X86_PTE_PAE_PG_MASK))
2673	{
2674	STAM_COUNTER_INC(&pPGM->CTXMID(StatPage,MapTlbHits));
2675	rc = VINF_SUCCESS;
2676	}
2677	else
2678	rc = pgmPhysPageLoadIntoTlb(pPGM, GCPhys);
2679	*ppTlbe = pTlbe;
2680	return rc;
2681	}
2682	#endif /* !IN_GC */
2683
2684
2685	#ifndef VBOX_WITH_NEW_PHYS_CODE
2686	/**
2687	* Convert GC Phys to HC Virt.
2688	*
2689	* @returns VBox status.
2690	* @param pPGM PGM handle.
2691	* @param GCPhys The GC physical address.
2692	* @param pHCPtr Where to store the corresponding HC virtual address.
2693	*
2694	* @deprecated This will be eliminated by PGMPhysGCPhys2CCPtr.
2695	*/
2696	DECLINLINE(int) pgmRamGCPhys2HCPtr(PPGM pPGM, RTGCPHYS GCPhys, PRTHCPTR pHCPtr)
2697	{
2698	PPGMRAMRANGE pRam;
2699	PPGMPAGE pPage;
2700	int rc = pgmPhysGetPageAndRangeEx(pPGM, GCPhys, &pPage, &pRam);
2701	if (VBOX_FAILURE(rc))
2702	{
2703	pHCPtr = 0; / Shut up silly GCC warnings. */
2704	return rc;
2705	}
2706	RTGCPHYS off = GCPhys - pRam->GCPhys;
2707
2708	if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)
2709	{
2710	unsigned iChunk = off >> PGM_DYNAMIC_CHUNK_SHIFT;
2711	*pHCPtr = (RTHCPTR)((RTHCUINTPTR)CTXSUFF(pRam->pavHCChunk)[iChunk] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));
2712	return VINF_SUCCESS;
2713	}
2714	if (pRam->pvHC)
2715	{
2716	*pHCPtr = (RTHCPTR)((RTHCUINTPTR)pRam->pvHC + off);
2717	return VINF_SUCCESS;
2718	}
2719	pHCPtr = 0; / Shut up silly GCC warnings. */
2720	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2721	}
2722	#endif /* !VBOX_WITH_NEW_PHYS_CODE */
2723
2724
2725	/**
2726	* Convert GC Phys to HC Virt.
2727	*
2728	* @returns VBox status.
2729	* @param PVM VM handle.
2730	* @param pRam Ram range
2731	* @param GCPhys The GC physical address.
2732	* @param pHCPtr Where to store the corresponding HC virtual address.
2733	*
2734	* @deprecated This will be eliminated. Don't use it.
2735	*/
2736	DECLINLINE(int) pgmRamGCPhys2HCPtrWithRange(PVM pVM, PPGMRAMRANGE pRam, RTGCPHYS GCPhys, PRTHCPTR pHCPtr)
2737	{
2738	RTGCPHYS off = GCPhys - pRam->GCPhys;
2739	Assert(off < pRam->cb);
2740
2741	if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)
2742	{
2743	unsigned idx = (off >> PGM_DYNAMIC_CHUNK_SHIFT);
2744	/* Physical chunk in dynamically allocated range not present? */
2745	if (RT_UNLIKELY(!CTXSUFF(pRam->pavHCChunk)[idx]))
2746	{
2747	#ifdef IN_RING3
2748	int rc = pgmr3PhysGrowRange(pVM, GCPhys);
2749	#else
2750	int rc = CTXALLMID(VMM, CallHost)(pVM, VMMCALLHOST_PGM_RAM_GROW_RANGE, GCPhys);
2751	#endif
2752	if (rc != VINF_SUCCESS)
2753	{
2754	pHCPtr = 0; / GCC crap */
2755	return rc;
2756	}
2757	}
2758	*pHCPtr = (RTHCPTR)((RTHCUINTPTR)CTXSUFF(pRam->pavHCChunk)[idx] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));
2759	return VINF_SUCCESS;
2760	}
2761	if (pRam->pvHC)
2762	{
2763	*pHCPtr = (RTHCPTR)((RTHCUINTPTR)pRam->pvHC + off);
2764	return VINF_SUCCESS;
2765	}
2766	pHCPtr = 0; / GCC crap */
2767	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2768	}
2769
2770
2771	/**
2772	* Convert GC Phys to HC Virt and HC Phys.
2773	*
2774	* @returns VBox status.
2775	* @param pPGM PGM handle.
2776	* @param GCPhys The GC physical address.
2777	* @param pHCPtr Where to store the corresponding HC virtual address.
2778	* @param pHCPhys Where to store the HC Physical address and its flags.
2779	*
2780	* @deprecated Will go away or be changed. Only user is MapCR3. MapCR3 will have to do ring-3
2781	* and ring-0 locking of the CR3 in a lazy fashion I'm fear... or perhaps not. we'll see.
2782	*/
2783	DECLINLINE(int) pgmRamGCPhys2HCPtrAndHCPhysWithFlags(PPGM pPGM, RTGCPHYS GCPhys, PRTHCPTR pHCPtr, PRTHCPHYS pHCPhys)
2784	{
2785	PPGMRAMRANGE pRam;
2786	PPGMPAGE pPage;
2787	int rc = pgmPhysGetPageAndRangeEx(pPGM, GCPhys, &pPage, &pRam);
2788	if (VBOX_FAILURE(rc))
2789	{
2790	pHCPtr = 0; / Shut up crappy GCC warnings */
2791	pHCPhys = 0; / ditto */
2792	return rc;
2793	}
2794	RTGCPHYS off = GCPhys - pRam->GCPhys;
2795
2796	pHCPhys = pPage->HCPhys; /* @todo PAGE FLAGS */
2797	if (pRam->fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)
2798	{
2799	unsigned idx = (off >> PGM_DYNAMIC_CHUNK_SHIFT);
2800	*pHCPtr = (RTHCPTR)((RTHCUINTPTR)CTXSUFF(pRam->pavHCChunk)[idx] + (off & PGM_DYNAMIC_CHUNK_OFFSET_MASK));
2801	return VINF_SUCCESS;
2802	}
2803	if (pRam->pvHC)
2804	{
2805	*pHCPtr = (RTHCPTR)((RTHCUINTPTR)pRam->pvHC + off);
2806	return VINF_SUCCESS;
2807	}
2808	*pHCPtr = 0;
2809	return VERR_PGM_INVALID_GC_PHYSICAL_ADDRESS;
2810	}
2811
2812
2813	/**
2814	* Clears flags associated with a RAM address.
2815	*
2816	* @returns VBox status code.
2817	* @param pPGM PGM handle.
2818	* @param GCPhys Guest context physical address.
2819	* @param fFlags fFlags to clear. (Bits 0-11.)
2820	*/
2821	DECLINLINE(int) pgmRamFlagsClearByGCPhys(PPGM pPGM, RTGCPHYS GCPhys, unsigned fFlags)
2822	{
2823	PPGMPAGE pPage;
2824	int rc = pgmPhysGetPageEx(pPGM, GCPhys, &pPage);
2825	if (VBOX_FAILURE(rc))
2826	return rc;
2827
2828	fFlags &= ~X86_PTE_PAE_PG_MASK;
2829	pPage->HCPhys &= ~(RTHCPHYS)fFlags; /** @todo PAGE FLAGS */
2830	return VINF_SUCCESS;
2831	}
2832
2833
2834	/**
2835	* Clears flags associated with a RAM address.
2836	*
2837	* @returns VBox status code.
2838	* @param pPGM PGM handle.
2839	* @param GCPhys Guest context physical address.
2840	* @param fFlags fFlags to clear. (Bits 0-11.)
2841	* @param ppRamHint Where to read and store the ram list hint.
2842	* The caller initializes this to NULL before the call.
2843	*/
2844	DECLINLINE(int) pgmRamFlagsClearByGCPhysWithHint(PPGM pPGM, RTGCPHYS GCPhys, unsigned fFlags, PPGMRAMRANGE *ppRamHint)
2845	{
2846	PPGMPAGE pPage;
2847	int rc = pgmPhysGetPageWithHintEx(pPGM, GCPhys, &pPage, ppRamHint);
2848	if (VBOX_FAILURE(rc))
2849	return rc;
2850
2851	fFlags &= ~X86_PTE_PAE_PG_MASK;
2852	pPage->HCPhys &= ~(RTHCPHYS)fFlags; /** @todo PAGE FLAGS */
2853	return VINF_SUCCESS;
2854	}
2855
2856	/**
2857	* Sets (bitwise OR) flags associated with a RAM address.
2858	*
2859	* @returns VBox status code.
2860	* @param pPGM PGM handle.
2861	* @param GCPhys Guest context physical address.
2862	* @param fFlags fFlags to set clear. (Bits 0-11.)
2863	*/
2864	DECLINLINE(int) pgmRamFlagsSetByGCPhys(PPGM pPGM, RTGCPHYS GCPhys, unsigned fFlags)
2865	{
2866	PPGMPAGE pPage;
2867	int rc = pgmPhysGetPageEx(pPGM, GCPhys, &pPage);
2868	if (VBOX_FAILURE(rc))
2869	return rc;
2870
2871	fFlags &= ~X86_PTE_PAE_PG_MASK;
2872	pPage->HCPhys \|= fFlags; /** @todo PAGE FLAGS */
2873	return VINF_SUCCESS;
2874	}
2875
2876
2877	/**
2878	* Sets (bitwise OR) flags associated with a RAM address.
2879	*
2880	* @returns VBox status code.
2881	* @param pPGM PGM handle.
2882	* @param GCPhys Guest context physical address.
2883	* @param fFlags fFlags to set clear. (Bits 0-11.)
2884	* @param ppRamHint Where to read and store the ram list hint.
2885	* The caller initializes this to NULL before the call.
2886	*/
2887	DECLINLINE(int) pgmRamFlagsSetByGCPhysWithHint(PPGM pPGM, RTGCPHYS GCPhys, unsigned fFlags, PPGMRAMRANGE *ppRamHint)
2888	{
2889	PPGMPAGE pPage;
2890	int rc = pgmPhysGetPageWithHintEx(pPGM, GCPhys, &pPage, ppRamHint);
2891	if (VBOX_FAILURE(rc))
2892	return rc;
2893
2894	fFlags &= ~X86_PTE_PAE_PG_MASK;
2895	pPage->HCPhys \|= fFlags; /** @todo PAGE FLAGS */
2896	return VINF_SUCCESS;
2897	}
2898
2899
2900	/**
2901	* Gets the page directory for the specified address.
2902	*
2903	* @returns Pointer to the page directory in question.
2904	* @returns NULL if the page directory is not present or on an invalid page.
2905	* @param pPGM Pointer to the PGM instance data.
2906	* @param GCPtr The address.
2907	*/
2908	DECLINLINE(PX86PDPAE) pgmGstGetPaePD(PPGM pPGM, RTGCUINTPTR GCPtr)
2909	{
2910	const unsigned iPdPtr = GCPtr >> X86_PDPTR_SHIFT;
2911	if (CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].n.u1Present)
2912	{
2913	if ((CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK) == pPGM->aGCPhysGstPaePDs[iPdPtr])
2914	return CTXSUFF(pPGM->apGstPaePDs)[iPdPtr];
2915
2916	/* cache is out-of-sync. */
2917	PX86PDPAE pPD;
2918	int rc = PGM_GCPHYS_2_PTR(PGM2VM(pPGM), CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK, &pPD);
2919	if (VBOX_SUCCESS(rc))
2920	return pPD;
2921	AssertMsgFailed(("Impossible! rc=%d PDPE=%#llx\n", rc, CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u));
2922	/* returning NIL_RTGCPHYS is ok if we assume it's just an invalid page of some kind emulated as all 0s. */
2923	}
2924	return NULL;
2925	}
2926
2927
2928	/**
2929	* Gets the page directory entry for the specified address.
2930	*
2931	* @returns Pointer to the page directory entry in question.
2932	* @returns NULL if the page directory is not present or on an invalid page.
2933	* @param pPGM Pointer to the PGM instance data.
2934	* @param GCPtr The address.
2935	*/
2936	DECLINLINE(PX86PDEPAE) pgmGstGetPaePDEPtr(PPGM pPGM, RTGCUINTPTR GCPtr)
2937	{
2938	const unsigned iPdPtr = GCPtr >> X86_PDPTR_SHIFT;
2939	if (CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].n.u1Present)
2940	{
2941	const unsigned iPD = (GCPtr >> X86_PD_PAE_SHIFT) & X86_PD_PAE_MASK;
2942	if ((CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK) == pPGM->aGCPhysGstPaePDs[iPdPtr])
2943	return &CTXSUFF(pPGM->apGstPaePDs)[iPdPtr]->a[iPD];
2944
2945	/* The cache is out-of-sync. */
2946	PX86PDPAE pPD;
2947	int rc = PGM_GCPHYS_2_PTR(PGM2VM(pPGM), CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK, &pPD);
2948	if (VBOX_SUCCESS(rc))
2949	return &pPD->a[iPD];
2950	AssertMsgFailed(("Impossible! rc=%Vrc PDPE=%RX64\n", rc, CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u));
2951	/* returning NIL_RTGCPHYS is ok if we assume it's just an invalid page or something which we'll emulate as all 0s. */
2952	}
2953	return NULL;
2954	}
2955
2956
2957	/**
2958	* Gets the page directory entry for the specified address.
2959	*
2960	* @returns The page directory entry in question.
2961	* @returns A non-present entry if the page directory is not present or on an invalid page.
2962	* @param pPGM Pointer to the PGM instance data.
2963	* @param GCPtr The address.
2964	*/
2965	DECLINLINE(uint64_t) pgmGstGetPaePDE(PPGM pPGM, RTGCUINTPTR GCPtr)
2966	{
2967	const unsigned iPdPtr = GCPtr >> X86_PDPTR_SHIFT;
2968	if (CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].n.u1Present)
2969	{
2970	const unsigned iPD = (GCPtr >> X86_PD_PAE_SHIFT) & X86_PD_PAE_MASK;
2971	if ((CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK) == pPGM->aGCPhysGstPaePDs[iPdPtr])
2972	return CTXSUFF(pPGM->apGstPaePDs)[iPdPtr]->a[iPD].u;
2973
2974	/* cache is out-of-sync. */
2975	PX86PDPAE pPD;
2976	int rc = PGM_GCPHYS_2_PTR(PGM2VM(pPGM), CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK, &pPD);
2977	if (VBOX_SUCCESS(rc))
2978	return pPD->a[iPD].u;
2979	AssertMsgFailed(("Impossible! rc=%d PDPE=%#llx\n", rc, CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u));
2980	}
2981	return 0;
2982	}
2983
2984
2985	/**
2986	* Gets the page directory for the specified address and returns the index into the page directory
2987	*
2988	* @returns Pointer to the page directory in question.
2989	* @returns NULL if the page directory is not present or on an invalid page.
2990	* @param pPGM Pointer to the PGM instance data.
2991	* @param GCPtr The address.
2992	* @param piPD Receives the index into the returned page directory
2993	*/
2994	DECLINLINE(PX86PDPAE) pgmGstGetPaePDPtr(PPGM pPGM, RTGCUINTPTR GCPtr, unsigned *piPD)
2995	{
2996	const unsigned iPdPtr = GCPtr >> X86_PDPTR_SHIFT;
2997	if (CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].n.u1Present)
2998	{
2999	const unsigned iPD = (GCPtr >> X86_PD_PAE_SHIFT) & X86_PD_PAE_MASK;
3000	if ((CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK) == pPGM->aGCPhysGstPaePDs[iPdPtr])
3001	{
3002	*piPD = iPD;
3003	return CTXSUFF(pPGM->apGstPaePDs)[iPdPtr];
3004	}
3005
3006	/* cache is out-of-sync. */
3007	PX86PDPAE pPD;
3008	int rc = PGM_GCPHYS_2_PTR(PGM2VM(pPGM), CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u & X86_PDPE_PG_MASK, &pPD);
3009	if (VBOX_SUCCESS(rc))
3010	{
3011	*piPD = iPD;
3012	return pPD;
3013	}
3014	AssertMsgFailed(("Impossible! rc=%d PDPE=%#llx\n", rc, CTXSUFF(pPGM->pGstPaePDPTR)->a[iPdPtr].u));
3015	/* returning NIL_RTGCPHYS is ok if we assume it's just an invalid page of some kind emulated as all 0s. */
3016	}
3017	return NULL;
3018	}
3019
3020
3021	/**
3022	* Checks if any of the specified page flags are set for the given page.
3023	*
3024	* @returns true if any of the flags are set.
3025	* @returns false if all the flags are clear.
3026	* @param pPGM PGM handle.
3027	* @param GCPhys The GC physical address.
3028	* @param fFlags The flags to check for.
3029	*/
3030	DECLINLINE(bool) pgmRamTestFlags(PPGM pPGM, RTGCPHYS GCPhys, uint64_t fFlags)
3031	{
3032	PPGMPAGE pPage = pgmPhysGetPage(pPGM, GCPhys);
3033	return pPage
3034	&& (pPage->HCPhys & fFlags) != 0; /** @todo PAGE FLAGS */
3035	}
3036
3037
3038	/**
3039	* Gets the ram flags for a handler.
3040	*
3041	* @returns The ram flags.
3042	* @param pCur The physical handler in question.
3043	*/
3044	DECLINLINE(unsigned) pgmHandlerPhysicalCalcFlags(PPGMPHYSHANDLER pCur)
3045	{
3046	switch (pCur->enmType)
3047	{
3048	case PGMPHYSHANDLERTYPE_PHYSICAL_WRITE:
3049	return MM_RAM_FLAGS_PHYSICAL_HANDLER \| MM_RAM_FLAGS_PHYSICAL_WRITE;
3050
3051	case PGMPHYSHANDLERTYPE_MMIO:
3052	case PGMPHYSHANDLERTYPE_PHYSICAL_ALL:
3053	return MM_RAM_FLAGS_PHYSICAL_HANDLER \| MM_RAM_FLAGS_PHYSICAL_ALL;
3054
3055	default:
3056	AssertFatalMsgFailed(("Invalid type %d\n", pCur->enmType));
3057	}
3058	}
3059
3060
3061	/**
3062	* Clears one physical page of a virtual handler
3063	*
3064	* @param pPGM Pointer to the PGM instance.
3065	* @param pCur Virtual handler structure
3066	* @param iPage Physical page index
3067	*/
3068	DECLINLINE(void) pgmHandlerVirtualClearPage(PPGM pPGM, PPGMVIRTHANDLER pCur, unsigned iPage)
3069	{
3070	const PPGMPHYS2VIRTHANDLER pPhys2Virt = &pCur->aPhysToVirt[iPage];
3071
3072	/*
3073	* Remove the node from the tree (it's supposed to be in the tree if we get here!).
3074	*/
3075	#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
3076	AssertReleaseMsg(pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_IN_TREE,
3077	("pPhys2Virt=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32}\n",
3078	pPhys2Virt, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler, pPhys2Virt->offNextAlias));
3079	#endif
3080	if (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_IS_HEAD)
3081	{
3082	/* We're the head of the alias chain. */
3083	PPGMPHYS2VIRTHANDLER pRemove = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysRemove(&pPGM->CTXSUFF(pTrees)->PhysToVirtHandlers, pPhys2Virt->Core.Key); NOREF(pRemove);
3084	#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
3085	AssertReleaseMsg(pRemove != NULL,
3086	("pPhys2Virt=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32}\n",
3087	pPhys2Virt, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler, pPhys2Virt->offNextAlias));
3088	AssertReleaseMsg(pRemove == pPhys2Virt,
3089	("wanted: pPhys2Virt=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32}\n"
3090	" got: pRemove=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32}\n",
3091	pPhys2Virt, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler, pPhys2Virt->offNextAlias,
3092	pRemove, pRemove->Core.Key, pRemove->Core.KeyLast, pRemove->offVirtHandler, pRemove->offNextAlias));
3093	#endif
3094	if (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK)
3095	{
3096	/* Insert the next list in the alias chain into the tree. */
3097	PPGMPHYS2VIRTHANDLER pNext = (PPGMPHYS2VIRTHANDLER)((intptr_t)pPhys2Virt + (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK));
3098	#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
3099	AssertReleaseMsg(pNext->offNextAlias & PGMPHYS2VIRTHANDLER_IN_TREE,
3100	("pNext=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32}\n",
3101	pNext, pNext->Core.Key, pNext->Core.KeyLast, pNext->offVirtHandler, pNext->offNextAlias));
3102	#endif
3103	pNext->offNextAlias \|= PGMPHYS2VIRTHANDLER_IS_HEAD;
3104	bool fRc = RTAvlroGCPhysInsert(&pPGM->CTXSUFF(pTrees)->PhysToVirtHandlers, &pNext->Core);
3105	AssertRelease(fRc);
3106	}
3107	}
3108	else
3109	{
3110	/* Locate the previous node in the alias chain. */
3111	PPGMPHYS2VIRTHANDLER pPrev = (PPGMPHYS2VIRTHANDLER)RTAvlroGCPhysGet(&pPGM->CTXSUFF(pTrees)->PhysToVirtHandlers, pPhys2Virt->Core.Key);
3112	#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
3113	AssertReleaseMsg(pPrev != pPhys2Virt,
3114	("pPhys2Virt=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32} pPrev=%p\n",
3115	pPhys2Virt, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler, pPhys2Virt->offNextAlias, pPrev));
3116	#endif
3117	for (;;)
3118	{
3119	PPGMPHYS2VIRTHANDLER pNext = (PPGMPHYS2VIRTHANDLER)((intptr_t)pPrev + (pPrev->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK));
3120	if (pNext == pPhys2Virt)
3121	{
3122	/* unlink. */
3123	LogFlow(("pgmHandlerVirtualClearPage: removed %p:{.offNextAlias=%#RX32} from alias chain. prev %p:{.offNextAlias=%#RX32} [%VGp-%VGp]\n",
3124	pPhys2Virt, pPhys2Virt->offNextAlias, pPrev, pPrev->offNextAlias, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast));
3125	if (!(pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK))
3126	pPrev->offNextAlias &= ~PGMPHYS2VIRTHANDLER_OFF_MASK;
3127	else
3128	{
3129	PPGMPHYS2VIRTHANDLER pNewNext = (PPGMPHYS2VIRTHANDLER)((intptr_t)pPhys2Virt + (pPhys2Virt->offNextAlias & PGMPHYS2VIRTHANDLER_OFF_MASK));
3130	pPrev->offNextAlias = ((intptr_t)pNewNext - (intptr_t)pPrev)
3131	\| (pPrev->offNextAlias & ~PGMPHYS2VIRTHANDLER_OFF_MASK);
3132	}
3133	break;
3134	}
3135
3136	/* next */
3137	if (pNext == pPrev)
3138	{
3139	#ifdef VBOX_STRICT_PGM_HANDLER_VIRTUAL
3140	AssertReleaseMsg(pNext != pPrev,
3141	("pPhys2Virt=%p:{.Core.Key=%VGp, .Core.KeyLast=%VGp, .offVirtHandler=%#RX32, .offNextAlias=%#RX32} pPrev=%p\n",
3142	pPhys2Virt, pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offVirtHandler, pPhys2Virt->offNextAlias, pPrev));
3143	#endif
3144	break;
3145	}
3146	pPrev = pNext;
3147	}
3148	}
3149	Log2(("PHYS2VIRT: Removing %VGp-%VGp %#RX32 %s\n",
3150	pPhys2Virt->Core.Key, pPhys2Virt->Core.KeyLast, pPhys2Virt->offNextAlias, HCSTRING(pCur->pszDesc)));
3151	pPhys2Virt->offNextAlias = 0;
3152	pPhys2Virt->Core.KeyLast = NIL_RTGCPHYS; /* require reinsert */
3153
3154	/*
3155	* Clear the ram flags for this page.
3156	*/
3157	int rc = pgmRamFlagsClearByGCPhys(pPGM, pPhys2Virt->Core.Key,
3158	MM_RAM_FLAGS_VIRTUAL_HANDLER \| MM_RAM_FLAGS_VIRTUAL_ALL \| MM_RAM_FLAGS_VIRTUAL_WRITE);
3159	AssertRC(rc);
3160	}
3161
3162
3163	/**
3164	* Internal worker for finding a 'in-use' shadow page give by it's physical address.
3165	*
3166	* @returns Pointer to the shadow page structure.
3167	* @param pPool The pool.
3168	* @param HCPhys The HC physical address of the shadow page.
3169	*/
3170	DECLINLINE(PPGMPOOLPAGE) pgmPoolGetPage(PPGMPOOL pPool, RTHCPHYS HCPhys)
3171	{
3172	/*
3173	* Look up the page.
3174	*/
3175	PPGMPOOLPAGE pPage = (PPGMPOOLPAGE)RTAvloHCPhysGet(&pPool->HCPhysTree, HCPhys & X86_PTE_PAE_PG_MASK);
3176	AssertFatalMsg(pPage && pPage->enmKind != PGMPOOLKIND_FREE, ("HCPhys=%VHp pPage=%p type=%d\n", HCPhys, pPage, (pPage) ? pPage->enmKind : 0));
3177	return pPage;
3178	}
3179
3180
3181	/**
3182	* Internal worker for finding a 'in-use' shadow page give by it's physical address.
3183	*
3184	* @returns Pointer to the shadow page structure.
3185	* @param pPool The pool.
3186	* @param idx The pool page index.
3187	*/
3188	DECLINLINE(PPGMPOOLPAGE) pgmPoolGetPageByIdx(PPGMPOOL pPool, unsigned idx)
3189	{
3190	AssertFatalMsg(idx >= PGMPOOL_IDX_FIRST && idx < pPool->cCurPages, ("idx=%d\n", idx));
3191	return &pPool->aPages[idx];
3192	}
3193
3194
3195	#ifdef PGMPOOL_WITH_GCPHYS_TRACKING
3196	/**
3197	* Clear references to guest physical memory.
3198	*
3199	* @param pPool The pool.
3200	* @param pPoolPage The pool page.
3201	* @param pPhysPage The physical guest page tracking structure.
3202	*/
3203	DECLINLINE(void) pgmTrackDerefGCPhys(PPGMPOOL pPool, PPGMPOOLPAGE pPoolPage, PPGMPAGE pPhysPage)
3204	{
3205	/*
3206	* Just deal with the simple case here.
3207	*/
3208	#ifdef LOG_ENABLED
3209	const RTHCPHYS HCPhysOrg = pPhysPage->HCPhys; /** @todo PAGE FLAGS */
3210	#endif
3211	const unsigned cRefs = pPhysPage->HCPhys >> MM_RAM_FLAGS_CREFS_SHIFT; /** @todo PAGE FLAGS */
3212	if (cRefs == 1)
3213	{
3214	Assert(pPoolPage->idx == ((pPhysPage->HCPhys >> MM_RAM_FLAGS_IDX_SHIFT) & MM_RAM_FLAGS_IDX_MASK));
3215	pPhysPage->HCPhys = pPhysPage->HCPhys & MM_RAM_FLAGS_NO_REFS_MASK;
3216	}
3217	else
3218	pgmPoolTrackPhysExtDerefGCPhys(pPool, pPoolPage, pPhysPage);
3219	LogFlow(("pgmTrackDerefGCPhys: HCPhys=%RHp -> %RHp\n", HCPhysOrg, pPhysPage->HCPhys));
3220	}
3221	#endif
3222
3223
3224	#ifdef PGMPOOL_WITH_CACHE
3225	/**
3226	* Moves the page to the head of the age list.
3227	*
3228	* This is done when the cached page is used in one way or another.
3229	*
3230	* @param pPool The pool.
3231	* @param pPage The cached page.
3232	* @todo inline in PGMInternal.h!
3233	*/
3234	DECLINLINE(void) pgmPoolCacheUsed(PPGMPOOL pPool, PPGMPOOLPAGE pPage)
3235	{
3236	/*
3237	* Move to the head of the age list.
3238	*/
3239	if (pPage->iAgePrev != NIL_PGMPOOL_IDX)
3240	{
3241	/* unlink */
3242	pPool->aPages[pPage->iAgePrev].iAgeNext = pPage->iAgeNext;
3243	if (pPage->iAgeNext != NIL_PGMPOOL_IDX)
3244	pPool->aPages[pPage->iAgeNext].iAgePrev = pPage->iAgePrev;
3245	else
3246	pPool->iAgeTail = pPage->iAgePrev;
3247
3248	/* insert at head */
3249	pPage->iAgePrev = NIL_PGMPOOL_IDX;
3250	pPage->iAgeNext = pPool->iAgeHead;
3251	Assert(pPage->iAgeNext != NIL_PGMPOOL_IDX); /* we would've already been head then */
3252	pPool->iAgeHead = pPage->idx;
3253	pPool->aPages[pPage->iAgeNext].iAgePrev = pPage->idx;
3254	}
3255	}
3256	#endif /* PGMPOOL_WITH_CACHE */
3257
3258	/**
3259	* Tells if mappings are to be put into the shadow page table or not
3260	*
3261	* @returns boolean result
3262	* @param pVM VM handle.
3263	*/
3264
3265	DECLINLINE(bool) pgmMapAreMappingsEnabled(PPGM pPGM)
3266	{
3267	return !pPGM->fDisableMappings;
3268	}
3269
3270	/** @} */
3271
3272	#endif

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source: vbox/trunk/src/VBox/VMM/PGMInternal.h@ 6862

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