1 | /* $Id: PGMGst.h 8415 2008-04-28 11:20:42Z vboxsync $ */
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2 | /** @file
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3 | * VBox - Page Manager / Monitor, Guest Paging Template.
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4 | */
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5 |
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6 | /*
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7 | * Copyright (C) 2006-2007 Sun Microsystems, Inc.
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8 | *
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9 | * This file is part of VirtualBox Open Source Edition (OSE), as
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10 | * available from http://www.virtualbox.org. This file is free software;
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11 | * you can redistribute it and/or modify it under the terms of the GNU
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12 | * General Public License (GPL) as published by the Free Software
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13 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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14 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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15 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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16 | *
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17 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
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18 | * Clara, CA 95054 USA or visit http://www.sun.com if you need
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19 | * additional information or have any questions.
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20 | */
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21 |
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22 | /*******************************************************************************
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23 | * Defined Constants And Macros *
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24 | *******************************************************************************/
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25 | #undef GSTPT
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26 | #undef PGSTPT
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27 | #undef GSTPTE
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28 | #undef PGSTPTE
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29 | #undef GSTPD
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30 | #undef PGSTPD
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31 | #undef GSTPDE
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32 | #undef PGSTPDE
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33 | #undef GST_BIG_PAGE_SIZE
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34 | #undef GST_BIG_PAGE_OFFSET_MASK
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35 | #undef GST_PDE_PG_MASK
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36 | #undef GST_PDE_BIG_PG_MASK
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37 | #undef GST_PD_SHIFT
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38 | #undef GST_PD_MASK
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39 | #undef GST_PTE_PG_MASK
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40 | #undef GST_PT_SHIFT
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41 | #undef GST_PT_MASK
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42 | #undef GST_TOTAL_PD_ENTRIES
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43 | #undef GST_CR3_PAGE_MASK
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44 | #undef GST_PDPE_ENTRIES
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45 |
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46 | #if PGM_GST_TYPE == PGM_TYPE_32BIT \
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47 | || PGM_GST_TYPE == PGM_TYPE_REAL \
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48 | || PGM_GST_TYPE == PGM_TYPE_PROT
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49 | # define GSTPT X86PT
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50 | # define PGSTPT PX86PT
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51 | # define GSTPTE X86PTE
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52 | # define PGSTPTE PX86PTE
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53 | # define GSTPD X86PD
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54 | # define PGSTPD PX86PD
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55 | # define GSTPDE X86PDE
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56 | # define PGSTPDE PX86PDE
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57 | # define GST_BIG_PAGE_SIZE X86_PAGE_4M_SIZE
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58 | # define GST_BIG_PAGE_OFFSET_MASK X86_PAGE_4M_OFFSET_MASK
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59 | # define GST_PDE_PG_MASK X86_PDE_PG_MASK
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60 | # define GST_PDE_BIG_PG_MASK X86_PDE4M_PG_MASK
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61 | # define GST_PD_SHIFT X86_PD_SHIFT
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62 | # define GST_PD_MASK X86_PD_MASK
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63 | # define GST_TOTAL_PD_ENTRIES X86_PG_ENTRIES
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64 | # define GST_PTE_PG_MASK X86_PTE_PG_MASK
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65 | # define GST_PT_SHIFT X86_PT_SHIFT
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66 | # define GST_PT_MASK X86_PT_MASK
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67 | # define GST_CR3_PAGE_MASK X86_CR3_PAGE_MASK
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68 | #elif PGM_GST_TYPE == PGM_TYPE_PAE \
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69 | || PGM_GST_TYPE == PGM_TYPE_AMD64
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70 | # define GSTPT X86PTPAE
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71 | # define PGSTPT PX86PTPAE
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72 | # define GSTPTE X86PTEPAE
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73 | # define PGSTPTE PX86PTEPAE
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74 | # define GSTPD X86PDPAE
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75 | # define PGSTPD PX86PDPAE
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76 | # define GSTPDE X86PDEPAE
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77 | # define PGSTPDE PX86PDEPAE
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78 | # define GST_BIG_PAGE_SIZE X86_PAGE_2M_SIZE
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79 | # define GST_BIG_PAGE_OFFSET_MASK X86_PAGE_2M_OFFSET_MASK
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80 | # define GST_PDE_PG_MASK X86_PDE_PAE_PG_MASK
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81 | # define GST_PDE_BIG_PG_MASK X86_PDE2M_PAE_PG_MASK
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82 | # define GST_PD_SHIFT X86_PD_PAE_SHIFT
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83 | # define GST_PD_MASK X86_PD_PAE_MASK
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84 | # if PGM_GST_TYPE == PGM_TYPE_PAE
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85 | # define GST_TOTAL_PD_ENTRIES (X86_PG_PAE_ENTRIES * X86_PG_PAE_PDPE_ENTRIES)
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86 | # define GST_PDPE_ENTRIES X86_PG_PAE_PDPE_ENTRIES
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87 | # else
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88 | # define GST_TOTAL_PD_ENTRIES (X86_PG_AMD64_ENTRIES * X86_PG_AMD64_PDPE_ENTRIES)
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89 | # define GST_PDPE_ENTRIES X86_PG_AMD64_PDPE_ENTRIES
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90 | # endif
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91 | # define GST_PTE_PG_MASK X86_PTE_PAE_PG_MASK
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92 | # define GST_PT_SHIFT X86_PT_PAE_SHIFT
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93 | # define GST_PT_MASK X86_PT_PAE_MASK
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94 | # define GST_CR3_PAGE_MASK X86_CR3_PAE_PAGE_MASK
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95 | #endif
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96 |
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97 |
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98 | /*******************************************************************************
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99 | * Internal Functions *
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100 | *******************************************************************************/
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101 | __BEGIN_DECLS
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102 | /* r3 */
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103 | PGM_GST_DECL(int, InitData)(PVM pVM, PPGMMODEDATA pModeData, bool fResolveGCAndR0);
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104 | PGM_GST_DECL(int, Enter)(PVM pVM, RTGCPHYS GCPhysCR3);
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105 | PGM_GST_DECL(int, Relocate)(PVM pVM, RTGCUINTPTR offDelta);
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106 | PGM_GST_DECL(int, Exit)(PVM pVM);
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107 |
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108 | static DECLCALLBACK(int) pgmR3Gst32BitWriteHandlerCR3(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser);
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109 | static DECLCALLBACK(int) pgmR3GstPAEWriteHandlerCR3(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser);
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110 | #if 0
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111 | static DECLCALLBACK(int) pgmR3GstPAEWriteHandlerPD(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser);
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112 | #endif
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113 |
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114 | /* all */
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115 | PGM_GST_DECL(int, GetPage)(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys);
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116 | PGM_GST_DECL(int, ModifyPage)(PVM pVM, RTGCUINTPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask);
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117 | PGM_GST_DECL(int, GetPDE)(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPDE);
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118 | PGM_GST_DECL(int, MapCR3)(PVM pVM, RTGCPHYS GCPhysCR3);
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119 | PGM_GST_DECL(int, UnmapCR3)(PVM pVM);
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120 | PGM_GST_DECL(int, MonitorCR3)(PVM pVM, RTGCPHYS GCPhysCR3);
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121 | PGM_GST_DECL(int, UnmonitorCR3)(PVM pVM);
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122 | __END_DECLS
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123 |
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124 |
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125 | /**
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126 | * Initializes the guest bit of the paging mode data.
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127 | *
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128 | * @returns VBox status code.
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129 | * @param pVM The VM handle.
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130 | * @param fResolveGCAndR0 Indicate whether or not GC and Ring-0 symbols can be resolved now.
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131 | * This is used early in the init process to avoid trouble with PDM
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132 | * not being initialized yet.
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133 | */
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134 | PGM_GST_DECL(int, InitData)(PVM pVM, PPGMMODEDATA pModeData, bool fResolveGCAndR0)
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135 | {
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136 | Assert(pModeData->uGstType == PGM_GST_TYPE);
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137 |
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138 | /* Ring-3 */
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139 | pModeData->pfnR3GstRelocate = PGM_GST_NAME(Relocate);
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140 | pModeData->pfnR3GstExit = PGM_GST_NAME(Exit);
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141 | pModeData->pfnR3GstGetPDE = PGM_GST_NAME(GetPDE);
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142 | pModeData->pfnR3GstGetPage = PGM_GST_NAME(GetPage);
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143 | pModeData->pfnR3GstModifyPage = PGM_GST_NAME(ModifyPage);
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144 | pModeData->pfnR3GstMapCR3 = PGM_GST_NAME(MapCR3);
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145 | pModeData->pfnR3GstUnmapCR3 = PGM_GST_NAME(UnmapCR3);
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146 | pModeData->pfnR3GstMonitorCR3 = PGM_GST_NAME(MonitorCR3);
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147 | pModeData->pfnR3GstUnmonitorCR3 = PGM_GST_NAME(UnmonitorCR3);
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148 |
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149 | #if PGM_GST_TYPE == PGM_TYPE_32BIT || PGM_GST_TYPE == PGM_TYPE_PAE
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150 | pModeData->pfnR3GstWriteHandlerCR3 = PGM_GST_NAME(WriteHandlerCR3);
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151 | pModeData->pszR3GstWriteHandlerCR3 = "Guest CR3 Write access handler";
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152 | pModeData->pfnR3GstPAEWriteHandlerCR3 = PGM_GST_NAME(WriteHandlerCR3);
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153 | pModeData->pszR3GstPAEWriteHandlerCR3 = "Guest CR3 Write access handler (PAE)";
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154 | #else
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155 | pModeData->pfnR3GstWriteHandlerCR3 = NULL;
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156 | pModeData->pszR3GstWriteHandlerCR3 = NULL;
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157 | pModeData->pfnR3GstPAEWriteHandlerCR3 = NULL;
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158 | pModeData->pszR3GstPAEWriteHandlerCR3 = NULL;
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159 | #endif
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160 |
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161 | if (fResolveGCAndR0)
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162 | {
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163 | int rc;
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164 |
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165 | #if PGM_SHW_TYPE != PGM_TYPE_AMD64 /* No AMD64 for traditional virtualization, only VT-x and AMD-V. */
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166 | /* GC */
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167 | rc = PDMR3GetSymbolGC(pVM, NULL, PGM_GST_NAME_GC_STR(GetPage), &pModeData->pfnGCGstGetPage);
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168 | AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_GC_STR(GetPage), rc), rc);
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169 | rc = PDMR3GetSymbolGC(pVM, NULL, PGM_GST_NAME_GC_STR(ModifyPage), &pModeData->pfnGCGstModifyPage);
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170 | AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_GC_STR(ModifyPage), rc), rc);
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171 | rc = PDMR3GetSymbolGC(pVM, NULL, PGM_GST_NAME_GC_STR(GetPDE), &pModeData->pfnGCGstGetPDE);
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172 | AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_GC_STR(GetPDE), rc), rc);
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173 | rc = PDMR3GetSymbolGC(pVM, NULL, PGM_GST_NAME_GC_STR(MonitorCR3), &pModeData->pfnGCGstMonitorCR3);
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174 | AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_GC_STR(MonitorCR3), rc), rc);
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175 | rc = PDMR3GetSymbolGC(pVM, NULL, PGM_GST_NAME_GC_STR(UnmonitorCR3), &pModeData->pfnGCGstUnmonitorCR3);
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176 | AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_GC_STR(UnmonitorCR3), rc), rc);
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177 | rc = PDMR3GetSymbolGC(pVM, NULL, PGM_GST_NAME_GC_STR(MapCR3), &pModeData->pfnGCGstMapCR3);
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178 | AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_GC_STR(MapCR3), rc), rc);
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179 | rc = PDMR3GetSymbolGC(pVM, NULL, PGM_GST_NAME_GC_STR(UnmapCR3), &pModeData->pfnGCGstUnmapCR3);
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180 | AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_GC_STR(UnmapCR3), rc), rc);
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181 | # if PGM_GST_TYPE == PGM_TYPE_32BIT || PGM_GST_TYPE == PGM_TYPE_PAE
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182 | rc = PDMR3GetSymbolGC(pVM, NULL, PGM_GST_NAME_GC_STR(WriteHandlerCR3), &pModeData->pfnGCGstWriteHandlerCR3);
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183 | AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_GC_STR(WriteHandlerCR3), rc), rc);
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184 | rc = PDMR3GetSymbolGC(pVM, NULL, PGM_GST_NAME_GC_STR(WriteHandlerCR3), &pModeData->pfnGCGstPAEWriteHandlerCR3);
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185 | AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_GC_STR(PAEWriteHandlerCR3), rc), rc);
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186 | # endif
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187 | #endif /* Not AMD64 shadow paging. */
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188 |
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189 | /* Ring-0 */
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190 | rc = PDMR3GetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(GetPage), &pModeData->pfnR0GstGetPage);
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191 | AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_R0_STR(GetPage), rc), rc);
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192 | rc = PDMR3GetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(ModifyPage), &pModeData->pfnR0GstModifyPage);
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193 | AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_R0_STR(ModifyPage), rc), rc);
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194 | rc = PDMR3GetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(GetPDE), &pModeData->pfnR0GstGetPDE);
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195 | AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_R0_STR(GetPDE), rc), rc);
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196 | rc = PDMR3GetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(MonitorCR3), &pModeData->pfnR0GstMonitorCR3);
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197 | AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_R0_STR(MonitorCR3), rc), rc);
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198 | rc = PDMR3GetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(UnmonitorCR3), &pModeData->pfnR0GstUnmonitorCR3);
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199 | AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_R0_STR(UnmonitorCR3), rc), rc);
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200 | rc = PDMR3GetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(MapCR3), &pModeData->pfnR0GstMapCR3);
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201 | AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_R0_STR(MapCR3), rc), rc);
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202 | rc = PDMR3GetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(UnmapCR3), &pModeData->pfnR0GstUnmapCR3);
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203 | AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_R0_STR(UnmapCR3), rc), rc);
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204 | #if PGM_GST_TYPE == PGM_TYPE_32BIT || PGM_GST_TYPE == PGM_TYPE_PAE
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205 | rc = PDMR3GetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(WriteHandlerCR3), &pModeData->pfnR0GstWriteHandlerCR3);
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206 | AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_R0_STR(WriteHandlerCR3), rc), rc);
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207 | rc = PDMR3GetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(WriteHandlerCR3), &pModeData->pfnR0GstPAEWriteHandlerCR3);
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208 | AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_R0_STR(PAEWriteHandlerCR3), rc), rc);
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209 | #endif
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210 | }
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211 |
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212 | return VINF_SUCCESS;
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213 | }
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214 |
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215 |
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216 | /**
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217 | * Enters the guest mode.
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218 | *
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219 | * @returns VBox status code.
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220 | * @param pVM VM handle.
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221 | * @param GCPhysCR3 The physical address from the CR3 register.
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222 | */
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223 | PGM_GST_DECL(int, Enter)(PVM pVM, RTGCPHYS GCPhysCR3)
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224 | {
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225 | /*
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226 | * Map and monitor CR3
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227 | */
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228 | int rc = PGM_GST_NAME(MapCR3)(pVM, GCPhysCR3);
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229 | if (VBOX_SUCCESS(rc) && !pVM->pgm.s.fMappingsFixed)
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230 | rc = PGM_GST_NAME(MonitorCR3)(pVM, GCPhysCR3);
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231 | return rc;
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232 | }
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233 |
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234 |
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235 | /**
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236 | * Relocate any GC pointers related to guest mode paging.
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237 | *
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238 | * @returns VBox status code.
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239 | * @param pVM The VM handle.
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240 | * @param offDelta The reloation offset.
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241 | */
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242 | PGM_GST_DECL(int, Relocate)(PVM pVM, RTGCUINTPTR offDelta)
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243 | {
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244 | /* nothing special to do here - InitData does the job. */
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245 | return VINF_SUCCESS;
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246 | }
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247 |
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248 |
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249 | /**
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250 | * Exits the guest mode.
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251 | *
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252 | * @returns VBox status code.
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253 | * @param pVM VM handle.
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254 | */
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255 | PGM_GST_DECL(int, Exit)(PVM pVM)
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256 | {
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257 | int rc = PGM_GST_NAME(UnmonitorCR3)(pVM);
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258 | if (VBOX_SUCCESS(rc))
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259 | rc = PGM_GST_NAME(UnmapCR3)(pVM);
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260 | return rc;
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261 | }
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262 |
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263 |
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264 | #if PGM_GST_TYPE == PGM_TYPE_32BIT
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265 | /**
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266 | * Physical write access for the Guest CR3 in 32-bit mode.
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267 | *
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268 | * @returns VINF_SUCCESS if the handler have carried out the operation.
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269 | * @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
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270 | * @param pVM VM Handle.
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271 | * @param GCPhys The physical address the guest is writing to.
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272 | * @param pvPhys The HC mapping of that address.
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273 | * @param pvBuf What the guest is reading/writing.
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274 | * @param cbBuf How much it's reading/writing.
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275 | * @param enmAccessType The access type.
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276 | * @param pvUser User argument.
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277 | */
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278 | static DECLCALLBACK(int) pgmR3Gst32BitWriteHandlerCR3(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser)
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279 | {
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280 | AssertMsg(!pVM->pgm.s.fMappingsFixed, ("Shouldn't be registered when mappings are fixed!\n"));
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281 | Assert(enmAccessType == PGMACCESSTYPE_WRITE);
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282 | Log2(("pgmR3Gst32BitWriteHandlerCR3: ff=%#x GCPhys=%VGp pvPhys=%p cbBuf=%d pvBuf={%.*Vhxs}\n", pVM->fForcedActions, GCPhys, pvPhys, cbBuf, cbBuf, pvBuf));
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283 |
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284 | /*
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285 | * Do the write operation.
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286 | */
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287 | memcpy(pvPhys, pvBuf, cbBuf);
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288 | if ( !pVM->pgm.s.fMappingsFixed
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289 | && !VM_FF_ISPENDING(pVM, VM_FF_PGM_SYNC_CR3 | VM_FF_PGM_SYNC_CR3_NON_GLOBAL))
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290 | {
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291 | /*
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292 | * Check for conflicts.
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293 | */
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294 | const RTGCUINTPTR offPD = GCPhys & PAGE_OFFSET_MASK;
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295 | const unsigned iPD1 = offPD / sizeof(X86PDE);
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296 | const unsigned iPD2 = (offPD + cbBuf - 1) / sizeof(X86PDE);
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297 | Assert(iPD1 - iPD2 <= 1);
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298 | if ( ( pVM->pgm.s.pGuestPDHC->a[iPD1].n.u1Present
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299 | && pgmGetMapping(pVM, iPD1 << X86_PD_SHIFT) )
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300 | || ( iPD1 != iPD2
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301 | && pVM->pgm.s.pGuestPDHC->a[iPD2].n.u1Present
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302 | && pgmGetMapping(pVM, iPD2 << X86_PD_SHIFT) )
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303 | )
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304 | {
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305 | Log(("pgmR3Gst32BitWriteHandlerCR3: detected conflict. iPD1=%#x iPD2=%#x GCPhys=%VGp\n", iPD1, iPD2, GCPhys));
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306 | STAM_COUNTER_INC(&pVM->pgm.s.StatHCGuestPDWriteConflict);
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307 | VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3);
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308 | }
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309 | }
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310 |
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311 | STAM_COUNTER_INC(&pVM->pgm.s.StatHCGuestPDWrite);
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312 | return VINF_SUCCESS;
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313 | }
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314 | #endif /* 32BIT */
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315 |
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316 |
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317 | #if PGM_GST_TYPE == PGM_TYPE_PAE
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318 | /**
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319 | * Physical write access handler for the Guest CR3 in PAE mode.
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320 | *
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321 | * @returns VINF_SUCCESS if the handler have carried out the operation.
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322 | * @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
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323 | * @param pVM VM Handle.
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324 | * @param GCPhys The physical address the guest is writing to.
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325 | * @param pvPhys The HC mapping of that address.
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326 | * @param pvBuf What the guest is reading/writing.
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327 | * @param cbBuf How much it's reading/writing.
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328 | * @param enmAccessType The access type.
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329 | * @param pvUser User argument.
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330 | */
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331 | static DECLCALLBACK(int) pgmR3GstPAEWriteHandlerCR3(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser)
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332 | {
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333 | AssertMsg(!pVM->pgm.s.fMappingsFixed, ("Shouldn't be registered when mappings are fixed!\n"));
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334 | Assert(enmAccessType == PGMACCESSTYPE_WRITE);
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335 | Log2(("pgmR3GstPAEWriteHandlerCR3: ff=%#x GCPhys=%VGp pvPhys=%p cbBuf=%d pvBuf={%.*Vhxs}\n", pVM->fForcedActions, GCPhys, pvPhys, cbBuf, cbBuf, pvBuf));
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336 |
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337 | /*
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338 | * Do the write operation.
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339 | */
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340 | memcpy(pvPhys, pvBuf, cbBuf);
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341 | if ( !pVM->pgm.s.fMappingsFixed
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342 | && !VM_FF_ISPENDING(pVM, VM_FF_PGM_SYNC_CR3 | VM_FF_PGM_SYNC_CR3_NON_GLOBAL))
|
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343 | {
|
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344 | /*
|
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345 | * Check if any of the PDs have changed.
|
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346 | * We'll simply check all of them instead of figuring out which one/two to check.
|
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347 | */
|
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348 | for (unsigned i = 0; i < 4; i++)
|
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349 | {
|
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350 | if ( pVM->pgm.s.pGstPaePDPTHC->a[i].n.u1Present
|
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351 | && (pVM->pgm.s.pGstPaePDPTHC->a[i].u & X86_PDPE_PG_MASK) != pVM->pgm.s.aGCPhysGstPaePDsMonitored[i])
|
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352 | {
|
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353 | Log(("pgmR3GstPAEWriteHandlerCR3: detected updated PDPE; [%d] = %#llx, Old GCPhys=%VGp\n",
|
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354 | i, pVM->pgm.s.pGstPaePDPTHC->a[i].u, pVM->pgm.s.aGCPhysGstPaePDsMonitored[i]));
|
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355 | /*
|
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356 | * The PD has changed.
|
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357 | * We will schedule a monitoring update for the next TLB Flush,
|
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358 | * InvalidatePage or SyncCR3.
|
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359 | *
|
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360 | * This isn't perfect, because a lazy page sync might be dealing with an half
|
---|
361 | * updated PDPE. However, we assume that the guest OS is disabling interrupts
|
---|
362 | * and being extremely careful (cmpxchg8b) when updating a PDPE where it's
|
---|
363 | * executing.
|
---|
364 | */
|
---|
365 | pVM->pgm.s.fSyncFlags |= PGM_SYNC_MONITOR_CR3;
|
---|
366 | }
|
---|
367 | }
|
---|
368 | }
|
---|
369 | /*
|
---|
370 | * Flag a updating of the monitor at the next crossroad so we don't monitor the
|
---|
371 | * wrong pages for soo long that they can be reused as code pages and freak out
|
---|
372 | * the recompiler or something.
|
---|
373 | */
|
---|
374 | else
|
---|
375 | pVM->pgm.s.fSyncFlags |= PGM_SYNC_MONITOR_CR3;
|
---|
376 |
|
---|
377 |
|
---|
378 | STAM_COUNTER_INC(&pVM->pgm.s.StatHCGuestPDWrite);
|
---|
379 | return VINF_SUCCESS;
|
---|
380 | }
|
---|
381 |
|
---|
382 | # if 0
|
---|
383 | /**
|
---|
384 | * Physical write access for Guest CR3.
|
---|
385 | *
|
---|
386 | * @returns VINF_SUCCESS if the handler have carried out the operation.
|
---|
387 | * @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
|
---|
388 | * @param pVM VM Handle.
|
---|
389 | * @param GCPhys The physical address the guest is writing to.
|
---|
390 | * @param pvPhys The HC mapping of that address.
|
---|
391 | * @param pvBuf What the guest is reading/writing.
|
---|
392 | * @param cbBuf How much it's reading/writing.
|
---|
393 | * @param enmAccessType The access type.
|
---|
394 | * @param pvUser User argument.
|
---|
395 | */
|
---|
396 | static DECLCALLBACK(int) pgmR3GstPAEWriteHandlerPD(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser)
|
---|
397 | {
|
---|
398 | AssertMsg(!pVM->pgm.s.fMappingsFixed, ("Shouldn't be registered when mappings are fixed!\n"));
|
---|
399 | Assert(enmAccessType == PGMACCESSTYPE_WRITE);
|
---|
400 | Log2(("pgmR3GstPAEWriteHandlerPD: ff=%#x GCPhys=%VGp pvPhys=%p cbBuf=%d pvBuf={%.*Vhxs}\n", pVM->fForcedActions, GCPhys, pvPhys, cbBuf, cbBuf, pvBuf));
|
---|
401 |
|
---|
402 | /*
|
---|
403 | * Do the write operation.
|
---|
404 | */
|
---|
405 | memcpy(pvPhys, pvBuf, cbBuf);
|
---|
406 | if ( !pVM->pgm.s.fMappingsFixed
|
---|
407 | && !VM_FF_ISPENDING(pVM, VM_FF_PGM_SYNC_CR3 | VM_FF_PGM_SYNC_CR3_NON_GLOBAL))
|
---|
408 | {
|
---|
409 | /*
|
---|
410 | * Figure out which of the 4 PDs this is.
|
---|
411 | */
|
---|
412 | unsigned i;
|
---|
413 | for (i = 0; i < 4; i++)
|
---|
414 | if (pVM->pgm.s.pGstPaePDPTHC->a[i].u == (GCPhys & X86_PTE_PAE_PG_MASK))
|
---|
415 | {
|
---|
416 | PX86PDPAE pPDSrc = pgmGstGetPaePD(&pVM->pgm.s, i << X86_PDPT_SHIFT);
|
---|
417 | const RTGCUINTPTR offPD = GCPhys & PAGE_OFFSET_MASK;
|
---|
418 | const unsigned iPD1 = offPD / sizeof(X86PDEPAE);
|
---|
419 | const unsigned iPD2 = (offPD + cbBuf - 1) / sizeof(X86PDEPAE);
|
---|
420 | Assert(iPD1 - iPD2 <= 1);
|
---|
421 | if ( ( pPDSrc->a[iPD1].n.u1Present
|
---|
422 | && pgmGetMapping(pVM, (i << X86_PDPT_SHIFT) | (iPD1 << X86_PD_PAE_SHIFT)) )
|
---|
423 | || ( iPD1 != iPD2
|
---|
424 | && pPDSrc->a[iPD2].n.u1Present
|
---|
425 | && pgmGetMapping(pVM, (i << X86_PDPT_SHIFT) | (iPD2 << X86_PD_PAE_SHIFT)) )
|
---|
426 | )
|
---|
427 | {
|
---|
428 | Log(("pgmR3GstPaePD3WriteHandler: detected conflict. i=%d iPD1=%#x iPD2=%#x GCPhys=%VGp\n",
|
---|
429 | i, iPD1, iPD2, GCPhys));
|
---|
430 | STAM_COUNTER_INC(&pVM->pgm.s.StatHCGuestPDWriteConflict);
|
---|
431 | VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3);
|
---|
432 | }
|
---|
433 | break; /* ASSUMES no duplicate entries... */
|
---|
434 | }
|
---|
435 | Assert(i < 4);
|
---|
436 | }
|
---|
437 |
|
---|
438 | STAM_COUNTER_INC(&pVM->pgm.s.StatHCGuestPDWrite);
|
---|
439 | return VINF_SUCCESS;
|
---|
440 | }
|
---|
441 | # endif
|
---|
442 | #endif /* PAE */
|
---|
443 |
|
---|