VirtualBox

source: vbox/trunk/src/VBox/VMM/PGMGst.h@ 8757

Last change on this file since 8757 was 8415, checked in by vboxsync, 17 years ago

Fixed bustage reported in #2799

  • Property svn:eol-style set to native
  • Property svn:keywords set to Id
File size: 19.8 KB
Line 
1/* $Id: PGMGst.h 8415 2008-04-28 11:20:42Z vboxsync $ */
2/** @file
3 * VBox - Page Manager / Monitor, Guest Paging Template.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22/*******************************************************************************
23* Defined Constants And Macros *
24*******************************************************************************/
25#undef GSTPT
26#undef PGSTPT
27#undef GSTPTE
28#undef PGSTPTE
29#undef GSTPD
30#undef PGSTPD
31#undef GSTPDE
32#undef PGSTPDE
33#undef GST_BIG_PAGE_SIZE
34#undef GST_BIG_PAGE_OFFSET_MASK
35#undef GST_PDE_PG_MASK
36#undef GST_PDE_BIG_PG_MASK
37#undef GST_PD_SHIFT
38#undef GST_PD_MASK
39#undef GST_PTE_PG_MASK
40#undef GST_PT_SHIFT
41#undef GST_PT_MASK
42#undef GST_TOTAL_PD_ENTRIES
43#undef GST_CR3_PAGE_MASK
44#undef GST_PDPE_ENTRIES
45
46#if PGM_GST_TYPE == PGM_TYPE_32BIT \
47 || PGM_GST_TYPE == PGM_TYPE_REAL \
48 || PGM_GST_TYPE == PGM_TYPE_PROT
49# define GSTPT X86PT
50# define PGSTPT PX86PT
51# define GSTPTE X86PTE
52# define PGSTPTE PX86PTE
53# define GSTPD X86PD
54# define PGSTPD PX86PD
55# define GSTPDE X86PDE
56# define PGSTPDE PX86PDE
57# define GST_BIG_PAGE_SIZE X86_PAGE_4M_SIZE
58# define GST_BIG_PAGE_OFFSET_MASK X86_PAGE_4M_OFFSET_MASK
59# define GST_PDE_PG_MASK X86_PDE_PG_MASK
60# define GST_PDE_BIG_PG_MASK X86_PDE4M_PG_MASK
61# define GST_PD_SHIFT X86_PD_SHIFT
62# define GST_PD_MASK X86_PD_MASK
63# define GST_TOTAL_PD_ENTRIES X86_PG_ENTRIES
64# define GST_PTE_PG_MASK X86_PTE_PG_MASK
65# define GST_PT_SHIFT X86_PT_SHIFT
66# define GST_PT_MASK X86_PT_MASK
67# define GST_CR3_PAGE_MASK X86_CR3_PAGE_MASK
68#elif PGM_GST_TYPE == PGM_TYPE_PAE \
69 || PGM_GST_TYPE == PGM_TYPE_AMD64
70# define GSTPT X86PTPAE
71# define PGSTPT PX86PTPAE
72# define GSTPTE X86PTEPAE
73# define PGSTPTE PX86PTEPAE
74# define GSTPD X86PDPAE
75# define PGSTPD PX86PDPAE
76# define GSTPDE X86PDEPAE
77# define PGSTPDE PX86PDEPAE
78# define GST_BIG_PAGE_SIZE X86_PAGE_2M_SIZE
79# define GST_BIG_PAGE_OFFSET_MASK X86_PAGE_2M_OFFSET_MASK
80# define GST_PDE_PG_MASK X86_PDE_PAE_PG_MASK
81# define GST_PDE_BIG_PG_MASK X86_PDE2M_PAE_PG_MASK
82# define GST_PD_SHIFT X86_PD_PAE_SHIFT
83# define GST_PD_MASK X86_PD_PAE_MASK
84# if PGM_GST_TYPE == PGM_TYPE_PAE
85# define GST_TOTAL_PD_ENTRIES (X86_PG_PAE_ENTRIES * X86_PG_PAE_PDPE_ENTRIES)
86# define GST_PDPE_ENTRIES X86_PG_PAE_PDPE_ENTRIES
87# else
88# define GST_TOTAL_PD_ENTRIES (X86_PG_AMD64_ENTRIES * X86_PG_AMD64_PDPE_ENTRIES)
89# define GST_PDPE_ENTRIES X86_PG_AMD64_PDPE_ENTRIES
90# endif
91# define GST_PTE_PG_MASK X86_PTE_PAE_PG_MASK
92# define GST_PT_SHIFT X86_PT_PAE_SHIFT
93# define GST_PT_MASK X86_PT_PAE_MASK
94# define GST_CR3_PAGE_MASK X86_CR3_PAE_PAGE_MASK
95#endif
96
97
98/*******************************************************************************
99* Internal Functions *
100*******************************************************************************/
101__BEGIN_DECLS
102/* r3 */
103PGM_GST_DECL(int, InitData)(PVM pVM, PPGMMODEDATA pModeData, bool fResolveGCAndR0);
104PGM_GST_DECL(int, Enter)(PVM pVM, RTGCPHYS GCPhysCR3);
105PGM_GST_DECL(int, Relocate)(PVM pVM, RTGCUINTPTR offDelta);
106PGM_GST_DECL(int, Exit)(PVM pVM);
107
108static DECLCALLBACK(int) pgmR3Gst32BitWriteHandlerCR3(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser);
109static DECLCALLBACK(int) pgmR3GstPAEWriteHandlerCR3(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser);
110#if 0
111static DECLCALLBACK(int) pgmR3GstPAEWriteHandlerPD(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser);
112#endif
113
114/* all */
115PGM_GST_DECL(int, GetPage)(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys);
116PGM_GST_DECL(int, ModifyPage)(PVM pVM, RTGCUINTPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask);
117PGM_GST_DECL(int, GetPDE)(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPDE);
118PGM_GST_DECL(int, MapCR3)(PVM pVM, RTGCPHYS GCPhysCR3);
119PGM_GST_DECL(int, UnmapCR3)(PVM pVM);
120PGM_GST_DECL(int, MonitorCR3)(PVM pVM, RTGCPHYS GCPhysCR3);
121PGM_GST_DECL(int, UnmonitorCR3)(PVM pVM);
122__END_DECLS
123
124
125/**
126 * Initializes the guest bit of the paging mode data.
127 *
128 * @returns VBox status code.
129 * @param pVM The VM handle.
130 * @param fResolveGCAndR0 Indicate whether or not GC and Ring-0 symbols can be resolved now.
131 * This is used early in the init process to avoid trouble with PDM
132 * not being initialized yet.
133 */
134PGM_GST_DECL(int, InitData)(PVM pVM, PPGMMODEDATA pModeData, bool fResolveGCAndR0)
135{
136 Assert(pModeData->uGstType == PGM_GST_TYPE);
137
138 /* Ring-3 */
139 pModeData->pfnR3GstRelocate = PGM_GST_NAME(Relocate);
140 pModeData->pfnR3GstExit = PGM_GST_NAME(Exit);
141 pModeData->pfnR3GstGetPDE = PGM_GST_NAME(GetPDE);
142 pModeData->pfnR3GstGetPage = PGM_GST_NAME(GetPage);
143 pModeData->pfnR3GstModifyPage = PGM_GST_NAME(ModifyPage);
144 pModeData->pfnR3GstMapCR3 = PGM_GST_NAME(MapCR3);
145 pModeData->pfnR3GstUnmapCR3 = PGM_GST_NAME(UnmapCR3);
146 pModeData->pfnR3GstMonitorCR3 = PGM_GST_NAME(MonitorCR3);
147 pModeData->pfnR3GstUnmonitorCR3 = PGM_GST_NAME(UnmonitorCR3);
148
149#if PGM_GST_TYPE == PGM_TYPE_32BIT || PGM_GST_TYPE == PGM_TYPE_PAE
150 pModeData->pfnR3GstWriteHandlerCR3 = PGM_GST_NAME(WriteHandlerCR3);
151 pModeData->pszR3GstWriteHandlerCR3 = "Guest CR3 Write access handler";
152 pModeData->pfnR3GstPAEWriteHandlerCR3 = PGM_GST_NAME(WriteHandlerCR3);
153 pModeData->pszR3GstPAEWriteHandlerCR3 = "Guest CR3 Write access handler (PAE)";
154#else
155 pModeData->pfnR3GstWriteHandlerCR3 = NULL;
156 pModeData->pszR3GstWriteHandlerCR3 = NULL;
157 pModeData->pfnR3GstPAEWriteHandlerCR3 = NULL;
158 pModeData->pszR3GstPAEWriteHandlerCR3 = NULL;
159#endif
160
161 if (fResolveGCAndR0)
162 {
163 int rc;
164
165#if PGM_SHW_TYPE != PGM_TYPE_AMD64 /* No AMD64 for traditional virtualization, only VT-x and AMD-V. */
166 /* GC */
167 rc = PDMR3GetSymbolGC(pVM, NULL, PGM_GST_NAME_GC_STR(GetPage), &pModeData->pfnGCGstGetPage);
168 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_GC_STR(GetPage), rc), rc);
169 rc = PDMR3GetSymbolGC(pVM, NULL, PGM_GST_NAME_GC_STR(ModifyPage), &pModeData->pfnGCGstModifyPage);
170 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_GC_STR(ModifyPage), rc), rc);
171 rc = PDMR3GetSymbolGC(pVM, NULL, PGM_GST_NAME_GC_STR(GetPDE), &pModeData->pfnGCGstGetPDE);
172 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_GC_STR(GetPDE), rc), rc);
173 rc = PDMR3GetSymbolGC(pVM, NULL, PGM_GST_NAME_GC_STR(MonitorCR3), &pModeData->pfnGCGstMonitorCR3);
174 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_GC_STR(MonitorCR3), rc), rc);
175 rc = PDMR3GetSymbolGC(pVM, NULL, PGM_GST_NAME_GC_STR(UnmonitorCR3), &pModeData->pfnGCGstUnmonitorCR3);
176 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_GC_STR(UnmonitorCR3), rc), rc);
177 rc = PDMR3GetSymbolGC(pVM, NULL, PGM_GST_NAME_GC_STR(MapCR3), &pModeData->pfnGCGstMapCR3);
178 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_GC_STR(MapCR3), rc), rc);
179 rc = PDMR3GetSymbolGC(pVM, NULL, PGM_GST_NAME_GC_STR(UnmapCR3), &pModeData->pfnGCGstUnmapCR3);
180 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_GC_STR(UnmapCR3), rc), rc);
181# if PGM_GST_TYPE == PGM_TYPE_32BIT || PGM_GST_TYPE == PGM_TYPE_PAE
182 rc = PDMR3GetSymbolGC(pVM, NULL, PGM_GST_NAME_GC_STR(WriteHandlerCR3), &pModeData->pfnGCGstWriteHandlerCR3);
183 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_GC_STR(WriteHandlerCR3), rc), rc);
184 rc = PDMR3GetSymbolGC(pVM, NULL, PGM_GST_NAME_GC_STR(WriteHandlerCR3), &pModeData->pfnGCGstPAEWriteHandlerCR3);
185 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_GC_STR(PAEWriteHandlerCR3), rc), rc);
186# endif
187#endif /* Not AMD64 shadow paging. */
188
189 /* Ring-0 */
190 rc = PDMR3GetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(GetPage), &pModeData->pfnR0GstGetPage);
191 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_R0_STR(GetPage), rc), rc);
192 rc = PDMR3GetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(ModifyPage), &pModeData->pfnR0GstModifyPage);
193 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_R0_STR(ModifyPage), rc), rc);
194 rc = PDMR3GetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(GetPDE), &pModeData->pfnR0GstGetPDE);
195 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_R0_STR(GetPDE), rc), rc);
196 rc = PDMR3GetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(MonitorCR3), &pModeData->pfnR0GstMonitorCR3);
197 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_R0_STR(MonitorCR3), rc), rc);
198 rc = PDMR3GetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(UnmonitorCR3), &pModeData->pfnR0GstUnmonitorCR3);
199 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_R0_STR(UnmonitorCR3), rc), rc);
200 rc = PDMR3GetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(MapCR3), &pModeData->pfnR0GstMapCR3);
201 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_R0_STR(MapCR3), rc), rc);
202 rc = PDMR3GetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(UnmapCR3), &pModeData->pfnR0GstUnmapCR3);
203 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_R0_STR(UnmapCR3), rc), rc);
204#if PGM_GST_TYPE == PGM_TYPE_32BIT || PGM_GST_TYPE == PGM_TYPE_PAE
205 rc = PDMR3GetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(WriteHandlerCR3), &pModeData->pfnR0GstWriteHandlerCR3);
206 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_R0_STR(WriteHandlerCR3), rc), rc);
207 rc = PDMR3GetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(WriteHandlerCR3), &pModeData->pfnR0GstPAEWriteHandlerCR3);
208 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_R0_STR(PAEWriteHandlerCR3), rc), rc);
209#endif
210 }
211
212 return VINF_SUCCESS;
213}
214
215
216/**
217 * Enters the guest mode.
218 *
219 * @returns VBox status code.
220 * @param pVM VM handle.
221 * @param GCPhysCR3 The physical address from the CR3 register.
222 */
223PGM_GST_DECL(int, Enter)(PVM pVM, RTGCPHYS GCPhysCR3)
224{
225 /*
226 * Map and monitor CR3
227 */
228 int rc = PGM_GST_NAME(MapCR3)(pVM, GCPhysCR3);
229 if (VBOX_SUCCESS(rc) && !pVM->pgm.s.fMappingsFixed)
230 rc = PGM_GST_NAME(MonitorCR3)(pVM, GCPhysCR3);
231 return rc;
232}
233
234
235/**
236 * Relocate any GC pointers related to guest mode paging.
237 *
238 * @returns VBox status code.
239 * @param pVM The VM handle.
240 * @param offDelta The reloation offset.
241 */
242PGM_GST_DECL(int, Relocate)(PVM pVM, RTGCUINTPTR offDelta)
243{
244 /* nothing special to do here - InitData does the job. */
245 return VINF_SUCCESS;
246}
247
248
249/**
250 * Exits the guest mode.
251 *
252 * @returns VBox status code.
253 * @param pVM VM handle.
254 */
255PGM_GST_DECL(int, Exit)(PVM pVM)
256{
257 int rc = PGM_GST_NAME(UnmonitorCR3)(pVM);
258 if (VBOX_SUCCESS(rc))
259 rc = PGM_GST_NAME(UnmapCR3)(pVM);
260 return rc;
261}
262
263
264#if PGM_GST_TYPE == PGM_TYPE_32BIT
265/**
266 * Physical write access for the Guest CR3 in 32-bit mode.
267 *
268 * @returns VINF_SUCCESS if the handler have carried out the operation.
269 * @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
270 * @param pVM VM Handle.
271 * @param GCPhys The physical address the guest is writing to.
272 * @param pvPhys The HC mapping of that address.
273 * @param pvBuf What the guest is reading/writing.
274 * @param cbBuf How much it's reading/writing.
275 * @param enmAccessType The access type.
276 * @param pvUser User argument.
277 */
278static DECLCALLBACK(int) pgmR3Gst32BitWriteHandlerCR3(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser)
279{
280 AssertMsg(!pVM->pgm.s.fMappingsFixed, ("Shouldn't be registered when mappings are fixed!\n"));
281 Assert(enmAccessType == PGMACCESSTYPE_WRITE);
282 Log2(("pgmR3Gst32BitWriteHandlerCR3: ff=%#x GCPhys=%VGp pvPhys=%p cbBuf=%d pvBuf={%.*Vhxs}\n", pVM->fForcedActions, GCPhys, pvPhys, cbBuf, cbBuf, pvBuf));
283
284 /*
285 * Do the write operation.
286 */
287 memcpy(pvPhys, pvBuf, cbBuf);
288 if ( !pVM->pgm.s.fMappingsFixed
289 && !VM_FF_ISPENDING(pVM, VM_FF_PGM_SYNC_CR3 | VM_FF_PGM_SYNC_CR3_NON_GLOBAL))
290 {
291 /*
292 * Check for conflicts.
293 */
294 const RTGCUINTPTR offPD = GCPhys & PAGE_OFFSET_MASK;
295 const unsigned iPD1 = offPD / sizeof(X86PDE);
296 const unsigned iPD2 = (offPD + cbBuf - 1) / sizeof(X86PDE);
297 Assert(iPD1 - iPD2 <= 1);
298 if ( ( pVM->pgm.s.pGuestPDHC->a[iPD1].n.u1Present
299 && pgmGetMapping(pVM, iPD1 << X86_PD_SHIFT) )
300 || ( iPD1 != iPD2
301 && pVM->pgm.s.pGuestPDHC->a[iPD2].n.u1Present
302 && pgmGetMapping(pVM, iPD2 << X86_PD_SHIFT) )
303 )
304 {
305 Log(("pgmR3Gst32BitWriteHandlerCR3: detected conflict. iPD1=%#x iPD2=%#x GCPhys=%VGp\n", iPD1, iPD2, GCPhys));
306 STAM_COUNTER_INC(&pVM->pgm.s.StatHCGuestPDWriteConflict);
307 VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3);
308 }
309 }
310
311 STAM_COUNTER_INC(&pVM->pgm.s.StatHCGuestPDWrite);
312 return VINF_SUCCESS;
313}
314#endif /* 32BIT */
315
316
317#if PGM_GST_TYPE == PGM_TYPE_PAE
318/**
319 * Physical write access handler for the Guest CR3 in PAE mode.
320 *
321 * @returns VINF_SUCCESS if the handler have carried out the operation.
322 * @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
323 * @param pVM VM Handle.
324 * @param GCPhys The physical address the guest is writing to.
325 * @param pvPhys The HC mapping of that address.
326 * @param pvBuf What the guest is reading/writing.
327 * @param cbBuf How much it's reading/writing.
328 * @param enmAccessType The access type.
329 * @param pvUser User argument.
330 */
331static DECLCALLBACK(int) pgmR3GstPAEWriteHandlerCR3(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser)
332{
333 AssertMsg(!pVM->pgm.s.fMappingsFixed, ("Shouldn't be registered when mappings are fixed!\n"));
334 Assert(enmAccessType == PGMACCESSTYPE_WRITE);
335 Log2(("pgmR3GstPAEWriteHandlerCR3: ff=%#x GCPhys=%VGp pvPhys=%p cbBuf=%d pvBuf={%.*Vhxs}\n", pVM->fForcedActions, GCPhys, pvPhys, cbBuf, cbBuf, pvBuf));
336
337 /*
338 * Do the write operation.
339 */
340 memcpy(pvPhys, pvBuf, cbBuf);
341 if ( !pVM->pgm.s.fMappingsFixed
342 && !VM_FF_ISPENDING(pVM, VM_FF_PGM_SYNC_CR3 | VM_FF_PGM_SYNC_CR3_NON_GLOBAL))
343 {
344 /*
345 * Check if any of the PDs have changed.
346 * We'll simply check all of them instead of figuring out which one/two to check.
347 */
348 for (unsigned i = 0; i < 4; i++)
349 {
350 if ( pVM->pgm.s.pGstPaePDPTHC->a[i].n.u1Present
351 && (pVM->pgm.s.pGstPaePDPTHC->a[i].u & X86_PDPE_PG_MASK) != pVM->pgm.s.aGCPhysGstPaePDsMonitored[i])
352 {
353 Log(("pgmR3GstPAEWriteHandlerCR3: detected updated PDPE; [%d] = %#llx, Old GCPhys=%VGp\n",
354 i, pVM->pgm.s.pGstPaePDPTHC->a[i].u, pVM->pgm.s.aGCPhysGstPaePDsMonitored[i]));
355 /*
356 * The PD has changed.
357 * We will schedule a monitoring update for the next TLB Flush,
358 * InvalidatePage or SyncCR3.
359 *
360 * This isn't perfect, because a lazy page sync might be dealing with an half
361 * updated PDPE. However, we assume that the guest OS is disabling interrupts
362 * and being extremely careful (cmpxchg8b) when updating a PDPE where it's
363 * executing.
364 */
365 pVM->pgm.s.fSyncFlags |= PGM_SYNC_MONITOR_CR3;
366 }
367 }
368 }
369 /*
370 * Flag a updating of the monitor at the next crossroad so we don't monitor the
371 * wrong pages for soo long that they can be reused as code pages and freak out
372 * the recompiler or something.
373 */
374 else
375 pVM->pgm.s.fSyncFlags |= PGM_SYNC_MONITOR_CR3;
376
377
378 STAM_COUNTER_INC(&pVM->pgm.s.StatHCGuestPDWrite);
379 return VINF_SUCCESS;
380}
381
382# if 0
383/**
384 * Physical write access for Guest CR3.
385 *
386 * @returns VINF_SUCCESS if the handler have carried out the operation.
387 * @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
388 * @param pVM VM Handle.
389 * @param GCPhys The physical address the guest is writing to.
390 * @param pvPhys The HC mapping of that address.
391 * @param pvBuf What the guest is reading/writing.
392 * @param cbBuf How much it's reading/writing.
393 * @param enmAccessType The access type.
394 * @param pvUser User argument.
395 */
396static DECLCALLBACK(int) pgmR3GstPAEWriteHandlerPD(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser)
397{
398 AssertMsg(!pVM->pgm.s.fMappingsFixed, ("Shouldn't be registered when mappings are fixed!\n"));
399 Assert(enmAccessType == PGMACCESSTYPE_WRITE);
400 Log2(("pgmR3GstPAEWriteHandlerPD: ff=%#x GCPhys=%VGp pvPhys=%p cbBuf=%d pvBuf={%.*Vhxs}\n", pVM->fForcedActions, GCPhys, pvPhys, cbBuf, cbBuf, pvBuf));
401
402 /*
403 * Do the write operation.
404 */
405 memcpy(pvPhys, pvBuf, cbBuf);
406 if ( !pVM->pgm.s.fMappingsFixed
407 && !VM_FF_ISPENDING(pVM, VM_FF_PGM_SYNC_CR3 | VM_FF_PGM_SYNC_CR3_NON_GLOBAL))
408 {
409 /*
410 * Figure out which of the 4 PDs this is.
411 */
412 unsigned i;
413 for (i = 0; i < 4; i++)
414 if (pVM->pgm.s.pGstPaePDPTHC->a[i].u == (GCPhys & X86_PTE_PAE_PG_MASK))
415 {
416 PX86PDPAE pPDSrc = pgmGstGetPaePD(&pVM->pgm.s, i << X86_PDPT_SHIFT);
417 const RTGCUINTPTR offPD = GCPhys & PAGE_OFFSET_MASK;
418 const unsigned iPD1 = offPD / sizeof(X86PDEPAE);
419 const unsigned iPD2 = (offPD + cbBuf - 1) / sizeof(X86PDEPAE);
420 Assert(iPD1 - iPD2 <= 1);
421 if ( ( pPDSrc->a[iPD1].n.u1Present
422 && pgmGetMapping(pVM, (i << X86_PDPT_SHIFT) | (iPD1 << X86_PD_PAE_SHIFT)) )
423 || ( iPD1 != iPD2
424 && pPDSrc->a[iPD2].n.u1Present
425 && pgmGetMapping(pVM, (i << X86_PDPT_SHIFT) | (iPD2 << X86_PD_PAE_SHIFT)) )
426 )
427 {
428 Log(("pgmR3GstPaePD3WriteHandler: detected conflict. i=%d iPD1=%#x iPD2=%#x GCPhys=%VGp\n",
429 i, iPD1, iPD2, GCPhys));
430 STAM_COUNTER_INC(&pVM->pgm.s.StatHCGuestPDWriteConflict);
431 VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3);
432 }
433 break; /* ASSUMES no duplicate entries... */
434 }
435 Assert(i < 4);
436 }
437
438 STAM_COUNTER_INC(&pVM->pgm.s.StatHCGuestPDWrite);
439 return VINF_SUCCESS;
440}
441# endif
442#endif /* PAE */
443
Note: See TracBrowser for help on using the repository browser.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette