VirtualBox

source: vbox/trunk/src/VBox/VMM/PGMGst.h@ 6862

Last change on this file since 6862 was 6764, checked in by vboxsync, 17 years ago

Made !PGMPOOL_WITH_CACHE buildable so I can run OS/2 here.
  • Property svn:eol-style set to native
  • Property svn:keywords set to Id
File size: 18.7 KB
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1/* $Id: PGMGst.h 6764 2008-02-03 02:15:04Z vboxsync $ */
2/** @file
3 * VBox - Page Manager / Monitor, Guest Paging Template.
4 */
5
6/*
7 * Copyright (C) 2006-2007 innotek GmbH
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18/*******************************************************************************
19* Defined Constants And Macros *
20*******************************************************************************/
21#undef GSTPT
22#undef PGSTPT
23#undef GSTPTE
24#undef PGSTPTE
25#undef GSTPD
26#undef PGSTPD
27#undef GSTPDE
28#undef PGSTPDE
29#undef GST_BIG_PAGE_SIZE
30#undef GST_BIG_PAGE_OFFSET_MASK
31#undef GST_PDE_PG_MASK
32#undef GST_PDE4M_PG_MASK
33#undef GST_PD_SHIFT
34#undef GST_PD_MASK
35#undef GST_PTE_PG_MASK
36#undef GST_PT_SHIFT
37#undef GST_PT_MASK
38
39#if PGM_GST_TYPE == PGM_TYPE_32BIT
40# define GSTPT X86PT
41# define PGSTPT PX86PT
42# define GSTPTE X86PTE
43# define PGSTPTE PX86PTE
44# define GSTPD X86PD
45# define PGSTPD PX86PD
46# define GSTPDE X86PDE
47# define PGSTPDE PX86PDE
48# define GST_BIG_PAGE_SIZE X86_PAGE_4M_SIZE
49# define GST_BIG_PAGE_OFFSET_MASK X86_PAGE_4M_OFFSET_MASK
50# define GST_PDE_PG_MASK X86_PDE_PG_MASK
51# define GST_PDE4M_PG_MASK X86_PDE4M_PG_MASK
52# define GST_PD_SHIFT X86_PD_SHIFT
53# define GST_PD_MASK X86_PD_MASK
54# define GST_PTE_PG_MASK X86_PTE_PG_MASK
55# define GST_PT_SHIFT X86_PT_SHIFT
56# define GST_PT_MASK X86_PT_MASK
57#else
58# define GSTPT X86PTPAE
59# define PGSTPT PX86PTPAE
60# define GSTPTE X86PTEPAE
61# define PGSTPTE PX86PTEPAE
62# define GSTPD X86PDPAE
63# define PGSTPD PX86PDPAE
64# define GSTPDE X86PDEPAE
65# define PGSTPDE PX86PDEPAE
66# define GST_BIG_PAGE_SIZE X86_PAGE_2M_SIZE
67# define GST_BIG_PAGE_OFFSET_MASK X86_PAGE_2M_OFFSET_MASK
68# define GST_PDE_PG_MASK X86_PDE_PAE_PG_MASK
69# define GST_PDE4M_PG_MASK X86_PDE4M_PAE_PG_MASK
70# define GST_PD_SHIFT X86_PD_PAE_SHIFT
71# define GST_PD_MASK X86_PD_PAE_MASK
72# define GST_PTE_PG_MASK X86_PTE_PAE_PG_MASK
73# define GST_PT_SHIFT X86_PT_PAE_SHIFT
74# define GST_PT_MASK X86_PT_PAE_MASK
75#endif
76
77
78/*******************************************************************************
79* Internal Functions *
80*******************************************************************************/
81__BEGIN_DECLS
82/* r3 */
83PGM_GST_DECL(int, InitData)(PVM pVM, PPGMMODEDATA pModeData, bool fResolveGCAndR0);
84PGM_GST_DECL(int, Enter)(PVM pVM, RTGCPHYS GCPhysCR3);
85PGM_GST_DECL(int, Relocate)(PVM pVM, RTGCUINTPTR offDelta);
86PGM_GST_DECL(int, Exit)(PVM pVM);
87
88static DECLCALLBACK(int) pgmR3Gst32BitWriteHandlerCR3(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser);
89static DECLCALLBACK(int) pgmR3GstPAEWriteHandlerCR3(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser);
90#if 0
91static DECLCALLBACK(int) pgmR3GstPAEWriteHandlerPD(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser);
92#endif
93
94/* all */
95PGM_GST_DECL(int, GetPage)(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys);
96PGM_GST_DECL(int, ModifyPage)(PVM pVM, RTGCUINTPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask);
97PGM_GST_DECL(int, GetPDE)(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPDE);
98PGM_GST_DECL(int, MapCR3)(PVM pVM, RTGCPHYS GCPhysCR3);
99PGM_GST_DECL(int, UnmapCR3)(PVM pVM);
100PGM_GST_DECL(int, MonitorCR3)(PVM pVM, RTGCPHYS GCPhysCR3);
101PGM_GST_DECL(int, UnmonitorCR3)(PVM pVM);
102__END_DECLS
103
104
105/**
106 * Initializes the guest bit of the paging mode data.
107 *
108 * @returns VBox status code.
109 * @param pVM The VM handle.
110 * @param fResolveGCAndR0 Indicate whether or not GC and Ring-0 symbols can be resolved now.
111 * This is used early in the init process to avoid trouble with PDM
112 * not being initialized yet.
113 */
114PGM_GST_DECL(int, InitData)(PVM pVM, PPGMMODEDATA pModeData, bool fResolveGCAndR0)
115{
116 Assert(pModeData->uGstType == PGM_GST_TYPE);
117
118 /* Ring-3 */
119 pModeData->pfnR3GstRelocate = PGM_GST_NAME(Relocate);
120 pModeData->pfnR3GstExit = PGM_GST_NAME(Exit);
121 pModeData->pfnR3GstGetPDE = PGM_GST_NAME(GetPDE);
122 pModeData->pfnR3GstGetPage = PGM_GST_NAME(GetPage);
123 pModeData->pfnR3GstModifyPage = PGM_GST_NAME(ModifyPage);
124 pModeData->pfnR3GstMapCR3 = PGM_GST_NAME(MapCR3);
125 pModeData->pfnR3GstUnmapCR3 = PGM_GST_NAME(UnmapCR3);
126 pModeData->pfnR3GstMonitorCR3 = PGM_GST_NAME(MonitorCR3);
127 pModeData->pfnR3GstUnmonitorCR3 = PGM_GST_NAME(UnmonitorCR3);
128
129#if PGM_GST_TYPE == PGM_TYPE_32BIT || PGM_GST_TYPE == PGM_TYPE_PAE
130 pModeData->pfnR3GstWriteHandlerCR3 = PGM_GST_NAME(WriteHandlerCR3);
131 pModeData->pszR3GstWriteHandlerCR3 = "Guest CR3 Write access handler";
132 pModeData->pfnR3GstPAEWriteHandlerCR3 = PGM_GST_NAME(WriteHandlerCR3);
133 pModeData->pszR3GstPAEWriteHandlerCR3 = "Guest CR3 Write access handler (PAE)";
134#else
135 pModeData->pfnR3GstWriteHandlerCR3 = NULL;
136 pModeData->pszR3GstWriteHandlerCR3 = NULL;
137 pModeData->pfnR3GstPAEWriteHandlerCR3 = NULL;
138 pModeData->pszR3GstPAEWriteHandlerCR3 = NULL;
139#endif
140
141 if (fResolveGCAndR0)
142 {
143 int rc;
144
145 /* GC */
146 rc = PDMR3GetSymbolGC(pVM, NULL, PGM_GST_NAME_GC_STR(GetPage), &pModeData->pfnGCGstGetPage);
147 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_GC_STR(GetPage), rc), rc);
148 rc = PDMR3GetSymbolGC(pVM, NULL, PGM_GST_NAME_GC_STR(ModifyPage), &pModeData->pfnGCGstModifyPage);
149 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_GC_STR(ModifyPage), rc), rc);
150 rc = PDMR3GetSymbolGC(pVM, NULL, PGM_GST_NAME_GC_STR(GetPDE), &pModeData->pfnGCGstGetPDE);
151 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_GC_STR(GetPDE), rc), rc);
152 rc = PDMR3GetSymbolGC(pVM, NULL, PGM_GST_NAME_GC_STR(MonitorCR3), &pModeData->pfnGCGstMonitorCR3);
153 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_GC_STR(MonitorCR3), rc), rc);
154 rc = PDMR3GetSymbolGC(pVM, NULL, PGM_GST_NAME_GC_STR(UnmonitorCR3), &pModeData->pfnGCGstUnmonitorCR3);
155 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_GC_STR(UnmonitorCR3), rc), rc);
156 rc = PDMR3GetSymbolGC(pVM, NULL, PGM_GST_NAME_GC_STR(MapCR3), &pModeData->pfnGCGstMapCR3);
157 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_GC_STR(MapCR3), rc), rc);
158 rc = PDMR3GetSymbolGC(pVM, NULL, PGM_GST_NAME_GC_STR(UnmapCR3), &pModeData->pfnGCGstUnmapCR3);
159 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_GC_STR(UnmapCR3), rc), rc);
160#if PGM_GST_TYPE == PGM_TYPE_32BIT || PGM_GST_TYPE == PGM_TYPE_PAE
161 rc = PDMR3GetSymbolGC(pVM, NULL, PGM_GST_NAME_GC_STR(WriteHandlerCR3), &pModeData->pfnGCGstWriteHandlerCR3);
162 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_GC_STR(WriteHandlerCR3), rc), rc);
163 rc = PDMR3GetSymbolGC(pVM, NULL, PGM_GST_NAME_GC_STR(WriteHandlerCR3), &pModeData->pfnGCGstPAEWriteHandlerCR3);
164 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_GC_STR(PAEWriteHandlerCR3), rc), rc);
165#endif
166
167 /* Ring-0 */
168 rc = PDMR3GetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(GetPage), &pModeData->pfnR0GstGetPage);
169 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_R0_STR(GetPage), rc), rc);
170 rc = PDMR3GetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(ModifyPage), &pModeData->pfnR0GstModifyPage);
171 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_R0_STR(ModifyPage), rc), rc);
172 rc = PDMR3GetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(GetPDE), &pModeData->pfnR0GstGetPDE);
173 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_R0_STR(GetPDE), rc), rc);
174 rc = PDMR3GetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(MonitorCR3), &pModeData->pfnR0GstMonitorCR3);
175 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_R0_STR(MonitorCR3), rc), rc);
176 rc = PDMR3GetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(UnmonitorCR3), &pModeData->pfnR0GstUnmonitorCR3);
177 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_R0_STR(UnmonitorCR3), rc), rc);
178 rc = PDMR3GetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(MapCR3), &pModeData->pfnR0GstMapCR3);
179 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_R0_STR(MapCR3), rc), rc);
180 rc = PDMR3GetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(UnmapCR3), &pModeData->pfnR0GstUnmapCR3);
181 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_R0_STR(UnmapCR3), rc), rc);
182#if PGM_GST_TYPE == PGM_TYPE_32BIT || PGM_GST_TYPE == PGM_TYPE_PAE
183 rc = PDMR3GetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(WriteHandlerCR3), &pModeData->pfnR0GstWriteHandlerCR3);
184 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_R0_STR(WriteHandlerCR3), rc), rc);
185 rc = PDMR3GetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(WriteHandlerCR3), &pModeData->pfnR0GstPAEWriteHandlerCR3);
186 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_R0_STR(PAEWriteHandlerCR3), rc), rc);
187#endif
188 }
189
190 return VINF_SUCCESS;
191}
192
193
194/**
195 * Enters the guest mode.
196 *
197 * @returns VBox status code.
198 * @param pVM VM handle.
199 * @param GCPhysCR3 The physical address from the CR3 register.
200 */
201PGM_GST_DECL(int, Enter)(PVM pVM, RTGCPHYS GCPhysCR3)
202{
203 /*
204 * Map and monitor CR3
205 */
206 int rc = PGM_GST_NAME(MapCR3)(pVM, GCPhysCR3);
207 if (VBOX_SUCCESS(rc) && !pVM->pgm.s.fMappingsFixed)
208 rc = PGM_GST_NAME(MonitorCR3)(pVM, GCPhysCR3);
209 return rc;
210}
211
212
213/**
214 * Relocate any GC pointers related to guest mode paging.
215 *
216 * @returns VBox status code.
217 * @param pVM The VM handle.
218 * @param offDelta The reloation offset.
219 */
220PGM_GST_DECL(int, Relocate)(PVM pVM, RTGCUINTPTR offDelta)
221{
222 /* nothing special to do here - InitData does the job. */
223 return VINF_SUCCESS;
224}
225
226
227/**
228 * Exits the guest mode.
229 *
230 * @returns VBox status code.
231 * @param pVM VM handle.
232 */
233PGM_GST_DECL(int, Exit)(PVM pVM)
234{
235 int rc = PGM_GST_NAME(UnmonitorCR3)(pVM);
236 if (VBOX_SUCCESS(rc))
237 rc = PGM_GST_NAME(UnmapCR3)(pVM);
238 return rc;
239}
240
241
242#if PGM_GST_TYPE == PGM_TYPE_32BIT
243/**
244 * Physical write access for the Guest CR3 in 32-bit mode.
245 *
246 * @returns VINF_SUCCESS if the handler have carried out the operation.
247 * @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
248 * @param pVM VM Handle.
249 * @param GCPhys The physical address the guest is writing to.
250 * @param pvPhys The HC mapping of that address.
251 * @param pvBuf What the guest is reading/writing.
252 * @param cbBuf How much it's reading/writing.
253 * @param enmAccessType The access type.
254 * @param pvUser User argument.
255 */
256static DECLCALLBACK(int) pgmR3Gst32BitWriteHandlerCR3(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser)
257{
258 AssertMsg(!pVM->pgm.s.fMappingsFixed, ("Shouldn't be registered when mappings are fixed!\n"));
259 Assert(enmAccessType == PGMACCESSTYPE_WRITE);
260 Log2(("pgmR3Gst32BitWriteHandlerCR3: ff=%#x GCPhys=%VGp pvPhys=%p cbBuf=%d pvBuf={%.*Vhxs}\n", pVM->fForcedActions, GCPhys, pvPhys, cbBuf, cbBuf, pvBuf));
261
262 /*
263 * Do the write operation.
264 */
265 memcpy(pvPhys, pvBuf, cbBuf);
266 if ( !pVM->pgm.s.fMappingsFixed
267 && !VM_FF_ISPENDING(pVM, VM_FF_PGM_SYNC_CR3 | VM_FF_PGM_SYNC_CR3_NON_GLOBAL))
268 {
269 /*
270 * Check for conflicts.
271 */
272 const RTGCUINTPTR offPD = GCPhys & PAGE_OFFSET_MASK;
273 const unsigned iPD1 = offPD / sizeof(X86PDE);
274 const unsigned iPD2 = (offPD + cbBuf - 1) / sizeof(X86PDE);
275 Assert(iPD1 - iPD2 <= 1);
276 if ( ( pVM->pgm.s.pGuestPDHC->a[iPD1].n.u1Present
277 && pgmGetMapping(pVM, iPD1 << X86_PD_SHIFT) )
278 || ( iPD1 != iPD2
279 && pVM->pgm.s.pGuestPDHC->a[iPD2].n.u1Present
280 && pgmGetMapping(pVM, iPD2 << X86_PD_SHIFT) )
281 )
282 {
283 Log(("pgmR3Gst32BitWriteHandlerCR3: detected conflict. iPD1=%#x iPD2=%#x GCPhys=%VGp\n", iPD1, iPD2, GCPhys));
284 STAM_COUNTER_INC(&pVM->pgm.s.StatHCGuestPDWriteConflict);
285 VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3);
286 }
287 }
288
289 STAM_COUNTER_INC(&pVM->pgm.s.StatHCGuestPDWrite);
290 return VINF_SUCCESS;
291}
292#endif /* 32BIT */
293
294
295#if PGM_GST_TYPE == PGM_TYPE_PAE
296/**
297 * Physical write access handler for the Guest CR3 in PAE mode.
298 *
299 * @returns VINF_SUCCESS if the handler have carried out the operation.
300 * @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
301 * @param pVM VM Handle.
302 * @param GCPhys The physical address the guest is writing to.
303 * @param pvPhys The HC mapping of that address.
304 * @param pvBuf What the guest is reading/writing.
305 * @param cbBuf How much it's reading/writing.
306 * @param enmAccessType The access type.
307 * @param pvUser User argument.
308 */
309static DECLCALLBACK(int) pgmR3GstPAEWriteHandlerCR3(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser)
310{
311 AssertMsg(!pVM->pgm.s.fMappingsFixed, ("Shouldn't be registered when mappings are fixed!\n"));
312 Assert(enmAccessType == PGMACCESSTYPE_WRITE);
313 Log2(("pgmR3GstPAEWriteHandlerCR3: ff=%#x GCPhys=%VGp pvPhys=%p cbBuf=%d pvBuf={%.*Vhxs}\n", pVM->fForcedActions, GCPhys, pvPhys, cbBuf, cbBuf, pvBuf));
314
315 /*
316 * Do the write operation.
317 */
318 memcpy(pvPhys, pvBuf, cbBuf);
319 if ( !pVM->pgm.s.fMappingsFixed
320 && !VM_FF_ISPENDING(pVM, VM_FF_PGM_SYNC_CR3 | VM_FF_PGM_SYNC_CR3_NON_GLOBAL))
321 {
322 /*
323 * Check if any of the PDs have changed.
324 * We'll simply check all of them instead of figuring out which one/two to check.
325 */
326 for (unsigned i = 0; i < 4; i++)
327 {
328 if ( pVM->pgm.s.pGstPaePDPTRHC->a[i].n.u1Present
329 && (pVM->pgm.s.pGstPaePDPTRHC->a[i].u & X86_PDPE_PG_MASK) != pVM->pgm.s.aGCPhysGstPaePDsMonitored[i])
330 {
331 Log(("pgmR3GstPAEWriteHandlerCR3: detected updated PDPE; [%d] = %#llx, Old GCPhys=%VGp\n",
332 i, pVM->pgm.s.pGstPaePDPTRHC->a[i].u, pVM->pgm.s.aGCPhysGstPaePDsMonitored[i]));
333 /*
334 * The PD has changed.
335 * We will schedule a monitoring update for the next TLB Flush,
336 * InvalidatePage or SyncCR3.
337 *
338 * This isn't perfect, because a lazy page sync might be dealing with an half
339 * updated PDPE. However, we assume that the guest OS is disabling interrupts
340 * and being extremely careful (cmpxchg8b) when updating a PDPE where it's
341 * executing.
342 */
343 pVM->pgm.s.fSyncFlags |= PGM_SYNC_MONITOR_CR3;
344 }
345 }
346 }
347 /*
348 * Flag a updating of the monitor at the next crossroad so we don't monitor the
349 * wrong pages for soo long that they can be reused as code pages and freak out
350 * the recompiler or something.
351 */
352 else
353 pVM->pgm.s.fSyncFlags |= PGM_SYNC_MONITOR_CR3;
354
355
356 STAM_COUNTER_INC(&pVM->pgm.s.StatHCGuestPDWrite);
357 return VINF_SUCCESS;
358}
359
360# if 0
361/**
362 * Physical write access for Guest CR3.
363 *
364 * @returns VINF_SUCCESS if the handler have carried out the operation.
365 * @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
366 * @param pVM VM Handle.
367 * @param GCPhys The physical address the guest is writing to.
368 * @param pvPhys The HC mapping of that address.
369 * @param pvBuf What the guest is reading/writing.
370 * @param cbBuf How much it's reading/writing.
371 * @param enmAccessType The access type.
372 * @param pvUser User argument.
373 */
374static DECLCALLBACK(int) pgmR3GstPAEWriteHandlerPD(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser)
375{
376 AssertMsg(!pVM->pgm.s.fMappingsFixed, ("Shouldn't be registered when mappings are fixed!\n"));
377 Assert(enmAccessType == PGMACCESSTYPE_WRITE);
378 Log2(("pgmR3GstPAEWriteHandlerPD: ff=%#x GCPhys=%VGp pvPhys=%p cbBuf=%d pvBuf={%.*Vhxs}\n", pVM->fForcedActions, GCPhys, pvPhys, cbBuf, cbBuf, pvBuf));
379
380 /*
381 * Do the write operation.
382 */
383 memcpy(pvPhys, pvBuf, cbBuf);
384 if ( !pVM->pgm.s.fMappingsFixed
385 && !VM_FF_ISPENDING(pVM, VM_FF_PGM_SYNC_CR3 | VM_FF_PGM_SYNC_CR3_NON_GLOBAL))
386 {
387 /*
388 * Figure out which of the 4 PDs this is.
389 */
390 unsigned i;
391 for (i = 0; i < 4; i++)
392 if (pVM->pgm.s.pGstPaePDPTRHC->a[i].u == (GCPhys & X86_PTE_PAE_PG_MASK))
393 {
394 PX86PDPAE pPDSrc = pgmGstGetPaePD(&pVM->pgm.s, i << X86_PDPTR_SHIFT);
395 const RTGCUINTPTR offPD = GCPhys & PAGE_OFFSET_MASK;
396 const unsigned iPD1 = offPD / sizeof(X86PDEPAE);
397 const unsigned iPD2 = (offPD + cbBuf - 1) / sizeof(X86PDEPAE);
398 Assert(iPD1 - iPD2 <= 1);
399 if ( ( pPDSrc->a[iPD1].n.u1Present
400 && pgmGetMapping(pVM, (i << X86_PDPTR_SHIFT) | (iPD1 << X86_PD_PAE_SHIFT)) )
401 || ( iPD1 != iPD2
402 && pPDSrc->a[iPD2].n.u1Present
403 && pgmGetMapping(pVM, (i << X86_PDPTR_SHIFT) | (iPD2 << X86_PD_PAE_SHIFT)) )
404 )
405 {
406 Log(("pgmR3GstPaePD3WriteHandler: detected conflict. i=%d iPD1=%#x iPD2=%#x GCPhys=%VGp\n",
407 i, iPD1, iPD2, GCPhys));
408 STAM_COUNTER_INC(&pVM->pgm.s.StatHCGuestPDWriteConflict);
409 VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3);
410 }
411 break; /* ASSUMES no duplicate entries... */
412 }
413 Assert(i < 4);
414 }
415
416 STAM_COUNTER_INC(&pVM->pgm.s.StatHCGuestPDWrite);
417 return VINF_SUCCESS;
418}
419# endif
420#endif /* PAE */
421
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