VirtualBox

source: vbox/trunk/src/VBox/VMM/PGMGst.h@ 4632

Last change on this file since 4632 was 4071, checked in by vboxsync, 17 years ago

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1/* $Id: PGMGst.h 4071 2007-08-07 17:07:59Z vboxsync $ */
2/** @file
3 * VBox - Page Manager / Monitor, Guest Paging Template.
4 */
5
6/*
7 * Copyright (C) 2006-2007 innotek GmbH
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License as published by the Free Software Foundation,
13 * in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
14 * distribution. VirtualBox OSE is distributed in the hope that it will
15 * be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18/*******************************************************************************
19* Defined Constants And Macros *
20*******************************************************************************/
21#undef GSTPT
22#undef PGSTPT
23#undef GSTPTE
24#undef PGSTPTE
25#undef GSTPD
26#undef PGSTPD
27#undef GSTPDE
28#undef PGSTPDE
29#undef GST_BIG_PAGE_SIZE
30#undef GST_BIG_PAGE_OFFSET_MASK
31#undef GST_PDE_PG_MASK
32#undef GST_PDE4M_PG_MASK
33#undef GST_PD_SHIFT
34#undef GST_PD_MASK
35#undef GST_PTE_PG_MASK
36#undef GST_PT_SHIFT
37#undef GST_PT_MASK
38
39#if PGM_GST_TYPE == PGM_TYPE_32BIT
40# define GSTPT X86PT
41# define PGSTPT PX86PT
42# define GSTPTE X86PTE
43# define PGSTPTE PX86PTE
44# define GSTPD X86PD
45# define PGSTPD PX86PD
46# define GSTPDE X86PDE
47# define PGSTPDE PX86PDE
48# define GST_BIG_PAGE_SIZE X86_PAGE_4M_SIZE
49# define GST_BIG_PAGE_OFFSET_MASK X86_PAGE_4M_OFFSET_MASK
50# define GST_PDE_PG_MASK X86_PDE_PG_MASK
51# define GST_PDE4M_PG_MASK X86_PDE4M_PG_MASK
52# define GST_PD_SHIFT X86_PD_SHIFT
53# define GST_PD_MASK X86_PD_MASK
54# define GST_PTE_PG_MASK X86_PTE_PG_MASK
55# define GST_PT_SHIFT X86_PT_SHIFT
56# define GST_PT_MASK X86_PT_MASK
57#else
58# define GSTPT X86PTPAE
59# define PGSTPT PX86PTPAE
60# define GSTPTE X86PTEPAE
61# define PGSTPTE PX86PTEPAE
62# define GSTPD X86PDPAE
63# define PGSTPD PX86PDPAE
64# define GSTPDE X86PDEPAE
65# define PGSTPDE PX86PDEPAE
66# define GST_BIG_PAGE_SIZE X86_PAGE_2M_SIZE
67# define GST_BIG_PAGE_OFFSET_MASK X86_PAGE_2M_OFFSET_MASK
68# define GST_PDE_PG_MASK X86_PDE_PAE_PG_MASK
69# define GST_PDE4M_PG_MASK X86_PDE4M_PAE_PG_MASK
70# define GST_PD_SHIFT X86_PD_PAE_SHIFT
71# define GST_PD_MASK X86_PD_PAE_MASK
72# define GST_PTE_PG_MASK X86_PTE_PAE_PG_MASK
73# define GST_PT_SHIFT X86_PT_PAE_SHIFT
74# define GST_PT_MASK X86_PT_PAE_MASK
75#endif
76
77
78/*******************************************************************************
79* Internal Functions *
80*******************************************************************************/
81__BEGIN_DECLS
82/* r3 */
83PGM_GST_DECL(int, InitData)(PVM pVM, PPGMMODEDATA pModeData, bool fResolveGCAndR0);
84PGM_GST_DECL(int, Enter)(PVM pVM, RTGCPHYS GCPhysCR3);
85PGM_GST_DECL(int, Relocate)(PVM pVM, RTGCUINTPTR offDelta);
86PGM_GST_DECL(int, Exit)(PVM pVM);
87
88static DECLCALLBACK(int) pgmR3Gst32BitWriteHandlerCR3(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser);
89static DECLCALLBACK(int) pgmR3GstPAEWriteHandlerCR3(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser);
90#if 0
91static DECLCALLBACK(int) pgmR3GstPAEWriteHandlerPD(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser);
92#endif
93
94/* all */
95PGM_GST_DECL(int, GetPage)(PVM pVM, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTGCPHYS pGCPhys);
96PGM_GST_DECL(int, ModifyPage)(PVM pVM, RTGCUINTPTR GCPtr, size_t cb, uint64_t fFlags, uint64_t fMask);
97PGM_GST_DECL(int, GetPDE)(PVM pVM, RTGCUINTPTR GCPtr, PX86PDEPAE pPDE);
98PGM_GST_DECL(int, MapCR3)(PVM pVM, RTGCPHYS GCPhysCR3);
99PGM_GST_DECL(int, UnmapCR3)(PVM pVM);
100PGM_GST_DECL(int, MonitorCR3)(PVM pVM, RTGCPHYS GCPhysCR3);
101PGM_GST_DECL(int, UnmonitorCR3)(PVM pVM);
102__END_DECLS
103
104
105/**
106 * Initializes the guest bit of the paging mode data.
107 *
108 * @returns VBox status code.
109 * @param pVM The VM handle.
110 * @param fResolveGCAndR0 Indicate whether or not GC and Ring-0 symbols can be resolved now.
111 * This is used early in the init process to avoid trouble with PDM
112 * not being initialized yet.
113 */
114PGM_GST_DECL(int, InitData)(PVM pVM, PPGMMODEDATA pModeData, bool fResolveGCAndR0)
115{
116 Assert(pModeData->uGstType == PGM_GST_TYPE);
117
118 /* Ring-3 */
119 pModeData->pfnR3GstRelocate = PGM_GST_NAME(Relocate);
120 pModeData->pfnR3GstExit = PGM_GST_NAME(Exit);
121 pModeData->pfnR3GstGetPDE = PGM_GST_NAME(GetPDE);
122 pModeData->pfnR3GstGetPage = PGM_GST_NAME(GetPage);
123 pModeData->pfnR3GstModifyPage = PGM_GST_NAME(ModifyPage);
124 pModeData->pfnR3GstMapCR3 = PGM_GST_NAME(MapCR3);
125 pModeData->pfnR3GstUnmapCR3 = PGM_GST_NAME(UnmapCR3);
126 pModeData->pfnR3GstMonitorCR3 = PGM_GST_NAME(MonitorCR3);
127 pModeData->pfnR3GstUnmonitorCR3 = PGM_GST_NAME(UnmonitorCR3);
128
129#if PGM_GST_TYPE == PGM_TYPE_32BIT || PGM_GST_TYPE == PGM_TYPE_PAE
130 pModeData->pfnHCGstWriteHandlerCR3 = PGM_GST_NAME(WriteHandlerCR3);
131 pModeData->pszHCGstWriteHandlerCR3 = "Guest CR3 Write access handler";
132#else
133 pModeData->pfnHCGstWriteHandlerCR3 = NULL;
134 pModeData->pszHCGstWriteHandlerCR3 = NULL;
135 pModeData->pfnGCGstWriteHandlerCR3 = 0;
136#endif
137
138 if (fResolveGCAndR0)
139 {
140 int rc;
141
142 /* GC */
143 rc = PDMR3GetSymbolGC(pVM, NULL, PGM_GST_NAME_GC_STR(GetPage), &pModeData->pfnGCGstGetPage);
144 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_GC_STR(GetPage), rc), rc);
145 rc = PDMR3GetSymbolGC(pVM, NULL, PGM_GST_NAME_GC_STR(ModifyPage), &pModeData->pfnGCGstModifyPage);
146 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_GC_STR(ModifyPage), rc), rc);
147 rc = PDMR3GetSymbolGC(pVM, NULL, PGM_GST_NAME_GC_STR(GetPDE), &pModeData->pfnGCGstGetPDE);
148 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_GC_STR(GetPDE), rc), rc);
149 rc = PDMR3GetSymbolGC(pVM, NULL, PGM_GST_NAME_GC_STR(MonitorCR3), &pModeData->pfnGCGstMonitorCR3);
150 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_GC_STR(MonitorCR3), rc), rc);
151 rc = PDMR3GetSymbolGC(pVM, NULL, PGM_GST_NAME_GC_STR(UnmonitorCR3), &pModeData->pfnGCGstUnmonitorCR3);
152 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_GC_STR(UnmonitorCR3), rc), rc);
153 rc = PDMR3GetSymbolGC(pVM, NULL, PGM_GST_NAME_GC_STR(MapCR3), &pModeData->pfnGCGstMapCR3);
154 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_GC_STR(MapCR3), rc), rc);
155 rc = PDMR3GetSymbolGC(pVM, NULL, PGM_GST_NAME_GC_STR(UnmapCR3), &pModeData->pfnGCGstUnmapCR3);
156 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_GC_STR(UnmapCR3), rc), rc);
157#if PGM_GST_TYPE == PGM_TYPE_32BIT || PGM_GST_TYPE == PGM_TYPE_PAE
158 rc = PDMR3GetSymbolGC(pVM, NULL, PGM_GST_NAME_GC_STR(WriteHandlerCR3), &pModeData->pfnGCGstWriteHandlerCR3);
159 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_GC_STR(WriteHandlerCR3), rc), rc);
160#endif
161
162 /* Ring-0 */
163 rc = PDMR3GetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(GetPage), &pModeData->pfnR0GstGetPage);
164 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_R0_STR(GetPage), rc), rc);
165 rc = PDMR3GetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(ModifyPage), &pModeData->pfnR0GstModifyPage);
166 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_R0_STR(ModifyPage), rc), rc);
167 rc = PDMR3GetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(GetPDE), &pModeData->pfnR0GstGetPDE);
168 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_R0_STR(GetPDE), rc), rc);
169 rc = PDMR3GetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(MonitorCR3), &pModeData->pfnR0GstMonitorCR3);
170 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_R0_STR(MonitorCR3), rc), rc);
171 rc = PDMR3GetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(UnmonitorCR3), &pModeData->pfnR0GstUnmonitorCR3);
172 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_R0_STR(UnmonitorCR3), rc), rc);
173 rc = PDMR3GetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(MapCR3), &pModeData->pfnR0GstMapCR3);
174 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_R0_STR(MapCR3), rc), rc);
175 rc = PDMR3GetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(UnmapCR3), &pModeData->pfnR0GstUnmapCR3);
176 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_R0_STR(UnmapCR3), rc), rc);
177#if PGM_GST_TYPE == PGM_TYPE_32BIT || PGM_GST_TYPE == PGM_TYPE_PAE
178# if 0/** @todo ring-0. */
179 rc = PDMR3GetSymbolR0(pVM, NULL, PGM_GST_NAME_R0_STR(WriteHandlerCR3), &pModeData->pfnR0GstWriteHandlerCR3);
180 AssertMsgRCReturn(rc, ("%s -> rc=%Vrc\n", PGM_GST_NAME_R0_STR(WriteHandlerCR3), rc), rc);
181# endif
182#endif
183 }
184
185 return VINF_SUCCESS;
186}
187
188
189/**
190 * Enters the guest mode.
191 *
192 * @returns VBox status code.
193 * @param pVM VM handle.
194 * @param GCPhysCR3 The physical address from the CR3 register.
195 */
196PGM_GST_DECL(int, Enter)(PVM pVM, RTGCPHYS GCPhysCR3)
197{
198 /*
199 * Map and monitor CR3
200 */
201 int rc = PGM_GST_NAME(MapCR3)(pVM, GCPhysCR3);
202 if (VBOX_SUCCESS(rc) && !pVM->pgm.s.fMappingsFixed)
203 rc = PGM_GST_NAME(MonitorCR3)(pVM, GCPhysCR3);
204 return rc;
205}
206
207
208/**
209 * Relocate any GC pointers related to guest mode paging.
210 *
211 * @returns VBox status code.
212 * @param pVM The VM handle.
213 * @param offDelta The reloation offset.
214 */
215PGM_GST_DECL(int, Relocate)(PVM pVM, RTGCUINTPTR offDelta)
216{
217 /* nothing special to do here - InitData does the job. */
218 return VINF_SUCCESS;
219}
220
221
222/**
223 * Exits the guest mode.
224 *
225 * @returns VBox status code.
226 * @param pVM VM handle.
227 */
228PGM_GST_DECL(int, Exit)(PVM pVM)
229{
230 int rc = PGM_GST_NAME(UnmonitorCR3)(pVM);
231 if (VBOX_SUCCESS(rc))
232 rc = PGM_GST_NAME(UnmapCR3)(pVM);
233 return rc;
234}
235
236
237#if PGM_GST_TYPE == PGM_TYPE_32BIT
238/**
239 * Physical write access for the Guest CR3 in 32-bit mode.
240 *
241 * @returns VINF_SUCCESS if the handler have carried out the operation.
242 * @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
243 * @param pVM VM Handle.
244 * @param GCPhys The physical address the guest is writing to.
245 * @param pvPhys The HC mapping of that address.
246 * @param pvBuf What the guest is reading/writing.
247 * @param cbBuf How much it's reading/writing.
248 * @param enmAccessType The access type.
249 * @param pvUser User argument.
250 */
251static DECLCALLBACK(int) pgmR3Gst32BitWriteHandlerCR3(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser)
252{
253 AssertMsg(!pVM->pgm.s.fMappingsFixed, ("Shouldn't be registered when mappings are fixed!\n"));
254 Assert(enmAccessType == PGMACCESSTYPE_WRITE);
255 Log2(("pgmR3Gst32BitWriteHandlerCR3: ff=%#x GCPhys=%VGp pvPhys=%p cbBuf=%d pvBuf={%.*Vhxs}\n", pVM->fForcedActions, GCPhys, pvPhys, cbBuf, cbBuf, pvBuf));
256
257 /*
258 * Do the write operation.
259 */
260 memcpy(pvPhys, pvBuf, cbBuf);
261 if ( !pVM->pgm.s.fMappingsFixed
262 && !VM_FF_ISPENDING(pVM, VM_FF_PGM_SYNC_CR3 | VM_FF_PGM_SYNC_CR3_NON_GLOBAL))
263 {
264 /*
265 * Check for conflicts.
266 */
267 const RTGCUINTPTR offPD = GCPhys & PAGE_OFFSET_MASK;
268 const unsigned iPD1 = offPD / sizeof(X86PDE);
269 const unsigned iPD2 = (offPD + cbBuf - 1) / sizeof(X86PDE);
270 Assert(iPD1 - iPD2 <= 1);
271 if ( ( pVM->pgm.s.pGuestPDHC->a[iPD1].n.u1Present
272 && pgmGetMapping(pVM, iPD1 << X86_PD_SHIFT) )
273 || ( iPD1 != iPD2
274 && pVM->pgm.s.pGuestPDHC->a[iPD2].n.u1Present
275 && pgmGetMapping(pVM, iPD2 << X86_PD_SHIFT) )
276 )
277 {
278 Log(("pgmR3Gst32BitWriteHandlerCR3: detected conflict. iPD1=%#x iPD2=%#x GCPhys=%VGp\n", iPD1, iPD2, GCPhys));
279 STAM_COUNTER_INC(&pVM->pgm.s.StatHCGuestPDWriteConflict);
280 VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3);
281 }
282 }
283
284 STAM_COUNTER_INC(&pVM->pgm.s.StatHCGuestPDWrite);
285 return VINF_SUCCESS;
286}
287#endif /* 32BIT */
288
289
290#if PGM_GST_TYPE == PGM_TYPE_PAE
291/**
292 * Physical write access handler for the Guest CR3 in PAE mode.
293 *
294 * @returns VINF_SUCCESS if the handler have carried out the operation.
295 * @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
296 * @param pVM VM Handle.
297 * @param GCPhys The physical address the guest is writing to.
298 * @param pvPhys The HC mapping of that address.
299 * @param pvBuf What the guest is reading/writing.
300 * @param cbBuf How much it's reading/writing.
301 * @param enmAccessType The access type.
302 * @param pvUser User argument.
303 */
304static DECLCALLBACK(int) pgmR3GstPAEWriteHandlerCR3(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser)
305{
306 AssertMsg(!pVM->pgm.s.fMappingsFixed, ("Shouldn't be registered when mappings are fixed!\n"));
307 Assert(enmAccessType == PGMACCESSTYPE_WRITE);
308 Log2(("pgmR3GstPAEWriteHandlerCR3: ff=%#x GCPhys=%VGp pvPhys=%p cbBuf=%d pvBuf={%.*Vhxs}\n", pVM->fForcedActions, GCPhys, pvPhys, cbBuf, cbBuf, pvBuf));
309
310 /*
311 * Do the write operation.
312 */
313 memcpy(pvPhys, pvBuf, cbBuf);
314 if ( !pVM->pgm.s.fMappingsFixed
315 && !VM_FF_ISPENDING(pVM, VM_FF_PGM_SYNC_CR3 | VM_FF_PGM_SYNC_CR3_NON_GLOBAL))
316 {
317 /*
318 * Check if any of the PDs have changed.
319 * We'll simply check all of them instead of figuring out which one/two to check.
320 */
321 for (unsigned i = 0; i < 4; i++)
322 {
323 if ( pVM->pgm.s.pGstPaePDPTRHC->a[i].n.u1Present
324 && (pVM->pgm.s.pGstPaePDPTRHC->a[i].u & X86_PDPE_PG_MASK) != pVM->pgm.s.aGCPhysGstPaePDsMonitored[i])
325 {
326 Log(("pgmR3GstPAEWriteHandlerCR3: detected updated PDPE; [%d] = %#llx, Old GCPhys=%VGp\n",
327 i, pVM->pgm.s.pGstPaePDPTRHC->a[i].u, pVM->pgm.s.aGCPhysGstPaePDsMonitored[i]));
328 /*
329 * The PD has changed.
330 * We will schedule a monitoring update for the next TLB Flush,
331 * InvalidatePage or SyncCR3.
332 *
333 * This isn't perfect, because a lazy page sync might be dealing with an half
334 * updated PDPE. However, we assume that the guest OS is disabling interrupts
335 * and being extremely careful (cmpxchg8b) when updating a PDPE where it's
336 * executing.
337 */
338 pVM->pgm.s.fSyncFlags |= PGM_SYNC_MONITOR_CR3;
339 }
340 }
341 }
342 /*
343 * Flag a updating of the monitor at the next crossroad so we don't monitor the
344 * wrong pages for soo long that they can be reused as code pages and freak out
345 * the recompiler or something.
346 */
347 else
348 pVM->pgm.s.fSyncFlags |= PGM_SYNC_MONITOR_CR3;
349
350
351 STAM_COUNTER_INC(&pVM->pgm.s.StatHCGuestPDWrite);
352 return VINF_SUCCESS;
353}
354
355# if 0
356/**
357 * Physical write access for Guest CR3.
358 *
359 * @returns VINF_SUCCESS if the handler have carried out the operation.
360 * @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
361 * @param pVM VM Handle.
362 * @param GCPhys The physical address the guest is writing to.
363 * @param pvPhys The HC mapping of that address.
364 * @param pvBuf What the guest is reading/writing.
365 * @param cbBuf How much it's reading/writing.
366 * @param enmAccessType The access type.
367 * @param pvUser User argument.
368 */
369static DECLCALLBACK(int) pgmR3GstPAEWriteHandlerPD(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser)
370{
371 AssertMsg(!pVM->pgm.s.fMappingsFixed, ("Shouldn't be registered when mappings are fixed!\n"));
372 Assert(enmAccessType == PGMACCESSTYPE_WRITE);
373 Log2(("pgmR3GstPAEWriteHandlerPD: ff=%#x GCPhys=%VGp pvPhys=%p cbBuf=%d pvBuf={%.*Vhxs}\n", pVM->fForcedActions, GCPhys, pvPhys, cbBuf, cbBuf, pvBuf));
374
375 /*
376 * Do the write operation.
377 */
378 memcpy(pvPhys, pvBuf, cbBuf);
379 if ( !pVM->pgm.s.fMappingsFixed
380 && !VM_FF_ISPENDING(pVM, VM_FF_PGM_SYNC_CR3 | VM_FF_PGM_SYNC_CR3_NON_GLOBAL))
381 {
382 /*
383 * Figure out which of the 4 PDs this is.
384 */
385 unsigned i;
386 for (i = 0; i < 4; i++)
387 if (pVM->pgm.s.pGstPaePDPTRHC->a[i].u == (GCPhys & X86_PTE_PAE_PG_MASK))
388 {
389 PX86PDPAE pPDSrc = pgmGstGetPaePD(&pVM->pgm.s, i << X86_PDPTR_SHIFT);
390 const RTGCUINTPTR offPD = GCPhys & PAGE_OFFSET_MASK;
391 const unsigned iPD1 = offPD / sizeof(X86PDEPAE);
392 const unsigned iPD2 = (offPD + cbBuf - 1) / sizeof(X86PDEPAE);
393 Assert(iPD1 - iPD2 <= 1);
394 if ( ( pPDSrc->a[iPD1].n.u1Present
395 && pgmGetMapping(pVM, (i << X86_PDPTR_SHIFT) | (iPD1 << X86_PD_PAE_SHIFT)) )
396 || ( iPD1 != iPD2
397 && pPDSrc->a[iPD2].n.u1Present
398 && pgmGetMapping(pVM, (i << X86_PDPTR_SHIFT) | (iPD2 << X86_PD_PAE_SHIFT)) )
399 )
400 {
401 Log(("pgmR3GstPaePD3WriteHandler: detected conflict. i=%d iPD1=%#x iPD2=%#x GCPhys=%VGp\n",
402 i, iPD1, iPD2, GCPhys));
403 STAM_COUNTER_INC(&pVM->pgm.s.StatHCGuestPDWriteConflict);
404 VM_FF_SET(pVM, VM_FF_PGM_SYNC_CR3);
405 }
406 break; /* ASSUMES no duplicate entries... */
407 }
408 Assert(i < 4);
409 }
410
411 STAM_COUNTER_INC(&pVM->pgm.s.StatHCGuestPDWrite);
412 return VINF_SUCCESS;
413}
414# endif
415#endif /* PAE */
416
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