1 | /* $Id: PGMCache.h 2981 2007-06-01 16:01:28Z vboxsync $ */
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2 | /** @file
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3 | * VBox - PGM PD Cache Manager
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4 | */
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5 |
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6 | /*
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7 | * Copyright (C) 2006-2007 innotek GmbH
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8 | *
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9 | * This file is part of VirtualBox Open Source Edition (OSE), as
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10 | * available from http://www.virtualbox.org. This file is free software;
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11 | * you can redistribute it and/or modify it under the terms of the GNU
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12 | * General Public License as published by the Free Software Foundation,
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13 | * in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
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14 | * distribution. VirtualBox OSE is distributed in the hope that it will
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15 | * be useful, but WITHOUT ANY WARRANTY of any kind.
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16 | *
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17 | * If you received this file as part of a commercial VirtualBox
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18 | * distribution, then only the terms of your commercial VirtualBox
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19 | * license agreement apply instead of the previous paragraph.
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20 | */
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21 |
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22 | #ifndef __PGMCache_h__
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23 | #define __PGMCache_h__
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24 |
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25 | #if !defined(IN_PGM_R3) && !defined(IN_PGM_R0) && !defined(IN_PGM_GC)
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26 | # error "Not in PGM! This is an internal header!"
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27 | #endif
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28 |
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29 | #define PGMCACHE_PHYSREG_DESCRIPTION "PGM Cache PT write handler"
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30 |
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31 | #define PGMCACHE_MAX_CACHED_PDES 32
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32 | #define PGMCACHE_MAX_CACHED_ENTRIES 8
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33 | #define PGMCACHE_INVALID_INDEX 0xffffffff
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34 |
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35 | #define PGMCACHE_FILL_THRESHOLD 5000
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36 | //#define PGMCACHE_FILL_THRESHOLD 500
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37 | #define PGMCACHE_INSERT_BOOST 500
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38 |
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39 | #define PGMCACHE_SYNCPT_USER_INC 10
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40 | #define PGMCACHE_SYNCPT_SUPERVISOR_INC 20
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41 | #define PGMCACHE_SYNCPAGE_USER_INC 1
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42 | #define PGMCACHE_SYNCPAGE_SUPERVISOR_INC 2
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43 | #define PGMCACHE_CACHE_HIT_INC 50
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44 | #define PGMCACHE_LEAVEGC_DEC -1
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45 | #define PGMCACHE_SIGNIFICANT_PTWRITE_DEC -5
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46 | #define PGMCACHE_PTWRITE_DEC -2
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47 | #define PGMCACHE_UNKNOWN_PTWRITE_DEC -100
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48 | #define PGMCACHE_PDE_CHANGE_DEC -250
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49 | #define PGMCACHE_PDE_CR3_MAPPING -2500
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50 | #define PGMCACHE_PDE_CONFLICT_DEC -1000
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51 | #define PGMCACHE_PDE_CHANGE_HIT_INC (PGMCACHE_CACHE_HIT_INC)
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52 | #define PGMCACHE_MAX_DIRTY_PAGES 4
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53 |
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54 |
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55 | /* define to enable PD caching */
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56 | //#define PGM_PD_CACHING_ENABLED
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57 | #ifdef VBOX_STRICT
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58 | /* define to enable strict PD checking */
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59 | //#define PGM_CACHE_STRICT
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60 | /* define to enable paranoid checking */
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61 | //#define PGM_CACHE_VERY_STRICT
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62 | // #define PGM_CACHE_EXTREMELY_STRICT
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63 | #endif
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64 |
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65 | #define PGMCACHE_GET_ACTIVE_ENTRY(pLine) \
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66 | (pLine->iActiveEntry != PGMCACHE_INVALID_INDEX) ? &pLine->entry[pLine->iActiveEntry] : NULL
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67 |
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68 | typedef struct
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69 | {
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70 | /* Caching score */
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71 | unsigned u29Score : 29;
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72 | /* PD is waiting to be cached */
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73 | unsigned u1Queued : 1;
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74 | /* PD is cached */
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75 | unsigned u1Cached : 1;
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76 | /* Cache disabled flag */
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77 | unsigned u1CacheDisabled : 1;
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78 | } PDESTAT, *PPDESTAT;
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79 |
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80 | typedef struct
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81 | {
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82 | /* Copy of guest PDE */
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83 | X86PDEPAE PdeGst;
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84 | /* Shadow PT physical address */
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85 | RTGCPHYS PtShwPhys;
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86 |
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87 | /* Multiple dirty accesses -> flush entry */
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88 | bool fDirtyFlush;
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89 | /* Dirty flag */
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90 | bool fDirty;
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91 | /* Dirty state is pending until the PD is activated */
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92 | bool fDirtyPending;
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93 |
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94 | /* GC address of PT write */
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95 | RTGCUINTPTR pvFaultDirty[PGMCACHE_MAX_DIRTY_PAGES];
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96 | uint32_t cNumDirtyPages;
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97 |
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98 | /* Cache entry score */
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99 | uint32_t uScore;
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100 |
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101 | /* Cache line index */
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102 | uint32_t iLine;
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103 | /* Cache entry index */
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104 | uint32_t iEntry;
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105 | } PDCACHEENTRY, *PPDCACHEENTRY;
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106 |
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107 | typedef struct
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108 | {
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109 | /* Shadow page directory index (0-2047, PGMCACHE_INVALID_INDEX when unused) */
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110 | uint32_t iPDShw;
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111 | /* Guest context address that corresponds to the shadow iPD */
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112 | RTGCUINTPTR GCPtrPDE;
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113 |
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114 | /* Set when the cache entry is modified */
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115 | bool fRefresh;
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116 |
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117 | uint32_t iPDShwNew;
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118 | uint32_t iPDShwOld;
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119 | /* Currently used cache entry */
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120 | uint32_t iActiveEntry;
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121 | /* Cache index line */
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122 | uint32_t iLine;
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123 |
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124 | PDCACHEENTRY entry[PGMCACHE_MAX_CACHED_ENTRIES];
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125 | } PDCACHELINE, *PPDCACHELINE;
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126 |
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127 |
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128 | typedef struct
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129 | {
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130 | /* Cached PDEs */
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131 | PDCACHELINE line[PGMCACHE_MAX_CACHED_PDES];
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132 |
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133 | /* Lowest score of all cached PDEs. */
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134 | uint32_t ulLowestScore;
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135 | /* Caching statistics for all PDEs. */
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136 | PDESTAT pd[2048];
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137 | /* Set when a cache entry is modified. */
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138 | bool fChanged;
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139 | /* Caching enabled. */
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140 | bool fEnabled;
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141 | /* Max nr of host PDEs (PAE vs 32 bits). */
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142 | uint32_t cbMaxPDEs;
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143 | /* PD shift for host paging. */
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144 | uint32_t ShwPDShift;
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145 | /* PD size for host paging. */
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146 | uint32_t cbShwPD;
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147 |
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148 | #ifdef DEBUG
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149 | uint32_t cr3;
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150 | SUPPAGINGMODE enmHostMode;
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151 | #endif
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152 | } PDCACHE, *PPDCACHE;
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153 |
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154 | /**
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155 | * Initialise PGM caching subsystem
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156 | *
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157 | * @returns VBox status code.
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158 | * @param pVM The virtual machine.
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159 | * @param enmHostMode Host paging mode
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160 | */
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161 | int pgmr3CacheInit(PVM pVM, SUPPAGINGMODE enmHostMode);
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162 |
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163 |
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164 | /**
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165 | * Reset PGM caching subsystem
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166 | *
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167 | * @returns VBox status code.
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168 | * @param pVM The virtual machine.
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169 | * @param enmHostMode Host paging mode
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170 | */
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171 | int pgmr3CacheReset(PVM pVM, SUPPAGINGMODE enmHostMode);
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172 |
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173 |
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174 | /**
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175 | * Inform the PGM Cache Manager when exiting the guest context
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176 | *
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177 | * @returns VBox status code.
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178 | * @param pVM The virtual machine.
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179 | * @param pCtx Current CPU context
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180 | * @param u32Reason Reason for exiting the guest context
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181 | * Currently only for VINF_EM_RAW_INTERRUPT!
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182 | */
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183 | int pgmr3CacheLeaveGC(PVM pVM, PCPUMCTX pCtx, uint32_t u32Reason);
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184 |
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185 |
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186 | /**
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187 | * Inform the PGM Cache Manager about a pending Sync PD action (called
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188 | * from PGMR3SyncPD only!)
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189 | *
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190 | * @returns VBox status code.
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191 | * @param pVM The virtual machine.
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192 | * @param cr0 Current CR0 register value
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193 | * @param cr3 Current CR3 register value
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194 | * @param cr4 Current CR4 register value
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195 | */
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196 | int pgmr3CacheSyncPD(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4);
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197 |
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198 |
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199 | /**
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200 | * Mark all cache lines and entries as dirty.
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201 | *
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202 | * @returns VBox status code.
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203 | * @param pVM The virtual machine.
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204 | */
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205 | int pgmr3CacheGlobalFlush(PVM pVM);
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206 |
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207 |
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208 | #ifdef VBOX_STRICT
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209 | /**
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210 | * Checks the guest and shadow tables for consistency.
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211 | *
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212 | * @returns VBox status code.
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213 | * @param pVM The virtual machine.
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214 | * @param cr0 Current CR0 register value
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215 | * @param cr3 Current CR3 register value
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216 | * @param cr4 Current CR4 register value
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217 | */
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218 | void pgmCacheCheckPD(PVM pVM, uint32_t cr0, uint32_t cr3, uint32_t cr4);
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219 |
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220 | /**
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221 | * Checks the cache line if it is marked dirty.
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222 | *
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223 | * @returns boolean; true if the line is marked dirty, otherwise false
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224 | * @param pVM The virtual machine.
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225 | * @param iPDShw Page directory entry
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226 | */
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227 | bool pgmCacheIsLineDirty(PVM pVM, uint32_t iPDShw);
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228 |
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229 | #else
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230 | #define pgmr3CacheCheckPD(a, b, c, d)
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231 | #define pgmCacheIsLineDirty(a, b) false
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232 | #define pgmCacheCheckPDE(a, b)
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233 | #endif
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234 |
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235 | #ifdef PGM_CACHE_EXTREMELY_STRICT
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236 | /**
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237 | * Check cache line integrity
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238 | *
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239 | * @param pVM The virtual machine.
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240 | * @param pLine Cache line
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241 | * @param pEntry Cache entry
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242 | */
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243 | void pgmCacheCheckIntegrity(PVM pVM, PPDCACHELINE pLine, PPDCACHEENTRY pEntry);
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244 | #else
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245 | #define pgmCacheCheckIntegrity(a, b, c)
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246 | #endif
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247 |
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248 | /**
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249 | * Cache PDE
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250 | *
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251 | * @returns VBox status code.
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252 | * @param pVM The virtual machine.
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253 | * @param iPDShw Page directory index
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254 | */
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255 | int pgmCacheInsertPD(PVM pVM, uint32_t iPDShw);
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256 |
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257 | /**
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258 | * Invalidate cached PDE.
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259 | *
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260 | * @returns VBox status code.
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261 | * @param pVM The virtual machine.
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262 | * @param iLine Cache line index
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263 | * @param penalty Score penalty for invalidation
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264 | */
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265 | int pgmCacheInvalidateLine(PVM pVM, uint32_t iLine, int penalty);
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266 |
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267 |
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268 | /**
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269 | * Invalidate cached PDE
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270 | *
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271 | * @returns VBox status code.
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272 | * @param pVM The virtual machine.
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273 | * @param iPDShw PDE index
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274 | * @param penalty Score penalty for invalidation
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275 | */
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276 | int pgmCacheInvalidate(PVM pVM, uint32_t iPDShw, int penalty);
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277 |
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278 |
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279 | /**
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280 | * Invalidate all cached PDEs
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281 | *
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282 | * @returns VBox status code.
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283 | * @param pVM The virtual machine.
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284 | */
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285 | int pgmCacheInvalidateAll(PVM pVM);
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286 |
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287 |
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288 | /**
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289 | * Update record for specified PD
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290 | *
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291 | * @returns VBox status code.
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292 | * @param pVM The virtual machine.
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293 | * @param iPDShw Page directory index
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294 | * @param delta Score increment/decrement
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295 | */
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296 | int pgmCacheUpdatePD(PVM pVM, uint32_t iPDShw, int delta);
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297 |
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298 |
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299 | /**
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300 | * Update record for specified PD
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301 | *
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302 | * @returns VBox status code.
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303 | * @param pVM The virtual machine.
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304 | * @param iLine Cache line index
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305 | * @param iEntry Cache entry index
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306 | * @param delta Score increment/decrement
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307 | */
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308 | int pgmCacheUpdateEntry(PVM pVM, uint32_t iLine, uint32_t iEntry, int delta);
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309 |
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310 |
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311 | /**
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312 | * Update record for specified PD + all cache entries
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313 | *
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314 | * @returns VBox status code.
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315 | * @param pVM The virtual machine.
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316 | * @param iPDShw Page directory index
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317 | * @param delta Score increment/decrement
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318 | */
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319 | int pgmCacheUpdateAll(PVM pVM, uint32_t iPDShw, int delta);
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320 |
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321 |
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322 | /**
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323 | * Remove the handler for the supplied physical page
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324 | * (@todo maybe this should be a physical range instead )
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325 | *
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326 | * @returns VBox status code.
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327 | * @param pVM The virtual machine.
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328 | * @param GCPhys GC physical address
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329 | */
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330 | int pgmCacheRemovePhyshandler(PVM pVM, RTGCPHYS GCPhys);
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331 |
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332 |
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333 | /**
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334 | * Check if a page directory entry is cached
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335 | *
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336 | * @returns true if cached, otherwise false
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337 | * @param pPdCache PGM cache record pointer
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338 | * @param iPDShw Page directory index
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339 | */
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340 | inline bool pgmCacheIsPDCached(PPDCACHE pPdCache, uint32_t iPDShw)
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341 | {
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342 | #ifdef PGM_PD_CACHING_ENABLED
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343 | if (iPDShw < pPdCache->cbMaxPDEs)
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344 | {
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345 | return !!pPdCache->pd[iPDShw].u1Cached;
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346 | }
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347 | #endif
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348 | return false;
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349 | }
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350 |
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351 |
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352 | /**
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353 | * Check if a page directory entry is cached
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354 | *
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355 | * @returns true if cached, otherwise false
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356 | * @param pVM The virtual machine.
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357 | * @param iPDShw Page directory index
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358 | */
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359 | bool pgmCacheIsPDCached(PVM pVM, uint32_t iPDShw);
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360 |
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361 | /**
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362 | * Checks if the PDE has been changed
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363 | *
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364 | * @returns boolean
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365 | * @param pVM The virtual machine.
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366 | * @param iPDShw Page directory entry
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367 | */
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368 | bool pgmCacheHasPDEChanged(PVM pVM, uint32_t iPDShw);
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369 |
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370 | /**
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371 | * Checks if the PDE has been changed
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372 | *
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373 | * @returns boolean
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374 | * @param pVM The virtual machine.
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375 | * @param pLine Cache line
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376 | */
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377 | bool pgmCacheHasPDEChanged(PVM pVM, PPDCACHELINE pLine);
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378 |
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379 | /**
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380 | * Invalidate entry in shadow page directory
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381 | *
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382 | * @returns VBox status code.
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383 | * @param iPDShw PDE index
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384 | * @param iPDShw Page directory index
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385 | */
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386 | void pgmInvalidatePD(PVM pVM, uint32_t iPDShw);
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387 |
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388 |
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389 | /**
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390 | * Activate a cached PD (called by SyncPT when it is synced for the first time).
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391 | *
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392 | * @returns VBox status code.
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393 | * @param pVM The virtual machine.
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394 | * @param iPDShw PDE index
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395 | */
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396 | int pgmCacheActivatePD(PVM pVM, uint32_t iPDShw);
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397 |
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398 | /**
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399 | * Clean up dirty cache entry
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400 | *
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401 | * @returns VBox status code.
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402 | * @param pVM The virtual machine.
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403 | * @param pLine Cache line pointer
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404 | * @param pEntry Cache entry pointer
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405 | */
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406 | int pgmCacheHandleDirtyEntry(PVM pVM, PPDCACHELINE pLine, PPDCACHEENTRY pEntry);
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407 |
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408 | DECLEXPORT(int) pgmCachePTWrite(PVM pVM, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser);
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409 |
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410 | #endif /* !__PGMCache_h__ */
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411 |
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