VirtualBox

source: vbox/trunk/src/VBox/VMM/PDMInternal.h@ 3696

Last change on this file since 3696 was 3635, checked in by vboxsync, 17 years ago

VBox_hdr_h -> _VBox_hdr_h

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1/* $Id: PDMInternal.h 3635 2007-07-16 12:45:28Z vboxsync $ */
2/** @file
3 * PDM - Internal header file.
4 */
5
6/*
7 * Copyright (C) 2006-2007 innotek GmbH
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License as published by the Free Software Foundation,
13 * in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
14 * distribution. VirtualBox OSE is distributed in the hope that it will
15 * be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * If you received this file as part of a commercial VirtualBox
18 * distribution, then only the terms of your commercial VirtualBox
19 * license agreement apply instead of the previous paragraph.
20 */
21
22#ifndef __PDMInternal_h__
23#define __PDMInternal_h__
24
25#include <VBox/cdefs.h>
26#include <VBox/types.h>
27#include <VBox/param.h>
28#include <VBox/cfgm.h>
29#include <VBox/stam.h>
30#include <iprt/critsect.h>
31
32__BEGIN_DECLS
33
34
35/** @defgroup grp_pdm_int Internal
36 * @ingroup grp_pdm
37 * @internal
38 * @{
39 */
40
41/*******************************************************************************
42* Structures and Typedefs *
43*******************************************************************************/
44
45/** Pointer to a PDM Device. */
46typedef struct PDMDEV *PPDMDEV;
47/** Pointer to a pointer to a PDM Device. */
48typedef PPDMDEV *PPPDMDEV;
49
50/** Pointer to a PDM Driver. */
51typedef struct PDMDRV *PPDMDRV;
52/** Pointer to a pointer to a PDM Driver. */
53typedef PPDMDRV *PPPDMDRV;
54
55/** Pointer to a PDM Logical Unit. */
56typedef struct PDMLUN *PPDMLUN;
57/** Pointer to a pointer to a PDM Logical Unit. */
58typedef PPDMLUN *PPPDMLUN;
59
60/** Pointer to a PDM PCI Bus instance. */
61typedef struct PDMPCIBUS *PPDMPCIBUS;
62/** Pointer to a DMAC instance. */
63typedef struct PDMDMAC *PPDMDMAC;
64/** Pointer to a RTC instance. */
65typedef struct PDMRTC *PPDMRTC;
66
67
68/**
69 * Private instance data.
70 */
71typedef struct PDMDEVINSINT
72{
73 /** Pointer to the next instance (HC Ptr).
74 * (Head is pointed to by PDM::pDevInstances.) */
75 HCPTRTYPE(PPDMDEVINS) pNextHC;
76 /** Pointer to the next per device instance (HC Ptr).
77 * (Head is pointed to by PDMDEV::pInstances.) */
78 HCPTRTYPE(PPDMDEVINS) pPerDeviceNextHC;
79
80 /** Pointer to device structure - HC Ptr. */
81 HCPTRTYPE(PPDMDEV) pDevHC;
82
83 /** Pointer to the VM this instance was created for - HC Ptr. */
84 HCPTRTYPE(PVM) pVMHC;
85 /** Pointer to the list of logical units associated with the device. (FIFO) */
86 HCPTRTYPE(PPDMLUN) pLunsHC;
87 /** Configuration handle to the instance node. */
88 HCPTRTYPE(PCFGMNODE) pCfgHandle;
89 /** HC pointer to associated PCI device structure. */
90 HCPTRTYPE(struct PCIDevice *) pPciDeviceHC;
91 /** HC pointer to associated PCI bus structure. */
92 HCPTRTYPE(PPDMPCIBUS) pPciBusHC;
93
94 /** GC pointer to associated PCI device structure. */
95 GCPTRTYPE(struct PCIDevice *) pPciDeviceGC;
96 /** Pointer to the VM this instance was created for - GC Ptr. */
97 GCPTRTYPE(PVM) pVMGC;
98 /** GC pointer to associated PCI bus structure. */
99 GCPTRTYPE(PPDMPCIBUS) pPciBusGC;
100#if GC_ARCH_BITS == 32
101 uint32_t Alignment0;
102#endif
103} PDMDEVINSINT;
104
105
106/**
107 * Private instance data.
108 */
109typedef struct PDMDRVINSINT
110{
111 /** Pointer to the driver instance above.
112 * This is NULL for the topmost drive. */
113 PPDMDRVINS pUp;
114 /** Pointer to the driver instance below.
115 * This is NULL for the bottommost driver. */
116 PPDMDRVINS pDown;
117 /** Pointer to the logical unit this driver chained on. */
118 PPDMLUN pLun;
119 /** Pointer to driver structure from which this was instantiated. */
120 PPDMDRV pDrv;
121 /** Pointer to the VM this instance was created for. */
122 PVM pVM;
123 /** Flag indicating that the driver is being detached and destroyed.
124 * (Helps detect potential recursive detaching.) */
125 bool fDetaching;
126 /** Configuration handle to the instance node. */
127 PCFGMNODE pCfgHandle;
128
129} PDMDRVINSINT;
130
131
132/**
133 * Private critical section data.
134 */
135typedef struct PDMCRITSECTINT
136{
137 /** The critical section core which is shared with IPRT. */
138 RTCRITSECT Core;
139 /** Pointer to the next critical section.
140 * This chain is used for relocating pVMGC and device cleanup. */
141 R3PTRTYPE(struct PDMCRITSECTINT *) pNext;
142 /** Owner identifier.
143 * This is pDevIns if the owner is a device. Similarily for a driver or service.
144 * PDMR3CritSectInit() sets this to point to the critsect itself. */
145 RTR3PTR pvKey;
146 /** Pointer to the VM - R3Ptr. */
147 R3PTRTYPE(PVM) pVMR3;
148 /** Pointer to the VM - R0Ptr. */
149 R0PTRTYPE(PVM) pVMR0;
150 /** Pointer to the VM - GCPtr. */
151 GCPTRTYPE(PVM) pVMGC;
152#if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32
153 uint32_t padding;
154#endif
155 /** Event semaphore that is scheduled to be signaled upon leaving the
156 * critical section. This is Ring-3 only of course. */
157 RTSEMEVENT EventToSignal;
158 /** R0/GC lock contention. */
159 STAMCOUNTER StatContentionR0GCLock;
160 /** R0/GC unlock contention. */
161 STAMCOUNTER StatContentionR0GCUnlock;
162 /** R3 lock contention. */
163 STAMCOUNTER StatContentionR3;
164 /** Profiling the time the section is locked. */
165 STAMPROFILEADV StatLocked;
166} PDMCRITSECTINT, *PPDMCRITSECTINT;
167
168
169/**
170 * The usual device/driver/internal/external stuff.
171 */
172typedef enum
173{
174 /** The usual invalid entry. */
175 PDMTHREADTYPE_INVALID = 0,
176 /** Device type. */
177 PDMTHREADTYPE_DEVICE,
178 /** Driver type. */
179 PDMTHREADTYPE_DRIVER,
180 /** Internal type. */
181 PDMTHREADTYPE_INTERNAL,
182 /** External type. */
183 PDMTHREADTYPE_EXTERNAL,
184 /** The usual 32-bit hack. */
185 PDMTHREADTYPE_32BIT_HACK = 0x7fffffff
186} PDMTHREADTYPE;
187
188
189/**
190 * The internal structure for the thread.
191 */
192typedef struct PDMTHREADINT
193{
194 /** The VM pointer. */
195 PVMR3 pVM;
196 /** The event semaphore the thread blocks on. */
197 RTSEMEVENTMULTI BlockEvent;
198 /** Pointer to the next thread. */
199 R3PTRTYPE(struct PDMTHREAD *) pNext;
200 /** The thread type. */
201 PDMTHREADTYPE enmType;
202} PDMTHREADINT;
203
204
205
206/* Must be included after PDMDEVINSINT is defined. */
207#define PDMDEVINSINT_DECLARED
208#define PDMDRVINSINT_DECLARED
209#define PDMCRITSECTINT_DECLARED
210#define PDMTHREADINT_DECLARED
211#ifdef ___VBox_pdm_h
212# error "Invalid header PDM order. Include PDMInternal.h before VBox/pdm.h!"
213#endif
214#include <VBox/pdm.h>
215
216
217
218/**
219 * PDM Logical Unit.
220 *
221 * This typically the representation of a physical port on a
222 * device, like for instance the PS/2 keyboard port on the
223 * keyboard controller device. The LUNs are chained on the
224 * device the belong to (PDMDEVINSINT::pLunsHC).
225 */
226typedef struct PDMLUN
227{
228 /** The LUN - The Logical Unit Number. */
229 RTUINT iLun;
230 /** Pointer to the next LUN. */
231 PPDMLUN pNext;
232 /** Pointer to the top driver in the driver chain. */
233 PPDMDRVINS pTop;
234 /** Pointer to the device instance which the LUN belongs to. */
235 PPDMDEVINS pDevIns;
236 /** Pointer to the device base interface. */
237 PPDMIBASE pBase;
238 /** Description of this LUN. */
239 const char *pszDesc;
240} PDMLUN;
241
242
243/**
244 * PDM Device.
245 */
246typedef struct PDMDEV
247{
248 /** Pointer to the next device (HC Ptr). */
249 HCPTRTYPE(PPDMDEV) pNext;
250 /** Device name length. (search optimization) */
251 RTUINT cchName;
252 /** Registration structure. */
253 HCPTRTYPE(const struct PDMDEVREG *) pDevReg;
254 /** Number of instances. */
255 RTUINT cInstances;
256 /** Pointer to chain of instances (HC Ptr). */
257 HCPTRTYPE(PPDMDEVINS) pInstances;
258
259} PDMDEV;
260
261
262/**
263 * PDM Driver.
264 */
265typedef struct PDMDRV
266{
267 /** Pointer to the next device. */
268 PPDMDRV pNext;
269 /** Registration structure. */
270 const struct PDMDRVREG *pDrvReg;
271 /** Number of instances. */
272 RTUINT cInstances;
273
274} PDMDRV;
275
276
277/**
278 * PDM registered PIC device.
279 */
280typedef struct PDMPIC
281{
282 /** Pointer to the PIC device instance - HC. */
283 HCPTRTYPE(PPDMDEVINS) pDevInsR3;
284 /** @copydoc PDMPICREG::pfnSetIrqHC */
285 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
286 /** @copydoc PDMPICREG::pfnGetInterruptHC */
287 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
288
289 /** Pointer to the PIC device instance - R0. */
290 R0PTRTYPE(PPDMDEVINS) pDevInsR0;
291 /** @copydoc PDMPICREG::pfnSetIrqHC */
292 DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
293 /** @copydoc PDMPICREG::pfnGetInterruptHC */
294 DECLR0CALLBACKMEMBER(int, pfnGetInterruptR0,(PPDMDEVINS pDevIns));
295
296 /** Pointer to the PIC device instance - GC. */
297 GCPTRTYPE(PPDMDEVINS) pDevInsGC;
298 /** @copydoc PDMPICREG::pfnSetIrqHC */
299 DECLGCCALLBACKMEMBER(void, pfnSetIrqGC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
300 /** @copydoc PDMPICREG::pfnGetInterruptHC */
301 DECLGCCALLBACKMEMBER(int, pfnGetInterruptGC,(PPDMDEVINS pDevIns));
302#if GC_ARCH_BITS == 32
303 RTGCPTR GCPtrPadding; /**< Alignment padding. */
304#endif
305} PDMPIC;
306
307
308/**
309 * PDM registered APIC device.
310 */
311typedef struct PDMAPIC
312{
313 /** Pointer to the APIC device instance - HC Ptr. */
314 PPDMDEVINSHC pDevInsR3;
315 /** @copydoc PDMAPICREG::pfnGetInterruptHC */
316 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
317 /** @copydoc PDMAPICREG::pfnSetBaseHC */
318 DECLR3CALLBACKMEMBER(void, pfnSetBaseR3,(PPDMDEVINS pDevIns, uint64_t u64Base));
319 /** @copydoc PDMAPICREG::pfnGetBaseHC */
320 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseR3,(PPDMDEVINS pDevIns));
321 /** @copydoc PDMAPICREG::pfnSetTPRHC */
322 DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, uint8_t u8TPR));
323 /** @copydoc PDMAPICREG::pfnGetTPRHC */
324 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns));
325 /** @copydoc PDMAPICREG::pfnBusDeliverHC */
326 DECLR3CALLBACKMEMBER(void, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
327 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
328
329 /** Pointer to the PIC device instance - R0. */
330 R0PTRTYPE(PPDMDEVINS) pDevInsR0;
331 /** @copydoc PDMAPICREG::pfnGetInterruptHC */
332 DECLR0CALLBACKMEMBER(int, pfnGetInterruptR0,(PPDMDEVINS pDevIns));
333 /** @copydoc PDMAPICREG::pfnSetBaseHC */
334 DECLR0CALLBACKMEMBER(void, pfnSetBaseR0,(PPDMDEVINS pDevIns, uint64_t u64Base));
335 /** @copydoc PDMAPICREG::pfnGetBaseHC */
336 DECLR0CALLBACKMEMBER(uint64_t, pfnGetBaseR0,(PPDMDEVINS pDevIns));
337 /** @copydoc PDMAPICREG::pfnSetTPRHC */
338 DECLR0CALLBACKMEMBER(void, pfnSetTPRR0,(PPDMDEVINS pDevIns, uint8_t u8TPR));
339 /** @copydoc PDMAPICREG::pfnGetTPRHC */
340 DECLR0CALLBACKMEMBER(uint8_t, pfnGetTPRR0,(PPDMDEVINS pDevIns));
341 /** @copydoc PDMAPICREG::pfnBusDeliverHC */
342 DECLR0CALLBACKMEMBER(void, pfnBusDeliverR0,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
343 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
344
345 /** Pointer to the APIC device instance - GC Ptr. */
346 PPDMDEVINSGC pDevInsGC;
347 /** @copydoc PDMAPICREG::pfnGetInterruptHC */
348 DECLGCCALLBACKMEMBER(int, pfnGetInterruptGC,(PPDMDEVINS pDevIns));
349 /** @copydoc PDMAPICREG::pfnSetBaseHC */
350 DECLGCCALLBACKMEMBER(void, pfnSetBaseGC,(PPDMDEVINS pDevIns, uint64_t u64Base));
351 /** @copydoc PDMAPICREG::pfnGetBaseHC */
352 DECLGCCALLBACKMEMBER(uint64_t, pfnGetBaseGC,(PPDMDEVINS pDevIns));
353 /** @copydoc PDMAPICREG::pfnSetTPRHC */
354 DECLGCCALLBACKMEMBER(void, pfnSetTPRGC,(PPDMDEVINS pDevIns, uint8_t u8TPR));
355 /** @copydoc PDMAPICREG::pfnGetTPRHC */
356 DECLGCCALLBACKMEMBER(uint8_t, pfnGetTPRGC,(PPDMDEVINS pDevIns));
357 /** @copydoc PDMAPICREG::pfnBusDeliverHC */
358 DECLGCCALLBACKMEMBER(void, pfnBusDeliverGC,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
359 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
360#if GC_ARCH_BITS == 32
361 RTGCPTR GCPtrPadding; /**< Alignment padding. */
362#endif
363} PDMAPIC;
364
365
366/**
367 * PDM registered I/O APIC device.
368 */
369typedef struct PDMIOAPIC
370{
371 /** Pointer to the APIC device instance - HC Ptr. */
372 PPDMDEVINSHC pDevInsR3;
373 /** @copydoc PDMIOAPICREG::pfnSetIrqHC */
374 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
375
376 /** Pointer to the PIC device instance - R0. */
377 R0PTRTYPE(PPDMDEVINS) pDevInsR0;
378 /** @copydoc PDMIOAPICREG::pfnSetIrqHC */
379 DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
380
381 /** Pointer to the APIC device instance - GC Ptr. */
382 PPDMDEVINSGC pDevInsGC;
383 /** @copydoc PDMIOAPICREG::pfnSetIrqHC */
384 DECLGCCALLBACKMEMBER(void, pfnSetIrqGC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
385} PDMIOAPIC;
386
387
388/**
389 * PDM PCI Bus instance.
390 */
391typedef struct PDMPCIBUS
392{
393 /** PCI bus number. */
394 RTUINT iBus;
395 RTUINT uPadding0; /**< Alignment padding.*/
396
397 /** Pointer to PCI Bus device instance. */
398 PPDMDEVINSHC pDevInsR3;
399 /** @copydoc PDMPCIBUSREG::pfnSetIrqHC */
400 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
401 /** @copydoc PDMPCIBUSREG::pfnRegisterHC */
402 DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
403 /** @copydoc PDMPCIBUSREG::pfnIORegionRegisterHC */
404 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion,
405 PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
406 /** @copydoc PDMPCIBUSREG::pfnSetConfigCallbacksHC */
407 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead,
408 PPFNPCICONFIGREAD ppfnReadOld, PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
409 /** @copydoc PDMPCIBUSREG::pfnSaveExecHC */
410 DECLR3CALLBACKMEMBER(int, pfnSaveExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
411 /** @copydoc PDMPCIBUSREG::pfnLoadExecHC */
412 DECLR3CALLBACKMEMBER(int, pfnLoadExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
413 /** @copydoc PDMPCIBUSREG::pfnFakePCIBIOSHC */
414 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
415
416 /** Pointer to the PIC device instance - R0. */
417 R0PTRTYPE(PPDMDEVINS) pDevInsR0;
418 /** @copydoc PDMPCIBUSREG::pfnSetIrqHC */
419 DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
420
421 /** Pointer to PCI Bus device instance. */
422 PPDMDEVINSGC pDevInsGC;
423 /** @copydoc PDMPCIBUSREG::pfnSetIrqHC */
424 DECLGCCALLBACKMEMBER(void, pfnSetIrqGC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
425} PDMPCIBUS;
426
427
428#ifdef IN_RING3
429/**
430 * PDM registered DMAC (DMA Controller) device.
431 */
432typedef struct PDMDMAC
433{
434 /** Pointer to the DMAC device instance. */
435 PPDMDEVINS pDevIns;
436 /** Copy of the registration structure. */
437 PDMDMACREG Reg;
438} PDMDMAC;
439
440
441/**
442 * PDM registered RTC (Real Time Clock) device.
443 */
444typedef struct PDMRTC
445{
446 /** Pointer to the RTC device instance. */
447 PPDMDEVINS pDevIns;
448 /** Copy of the registration structure. */
449 PDMRTCREG Reg;
450} PDMRTC;
451
452#endif /* IN_RING3 */
453
454/**
455 * Module type.
456 */
457typedef enum PDMMODTYPE
458{
459 /** Guest context module. */
460 PDMMOD_TYPE_GC,
461 /** Ring-0 (host) context module. */
462 PDMMOD_TYPE_R0,
463 /** Ring-3 (host) context module. */
464 PDMMOD_TYPE_R3
465} PDMMODTYPE, *PPDMMODTYPE;
466
467
468/** The module name length including the terminator. */
469#define PDMMOD_NAME_LEN 32
470
471/**
472 * Loaded module instance.
473 */
474typedef struct PDMMOD
475{
476 /** Module name. This is used for refering to
477 * the module internally, sort of like a handle. */
478 char szName[PDMMOD_NAME_LEN];
479 /** Module type. */
480 PDMMODTYPE eType;
481 /** Loader module handle. Not used for R0 modules. */
482 RTLDRMOD hLdrMod;
483 /** Loaded address.
484 * This is the 'handle' for R0 modules. */
485 RTUINTPTR ImageBase;
486 /** Old loaded address.
487 * This is used during relocation of GC modules. Not used for R0 modules. */
488 RTUINTPTR OldImageBase;
489 /** Where the R3 HC bits are stored.
490 * This can be equal to ImageBase but doesn't have to. Not used for R0 modules. */
491 void *pvBits;
492
493 /** Pointer to next module. */
494 struct PDMMOD *pNext;
495 /** Module filename. */
496 char szFilename[1];
497} PDMMOD;
498/** Pointer to loaded module instance. */
499typedef PDMMOD *PPDMMOD;
500
501
502
503/** Extra space in the free array. */
504#define PDMQUEUE_FREE_SLACK 16
505
506/**
507 * Queue type.
508 */
509typedef enum PDMQUEUETYPE
510{
511 /** Device consumer. */
512 PDMQUEUETYPE_DEV = 1,
513 /** Driver consumer. */
514 PDMQUEUETYPE_DRV,
515 /** Internal consumer. */
516 PDMQUEUETYPE_INTERNAL,
517 /** External consumer. */
518 PDMQUEUETYPE_EXTERNAL
519} PDMQUEUETYPE;
520
521/** Pointer to a PDM Queue. */
522typedef struct PDMQUEUE *PPDMQUEUE;
523
524/**
525 * PDM Queue.
526 */
527typedef struct PDMQUEUE
528{
529 /** Pointer to the next queue in the list. */
530 HCPTRTYPE(PPDMQUEUE) pNext;
531 /** Type specific data. */
532 union
533 {
534 /** PDMQUEUETYPE_DEV */
535 struct
536 {
537 /** Pointer to consumer function. */
538 HCPTRTYPE(PFNPDMQUEUEDEV) pfnCallback;
539 /** Pointer to the device instance owning the queue. */
540 HCPTRTYPE(PPDMDEVINS) pDevIns;
541 } Dev;
542 /** PDMQUEUETYPE_DRV */
543 struct
544 {
545 /** Pointer to consumer function. */
546 HCPTRTYPE(PFNPDMQUEUEDRV) pfnCallback;
547 /** Pointer to the driver instance owning the queue. */
548 HCPTRTYPE(PPDMDRVINS) pDrvIns;
549 } Drv;
550 /** PDMQUEUETYPE_INTERNAL */
551 struct
552 {
553 /** Pointer to consumer function. */
554 HCPTRTYPE(PFNPDMQUEUEINT) pfnCallback;
555 } Int;
556 /** PDMQUEUETYPE_EXTERNAL */
557 struct
558 {
559 /** Pointer to consumer function. */
560 HCPTRTYPE(PFNPDMQUEUEEXT) pfnCallback;
561 /** Pointer to user argument. */
562 HCPTRTYPE(void *) pvUser;
563 } Ext;
564 } u;
565 /** Queue type. */
566 PDMQUEUETYPE enmType;
567 /** The interval between checking the queue for events.
568 * The realtime timer below is used to do the waiting.
569 * If 0, the queue will use the VM_FF_PDM_QUEUE forced action. */
570 uint32_t cMilliesInterval;
571 /** Interval timer. Only used if cMilliesInterval is non-zero. */
572 PTMTIMERHC pTimer;
573 /** Pointer to the VM. */
574 HCPTRTYPE(PVM) pVMHC;
575 /** LIFO of pending items - HC. */
576 HCPTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingHC;
577 /** Pointer to the GC VM and indicator for GC enabled queue.
578 * If this is NULL, the queue cannot be used in GC.
579 */
580 GCPTRTYPE(PVM) pVMGC;
581 /** LIFO of pending items - GC. */
582 GCPTRTYPE(PPDMQUEUEITEMCORE) pPendingGC;
583 /** Item size (bytes). */
584 RTUINT cbItem;
585 /** Number of items in the queue. */
586 RTUINT cItems;
587 /** Index to the free head (where we insert). */
588 uint32_t volatile iFreeHead;
589 /** Index to the free tail (where we remove). */
590 uint32_t volatile iFreeTail;
591 /** Array of pointers to free items. Variable size. */
592 struct PDMQUEUEFREEITEM
593 {
594 /** Pointer to the free item - HC Ptr. */
595 HCPTRTYPE(PPDMQUEUEITEMCORE) volatile pItemHC;
596 /** Pointer to the free item - GC Ptr. */
597 GCPTRTYPE(PPDMQUEUEITEMCORE) volatile pItemGC;
598#if HC_ARCH_BITS == 64 && GC_ARCH_BITS == 32
599 uint32_t Alignment0;
600#endif
601 } aFreeItems[1];
602} PDMQUEUE;
603
604
605/**
606 * Queue device helper task operation.
607 */
608typedef enum PDMDEVHLPTASKOP
609{
610 /** The usual invalid 0 entry. */
611 PDMDEVHLPTASKOP_INVALID = 0,
612 /** ISASetIrq */
613 PDMDEVHLPTASKOP_ISA_SET_IRQ,
614 /** PCISetIrq */
615 PDMDEVHLPTASKOP_PCI_SET_IRQ,
616 /** PCISetIrq */
617 PDMDEVHLPTASKOP_IOAPIC_SET_IRQ,
618 /** The usual 32-bit hack. */
619 PDMDEVHLPTASKOP_32BIT_HACK = 0x7fffffff
620} PDMDEVHLPTASKOP;
621
622/**
623 * Queued Device Helper Task.
624 */
625typedef struct PDMDEVHLPTASK
626{
627 /** The queue item core (don't touch). */
628 PDMQUEUEITEMCORE Core;
629 /** Pointer to the device instance (HC Ptr). */
630 HCPTRTYPE(PPDMDEVINS) pDevInsHC;
631 /** This operation to perform. */
632 PDMDEVHLPTASKOP enmOp;
633#if HC_ARCH_BITS == 64
634 uint32_t Alignment0;
635#endif
636 /** Parameters to the operation. */
637 union PDMDEVHLPTASKPARAMS
638 {
639 /**
640 * PDMDEVHLPTASKOP_ISA_SET_IRQ and PDMDEVHLPTASKOP_PCI_SET_IRQ.
641 */
642 struct PDMDEVHLPTASKSETIRQ
643 {
644 /** The IRQ */
645 int iIrq;
646 /** The new level. */
647 int iLevel;
648 } SetIRQ;
649 } u;
650} PDMDEVHLPTASK;
651/** Pointer to a queued Device Helper Task. */
652typedef PDMDEVHLPTASK *PPDMDEVHLPTASK;
653/** Pointer to a const queued Device Helper Task. */
654typedef const PDMDEVHLPTASK *PCPDMDEVHLPTASK;
655
656
657
658/**
659 * Converts a PDM pointer into a VM pointer.
660 * @returns Pointer to the VM structure the PDM is part of.
661 * @param pPDM Pointer to PDM instance data.
662 */
663#define PDM2VM(pPDM) ( (PVM)((char*)pPDM - pPDM->offVM) )
664
665
666/**
667 * PDM VM Instance data.
668 * Changes to this must checked against the padding of the cfgm union in VM!
669 */
670typedef struct PDM
671{
672 /** Offset to the VM structure.
673 * See PDM2VM(). */
674 RTUINT offVM;
675 RTUINT uPadding0; /**< Alignment padding.*/
676
677 /** Pointer to list of loaded modules. This is HC only! */
678 HCPTRTYPE(PPDMMOD) pModules;
679
680 /** List of registered devices. (FIFO) */
681 HCPTRTYPE(PPDMDEV) pDevs;
682 /** List of devices instances. (FIFO) */
683 HCPTRTYPE(PPDMDEVINS) pDevInstances;
684 /** List of registered drivers. (FIFO) */
685 HCPTRTYPE(PPDMDRV) pDrvs;
686 /** List of initialized critical sections. (LIFO) */
687 HCPTRTYPE(PPDMCRITSECTINT) pCritSects;
688 /** PCI Buses. */
689 PDMPCIBUS aPciBuses[1];
690 /** The register PIC device. */
691 PDMPIC Pic;
692 /** The registerd APIC device. */
693 PDMAPIC Apic;
694 /** The registerd I/O APIC device. */
695 PDMIOAPIC IoApic;
696 /** The registered DMAC device. */
697 HCPTRTYPE(PPDMDMAC) pDmac;
698 /** The registered RTC device. */
699 HCPTRTYPE(PPDMRTC) pRtc;
700
701 /** Queue in which devhlp tasks are queued for R3 execution - HC Ptr. */
702 HCPTRTYPE(PPDMQUEUE) pDevHlpQueueHC;
703 /** Queue in which devhlp tasks are queued for R3 execution - GC Ptr. */
704 GCPTRTYPE(PPDMQUEUE) pDevHlpQueueGC;
705
706 /** The number of entries in the apQueuedCritSectsLeaves table that's currnetly in use. */
707 RTUINT cQueuedCritSectLeaves;
708 /** Critical sections queued in GC/R0 because of contention preventing leave to complete. (R3 Ptrs)
709 * We will return to Ring-3 ASAP, so this queue doesn't has to be very long. */
710 R3PTRTYPE(PPDMCRITSECT) apQueuedCritSectsLeaves[8];
711
712 /** Linked list of timer driven PDM queues. */
713 HCPTRTYPE(struct PDMQUEUE *) pQueuesTimer;
714 /** Linked list of force action driven PDM queues. */
715 HCPTRTYPE(struct PDMQUEUE *) pQueuesForced;
716 /** Pointer to the queue which should be manually flushed - HCPtr.
717 * Only touched by EMT. */
718 HCPTRTYPE(struct PDMQUEUE *) pQueueFlushHC;
719 /** Pointer to the queue which should be manually flushed - GCPtr. */
720 GCPTRTYPE(struct PDMQUEUE *) pQueueFlushGC;
721
722#if HC_ARCH_BITS == 64
723 uint32_t padding0;
724#endif
725
726 /** Head of the PDM Thread list. (singly linked) */
727 R3PTRTYPE(PPDMTHREAD) pThreads;
728 /** Tail of the PDM Thread list. (singly linked) */
729 R3PTRTYPE(PPDMTHREAD) pThreadsTail;
730
731 /** TEMPORARY HACKS FOR NETWORK POLLING.
732 * @todo fix NAT and kill this!
733 * @{ */
734 RTUINT cPollers;
735#if HC_ARCH_BITS == 64
736 RTUINT padding1;
737#endif
738 HCPTRTYPE(PFNPDMDRVPOLLER) apfnPollers[16];
739 HCPTRTYPE(PPDMDRVINS) aDrvInsPollers[16];
740 PTMTIMERHC pTimerPollers;
741 /** @} */
742
743#ifdef VBOX_WITH_PDM_LOCK
744 /** The PDM lock.
745 * This is used to protect everything that deals with interrupts, i.e.
746 * the PIC, APIC, IOAPIC and PCI devices pluss some PDM functions. */
747 PDMCRITSECT CritSect;
748#endif
749
750
751 /** Number of times a critical section leave requesed needed to be queued for ring-3 execution. */
752 STAMCOUNTER StatQueuedCritSectLeaves;
753} PDM;
754/** Pointer to PDM VM instance data. */
755typedef PDM *PPDM;
756
757
758
759/*******************************************************************************
760* Global Variables *
761*******************************************************************************/
762#ifdef IN_RING3
763extern const PDMDRVHLP g_pdmR3DrvHlp;
764#endif
765
766
767/*******************************************************************************
768* Internal Functions *
769*******************************************************************************/
770int pdmR3CritSectInit(PVM pVM);
771int pdmR3CritSectTerm(PVM pVM);
772void pdmR3CritSectRelocate(PVM pVM);
773int pdmR3CritSectInitDevice(PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName);
774int pdmR3CritSectDeleteDevice(PVM pVM, PPDMDEVINS pDevIns);
775
776int pdmR3DevInit(PVM pVM);
777PPDMDEV pdmR3DevLookup(PVM pVM, const char *pszName);
778int pdmR3DevFindLun(PVM pVM, const char *pszDevice, unsigned iInstance, unsigned iLun, PPDMLUN *ppLun);
779
780int pdmR3DrvInit(PVM pVM);
781int pdmR3DrvDetach(PPDMDRVINS pDrvIns);
782PPDMDRV pdmR3DrvLookup(PVM pVM, const char *pszName);
783
784int pdmR3LdrInit(PVM pVM);
785void pdmR3LdrTerm(PVM pVM);
786char * pdmR3FileR3(const char *pszFile, bool fShared = false);
787int pdmR3LoadR3(PVM pVM, const char *pszFilename, const char *pszName);
788
789void pdmR3QueueRelocate(PVM pVM, RTGCINTPTR offDelta);
790
791void pdmR3ThreadDestroyDevice(PVM pVM, PPDMDEVINS pDevIns);
792void pdmR3ThreadDestroyDriver(PVM pVM, PPDMDRVINS pDrvIns);
793void pdmR3ThreadDestroyAll(PVM pVM);
794int pdmR3ThreadResumeAll(PVM pVM);
795int pdmR3ThreadSuspendAll(PVM pVM);
796
797#ifdef VBOX_WITH_PDM_LOCK
798void pdmLock(PVM pVM);
799int pdmLockEx(PVM pVM, int rc);
800void pdmUnlock(PVM pVM);
801#else
802# define pdmLock(pVM) do {} while (0)
803# define pdmLockEx(pVM, rc) (VINF_SUCCESS)
804# define pdmUnlock(pVM) do {} while (0)
805#endif
806
807/** @} */
808
809__END_DECLS
810
811#endif
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