VirtualBox

source: vbox/trunk/src/VBox/VMM/PDMInternal.h@ 34219

Last change on this file since 34219 was 34219, checked in by vboxsync, 14 years ago

PDM/BlockCache: First part for #5295, move the writeback cache into a separate component
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1/* $Id: PDMInternal.h 34219 2010-11-21 18:10:39Z vboxsync $ */
2/** @file
3 * PDM - Internal header file.
4 */
5
6/*
7 * Copyright (C) 2006-2010 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18#ifndef ___PDMInternal_h
19#define ___PDMInternal_h
20
21#include <VBox/types.h>
22#include <VBox/param.h>
23#include <VBox/cfgm.h>
24#include <VBox/stam.h>
25#include <VBox/vusb.h>
26#include <VBox/pdmasynccompletion.h>
27#include <VBox/pdmblkcache.h>
28#include <VBox/pdmcommon.h>
29#include <iprt/assert.h>
30#include <iprt/critsect.h>
31#ifdef IN_RING3
32# include <iprt/thread.h>
33#endif
34
35RT_C_DECLS_BEGIN
36
37
38/** @defgroup grp_pdm_int Internal
39 * @ingroup grp_pdm
40 * @internal
41 * @{
42 */
43
44/** @def PDM_WITH_R3R0_CRIT_SECT
45 * Enables or disabled ring-3/ring-0 critical sections. */
46#if defined(DOXYGEN_RUNNING) || 1
47# define PDM_WITH_R3R0_CRIT_SECT
48#endif
49
50/** @def PDMCRITSECT_STRICT
51 * Enables/disables PDM critsect strictness like deadlock detection. */
52#if (defined(RT_LOCK_STRICT) && defined(IN_RING3)) || defined(DOXYGEN_RUNNING)
53# define PDMCRITSECT_STRICT
54#endif
55
56
57/*******************************************************************************
58* Structures and Typedefs *
59*******************************************************************************/
60
61/** Pointer to a PDM Device. */
62typedef struct PDMDEV *PPDMDEV;
63/** Pointer to a pointer to a PDM Device. */
64typedef PPDMDEV *PPPDMDEV;
65
66/** Pointer to a PDM USB Device. */
67typedef struct PDMUSB *PPDMUSB;
68/** Pointer to a pointer to a PDM USB Device. */
69typedef PPDMUSB *PPPDMUSB;
70
71/** Pointer to a PDM Driver. */
72typedef struct PDMDRV *PPDMDRV;
73/** Pointer to a pointer to a PDM Driver. */
74typedef PPDMDRV *PPPDMDRV;
75
76/** Pointer to a PDM Logical Unit. */
77typedef struct PDMLUN *PPDMLUN;
78/** Pointer to a pointer to a PDM Logical Unit. */
79typedef PPDMLUN *PPPDMLUN;
80
81/** Pointer to a PDM PCI Bus instance. */
82typedef struct PDMPCIBUS *PPDMPCIBUS;
83/** Pointer to a DMAC instance. */
84typedef struct PDMDMAC *PPDMDMAC;
85/** Pointer to a RTC instance. */
86typedef struct PDMRTC *PPDMRTC;
87
88/** Pointer to an USB HUB registration record. */
89typedef struct PDMUSBHUB *PPDMUSBHUB;
90
91/**
92 * Supported asynchronous completion endpoint classes.
93 */
94typedef enum PDMASYNCCOMPLETIONEPCLASSTYPE
95{
96 /** File class. */
97 PDMASYNCCOMPLETIONEPCLASSTYPE_FILE = 0,
98 /** Number of supported classes. */
99 PDMASYNCCOMPLETIONEPCLASSTYPE_MAX,
100 /** 32bit hack. */
101 PDMASYNCCOMPLETIONEPCLASSTYPE_32BIT_HACK = 0x7fffffff
102} PDMASYNCCOMPLETIONEPCLASSTYPE;
103
104/**
105 * Private device instance data.
106 */
107typedef struct PDMDEVINSINT
108{
109 /** Pointer to the next instance (HC Ptr).
110 * (Head is pointed to by PDM::pDevInstances.) */
111 R3PTRTYPE(PPDMDEVINS) pNextR3;
112 /** Pointer to the next per device instance (HC Ptr).
113 * (Head is pointed to by PDMDEV::pInstances.) */
114 R3PTRTYPE(PPDMDEVINS) pPerDeviceNextR3;
115 /** Pointer to device structure - HC Ptr. */
116 R3PTRTYPE(PPDMDEV) pDevR3;
117 /** Pointer to the list of logical units associated with the device. (FIFO) */
118 R3PTRTYPE(PPDMLUN) pLunsR3;
119 /** Pointer to the asynchronous notification callback set while in
120 * FNPDMDEVSUSPEND or FNPDMDEVPOWEROFF. */
121 R3PTRTYPE(PFNPDMDEVASYNCNOTIFY) pfnAsyncNotify;
122 /** Configuration handle to the instance node. */
123 R3PTRTYPE(PCFGMNODE) pCfgHandle;
124
125 /** R3 pointer to the VM this instance was created for. */
126 PVMR3 pVMR3;
127 /** R3 pointer to associated PCI device structure. */
128 R3PTRTYPE(struct PCIDevice *) pPciDeviceR3;
129 /** R3 pointer to associated PCI bus structure. */
130 R3PTRTYPE(PPDMPCIBUS) pPciBusR3;
131
132 /** R0 pointer to the VM this instance was created for. */
133 PVMR0 pVMR0;
134 /** R0 pointer to associated PCI device structure. */
135 R0PTRTYPE(struct PCIDevice *) pPciDeviceR0;
136 /** R0 pointer to associated PCI bus structure. */
137 R0PTRTYPE(PPDMPCIBUS) pPciBusR0;
138
139 /** RC pointer to the VM this instance was created for. */
140 PVMRC pVMRC;
141 /** RC pointer to associated PCI device structure. */
142 RCPTRTYPE(struct PCIDevice *) pPciDeviceRC;
143 /** RC pointer to associated PCI bus structure. */
144 RCPTRTYPE(PPDMPCIBUS) pPciBusRC;
145
146 /** Flags, see PDMDEVINSINT_FLAGS_XXX. */
147 uint32_t fIntFlags;
148} PDMDEVINSINT;
149
150/** @name PDMDEVINSINT::fIntFlags
151 * @{ */
152/** Used by pdmR3Load to mark device instances it found in the saved state. */
153#define PDMDEVINSINT_FLAGS_FOUND RT_BIT_32(0)
154/** Indicates that the device hasn't been powered on or resumed.
155 * This is used by PDMR3PowerOn, PDMR3Resume, PDMR3Suspend and PDMR3PowerOff
156 * to make sure each device gets exactly one notification for each of those
157 * events. PDMR3Resume and PDMR3PowerOn also makes use of it to bail out on
158 * a failure (already resumed/powered-on devices are suspended). */
159#define PDMDEVINSINT_FLAGS_SUSPENDED RT_BIT_32(1)
160/** Indicates that the device has been reset already. Used by PDMR3Reset. */
161#define PDMDEVINSINT_FLAGS_RESET RT_BIT_32(2)
162/** @} */
163
164
165/**
166 * Private USB device instance data.
167 */
168typedef struct PDMUSBINSINT
169{
170 /** The UUID of this instance. */
171 RTUUID Uuid;
172 /** Pointer to the next instance.
173 * (Head is pointed to by PDM::pUsbInstances.) */
174 R3PTRTYPE(PPDMUSBINS) pNext;
175 /** Pointer to the next per USB device instance.
176 * (Head is pointed to by PDMUSB::pInstances.) */
177 R3PTRTYPE(PPDMUSBINS) pPerDeviceNext;
178
179 /** Pointer to device structure. */
180 R3PTRTYPE(PPDMUSB) pUsbDev;
181
182 /** Pointer to the VM this instance was created for. */
183 PVMR3 pVM;
184 /** Pointer to the list of logical units associated with the device. (FIFO) */
185 R3PTRTYPE(PPDMLUN) pLuns;
186 /** The per instance device configuration. */
187 R3PTRTYPE(PCFGMNODE) pCfg;
188 /** Same as pCfg if the configuration should be deleted when detaching the device. */
189 R3PTRTYPE(PCFGMNODE) pCfgDelete;
190 /** The global device configuration. */
191 R3PTRTYPE(PCFGMNODE) pCfgGlobal;
192
193 /** Pointer to the USB hub this device is attached to.
194 * This is NULL if the device isn't connected to any HUB. */
195 R3PTRTYPE(PPDMUSBHUB) pHub;
196 /** The port number that we're connected to. */
197 uint32_t iPort;
198 /** Indicates that the USB device hasn't been powered on or resumed.
199 * See PDMDEVINSINT_FLAGS_SUSPENDED. */
200 bool fVMSuspended;
201 /** Indicates that the USB device has been reset. */
202 bool fVMReset;
203 /** Pointer to the asynchronous notification callback set while in
204 * FNPDMDEVSUSPEND or FNPDMDEVPOWEROFF. */
205 R3PTRTYPE(PFNPDMUSBASYNCNOTIFY) pfnAsyncNotify;
206} PDMUSBINSINT;
207
208
209/**
210 * Private driver instance data.
211 */
212typedef struct PDMDRVINSINT
213{
214 /** Pointer to the driver instance above.
215 * This is NULL for the topmost drive. */
216 R3PTRTYPE(PPDMDRVINS) pUp;
217 /** Pointer to the driver instance below.
218 * This is NULL for the bottommost driver. */
219 R3PTRTYPE(PPDMDRVINS) pDown;
220 /** Pointer to the logical unit this driver chained on. */
221 R3PTRTYPE(PPDMLUN) pLun;
222 /** Pointer to driver structure from which this was instantiated. */
223 R3PTRTYPE(PPDMDRV) pDrv;
224 /** Pointer to the VM this instance was created for, ring-3 context. */
225 PVMR3 pVMR3;
226 /** Pointer to the VM this instance was created for, ring-0 context. */
227 PVMR0 pVMR0;
228 /** Pointer to the VM this instance was created for, raw-mode context. */
229 PVMRC pVMRC;
230 /** Flag indicating that the driver is being detached and destroyed.
231 * (Helps detect potential recursive detaching.) */
232 bool fDetaching;
233 /** Indicates that the driver hasn't been powered on or resumed.
234 * See PDMDEVINSINT_FLAGS_SUSPENDED. */
235 bool fVMSuspended;
236 /** Indicates that the driver has been reset already. */
237 bool fVMReset;
238 /** Set if allocated on the hyper heap, false if on the ring-3 heap. */
239 bool fHyperHeap;
240 /** Pointer to the asynchronous notification callback set while in
241 * PDMUSBREG::pfnVMSuspend or PDMUSBREG::pfnVMPowerOff. */
242 R3PTRTYPE(PFNPDMDRVASYNCNOTIFY) pfnAsyncNotify;
243 /** Configuration handle to the instance node. */
244 R3PTRTYPE(PCFGMNODE) pCfgHandle;
245 /** Pointer to the ring-0 request handler function. */
246 PFNPDMDRVREQHANDLERR0 pfnReqHandlerR0;
247} PDMDRVINSINT;
248
249
250/**
251 * Private critical section data.
252 */
253typedef struct PDMCRITSECTINT
254{
255 /** The critical section core which is shared with IPRT. */
256 RTCRITSECT Core;
257 /** Pointer to the next critical section.
258 * This chain is used for relocating pVMRC and device cleanup. */
259 R3PTRTYPE(struct PDMCRITSECTINT *) pNext;
260 /** Owner identifier.
261 * This is pDevIns if the owner is a device. Similarly for a driver or service.
262 * PDMR3CritSectInit() sets this to point to the critsect itself. */
263 RTR3PTR pvKey;
264 /** Pointer to the VM - R3Ptr. */
265 PVMR3 pVMR3;
266 /** Pointer to the VM - R0Ptr. */
267 PVMR0 pVMR0;
268 /** Pointer to the VM - GCPtr. */
269 PVMRC pVMRC;
270 /** Alignment padding. */
271 uint32_t padding;
272 /** Event semaphore that is scheduled to be signaled upon leaving the
273 * critical section. This is Ring-3 only of course. */
274 RTSEMEVENT EventToSignal;
275 /** The lock name. */
276 R3PTRTYPE(const char *) pszName;
277 /** R0/RC lock contention. */
278 STAMCOUNTER StatContentionRZLock;
279 /** R0/RC unlock contention. */
280 STAMCOUNTER StatContentionRZUnlock;
281 /** R3 lock contention. */
282 STAMCOUNTER StatContentionR3;
283 /** Profiling the time the section is locked. */
284 STAMPROFILEADV StatLocked;
285} PDMCRITSECTINT;
286AssertCompileMemberAlignment(PDMCRITSECTINT, StatContentionRZLock, 8);
287/** Pointer to private critical section data. */
288typedef PDMCRITSECTINT *PPDMCRITSECTINT;
289
290/** Indicates that the critical section is queued for unlock.
291 * PDMCritSectIsOwner and PDMCritSectIsOwned optimizations. */
292#define PDMCRITSECT_FLAGS_PENDING_UNLOCK RT_BIT_32(17)
293
294
295/**
296 * The usual device/driver/internal/external stuff.
297 */
298typedef enum
299{
300 /** The usual invalid entry. */
301 PDMTHREADTYPE_INVALID = 0,
302 /** Device type. */
303 PDMTHREADTYPE_DEVICE,
304 /** USB Device type. */
305 PDMTHREADTYPE_USB,
306 /** Driver type. */
307 PDMTHREADTYPE_DRIVER,
308 /** Internal type. */
309 PDMTHREADTYPE_INTERNAL,
310 /** External type. */
311 PDMTHREADTYPE_EXTERNAL,
312 /** The usual 32-bit hack. */
313 PDMTHREADTYPE_32BIT_HACK = 0x7fffffff
314} PDMTHREADTYPE;
315
316
317/**
318 * The internal structure for the thread.
319 */
320typedef struct PDMTHREADINT
321{
322 /** The VM pointer. */
323 PVMR3 pVM;
324 /** The event semaphore the thread blocks on when not running. */
325 RTSEMEVENTMULTI BlockEvent;
326 /** The event semaphore the thread sleeps on while running. */
327 RTSEMEVENTMULTI SleepEvent;
328 /** Pointer to the next thread. */
329 R3PTRTYPE(struct PDMTHREAD *) pNext;
330 /** The thread type. */
331 PDMTHREADTYPE enmType;
332} PDMTHREADINT;
333
334
335
336/* Must be included after PDMDEVINSINT is defined. */
337#define PDMDEVINSINT_DECLARED
338#define PDMUSBINSINT_DECLARED
339#define PDMDRVINSINT_DECLARED
340#define PDMCRITSECTINT_DECLARED
341#define PDMTHREADINT_DECLARED
342#ifdef ___VBox_pdm_h
343# error "Invalid header PDM order. Include PDMInternal.h before VBox/pdm.h!"
344#endif
345RT_C_DECLS_END
346#include <VBox/pdm.h>
347RT_C_DECLS_BEGIN
348
349/**
350 * PDM Logical Unit.
351 *
352 * This typically the representation of a physical port on a
353 * device, like for instance the PS/2 keyboard port on the
354 * keyboard controller device. The LUNs are chained on the
355 * device the belong to (PDMDEVINSINT::pLunsR3).
356 */
357typedef struct PDMLUN
358{
359 /** The LUN - The Logical Unit Number. */
360 RTUINT iLun;
361 /** Pointer to the next LUN. */
362 PPDMLUN pNext;
363 /** Pointer to the top driver in the driver chain. */
364 PPDMDRVINS pTop;
365 /** Pointer to the bottom driver in the driver chain. */
366 PPDMDRVINS pBottom;
367 /** Pointer to the device instance which the LUN belongs to.
368 * Either this is set or pUsbIns is set. Both is never set at the same time. */
369 PPDMDEVINS pDevIns;
370 /** Pointer to the USB device instance which the LUN belongs to. */
371 PPDMUSBINS pUsbIns;
372 /** Pointer to the device base interface. */
373 PPDMIBASE pBase;
374 /** Description of this LUN. */
375 const char *pszDesc;
376} PDMLUN;
377
378
379/**
380 * PDM Device.
381 */
382typedef struct PDMDEV
383{
384 /** Pointer to the next device (R3 Ptr). */
385 R3PTRTYPE(PPDMDEV) pNext;
386 /** Device name length. (search optimization) */
387 RTUINT cchName;
388 /** Registration structure. */
389 R3PTRTYPE(const struct PDMDEVREG *) pReg;
390 /** Number of instances. */
391 uint32_t cInstances;
392 /** Pointer to chain of instances (R3 Ptr). */
393 PPDMDEVINSR3 pInstances;
394} PDMDEV;
395
396
397/**
398 * PDM USB Device.
399 */
400typedef struct PDMUSB
401{
402 /** Pointer to the next device (R3 Ptr). */
403 R3PTRTYPE(PPDMUSB) pNext;
404 /** Device name length. (search optimization) */
405 RTUINT cchName;
406 /** Registration structure. */
407 R3PTRTYPE(const struct PDMUSBREG *) pReg;
408 /** Next instance number. */
409 uint32_t iNextInstance;
410 /** Pointer to chain of instances (R3 Ptr). */
411 R3PTRTYPE(PPDMUSBINS) pInstances;
412} PDMUSB;
413
414
415/**
416 * PDM Driver.
417 */
418typedef struct PDMDRV
419{
420 /** Pointer to the next device. */
421 PPDMDRV pNext;
422 /** Registration structure. */
423 const struct PDMDRVREG * pReg;
424 /** Current number of instances. */
425 uint32_t cInstances;
426 /** The next instance number. */
427 uint32_t iNextInstance;
428} PDMDRV;
429
430
431/**
432 * PDM registered PIC device.
433 */
434typedef struct PDMPIC
435{
436 /** Pointer to the PIC device instance - R3. */
437 PPDMDEVINSR3 pDevInsR3;
438 /** @copydoc PDMPICREG::pfnSetIrqR3 */
439 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
440 /** @copydoc PDMPICREG::pfnGetInterruptR3 */
441 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
442
443 /** Pointer to the PIC device instance - R0. */
444 PPDMDEVINSR0 pDevInsR0;
445 /** @copydoc PDMPICREG::pfnSetIrqR3 */
446 DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
447 /** @copydoc PDMPICREG::pfnGetInterruptR3 */
448 DECLR0CALLBACKMEMBER(int, pfnGetInterruptR0,(PPDMDEVINS pDevIns));
449
450 /** Pointer to the PIC device instance - RC. */
451 PPDMDEVINSRC pDevInsRC;
452 /** @copydoc PDMPICREG::pfnSetIrqR3 */
453 DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
454 /** @copydoc PDMPICREG::pfnGetInterruptR3 */
455 DECLRCCALLBACKMEMBER(int, pfnGetInterruptRC,(PPDMDEVINS pDevIns));
456 /** Alignment padding. */
457 RTRCPTR RCPtrPadding;
458} PDMPIC;
459
460
461/**
462 * PDM registered APIC device.
463 */
464typedef struct PDMAPIC
465{
466 /** Pointer to the APIC device instance - R3 Ptr. */
467 PPDMDEVINSR3 pDevInsR3;
468 /** @copydoc PDMAPICREG::pfnGetInterruptR3 */
469 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
470 /** @copydoc PDMAPICREG::pfnHasPendingIrqR3 */
471 DECLR3CALLBACKMEMBER(bool, pfnHasPendingIrqR3,(PPDMDEVINS pDevIns));
472 /** @copydoc PDMAPICREG::pfnSetBaseR3 */
473 DECLR3CALLBACKMEMBER(void, pfnSetBaseR3,(PPDMDEVINS pDevIns, uint64_t u64Base));
474 /** @copydoc PDMAPICREG::pfnGetBaseR3 */
475 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseR3,(PPDMDEVINS pDevIns));
476 /** @copydoc PDMAPICREG::pfnSetTPRR3 */
477 DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
478 /** @copydoc PDMAPICREG::pfnGetTPRR3 */
479 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
480 /** @copydoc PDMAPICREG::pfnWriteMSRR3 */
481 DECLR3CALLBACKMEMBER(int, pfnWriteMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
482 /** @copydoc PDMAPICREG::pfnReadMSRR3 */
483 DECLR3CALLBACKMEMBER(int, pfnReadMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
484 /** @copydoc PDMAPICREG::pfnBusDeliverR3 */
485 DECLR3CALLBACKMEMBER(int, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
486 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
487 /** @copydoc PDMAPICREG::pfnLocalInterruptR3 */
488 DECLR3CALLBACKMEMBER(int, pfnLocalInterruptR3,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
489
490 /** Pointer to the APIC device instance - R0 Ptr. */
491 PPDMDEVINSR0 pDevInsR0;
492 /** @copydoc PDMAPICREG::pfnGetInterruptR3 */
493 DECLR0CALLBACKMEMBER(int, pfnGetInterruptR0,(PPDMDEVINS pDevIns));
494 /** @copydoc PDMAPICREG::pfnHasPendingIrqR3 */
495 DECLR0CALLBACKMEMBER(bool, pfnHasPendingIrqR0,(PPDMDEVINS pDevIns));
496 /** @copydoc PDMAPICREG::pfnSetBaseR3 */
497 DECLR0CALLBACKMEMBER(void, pfnSetBaseR0,(PPDMDEVINS pDevIns, uint64_t u64Base));
498 /** @copydoc PDMAPICREG::pfnGetBaseR3 */
499 DECLR0CALLBACKMEMBER(uint64_t, pfnGetBaseR0,(PPDMDEVINS pDevIns));
500 /** @copydoc PDMAPICREG::pfnSetTPRR3 */
501 DECLR0CALLBACKMEMBER(void, pfnSetTPRR0,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
502 /** @copydoc PDMAPICREG::pfnGetTPRR3 */
503 DECLR0CALLBACKMEMBER(uint8_t, pfnGetTPRR0,(PPDMDEVINS pDevIns, VMCPUID idCpu));
504 /** @copydoc PDMAPICREG::pfnWriteMSRR3 */
505 DECLR0CALLBACKMEMBER(uint32_t, pfnWriteMSRR0, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
506 /** @copydoc PDMAPICREG::pfnReadMSRR3 */
507 DECLR0CALLBACKMEMBER(uint32_t, pfnReadMSRR0, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
508 /** @copydoc PDMAPICREG::pfnBusDeliverR3 */
509 DECLR0CALLBACKMEMBER(int, pfnBusDeliverR0,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
510 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
511 /** @copydoc PDMAPICREG::pfnLocalInterruptR3 */
512 DECLR0CALLBACKMEMBER(int, pfnLocalInterruptR0,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
513
514 /** Pointer to the APIC device instance - RC Ptr. */
515 PPDMDEVINSRC pDevInsRC;
516 /** @copydoc PDMAPICREG::pfnGetInterruptR3 */
517 DECLRCCALLBACKMEMBER(int, pfnGetInterruptRC,(PPDMDEVINS pDevIns));
518 /** @copydoc PDMAPICREG::pfnHasPendingIrqR3 */
519 DECLRCCALLBACKMEMBER(bool, pfnHasPendingIrqRC,(PPDMDEVINS pDevIns));
520 /** @copydoc PDMAPICREG::pfnSetBaseR3 */
521 DECLRCCALLBACKMEMBER(void, pfnSetBaseRC,(PPDMDEVINS pDevIns, uint64_t u64Base));
522 /** @copydoc PDMAPICREG::pfnGetBaseR3 */
523 DECLRCCALLBACKMEMBER(uint64_t, pfnGetBaseRC,(PPDMDEVINS pDevIns));
524 /** @copydoc PDMAPICREG::pfnSetTPRR3 */
525 DECLRCCALLBACKMEMBER(void, pfnSetTPRRC,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
526 /** @copydoc PDMAPICREG::pfnGetTPRR3 */
527 DECLRCCALLBACKMEMBER(uint8_t, pfnGetTPRRC,(PPDMDEVINS pDevIns, VMCPUID idCpu));
528 /** @copydoc PDMAPICREG::pfnWriteMSRR3 */
529 DECLRCCALLBACKMEMBER(uint32_t, pfnWriteMSRRC, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
530 /** @copydoc PDMAPICREG::pfnReadMSRR3 */
531 DECLRCCALLBACKMEMBER(uint32_t, pfnReadMSRRC, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
532 /** @copydoc PDMAPICREG::pfnBusDeliverR3 */
533 DECLRCCALLBACKMEMBER(int, pfnBusDeliverRC,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
534 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
535 /** @copydoc PDMAPICREG::pfnLocalInterruptR3 */
536 DECLRCCALLBACKMEMBER(int, pfnLocalInterruptRC,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
537 RTRCPTR RCPtrAlignment;
538
539} PDMAPIC;
540
541
542/**
543 * PDM registered I/O APIC device.
544 */
545typedef struct PDMIOAPIC
546{
547 /** Pointer to the APIC device instance - R3 Ptr. */
548 PPDMDEVINSR3 pDevInsR3;
549 /** @copydoc PDMIOAPICREG::pfnSetIrqR3 */
550 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
551 /** @copydoc PDMIOAPICREG::pfnSendMsiR3 */
552 DECLR3CALLBACKMEMBER(void, pfnSendMsiR3,(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue));
553
554 /** Pointer to the PIC device instance - R0. */
555 PPDMDEVINSR0 pDevInsR0;
556 /** @copydoc PDMIOAPICREG::pfnSetIrqR3 */
557 DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
558 /** @copydoc PDMIOAPICREG::pfnSendMsiR3 */
559 DECLR0CALLBACKMEMBER(void, pfnSendMsiR0,(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue));
560
561 /** Pointer to the APIC device instance - RC Ptr. */
562 PPDMDEVINSRC pDevInsRC;
563 /** @copydoc PDMIOAPICREG::pfnSetIrqR3 */
564 DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
565 /** @copydoc PDMIOAPICREG::pfnSendMsiR3 */
566 DECLRCCALLBACKMEMBER(void, pfnSendMsiRC,(PPDMDEVINS pDevIns, RTGCPHYS GCAddr, uint32_t uValue));
567
568 uint8_t Alignment[4];
569} PDMIOAPIC;
570
571/** Maximum number of PCI busses for a VM. */
572#define PDM_PCI_BUSSES_MAX 8
573
574/**
575 * PDM PCI Bus instance.
576 */
577typedef struct PDMPCIBUS
578{
579 /** PCI bus number. */
580 RTUINT iBus;
581 RTUINT uPadding0; /**< Alignment padding.*/
582
583 /** Pointer to PCI Bus device instance. */
584 PPDMDEVINSR3 pDevInsR3;
585 /** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */
586 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
587 /** @copydoc PDMPCIBUSREG::pfnRegisterR3 */
588 DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
589 /** @copydoc PDMPCIBUSREG::pfnPCIRegisterMsiR3 */
590 DECLR3CALLBACKMEMBER(int, pfnRegisterMsiR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PPDMMSIREG pMsiReg));
591 /** @copydoc PDMPCIBUSREG::pfnIORegionRegisterR3 */
592 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion,
593 PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
594 /** @copydoc PDMPCIBUSREG::pfnSetConfigCallbacksR3 */
595 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead,
596 PPFNPCICONFIGREAD ppfnReadOld, PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
597 /** @copydoc PDMPCIBUSREG::pfnSaveExecR3 */
598 DECLR3CALLBACKMEMBER(int, pfnSaveExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
599 /** @copydoc PDMPCIBUSREG::pfnLoadExecR3 */
600 DECLR3CALLBACKMEMBER(int, pfnLoadExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
601 /** @copydoc PDMPCIBUSREG::pfnFakePCIBIOSR3 */
602 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
603
604 /** Pointer to the PIC device instance - R0. */
605 R0PTRTYPE(PPDMDEVINS) pDevInsR0;
606 /** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */
607 DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
608
609 /** Pointer to PCI Bus device instance. */
610 PPDMDEVINSRC pDevInsRC;
611 /** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */
612 DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
613} PDMPCIBUS;
614
615
616#ifdef IN_RING3
617/**
618 * PDM registered DMAC (DMA Controller) device.
619 */
620typedef struct PDMDMAC
621{
622 /** Pointer to the DMAC device instance. */
623 PPDMDEVINSR3 pDevIns;
624 /** Copy of the registration structure. */
625 PDMDMACREG Reg;
626} PDMDMAC;
627
628
629/**
630 * PDM registered RTC (Real Time Clock) device.
631 */
632typedef struct PDMRTC
633{
634 /** Pointer to the RTC device instance. */
635 PPDMDEVINSR3 pDevIns;
636 /** Copy of the registration structure. */
637 PDMRTCREG Reg;
638} PDMRTC;
639
640#endif /* IN_RING3 */
641
642/**
643 * Module type.
644 */
645typedef enum PDMMODTYPE
646{
647 /** Raw-mode (RC) context module. */
648 PDMMOD_TYPE_RC,
649 /** Ring-0 (host) context module. */
650 PDMMOD_TYPE_R0,
651 /** Ring-3 (host) context module. */
652 PDMMOD_TYPE_R3
653} PDMMODTYPE;
654
655
656/** The module name length including the terminator. */
657#define PDMMOD_NAME_LEN 32
658
659/**
660 * Loaded module instance.
661 */
662typedef struct PDMMOD
663{
664 /** Module name. This is used for referring to
665 * the module internally, sort of like a handle. */
666 char szName[PDMMOD_NAME_LEN];
667 /** Module type. */
668 PDMMODTYPE eType;
669 /** Loader module handle. Not used for R0 modules. */
670 RTLDRMOD hLdrMod;
671 /** Loaded address.
672 * This is the 'handle' for R0 modules. */
673 RTUINTPTR ImageBase;
674 /** Old loaded address.
675 * This is used during relocation of GC modules. Not used for R0 modules. */
676 RTUINTPTR OldImageBase;
677 /** Where the R3 HC bits are stored.
678 * This can be equal to ImageBase but doesn't have to. Not used for R0 modules. */
679 void *pvBits;
680
681 /** Pointer to next module. */
682 struct PDMMOD *pNext;
683 /** Module filename. */
684 char szFilename[1];
685} PDMMOD;
686/** Pointer to loaded module instance. */
687typedef PDMMOD *PPDMMOD;
688
689
690
691/** Extra space in the free array. */
692#define PDMQUEUE_FREE_SLACK 16
693
694/**
695 * Queue type.
696 */
697typedef enum PDMQUEUETYPE
698{
699 /** Device consumer. */
700 PDMQUEUETYPE_DEV = 1,
701 /** Driver consumer. */
702 PDMQUEUETYPE_DRV,
703 /** Internal consumer. */
704 PDMQUEUETYPE_INTERNAL,
705 /** External consumer. */
706 PDMQUEUETYPE_EXTERNAL
707} PDMQUEUETYPE;
708
709/** Pointer to a PDM Queue. */
710typedef struct PDMQUEUE *PPDMQUEUE;
711
712/**
713 * PDM Queue.
714 */
715typedef struct PDMQUEUE
716{
717 /** Pointer to the next queue in the list. */
718 R3PTRTYPE(PPDMQUEUE) pNext;
719 /** Type specific data. */
720 union
721 {
722 /** PDMQUEUETYPE_DEV */
723 struct
724 {
725 /** Pointer to consumer function. */
726 R3PTRTYPE(PFNPDMQUEUEDEV) pfnCallback;
727 /** Pointer to the device instance owning the queue. */
728 R3PTRTYPE(PPDMDEVINS) pDevIns;
729 } Dev;
730 /** PDMQUEUETYPE_DRV */
731 struct
732 {
733 /** Pointer to consumer function. */
734 R3PTRTYPE(PFNPDMQUEUEDRV) pfnCallback;
735 /** Pointer to the driver instance owning the queue. */
736 R3PTRTYPE(PPDMDRVINS) pDrvIns;
737 } Drv;
738 /** PDMQUEUETYPE_INTERNAL */
739 struct
740 {
741 /** Pointer to consumer function. */
742 R3PTRTYPE(PFNPDMQUEUEINT) pfnCallback;
743 } Int;
744 /** PDMQUEUETYPE_EXTERNAL */
745 struct
746 {
747 /** Pointer to consumer function. */
748 R3PTRTYPE(PFNPDMQUEUEEXT) pfnCallback;
749 /** Pointer to user argument. */
750 R3PTRTYPE(void *) pvUser;
751 } Ext;
752 } u;
753 /** Queue type. */
754 PDMQUEUETYPE enmType;
755 /** The interval between checking the queue for events.
756 * The realtime timer below is used to do the waiting.
757 * If 0, the queue will use the VM_FF_PDM_QUEUE forced action. */
758 uint32_t cMilliesInterval;
759 /** Interval timer. Only used if cMilliesInterval is non-zero. */
760 PTMTIMERR3 pTimer;
761 /** Pointer to the VM - R3. */
762 PVMR3 pVMR3;
763 /** LIFO of pending items - R3. */
764 R3PTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingR3;
765 /** Pointer to the VM - R0. */
766 PVMR0 pVMR0;
767 /** LIFO of pending items - R0. */
768 R0PTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingR0;
769 /** Pointer to the GC VM and indicator for GC enabled queue.
770 * If this is NULL, the queue cannot be used in GC.
771 */
772 PVMRC pVMRC;
773 /** LIFO of pending items - GC. */
774 RCPTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingRC;
775
776 /** Item size (bytes). */
777 uint32_t cbItem;
778 /** Number of items in the queue. */
779 uint32_t cItems;
780 /** Index to the free head (where we insert). */
781 uint32_t volatile iFreeHead;
782 /** Index to the free tail (where we remove). */
783 uint32_t volatile iFreeTail;
784
785 /** Unique queue name. */
786 R3PTRTYPE(const char *) pszName;
787#if HC_ARCH_BITS == 32
788 RTR3PTR Alignment1;
789#endif
790 /** Stat: Times PDMQueueAlloc fails. */
791 STAMCOUNTER StatAllocFailures;
792 /** Stat: PDMQueueInsert calls. */
793 STAMCOUNTER StatInsert;
794 /** Stat: Queue flushes. */
795 STAMCOUNTER StatFlush;
796 /** Stat: Queue flushes with pending items left over. */
797 STAMCOUNTER StatFlushLeftovers;
798#ifdef VBOX_WITH_STATISTICS
799 /** State: Profiling the flushing. */
800 STAMPROFILE StatFlushPrf;
801 /** State: Pending items. */
802 uint32_t volatile cStatPending;
803 uint32_t volatile cAlignment;
804#endif
805
806 /** Array of pointers to free items. Variable size. */
807 struct PDMQUEUEFREEITEM
808 {
809 /** Pointer to the free item - HC Ptr. */
810 R3PTRTYPE(PPDMQUEUEITEMCORE) volatile pItemR3;
811 /** Pointer to the free item - HC Ptr. */
812 R0PTRTYPE(PPDMQUEUEITEMCORE) volatile pItemR0;
813 /** Pointer to the free item - GC Ptr. */
814 RCPTRTYPE(PPDMQUEUEITEMCORE) volatile pItemRC;
815#if HC_ARCH_BITS == 64
816 RTRCPTR Alignment0;
817#endif
818 } aFreeItems[1];
819} PDMQUEUE;
820
821/** @name PDM::fQueueFlushing
822 * @{ */
823/** Used to make sure only one EMT will flush the queues.
824 * Set when an EMT is flushing queues, clear otherwise. */
825#define PDM_QUEUE_FLUSH_FLAG_ACTIVE_BIT 0
826/** Indicating there are queues with items pending.
827 * This is make sure we don't miss inserts happening during flushing. The FF
828 * cannot be used for this since it has to be cleared immediately to prevent
829 * other EMTs from spinning. */
830#define PDM_QUEUE_FLUSH_FLAG_PENDING_BIT 1
831/** }@ */
832
833
834/**
835 * Queue device helper task operation.
836 */
837typedef enum PDMDEVHLPTASKOP
838{
839 /** The usual invalid 0 entry. */
840 PDMDEVHLPTASKOP_INVALID = 0,
841 /** ISASetIrq */
842 PDMDEVHLPTASKOP_ISA_SET_IRQ,
843 /** PCISetIrq */
844 PDMDEVHLPTASKOP_PCI_SET_IRQ,
845 /** PCISetIrq */
846 PDMDEVHLPTASKOP_IOAPIC_SET_IRQ,
847 /** The usual 32-bit hack. */
848 PDMDEVHLPTASKOP_32BIT_HACK = 0x7fffffff
849} PDMDEVHLPTASKOP;
850
851/**
852 * Queued Device Helper Task.
853 */
854typedef struct PDMDEVHLPTASK
855{
856 /** The queue item core (don't touch). */
857 PDMQUEUEITEMCORE Core;
858 /** Pointer to the device instance (R3 Ptr). */
859 PPDMDEVINSR3 pDevInsR3;
860 /** This operation to perform. */
861 PDMDEVHLPTASKOP enmOp;
862#if HC_ARCH_BITS == 64
863 uint32_t Alignment0;
864#endif
865 /** Parameters to the operation. */
866 union PDMDEVHLPTASKPARAMS
867 {
868 /**
869 * PDMDEVHLPTASKOP_ISA_SET_IRQ and PDMDEVHLPTASKOP_PCI_SET_IRQ.
870 */
871 struct PDMDEVHLPTASKSETIRQ
872 {
873 /** The IRQ */
874 int iIrq;
875 /** The new level. */
876 int iLevel;
877 } SetIRQ;
878 } u;
879} PDMDEVHLPTASK;
880/** Pointer to a queued Device Helper Task. */
881typedef PDMDEVHLPTASK *PPDMDEVHLPTASK;
882/** Pointer to a const queued Device Helper Task. */
883typedef const PDMDEVHLPTASK *PCPDMDEVHLPTASK;
884
885
886
887/**
888 * An USB hub registration record.
889 */
890typedef struct PDMUSBHUB
891{
892 /** The USB versions this hub support.
893 * Note that 1.1 hubs can take on 2.0 devices. */
894 uint32_t fVersions;
895 /** The number of ports on the hub. */
896 uint32_t cPorts;
897 /** The number of available ports (0..cPorts). */
898 uint32_t cAvailablePorts;
899 /** The driver instance of the hub. */
900 PPDMDRVINS pDrvIns;
901 /** Copy of the to the registration structure. */
902 PDMUSBHUBREG Reg;
903
904 /** Pointer to the next hub in the list. */
905 struct PDMUSBHUB *pNext;
906} PDMUSBHUB;
907
908/** Pointer to a const USB HUB registration record. */
909typedef const PDMUSBHUB *PCPDMUSBHUB;
910
911/** Pointer to a PDM Async I/O template. */
912typedef struct PDMASYNCCOMPLETIONTEMPLATE *PPDMASYNCCOMPLETIONTEMPLATE;
913
914/** Pointer to the main PDM Async completion endpoint class. */
915typedef struct PDMASYNCCOMPLETIONEPCLASS *PPDMASYNCCOMPLETIONEPCLASS;
916
917/** Pointer to the global block cache structure. */
918typedef struct PDMBLKCACHEGLOBAL *PPDMBLKCACHEGLOBAL;
919
920/**
921 * PDM VMCPU Instance data.
922 * Changes to this must checked against the padding of the cfgm union in VMCPU!
923 */
924typedef struct PDMCPU
925{
926 /** The number of entries in the apQueuedCritSectsLeaves table that's currently in use. */
927 uint32_t cQueuedCritSectLeaves;
928 uint32_t uPadding0; /**< Alignment padding.*/
929 /** Critical sections queued in RC/R0 because of contention preventing leave to complete. (R3 Ptrs)
930 * We will return to Ring-3 ASAP, so this queue doesn't have to be very long. */
931 R3PTRTYPE(PPDMCRITSECT) apQueuedCritSectsLeaves[8];
932} PDMCPU;
933
934/**
935 * Converts a PDM pointer into a VM pointer.
936 * @returns Pointer to the VM structure the PDM is part of.
937 * @param pPDM Pointer to PDM instance data.
938 */
939#define PDM2VM(pPDM) ( (PVM)((char*)pPDM - pPDM->offVM) )
940
941
942/**
943 * PDM VM Instance data.
944 * Changes to this must checked against the padding of the cfgm union in VM!
945 */
946typedef struct PDM
947{
948 /** Offset to the VM structure.
949 * See PDM2VM(). */
950 RTUINT offVM;
951 RTUINT uPadding0; /**< Alignment padding.*/
952
953 /** List of registered devices. (FIFO) */
954 R3PTRTYPE(PPDMDEV) pDevs;
955 /** List of devices instances. (FIFO) */
956 R3PTRTYPE(PPDMDEVINS) pDevInstances;
957 /** List of registered USB devices. (FIFO) */
958 R3PTRTYPE(PPDMUSB) pUsbDevs;
959 /** List of USB devices instances. (FIFO) */
960 R3PTRTYPE(PPDMUSBINS) pUsbInstances;
961 /** List of registered drivers. (FIFO) */
962 R3PTRTYPE(PPDMDRV) pDrvs;
963 /** PCI Buses. */
964 PDMPCIBUS aPciBuses[PDM_PCI_BUSSES_MAX];
965 /** The register PIC device. */
966 PDMPIC Pic;
967 /** The registered APIC device. */
968 PDMAPIC Apic;
969 /** The registered I/O APIC device. */
970 PDMIOAPIC IoApic;
971 /** The registered DMAC device. */
972 R3PTRTYPE(PPDMDMAC) pDmac;
973 /** The registered RTC device. */
974 R3PTRTYPE(PPDMRTC) pRtc;
975 /** The registered USB HUBs. (FIFO) */
976 R3PTRTYPE(PPDMUSBHUB) pUsbHubs;
977
978 /** Queue in which devhlp tasks are queued for R3 execution - R3 Ptr. */
979 R3PTRTYPE(PPDMQUEUE) pDevHlpQueueR3;
980 /** Queue in which devhlp tasks are queued for R3 execution - R0 Ptr. */
981 R0PTRTYPE(PPDMQUEUE) pDevHlpQueueR0;
982 /** Queue in which devhlp tasks are queued for R3 execution - RC Ptr. */
983 RCPTRTYPE(PPDMQUEUE) pDevHlpQueueRC;
984 /** Pointer to the queue which should be manually flushed - RC Ptr.
985 * Only touched by EMT. */
986 RCPTRTYPE(struct PDMQUEUE *) pQueueFlushRC;
987 /** Pointer to the queue which should be manually flushed - R0 Ptr.
988 * Only touched by EMT. */
989 R0PTRTYPE(struct PDMQUEUE *) pQueueFlushR0;
990 /** Bitmask controlling the queue flushing.
991 * See PDM_QUEUE_FLUSH_FLAG_ACTIVE and PDM_QUEUE_FLUSH_FLAG_PENDING. */
992 uint32_t volatile fQueueFlushing;
993 /** Alignment padding. */
994 uint32_t u32Padding2;
995
996 /** @name VMM device heap
997 * @{ */
998 /** Pointer to the heap base (MMIO2 ring-3 mapping). NULL if not registered. */
999 RTR3PTR pvVMMDevHeap;
1000 /** The heap size. */
1001 uint32_t cbVMMDevHeap;
1002 /** Free space. */
1003 uint32_t cbVMMDevHeapLeft;
1004 /** The current mapping. NIL_RTGCPHYS if not mapped or registered. */
1005 RTGCPHYS GCPhysVMMDevHeap;
1006 /** @} */
1007
1008 /** The PDM lock.
1009 * This is used to protect everything that deals with interrupts, i.e.
1010 * the PIC, APIC, IOAPIC and PCI devices plus some PDM functions. */
1011 PDMCRITSECT CritSect;
1012
1013 /** Number of times a critical section leave request needed to be queued for ring-3 execution. */
1014 STAMCOUNTER StatQueuedCritSectLeaves;
1015} PDM;
1016AssertCompileMemberAlignment(PDM, GCPhysVMMDevHeap, sizeof(RTGCPHYS));
1017AssertCompileMemberAlignment(PDM, CritSect, 8);
1018AssertCompileMemberAlignment(PDM, StatQueuedCritSectLeaves, 8);
1019/** Pointer to PDM VM instance data. */
1020typedef PDM *PPDM;
1021
1022
1023
1024/**
1025 * PDM data kept in the UVM.
1026 */
1027typedef struct PDMUSERPERVM
1028{
1029 /** @todo move more stuff over here. */
1030
1031 /** Linked list of timer driven PDM queues.
1032 * Currently serialized by PDM::CritSect. */
1033 R3PTRTYPE(struct PDMQUEUE *) pQueuesTimer;
1034 /** Linked list of force action driven PDM queues.
1035 * Currently serialized by PDM::CritSect. */
1036 R3PTRTYPE(struct PDMQUEUE *) pQueuesForced;
1037
1038 /** Lock protecting the lists below it. */
1039 RTCRITSECT ListCritSect;
1040 /** Pointer to list of loaded modules. */
1041 PPDMMOD pModules;
1042 /** List of initialized critical sections. (LIFO) */
1043 R3PTRTYPE(PPDMCRITSECTINT) pCritSects;
1044 /** Head of the PDM Thread list. (singly linked) */
1045 R3PTRTYPE(PPDMTHREAD) pThreads;
1046 /** Tail of the PDM Thread list. (singly linked) */
1047 R3PTRTYPE(PPDMTHREAD) pThreadsTail;
1048
1049 /** @name PDM Async Completion
1050 * @{ */
1051 /** Pointer to the array of supported endpoint classes. */
1052 PPDMASYNCCOMPLETIONEPCLASS apAsyncCompletionEndpointClass[PDMASYNCCOMPLETIONEPCLASSTYPE_MAX];
1053 /** Head of the templates. Singly linked, protected by ListCritSect. */
1054 R3PTRTYPE(PPDMASYNCCOMPLETIONTEMPLATE) pAsyncCompletionTemplates;
1055 /** @} */
1056
1057 R3PTRTYPE(PPDMBLKCACHEGLOBAL) pBlkCacheGlobal;
1058
1059} PDMUSERPERVM;
1060/** Pointer to the PDM data kept in the UVM. */
1061typedef PDMUSERPERVM *PPDMUSERPERVM;
1062
1063
1064
1065/*******************************************************************************
1066* Global Variables *
1067*******************************************************************************/
1068#ifdef IN_RING3
1069extern const PDMDRVHLPR3 g_pdmR3DrvHlp;
1070extern const PDMDEVHLPR3 g_pdmR3DevHlpTrusted;
1071extern const PDMDEVHLPR3 g_pdmR3DevHlpUnTrusted;
1072extern const PDMPICHLPR3 g_pdmR3DevPicHlp;
1073extern const PDMAPICHLPR3 g_pdmR3DevApicHlp;
1074extern const PDMIOAPICHLPR3 g_pdmR3DevIoApicHlp;
1075extern const PDMPCIHLPR3 g_pdmR3DevPciHlp;
1076extern const PDMDMACHLP g_pdmR3DevDmacHlp;
1077extern const PDMRTCHLP g_pdmR3DevRtcHlp;
1078extern const PDMHPETHLPR3 g_pdmR3DevHpetHlp;
1079#endif
1080
1081
1082/*******************************************************************************
1083* Defined Constants And Macros *
1084*******************************************************************************/
1085/** @def PDMDEV_ASSERT_DEVINS
1086 * Asserts the validity of the device instance.
1087 */
1088#ifdef VBOX_STRICT
1089# define PDMDEV_ASSERT_DEVINS(pDevIns) \
1090 do { \
1091 AssertPtr(pDevIns); \
1092 Assert(pDevIns->u32Version == PDM_DEVINS_VERSION); \
1093 Assert(pDevIns->CTX_SUFF(pvInstanceData) == (void *)&pDevIns->achInstanceData[0]); \
1094 } while (0)
1095#else
1096# define PDMDEV_ASSERT_DEVINS(pDevIns) do { } while (0)
1097#endif
1098
1099/** @def PDMDRV_ASSERT_DRVINS
1100 * Asserts the validity of the driver instance.
1101 */
1102#ifdef VBOX_STRICT
1103# define PDMDRV_ASSERT_DRVINS(pDrvIns) \
1104 do { \
1105 AssertPtr(pDrvIns); \
1106 Assert(pDrvIns->u32Version == PDM_DRVINS_VERSION); \
1107 Assert(pDrvIns->CTX_SUFF(pvInstanceData) == (void *)&pDrvIns->achInstanceData[0]); \
1108 } while (0)
1109#else
1110# define PDMDRV_ASSERT_DRVINS(pDrvIns) do { } while (0)
1111#endif
1112
1113
1114/*******************************************************************************
1115* Internal Functions *
1116*******************************************************************************/
1117#ifdef IN_RING3
1118int pdmR3CritSectInitStats(PVM pVM);
1119void pdmR3CritSectRelocate(PVM pVM);
1120int pdmR3CritSectInitDevice(PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL, const char *pszNameFmt, va_list va);
1121int pdmR3CritSectDeleteDevice(PVM pVM, PPDMDEVINS pDevIns);
1122int pdmR3CritSectInitDriver(PVM pVM, PPDMDRVINS pDrvIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL, const char *pszNameFmt, ...);
1123int pdmR3CritSectDeleteDriver(PVM pVM, PPDMDRVINS pDrvIns);
1124
1125int pdmR3DevInit(PVM pVM);
1126PPDMDEV pdmR3DevLookup(PVM pVM, const char *pszName);
1127int pdmR3DevFindLun(PVM pVM, const char *pszDevice, unsigned iInstance, unsigned iLun, PPDMLUN *ppLun);
1128DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem);
1129
1130int pdmR3UsbLoadModules(PVM pVM);
1131int pdmR3UsbInstantiateDevices(PVM pVM);
1132PPDMUSB pdmR3UsbLookup(PVM pVM, const char *pszName);
1133int pdmR3UsbFindLun(PVM pVM, const char *pszDevice, unsigned iInstance, unsigned iLun, PPDMLUN *ppLun);
1134int pdmR3UsbRegisterHub(PVM pVM, PPDMDRVINS pDrvIns, uint32_t fVersions, uint32_t cPorts, PCPDMUSBHUBREG pUsbHubReg, PPCPDMUSBHUBHLP ppUsbHubHlp);
1135int pdmR3UsbVMInitComplete(PVM pVM);
1136
1137int pdmR3DrvInit(PVM pVM);
1138int pdmR3DrvInstantiate(PVM pVM, PCFGMNODE pNode, PPDMIBASE pBaseInterface, PPDMDRVINS pDrvAbove,
1139 PPDMLUN pLun, PPDMIBASE *ppBaseInterface);
1140int pdmR3DrvDetach(PPDMDRVINS pDrvIns, uint32_t fFlags);
1141void pdmR3DrvDestroyChain(PPDMDRVINS pDrvIns, uint32_t fFlags);
1142PPDMDRV pdmR3DrvLookup(PVM pVM, const char *pszName);
1143
1144int pdmR3LdrInitU(PUVM pUVM);
1145void pdmR3LdrTermU(PUVM pUVM);
1146char * pdmR3FileR3(const char *pszFile, bool fShared = false);
1147int pdmR3LoadR3U(PUVM pUVM, const char *pszFilename, const char *pszName);
1148
1149void pdmR3QueueRelocate(PVM pVM, RTGCINTPTR offDelta);
1150
1151int pdmR3ThreadCreateDevice(PVM pVM, PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
1152 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1153int pdmR3ThreadCreateUsb(PVM pVM, PPDMDRVINS pUsbIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADUSB pfnThread,
1154 PFNPDMTHREADWAKEUPUSB pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1155int pdmR3ThreadCreateDriver(PVM pVM, PPDMDRVINS pDrvIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDRV pfnThread,
1156 PFNPDMTHREADWAKEUPDRV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1157int pdmR3ThreadDestroyDevice(PVM pVM, PPDMDEVINS pDevIns);
1158int pdmR3ThreadDestroyUsb(PVM pVM, PPDMUSBINS pUsbIns);
1159int pdmR3ThreadDestroyDriver(PVM pVM, PPDMDRVINS pDrvIns);
1160void pdmR3ThreadDestroyAll(PVM pVM);
1161int pdmR3ThreadResumeAll(PVM pVM);
1162int pdmR3ThreadSuspendAll(PVM pVM);
1163
1164#ifdef VBOX_WITH_PDM_ASYNC_COMPLETION
1165int pdmR3AsyncCompletionInit(PVM pVM);
1166int pdmR3AsyncCompletionTerm(PVM pVM);
1167void pdmR3AsyncCompletionResume(PVM pVM);
1168#endif
1169
1170int pdmR3BlkCacheInit(PVM pVM);
1171void pdmR3BlkCacheTerm(PVM pVM);
1172
1173#endif /* IN_RING3 */
1174
1175void pdmLock(PVM pVM);
1176int pdmLockEx(PVM pVM, int rc);
1177void pdmUnlock(PVM pVM);
1178
1179/** @} */
1180
1181RT_C_DECLS_END
1182
1183#endif
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