VirtualBox

source: vbox/trunk/src/VBox/VMM/PDMInternal.h@ 26944

Last change on this file since 26944 was 26175, checked in by vboxsync, 15 years ago

PDM: Ring-0 and raw-mode context driver helpers. Driver RC relcoations.
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File size: 44.0 KB
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1/* $Id: PDMInternal.h 26175 2010-02-02 22:14:21Z vboxsync $ */
2/** @file
3 * PDM - Internal header file.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22#ifndef ___PDMInternal_h
23#define ___PDMInternal_h
24
25#include <VBox/types.h>
26#include <VBox/param.h>
27#include <VBox/cfgm.h>
28#include <VBox/stam.h>
29#include <VBox/vusb.h>
30#include <VBox/pdmasynccompletion.h>
31#include <VBox/pdmcommon.h>
32#include <iprt/assert.h>
33#include <iprt/critsect.h>
34#ifdef IN_RING3
35# include <iprt/thread.h>
36#endif
37
38RT_C_DECLS_BEGIN
39
40
41/** @defgroup grp_pdm_int Internal
42 * @ingroup grp_pdm
43 * @internal
44 * @{
45 */
46
47/** @def PDM_WITH_R3R0_CRIT_SECT
48 * Enables or disabled ring-3/ring-0 critical sections. */
49#if defined(DOXYGEN_RUNNING) || 1
50# define PDM_WITH_R3R0_CRIT_SECT
51#endif
52
53/** @def PDMCRITSECT_STRICT
54 * Enables/disables PDM critsect strictness like deadlock detection. */
55#if (defined(RT_LOCK_STRICT) && defined(IN_RING3)) || defined(DOXYGEN_RUNNING)
56# define PDMCRITSECT_STRICT
57#endif
58
59
60/*******************************************************************************
61* Structures and Typedefs *
62*******************************************************************************/
63
64/** Pointer to a PDM Device. */
65typedef struct PDMDEV *PPDMDEV;
66/** Pointer to a pointer to a PDM Device. */
67typedef PPDMDEV *PPPDMDEV;
68
69/** Pointer to a PDM USB Device. */
70typedef struct PDMUSB *PPDMUSB;
71/** Pointer to a pointer to a PDM USB Device. */
72typedef PPDMUSB *PPPDMUSB;
73
74/** Pointer to a PDM Driver. */
75typedef struct PDMDRV *PPDMDRV;
76/** Pointer to a pointer to a PDM Driver. */
77typedef PPDMDRV *PPPDMDRV;
78
79/** Pointer to a PDM Logical Unit. */
80typedef struct PDMLUN *PPDMLUN;
81/** Pointer to a pointer to a PDM Logical Unit. */
82typedef PPDMLUN *PPPDMLUN;
83
84/** Pointer to a PDM PCI Bus instance. */
85typedef struct PDMPCIBUS *PPDMPCIBUS;
86/** Pointer to a DMAC instance. */
87typedef struct PDMDMAC *PPDMDMAC;
88/** Pointer to a RTC instance. */
89typedef struct PDMRTC *PPDMRTC;
90
91/** Pointer to an USB HUB registration record. */
92typedef struct PDMUSBHUB *PPDMUSBHUB;
93
94/**
95 * Private device instance data.
96 */
97typedef struct PDMDEVINSINT
98{
99 /** Pointer to the next instance (HC Ptr).
100 * (Head is pointed to by PDM::pDevInstances.) */
101 R3PTRTYPE(PPDMDEVINS) pNextR3;
102 /** Pointer to the next per device instance (HC Ptr).
103 * (Head is pointed to by PDMDEV::pInstances.) */
104 R3PTRTYPE(PPDMDEVINS) pPerDeviceNextR3;
105 /** Pointer to device structure - HC Ptr. */
106 R3PTRTYPE(PPDMDEV) pDevR3;
107 /** Pointer to the list of logical units associated with the device. (FIFO) */
108 R3PTRTYPE(PPDMLUN) pLunsR3;
109 /** Pointer to the asynchronous notification callback set while in
110 * FNPDMDEVSUSPEND or FNPDMDEVPOWEROFF. */
111 R3PTRTYPE(PFNPDMDEVASYNCNOTIFY) pfnAsyncNotify;
112 /** Configuration handle to the instance node. */
113 R3PTRTYPE(PCFGMNODE) pCfgHandle;
114
115 /** R3 pointer to the VM this instance was created for. */
116 PVMR3 pVMR3;
117 /** R3 pointer to associated PCI device structure. */
118 R3PTRTYPE(struct PCIDevice *) pPciDeviceR3;
119 /** R3 pointer to associated PCI bus structure. */
120 R3PTRTYPE(PPDMPCIBUS) pPciBusR3;
121
122 /** R0 pointer to the VM this instance was created for. */
123 PVMR0 pVMR0;
124 /** R0 pointer to associated PCI device structure. */
125 R0PTRTYPE(struct PCIDevice *) pPciDeviceR0;
126 /** R0 pointer to associated PCI bus structure. */
127 R0PTRTYPE(PPDMPCIBUS) pPciBusR0;
128
129 /** RC pointer to the VM this instance was created for. */
130 PVMRC pVMRC;
131 /** RC pointer to associated PCI device structure. */
132 RCPTRTYPE(struct PCIDevice *) pPciDeviceRC;
133 /** RC pointer to associated PCI bus structure. */
134 RCPTRTYPE(PPDMPCIBUS) pPciBusRC;
135
136 /** Flags, see PDMDEVINSINT_FLAGS_XXX. */
137 uint32_t fIntFlags;
138} PDMDEVINSINT;
139
140/** @name PDMDEVINSINT::fIntFlags
141 * @{ */
142/** Used by pdmR3Load to mark device instances it found in the saved state. */
143#define PDMDEVINSINT_FLAGS_FOUND RT_BIT_32(0)
144/** Indicates that the device hasn't been powered on or resumed.
145 * This is used by PDMR3PowerOn, PDMR3Resume, PDMR3Suspend and PDMR3PowerOff
146 * to make sure each device gets exactly one notification for each of those
147 * events. PDMR3Resume and PDMR3PowerOn also makes use of it to bail out on
148 * a failure (already resumed/powered-on devices are suspended). */
149#define PDMDEVINSINT_FLAGS_SUSPENDED RT_BIT_32(1)
150/** Indicates that the device has been reset already. Used by PDMR3Reset. */
151#define PDMDEVINSINT_FLAGS_RESET RT_BIT_32(2)
152/** @} */
153
154
155/**
156 * Private USB device instance data.
157 */
158typedef struct PDMUSBINSINT
159{
160 /** The UUID of this instance. */
161 RTUUID Uuid;
162 /** Pointer to the next instance.
163 * (Head is pointed to by PDM::pUsbInstances.) */
164 R3PTRTYPE(PPDMUSBINS) pNext;
165 /** Pointer to the next per USB device instance.
166 * (Head is pointed to by PDMUSB::pInstances.) */
167 R3PTRTYPE(PPDMUSBINS) pPerDeviceNext;
168
169 /** Pointer to device structure. */
170 R3PTRTYPE(PPDMUSB) pUsbDev;
171
172 /** Pointer to the VM this instance was created for. */
173 PVMR3 pVM;
174 /** Pointer to the list of logical units associated with the device. (FIFO) */
175 R3PTRTYPE(PPDMLUN) pLuns;
176 /** The per instance device configuration. */
177 R3PTRTYPE(PCFGMNODE) pCfg;
178 /** Same as pCfg if the configuration should be deleted when detaching the device. */
179 R3PTRTYPE(PCFGMNODE) pCfgDelete;
180 /** The global device configuration. */
181 R3PTRTYPE(PCFGMNODE) pCfgGlobal;
182
183 /** Pointer to the USB hub this device is attached to.
184 * This is NULL if the device isn't connected to any HUB. */
185 R3PTRTYPE(PPDMUSBHUB) pHub;
186 /** The port number that we're connected to. */
187 uint32_t iPort;
188 /** Indicates that the USB device hasn't been powered on or resumed.
189 * See PDMDEVINSINT_FLAGS_SUSPENDED. */
190 bool fVMSuspended;
191 /** Indicates that the USB device has been reset. */
192 bool fVMReset;
193 /** Pointer to the asynchronous notification callback set while in
194 * FNPDMDEVSUSPEND or FNPDMDEVPOWEROFF. */
195 R3PTRTYPE(PFNPDMUSBASYNCNOTIFY) pfnAsyncNotify;
196} PDMUSBINSINT;
197
198
199/**
200 * Private driver instance data.
201 */
202typedef struct PDMDRVINSINT
203{
204 /** Pointer to the driver instance above.
205 * This is NULL for the topmost drive. */
206 R3PTRTYPE(PPDMDRVINS) pUp;
207 /** Pointer to the driver instance below.
208 * This is NULL for the bottommost driver. */
209 R3PTRTYPE(PPDMDRVINS) pDown;
210 /** Pointer to the logical unit this driver chained on. */
211 R3PTRTYPE(PPDMLUN) pLun;
212 /** Pointer to driver structure from which this was instantiated. */
213 R3PTRTYPE(PPDMDRV) pDrv;
214 /** Pointer to the VM this instance was created for, ring-3 context. */
215 PVMR3 pVMR3;
216 /** Pointer to the VM this instance was created for, ring-0 context. */
217 PVMR0 pVMR0;
218 /** Pointer to the VM this instance was created for, raw-mode context. */
219 PVMRC pVMRC;
220 /** Flag indicating that the driver is being detached and destroyed.
221 * (Helps detect potential recursive detaching.) */
222 bool fDetaching;
223 /** Indicates that the driver hasn't been powered on or resumed.
224 * See PDMDEVINSINT_FLAGS_SUSPENDED. */
225 bool fVMSuspended;
226 /** Indicates that the driver has been reset already. */
227 bool fVMReset;
228 /** Set if allocated on the hyper heap, false if on the ring-3 heap. */
229 bool fHyperHeap;
230 /** Pointer to the asynchronous notification callback set while in
231 * PDMUSBREG::pfnVMSuspend or PDMUSBREG::pfnVMPowerOff. */
232 R3PTRTYPE(PFNPDMDRVASYNCNOTIFY) pfnAsyncNotify;
233 /** Configuration handle to the instance node. */
234 R3PTRTYPE(PCFGMNODE) pCfgHandle;
235} PDMDRVINSINT;
236
237
238/**
239 * Private critical section data.
240 */
241typedef struct PDMCRITSECTINT
242{
243 /** The critical section core which is shared with IPRT. */
244 RTCRITSECT Core;
245 /** Pointer to the next critical section.
246 * This chain is used for relocating pVMRC and device cleanup. */
247 R3PTRTYPE(struct PDMCRITSECTINT *) pNext;
248 /** Owner identifier.
249 * This is pDevIns if the owner is a device. Similarily for a driver or service.
250 * PDMR3CritSectInit() sets this to point to the critsect itself. */
251 RTR3PTR pvKey;
252 /** Pointer to the VM - R3Ptr. */
253 PVMR3 pVMR3;
254 /** Pointer to the VM - R0Ptr. */
255 PVMR0 pVMR0;
256 /** Pointer to the VM - GCPtr. */
257 PVMRC pVMRC;
258 /** Alignment padding. */
259 uint32_t padding;
260 /** Event semaphore that is scheduled to be signaled upon leaving the
261 * critical section. This is Ring-3 only of course. */
262 RTSEMEVENT EventToSignal;
263 /** The lock name. */
264 R3PTRTYPE(const char *) pszName;
265 /** R0/RC lock contention. */
266 STAMCOUNTER StatContentionRZLock;
267 /** R0/RC unlock contention. */
268 STAMCOUNTER StatContentionRZUnlock;
269 /** R3 lock contention. */
270 STAMCOUNTER StatContentionR3;
271 /** Profiling the time the section is locked. */
272 STAMPROFILEADV StatLocked;
273} PDMCRITSECTINT;
274AssertCompileMemberAlignment(PDMCRITSECTINT, StatContentionRZLock, 8);
275/** Pointer to private critical section data. */
276typedef PDMCRITSECTINT *PPDMCRITSECTINT;
277
278/** Indicates that the critical section is queued for unlock.
279 * PDMCritSectIsOwner and PDMCritSectIsOwned optimizations. */
280#define PDMCRITSECT_FLAGS_PENDING_UNLOCK RT_BIT_32(17)
281
282
283/**
284 * The usual device/driver/internal/external stuff.
285 */
286typedef enum
287{
288 /** The usual invalid entry. */
289 PDMTHREADTYPE_INVALID = 0,
290 /** Device type. */
291 PDMTHREADTYPE_DEVICE,
292 /** USB Device type. */
293 PDMTHREADTYPE_USB,
294 /** Driver type. */
295 PDMTHREADTYPE_DRIVER,
296 /** Internal type. */
297 PDMTHREADTYPE_INTERNAL,
298 /** External type. */
299 PDMTHREADTYPE_EXTERNAL,
300 /** The usual 32-bit hack. */
301 PDMTHREADTYPE_32BIT_HACK = 0x7fffffff
302} PDMTHREADTYPE;
303
304
305/**
306 * The internal structure for the thread.
307 */
308typedef struct PDMTHREADINT
309{
310 /** The VM pointer. */
311 PVMR3 pVM;
312 /** The event semaphore the thread blocks on when not running. */
313 RTSEMEVENTMULTI BlockEvent;
314 /** The event semaphore the thread sleeps on while running. */
315 RTSEMEVENTMULTI SleepEvent;
316 /** Pointer to the next thread. */
317 R3PTRTYPE(struct PDMTHREAD *) pNext;
318 /** The thread type. */
319 PDMTHREADTYPE enmType;
320} PDMTHREADINT;
321
322
323
324/* Must be included after PDMDEVINSINT is defined. */
325#define PDMDEVINSINT_DECLARED
326#define PDMUSBINSINT_DECLARED
327#define PDMDRVINSINT_DECLARED
328#define PDMCRITSECTINT_DECLARED
329#define PDMTHREADINT_DECLARED
330#ifdef ___VBox_pdm_h
331# error "Invalid header PDM order. Include PDMInternal.h before VBox/pdm.h!"
332#endif
333RT_C_DECLS_END
334#include <VBox/pdm.h>
335RT_C_DECLS_BEGIN
336
337/**
338 * PDM Logical Unit.
339 *
340 * This typically the representation of a physical port on a
341 * device, like for instance the PS/2 keyboard port on the
342 * keyboard controller device. The LUNs are chained on the
343 * device the belong to (PDMDEVINSINT::pLunsR3).
344 */
345typedef struct PDMLUN
346{
347 /** The LUN - The Logical Unit Number. */
348 RTUINT iLun;
349 /** Pointer to the next LUN. */
350 PPDMLUN pNext;
351 /** Pointer to the top driver in the driver chain. */
352 PPDMDRVINS pTop;
353 /** Pointer to the bottom driver in the driver chain. */
354 PPDMDRVINS pBottom;
355 /** Pointer to the device instance which the LUN belongs to.
356 * Either this is set or pUsbIns is set. Both is never set at the same time. */
357 PPDMDEVINS pDevIns;
358 /** Pointer to the USB device instance which the LUN belongs to. */
359 PPDMUSBINS pUsbIns;
360 /** Pointer to the device base interface. */
361 PPDMIBASE pBase;
362 /** Description of this LUN. */
363 const char *pszDesc;
364} PDMLUN;
365
366
367/**
368 * PDM Device.
369 */
370typedef struct PDMDEV
371{
372 /** Pointer to the next device (R3 Ptr). */
373 R3PTRTYPE(PPDMDEV) pNext;
374 /** Device name length. (search optimization) */
375 RTUINT cchName;
376 /** Registration structure. */
377 R3PTRTYPE(const struct PDMDEVREG *) pReg;
378 /** Number of instances. */
379 uint32_t cInstances;
380 /** Pointer to chain of instances (R3 Ptr). */
381 PPDMDEVINSR3 pInstances;
382} PDMDEV;
383
384
385/**
386 * PDM USB Device.
387 */
388typedef struct PDMUSB
389{
390 /** Pointer to the next device (R3 Ptr). */
391 R3PTRTYPE(PPDMUSB) pNext;
392 /** Device name length. (search optimization) */
393 RTUINT cchName;
394 /** Registration structure. */
395 R3PTRTYPE(const struct PDMUSBREG *) pReg;
396 /** Next instance number. */
397 uint32_t iNextInstance;
398 /** Pointer to chain of instances (R3 Ptr). */
399 R3PTRTYPE(PPDMUSBINS) pInstances;
400} PDMUSB;
401
402
403/**
404 * PDM Driver.
405 */
406typedef struct PDMDRV
407{
408 /** Pointer to the next device. */
409 PPDMDRV pNext;
410 /** Registration structure. */
411 const struct PDMDRVREG * pReg;
412 /** Current number of instances. */
413 uint32_t cInstances;
414 /** The next instance number. */
415 uint32_t iNextInstance;
416} PDMDRV;
417
418
419/**
420 * PDM registered PIC device.
421 */
422typedef struct PDMPIC
423{
424 /** Pointer to the PIC device instance - R3. */
425 PPDMDEVINSR3 pDevInsR3;
426 /** @copydoc PDMPICREG::pfnSetIrqR3 */
427 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
428 /** @copydoc PDMPICREG::pfnGetInterruptR3 */
429 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
430
431 /** Pointer to the PIC device instance - R0. */
432 PPDMDEVINSR0 pDevInsR0;
433 /** @copydoc PDMPICREG::pfnSetIrqR3 */
434 DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
435 /** @copydoc PDMPICREG::pfnGetInterruptR3 */
436 DECLR0CALLBACKMEMBER(int, pfnGetInterruptR0,(PPDMDEVINS pDevIns));
437
438 /** Pointer to the PIC device instance - RC. */
439 PPDMDEVINSRC pDevInsRC;
440 /** @copydoc PDMPICREG::pfnSetIrqR3 */
441 DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
442 /** @copydoc PDMPICREG::pfnGetInterruptR3 */
443 DECLRCCALLBACKMEMBER(int, pfnGetInterruptRC,(PPDMDEVINS pDevIns));
444 /** Alignment padding. */
445 RTRCPTR RCPtrPadding;
446} PDMPIC;
447
448
449/**
450 * PDM registered APIC device.
451 */
452typedef struct PDMAPIC
453{
454 /** Pointer to the APIC device instance - R3 Ptr. */
455 PPDMDEVINSR3 pDevInsR3;
456 /** @copydoc PDMAPICREG::pfnGetInterruptR3 */
457 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
458 /** @copydoc PDMAPICREG::pfnHasPendingIrqR3 */
459 DECLR3CALLBACKMEMBER(bool, pfnHasPendingIrqR3,(PPDMDEVINS pDevIns));
460 /** @copydoc PDMAPICREG::pfnSetBaseR3 */
461 DECLR3CALLBACKMEMBER(void, pfnSetBaseR3,(PPDMDEVINS pDevIns, uint64_t u64Base));
462 /** @copydoc PDMAPICREG::pfnGetBaseR3 */
463 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseR3,(PPDMDEVINS pDevIns));
464 /** @copydoc PDMAPICREG::pfnSetTPRR3 */
465 DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
466 /** @copydoc PDMAPICREG::pfnGetTPRR3 */
467 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns, VMCPUID idCpu));
468 /** @copydoc PDMAPICREG::pfnWriteMSRR3 */
469 DECLR3CALLBACKMEMBER(int, pfnWriteMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
470 /** @copydoc PDMAPICREG::pfnReadMSRR3 */
471 DECLR3CALLBACKMEMBER(int, pfnReadMSRR3, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
472 /** @copydoc PDMAPICREG::pfnBusDeliverR3 */
473 DECLR3CALLBACKMEMBER(int, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
474 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
475 /** @copydoc PDMAPICREG::pfnLocalInterruptR3 */
476 DECLR3CALLBACKMEMBER(int, pfnLocalInterruptR3,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
477
478 /** Pointer to the APIC device instance - R0 Ptr. */
479 PPDMDEVINSR0 pDevInsR0;
480 /** @copydoc PDMAPICREG::pfnGetInterruptR3 */
481 DECLR0CALLBACKMEMBER(int, pfnGetInterruptR0,(PPDMDEVINS pDevIns));
482 /** @copydoc PDMAPICREG::pfnHasPendingIrqR3 */
483 DECLR0CALLBACKMEMBER(bool, pfnHasPendingIrqR0,(PPDMDEVINS pDevIns));
484 /** @copydoc PDMAPICREG::pfnSetBaseR3 */
485 DECLR0CALLBACKMEMBER(void, pfnSetBaseR0,(PPDMDEVINS pDevIns, uint64_t u64Base));
486 /** @copydoc PDMAPICREG::pfnGetBaseR3 */
487 DECLR0CALLBACKMEMBER(uint64_t, pfnGetBaseR0,(PPDMDEVINS pDevIns));
488 /** @copydoc PDMAPICREG::pfnSetTPRR3 */
489 DECLR0CALLBACKMEMBER(void, pfnSetTPRR0,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
490 /** @copydoc PDMAPICREG::pfnGetTPRR3 */
491 DECLR0CALLBACKMEMBER(uint8_t, pfnGetTPRR0,(PPDMDEVINS pDevIns, VMCPUID idCpu));
492 /** @copydoc PDMAPICREG::pfnWriteMSRR3 */
493 DECLR0CALLBACKMEMBER(uint32_t, pfnWriteMSRR0, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
494 /** @copydoc PDMAPICREG::pfnReadMSRR3 */
495 DECLR0CALLBACKMEMBER(uint32_t, pfnReadMSRR0, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
496 /** @copydoc PDMAPICREG::pfnBusDeliverR3 */
497 DECLR0CALLBACKMEMBER(int, pfnBusDeliverR0,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
498 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
499 /** @copydoc PDMAPICREG::pfnLocalInterruptR3 */
500 DECLR0CALLBACKMEMBER(int, pfnLocalInterruptR0,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
501
502 /** Pointer to the APIC device instance - RC Ptr. */
503 PPDMDEVINSRC pDevInsRC;
504 /** @copydoc PDMAPICREG::pfnGetInterruptR3 */
505 DECLRCCALLBACKMEMBER(int, pfnGetInterruptRC,(PPDMDEVINS pDevIns));
506 /** @copydoc PDMAPICREG::pfnHasPendingIrqR3 */
507 DECLRCCALLBACKMEMBER(bool, pfnHasPendingIrqRC,(PPDMDEVINS pDevIns));
508 /** @copydoc PDMAPICREG::pfnSetBaseR3 */
509 DECLRCCALLBACKMEMBER(void, pfnSetBaseRC,(PPDMDEVINS pDevIns, uint64_t u64Base));
510 /** @copydoc PDMAPICREG::pfnGetBaseR3 */
511 DECLRCCALLBACKMEMBER(uint64_t, pfnGetBaseRC,(PPDMDEVINS pDevIns));
512 /** @copydoc PDMAPICREG::pfnSetTPRR3 */
513 DECLRCCALLBACKMEMBER(void, pfnSetTPRRC,(PPDMDEVINS pDevIns, VMCPUID idCpu, uint8_t u8TPR));
514 /** @copydoc PDMAPICREG::pfnGetTPRR3 */
515 DECLRCCALLBACKMEMBER(uint8_t, pfnGetTPRRC,(PPDMDEVINS pDevIns, VMCPUID idCpu));
516 /** @copydoc PDMAPICREG::pfnWriteMSRR3 */
517 DECLRCCALLBACKMEMBER(uint32_t, pfnWriteMSRRC, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t u64Value));
518 /** @copydoc PDMAPICREG::pfnReadMSRR3 */
519 DECLRCCALLBACKMEMBER(uint32_t, pfnReadMSRRC, (PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t u32Reg, uint64_t *pu64Value));
520 /** @copydoc PDMAPICREG::pfnBusDeliverR3 */
521 DECLRCCALLBACKMEMBER(int, pfnBusDeliverRC,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
522 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
523 /** @copydoc PDMAPICREG::pfnLocalInterruptR3 */
524 DECLRCCALLBACKMEMBER(int, pfnLocalInterruptRC,(PPDMDEVINS pDevIns, uint8_t u8Pin, uint8_t u8Level));
525 RTRCPTR RCPtrAlignment;
526
527} PDMAPIC;
528
529
530/**
531 * PDM registered I/O APIC device.
532 */
533typedef struct PDMIOAPIC
534{
535 /** Pointer to the APIC device instance - R3 Ptr. */
536 PPDMDEVINSR3 pDevInsR3;
537 /** @copydoc PDMIOAPICREG::pfnSetIrqR3 */
538 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
539
540 /** Pointer to the PIC device instance - R0. */
541 PPDMDEVINSR0 pDevInsR0;
542 /** @copydoc PDMIOAPICREG::pfnSetIrqR3 */
543 DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
544
545 /** Pointer to the APIC device instance - RC Ptr. */
546 PPDMDEVINSRC pDevInsRC;
547 /** @copydoc PDMIOAPICREG::pfnSetIrqR3 */
548 DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
549} PDMIOAPIC;
550
551/** Maximum number of PCI busses for a VM. */
552#define PDM_PCI_BUSSES_MAX 8
553
554/**
555 * PDM PCI Bus instance.
556 */
557typedef struct PDMPCIBUS
558{
559 /** PCI bus number. */
560 RTUINT iBus;
561 RTUINT uPadding0; /**< Alignment padding.*/
562
563 /** Pointer to PCI Bus device instance. */
564 PPDMDEVINSR3 pDevInsR3;
565 /** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */
566 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
567 /** @copydoc PDMPCIBUSREG::pfnRegisterR3 */
568 DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
569 /** @copydoc PDMPCIBUSREG::pfnIORegionRegisterR3 */
570 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion,
571 PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
572 /** @copydoc PDMPCIBUSREG::pfnSetConfigCallbacksR3 */
573 DECLR3CALLBACKMEMBER(void, pfnSetConfigCallbacksR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead,
574 PPFNPCICONFIGREAD ppfnReadOld, PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld));
575 /** @copydoc PDMPCIBUSREG::pfnSaveExecR3 */
576 DECLR3CALLBACKMEMBER(int, pfnSaveExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
577 /** @copydoc PDMPCIBUSREG::pfnLoadExecR3 */
578 DECLR3CALLBACKMEMBER(int, pfnLoadExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
579 /** @copydoc PDMPCIBUSREG::pfnFakePCIBIOSR3 */
580 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
581
582 /** Pointer to the PIC device instance - R0. */
583 R0PTRTYPE(PPDMDEVINS) pDevInsR0;
584 /** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */
585 DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
586
587 /** Pointer to PCI Bus device instance. */
588 PPDMDEVINSRC pDevInsRC;
589 /** @copydoc PDMPCIBUSREG::pfnSetIrqR3 */
590 DECLRCCALLBACKMEMBER(void, pfnSetIrqRC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
591} PDMPCIBUS;
592
593
594#ifdef IN_RING3
595/**
596 * PDM registered DMAC (DMA Controller) device.
597 */
598typedef struct PDMDMAC
599{
600 /** Pointer to the DMAC device instance. */
601 PPDMDEVINSR3 pDevIns;
602 /** Copy of the registration structure. */
603 PDMDMACREG Reg;
604} PDMDMAC;
605
606
607/**
608 * PDM registered RTC (Real Time Clock) device.
609 */
610typedef struct PDMRTC
611{
612 /** Pointer to the RTC device instance. */
613 PPDMDEVINSR3 pDevIns;
614 /** Copy of the registration structure. */
615 PDMRTCREG Reg;
616} PDMRTC;
617
618#endif /* IN_RING3 */
619
620/**
621 * Module type.
622 */
623typedef enum PDMMODTYPE
624{
625 /** Raw-mode (RC) context module. */
626 PDMMOD_TYPE_RC,
627 /** Ring-0 (host) context module. */
628 PDMMOD_TYPE_R0,
629 /** Ring-3 (host) context module. */
630 PDMMOD_TYPE_R3
631} PDMMODTYPE;
632
633
634/** The module name length including the terminator. */
635#define PDMMOD_NAME_LEN 32
636
637/**
638 * Loaded module instance.
639 */
640typedef struct PDMMOD
641{
642 /** Module name. This is used for refering to
643 * the module internally, sort of like a handle. */
644 char szName[PDMMOD_NAME_LEN];
645 /** Module type. */
646 PDMMODTYPE eType;
647 /** Loader module handle. Not used for R0 modules. */
648 RTLDRMOD hLdrMod;
649 /** Loaded address.
650 * This is the 'handle' for R0 modules. */
651 RTUINTPTR ImageBase;
652 /** Old loaded address.
653 * This is used during relocation of GC modules. Not used for R0 modules. */
654 RTUINTPTR OldImageBase;
655 /** Where the R3 HC bits are stored.
656 * This can be equal to ImageBase but doesn't have to. Not used for R0 modules. */
657 void *pvBits;
658
659 /** Pointer to next module. */
660 struct PDMMOD *pNext;
661 /** Module filename. */
662 char szFilename[1];
663} PDMMOD;
664/** Pointer to loaded module instance. */
665typedef PDMMOD *PPDMMOD;
666
667
668
669/** Extra space in the free array. */
670#define PDMQUEUE_FREE_SLACK 16
671
672/**
673 * Queue type.
674 */
675typedef enum PDMQUEUETYPE
676{
677 /** Device consumer. */
678 PDMQUEUETYPE_DEV = 1,
679 /** Driver consumer. */
680 PDMQUEUETYPE_DRV,
681 /** Internal consumer. */
682 PDMQUEUETYPE_INTERNAL,
683 /** External consumer. */
684 PDMQUEUETYPE_EXTERNAL
685} PDMQUEUETYPE;
686
687/** Pointer to a PDM Queue. */
688typedef struct PDMQUEUE *PPDMQUEUE;
689
690/**
691 * PDM Queue.
692 */
693typedef struct PDMQUEUE
694{
695 /** Pointer to the next queue in the list. */
696 R3PTRTYPE(PPDMQUEUE) pNext;
697 /** Type specific data. */
698 union
699 {
700 /** PDMQUEUETYPE_DEV */
701 struct
702 {
703 /** Pointer to consumer function. */
704 R3PTRTYPE(PFNPDMQUEUEDEV) pfnCallback;
705 /** Pointer to the device instance owning the queue. */
706 R3PTRTYPE(PPDMDEVINS) pDevIns;
707 } Dev;
708 /** PDMQUEUETYPE_DRV */
709 struct
710 {
711 /** Pointer to consumer function. */
712 R3PTRTYPE(PFNPDMQUEUEDRV) pfnCallback;
713 /** Pointer to the driver instance owning the queue. */
714 R3PTRTYPE(PPDMDRVINS) pDrvIns;
715 } Drv;
716 /** PDMQUEUETYPE_INTERNAL */
717 struct
718 {
719 /** Pointer to consumer function. */
720 R3PTRTYPE(PFNPDMQUEUEINT) pfnCallback;
721 } Int;
722 /** PDMQUEUETYPE_EXTERNAL */
723 struct
724 {
725 /** Pointer to consumer function. */
726 R3PTRTYPE(PFNPDMQUEUEEXT) pfnCallback;
727 /** Pointer to user argument. */
728 R3PTRTYPE(void *) pvUser;
729 } Ext;
730 } u;
731 /** Queue type. */
732 PDMQUEUETYPE enmType;
733 /** The interval between checking the queue for events.
734 * The realtime timer below is used to do the waiting.
735 * If 0, the queue will use the VM_FF_PDM_QUEUE forced action. */
736 uint32_t cMilliesInterval;
737 /** Interval timer. Only used if cMilliesInterval is non-zero. */
738 PTMTIMERR3 pTimer;
739 /** Pointer to the VM - R3. */
740 PVMR3 pVMR3;
741 /** LIFO of pending items - R3. */
742 R3PTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingR3;
743 /** Pointer to the VM - R0. */
744 PVMR0 pVMR0;
745 /** LIFO of pending items - R0. */
746 R0PTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingR0;
747 /** Pointer to the GC VM and indicator for GC enabled queue.
748 * If this is NULL, the queue cannot be used in GC.
749 */
750 PVMRC pVMRC;
751 /** LIFO of pending items - GC. */
752 RCPTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingRC;
753
754 /** Item size (bytes). */
755 uint32_t cbItem;
756 /** Number of items in the queue. */
757 uint32_t cItems;
758 /** Index to the free head (where we insert). */
759 uint32_t volatile iFreeHead;
760 /** Index to the free tail (where we remove). */
761 uint32_t volatile iFreeTail;
762
763 /** Unqiue queue name. */
764 R3PTRTYPE(const char *) pszName;
765#if HC_ARCH_BITS == 32
766 RTR3PTR Alignment1;
767#endif
768 /** Stat: Times PDMQueueAlloc fails. */
769 STAMCOUNTER StatAllocFailures;
770 /** Stat: PDMQueueInsert calls. */
771 STAMCOUNTER StatInsert;
772 /** Stat: Queue flushes. */
773 STAMCOUNTER StatFlush;
774 /** Stat: Queue flushes with pending items left over. */
775 STAMCOUNTER StatFlushLeftovers;
776#ifdef VBOX_WITH_STATISTICS
777 /** State: Profiling the flushing. */
778 STAMPROFILE StatFlushPrf;
779 /** State: Pending items. */
780 uint32_t volatile cStatPending;
781 uint32_t volatile cAlignment;
782#endif
783
784 /** Array of pointers to free items. Variable size. */
785 struct PDMQUEUEFREEITEM
786 {
787 /** Pointer to the free item - HC Ptr. */
788 R3PTRTYPE(PPDMQUEUEITEMCORE) volatile pItemR3;
789 /** Pointer to the free item - HC Ptr. */
790 R0PTRTYPE(PPDMQUEUEITEMCORE) volatile pItemR0;
791 /** Pointer to the free item - GC Ptr. */
792 RCPTRTYPE(PPDMQUEUEITEMCORE) volatile pItemRC;
793#if HC_ARCH_BITS == 64
794 RTRCPTR Alignment0;
795#endif
796 } aFreeItems[1];
797} PDMQUEUE;
798
799/** @name PDM::fQueueFlushing
800 * @{ */
801/** Indicating that an queue insert has been performed. */
802#define PDM_QUEUE_FLUSH_FLAG_ACTIVE RT_BIT_32(PDM_QUEUE_FLUSH_FLAG_ACTIVE_BIT)
803/** The bit number for PDM_QUEUE_FLUSH_FLAG_ACTIVE_BIT. */
804#define PDM_QUEUE_FLUSH_FLAG_ACTIVE_BIT 0
805/** Indicating there are pending items.
806 * This is make sure we don't miss inserts happening during flushing. The FF
807 * cannot be used for this since it has to be cleared immediately to prevent
808 * other EMTs from spinning. */
809#define PDM_QUEUE_FLUSH_FLAG_PENDING RT_BIT_32(PDM_QUEUE_FLUSH_FLAG_PENDING_BIT)
810/** The bit number for PDM_QUEUE_FLUSH_FLAG_PENDING. */
811#define PDM_QUEUE_FLUSH_FLAG_PENDING_BIT 1
812/** }@ */
813
814
815/**
816 * Queue device helper task operation.
817 */
818typedef enum PDMDEVHLPTASKOP
819{
820 /** The usual invalid 0 entry. */
821 PDMDEVHLPTASKOP_INVALID = 0,
822 /** ISASetIrq */
823 PDMDEVHLPTASKOP_ISA_SET_IRQ,
824 /** PCISetIrq */
825 PDMDEVHLPTASKOP_PCI_SET_IRQ,
826 /** PCISetIrq */
827 PDMDEVHLPTASKOP_IOAPIC_SET_IRQ,
828 /** The usual 32-bit hack. */
829 PDMDEVHLPTASKOP_32BIT_HACK = 0x7fffffff
830} PDMDEVHLPTASKOP;
831
832/**
833 * Queued Device Helper Task.
834 */
835typedef struct PDMDEVHLPTASK
836{
837 /** The queue item core (don't touch). */
838 PDMQUEUEITEMCORE Core;
839 /** Pointer to the device instance (R3 Ptr). */
840 PPDMDEVINSR3 pDevInsR3;
841 /** This operation to perform. */
842 PDMDEVHLPTASKOP enmOp;
843#if HC_ARCH_BITS == 64
844 uint32_t Alignment0;
845#endif
846 /** Parameters to the operation. */
847 union PDMDEVHLPTASKPARAMS
848 {
849 /**
850 * PDMDEVHLPTASKOP_ISA_SET_IRQ and PDMDEVHLPTASKOP_PCI_SET_IRQ.
851 */
852 struct PDMDEVHLPTASKSETIRQ
853 {
854 /** The IRQ */
855 int iIrq;
856 /** The new level. */
857 int iLevel;
858 } SetIRQ;
859 } u;
860} PDMDEVHLPTASK;
861/** Pointer to a queued Device Helper Task. */
862typedef PDMDEVHLPTASK *PPDMDEVHLPTASK;
863/** Pointer to a const queued Device Helper Task. */
864typedef const PDMDEVHLPTASK *PCPDMDEVHLPTASK;
865
866
867
868/**
869 * An USB hub registration record.
870 */
871typedef struct PDMUSBHUB
872{
873 /** The USB versions this hub support.
874 * Note that 1.1 hubs can take on 2.0 devices. */
875 uint32_t fVersions;
876 /** The number of ports on the hub. */
877 uint32_t cPorts;
878 /** The number of available ports (0..cPorts). */
879 uint32_t cAvailablePorts;
880 /** The driver instance of the hub. */
881 PPDMDRVINS pDrvIns;
882 /** Copy of the to the registration structure. */
883 PDMUSBHUBREG Reg;
884
885 /** Pointer to the next hub in the list. */
886 struct PDMUSBHUB *pNext;
887} PDMUSBHUB;
888
889/** Pointer to a const USB HUB registration record. */
890typedef const PDMUSBHUB *PCPDMUSBHUB;
891
892/** Pointer to a PDM Async I/O template. */
893typedef struct PDMASYNCCOMPLETIONTEMPLATE *PPDMASYNCCOMPLETIONTEMPLATE;
894
895/** Pointer to the main PDM Async completion endpoint class. */
896typedef struct PDMASYNCCOMPLETIONEPCLASS *PPDMASYNCCOMPLETIONEPCLASS;
897
898
899/**
900 * PDM VMCPU Instance data.
901 * Changes to this must checked against the padding of the cfgm union in VMCPU!
902 */
903typedef struct PDMCPU
904{
905 /** The number of entries in the apQueuedCritSectsLeaves table that's currnetly in use. */
906 uint32_t cQueuedCritSectLeaves;
907 uint32_t uPadding0; /**< Alignment padding.*/
908 /** Critical sections queued in RC/R0 because of contention preventing leave to complete. (R3 Ptrs)
909 * We will return to Ring-3 ASAP, so this queue doesn't have to be very long. */
910 R3PTRTYPE(PPDMCRITSECT) apQueuedCritSectsLeaves[8];
911} PDMCPU;
912
913/**
914 * Converts a PDM pointer into a VM pointer.
915 * @returns Pointer to the VM structure the PDM is part of.
916 * @param pPDM Pointer to PDM instance data.
917 */
918#define PDM2VM(pPDM) ( (PVM)((char*)pPDM - pPDM->offVM) )
919
920
921/**
922 * PDM VM Instance data.
923 * Changes to this must checked against the padding of the cfgm union in VM!
924 */
925typedef struct PDM
926{
927 /** Offset to the VM structure.
928 * See PDM2VM(). */
929 RTUINT offVM;
930 RTUINT uPadding0; /**< Alignment padding.*/
931
932 /** List of registered devices. (FIFO) */
933 R3PTRTYPE(PPDMDEV) pDevs;
934 /** List of devices instances. (FIFO) */
935 R3PTRTYPE(PPDMDEVINS) pDevInstances;
936 /** List of registered USB devices. (FIFO) */
937 R3PTRTYPE(PPDMUSB) pUsbDevs;
938 /** List of USB devices instances. (FIFO) */
939 R3PTRTYPE(PPDMUSBINS) pUsbInstances;
940 /** List of registered drivers. (FIFO) */
941 R3PTRTYPE(PPDMDRV) pDrvs;
942 /** List of initialized critical sections. (LIFO) */
943 R3PTRTYPE(PPDMCRITSECTINT) pCritSects;
944 /** PCI Buses. */
945 PDMPCIBUS aPciBuses[PDM_PCI_BUSSES_MAX];
946 /** The register PIC device. */
947 PDMPIC Pic;
948 /** The registerd APIC device. */
949 PDMAPIC Apic;
950 /** The registerd I/O APIC device. */
951 PDMIOAPIC IoApic;
952 /** The registered DMAC device. */
953 R3PTRTYPE(PPDMDMAC) pDmac;
954 /** The registered RTC device. */
955 R3PTRTYPE(PPDMRTC) pRtc;
956 /** The registered USB HUBs. (FIFO) */
957 R3PTRTYPE(PPDMUSBHUB) pUsbHubs;
958
959 /** Queue in which devhlp tasks are queued for R3 execution - R3 Ptr. */
960 R3PTRTYPE(PPDMQUEUE) pDevHlpQueueR3;
961 /** Queue in which devhlp tasks are queued for R3 execution - R0 Ptr. */
962 R0PTRTYPE(PPDMQUEUE) pDevHlpQueueR0;
963 /** Queue in which devhlp tasks are queued for R3 execution - RC Ptr. */
964 RCPTRTYPE(PPDMQUEUE) pDevHlpQueueRC;
965 RTRCPTR uPadding1; /**< Alignment padding. */
966
967 /** Linked list of timer driven PDM queues. */
968 R3PTRTYPE(struct PDMQUEUE *) pQueuesTimer;
969 /** Linked list of force action driven PDM queues. */
970 R3PTRTYPE(struct PDMQUEUE *) pQueuesForced;
971 /** Pointer to the queue which should be manually flushed - R0 Ptr.
972 * Only touched by EMT. */
973 R0PTRTYPE(struct PDMQUEUE *) pQueueFlushR0;
974 /** Pointer to the queue which should be manually flushed - RC Ptr.
975 * Only touched by EMT. */
976 RCPTRTYPE(struct PDMQUEUE *) pQueueFlushRC;
977 /** Bitmask controlling the queue flushing.
978 * See PDM_QUEUE_FLUSH_FLAG_ACTIVE and PDM_QUEUE_FLUSH_FLAG_PENDING. */
979 uint32_t volatile fQueueFlushing;
980
981 /** Head of the PDM Thread list. (singly linked) */
982 R3PTRTYPE(PPDMTHREAD) pThreads;
983 /** Tail of the PDM Thread list. (singly linked) */
984 R3PTRTYPE(PPDMTHREAD) pThreadsTail;
985
986 /** @name PDM Async Completion
987 * @{ */
988 /** Pointer to the array of supported endpoint classes. */
989 R3PTRTYPE(PPDMASYNCCOMPLETIONEPCLASS *) papAsyncCompletionEndpointClass;
990 /** Head of the templates. (singly linked) */
991 R3PTRTYPE(PPDMASYNCCOMPLETIONTEMPLATE) pAsyncCompletionTemplates;
992 /** @} */
993
994 /** @name VMM device heap
995 * @{ */
996 /** Pointer to the heap base (MMIO2 ring-3 mapping). NULL if not registered. */
997 RTR3PTR pvVMMDevHeap;
998#if HC_ARCH_BITS == 32
999 /** Alignment padding. */
1000 uint32_t u32Padding2;
1001#endif
1002 /** The heap size. */
1003 RTUINT cbVMMDevHeap;
1004 /** Free space. */
1005 RTUINT cbVMMDevHeapLeft;
1006 /** The current mapping. NIL_RTGCPHYS if not mapped or registered. */
1007 RTGCPHYS GCPhysVMMDevHeap;
1008 /** @} */
1009
1010 /** The PDM lock.
1011 * This is used to protect everything that deals with interrupts, i.e.
1012 * the PIC, APIC, IOAPIC and PCI devices pluss some PDM functions. */
1013 PDMCRITSECT CritSect;
1014 /** The PDM miscellancous lock.
1015 * This is used to protect things like critsect init/delete that formerly was
1016 * serialized by there only being one EMT.
1017 */
1018 RTCRITSECT MiscCritSect;
1019
1020 /** Number of times a critical section leave requesed needed to be queued for ring-3 execution. */
1021 STAMCOUNTER StatQueuedCritSectLeaves;
1022} PDM;
1023AssertCompileMemberAlignment(PDM, GCPhysVMMDevHeap, sizeof(RTGCPHYS));
1024AssertCompileMemberAlignment(PDM, CritSect, 8);
1025AssertCompileMemberAlignment(PDM, StatQueuedCritSectLeaves, 8);
1026/** Pointer to PDM VM instance data. */
1027typedef PDM *PPDM;
1028
1029
1030/**
1031 * PDM data kept in the UVM.
1032 */
1033typedef struct PDMUSERPERVM
1034{
1035 /** Pointer to list of loaded modules. */
1036 PPDMMOD pModules;
1037 /** @todo move more stuff over here. */
1038} PDMUSERPERVM;
1039/** Pointer to the PDM data kept in the UVM. */
1040typedef PDMUSERPERVM *PPDMUSERPERVM;
1041
1042
1043
1044/*******************************************************************************
1045* Global Variables *
1046*******************************************************************************/
1047#ifdef IN_RING3
1048extern const PDMDRVHLPR3 g_pdmR3DrvHlp;
1049extern const PDMDEVHLPR3 g_pdmR3DevHlpTrusted;
1050extern const PDMDEVHLPR3 g_pdmR3DevHlpUnTrusted;
1051extern const PDMPICHLPR3 g_pdmR3DevPicHlp;
1052extern const PDMAPICHLPR3 g_pdmR3DevApicHlp;
1053extern const PDMIOAPICHLPR3 g_pdmR3DevIoApicHlp;
1054extern const PDMPCIHLPR3 g_pdmR3DevPciHlp;
1055extern const PDMDMACHLP g_pdmR3DevDmacHlp;
1056extern const PDMRTCHLP g_pdmR3DevRtcHlp;
1057extern const PDMHPETHLPR3 g_pdmR3DevHpetHlp;
1058#endif
1059
1060
1061/*******************************************************************************
1062* Defined Constants And Macros *
1063*******************************************************************************/
1064/** @def PDMDEV_ASSERT_DEVINS
1065 * Asserts the validity of the device instance.
1066 */
1067#ifdef VBOX_STRICT
1068# define PDMDEV_ASSERT_DEVINS(pDevIns) \
1069 do { \
1070 AssertPtr(pDevIns); \
1071 Assert(pDevIns->u32Version == PDM_DEVINS_VERSION); \
1072 Assert(pDevIns->CTX_SUFF(pvInstanceData) == (void *)&pDevIns->achInstanceData[0]); \
1073 } while (0)
1074#else
1075# define PDMDEV_ASSERT_DEVINS(pDevIns) do { } while (0)
1076#endif
1077
1078/** @def PDMDRV_ASSERT_DRVINS
1079 * Asserts the validity of the driver instance.
1080 */
1081#ifdef VBOX_STRICT
1082# define PDMDRV_ASSERT_DRVINS(pDrvIns) \
1083 do { \
1084 AssertPtr(pDrvIns); \
1085 Assert(pDrvIns->u32Version == PDM_DRVINS_VERSION); \
1086 Assert(pDrvIns->CTX_SUFF(pvInstanceData) == (void *)&pDrvIns->achInstanceData[0]); \
1087 } while (0)
1088#else
1089# define PDMDRV_ASSERT_DRVINS(pDrvIns) do { } while (0)
1090#endif
1091
1092
1093/*******************************************************************************
1094* Internal Functions *
1095*******************************************************************************/
1096#ifdef IN_RING3
1097int pdmR3CritSectInit(PVM pVM);
1098int pdmR3CritSectTerm(PVM pVM);
1099void pdmR3CritSectRelocate(PVM pVM);
1100int pdmR3CritSectInitDevice(PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL, const char *pszNameFmt, va_list va);
1101int pdmR3CritSectDeleteDevice(PVM pVM, PPDMDEVINS pDevIns);
1102
1103int pdmR3DevInit(PVM pVM);
1104PPDMDEV pdmR3DevLookup(PVM pVM, const char *pszName);
1105int pdmR3DevFindLun(PVM pVM, const char *pszDevice, unsigned iInstance, unsigned iLun, PPDMLUN *ppLun);
1106DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem);
1107
1108int pdmR3UsbLoadModules(PVM pVM);
1109int pdmR3UsbInstantiateDevices(PVM pVM);
1110PPDMUSB pdmR3UsbLookup(PVM pVM, const char *pszName);
1111int pdmR3UsbFindLun(PVM pVM, const char *pszDevice, unsigned iInstance, unsigned iLun, PPDMLUN *ppLun);
1112int pdmR3UsbRegisterHub(PVM pVM, PPDMDRVINS pDrvIns, uint32_t fVersions, uint32_t cPorts, PCPDMUSBHUBREG pUsbHubReg, PPCPDMUSBHUBHLP ppUsbHubHlp);
1113int pdmR3UsbVMInitComplete(PVM pVM);
1114
1115int pdmR3DrvInit(PVM pVM);
1116int pdmR3DrvInstantiate(PVM pVM, PCFGMNODE pNode, PPDMIBASE pBaseInterface, PPDMDRVINS pDrvAbove,
1117 PPDMLUN pLun, PPDMIBASE *ppBaseInterface);
1118int pdmR3DrvDetach(PPDMDRVINS pDrvIns, uint32_t fFlags);
1119void pdmR3DrvDestroyChain(PPDMDRVINS pDrvIns, uint32_t fFlags);
1120PPDMDRV pdmR3DrvLookup(PVM pVM, const char *pszName);
1121
1122int pdmR3LdrInitU(PUVM pUVM);
1123void pdmR3LdrTermU(PUVM pUVM);
1124char * pdmR3FileR3(const char *pszFile, bool fShared = false);
1125int pdmR3LoadR3U(PUVM pUVM, const char *pszFilename, const char *pszName);
1126
1127void pdmR3QueueRelocate(PVM pVM, RTGCINTPTR offDelta);
1128
1129int pdmR3ThreadCreateDevice(PVM pVM, PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
1130 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1131int pdmR3ThreadCreateUsb(PVM pVM, PPDMDRVINS pUsbIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADUSB pfnThread,
1132 PFNPDMTHREADWAKEUPUSB pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1133int pdmR3ThreadCreateDriver(PVM pVM, PPDMDRVINS pDrvIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDRV pfnThread,
1134 PFNPDMTHREADWAKEUPDRV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
1135int pdmR3ThreadDestroyDevice(PVM pVM, PPDMDEVINS pDevIns);
1136int pdmR3ThreadDestroyUsb(PVM pVM, PPDMUSBINS pUsbIns);
1137int pdmR3ThreadDestroyDriver(PVM pVM, PPDMDRVINS pDrvIns);
1138void pdmR3ThreadDestroyAll(PVM pVM);
1139int pdmR3ThreadResumeAll(PVM pVM);
1140int pdmR3ThreadSuspendAll(PVM pVM);
1141
1142#ifdef VBOX_WITH_PDM_ASYNC_COMPLETION
1143int pdmR3AsyncCompletionInit(PVM pVM);
1144int pdmR3AsyncCompletionTerm(PVM pVM);
1145#endif
1146
1147#endif /* IN_RING3 */
1148
1149void pdmLock(PVM pVM);
1150int pdmLockEx(PVM pVM, int rc);
1151void pdmUnlock(PVM pVM);
1152
1153/** @} */
1154
1155RT_C_DECLS_END
1156
1157#endif
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