VirtualBox

source: vbox/trunk/src/VBox/VMM/PDMInternal.h@ 382

Last change on this file since 382 was 161, checked in by vboxsync, 18 years ago

64-bit: structure alignment.

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1/* $Id: PDMInternal.h 161 2007-01-18 18:25:45Z vboxsync $ */
2/** @file
3 * PDM - Internal header file.
4 */
5
6/*
7 * Copyright (C) 2006 InnoTek Systemberatung GmbH
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License as published by the Free Software Foundation,
13 * in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
14 * distribution. VirtualBox OSE is distributed in the hope that it will
15 * be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * If you received this file as part of a commercial VirtualBox
18 * distribution, then only the terms of your commercial VirtualBox
19 * license agreement apply instead of the previous paragraph.
20 */
21
22#ifndef __PDMInternal_h__
23#define __PDMInternal_h__
24
25#include <VBox/cdefs.h>
26#include <VBox/types.h>
27#include <VBox/param.h>
28#include <VBox/cfgm.h>
29#include <VBox/stam.h>
30#include <iprt/critsect.h>
31
32__BEGIN_DECLS
33
34
35/** @defgroup grp_pdm_int Internal
36 * @ingroup grp_pdm
37 * @internal
38 * @{
39 */
40
41/** Pointer to a PDM Device. */
42typedef struct PDMDEV *PPDMDEV;
43/** Pointer to a pointer to a PDM Device. */
44typedef PPDMDEV *PPPDMDEV;
45
46/** Pointer to a PDM Driver. */
47typedef struct PDMDRV *PPDMDRV;
48/** Pointer to a pointer to a PDM Driver. */
49typedef PPDMDRV *PPPDMDRV;
50
51/** Pointer to a PDM Logical Unit. */
52typedef struct PDMLUN *PPDMLUN;
53/** Pointer to a pointer to a PDM Logical Unit. */
54typedef PPDMLUN *PPPDMLUN;
55
56/** Pointer to a PDM PCI Bus instance. */
57typedef struct PDMPCIBUS *PPDMPCIBUS;
58/** Pointer to a DMAC instance. */
59typedef struct PDMDMAC *PPDMDMAC;
60/** Pointer to a RTC instance. */
61typedef struct PDMRTC *PPDMRTC;
62
63
64/**
65 * Private instance data.
66 */
67typedef struct PDMDEVINSINT
68{
69 /** Pointer to the next instance (HC Ptr).
70 * (Head is pointed to by PDM::pDevInstances.) */
71 HCPTRTYPE(PPDMDEVINS) pNextHC;
72 /** Pointer to the next per device instance (HC Ptr).
73 * (Head is pointed to by PDMDEV::pInstances.) */
74 HCPTRTYPE(PPDMDEVINS) pPerDeviceNextHC;
75
76 /** Pointer to device structure - HC Ptr. */
77 HCPTRTYPE(PPDMDEV) pDevHC;
78
79 /** Pointer to the VM this instance was created for - HC Ptr. */
80 HCPTRTYPE(PVM) pVMHC;
81 /** Pointer to the VM this instance was created for - GC Ptr. */
82 GCPTRTYPE(PVM) pVMGC;
83
84 /** Pointer to the list of logical units associated with the device. (FIFO) */
85 HCPTRTYPE(PPDMLUN) pLunsHC;
86
87 /** Configuration handle to the instance node. */
88 HCPTRTYPE(PCFGMNODE) pCfgHandle;
89
90 /** HC pointer to associated PCI device structure. */
91 HCPTRTYPE(struct PCIDevice *) pPciDeviceHC;
92 /** GC pointer to associated PCI device structure. */
93 GCPTRTYPE(struct PCIDevice *) pPciDeviceGC;
94 /** HC pointer to associated PCI bus structure. */
95 HCPTRTYPE(PPDMPCIBUS) pPciBusHC;
96 /** GC pointer to associated PCI bus structure. */
97 GCPTRTYPE(PPDMPCIBUS) pPciBusGC;
98} PDMDEVINSINT;
99
100
101/**
102 * Private instance data.
103 */
104typedef struct PDMDRVINSINT
105{
106 /** Pointer to the driver instance above.
107 * This is NULL for the topmost drive. */
108 PPDMDRVINS pUp;
109 /** Pointer to the driver instance below.
110 * This is NULL for the bottommost driver. */
111 PPDMDRVINS pDown;
112 /** Pointer to the logical unit this driver chained on. */
113 PPDMLUN pLun;
114 /** Pointer to driver structure from which this was instantiated. */
115 PPDMDRV pDrv;
116 /** Pointer to the VM this instance was created for. */
117 PVM pVM;
118 /** Flag indicating that the driver is being detached and destroyed.
119 * (Helps detect potential recursive detaching.) */
120 bool fDetaching;
121 /** Configuration handle to the instance node. */
122 PCFGMNODE pCfgHandle;
123
124} PDMDRVINSINT;
125
126
127/**
128 * Private critical section data.
129 */
130typedef struct PDMCRITSECTINT
131{
132 /** The critical section core which is shared with IPRT. */
133 RTCRITSECT Core;
134 /** Pointer to the next critical section.
135 * This chain is used for relocating pVMGC and device cleanup. */
136 R3PTRTYPE(struct PDMCRITSECTINT *) pNext;
137 /** Owner identifier.
138 * This is pDevIns if the owner is a device. Similarily for a driver or service.
139 * PDMR3CritSectInit() sets this to point to the critsect itself. */
140 RTR3PTR pvKey;
141 /** Pointer to the VM - R3Ptr. */
142 R3PTRTYPE(PVM) pVMR3;
143 /** Pointer to the VM - R0Ptr. */
144 R0PTRTYPE(PVM) pVMR0;
145 /** Pointer to the VM - GCPtr. */
146 GCPTRTYPE(PVM) pVMGC;
147#if GC_ARCH_BITS == 32
148 uint32_t u32Padding;
149#endif
150 /** R0/GC lock contention. */
151 STAMCOUNTER StatContentionR0GCLock;
152 /** R0/GC unlock contention. */
153 STAMCOUNTER StatContentionR0GCUnlock;
154 /** R3 lock contention. */
155 STAMCOUNTER StatContentionR3;
156 /** Profiling the time the section is locked. */
157 STAMPROFILEADV StatLocked;
158} PDMCRITSECTINT, *PPDMCRITSECTINT;
159
160
161/* Must be included after PDMDEVINSINT is defined. */
162#define PDMDEVINSINT_DECLARED
163#define PDMDRVINSINT_DECLARED
164#define PDMCRITSECTINT_DECLARED
165#ifdef __VBox_pdm_h__
166# error "Invalid header PDM order. Include PDMInternal.h before VBox/pdm.h!"
167#endif
168#include <VBox/pdm.h>
169
170
171
172/**
173 * PDM Logical Unit.
174 *
175 * This typically the representation of a physical port on a
176 * device, like for instance the PS/2 keyboard port on the
177 * keyboard controller device. The LUNs are chained on the
178 * device the belong to (PDMDEVINSINT::pLunsHC).
179 */
180typedef struct PDMLUN
181{
182 /** The LUN - The Logical Unit Number. */
183 RTUINT iLun;
184 /** Pointer to the next LUN. */
185 PPDMLUN pNext;
186 /** Pointer to the top driver in the driver chain. */
187 PPDMDRVINS pTop;
188 /** Pointer to the device instance which the LUN belongs to. */
189 PPDMDEVINS pDevIns;
190 /** Pointer to the device base interface. */
191 PPDMIBASE pBase;
192 /** Description of this LUN. */
193 const char *pszDesc;
194} PDMLUN;
195
196
197/**
198 * PDM Device.
199 */
200typedef struct PDMDEV
201{
202 /** Pointer to the next device (HC Ptr). */
203 HCPTRTYPE(PPDMDEV) pNext;
204 /** Device name length. (search optimization) */
205 RTUINT cchName;
206 /** Registration structure. */
207 HCPTRTYPE(const struct PDMDEVREG *) pDevReg;
208 /** Number of instances. */
209 RTUINT cInstances;
210 /** Pointer to chain of instances (HC Ptr). */
211 HCPTRTYPE(PPDMDEVINS) pInstances;
212
213} PDMDEV;
214
215
216/**
217 * PDM Driver.
218 */
219typedef struct PDMDRV
220{
221 /** Pointer to the next device. */
222 PPDMDRV pNext;
223 /** Registration structure. */
224 const struct PDMDRVREG *pDrvReg;
225 /** Number of instances. */
226 RTUINT cInstances;
227
228} PDMDRV;
229
230
231/**
232 * PDM registered PIC device.
233 */
234typedef struct PDMPIC
235{
236 /** Pointer to the PIC device instance - HC. */
237 HCPTRTYPE(PPDMDEVINS) pDevInsR3;
238 /** @copydoc PDMPICREG::pfnSetIrqHC */
239 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
240 /** @copydoc PDMPICREG::pfnGetInterruptHC */
241 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
242
243 /** Pointer to the PIC device instance - R0. */
244 R0PTRTYPE(PPDMDEVINS) pDevInsR0;
245 /** @copydoc PDMPICREG::pfnSetIrqHC */
246 DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
247 /** @copydoc PDMPICREG::pfnGetInterruptHC */
248 DECLR0CALLBACKMEMBER(int, pfnGetInterruptR0,(PPDMDEVINS pDevIns));
249
250 /** Pointer to the PIC device instance - GC. */
251 GCPTRTYPE(PPDMDEVINS) pDevInsGC;
252 /** @copydoc PDMPICREG::pfnSetIrqHC */
253 DECLGCCALLBACKMEMBER(void, pfnSetIrqGC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
254 /** @copydoc PDMPICREG::pfnGetInterruptHC */
255 DECLGCCALLBACKMEMBER(int, pfnGetInterruptGC,(PPDMDEVINS pDevIns));
256#if GC_ARCH_BITS == 32
257 RTGCPTR GCPtrPadding; /**< Alignment padding. */
258#endif
259} PDMPIC;
260
261
262/**
263 * PDM registered APIC device.
264 */
265typedef struct PDMAPIC
266{
267 /** Pointer to the APIC device instance - HC Ptr. */
268 PPDMDEVINSHC pDevInsR3;
269 /** @copydoc PDMAPICREG::pfnGetInterruptHC */
270 DECLR3CALLBACKMEMBER(int, pfnGetInterruptR3,(PPDMDEVINS pDevIns));
271 /** @copydoc PDMAPICREG::pfnSetBaseHC */
272 DECLR3CALLBACKMEMBER(void, pfnSetBaseR3,(PPDMDEVINS pDevIns, uint64_t u64Base));
273 /** @copydoc PDMAPICREG::pfnGetBaseHC */
274 DECLR3CALLBACKMEMBER(uint64_t, pfnGetBaseR3,(PPDMDEVINS pDevIns));
275 /** @copydoc PDMAPICREG::pfnSetTPRHC */
276 DECLR3CALLBACKMEMBER(void, pfnSetTPRR3,(PPDMDEVINS pDevIns, uint8_t u8TPR));
277 /** @copydoc PDMAPICREG::pfnGetTPRHC */
278 DECLR3CALLBACKMEMBER(uint8_t, pfnGetTPRR3,(PPDMDEVINS pDevIns));
279 /** @copydoc PDMAPICREG::pfnBusDeliverHC */
280 DECLR3CALLBACKMEMBER(void, pfnBusDeliverR3,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
281 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
282
283 /** Pointer to the PIC device instance - R0. */
284 R0PTRTYPE(PPDMDEVINS) pDevInsR0;
285 /** @copydoc PDMAPICREG::pfnGetInterruptHC */
286 DECLR0CALLBACKMEMBER(int, pfnGetInterruptR0,(PPDMDEVINS pDevIns));
287 /** @copydoc PDMAPICREG::pfnSetBaseHC */
288 DECLR0CALLBACKMEMBER(void, pfnSetBaseR0,(PPDMDEVINS pDevIns, uint64_t u64Base));
289 /** @copydoc PDMAPICREG::pfnGetBaseHC */
290 DECLR0CALLBACKMEMBER(uint64_t, pfnGetBaseR0,(PPDMDEVINS pDevIns));
291 /** @copydoc PDMAPICREG::pfnSetTPRHC */
292 DECLR0CALLBACKMEMBER(void, pfnSetTPRR0,(PPDMDEVINS pDevIns, uint8_t u8TPR));
293 /** @copydoc PDMAPICREG::pfnGetTPRHC */
294 DECLR0CALLBACKMEMBER(uint8_t, pfnGetTPRR0,(PPDMDEVINS pDevIns));
295 /** @copydoc PDMAPICREG::pfnBusDeliverHC */
296 DECLR0CALLBACKMEMBER(void, pfnBusDeliverR0,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
297 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
298
299 /** Pointer to the APIC device instance - GC Ptr. */
300 PPDMDEVINSGC pDevInsGC;
301 /** @copydoc PDMAPICREG::pfnGetInterruptHC */
302 DECLGCCALLBACKMEMBER(int, pfnGetInterruptGC,(PPDMDEVINS pDevIns));
303 /** @copydoc PDMAPICREG::pfnSetBaseHC */
304 DECLGCCALLBACKMEMBER(void, pfnSetBaseGC,(PPDMDEVINS pDevIns, uint64_t u64Base));
305 /** @copydoc PDMAPICREG::pfnGetBaseHC */
306 DECLGCCALLBACKMEMBER(uint64_t, pfnGetBaseGC,(PPDMDEVINS pDevIns));
307 /** @copydoc PDMAPICREG::pfnSetTPRHC */
308 DECLGCCALLBACKMEMBER(void, pfnSetTPRGC,(PPDMDEVINS pDevIns, uint8_t u8TPR));
309 /** @copydoc PDMAPICREG::pfnGetTPRHC */
310 DECLGCCALLBACKMEMBER(uint8_t, pfnGetTPRGC,(PPDMDEVINS pDevIns));
311 /** @copydoc PDMAPICREG::pfnBusDeliverHC */
312 DECLGCCALLBACKMEMBER(void, pfnBusDeliverGC,(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
313 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode));
314#if GC_ARCH_BITS == 32
315 RTGCPTR GCPtrPadding; /**< Alignment padding. */
316#endif
317} PDMAPIC;
318
319
320/**
321 * PDM registered I/O APIC device.
322 */
323typedef struct PDMIOAPIC
324{
325 /** Pointer to the APIC device instance - HC Ptr. */
326 PPDMDEVINSHC pDevInsR3;
327 /** @copydoc PDMIOAPICREG::pfnSetIrqHC */
328 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
329
330 /** Pointer to the PIC device instance - R0. */
331 R0PTRTYPE(PPDMDEVINS) pDevInsR0;
332 /** @copydoc PDMIOAPICREG::pfnSetIrqHC */
333 DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
334
335 /** Pointer to the APIC device instance - GC Ptr. */
336 PPDMDEVINSGC pDevInsGC;
337 /** @copydoc PDMIOAPICREG::pfnSetIrqHC */
338 DECLGCCALLBACKMEMBER(void, pfnSetIrqGC,(PPDMDEVINS pDevIns, int iIrq, int iLevel));
339} PDMIOAPIC;
340
341
342/**
343 * PDM PCI Bus instance.
344 */
345typedef struct PDMPCIBUS
346{
347 /** PCI bus number. */
348 RTUINT iBus;
349 RTUINT uPadding0; /**< Alignment padding.*/
350
351 /** Pointer to PCI Bus device instance. */
352 PPDMDEVINSHC pDevInsR3;
353 /** @copydoc PDMPCIBUSREG::pfnSetIrqHC */
354 DECLR3CALLBACKMEMBER(void, pfnSetIrqR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
355 /** @copydoc PDMPCIBUSREG::pfnRegisterHC */
356 DECLR3CALLBACKMEMBER(int, pfnRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, const char *pszName, int iDev));
357 /** @copydoc PDMPCIBUSREG::pfnIORegionRegisterHC */
358 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iRegion, uint32_t cbRegion,
359 PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
360 /** @copydoc PDMPCIBUSREG::pfnSaveExecHC */
361 DECLR3CALLBACKMEMBER(int, pfnSaveExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
362 /** @copydoc PDMPCIBUSREG::pfnLoadExecHC */
363 DECLR3CALLBACKMEMBER(int, pfnLoadExecR3,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PSSMHANDLE pSSMHandle));
364 /** @copydoc PDMPCIBUSREG::pfnFakePCIBIOSHC */
365 DECLR3CALLBACKMEMBER(int, pfnFakePCIBIOSR3,(PPDMDEVINS pDevIns));
366
367 /** Pointer to the PIC device instance - R0. */
368 R0PTRTYPE(PPDMDEVINS) pDevInsR0;
369 /** @copydoc PDMPCIBUSREG::pfnSetIrqHC */
370 DECLR0CALLBACKMEMBER(void, pfnSetIrqR0,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
371
372 /** Pointer to PCI Bus device instance. */
373 PPDMDEVINSGC pDevInsGC;
374 /** @copydoc PDMPCIBUSREG::pfnSetIrqHC */
375 DECLGCCALLBACKMEMBER(void, pfnSetIrqGC,(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, int iIrq, int iLevel));
376} PDMPCIBUS;
377
378
379#ifdef IN_RING3
380/**
381 * PDM registered DMAC (DMA Controller) device.
382 */
383typedef struct PDMDMAC
384{
385 /** Pointer to the DMAC device instance. */
386 PPDMDEVINS pDevIns;
387 /** Copy of the registration structure. */
388 PDMDMACREG Reg;
389} PDMDMAC;
390
391
392/**
393 * PDM registered RTC (Real Time Clock) device.
394 */
395typedef struct PDMRTC
396{
397 /** Pointer to the RTC device instance. */
398 PPDMDEVINS pDevIns;
399 /** Copy of the registration structure. */
400 PDMRTCREG Reg;
401} PDMRTC;
402
403#endif /* IN_RING3 */
404
405/**
406 * Module type.
407 */
408typedef enum PDMMODTYPE
409{
410 /** Guest context module. */
411 PDMMOD_TYPE_GC,
412 /** Ring-0 (host) context module. */
413 PDMMOD_TYPE_R0,
414 /** Ring-3 (host) context module. */
415 PDMMOD_TYPE_R3
416} PDMMODTYPE, *PPDMMODTYPE;
417
418
419/** The module name length including the terminator. */
420#define PDMMOD_NAME_LEN 32
421
422/**
423 * Loaded module instance.
424 */
425typedef struct PDMMOD
426{
427 /** Module name. This is used for refering to
428 * the module internally, sort of like a handle. */
429 char szName[PDMMOD_NAME_LEN];
430 /** Module type. */
431 PDMMODTYPE eType;
432 /** Loader module handle. Not used for R0 modules. */
433 RTLDRMOD hLdrMod;
434 /** Loaded address.
435 * This is the 'handle' for R0 modules. */
436 RTUINTPTR ImageBase;
437 /** Old loaded address.
438 * This is used during relocation of GC modules. Not used for R0 modules. */
439 RTUINTPTR OldImageBase;
440 /** Where the R3 HC bits are stored.
441 * This can be equal to ImageBase but doesn't have to. Not used for R0 modules. */
442 void *pvBits;
443
444 /** Pointer to next module. */
445 struct PDMMOD *pNext;
446 /** Module filename. */
447 char szFilename[1];
448} PDMMOD;
449/** Pointer to loaded module instance. */
450typedef PDMMOD *PPDMMOD;
451
452
453
454/** Extra space in the free array. */
455#define PDMQUEUE_FREE_SLACK 16
456
457/**
458 * Queue type.
459 */
460typedef enum PDMQUEUETYPE
461{
462 /** Device consumer. */
463 PDMQUEUETYPE_DEV = 1,
464 /** Driver consumer. */
465 PDMQUEUETYPE_DRV,
466 /** Internal consumer. */
467 PDMQUEUETYPE_INTERNAL,
468 /** External consumer. */
469 PDMQUEUETYPE_EXTERNAL
470} PDMQUEUETYPE;
471
472/** Pointer to a PDM Queue. */
473typedef struct PDMQUEUE *PPDMQUEUE;
474
475/**
476 * PDM Queue.
477 */
478typedef struct PDMQUEUE
479{
480 /** Pointer to the next queue in the list. */
481 HCPTRTYPE(PPDMQUEUE) pNext;
482 /** Queue type. */
483 PDMQUEUETYPE enmType;
484 /** Type specific data. */
485 union
486 {
487 /** PDMQUEUETYPE_DEV */
488 struct
489 {
490 /** Pointer to consumer function. */
491 HCPTRTYPE(PFNPDMQUEUEDEV) pfnCallback;
492 /** Pointer to the device instance owning the queue. */
493 HCPTRTYPE(PPDMDEVINS) pDevIns;
494 } Dev;
495 /** PDMQUEUETYPE_DRV */
496 struct
497 {
498 /** Pointer to consumer function. */
499 HCPTRTYPE(PFNPDMQUEUEDRV) pfnCallback;
500 /** Pointer to the driver instance owning the queue. */
501 HCPTRTYPE(PPDMDRVINS) pDrvIns;
502 } Drv;
503 /** PDMQUEUETYPE_INTERNAL */
504 struct
505 {
506 /** Pointer to consumer function. */
507 HCPTRTYPE(PFNPDMQUEUEINT) pfnCallback;
508 } Int;
509 /** PDMQUEUETYPE_EXTERNAL */
510 struct
511 {
512 /** Pointer to consumer function. */
513 HCPTRTYPE(PFNPDMQUEUEEXT) pfnCallback;
514 /** Pointer to user argument. */
515 HCPTRTYPE(void *) pvUser;
516 } Ext;
517 } u;
518 /** Pointer to the VM. */
519 HCPTRTYPE(PVM) pVMHC;
520 /** Pointer to the GC VM and indicator for GC enabled queue.
521 * If this is NULL, the queue cannot be used in GC.
522 */
523 GCPTRTYPE(PVM) pVMGC;
524 /** The interval between checking the queue for events.
525 * The realtime timer below is used to do the waiting.
526 * If 0, the queue will use the VM_FF_PDM_QUEUE forced action. */
527 uint32_t cMilliesInterval;
528 /** Interval timer. Only used if cMilliesInterval is non-zero. */
529 PTMTIMERHC pTimer;
530 /** Item size (bytes). */
531 RTUINT cbItem;
532 /** Number of items in the queue. */
533 RTUINT cItems;
534 /** LIFO of pending items - HC. */
535 HCPTRTYPE(PPDMQUEUEITEMCORE) volatile pPendingHC;
536 /** LIFO of pending items - GC. */
537 GCPTRTYPE(PPDMQUEUEITEMCORE) pPendingGC;
538 /** Index to the free head (where we insert). */
539 uint32_t volatile iFreeHead;
540 /** Index to the free tail (where we remove). */
541 uint32_t volatile iFreeTail;
542 /** Array of pointers to free items. Variable size. */
543 struct PDMQUEUEFREEITEM
544 {
545 /** Pointer to the free item - HC Ptr. */
546 HCPTRTYPE(PPDMQUEUEITEMCORE) volatile pItemHC;
547 /** Pointer to the free item - GC Ptr. */
548 GCPTRTYPE(PPDMQUEUEITEMCORE) volatile pItemGC;
549 } aFreeItems[1];
550} PDMQUEUE;
551
552
553/**
554 * Queue device helper task operation.
555 */
556typedef enum PDMDEVHLPTASKOP
557{
558 /** The usual invalid 0 entry. */
559 PDMDEVHLPTASKOP_INVALID = 0,
560 /** ISASetIrq */
561 PDMDEVHLPTASKOP_ISA_SET_IRQ,
562 /** PCISetIrq */
563 PDMDEVHLPTASKOP_PCI_SET_IRQ,
564 /** PCISetIrq */
565 PDMDEVHLPTASKOP_IOAPIC_SET_IRQ,
566 /** The usual 32-bit hack. */
567 PDMDEVHLPTASKOP_32BIT_HACK = 0x7fffffff
568} PDMDEVHLPTASKOP;
569
570/**
571 * Queued Device Helper Task.
572 */
573typedef struct PDMDEVHLPTASK
574{
575 /** The queue item core (don't touch). */
576 PDMQUEUEITEMCORE Core;
577 /** Pointer to the device instance (HC Ptr). */
578 HCPTRTYPE(PPDMDEVINS) pDevInsHC;
579 /** This operation to perform. */
580 PDMDEVHLPTASKOP enmOp;
581 /** Parameters to the operation. */
582 union PDMDEVHLPTASKPARAMS
583 {
584 /**
585 * PDMDEVHLPTASKOP_ISA_SET_IRQ and PDMDEVHLPTASKOP_PCI_SET_IRQ.
586 */
587 struct PDMDEVHLPTASKSETIRQ
588 {
589 /** The IRQ */
590 int iIrq;
591 /** The new level. */
592 int iLevel;
593 } SetIRQ;
594 } u;
595} PDMDEVHLPTASK;
596/** Pointer to a queued Device Helper Task. */
597typedef PDMDEVHLPTASK *PPDMDEVHLPTASK;
598/** Pointer to a const queued Device Helper Task. */
599typedef const PDMDEVHLPTASK *PCPDMDEVHLPTASK;
600
601
602
603/**
604 * Converts a PDM pointer into a VM pointer.
605 * @returns Pointer to the VM structure the PDM is part of.
606 * @param pPDM Pointer to PDM instance data.
607 */
608#define PDM2VM(pPDM) ( (PVM)((char*)pPDM - pPDM->offVM) )
609
610
611/**
612 * PDM VM Instance data.
613 * Changes to this must checked against the padding of the cfgm union in VM!
614 */
615typedef struct PDM
616{
617 /** Offset to the VM structure.
618 * See PDM2VM(). */
619 RTUINT offVM;
620 RTUINT uPadding0; /**< Alignment padding.*/
621
622 /** Pointer to list of loaded modules. This is HC only! */
623 HCPTRTYPE(PPDMMOD) pModules;
624
625 /** List of registered devices. (FIFO) */
626 HCPTRTYPE(PPDMDEV) pDevs;
627 /** List of devices instances. (FIFO) */
628 HCPTRTYPE(PPDMDEVINS) pDevInstances;
629 /** List of registered drivers. (FIFO) */
630 HCPTRTYPE(PPDMDRV) pDrvs;
631 /** List of initialized critical sections. (LIFO) */
632 HCPTRTYPE(PPDMCRITSECTINT) pCritSects;
633 /** PCI Buses. */
634 PDMPCIBUS aPciBuses[1];
635 /** The register PIC device. */
636 PDMPIC Pic;
637 /** The registerd APIC device. */
638 PDMAPIC Apic;
639 /** The registerd I/O APIC device. */
640 PDMIOAPIC IoApic;
641 /** The registered DMAC device. */
642 HCPTRTYPE(PPDMDMAC) pDmac;
643 /** The registered RTC device. */
644 HCPTRTYPE(PPDMRTC) pRtc;
645
646 /** Queue in which devhlp tasks are queued for R3 execution - HC Ptr. */
647 HCPTRTYPE(PPDMQUEUE) pDevHlpQueueHC;
648 /** Queue in which devhlp tasks are queued for R3 execution - GC Ptr. */
649 GCPTRTYPE(PPDMQUEUE) pDevHlpQueueGC;
650
651 /** The number of entries in the apQueuedCritSectsLeaves table that's currnetly in use. */
652 RTUINT cQueuedCritSectLeaves;
653 /** Critical sections queued in GC/R0 because of contention preventing leave to complete. (R3 Ptrs)
654 * We will return to Ring-3 ASAP, so this queue doesn't has to be very long. */
655 R3PTRTYPE(PPDMCRITSECT) apQueuedCritSectsLeaves[8];
656
657 /** Linked list of timer driven PDM queues. */
658 HCPTRTYPE(struct PDMQUEUE *) pQueuesTimer;
659 /** Linked list of force action driven PDM queues. */
660 HCPTRTYPE(struct PDMQUEUE *) pQueuesForced;
661 /** Pointer to the queue which should be manually flushed - HCPtr.
662 * Only touched by EMT. */
663 HCPTRTYPE(struct PDMQUEUE *) pQueueFlushHC;
664 /** Pointer to the queue which should be manually flushed - GCPtr. */
665 GCPTRTYPE(struct PDMQUEUE *) pQueueFlushGC;
666
667 /** TEMPORARY HACKS FOR NETWORK POLLING.
668 * @todo fix NAT and kill this!
669 * @{ */
670 RTUINT cPollers;
671 HCPTRTYPE(PFNPDMDRVPOLLER) apfnPollers[16];
672 HCPTRTYPE(PPDMDRVINS) aDrvInsPollers[16];
673 PTMTIMERHC pTimerPollers;
674 /** @} */
675
676#ifdef VBOX_WITH_PDM_LOCK
677 /** The PDM lock.
678 * This is used to protect everything that deals with interrupts, i.e.
679 * the PIC, APIC, IOAPIC and PCI devices pluss some PDM functions. */
680 PDMCRITSECT CritSect;
681#endif
682
683
684 /** Number of times a critical section leave requesed needed to be queued for ring-3 execution. */
685 STAMCOUNTER StatQueuedCritSectLeaves;
686} PDM;
687/** Pointer to PDM VM instance data. */
688typedef PDM *PPDM;
689
690
691
692/*******************************************************************************
693* Global Variables *
694*******************************************************************************/
695#ifdef IN_RING3
696extern const PDMDRVHLP g_pdmR3DrvHlp;
697#endif
698
699
700/*******************************************************************************
701* Internal Functions *
702*******************************************************************************/
703int pdmR3CritSectInit(PVM pVM);
704int pdmR3CritSectTerm(PVM pVM);
705void pdmR3CritSectRelocate(PVM pVM);
706int pdmR3CritSectInitDevice(PVM pVM, PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName);
707int pdmR3CritSectDeleteDevice(PVM pVM, PPDMDEVINS pDevIns);
708
709int pdmR3DevInit(PVM pVM);
710PPDMDEV pdmR3DevLookup(PVM pVM, const char *pszName);
711int pdmR3DevFindLun(PVM pVM, const char *pszDevice, unsigned iInstance, unsigned iLun, PPDMLUN *ppLun);
712
713int pdmR3DrvInit(PVM pVM);
714int pdmR3DrvDetach(PPDMDRVINS pDrvIns);
715PPDMDRV pdmR3DrvLookup(PVM pVM, const char *pszName);
716
717int pdmR3LdrInit(PVM pVM);
718void pdmR3LdrTerm(PVM pVM);
719char * pdmR3FileR3(const char *pszFile);
720int pdmR3LoadR3(PVM pVM, const char *pszFilename, const char *pszName);
721
722void pdmR3QueueRelocate(PVM pVM, RTGCINTPTR offDelta);
723
724#ifdef VBOX_WITH_PDM_LOCK
725void pdmLock(PVM pVM);
726int pdmLockEx(PVM pVM, int rc);
727void pdmUnlock(PVM pVM);
728#else
729# define pdmLock(pVM) do {} while (0)
730# define pdmLockEx(pVM, rc) (VINF_SUCCESS)
731# define pdmUnlock(pVM) do {} while (0)
732#endif
733
734/** @} */
735
736__END_DECLS
737
738#endif
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