VirtualBox

source: vbox/trunk/src/VBox/VMM/PDMDevice.cpp@ 7050

Last change on this file since 7050 was 6796, checked in by vboxsync, 17 years ago

Fixed init problems wrt. VM ownership by implementing the UVM structure (U = user mode) and moving problematic ring-3 stuff over there (emt+reqs, r3heap, stam, loader[VMMR0.r0]). Big change, but it works fine here... :-)
  • Property svn:eol-style set to native
  • Property svn:keywords set to Id
File size: 177.5 KB
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1/* $Id: PDMDevice.cpp 6796 2008-02-04 18:19:58Z vboxsync $ */
2/** @file
3 * PDM - Pluggable Device and Driver Manager, Device parts.
4 */
5
6/*
7 * Copyright (C) 2006-2007 innotek GmbH
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*******************************************************************************
20* Header Files *
21*******************************************************************************/
22#define LOG_GROUP LOG_GROUP_PDM_DEVICE
23#include "PDMInternal.h"
24#include <VBox/pdm.h>
25#include <VBox/mm.h>
26#include <VBox/pgm.h>
27#include <VBox/iom.h>
28#include <VBox/cfgm.h>
29#include <VBox/rem.h>
30#include <VBox/dbgf.h>
31#include <VBox/vm.h>
32#include <VBox/vmm.h>
33#include <VBox/hwaccm.h>
34
35#include <VBox/version.h>
36#include <VBox/log.h>
37#include <VBox/err.h>
38#include <iprt/alloc.h>
39#include <iprt/alloca.h>
40#include <iprt/asm.h>
41#include <iprt/assert.h>
42#include <iprt/path.h>
43#include <iprt/semaphore.h>
44#include <iprt/string.h>
45#include <iprt/thread.h>
46
47
48
49/*******************************************************************************
50* Structures and Typedefs *
51*******************************************************************************/
52/**
53 * Internal callback structure pointer.
54 * The main purpose is to define the extra data we associate
55 * with PDMDEVREGCB so we can find the VM instance and so on.
56 */
57typedef struct PDMDEVREGCBINT
58{
59 /** The callback structure. */
60 PDMDEVREGCB Core;
61 /** A bit of padding. */
62 uint32_t u32[4];
63 /** VM Handle. */
64 PVM pVM;
65} PDMDEVREGCBINT, *PPDMDEVREGCBINT;
66typedef const PDMDEVREGCBINT *PCPDMDEVREGCBINT;
67
68
69/*******************************************************************************
70* Internal Functions *
71*******************************************************************************/
72static DECLCALLBACK(int) pdmR3DevReg_Register(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pDevReg);
73static DECLCALLBACK(void *) pdmR3DevReg_MMHeapAlloc(PPDMDEVREGCB pCallbacks, size_t cb);
74static DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem);
75
76/* VSlick regex:
77search : \om/\*\*.+?\*\/\nDECLCALLBACKMEMBER\(([^,]*), *pfn([^)]*)\)\(
78replace: \/\*\* @copydoc PDMDEVHLP::pfn\2 \*\/\nstatic DECLCALLBACK\(\1\) pdmR3DevHlp_\2\(
79 */
80
81/** @name R3 DevHlp
82 * @{
83 */
84static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser, PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn, PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc);
85static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterGC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTGCPTR pvUser, const char *pszOut, const char *pszIn, const char *pszOutStr, const char *pszInStr, const char *pszDesc);
86static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser, const char *pszOut, const char *pszIn, const char *pszOutStr, const char *pszInStr, const char *pszDesc);
87static DECLCALLBACK(int) pdmR3DevHlp_IOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts);
88static DECLCALLBACK(int) pdmR3DevHlp_MMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
89 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
90 const char *pszDesc);
91static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterGC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
92 const char *pszWrite, const char *pszRead, const char *pszFill,
93 const char *pszDesc);
94static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
95 const char *pszWrite, const char *pszRead, const char *pszFill,
96 const char *pszDesc);
97static DECLCALLBACK(int) pdmR3DevHlp_MMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange);
98static DECLCALLBACK(int) pdmR3DevHlp_ROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, bool fShadow, const char *pszDesc);
99static DECLCALLBACK(int) pdmR3DevHlp_SSMRegister(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
100 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
101 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone);
102static DECLCALLBACK(int) pdmR3DevHlp_TMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERR3 ppTimer);
103static DECLCALLBACK(PTMTIMERR3) pdmR3DevHlp_TMTimerCreateExternal(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMEREXT pfnCallback, void *pvUser, const char *pszDesc);
104static DECLCALLBACK(int) pdmR3DevHlp_PCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev);
105static DECLCALLBACK(int) pdmR3DevHlp_PCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback);
106static DECLCALLBACK(void) pdmR3DevHlp_PCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
107 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld);
108static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel);
109static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel);
110static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel);
111static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel);
112static DECLCALLBACK(int) pdmR3DevHlp_DriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc);
113static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAlloc(PPDMDEVINS pDevIns, size_t cb);
114static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb);
115static DECLCALLBACK(void) pdmR3DevHlp_MMHeapFree(PPDMDEVINS pDevIns, void *pv);
116static DECLCALLBACK(int) pdmR3DevHlp_VMSetError(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...);
117static DECLCALLBACK(int) pdmR3DevHlp_VMSetErrorV(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va);
118static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeError(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...);
119static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeErrorV(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va);
120static DECLCALLBACK(bool) pdmR3DevHlp_AssertEMT(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction);
121static DECLCALLBACK(bool) pdmR3DevHlp_AssertOther(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction);
122static DECLCALLBACK(int) pdmR3DevHlp_DBGFStopV(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args);
123static DECLCALLBACK(int) pdmR3DevHlp_DBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler);
124static DECLCALLBACK(void) pdmR3DevHlp_STAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc);
125static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...);
126static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterV(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args);
127static DECLCALLBACK(int) pdmR3DevHlp_CritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName);
128static DECLCALLBACK(PRTTIMESPEC) pdmR3DevHlp_UTCNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime);
129static DECLCALLBACK(int) pdmR3DevHlp_PDMThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
130 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
131
132static DECLCALLBACK(PVM) pdmR3DevHlp_GetVM(PPDMDEVINS pDevIns);
133static DECLCALLBACK(int) pdmR3DevHlp_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3);
134static DECLCALLBACK(int) pdmR3DevHlp_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3);
135static DECLCALLBACK(int) pdmR3DevHlp_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3);
136static DECLCALLBACK(int) pdmR3DevHlp_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3);
137static DECLCALLBACK(int) pdmR3DevHlp_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp);
138static DECLCALLBACK(int) pdmR3DevHlp_RTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp);
139static DECLCALLBACK(int) pdmR3DevHlp_PDMQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval, PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue);
140static DECLCALLBACK(void) pdmR3DevHlp_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead);
141static DECLCALLBACK(void) pdmR3DevHlp_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite);
142static DECLCALLBACK(int) pdmR3DevHlp_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb);
143static DECLCALLBACK(int) pdmR3DevHlp_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb);
144static DECLCALLBACK(int) pdmR3DevHlp_PhysReserve(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc);
145static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys);
146static DECLCALLBACK(bool) pdmR3DevHlp_A20IsEnabled(PPDMDEVINS pDevIns);
147static DECLCALLBACK(void) pdmR3DevHlp_A20Set(PPDMDEVINS pDevIns, bool fEnable);
148static DECLCALLBACK(int) pdmR3DevHlp_VMReset(PPDMDEVINS pDevIns);
149static DECLCALLBACK(int) pdmR3DevHlp_VMPowerOff(PPDMDEVINS pDevIns);
150static DECLCALLBACK(int) pdmR3DevHlp_VMSuspend(PPDMDEVINS pDevIns);
151static DECLCALLBACK(int) pdmR3DevHlp_LockVM(PPDMDEVINS pDevIns);
152static DECLCALLBACK(int) pdmR3DevHlp_UnlockVM(PPDMDEVINS pDevIns);
153static DECLCALLBACK(bool) pdmR3DevHlp_AssertVMLock(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction);
154static DECLCALLBACK(int) pdmR3DevHlp_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser);
155static DECLCALLBACK(int) pdmR3DevHlp_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead);
156static DECLCALLBACK(int) pdmR3DevHlp_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten);
157static DECLCALLBACK(int) pdmR3DevHlp_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel);
158static DECLCALLBACK(uint8_t) pdmR3DevHlp_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel);
159static DECLCALLBACK(void) pdmR3DevHlp_DMASchedule(PPDMDEVINS pDevIns);
160static DECLCALLBACK(int) pdmR3DevHlp_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value);
161static DECLCALLBACK(int) pdmR3DevHlp_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value);
162static DECLCALLBACK(void) pdmR3DevHlp_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
163 uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx);
164static DECLCALLBACK(int) pdmR3DevHlp_ROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange);
165
166static DECLCALLBACK(PVM) pdmR3DevHlp_Untrusted_GetVM(PPDMDEVINS pDevIns);
167static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3);
168static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3);
169static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3);
170static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3);
171static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp);
172static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead);
173static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite);
174static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb);
175static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb);
176static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysReserve(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc);
177static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_Obsolete_Phys2HCVirt(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR ppvHC);
178static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_Obsolete_PhysGCPtr2HCPtr(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTHCPTR pHCPtr);
179
180static DECLCALLBACK(bool) pdmR3DevHlp_Untrusted_A20IsEnabled(PPDMDEVINS pDevIns);
181static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_A20Set(PPDMDEVINS pDevIns, bool fEnable);
182static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMReset(PPDMDEVINS pDevIns);
183static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMPowerOff(PPDMDEVINS pDevIns);
184static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMSuspend(PPDMDEVINS pDevIns);
185static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_LockVM(PPDMDEVINS pDevIns);
186static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_UnlockVM(PPDMDEVINS pDevIns);
187static DECLCALLBACK(bool) pdmR3DevHlp_Untrusted_AssertVMLock(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction);
188static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser);
189static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead);
190static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten);
191static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel);
192static DECLCALLBACK(uint8_t) pdmR3DevHlp_Untrusted_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel);
193static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_DMASchedule(PPDMDEVINS pDevIns);
194static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value);
195static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value);
196static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_QueryCPUId(PPDMDEVINS pDevIns, uint32_t iLeaf,
197 uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx);
198static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_ROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange);
199/** @} */
200
201
202/** @name HC PIC Helpers
203 * @{
204 */
205static DECLCALLBACK(void) pdmR3PicHlp_SetInterruptFF(PPDMDEVINS pDevIns);
206static DECLCALLBACK(void) pdmR3PicHlp_ClearInterruptFF(PPDMDEVINS pDevIns);
207#ifdef VBOX_WITH_PDM_LOCK
208static DECLCALLBACK(int) pdmR3PicHlp_Lock(PPDMDEVINS pDevIns, int rc);
209static DECLCALLBACK(void) pdmR3PicHlp_Unlock(PPDMDEVINS pDevIns);
210#endif
211static DECLCALLBACK(PCPDMPICHLPGC) pdmR3PicHlp_GetGCHelpers(PPDMDEVINS pDevIns);
212static DECLCALLBACK(PCPDMPICHLPR0) pdmR3PicHlp_GetR0Helpers(PPDMDEVINS pDevIns);
213/** @} */
214
215
216/** @name HC APIC Helpers
217 * @{
218 */
219static DECLCALLBACK(void) pdmR3ApicHlp_SetInterruptFF(PPDMDEVINS pDevIns);
220static DECLCALLBACK(void) pdmR3ApicHlp_ClearInterruptFF(PPDMDEVINS pDevIns);
221static DECLCALLBACK(void) pdmR3ApicHlp_ChangeFeature(PPDMDEVINS pDevIns, bool fEnabled);
222#ifdef VBOX_WITH_PDM_LOCK
223static DECLCALLBACK(int) pdmR3ApicHlp_Lock(PPDMDEVINS pDevIns, int rc);
224static DECLCALLBACK(void) pdmR3ApicHlp_Unlock(PPDMDEVINS pDevIns);
225#endif
226static DECLCALLBACK(PCPDMAPICHLPGC) pdmR3ApicHlp_GetGCHelpers(PPDMDEVINS pDevIns);
227static DECLCALLBACK(PCPDMAPICHLPR0) pdmR3ApicHlp_GetR0Helpers(PPDMDEVINS pDevIns);
228/** @} */
229
230
231/** @name HC I/O APIC Helpers
232 * @{
233 */
234static DECLCALLBACK(void) pdmR3IoApicHlp_ApicBusDeliver(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
235 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode);
236#ifdef VBOX_WITH_PDM_LOCK
237static DECLCALLBACK(int) pdmR3IoApicHlp_Lock(PPDMDEVINS pDevIns, int rc);
238static DECLCALLBACK(void) pdmR3IoApicHlp_Unlock(PPDMDEVINS pDevIns);
239#endif
240static DECLCALLBACK(PCPDMIOAPICHLPGC) pdmR3IoApicHlp_GetGCHelpers(PPDMDEVINS pDevIns);
241static DECLCALLBACK(PCPDMIOAPICHLPR0) pdmR3IoApicHlp_GetR0Helpers(PPDMDEVINS pDevIns);
242/** @} */
243
244
245/** @name HC PCI Bus Helpers
246 * @{
247 */
248static DECLCALLBACK(void) pdmR3PciHlp_IsaSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel);
249static DECLCALLBACK(void) pdmR3PciHlp_IoApicSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel);
250#ifdef VBOX_WITH_PDM_LOCK
251static DECLCALLBACK(int) pdmR3PciHlp_Lock(PPDMDEVINS pDevIns, int rc);
252static DECLCALLBACK(void) pdmR3PciHlp_Unlock(PPDMDEVINS pDevIns);
253#endif
254static DECLCALLBACK(PCPDMPCIHLPGC) pdmR3PciHlp_GetGCHelpers(PPDMDEVINS pDevIns);
255static DECLCALLBACK(PCPDMPCIHLPR0) pdmR3PciHlp_GetR0Helpers(PPDMDEVINS pDevIns);
256/** @} */
257
258/** @def PDMDEV_ASSERT_DEVINS
259 * Asserts the validity of the driver instance.
260 */
261#ifdef VBOX_STRICT
262# define PDMDEV_ASSERT_DEVINS(pDevIns) do { Assert(pDevIns); Assert(pDevIns->u32Version == PDM_DEVINS_VERSION); Assert(pDevIns->pvInstanceDataR3 == (void *)&pDevIns->achInstanceData[0]); } while (0)
263#else
264# define PDMDEV_ASSERT_DEVINS(pDevIns) do { } while (0)
265#endif
266static int pdmR3DevLoad(PVM pVM, PPDMDEVREGCBINT pRegCB, const char *pszFilename, const char *pszName);
267
268
269/*
270 * Allow physical read and writes from any thread
271 */
272#define PDM_PHYS_READWRITE_FROM_ANY_THREAD
273
274/*******************************************************************************
275* Global Variables *
276*******************************************************************************/
277/**
278 * The device helper structure for trusted devices.
279 */
280const PDMDEVHLP g_pdmR3DevHlpTrusted =
281{
282 PDM_DEVHLP_VERSION,
283 pdmR3DevHlp_IOPortRegister,
284 pdmR3DevHlp_IOPortRegisterGC,
285 pdmR3DevHlp_IOPortRegisterR0,
286 pdmR3DevHlp_IOPortDeregister,
287 pdmR3DevHlp_MMIORegister,
288 pdmR3DevHlp_MMIORegisterGC,
289 pdmR3DevHlp_MMIORegisterR0,
290 pdmR3DevHlp_MMIODeregister,
291 pdmR3DevHlp_ROMRegister,
292 pdmR3DevHlp_SSMRegister,
293 pdmR3DevHlp_TMTimerCreate,
294 pdmR3DevHlp_TMTimerCreateExternal,
295 pdmR3DevHlp_PCIRegister,
296 pdmR3DevHlp_PCIIORegionRegister,
297 pdmR3DevHlp_PCISetConfigCallbacks,
298 pdmR3DevHlp_PCISetIrq,
299 pdmR3DevHlp_PCISetIrqNoWait,
300 pdmR3DevHlp_ISASetIrq,
301 pdmR3DevHlp_ISASetIrqNoWait,
302 pdmR3DevHlp_DriverAttach,
303 pdmR3DevHlp_MMHeapAlloc,
304 pdmR3DevHlp_MMHeapAllocZ,
305 pdmR3DevHlp_MMHeapFree,
306 pdmR3DevHlp_VMSetError,
307 pdmR3DevHlp_VMSetErrorV,
308 pdmR3DevHlp_VMSetRuntimeError,
309 pdmR3DevHlp_VMSetRuntimeErrorV,
310 pdmR3DevHlp_AssertEMT,
311 pdmR3DevHlp_AssertOther,
312 pdmR3DevHlp_DBGFStopV,
313 pdmR3DevHlp_DBGFInfoRegister,
314 pdmR3DevHlp_STAMRegister,
315 pdmR3DevHlp_STAMRegisterF,
316 pdmR3DevHlp_STAMRegisterV,
317 pdmR3DevHlp_RTCRegister,
318 pdmR3DevHlp_PDMQueueCreate,
319 pdmR3DevHlp_CritSectInit,
320 pdmR3DevHlp_UTCNow,
321 pdmR3DevHlp_PDMThreadCreate,
322 pdmR3DevHlp_PhysGCPtr2GCPhys,
323 0,
324 0,
325 0,
326 0,
327 0,
328 0,
329 0,
330 0,
331 pdmR3DevHlp_GetVM,
332 pdmR3DevHlp_PCIBusRegister,
333 pdmR3DevHlp_PICRegister,
334 pdmR3DevHlp_APICRegister,
335 pdmR3DevHlp_IOAPICRegister,
336 pdmR3DevHlp_DMACRegister,
337 pdmR3DevHlp_PhysRead,
338 pdmR3DevHlp_PhysWrite,
339 pdmR3DevHlp_PhysReadGCVirt,
340 pdmR3DevHlp_PhysWriteGCVirt,
341 pdmR3DevHlp_PhysReserve,
342 pdmR3DevHlp_Untrusted_Obsolete_Phys2HCVirt,
343 pdmR3DevHlp_Untrusted_Obsolete_PhysGCPtr2HCPtr,
344 pdmR3DevHlp_A20IsEnabled,
345 pdmR3DevHlp_A20Set,
346 pdmR3DevHlp_VMReset,
347 pdmR3DevHlp_VMSuspend,
348 pdmR3DevHlp_VMPowerOff,
349 pdmR3DevHlp_LockVM,
350 pdmR3DevHlp_UnlockVM,
351 pdmR3DevHlp_AssertVMLock,
352 pdmR3DevHlp_DMARegister,
353 pdmR3DevHlp_DMAReadMemory,
354 pdmR3DevHlp_DMAWriteMemory,
355 pdmR3DevHlp_DMASetDREQ,
356 pdmR3DevHlp_DMAGetChannelMode,
357 pdmR3DevHlp_DMASchedule,
358 pdmR3DevHlp_CMOSWrite,
359 pdmR3DevHlp_CMOSRead,
360 pdmR3DevHlp_GetCpuId,
361 pdmR3DevHlp_ROMProtectShadow,
362 PDM_DEVHLP_VERSION /* the end */
363};
364
365
366/**
367 * The device helper structure for non-trusted devices.
368 */
369const PDMDEVHLP g_pdmR3DevHlpUnTrusted =
370{
371 PDM_DEVHLP_VERSION,
372 pdmR3DevHlp_IOPortRegister,
373 pdmR3DevHlp_IOPortRegisterGC,
374 pdmR3DevHlp_IOPortRegisterR0,
375 pdmR3DevHlp_IOPortDeregister,
376 pdmR3DevHlp_MMIORegister,
377 pdmR3DevHlp_MMIORegisterGC,
378 pdmR3DevHlp_MMIORegisterR0,
379 pdmR3DevHlp_MMIODeregister,
380 pdmR3DevHlp_ROMRegister,
381 pdmR3DevHlp_SSMRegister,
382 pdmR3DevHlp_TMTimerCreate,
383 pdmR3DevHlp_TMTimerCreateExternal,
384 pdmR3DevHlp_PCIRegister,
385 pdmR3DevHlp_PCIIORegionRegister,
386 pdmR3DevHlp_PCISetConfigCallbacks,
387 pdmR3DevHlp_PCISetIrq,
388 pdmR3DevHlp_PCISetIrqNoWait,
389 pdmR3DevHlp_ISASetIrq,
390 pdmR3DevHlp_ISASetIrqNoWait,
391 pdmR3DevHlp_DriverAttach,
392 pdmR3DevHlp_MMHeapAlloc,
393 pdmR3DevHlp_MMHeapAllocZ,
394 pdmR3DevHlp_MMHeapFree,
395 pdmR3DevHlp_VMSetError,
396 pdmR3DevHlp_VMSetErrorV,
397 pdmR3DevHlp_VMSetRuntimeError,
398 pdmR3DevHlp_VMSetRuntimeErrorV,
399 pdmR3DevHlp_AssertEMT,
400 pdmR3DevHlp_AssertOther,
401 pdmR3DevHlp_DBGFStopV,
402 pdmR3DevHlp_DBGFInfoRegister,
403 pdmR3DevHlp_STAMRegister,
404 pdmR3DevHlp_STAMRegisterF,
405 pdmR3DevHlp_STAMRegisterV,
406 pdmR3DevHlp_RTCRegister,
407 pdmR3DevHlp_PDMQueueCreate,
408 pdmR3DevHlp_CritSectInit,
409 pdmR3DevHlp_UTCNow,
410 pdmR3DevHlp_PDMThreadCreate,
411 pdmR3DevHlp_PhysGCPtr2GCPhys,
412 0,
413 0,
414 0,
415 0,
416 0,
417 0,
418 0,
419 0,
420 pdmR3DevHlp_Untrusted_GetVM,
421 pdmR3DevHlp_Untrusted_PCIBusRegister,
422 pdmR3DevHlp_Untrusted_PICRegister,
423 pdmR3DevHlp_Untrusted_APICRegister,
424 pdmR3DevHlp_Untrusted_IOAPICRegister,
425 pdmR3DevHlp_Untrusted_DMACRegister,
426 pdmR3DevHlp_Untrusted_PhysRead,
427 pdmR3DevHlp_Untrusted_PhysWrite,
428 pdmR3DevHlp_Untrusted_PhysReadGCVirt,
429 pdmR3DevHlp_Untrusted_PhysWriteGCVirt,
430 pdmR3DevHlp_Untrusted_PhysReserve,
431 pdmR3DevHlp_Untrusted_Obsolete_Phys2HCVirt,
432 pdmR3DevHlp_Untrusted_Obsolete_PhysGCPtr2HCPtr,
433 pdmR3DevHlp_Untrusted_A20IsEnabled,
434 pdmR3DevHlp_Untrusted_A20Set,
435 pdmR3DevHlp_Untrusted_VMReset,
436 pdmR3DevHlp_Untrusted_VMSuspend,
437 pdmR3DevHlp_Untrusted_VMPowerOff,
438 pdmR3DevHlp_Untrusted_LockVM,
439 pdmR3DevHlp_Untrusted_UnlockVM,
440 pdmR3DevHlp_Untrusted_AssertVMLock,
441 pdmR3DevHlp_Untrusted_DMARegister,
442 pdmR3DevHlp_Untrusted_DMAReadMemory,
443 pdmR3DevHlp_Untrusted_DMAWriteMemory,
444 pdmR3DevHlp_Untrusted_DMASetDREQ,
445 pdmR3DevHlp_Untrusted_DMAGetChannelMode,
446 pdmR3DevHlp_Untrusted_DMASchedule,
447 pdmR3DevHlp_Untrusted_CMOSWrite,
448 pdmR3DevHlp_Untrusted_CMOSRead,
449 pdmR3DevHlp_Untrusted_QueryCPUId,
450 pdmR3DevHlp_Untrusted_ROMProtectShadow,
451 PDM_DEVHLP_VERSION /* the end */
452};
453
454
455/**
456 * PIC Device Helpers.
457 */
458const PDMPICHLPR3 g_pdmR3DevPicHlp =
459{
460 PDM_PICHLPR3_VERSION,
461 pdmR3PicHlp_SetInterruptFF,
462 pdmR3PicHlp_ClearInterruptFF,
463#ifdef VBOX_WITH_PDM_LOCK
464 pdmR3PicHlp_Lock,
465 pdmR3PicHlp_Unlock,
466#endif
467 pdmR3PicHlp_GetGCHelpers,
468 pdmR3PicHlp_GetR0Helpers,
469 PDM_PICHLPR3_VERSION /* the end */
470};
471
472
473/**
474 * APIC Device Helpers.
475 */
476const PDMAPICHLPR3 g_pdmR3DevApicHlp =
477{
478 PDM_APICHLPR3_VERSION,
479 pdmR3ApicHlp_SetInterruptFF,
480 pdmR3ApicHlp_ClearInterruptFF,
481 pdmR3ApicHlp_ChangeFeature,
482#ifdef VBOX_WITH_PDM_LOCK
483 pdmR3ApicHlp_Lock,
484 pdmR3ApicHlp_Unlock,
485#endif
486 pdmR3ApicHlp_GetGCHelpers,
487 pdmR3ApicHlp_GetR0Helpers,
488 PDM_APICHLPR3_VERSION /* the end */
489};
490
491
492/**
493 * I/O APIC Device Helpers.
494 */
495const PDMIOAPICHLPR3 g_pdmR3DevIoApicHlp =
496{
497 PDM_IOAPICHLPR3_VERSION,
498 pdmR3IoApicHlp_ApicBusDeliver,
499#ifdef VBOX_WITH_PDM_LOCK
500 pdmR3IoApicHlp_Lock,
501 pdmR3IoApicHlp_Unlock,
502#endif
503 pdmR3IoApicHlp_GetGCHelpers,
504 pdmR3IoApicHlp_GetR0Helpers,
505 PDM_IOAPICHLPR3_VERSION /* the end */
506};
507
508
509/**
510 * PCI Bus Device Helpers.
511 */
512const PDMPCIHLPR3 g_pdmR3DevPciHlp =
513{
514 PDM_PCIHLPR3_VERSION,
515 pdmR3PciHlp_IsaSetIrq,
516 pdmR3PciHlp_IoApicSetIrq,
517#ifdef VBOX_WITH_PDM_LOCK
518 pdmR3PciHlp_Lock,
519 pdmR3PciHlp_Unlock,
520#endif
521 pdmR3PciHlp_GetGCHelpers,
522 pdmR3PciHlp_GetR0Helpers,
523 PDM_PCIHLPR3_VERSION, /* the end */
524};
525
526
527/**
528 * DMAC Device Helpers.
529 */
530const PDMDMACHLP g_pdmR3DevDmacHlp =
531{
532 PDM_DMACHLP_VERSION
533};
534
535
536/**
537 * RTC Device Helpers.
538 */
539const PDMRTCHLP g_pdmR3DevRtcHlp =
540{
541 PDM_RTCHLP_VERSION
542};
543
544
545/**
546 * This function will initialize the devices for this VM instance.
547 *
548 *
549 * First of all this mean loading the builtin device and letting them
550 * register themselves. Beyond that any additional device modules are
551 * loaded and called for registration.
552 *
553 * Then the device configuration is enumerated, the instantiation order
554 * is determined, and finally they are instantiated.
555 *
556 * After all device have been successfully instantiated the the primary
557 * PCI Bus device is called to emulate the PCI BIOS, i.e. making the
558 * resource assignments. If there is no PCI device, this step is of course
559 * skipped.
560 *
561 * Finally the init completion routines of the instantiated devices
562 * are called.
563 *
564 * @returns VBox status code.
565 * @param pVM VM Handle.
566 */
567int pdmR3DevInit(PVM pVM)
568{
569 LogFlow(("pdmR3DevInit:\n"));
570
571 AssertRelease(!(RT_OFFSETOF(PDMDEVINS, achInstanceData) & 15));
572 AssertRelease(sizeof(pVM->pdm.s.pDevInstances->Internal.s) <= sizeof(pVM->pdm.s.pDevInstances->Internal.padding));
573
574 /*
575 * Get the GC & R0 devhlps and create the devhlp R3 task queue.
576 */
577 GCPTRTYPE(PCPDMDEVHLPGC) pDevHlpGC;
578 int rc = PDMR3GetSymbolGC(pVM, NULL, "g_pdmGCDevHlp", &pDevHlpGC);
579 AssertReleaseRCReturn(rc, rc);
580
581 R0PTRTYPE(PCPDMDEVHLPR0) pDevHlpR0;
582 rc = PDMR3GetSymbolR0(pVM, NULL, "g_pdmR0DevHlp", &pDevHlpR0);
583 AssertReleaseRCReturn(rc, rc);
584
585 rc = PDMR3QueueCreateInternal(pVM, sizeof(PDMDEVHLPTASK), 8, 0, pdmR3DevHlpQueueConsumer, true, &pVM->pdm.s.pDevHlpQueueHC);
586 AssertRCReturn(rc, rc);
587 pVM->pdm.s.pDevHlpQueueGC = PDMQueueGCPtr(pVM->pdm.s.pDevHlpQueueHC);
588
589
590 /*
591 * Initialize the callback structure.
592 */
593 PDMDEVREGCBINT RegCB;
594 RegCB.Core.u32Version = PDM_DEVREG_CB_VERSION;
595 RegCB.Core.pfnRegister = pdmR3DevReg_Register;
596 RegCB.Core.pfnMMHeapAlloc = pdmR3DevReg_MMHeapAlloc;
597 RegCB.pVM = pVM;
598
599 /*
600 * Load the builtin module
601 */
602 PCFGMNODE pDevicesNode = CFGMR3GetChild(CFGMR3GetRoot(pVM), "PDM/Devices");
603 bool fLoadBuiltin;
604 rc = CFGMR3QueryBool(pDevicesNode, "LoadBuiltin", &fLoadBuiltin);
605 if (rc == VERR_CFGM_VALUE_NOT_FOUND || rc == VERR_CFGM_NO_PARENT)
606 fLoadBuiltin = true;
607 else if (VBOX_FAILURE(rc))
608 {
609 AssertMsgFailed(("Configuration error: Querying boolean \"LoadBuiltin\" failed with %Vrc\n", rc));
610 return rc;
611 }
612 if (fLoadBuiltin)
613 {
614 /* make filename */
615 char *pszFilename = pdmR3FileR3("VBoxDD", /* fShared = */ true);
616 if (!pszFilename)
617 return VERR_NO_TMP_MEMORY;
618 rc = pdmR3DevLoad(pVM, &RegCB, pszFilename, "VBoxDD");
619 RTMemTmpFree(pszFilename);
620 if (VBOX_FAILURE(rc))
621 return rc;
622
623 /* make filename */
624 pszFilename = pdmR3FileR3("VBoxDD2", /* fShared = */ true);
625 if (!pszFilename)
626 return VERR_NO_TMP_MEMORY;
627 rc = pdmR3DevLoad(pVM, &RegCB, pszFilename, "VBoxDD2");
628 RTMemTmpFree(pszFilename);
629 if (VBOX_FAILURE(rc))
630 return rc;
631 }
632
633 /*
634 * Load additional device modules.
635 */
636 PCFGMNODE pCur;
637 for (pCur = CFGMR3GetFirstChild(pDevicesNode); pCur; pCur = CFGMR3GetNextChild(pCur))
638 {
639 /*
640 * Get the name and path.
641 */
642 char szName[PDMMOD_NAME_LEN];
643 rc = CFGMR3GetName(pCur, &szName[0], sizeof(szName));
644 if (rc == VERR_CFGM_NOT_ENOUGH_SPACE)
645 {
646 AssertMsgFailed(("configuration error: The module name is too long, cchName=%d.\n", CFGMR3GetNameLen(pCur)));
647 return VERR_PDM_MODULE_NAME_TOO_LONG;
648 }
649 else if (VBOX_FAILURE(rc))
650 {
651 AssertMsgFailed(("CFGMR3GetName -> %Vrc.\n", rc));
652 return rc;
653 }
654
655 /* the path is optional, if no path the module name + path is used. */
656 char szFilename[RTPATH_MAX];
657 rc = CFGMR3QueryString(pCur, "Path", &szFilename[0], sizeof(szFilename));
658 if (rc == VERR_CFGM_VALUE_NOT_FOUND)
659 strcpy(szFilename, szName);
660 else if (VBOX_FAILURE(rc))
661 {
662 AssertMsgFailed(("configuration error: Failure to query the module path, rc=%Vrc.\n", rc));
663 return rc;
664 }
665
666 /* prepend path? */
667 if (!RTPathHavePath(szFilename))
668 {
669 char *psz = pdmR3FileR3(szFilename);
670 if (!psz)
671 return VERR_NO_TMP_MEMORY;
672 size_t cch = strlen(psz) + 1;
673 if (cch > sizeof(szFilename))
674 {
675 RTMemTmpFree(psz);
676 AssertMsgFailed(("Filename too long! cch=%d '%s'\n", cch, psz));
677 return VERR_FILENAME_TOO_LONG;
678 }
679 memcpy(szFilename, psz, cch);
680 RTMemTmpFree(psz);
681 }
682
683 /*
684 * Load the module and register it's devices.
685 */
686 rc = pdmR3DevLoad(pVM, &RegCB, szFilename, szName);
687 if (VBOX_FAILURE(rc))
688 return rc;
689 }
690
691#ifdef VBOX_WITH_USB
692 /* ditto for USB Devices. */
693 rc = pdmR3UsbLoadModules(pVM);
694 if (RT_FAILURE(rc))
695 return rc;
696#endif
697
698
699 /*
700 *
701 * Enumerate the device instance configurations
702 * and come up with a instantiation order.
703 *
704 */
705 /* Switch to /Devices, which contains the device instantiations. */
706 pDevicesNode = CFGMR3GetChild(CFGMR3GetRoot(pVM), "Devices");
707
708 /*
709 * Count the device instances.
710 */
711 PCFGMNODE pInstanceNode;
712 unsigned cDevs = 0;
713 for (pCur = CFGMR3GetFirstChild(pDevicesNode); pCur; pCur = CFGMR3GetNextChild(pCur))
714 for (pInstanceNode = CFGMR3GetFirstChild(pCur); pInstanceNode; pInstanceNode = CFGMR3GetNextChild(pInstanceNode))
715 cDevs++;
716 if (!cDevs)
717 {
718 Log(("PDM: No devices were configured!\n"));
719 return VINF_SUCCESS;
720 }
721 Log2(("PDM: cDevs=%d!\n", cDevs));
722
723 /*
724 * Collect info on each device instance.
725 */
726 struct DEVORDER
727 {
728 /** Configuration node. */
729 PCFGMNODE pNode;
730 /** Pointer to device. */
731 PPDMDEV pDev;
732 /** Init order. */
733 uint32_t u32Order;
734 /** VBox instance number. */
735 uint32_t iInstance;
736 } *paDevs = (struct DEVORDER *)alloca(sizeof(paDevs[0]) * (cDevs + 1)); /* (One extra for swapping) */
737 Assert(paDevs);
738 unsigned i = 0;
739 for (pCur = CFGMR3GetFirstChild(pDevicesNode); pCur; pCur = CFGMR3GetNextChild(pCur))
740 {
741 /* Get the device name. */
742 char szName[sizeof(paDevs[0].pDev->pDevReg->szDeviceName)];
743 rc = CFGMR3GetName(pCur, szName, sizeof(szName));
744 AssertMsgRCReturn(rc, ("Configuration error: device name is too long (or something)! rc=%Vrc\n", rc), rc);
745
746 /* Find the device. */
747 PPDMDEV pDev = pdmR3DevLookup(pVM, szName);
748 AssertMsgReturn(pDev, ("Configuration error: device '%s' not found!\n", szName), VERR_PDM_DEVICE_NOT_FOUND);
749
750 /* Configured priority or use default based on device class? */
751 uint32_t u32Order;
752 rc = CFGMR3QueryU32(pCur, "Priority", &u32Order);
753 if (rc == VERR_CFGM_VALUE_NOT_FOUND)
754 {
755 uint32_t u32 = pDev->pDevReg->fClass;
756 for (u32Order = 1; !(u32 & u32Order); u32Order <<= 1)
757 /* nop */;
758 }
759 else
760 AssertMsgRCReturn(rc, ("Configuration error: reading \"Priority\" for the '%s' device failed rc=%Vrc!\n", szName, rc), rc);
761
762 /* Enumerate the device instances. */
763 for (pInstanceNode = CFGMR3GetFirstChild(pCur); pInstanceNode; pInstanceNode = CFGMR3GetNextChild(pInstanceNode))
764 {
765 paDevs[i].pNode = pInstanceNode;
766 paDevs[i].pDev = pDev;
767 paDevs[i].u32Order = u32Order;
768
769 /* Get the instance number. */
770 char szInstance[32];
771 rc = CFGMR3GetName(pInstanceNode, szInstance, sizeof(szInstance));
772 AssertMsgRCReturn(rc, ("Configuration error: instance name is too long (or something)! rc=%Vrc\n", rc), rc);
773 char *pszNext = NULL;
774 rc = RTStrToUInt32Ex(szInstance, &pszNext, 0, &paDevs[i].iInstance);
775 AssertMsgRCReturn(rc, ("Configuration error: RTStrToInt32Ex failed on the instance name '%s'! rc=%Vrc\n", szInstance, rc), rc);
776 AssertMsgReturn(!*pszNext, ("Configuration error: the instance name '%s' isn't all digits. (%s)\n", szInstance, pszNext), VERR_INVALID_PARAMETER);
777
778 /* next instance */
779 i++;
780 }
781 } /* devices */
782 Assert(i == cDevs);
783
784 /*
785 * Sort the device array ascending on u32Order. (bubble)
786 */
787 unsigned c = cDevs - 1;
788 while (c)
789 {
790 unsigned j = 0;
791 for (i = 0; i < c; i++)
792 if (paDevs[i].u32Order > paDevs[i + 1].u32Order)
793 {
794 paDevs[cDevs] = paDevs[i + 1];
795 paDevs[i + 1] = paDevs[i];
796 paDevs[i] = paDevs[cDevs];
797 j = i;
798 }
799 c = j;
800 }
801
802
803 /*
804 *
805 * Instantiate the devices.
806 *
807 */
808 for (i = 0; i < cDevs; i++)
809 {
810 /*
811 * Gather a bit of config.
812 */
813 /* trusted */
814 bool fTrusted;
815 rc = CFGMR3QueryBool(paDevs[i].pNode, "Trusted", &fTrusted);
816 if (rc == VERR_CFGM_VALUE_NOT_FOUND)
817 fTrusted = false;
818 else if (VBOX_FAILURE(rc))
819 {
820 AssertMsgFailed(("configuration error: failed to query boolean \"Trusted\", rc=%Vrc\n", rc));
821 return rc;
822 }
823 /* config node */
824 PCFGMNODE pConfigNode = CFGMR3GetChild(paDevs[i].pNode, "Config");
825 if (!pConfigNode)
826 {
827 rc = CFGMR3InsertNode(paDevs[i].pNode, "Config", &pConfigNode);
828 if (VBOX_FAILURE(rc))
829 {
830 AssertMsgFailed(("Failed to create Config node! rc=%Vrc\n", rc));
831 return rc;
832 }
833 }
834 CFGMR3SetRestrictedRoot(pConfigNode);
835
836 /*
837 * Allocate the device instance.
838 */
839 size_t cb = RT_OFFSETOF(PDMDEVINS, achInstanceData[paDevs[i].pDev->pDevReg->cbInstance]);
840 cb = RT_ALIGN_Z(cb, 16);
841 PPDMDEVINS pDevIns;
842 if (paDevs[i].pDev->pDevReg->fFlags & (PDM_DEVREG_FLAGS_GC | PDM_DEVREG_FLAGS_R0))
843 rc = MMR3HyperAllocOnceNoRel(pVM, cb, 0, MM_TAG_PDM_DEVICE, (void **)&pDevIns);
844 else
845 rc = MMR3HeapAllocZEx(pVM, MM_TAG_PDM_DEVICE, cb, (void **)&pDevIns);
846 if (VBOX_FAILURE(rc))
847 {
848 AssertMsgFailed(("Failed to allocate %d bytes of instance data for device '%s'. rc=%Vrc\n",
849 cb, paDevs[i].pDev->pDevReg->szDeviceName, rc));
850 return rc;
851 }
852
853 /*
854 * Initialize it.
855 */
856 pDevIns->u32Version = PDM_DEVINS_VERSION;
857 //pDevIns->Internal.s.pNextHC = NULL;
858 //pDevIns->Internal.s.pPerDeviceNextHC = NULL;
859 pDevIns->Internal.s.pDevHC = paDevs[i].pDev;
860 pDevIns->Internal.s.pVMHC = pVM;
861 pDevIns->Internal.s.pVMGC = pVM->pVMGC;
862 //pDevIns->Internal.s.pLunsHC = NULL;
863 pDevIns->Internal.s.pCfgHandle = paDevs[i].pNode;
864 //pDevIns->Internal.s.pPciDevice = NULL;
865 //pDevIns->Internal.s.pPciBus = NULL; /** @todo pci bus selection. (in 2008 perhaps) */
866 pDevIns->pDevHlp = fTrusted ? &g_pdmR3DevHlpTrusted : &g_pdmR3DevHlpUnTrusted;
867 pDevIns->pDevHlpGC = pDevHlpGC;
868 pDevIns->pDevHlpR0 = pDevHlpR0;
869 pDevIns->pDevReg = paDevs[i].pDev->pDevReg;
870 pDevIns->pCfgHandle = pConfigNode;
871 pDevIns->iInstance = paDevs[i].iInstance;
872 pDevIns->pvInstanceDataR3 = &pDevIns->achInstanceData[0];
873 pDevIns->pvInstanceDataGC = pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_GC
874 ? MMHyperHC2GC(pVM, pDevIns->pvInstanceDataR3) : 0;
875 pDevIns->pvInstanceDataR0 = pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0
876 ? MMHyperR3ToR0(pVM, pDevIns->pvInstanceDataR3) : 0;
877
878 /*
879 * Link it into all the lists.
880 */
881 /* The global instance FIFO. */
882 PPDMDEVINS pPrev1 = pVM->pdm.s.pDevInstances;
883 if (!pPrev1)
884 pVM->pdm.s.pDevInstances = pDevIns;
885 else
886 {
887 while (pPrev1->Internal.s.pNextHC)
888 pPrev1 = pPrev1->Internal.s.pNextHC;
889 pPrev1->Internal.s.pNextHC = pDevIns;
890 }
891
892 /* The per device instance FIFO. */
893 PPDMDEVINS pPrev2 = paDevs[i].pDev->pInstances;
894 if (!pPrev2)
895 paDevs[i].pDev->pInstances = pDevIns;
896 else
897 {
898 while (pPrev2->Internal.s.pPerDeviceNextHC)
899 pPrev2 = pPrev2->Internal.s.pPerDeviceNextHC;
900 pPrev2->Internal.s.pPerDeviceNextHC = pDevIns;
901 }
902
903 /*
904 * Call the constructor.
905 */
906 Log(("PDM: Constructing device '%s' instance %d...\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
907 rc = pDevIns->pDevReg->pfnConstruct(pDevIns, pDevIns->iInstance, pDevIns->pCfgHandle);
908 if (VBOX_FAILURE(rc))
909 {
910 NoDmik(AssertMsgFailed(("Failed to construct '%s'/%d! %Vra\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc)));
911 /* because we're damn lazy right now, we'll say that the destructor will be called even if the constructor fails. */
912 return rc;
913 }
914 } /* for device instances */
915
916#ifdef VBOX_WITH_USB
917 /* ditto for USB Devices. */
918 rc = pdmR3UsbInstantiateDevices(pVM);
919 if (RT_FAILURE(rc))
920 return rc;
921#endif
922
923
924 /*
925 *
926 * PCI BIOS Fake and Init Complete.
927 *
928 */
929 if (pVM->pdm.s.aPciBuses[0].pDevInsR3)
930 {
931 pdmLock(pVM);
932 rc = pVM->pdm.s.aPciBuses[0].pfnFakePCIBIOSR3(pVM->pdm.s.aPciBuses[0].pDevInsR3);
933 pdmUnlock(pVM);
934 if (VBOX_FAILURE(rc))
935 {
936 AssertMsgFailed(("PCI BIOS fake failed rc=%Vrc\n", rc));
937 return rc;
938 }
939 }
940
941 for (PPDMDEVINS pDevIns = pVM->pdm.s.pDevInstances; pDevIns; pDevIns = pDevIns->Internal.s.pNextHC)
942 {
943 if (pDevIns->pDevReg->pfnInitComplete)
944 {
945 rc = pDevIns->pDevReg->pfnInitComplete(pDevIns);
946 if (VBOX_FAILURE(rc))
947 {
948 AssertMsgFailed(("InitComplete on device '%s'/%d failed with rc=%Vrc\n",
949 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
950 return rc;
951 }
952 }
953 }
954
955#ifdef VBOX_WITH_USB
956 /* ditto for USB Devices. */
957 rc = pdmR3UsbVMInitComplete(pVM);
958 if (RT_FAILURE(rc))
959 return rc;
960#endif
961
962 LogFlow(("pdmR3DevInit: returns %Vrc\n", VINF_SUCCESS));
963 return VINF_SUCCESS;
964}
965
966
967/**
968 * Lookups a device structure by name.
969 * @internal
970 */
971PPDMDEV pdmR3DevLookup(PVM pVM, const char *pszName)
972{
973 RTUINT cchName = strlen(pszName);
974 for (PPDMDEV pDev = pVM->pdm.s.pDevs; pDev; pDev = pDev->pNext)
975 if ( pDev->cchName == cchName
976 && !strcmp(pDev->pDevReg->szDeviceName, pszName))
977 return pDev;
978 return NULL;
979}
980
981
982/**
983 * Loads one device module and call the registration entry point.
984 *
985 * @returns VBox status code.
986 * @param pVM VM handle.
987 * @param pRegCB The registration callback stuff.
988 * @param pszFilename Module filename.
989 * @param pszName Module name.
990 */
991static int pdmR3DevLoad(PVM pVM, PPDMDEVREGCBINT pRegCB, const char *pszFilename, const char *pszName)
992{
993 /*
994 * Load it.
995 */
996 int rc = pdmR3LoadR3U(pVM->pUVM, pszFilename, pszName);
997 if (VBOX_SUCCESS(rc))
998 {
999 /*
1000 * Get the registration export and call it.
1001 */
1002 FNPDMVBOXDEVICESREGISTER *pfnVBoxDevicesRegister;
1003 rc = PDMR3GetSymbolR3(pVM, pszName, "VBoxDevicesRegister", (void **)&pfnVBoxDevicesRegister);
1004 if (VBOX_SUCCESS(rc))
1005 {
1006 Log(("PDM: Calling VBoxDevicesRegister (%p) of %s (%s)\n", pfnVBoxDevicesRegister, pszName, pszFilename));
1007 rc = pfnVBoxDevicesRegister(&pRegCB->Core, VBOX_VERSION);
1008 if (VBOX_SUCCESS(rc))
1009 Log(("PDM: Successfully loaded device module %s (%s).\n", pszName, pszFilename));
1010 else
1011 AssertMsgFailed(("VBoxDevicesRegister failed with rc=%Vrc for module %s (%s)\n", rc, pszName, pszFilename));
1012 }
1013 else
1014 {
1015 AssertMsgFailed(("Failed to locate 'VBoxDevicesRegister' in %s (%s) rc=%Vrc\n", pszName, pszFilename, rc));
1016 if (rc == VERR_SYMBOL_NOT_FOUND)
1017 rc = VERR_PDM_NO_REGISTRATION_EXPORT;
1018 }
1019 }
1020 else
1021 AssertMsgFailed(("Failed to load %s %s!\n", pszFilename, pszName));
1022 return rc;
1023}
1024
1025
1026
1027/**
1028 * Registers a device with the current VM instance.
1029 *
1030 * @returns VBox status code.
1031 * @param pCallbacks Pointer to the callback table.
1032 * @param pDevReg Pointer to the device registration record.
1033 * This data must be permanent and readonly.
1034 */
1035static DECLCALLBACK(int) pdmR3DevReg_Register(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pDevReg)
1036{
1037 /*
1038 * Validate the registration structure.
1039 */
1040 Assert(pDevReg);
1041 if (pDevReg->u32Version != PDM_DEVREG_VERSION)
1042 {
1043 AssertMsgFailed(("Unknown struct version %#x!\n", pDevReg->u32Version));
1044 return VERR_PDM_UNKNOWN_DEVREG_VERSION;
1045 }
1046 if ( !pDevReg->szDeviceName[0]
1047 || strlen(pDevReg->szDeviceName) >= sizeof(pDevReg->szDeviceName))
1048 {
1049 AssertMsgFailed(("Invalid name '%s'\n", pDevReg->szDeviceName));
1050 return VERR_PDM_INVALID_DEVICE_REGISTRATION;
1051 }
1052 if ( (pDevReg->fFlags & PDM_DEVREG_FLAGS_GC)
1053 && ( !pDevReg->szGCMod[0]
1054 || strlen(pDevReg->szGCMod) >= sizeof(pDevReg->szGCMod)))
1055 {
1056 AssertMsgFailed(("Invalid GC module name '%s' - (Device %s)\n", pDevReg->szGCMod, pDevReg->szDeviceName));
1057 return VERR_PDM_INVALID_DEVICE_REGISTRATION;
1058 }
1059 if ( (pDevReg->fFlags & PDM_DEVREG_FLAGS_R0)
1060 && ( !pDevReg->szR0Mod[0]
1061 || strlen(pDevReg->szR0Mod) >= sizeof(pDevReg->szR0Mod)))
1062 {
1063 AssertMsgFailed(("Invalid R0 module name '%s' - (Device %s)\n", pDevReg->szR0Mod, pDevReg->szDeviceName));
1064 return VERR_PDM_INVALID_DEVICE_REGISTRATION;
1065 }
1066 if ((pDevReg->fFlags & PDM_DEVREG_FLAGS_HOST_BITS_MASK) != PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT)
1067 {
1068 AssertMsgFailed(("Invalid host bits flags! fFlags=%#x (Device %s)\n", pDevReg->fFlags, pDevReg->szDeviceName));
1069 return VERR_PDM_INVALID_DEVICE_HOST_BITS;
1070 }
1071 if (!(pDevReg->fFlags & PDM_DEVREG_FLAGS_GUEST_BITS_MASK))
1072 {
1073 AssertMsgFailed(("Invalid guest bits flags! fFlags=%#x (Device %s)\n", pDevReg->fFlags, pDevReg->szDeviceName));
1074 return VERR_PDM_INVALID_DEVICE_REGISTRATION;
1075 }
1076 if (!pDevReg->fClass)
1077 {
1078 AssertMsgFailed(("No class! (Device %s)\n", pDevReg->szDeviceName));
1079 return VERR_PDM_INVALID_DEVICE_REGISTRATION;
1080 }
1081 if (pDevReg->cMaxInstances <= 0)
1082 {
1083 AssertMsgFailed(("Max instances %u! (Device %s)\n", pDevReg->cMaxInstances, pDevReg->szDeviceName));
1084 return VERR_PDM_INVALID_DEVICE_REGISTRATION;
1085 }
1086 if (pDevReg->cbInstance > (RTUINT)(pDevReg->fFlags & (PDM_DEVREG_FLAGS_GC | PDM_DEVREG_FLAGS_R0) ? 96 * _1K : _1M))
1087 {
1088 AssertMsgFailed(("Instance size %d bytes! (Device %s)\n", pDevReg->cbInstance, pDevReg->szDeviceName));
1089 return VERR_PDM_INVALID_DEVICE_REGISTRATION;
1090 }
1091 if (!pDevReg->pfnConstruct)
1092 {
1093 AssertMsgFailed(("No constructore! (Device %s)\n", pDevReg->szDeviceName));
1094 return VERR_PDM_INVALID_DEVICE_REGISTRATION;
1095 }
1096 /* Check matching guest bits last without any asserting. Enables trial and error registration. */
1097 if (!(pDevReg->fFlags & PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT))
1098 {
1099 Log(("PDM: Rejected device '%s' because it didn't match the guest bits.\n", pDevReg->szDeviceName));
1100 return VERR_PDM_INVALID_DEVICE_GUEST_BITS;
1101 }
1102
1103 /*
1104 * Check for duplicate and find FIFO entry at the same time.
1105 */
1106 PCPDMDEVREGCBINT pRegCB = (PCPDMDEVREGCBINT)pCallbacks;
1107 PPDMDEV pDevPrev = NULL;
1108 PPDMDEV pDev = pRegCB->pVM->pdm.s.pDevs;
1109 for (; pDev; pDevPrev = pDev, pDev = pDev->pNext)
1110 {
1111 if (!strcmp(pDev->pDevReg->szDeviceName, pDevReg->szDeviceName))
1112 {
1113 AssertMsgFailed(("Device '%s' already exists\n", pDevReg->szDeviceName));
1114 return VERR_PDM_DEVICE_NAME_CLASH;
1115 }
1116 }
1117
1118 /*
1119 * Allocate new device structure and insert it into the list.
1120 */
1121 pDev = (PPDMDEV)MMR3HeapAlloc(pRegCB->pVM, MM_TAG_PDM_DEVICE, sizeof(*pDev));
1122 if (pDev)
1123 {
1124 pDev->pNext = NULL;
1125 pDev->cInstances = 0;
1126 pDev->pInstances = NULL;
1127 pDev->pDevReg = pDevReg;
1128 pDev->cchName = strlen(pDevReg->szDeviceName);
1129
1130 if (pDevPrev)
1131 pDevPrev->pNext = pDev;
1132 else
1133 pRegCB->pVM->pdm.s.pDevs = pDev;
1134 Log(("PDM: Registered device '%s'\n", pDevReg->szDeviceName));
1135 return VINF_SUCCESS;
1136 }
1137 return VERR_NO_MEMORY;
1138}
1139
1140
1141/**
1142 * Allocate memory which is associated with current VM instance
1143 * and automatically freed on it's destruction.
1144 *
1145 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
1146 * @param pCallbacks Pointer to the callback table.
1147 * @param cb Number of bytes to allocate.
1148 */
1149static DECLCALLBACK(void *) pdmR3DevReg_MMHeapAlloc(PPDMDEVREGCB pCallbacks, size_t cb)
1150{
1151 Assert(pCallbacks);
1152 Assert(pCallbacks->u32Version == PDM_DEVREG_CB_VERSION);
1153 LogFlow(("pdmR3DevReg_MMHeapAlloc: cb=%#x\n", cb));
1154
1155 void *pv = MMR3HeapAlloc(((PPDMDEVREGCBINT)pCallbacks)->pVM, MM_TAG_PDM_DEVICE_USER, cb);
1156
1157 LogFlow(("pdmR3DevReg_MMHeapAlloc: returns %p\n", pv));
1158 return pv;
1159}
1160
1161
1162/**
1163 * Queue consumer callback for internal component.
1164 *
1165 * @returns Success indicator.
1166 * If false the item will not be removed and the flushing will stop.
1167 * @param pVM The VM handle.
1168 * @param pItem The item to consume. Upon return this item will be freed.
1169 */
1170static DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem)
1171{
1172 PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)pItem;
1173 LogFlow(("pdmR3DevHlpQueueConsumer: enmOp=%d pDevIns=%p\n", pTask->enmOp, pTask->pDevInsHC));
1174 switch (pTask->enmOp)
1175 {
1176 case PDMDEVHLPTASKOP_ISA_SET_IRQ:
1177 PDMIsaSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
1178 break;
1179
1180 case PDMDEVHLPTASKOP_PCI_SET_IRQ:
1181 pdmR3DevHlp_PCISetIrq(pTask->pDevInsHC, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
1182 break;
1183
1184 case PDMDEVHLPTASKOP_IOAPIC_SET_IRQ:
1185 PDMIoApicSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
1186 break;
1187
1188 default:
1189 AssertReleaseMsgFailed(("Invalid operation %d\n", pTask->enmOp));
1190 break;
1191 }
1192 return true;
1193}
1194
1195
1196/** @copydoc PDMDEVHLP::pfnIOPortRegister */
1197static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser, PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
1198 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
1199{
1200 PDMDEV_ASSERT_DEVINS(pDevIns);
1201 LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pfnOut=%p pfnIn=%p pfnOutStr=%p pfnInStr=%p p32_tszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
1202 Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc, pszDesc));
1203 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
1204
1205 int rc = IOMR3IOPortRegisterR3(pDevIns->Internal.s.pVMHC, pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
1206
1207 LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1208 return rc;
1209}
1210
1211
1212/** @copydoc PDMDEVHLP::pfnIOPortRegisterGC */
1213static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterGC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTGCPTR pvUser,
1214 const char *pszOut, const char *pszIn,
1215 const char *pszOutStr, const char *pszInStr, const char *pszDesc)
1216{
1217 PDMDEV_ASSERT_DEVINS(pDevIns);
1218 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
1219 LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
1220 Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
1221
1222 /*
1223 * Resolve the functions (one of the can be NULL).
1224 */
1225 int rc = VINF_SUCCESS;
1226 if ( pDevIns->pDevReg->szGCMod[0]
1227 && (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_GC))
1228 {
1229 RTGCPTR GCPtrIn = 0;
1230 if (pszIn)
1231 {
1232 rc = PDMR3GetSymbolGCLazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szGCMod, pszIn, &GCPtrIn);
1233 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pDevReg->szGCMod, pszIn));
1234 }
1235 RTGCPTR GCPtrOut = 0;
1236 if (pszOut && VBOX_SUCCESS(rc))
1237 {
1238 rc = PDMR3GetSymbolGCLazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szGCMod, pszOut, &GCPtrOut);
1239 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pDevReg->szGCMod, pszOut));
1240 }
1241 RTGCPTR GCPtrInStr = 0;
1242 if (pszInStr && VBOX_SUCCESS(rc))
1243 {
1244 rc = PDMR3GetSymbolGCLazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szGCMod, pszInStr, &GCPtrInStr);
1245 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pDevReg->szGCMod, pszInStr));
1246 }
1247 RTGCPTR GCPtrOutStr = 0;
1248 if (pszOutStr && VBOX_SUCCESS(rc))
1249 {
1250 rc = PDMR3GetSymbolGCLazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szGCMod, pszOutStr, &GCPtrOutStr);
1251 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pDevReg->szGCMod, pszOutStr));
1252 }
1253
1254 if (VBOX_SUCCESS(rc))
1255 rc = IOMIOPortRegisterGC(pDevIns->Internal.s.pVMHC, pDevIns, Port, cPorts, pvUser, GCPtrOut, GCPtrIn, GCPtrOutStr, GCPtrInStr, pszDesc);
1256 }
1257 else
1258 {
1259 AssertMsgFailed(("No GC module for this driver!\n"));
1260 rc = VERR_INVALID_PARAMETER;
1261 }
1262
1263 LogFlow(("pdmR3DevHlp_IOPortRegisterGC: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1264 return rc;
1265}
1266
1267
1268/** @copydoc PDMDEVHLP::pfnIOPortRegisterR0 */
1269static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
1270 const char *pszOut, const char *pszIn,
1271 const char *pszOutStr, const char *pszInStr, const char *pszDesc)
1272{
1273 PDMDEV_ASSERT_DEVINS(pDevIns);
1274 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
1275 LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
1276 Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
1277
1278 if (!HWACCMR3IsAllowed(pDevIns->Internal.s.pVMHC))
1279 return VINF_SUCCESS; /* NOP */
1280
1281 /*
1282 * Resolve the functions (one of the can be NULL).
1283 */
1284 int rc = VINF_SUCCESS;
1285 if ( pDevIns->pDevReg->szR0Mod[0]
1286 && (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
1287 {
1288 R0PTRTYPE(PFNIOMIOPORTIN) pfnR0PtrIn = 0;
1289 if (pszIn)
1290 {
1291 rc = PDMR3GetSymbolR0Lazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szR0Mod, pszIn, &pfnR0PtrIn);
1292 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pDevReg->szR0Mod, pszIn));
1293 }
1294 R0PTRTYPE(PFNIOMIOPORTOUT) pfnR0PtrOut = 0;
1295 if (pszOut && VBOX_SUCCESS(rc))
1296 {
1297 rc = PDMR3GetSymbolR0Lazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szR0Mod, pszOut, &pfnR0PtrOut);
1298 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pDevReg->szR0Mod, pszOut));
1299 }
1300 R0PTRTYPE(PFNIOMIOPORTINSTRING) pfnR0PtrInStr = 0;
1301 if (pszInStr && VBOX_SUCCESS(rc))
1302 {
1303 rc = PDMR3GetSymbolR0Lazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szR0Mod, pszInStr, &pfnR0PtrInStr);
1304 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pDevReg->szR0Mod, pszInStr));
1305 }
1306 R0PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnR0PtrOutStr = 0;
1307 if (pszOutStr && VBOX_SUCCESS(rc))
1308 {
1309 rc = PDMR3GetSymbolR0Lazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szR0Mod, pszOutStr, &pfnR0PtrOutStr);
1310 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pDevReg->szR0Mod, pszOutStr));
1311 }
1312
1313 if (VBOX_SUCCESS(rc))
1314 rc = IOMIOPortRegisterR0(pDevIns->Internal.s.pVMHC, pDevIns, Port, cPorts, pvUser, pfnR0PtrOut, pfnR0PtrIn, pfnR0PtrOutStr, pfnR0PtrInStr, pszDesc);
1315 }
1316 else
1317 {
1318 AssertMsgFailed(("No R0 module for this driver!\n"));
1319 rc = VERR_INVALID_PARAMETER;
1320 }
1321
1322 LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1323 return rc;
1324}
1325
1326
1327/** @copydoc PDMDEVHLP::pfnIOPortDeregister */
1328static DECLCALLBACK(int) pdmR3DevHlp_IOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts)
1329{
1330 PDMDEV_ASSERT_DEVINS(pDevIns);
1331 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
1332 LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: Port=%#x cPorts=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
1333 Port, cPorts));
1334
1335 int rc = IOMR3IOPortDeregister(pDevIns->Internal.s.pVMHC, pDevIns, Port, cPorts);
1336
1337 LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1338 return rc;
1339}
1340
1341
1342/** @copydoc PDMDEVHLP::pfnMMIORegister */
1343static DECLCALLBACK(int) pdmR3DevHlp_MMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
1344 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
1345 const char *pszDesc)
1346{
1347 PDMDEV_ASSERT_DEVINS(pDevIns);
1348 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
1349 LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: GCPhysStart=%VGp cbRange=%#x pvUser=%p pfnWrite=%p pfnRead=%p pfnFill=%p pszDesc=%p:{%s}\n",
1350 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc, pszDesc));
1351
1352 int rc = IOMR3MMIORegisterR3(pDevIns->Internal.s.pVMHC, pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
1353
1354 LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1355 return rc;
1356}
1357
1358
1359/** @copydoc PDMDEVHLP::pfnMMIORegisterGC */
1360static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterGC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
1361 const char *pszWrite, const char *pszRead, const char *pszFill,
1362 const char *pszDesc)
1363{
1364 PDMDEV_ASSERT_DEVINS(pDevIns);
1365 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
1366 LogFlow(("pdmR3DevHlp_MMIORegisterGC: caller='%s'/%d: GCPhysStart=%VGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s} pszDesc=%p:{%s}\n",
1367 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill, pszDesc, pszDesc));
1368
1369 /*
1370 * Resolve the functions.
1371 * Not all function have to present, leave it to IOM to enforce this.
1372 */
1373 int rc = VINF_SUCCESS;
1374 if ( pDevIns->pDevReg->szGCMod[0]
1375 && (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_GC))
1376 {
1377 RTGCPTR GCPtrWrite = 0;
1378 if (pszWrite)
1379 rc = PDMR3GetSymbolGCLazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szGCMod, pszWrite, &GCPtrWrite);
1380 RTGCPTR GCPtrRead = 0;
1381 int rc2 = VINF_SUCCESS;
1382 if (pszRead)
1383 rc2 = PDMR3GetSymbolGCLazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szGCMod, pszRead, &GCPtrRead);
1384 RTGCPTR GCPtrFill = 0;
1385 int rc3 = VINF_SUCCESS;
1386 if (pszFill)
1387 rc3 = PDMR3GetSymbolGCLazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szGCMod, pszFill, &GCPtrFill);
1388 if (VBOX_SUCCESS(rc) && VBOX_SUCCESS(rc2) && VBOX_SUCCESS(rc3))
1389 rc = IOMMMIORegisterGC(pDevIns->Internal.s.pVMHC, pDevIns, GCPhysStart, cbRange, pvUser, GCPtrWrite, GCPtrRead, GCPtrFill, pszDesc);
1390 else
1391 {
1392 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pDevReg->szGCMod, pszWrite));
1393 AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pDevReg->szGCMod, pszRead));
1394 AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pDevReg->szGCMod, pszFill));
1395 if (VBOX_FAILURE(rc2) && VBOX_SUCCESS(rc))
1396 rc = rc2;
1397 if (VBOX_FAILURE(rc3) && VBOX_SUCCESS(rc))
1398 rc = rc3;
1399 }
1400 }
1401 else
1402 {
1403 AssertMsgFailed(("No GC module for this driver!\n"));
1404 rc = VERR_INVALID_PARAMETER;
1405 }
1406
1407 LogFlow(("pdmR3DevHlp_MMIORegisterGC: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1408 return rc;
1409}
1410
1411/** @copydoc PDMDEVHLP::pfnMMIORegisterR0 */
1412static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
1413 const char *pszWrite, const char *pszRead, const char *pszFill,
1414 const char *pszDesc)
1415{
1416 PDMDEV_ASSERT_DEVINS(pDevIns);
1417 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
1418 LogFlow(("pdmR3DevHlp_MMIORegisterHC: caller='%s'/%d: GCPhysStart=%VGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s} pszDesc=%p:{%s}\n",
1419 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill, pszDesc, pszDesc));
1420
1421 if (!HWACCMR3IsAllowed(pDevIns->Internal.s.pVMHC))
1422 return VINF_SUCCESS; /* NOP */
1423
1424 /*
1425 * Resolve the functions.
1426 * Not all function have to present, leave it to IOM to enforce this.
1427 */
1428 int rc = VINF_SUCCESS;
1429 if ( pDevIns->pDevReg->szR0Mod[0]
1430 && (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
1431 {
1432 R0PTRTYPE(PFNIOMMMIOWRITE) pfnR0PtrWrite = 0;
1433 if (pszWrite)
1434 rc = PDMR3GetSymbolR0Lazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szR0Mod, pszWrite, &pfnR0PtrWrite);
1435 R0PTRTYPE(PFNIOMMMIOREAD) pfnR0PtrRead = 0;
1436 int rc2 = VINF_SUCCESS;
1437 if (pszRead)
1438 rc2 = PDMR3GetSymbolR0Lazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szR0Mod, pszRead, &pfnR0PtrRead);
1439 R0PTRTYPE(PFNIOMMMIOFILL) pfnR0PtrFill = 0;
1440 int rc3 = VINF_SUCCESS;
1441 if (pszFill)
1442 rc3 = PDMR3GetSymbolR0Lazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szR0Mod, pszFill, &pfnR0PtrFill);
1443 if (VBOX_SUCCESS(rc) && VBOX_SUCCESS(rc2) && VBOX_SUCCESS(rc3))
1444 rc = IOMMMIORegisterR0(pDevIns->Internal.s.pVMHC, pDevIns, GCPhysStart, cbRange, pvUser, pfnR0PtrWrite, pfnR0PtrRead, pfnR0PtrFill, pszDesc);
1445 else
1446 {
1447 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pDevReg->szR0Mod, pszWrite));
1448 AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pDevReg->szR0Mod, pszRead));
1449 AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pDevReg->szR0Mod, pszFill));
1450 if (VBOX_FAILURE(rc2) && VBOX_SUCCESS(rc))
1451 rc = rc2;
1452 if (VBOX_FAILURE(rc3) && VBOX_SUCCESS(rc))
1453 rc = rc3;
1454 }
1455 }
1456 else
1457 {
1458 AssertMsgFailed(("No R0 module for this driver!\n"));
1459 rc = VERR_INVALID_PARAMETER;
1460 }
1461
1462 LogFlow(("pdmR3DevHlp_MMIORegisterR0: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1463 return rc;
1464}
1465
1466
1467/** @copydoc PDMDEVHLP::pfnMMIODeregister */
1468static DECLCALLBACK(int) pdmR3DevHlp_MMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
1469{
1470 PDMDEV_ASSERT_DEVINS(pDevIns);
1471 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
1472 LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: GCPhysStart=%VGp cbRange=%#x\n",
1473 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange));
1474
1475 int rc = IOMR3MMIODeregister(pDevIns->Internal.s.pVMHC, pDevIns, GCPhysStart, cbRange);
1476
1477 LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1478 return rc;
1479}
1480
1481
1482/** @copydoc PDMDEVHLP::pfnROMRegister */
1483static DECLCALLBACK(int) pdmR3DevHlp_ROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, bool fShadow, const char *pszDesc)
1484{
1485 PDMDEV_ASSERT_DEVINS(pDevIns);
1486 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
1487 LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: GCPhysStart=%VGp cbRange=%#x pvBinary=%p fShadow=%RTbool pszDesc=%p:{%s}\n",
1488 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvBinary, fShadow, pszDesc, pszDesc));
1489
1490 int rc = MMR3PhysRomRegister(pDevIns->Internal.s.pVMHC, pDevIns, GCPhysStart, cbRange, pvBinary, fShadow, pszDesc);
1491
1492 LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1493 return rc;
1494}
1495
1496
1497/** @copydoc PDMDEVHLP::pfnSSMRegister */
1498static DECLCALLBACK(int) pdmR3DevHlp_SSMRegister(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
1499 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
1500 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
1501{
1502 PDMDEV_ASSERT_DEVINS(pDevIns);
1503 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
1504 LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: pszName=%p:{%s} u32Instance=%#x u32Version=#x cbGuess=%#x pfnSavePrep=%p pfnSaveExec=%p pfnSaveDone=%p pszLoadPrep=%p pfnLoadExec=%p pfnLoaddone=%p\n",
1505 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pszName, pszName, u32Instance, u32Version, cbGuess, pfnSavePrep, pfnSaveExec, pfnSaveDone, pfnLoadPrep, pfnLoadExec, pfnLoadDone));
1506
1507 int rc = SSMR3Register(pDevIns->Internal.s.pVMHC, pDevIns, pszName, u32Instance, u32Version, cbGuess,
1508 pfnSavePrep, pfnSaveExec, pfnSaveDone,
1509 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
1510
1511 LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1512 return rc;
1513}
1514
1515
1516/** @copydoc PDMDEVHLP::pfnTMTimerCreate */
1517static DECLCALLBACK(int) pdmR3DevHlp_TMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERR3 ppTimer)
1518{
1519 PDMDEV_ASSERT_DEVINS(pDevIns);
1520 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
1521 LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: enmClock=%d pfnCallback=%p pszDesc=%p:{%s} ppTimer=%p\n",
1522 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, enmClock, pfnCallback, pszDesc, pszDesc, ppTimer));
1523
1524 int rc = TMR3TimerCreateDevice(pDevIns->Internal.s.pVMHC, pDevIns, enmClock, pfnCallback, pszDesc, ppTimer);
1525
1526 LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1527 return rc;
1528}
1529
1530
1531/** @copydoc PDMDEVHLP::pfnTMTimerCreateExternal */
1532static DECLCALLBACK(PTMTIMERR3) pdmR3DevHlp_TMTimerCreateExternal(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMEREXT pfnCallback, void *pvUser, const char *pszDesc)
1533{
1534 PDMDEV_ASSERT_DEVINS(pDevIns);
1535 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
1536
1537 return TMR3TimerCreateExternal(pDevIns->Internal.s.pVMHC, enmClock, pfnCallback, pvUser, pszDesc);
1538}
1539
1540/** @copydoc PDMDEVHLP::pfnPCIRegister */
1541static DECLCALLBACK(int) pdmR3DevHlp_PCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
1542{
1543 PDMDEV_ASSERT_DEVINS(pDevIns);
1544 PVM pVM = pDevIns->Internal.s.pVMHC;
1545 VM_ASSERT_EMT(pVM);
1546 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: pPciDev=%p:{.config={%#.256Vhxs}\n",
1547 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev, pPciDev->config));
1548
1549 /*
1550 * Validate input.
1551 */
1552 if (!pPciDev)
1553 {
1554 Assert(pPciDev);
1555 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Vrc (pPciDev)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1556 return VERR_INVALID_PARAMETER;
1557 }
1558 if (!pPciDev->config[0] && !pPciDev->config[1])
1559 {
1560 Assert(pPciDev->config[0] || pPciDev->config[1]);
1561 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Vrc (vendor)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1562 return VERR_INVALID_PARAMETER;
1563 }
1564 if (pDevIns->Internal.s.pPciDeviceHC)
1565 {
1566 /** @todo the PCI device vs. PDM device designed is a bit flawed if we have to
1567 * support a PDM device with multiple PCI devices. This might become a problem
1568 * when upgrading the chipset for instance...
1569 */
1570 AssertMsgFailed(("Only one PCI device per device is currently implemented!\n"));
1571 return VERR_INTERNAL_ERROR;
1572 }
1573
1574 /*
1575 * Choose the PCI bus for the device.
1576 * This is simple. If the device was configured for a particular bus, it'll
1577 * already have one. If not, we'll just take the first one.
1578 */
1579 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusHC;
1580 if (!pBus)
1581 pBus = pDevIns->Internal.s.pPciBusHC = &pVM->pdm.s.aPciBuses[0];
1582 int rc;
1583 if (pBus)
1584 {
1585 if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_GC)
1586 pDevIns->Internal.s.pPciBusGC = MMHyperHC2GC(pVM, pDevIns->Internal.s.pPciBusHC);
1587
1588 /*
1589 * Check the configuration for PCI device and function assignment.
1590 */
1591 int iDev = -1;
1592 uint8_t u8Device;
1593 rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIDeviceNo", &u8Device);
1594 if (VBOX_SUCCESS(rc))
1595 {
1596 if (u8Device > 31)
1597 {
1598 AssertMsgFailed(("Configuration error: PCIDeviceNo=%d, max is 31. (%s/%d)\n",
1599 u8Device, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1600 return VERR_INTERNAL_ERROR;
1601 }
1602
1603 uint8_t u8Function;
1604 rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIFunctionNo", &u8Function);
1605 if (VBOX_FAILURE(rc))
1606 {
1607 AssertMsgFailed(("Configuration error: PCIDeviceNo, but PCIFunctionNo query failed with rc=%Vrc (%s/%d)\n",
1608 rc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1609 return rc;
1610 }
1611 if (u8Function > 7)
1612 {
1613 AssertMsgFailed(("Configuration error: PCIFunctionNo=%d, max is 7. (%s/%d)\n",
1614 u8Function, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1615 return VERR_INTERNAL_ERROR;
1616 }
1617 iDev = (u8Device << 3) | u8Function;
1618 }
1619 else if (rc != VERR_CFGM_VALUE_NOT_FOUND)
1620 {
1621 AssertMsgFailed(("Configuration error: PCIDeviceNo query failed with rc=%Vrc (%s/%d)\n",
1622 rc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1623 return rc;
1624 }
1625
1626 /*
1627 * Call the pci bus device to do the actual registration.
1628 */
1629 pdmLock(pVM);
1630 rc = pBus->pfnRegisterR3(pBus->pDevInsR3, pPciDev, pDevIns->pDevReg->szDeviceName, iDev);
1631 pdmUnlock(pVM);
1632 if (VBOX_SUCCESS(rc))
1633 {
1634 pDevIns->Internal.s.pPciDeviceHC = pPciDev;
1635 if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_GC)
1636 pDevIns->Internal.s.pPciDeviceGC = MMHyperHC2GC(pVM, pPciDev);
1637 else
1638 pDevIns->Internal.s.pPciDeviceGC = 0;
1639 pPciDev->pDevIns = pDevIns;
1640 Log(("PDM: Registered device '%s'/%d as PCI device %d on bus %d\n",
1641 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev->devfn, pDevIns->Internal.s.pPciBusHC->iBus));
1642 }
1643 }
1644 else
1645 {
1646 AssertMsgFailed(("Configuration error: No PCI bus available. This could be related to init order too!\n"));
1647 rc = VERR_PDM_NO_PCI_BUS;
1648 }
1649
1650 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1651 return rc;
1652}
1653
1654
1655/** @copydoc PDMDEVHLP::pfnPCIIORegionRegister */
1656static DECLCALLBACK(int) pdmR3DevHlp_PCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
1657{
1658 PDMDEV_ASSERT_DEVINS(pDevIns);
1659 PVM pVM = pDevIns->Internal.s.pVMHC;
1660 VM_ASSERT_EMT(pVM);
1661 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: iRegion=%d cbRegion=%#x enmType=%d pfnCallback=%p\n",
1662 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, cbRegion, enmType, pfnCallback));
1663
1664 /*
1665 * Validate input.
1666 */
1667 if (iRegion < 0 || iRegion >= PCI_NUM_REGIONS)
1668 {
1669 Assert(iRegion >= 0 && iRegion < PCI_NUM_REGIONS);
1670 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Vrc (iRegion)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1671 return VERR_INVALID_PARAMETER;
1672 }
1673 switch (enmType)
1674 {
1675 case PCI_ADDRESS_SPACE_MEM:
1676 case PCI_ADDRESS_SPACE_IO:
1677 case PCI_ADDRESS_SPACE_MEM_PREFETCH:
1678 break;
1679 default:
1680 AssertMsgFailed(("enmType=%#x is unknown\n", enmType));
1681 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Vrc (enmType)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1682 return VERR_INVALID_PARAMETER;
1683 }
1684 if (!pfnCallback)
1685 {
1686 Assert(pfnCallback);
1687 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Vrc (callback)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1688 return VERR_INVALID_PARAMETER;
1689 }
1690 AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
1691
1692 /*
1693 * Must have a PCI device registered!
1694 */
1695 int rc;
1696 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceHC;
1697 if (pPciDev)
1698 {
1699 /*
1700 * We're currently restricted to page aligned MMIO regions.
1701 */
1702 if ( (enmType == PCI_ADDRESS_SPACE_MEM || enmType == PCI_ADDRESS_SPACE_MEM_PREFETCH)
1703 && cbRegion != RT_ALIGN_32(cbRegion, PAGE_SIZE))
1704 {
1705 Log(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: aligning cbRegion %#x -> %#x\n",
1706 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbRegion, RT_ALIGN_32(cbRegion, PAGE_SIZE)));
1707 cbRegion = RT_ALIGN_32(cbRegion, PAGE_SIZE);
1708 }
1709
1710 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusHC;
1711 Assert(pBus);
1712 pdmLock(pVM);
1713 rc = pBus->pfnIORegionRegisterR3(pBus->pDevInsR3, pPciDev, iRegion, cbRegion, enmType, pfnCallback);
1714 pdmUnlock(pVM);
1715 }
1716 else
1717 {
1718 AssertMsgFailed(("No PCI device registered!\n"));
1719 rc = VERR_PDM_NOT_PCI_DEVICE;
1720 }
1721
1722 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1723 return rc;
1724}
1725
1726
1727/** @copydoc PDMDEVHLP::pfnPCISetConfigCallbacks */
1728static DECLCALLBACK(void) pdmR3DevHlp_PCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
1729 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
1730{
1731 PDMDEV_ASSERT_DEVINS(pDevIns);
1732 PVM pVM = pDevIns->Internal.s.pVMHC;
1733 VM_ASSERT_EMT(pVM);
1734 LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: pPciDev=%p pfnRead=%p ppfnReadOld=%p pfnWrite=%p ppfnWriteOld=%p\n",
1735 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld));
1736
1737 /*
1738 * Validate input and resolve defaults.
1739 */
1740 AssertPtr(pfnRead);
1741 AssertPtr(pfnWrite);
1742 AssertPtrNull(ppfnReadOld);
1743 AssertPtrNull(ppfnWriteOld);
1744 AssertPtrNull(pPciDev);
1745
1746 if (!pPciDev)
1747 pPciDev = pDevIns->Internal.s.pPciDeviceHC;
1748 AssertReleaseMsg(pPciDev, ("You must register your device first!\n"));
1749 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusHC;
1750 AssertRelease(pBus);
1751 AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
1752
1753 /*
1754 * Do the job.
1755 */
1756 pdmLock(pVM);
1757 pBus->pfnSetConfigCallbacksR3(pBus->pDevInsR3, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
1758 pdmUnlock(pVM);
1759
1760 LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1761}
1762
1763
1764/** @copydoc PDMDEVHLP::pfnPCISetIrq */
1765static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1766{
1767 PDMDEV_ASSERT_DEVINS(pDevIns);
1768 LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iIrq, iLevel));
1769
1770 /*
1771 * Validate input.
1772 */
1773 /** @todo iIrq and iLevel checks. */
1774
1775 /*
1776 * Must have a PCI device registered!
1777 */
1778 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceHC;
1779 if (pPciDev)
1780 {
1781 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusHC; /** @todo the bus should be associated with the PCI device not the PDM device. */
1782 Assert(pBus);
1783#ifdef VBOX_WITH_PDM_LOCK
1784 PVM pVM = pDevIns->Internal.s.pVMHC;
1785 pdmLock(pVM);
1786 pBus->pfnSetIrqR3(pBus->pDevInsR3, pPciDev, iIrq, iLevel);
1787 pdmUnlock(pVM);
1788
1789#else /* !VBOX_WITH_PDM_LOCK */
1790 /*
1791 * For the convenience of the device we put no thread restriction on this interface.
1792 * That means we'll have to check which thread we're in and choose our path.
1793 */
1794 if (VM_IS_EMT(pDevIns->Internal.s.pVMHC) || VMMR3LockIsOwner(pDevIns->Internal.s.pVMHC))
1795 pBus->pfnSetIrqR3(pBus->pDevInsR3, pPciDev, iIrq, iLevel);
1796 else
1797 {
1798 Log(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: Requesting call in EMT...\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1799 PVMREQ pReq;
1800 int rc = VMR3ReqCallVoid(pDevIns->Internal.s.pVMHC, &pReq, RT_INDEFINITE_WAIT,
1801 (PFNRT)pBus->pfnSetIrqR3, 4, pBus->pDevInsR3, pPciDev, iIrq, iLevel);
1802 while (rc == VERR_TIMEOUT)
1803 rc = VMR3ReqWait(pReq, RT_INDEFINITE_WAIT);
1804 AssertReleaseRC(rc);
1805 VMR3ReqFree(pReq);
1806 }
1807#endif /* !VBOX_WITH_PDM_LOCK */
1808 }
1809 else
1810 AssertReleaseMsgFailed(("No PCI device registered!\n"));
1811
1812 LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1813}
1814
1815
1816/** @copydoc PDMDEVHLP::pfnPCISetIrqNoWait */
1817static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1818{
1819#ifdef VBOX_WITH_PDM_LOCK
1820 pdmR3DevHlp_PCISetIrq(pDevIns, iIrq, iLevel);
1821#else /* !VBOX_WITH_PDM_LOCK */
1822 PDMDEV_ASSERT_DEVINS(pDevIns);
1823 LogFlow(("pdmR3DevHlp_PCISetIrqNoWait: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iIrq, iLevel));
1824
1825 /*
1826 * Validate input.
1827 */
1828 /** @todo iIrq and iLevel checks. */
1829
1830 /*
1831 * Must have a PCI device registered!
1832 */
1833 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceHC;
1834 if (pPciDev)
1835 {
1836 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusHC;
1837 Assert(pBus);
1838
1839 /*
1840 * For the convenience of the device we put no thread restriction on this interface.
1841 * That means we'll have to check which thread we're in and choose our path.
1842 */
1843 if (VM_IS_EMT(pDevIns->Internal.s.pVMHC) || VMMR3LockIsOwner(pDevIns->Internal.s.pVMHC))
1844 pBus->pfnSetIrqR3(pBus->pDevInsR3, pPciDev, iIrq, iLevel);
1845 else
1846 {
1847 Log(("pdmR3DevHlp_PCISetIrqNoWait: caller='%s'/%d: Queueing call in EMT...\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1848 int rc = VMR3ReqCallEx(pDevIns->Internal.s.pVMHC, NULL, RT_INDEFINITE_WAIT, VMREQFLAGS_NO_WAIT | VMREQFLAGS_VOID,
1849 (PFNRT)pBus->pfnSetIrqR3, 4, pBus->pDevInsR3, pPciDev, iIrq, iLevel);
1850 AssertReleaseRC(rc);
1851 }
1852 }
1853 else
1854 AssertReleaseMsgFailed(("No PCI device registered!\n"));
1855
1856 LogFlow(("pdmR3DevHlp_PCISetIrqNoWait: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1857#endif /* !VBOX_WITH_PDM_LOCK */
1858}
1859
1860
1861/** @copydoc PDMDEVHLP::pfnISASetIrq */
1862static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1863{
1864 PDMDEV_ASSERT_DEVINS(pDevIns);
1865 LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iIrq, iLevel));
1866
1867 /*
1868 * Validate input.
1869 */
1870 /** @todo iIrq and iLevel checks. */
1871
1872 PVM pVM = pDevIns->Internal.s.pVMHC;
1873#ifdef VBOX_WITH_PDM_LOCK
1874 PDMIsaSetIrq(pVM, iIrq, iLevel); /* (The API takes the lock.) */
1875#else /* !VBOX_WITH_PDM_LOCK */
1876 if (VM_IS_EMT(pDevIns->Internal.s.pVMHC) || VMMR3LockIsOwner(pDevIns->Internal.s.pVMHC))
1877 PDMIsaSetIrq(pVM, iIrq, iLevel);
1878 else
1879 {
1880 Log(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: Requesting call in EMT...\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1881 PVMREQ pReq;
1882 int rc = VMR3ReqCallVoid(pDevIns->Internal.s.pVMHC, &pReq, RT_INDEFINITE_WAIT,
1883 (PFNRT)PDMIsaSetIrq, 3, pVM, iIrq, iLevel);
1884 while (rc == VERR_TIMEOUT)
1885 rc = VMR3ReqWait(pReq, RT_INDEFINITE_WAIT);
1886 AssertReleaseRC(rc);
1887 VMR3ReqFree(pReq);
1888 }
1889#endif /* !VBOX_WITH_PDM_LOCK */
1890
1891 LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1892}
1893
1894/** @copydoc PDMDEVHLP::pfnISASetIrqNoWait */
1895static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1896{
1897#ifdef VBOX_WITH_PDM_LOCK
1898 pdmR3DevHlp_ISASetIrq(pDevIns, iIrq, iLevel);
1899#else /* !VBOX_WITH_PDM_LOCK */
1900 PDMDEV_ASSERT_DEVINS(pDevIns);
1901 LogFlow(("pdmR3DevHlp_ISASetIrqNoWait: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iIrq, iLevel));
1902
1903 /*
1904 * Validate input.
1905 */
1906 /** @todo iIrq and iLevel checks. */
1907
1908 PVM pVM = pDevIns->Internal.s.pVMHC;
1909 /*
1910 * For the convenience of the device we put no thread restriction on this interface.
1911 * That means we'll have to check which thread we're in and choose our path.
1912 */
1913 if (VM_IS_EMT(pDevIns->Internal.s.pVMHC) || VMMR3LockIsOwner(pDevIns->Internal.s.pVMHC))
1914 PDMIsaSetIrq(pVM, iIrq, iLevel);
1915 else
1916 {
1917 Log(("pdmR3DevHlp_ISASetIrqNoWait: caller='%s'/%d: Queueing call in EMT...\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1918 int rc = VMR3ReqCallEx(pDevIns->Internal.s.pVMHC, NULL, 0, VMREQFLAGS_NO_WAIT | VMREQFLAGS_VOID,
1919 (PFNRT)PDMIsaSetIrq, 3, pVM, iIrq, iLevel);
1920 AssertReleaseRC(rc);
1921 }
1922
1923 LogFlow(("pdmR3DevHlp_ISASetIrqNoWait: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1924#endif /* !VBOX_WITH_PDM_LOCK */
1925}
1926
1927
1928/** @copydoc PDMDEVHLP::pfnDriverAttach */
1929static DECLCALLBACK(int) pdmR3DevHlp_DriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
1930{
1931 PDMDEV_ASSERT_DEVINS(pDevIns);
1932 PVM pVM = pDevIns->Internal.s.pVMHC;
1933 VM_ASSERT_EMT(pVM);
1934 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: iLun=%d pBaseInterface=%p ppBaseInterface=%p pszDesc=%p:{%s}\n",
1935 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iLun, pBaseInterface, ppBaseInterface, pszDesc, pszDesc));
1936
1937 /*
1938 * Lookup the LUN, it might already be registered.
1939 */
1940 PPDMLUN pLunPrev = NULL;
1941 PPDMLUN pLun = pDevIns->Internal.s.pLunsHC;
1942 for (; pLun; pLunPrev = pLun, pLun = pLun->pNext)
1943 if (pLun->iLun == iLun)
1944 break;
1945
1946 /*
1947 * Create the LUN if if wasn't found, else check if driver is already attached to it.
1948 */
1949 if (!pLun)
1950 {
1951 if ( !pBaseInterface
1952 || !pszDesc
1953 || !*pszDesc)
1954 {
1955 Assert(pBaseInterface);
1956 Assert(pszDesc || *pszDesc);
1957 return VERR_INVALID_PARAMETER;
1958 }
1959
1960 pLun = (PPDMLUN)MMR3HeapAlloc(pVM, MM_TAG_PDM_LUN, sizeof(*pLun));
1961 if (!pLun)
1962 return VERR_NO_MEMORY;
1963
1964 pLun->iLun = iLun;
1965 pLun->pNext = pLunPrev ? pLunPrev->pNext : NULL;
1966 pLun->pTop = NULL;
1967 pLun->pBottom = NULL;
1968 pLun->pDevIns = pDevIns;
1969 pLun->pszDesc = pszDesc;
1970 pLun->pBase = pBaseInterface;
1971 if (!pLunPrev)
1972 pDevIns->Internal.s.pLunsHC = pLun;
1973 else
1974 pLunPrev->pNext = pLun;
1975 Log(("pdmR3DevHlp_DriverAttach: Registered LUN#%d '%s' with device '%s'/%d.\n",
1976 iLun, pszDesc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1977 }
1978 else if (pLun->pTop)
1979 {
1980 AssertMsgFailed(("Already attached! The device should keep track of such things!\n"));
1981 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_PDM_DRIVER_ALREADY_ATTACHED));
1982 return VERR_PDM_DRIVER_ALREADY_ATTACHED;
1983 }
1984 Assert(pLun->pBase == pBaseInterface);
1985
1986
1987 /*
1988 * Get the attached driver configuration.
1989 */
1990 int rc;
1991 char szNode[48];
1992 RTStrPrintf(szNode, sizeof(szNode), "LUN#%d", iLun);
1993 PCFGMNODE pNode = CFGMR3GetChild(pDevIns->Internal.s.pCfgHandle, szNode);
1994 if (pNode)
1995 {
1996 char *pszName;
1997 rc = CFGMR3QueryStringAlloc(pNode, "Driver", &pszName);
1998 if (VBOX_SUCCESS(rc))
1999 {
2000 /*
2001 * Find the driver.
2002 */
2003 PPDMDRV pDrv = pdmR3DrvLookup(pVM, pszName);
2004 if (pDrv)
2005 {
2006 /* config node */
2007 PCFGMNODE pConfigNode = CFGMR3GetChild(pNode, "Config");
2008 if (!pConfigNode)
2009 rc = CFGMR3InsertNode(pNode, "Config", &pConfigNode);
2010 if (VBOX_SUCCESS(rc))
2011 {
2012 CFGMR3SetRestrictedRoot(pConfigNode);
2013
2014 /*
2015 * Allocate the driver instance.
2016 */
2017 size_t cb = RT_OFFSETOF(PDMDRVINS, achInstanceData[pDrv->pDrvReg->cbInstance]);
2018 cb = RT_ALIGN_Z(cb, 16);
2019 PPDMDRVINS pNew = (PPDMDRVINS)MMR3HeapAllocZ(pVM, MM_TAG_PDM_DRIVER, cb);
2020 if (pNew)
2021 {
2022 /*
2023 * Initialize the instance structure (declaration order).
2024 */
2025 pNew->u32Version = PDM_DRVINS_VERSION;
2026 //pNew->Internal.s.pUp = NULL;
2027 //pNew->Internal.s.pDown = NULL;
2028 pNew->Internal.s.pLun = pLun;
2029 pNew->Internal.s.pDrv = pDrv;
2030 pNew->Internal.s.pVM = pVM;
2031 //pNew->Internal.s.fDetaching = false;
2032 pNew->Internal.s.pCfgHandle = pNode;
2033 pNew->pDrvHlp = &g_pdmR3DrvHlp;
2034 pNew->pDrvReg = pDrv->pDrvReg;
2035 pNew->pCfgHandle = pConfigNode;
2036 pNew->iInstance = pDrv->cInstances++;
2037 pNew->pUpBase = pBaseInterface;
2038 //pNew->pDownBase = NULL;
2039 //pNew->IBase.pfnQueryInterface = NULL;
2040 pNew->pvInstanceData = &pNew->achInstanceData[0];
2041
2042 /*
2043 * Link with LUN and call the constructor.
2044 */
2045 pLun->pTop = pLun->pBottom = pNew;
2046 rc = pDrv->pDrvReg->pfnConstruct(pNew, pNew->pCfgHandle);
2047 if (VBOX_SUCCESS(rc))
2048 {
2049 MMR3HeapFree(pszName);
2050 *ppBaseInterface = &pNew->IBase;
2051 Log(("PDM: Attached driver '%s'/%d to LUN#%d on device '%s'/%d.\n",
2052 pDrv->pDrvReg->szDriverName, pNew->iInstance, iLun, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2053 LogFlow(("pdmR3DevHlp_DriverAttach: caller '%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
2054 /*
2055 * Might return != VINF_SUCCESS (e.g. VINF_NAT_DNS) */
2056 return rc;
2057 }
2058
2059 /*
2060 * Free the driver.
2061 */
2062 pLun->pTop = pLun->pBottom = NULL;
2063 ASMMemFill32(pNew, cb, 0xdeadd0d0);
2064 MMR3HeapFree(pNew);
2065 pDrv->cInstances--;
2066 }
2067 else
2068 {
2069 AssertMsgFailed(("Failed to allocate %d bytes for instantiating driver '%s'\n", cb, pszName));
2070 rc = VERR_NO_MEMORY;
2071 }
2072 }
2073 else
2074 AssertMsgFailed(("Failed to create Config node! rc=%Vrc\n", rc));
2075 }
2076 else
2077 {
2078 AssertMsgFailed(("Driver '%s' wasn't found!\n", pszName));
2079 rc = VERR_PDM_DRIVER_NOT_FOUND;
2080 }
2081 MMR3HeapFree(pszName);
2082 }
2083 else
2084 {
2085 AssertMsgFailed(("Query for string value of \"Driver\" -> %Vrc\n", rc));
2086 if (rc == VERR_CFGM_VALUE_NOT_FOUND)
2087 rc = VERR_PDM_CFG_MISSING_DRIVER_NAME;
2088 }
2089 }
2090 else
2091 rc = VERR_PDM_NO_ATTACHED_DRIVER;
2092
2093
2094 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2095 return rc;
2096}
2097
2098
2099/** @copydoc PDMDEVHLP::pfnMMHeapAlloc */
2100static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
2101{
2102 PDMDEV_ASSERT_DEVINS(pDevIns);
2103 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: cb=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cb));
2104
2105 void *pv = MMR3HeapAlloc(pDevIns->Internal.s.pVMHC, MM_TAG_PDM_DEVICE_USER, cb);
2106
2107 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
2108 return pv;
2109}
2110
2111
2112/** @copydoc PDMDEVHLP::pfnMMHeapAllocZ */
2113static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
2114{
2115 PDMDEV_ASSERT_DEVINS(pDevIns);
2116 LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: cb=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cb));
2117
2118 void *pv = MMR3HeapAllocZ(pDevIns->Internal.s.pVMHC, MM_TAG_PDM_DEVICE_USER, cb);
2119
2120 LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
2121 return pv;
2122}
2123
2124
2125/** @copydoc PDMDEVHLP::pfnMMHeapFree */
2126static DECLCALLBACK(void) pdmR3DevHlp_MMHeapFree(PPDMDEVINS pDevIns, void *pv)
2127{
2128 PDMDEV_ASSERT_DEVINS(pDevIns);
2129 LogFlow(("pdmR3DevHlp_MMHeapFree: caller='%s'/%d: pv=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
2130
2131 MMR3HeapFree(pv);
2132
2133 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2134}
2135
2136
2137/** @copydoc PDMDEVHLP::pfnVMSetError */
2138static DECLCALLBACK(int) pdmR3DevHlp_VMSetError(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
2139{
2140 PDMDEV_ASSERT_DEVINS(pDevIns);
2141 va_list args;
2142 va_start(args, pszFormat);
2143 int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMHC, rc, RT_SRC_POS_ARGS, pszFormat, args); Assert(rc2 == rc); NOREF(rc2);
2144 va_end(args);
2145 return rc;
2146}
2147
2148
2149/** @copydoc PDMDEVHLP::pfnVMSetErrorV */
2150static DECLCALLBACK(int) pdmR3DevHlp_VMSetErrorV(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va)
2151{
2152 PDMDEV_ASSERT_DEVINS(pDevIns);
2153 int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMHC, rc, RT_SRC_POS_ARGS, pszFormat, va); Assert(rc2 == rc); NOREF(rc2);
2154 return rc;
2155}
2156
2157
2158/** @copydoc PDMDEVHLP::pfnVMSetRuntimeError */
2159static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeError(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...)
2160{
2161 PDMDEV_ASSERT_DEVINS(pDevIns);
2162 va_list args;
2163 va_start(args, pszFormat);
2164 int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMHC, fFatal, pszErrorID, pszFormat, args);
2165 va_end(args);
2166 return rc;
2167}
2168
2169
2170/** @copydoc PDMDEVHLP::pfnVMSetRuntimeErrorV */
2171static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeErrorV(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va)
2172{
2173 PDMDEV_ASSERT_DEVINS(pDevIns);
2174 int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMHC, fFatal, pszErrorID, pszFormat, va);
2175 return rc;
2176}
2177
2178
2179/** @copydoc PDMDEVHLP::pfnAssertEMT */
2180static DECLCALLBACK(bool) pdmR3DevHlp_AssertEMT(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
2181{
2182 PDMDEV_ASSERT_DEVINS(pDevIns);
2183 if (VM_IS_EMT(pDevIns->Internal.s.pVMHC))
2184 return true;
2185
2186 char szMsg[100];
2187 RTStrPrintf(szMsg, sizeof(szMsg), "AssertEMT '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance);
2188 AssertMsg1(szMsg, iLine, pszFile, pszFunction);
2189 AssertBreakpoint();
2190 return false;
2191}
2192
2193
2194/** @copydoc PDMDEVHLP::pfnAssertOther */
2195static DECLCALLBACK(bool) pdmR3DevHlp_AssertOther(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
2196{
2197 PDMDEV_ASSERT_DEVINS(pDevIns);
2198 if (!VM_IS_EMT(pDevIns->Internal.s.pVMHC))
2199 return true;
2200
2201 char szMsg[100];
2202 RTStrPrintf(szMsg, sizeof(szMsg), "AssertOther '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance);
2203 AssertMsg1(szMsg, iLine, pszFile, pszFunction);
2204 AssertBreakpoint();
2205 return false;
2206}
2207
2208
2209/** @copydoc PDMDEVHLP::pfnDBGFStopV */
2210static DECLCALLBACK(int) pdmR3DevHlp_DBGFStopV(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args)
2211{
2212 PDMDEV_ASSERT_DEVINS(pDevIns);
2213#ifdef LOG_ENABLED
2214 va_list va2;
2215 va_copy(va2, args);
2216 LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: pszFile=%p:{%s} iLine=%d pszFunction=%p:{%s} pszFormat=%p:{%s} (%N)\n",
2217 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pszFile, pszFile, iLine, pszFunction, pszFunction, pszFormat, pszFormat, pszFormat, &va2));
2218 va_end(va2);
2219#endif
2220
2221 PVM pVM = pDevIns->Internal.s.pVMHC;
2222 VM_ASSERT_EMT(pVM);
2223 int rc = DBGFR3EventSrcV(pVM, DBGFEVENT_DEV_STOP, pszFile, iLine, pszFunction, pszFormat, args);
2224
2225 LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2226 return rc;
2227}
2228
2229
2230/** @copydoc PDMDEVHLP::pfnDBGFInfoRegister */
2231static DECLCALLBACK(int) pdmR3DevHlp_DBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
2232{
2233 PDMDEV_ASSERT_DEVINS(pDevIns);
2234 LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: pszName=%p:{%s} pszDesc=%p:{%s} pfnHandler=%p\n",
2235 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pszName, pszName, pszDesc, pszDesc, pfnHandler));
2236
2237 PVM pVM = pDevIns->Internal.s.pVMHC;
2238 VM_ASSERT_EMT(pVM);
2239 int rc = DBGFR3InfoRegisterDevice(pVM, pszName, pszDesc, pfnHandler, pDevIns);
2240
2241 LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2242 return rc;
2243}
2244
2245
2246/** @copydoc PDMDEVHLP::pfnSTAMRegister */
2247static DECLCALLBACK(void) pdmR3DevHlp_STAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
2248{
2249 PDMDEV_ASSERT_DEVINS(pDevIns);
2250 PVM pVM = pDevIns->Internal.s.pVMHC;
2251 VM_ASSERT_EMT(pVM);
2252
2253 STAM_REG(pVM, pvSample, enmType, pszName, enmUnit, pszDesc);
2254 NOREF(pVM);
2255}
2256
2257
2258
2259/** @copydoc PDMDEVHLP::pfnSTAMRegisterF */
2260static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2261 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...)
2262{
2263 PDMDEV_ASSERT_DEVINS(pDevIns);
2264 PVM pVM = pDevIns->Internal.s.pVMHC;
2265 VM_ASSERT_EMT(pVM);
2266
2267 va_list args;
2268 va_start(args, pszName);
2269 int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
2270 va_end(args);
2271 AssertRC(rc);
2272
2273 NOREF(pVM);
2274}
2275
2276
2277/** @copydoc PDMDEVHLP::pfnSTAMRegisterV */
2278static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterV(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2279 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args)
2280{
2281 PDMDEV_ASSERT_DEVINS(pDevIns);
2282 PVM pVM = pDevIns->Internal.s.pVMHC;
2283 VM_ASSERT_EMT(pVM);
2284
2285 int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
2286 AssertRC(rc);
2287
2288 NOREF(pVM);
2289}
2290
2291
2292/** @copydoc PDMDEVHLP::pfnRTCRegister */
2293static DECLCALLBACK(int) pdmR3DevHlp_RTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
2294{
2295 PDMDEV_ASSERT_DEVINS(pDevIns);
2296 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
2297 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: pRtcReg=%p:{.u32Version=%#x, .pfnWrite=%p, .pfnRead=%p} ppRtcHlp=%p\n",
2298 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pRtcReg, pRtcReg->u32Version, pRtcReg->pfnWrite,
2299 pRtcReg->pfnWrite, ppRtcHlp));
2300
2301 /*
2302 * Validate input.
2303 */
2304 if (pRtcReg->u32Version != PDM_RTCREG_VERSION)
2305 {
2306 AssertMsgFailed(("u32Version=%#x expected %#x\n", pRtcReg->u32Version,
2307 PDM_RTCREG_VERSION));
2308 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Vrc (version)\n",
2309 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2310 return VERR_INVALID_PARAMETER;
2311 }
2312 if ( !pRtcReg->pfnWrite
2313 || !pRtcReg->pfnRead)
2314 {
2315 Assert(pRtcReg->pfnWrite);
2316 Assert(pRtcReg->pfnRead);
2317 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Vrc (callbacks)\n",
2318 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2319 return VERR_INVALID_PARAMETER;
2320 }
2321
2322 if (!ppRtcHlp)
2323 {
2324 Assert(ppRtcHlp);
2325 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Vrc (ppRtcHlp)\n",
2326 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2327 return VERR_INVALID_PARAMETER;
2328 }
2329
2330 /*
2331 * Only one DMA device.
2332 */
2333 PVM pVM = pDevIns->Internal.s.pVMHC;
2334 if (pVM->pdm.s.pRtc)
2335 {
2336 AssertMsgFailed(("Only one RTC device is supported!\n"));
2337 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Vrc\n",
2338 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2339 return VERR_INVALID_PARAMETER;
2340 }
2341
2342 /*
2343 * Allocate and initialize pci bus structure.
2344 */
2345 int rc = VINF_SUCCESS;
2346 PPDMRTC pRtc = (PPDMRTC)MMR3HeapAlloc(pDevIns->Internal.s.pVMHC, MM_TAG_PDM_DEVICE, sizeof(*pRtc));
2347 if (pRtc)
2348 {
2349 pRtc->pDevIns = pDevIns;
2350 pRtc->Reg = *pRtcReg;
2351 pVM->pdm.s.pRtc = pRtc;
2352
2353 /* set the helper pointer. */
2354 *ppRtcHlp = &g_pdmR3DevRtcHlp;
2355 Log(("PDM: Registered RTC device '%s'/%d pDevIns=%p\n",
2356 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
2357 }
2358 else
2359 rc = VERR_NO_MEMORY;
2360
2361 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Vrc\n",
2362 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2363 return rc;
2364}
2365
2366
2367/** @copydoc PDMDEVHLP::pfnPDMQueueCreate */
2368static DECLCALLBACK(int) pdmR3DevHlp_PDMQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
2369 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue)
2370{
2371 PDMDEV_ASSERT_DEVINS(pDevIns);
2372 LogFlow(("pdmR3DevHlp_PDMQueueCreate: caller='%s'/%d: cbItem=%#x cItems=%#x cMilliesInterval=%u pfnCallback=%p fGCEnabled=%RTbool ppQueue=%p\n",
2373 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, ppQueue));
2374
2375 PVM pVM = pDevIns->Internal.s.pVMHC;
2376 VM_ASSERT_EMT(pVM);
2377 int rc = PDMR3QueueCreateDevice(pVM, pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, ppQueue);
2378
2379 LogFlow(("pdmR3DevHlp_PDMQueueCreate: caller='%s'/%d: returns %Vrc *ppQueue=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, *ppQueue));
2380 return rc;
2381}
2382
2383
2384/** @copydoc PDMDEVHLP::pfnCritSectInit */
2385static DECLCALLBACK(int) pdmR3DevHlp_CritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName)
2386{
2387 PDMDEV_ASSERT_DEVINS(pDevIns);
2388 LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: pCritSect=%p pszName=%p:{%s}\n",
2389 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pCritSect, pszName, pszName));
2390
2391 PVM pVM = pDevIns->Internal.s.pVMHC;
2392 VM_ASSERT_EMT(pVM);
2393 int rc = pdmR3CritSectInitDevice(pVM, pDevIns, pCritSect, pszName);
2394
2395 LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2396 return rc;
2397}
2398
2399
2400/** @copydoc PDMDEVHLP::pfnUTCNow */
2401static DECLCALLBACK(PRTTIMESPEC) pdmR3DevHlp_UTCNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
2402{
2403 PDMDEV_ASSERT_DEVINS(pDevIns);
2404 LogFlow(("pdmR3DevHlp_UTCNow: caller='%s'/%d: pTime=%p\n",
2405 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pTime));
2406
2407 pTime = TMR3UTCNow(pDevIns->Internal.s.pVMHC, pTime);
2408
2409 LogFlow(("pdmR3DevHlp_UTCNow: caller='%s'/%d: returns %RU64\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, RTTimeSpecGetNano(pTime)));
2410 return pTime;
2411}
2412
2413
2414/** @copydoc PDMDEVHLP::pfnPDMThreadCreate */
2415static DECLCALLBACK(int) pdmR3DevHlp_PDMThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
2416 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
2417{
2418 PDMDEV_ASSERT_DEVINS(pDevIns);
2419 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
2420 LogFlow(("pdmR3DevHlp_PDMThreadCreate: caller='%s'/%d: ppThread=%p pvUser=%p pfnThread=%p pfnWakeup=%p cbStack=%#zx enmType=%d pszName=%p:{%s}\n",
2421 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName, pszName));
2422
2423 int rc = pdmR3ThreadCreateDevice(pDevIns->Internal.s.pVMHC, pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
2424
2425 LogFlow(("pdmR3DevHlp_PDMThreadCreate: caller='%s'/%d: returns %Vrc *ppThread=%RTthrd\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
2426 rc, *ppThread));
2427 return rc;
2428}
2429
2430
2431/** @copydoc PDMDEVHLP::pfnGetVM */
2432static DECLCALLBACK(PVM) pdmR3DevHlp_GetVM(PPDMDEVINS pDevIns)
2433{
2434 PDMDEV_ASSERT_DEVINS(pDevIns);
2435 LogFlow(("pdmR3DevHlp_GetVM: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns->Internal.s.pVMHC));
2436 return pDevIns->Internal.s.pVMHC;
2437}
2438
2439
2440/** @copydoc PDMDEVHLP::pfnPCIBusRegister */
2441static DECLCALLBACK(int) pdmR3DevHlp_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
2442{
2443 PDMDEV_ASSERT_DEVINS(pDevIns);
2444 PVM pVM = pDevIns->Internal.s.pVMHC;
2445 VM_ASSERT_EMT(pVM);
2446 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: pPciBusReg=%p:{.u32Version=%#x, .pfnRegisterHC=%p, .pfnIORegionRegisterHC=%p, .pfnSetIrqHC=%p, "
2447 ".pfnSaveExecHC=%p, .pfnLoadExecHC=%p, .pfnFakePCIBIOSHC=%p, .pszSetIrqGC=%p:{%s}} ppPciHlpR3=%p\n",
2448 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciBusReg, pPciBusReg->u32Version, pPciBusReg->pfnRegisterHC,
2449 pPciBusReg->pfnIORegionRegisterHC, pPciBusReg->pfnSetIrqHC, pPciBusReg->pfnSaveExecHC, pPciBusReg->pfnLoadExecHC,
2450 pPciBusReg->pfnFakePCIBIOSHC, pPciBusReg->pszSetIrqGC, pPciBusReg->pszSetIrqGC, ppPciHlpR3));
2451
2452 /*
2453 * Validate the structure.
2454 */
2455 if (pPciBusReg->u32Version != PDM_PCIBUSREG_VERSION)
2456 {
2457 AssertMsgFailed(("u32Version=%#x expected %#x\n", pPciBusReg->u32Version, PDM_PCIBUSREG_VERSION));
2458 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Vrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2459 return VERR_INVALID_PARAMETER;
2460 }
2461 if ( !pPciBusReg->pfnRegisterHC
2462 || !pPciBusReg->pfnIORegionRegisterHC
2463 || !pPciBusReg->pfnSetIrqHC
2464 || !pPciBusReg->pfnSaveExecHC
2465 || !pPciBusReg->pfnLoadExecHC
2466 || !pPciBusReg->pfnFakePCIBIOSHC)
2467 {
2468 Assert(pPciBusReg->pfnRegisterHC);
2469 Assert(pPciBusReg->pfnIORegionRegisterHC);
2470 Assert(pPciBusReg->pfnSetIrqHC);
2471 Assert(pPciBusReg->pfnSaveExecHC);
2472 Assert(pPciBusReg->pfnLoadExecHC);
2473 Assert(pPciBusReg->pfnFakePCIBIOSHC);
2474 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Vrc (HC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2475 return VERR_INVALID_PARAMETER;
2476 }
2477 if ( pPciBusReg->pszSetIrqGC
2478 && !VALID_PTR(pPciBusReg->pszSetIrqGC))
2479 {
2480 Assert(VALID_PTR(pPciBusReg->pszSetIrqGC));
2481 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Vrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2482 return VERR_INVALID_PARAMETER;
2483 }
2484 if ( pPciBusReg->pszSetIrqR0
2485 && !VALID_PTR(pPciBusReg->pszSetIrqR0))
2486 {
2487 Assert(VALID_PTR(pPciBusReg->pszSetIrqR0));
2488 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Vrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2489 return VERR_INVALID_PARAMETER;
2490 }
2491 if (!ppPciHlpR3)
2492 {
2493 Assert(ppPciHlpR3);
2494 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Vrc (ppPciHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2495 return VERR_INVALID_PARAMETER;
2496 }
2497
2498 /*
2499 * Find free PCI bus entry.
2500 */
2501 unsigned iBus = 0;
2502 for (iBus = 0; iBus < ELEMENTS(pVM->pdm.s.aPciBuses); iBus++)
2503 if (!pVM->pdm.s.aPciBuses[iBus].pDevInsR3)
2504 break;
2505 if (iBus >= ELEMENTS(pVM->pdm.s.aPciBuses))
2506 {
2507 AssertMsgFailed(("Too many PCI buses. Max=%u\n", ELEMENTS(pVM->pdm.s.aPciBuses)));
2508 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Vrc (pci bus)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2509 return VERR_INVALID_PARAMETER;
2510 }
2511 PPDMPCIBUS pPciBus = &pVM->pdm.s.aPciBuses[iBus];
2512
2513 /*
2514 * Resolve and init the GC bits.
2515 */
2516 if (pPciBusReg->pszSetIrqGC)
2517 {
2518 int rc = PDMR3GetSymbolGCLazy(pVM, pDevIns->pDevReg->szGCMod, pPciBusReg->pszSetIrqGC, &pPciBus->pfnSetIrqGC);
2519 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szGCMod, pPciBusReg->pszSetIrqGC, rc));
2520 if (VBOX_FAILURE(rc))
2521 {
2522 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2523 return rc;
2524 }
2525 pPciBus->pDevInsGC = PDMDEVINS_2_GCPTR(pDevIns);
2526 }
2527 else
2528 {
2529 pPciBus->pfnSetIrqGC = 0;
2530 pPciBus->pDevInsGC = 0;
2531 }
2532
2533 /*
2534 * Resolve and init the R0 bits.
2535 */
2536 if ( HWACCMR3IsAllowed(pVM)
2537 && pPciBusReg->pszSetIrqR0)
2538 {
2539 int rc = PDMR3GetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPciBusReg->pszSetIrqR0, &pPciBus->pfnSetIrqR0);
2540 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szR0Mod, pPciBusReg->pszSetIrqR0, rc));
2541 if (VBOX_FAILURE(rc))
2542 {
2543 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2544 return rc;
2545 }
2546 pPciBus->pDevInsR0 = MMHyperR3ToR0(pVM, pDevIns);
2547 }
2548 else
2549 {
2550 pPciBus->pfnSetIrqR0 = 0;
2551 pPciBus->pDevInsR0 = 0;
2552 }
2553
2554 /*
2555 * Init the HC bits.
2556 */
2557 pPciBus->iBus = iBus;
2558 pPciBus->pDevInsR3 = pDevIns;
2559 pPciBus->pfnRegisterR3 = pPciBusReg->pfnRegisterHC;
2560 pPciBus->pfnIORegionRegisterR3 = pPciBusReg->pfnIORegionRegisterHC;
2561 pPciBus->pfnSetConfigCallbacksR3 = pPciBusReg->pfnSetConfigCallbacksHC;
2562 pPciBus->pfnSetIrqR3 = pPciBusReg->pfnSetIrqHC;
2563 pPciBus->pfnSaveExecR3 = pPciBusReg->pfnSaveExecHC;
2564 pPciBus->pfnLoadExecR3 = pPciBusReg->pfnLoadExecHC;
2565 pPciBus->pfnFakePCIBIOSR3 = pPciBusReg->pfnFakePCIBIOSHC;
2566
2567 Log(("PDM: Registered PCI bus device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
2568
2569 /* set the helper pointer and return. */
2570 *ppPciHlpR3 = &g_pdmR3DevPciHlp;
2571 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
2572 return VINF_SUCCESS;
2573}
2574
2575
2576/** @copydoc PDMDEVHLP::pfnPICRegister */
2577static DECLCALLBACK(int) pdmR3DevHlp_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
2578{
2579 PDMDEV_ASSERT_DEVINS(pDevIns);
2580 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
2581 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: pPicReg=%p:{.u32Version=%#x, .pfnSetIrqHC=%p, .pfnGetInterruptHC=%p, .pszGetIrqGC=%p:{%s}, .pszGetInterruptGC=%p:{%s}} ppPicHlpR3=%p\n",
2582 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPicReg, pPicReg->u32Version, pPicReg->pfnSetIrqHC, pPicReg->pfnGetInterruptHC,
2583 pPicReg->pszSetIrqGC, pPicReg->pszSetIrqGC, pPicReg->pszGetInterruptGC, pPicReg->pszGetInterruptGC, ppPicHlpR3));
2584
2585 /*
2586 * Validate input.
2587 */
2588 if (pPicReg->u32Version != PDM_PICREG_VERSION)
2589 {
2590 AssertMsgFailed(("u32Version=%#x expected %#x\n", pPicReg->u32Version, PDM_PICREG_VERSION));
2591 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Vrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2592 return VERR_INVALID_PARAMETER;
2593 }
2594 if ( !pPicReg->pfnSetIrqHC
2595 || !pPicReg->pfnGetInterruptHC)
2596 {
2597 Assert(pPicReg->pfnSetIrqHC);
2598 Assert(pPicReg->pfnGetInterruptHC);
2599 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Vrc (HC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2600 return VERR_INVALID_PARAMETER;
2601 }
2602 if ( ( pPicReg->pszSetIrqGC
2603 || pPicReg->pszGetInterruptGC)
2604 && ( !VALID_PTR(pPicReg->pszSetIrqGC)
2605 || !VALID_PTR(pPicReg->pszGetInterruptGC))
2606 )
2607 {
2608 Assert(VALID_PTR(pPicReg->pszSetIrqGC));
2609 Assert(VALID_PTR(pPicReg->pszGetInterruptGC));
2610 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Vrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2611 return VERR_INVALID_PARAMETER;
2612 }
2613 if ( pPicReg->pszSetIrqGC
2614 && !(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_GC))
2615 {
2616 Assert(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_GC);
2617 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Vrc (GC flag)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2618 return VERR_INVALID_PARAMETER;
2619 }
2620 if ( pPicReg->pszSetIrqR0
2621 && !(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
2622 {
2623 Assert(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0);
2624 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Vrc (R0 flag)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2625 return VERR_INVALID_PARAMETER;
2626 }
2627 if (!ppPicHlpR3)
2628 {
2629 Assert(ppPicHlpR3);
2630 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Vrc (ppPicHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2631 return VERR_INVALID_PARAMETER;
2632 }
2633
2634 /*
2635 * Only one PIC device.
2636 */
2637 PVM pVM = pDevIns->Internal.s.pVMHC;
2638 if (pVM->pdm.s.Pic.pDevInsR3)
2639 {
2640 AssertMsgFailed(("Only one pic device is supported!\n"));
2641 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2642 return VERR_INVALID_PARAMETER;
2643 }
2644
2645 /*
2646 * GC stuff.
2647 */
2648 if (pPicReg->pszSetIrqGC)
2649 {
2650 int rc = PDMR3GetSymbolGCLazy(pVM, pDevIns->pDevReg->szGCMod, pPicReg->pszSetIrqGC, &pVM->pdm.s.Pic.pfnSetIrqGC);
2651 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szGCMod, pPicReg->pszSetIrqGC, rc));
2652 if (VBOX_SUCCESS(rc))
2653 {
2654 rc = PDMR3GetSymbolGCLazy(pVM, pDevIns->pDevReg->szGCMod, pPicReg->pszGetInterruptGC, &pVM->pdm.s.Pic.pfnGetInterruptGC);
2655 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szGCMod, pPicReg->pszGetInterruptGC, rc));
2656 }
2657 if (VBOX_FAILURE(rc))
2658 {
2659 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2660 return rc;
2661 }
2662 pVM->pdm.s.Pic.pDevInsGC = PDMDEVINS_2_GCPTR(pDevIns);
2663 }
2664 else
2665 {
2666 pVM->pdm.s.Pic.pDevInsGC = 0;
2667 pVM->pdm.s.Pic.pfnSetIrqGC = 0;
2668 pVM->pdm.s.Pic.pfnGetInterruptGC = 0;
2669 }
2670
2671 /*
2672 * R0 stuff.
2673 */
2674 if ( HWACCMR3IsAllowed(pVM)
2675 && pPicReg->pszSetIrqR0)
2676 {
2677 int rc = PDMR3GetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPicReg->pszSetIrqR0, &pVM->pdm.s.Pic.pfnSetIrqR0);
2678 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szR0Mod, pPicReg->pszSetIrqR0, rc));
2679 if (VBOX_SUCCESS(rc))
2680 {
2681 rc = PDMR3GetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPicReg->pszGetInterruptR0, &pVM->pdm.s.Pic.pfnGetInterruptR0);
2682 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szR0Mod, pPicReg->pszGetInterruptR0, rc));
2683 }
2684 if (VBOX_FAILURE(rc))
2685 {
2686 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2687 return rc;
2688 }
2689 pVM->pdm.s.Pic.pDevInsR0 = MMHyperR3ToR0(pVM, pDevIns);
2690 Assert(pVM->pdm.s.Pic.pDevInsR0);
2691 }
2692 else
2693 {
2694 pVM->pdm.s.Pic.pfnSetIrqR0 = 0;
2695 pVM->pdm.s.Pic.pfnGetInterruptR0 = 0;
2696 pVM->pdm.s.Pic.pDevInsR0 = 0;
2697 }
2698
2699 /*
2700 * HC stuff.
2701 */
2702 pVM->pdm.s.Pic.pDevInsR3 = pDevIns;
2703 pVM->pdm.s.Pic.pfnSetIrqR3 = pPicReg->pfnSetIrqHC;
2704 pVM->pdm.s.Pic.pfnGetInterruptR3 = pPicReg->pfnGetInterruptHC;
2705 Log(("PDM: Registered PIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
2706
2707 /* set the helper pointer and return. */
2708 *ppPicHlpR3 = &g_pdmR3DevPicHlp;
2709 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
2710 return VINF_SUCCESS;
2711}
2712
2713
2714/** @copydoc PDMDEVHLP::pfnAPICRegister */
2715static DECLCALLBACK(int) pdmR3DevHlp_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
2716{
2717 PDMDEV_ASSERT_DEVINS(pDevIns);
2718 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
2719 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: pApicReg=%p:{.u32Version=%#x, .pfnGetInterruptHC=%p, .pfnSetBaseHC=%p, .pfnGetBaseHC=%p, "
2720 ".pfnSetTPRHC=%p, .pfnGetTPRHC=%p, .pfnBusDeliverHC=%p, pszGetInterruptGC=%p:{%s}, pszSetBaseGC=%p:{%s}, pszGetBaseGC=%p:{%s}, "
2721 ".pszSetTPRGC=%p:{%s}, .pszGetTPRGC=%p:{%s}, .pszBusDeliverGC=%p:{%s}} ppApicHlpR3=%p\n",
2722 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pApicReg, pApicReg->u32Version, pApicReg->pfnGetInterruptHC, pApicReg->pfnSetBaseHC,
2723 pApicReg->pfnGetBaseHC, pApicReg->pfnSetTPRHC, pApicReg->pfnGetTPRHC, pApicReg->pfnBusDeliverHC, pApicReg->pszGetInterruptGC,
2724 pApicReg->pszGetInterruptGC, pApicReg->pszSetBaseGC, pApicReg->pszSetBaseGC, pApicReg->pszGetBaseGC, pApicReg->pszGetBaseGC,
2725 pApicReg->pszSetTPRGC, pApicReg->pszSetTPRGC, pApicReg->pszGetTPRGC, pApicReg->pszGetTPRGC, pApicReg->pszBusDeliverGC,
2726 pApicReg->pszBusDeliverGC, ppApicHlpR3));
2727
2728 /*
2729 * Validate input.
2730 */
2731 if (pApicReg->u32Version != PDM_APICREG_VERSION)
2732 {
2733 AssertMsgFailed(("u32Version=%#x expected %#x\n", pApicReg->u32Version, PDM_APICREG_VERSION));
2734 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Vrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2735 return VERR_INVALID_PARAMETER;
2736 }
2737 if ( !pApicReg->pfnGetInterruptHC
2738 || !pApicReg->pfnSetBaseHC
2739 || !pApicReg->pfnGetBaseHC
2740 || !pApicReg->pfnSetTPRHC
2741 || !pApicReg->pfnGetTPRHC
2742 || !pApicReg->pfnBusDeliverHC)
2743 {
2744 Assert(pApicReg->pfnGetInterruptHC);
2745 Assert(pApicReg->pfnSetBaseHC);
2746 Assert(pApicReg->pfnGetBaseHC);
2747 Assert(pApicReg->pfnSetTPRHC);
2748 Assert(pApicReg->pfnGetTPRHC);
2749 Assert(pApicReg->pfnBusDeliverHC);
2750 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Vrc (HC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2751 return VERR_INVALID_PARAMETER;
2752 }
2753 if ( ( pApicReg->pszGetInterruptGC
2754 || pApicReg->pszSetBaseGC
2755 || pApicReg->pszGetBaseGC
2756 || pApicReg->pszSetTPRGC
2757 || pApicReg->pszGetTPRGC
2758 || pApicReg->pszBusDeliverGC)
2759 && ( !VALID_PTR(pApicReg->pszGetInterruptGC)
2760 || !VALID_PTR(pApicReg->pszSetBaseGC)
2761 || !VALID_PTR(pApicReg->pszGetBaseGC)
2762 || !VALID_PTR(pApicReg->pszSetTPRGC)
2763 || !VALID_PTR(pApicReg->pszGetTPRGC)
2764 || !VALID_PTR(pApicReg->pszBusDeliverGC))
2765 )
2766 {
2767 Assert(VALID_PTR(pApicReg->pszGetInterruptGC));
2768 Assert(VALID_PTR(pApicReg->pszSetBaseGC));
2769 Assert(VALID_PTR(pApicReg->pszGetBaseGC));
2770 Assert(VALID_PTR(pApicReg->pszSetTPRGC));
2771 Assert(VALID_PTR(pApicReg->pszGetTPRGC));
2772 Assert(VALID_PTR(pApicReg->pszBusDeliverGC));
2773 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Vrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2774 return VERR_INVALID_PARAMETER;
2775 }
2776 if ( ( pApicReg->pszGetInterruptR0
2777 || pApicReg->pszSetBaseR0
2778 || pApicReg->pszGetBaseR0
2779 || pApicReg->pszSetTPRR0
2780 || pApicReg->pszGetTPRR0
2781 || pApicReg->pszBusDeliverR0)
2782 && ( !VALID_PTR(pApicReg->pszGetInterruptR0)
2783 || !VALID_PTR(pApicReg->pszSetBaseR0)
2784 || !VALID_PTR(pApicReg->pszGetBaseR0)
2785 || !VALID_PTR(pApicReg->pszSetTPRR0)
2786 || !VALID_PTR(pApicReg->pszGetTPRR0)
2787 || !VALID_PTR(pApicReg->pszBusDeliverR0))
2788 )
2789 {
2790 Assert(VALID_PTR(pApicReg->pszGetInterruptR0));
2791 Assert(VALID_PTR(pApicReg->pszSetBaseR0));
2792 Assert(VALID_PTR(pApicReg->pszGetBaseR0));
2793 Assert(VALID_PTR(pApicReg->pszSetTPRR0));
2794 Assert(VALID_PTR(pApicReg->pszGetTPRR0));
2795 Assert(VALID_PTR(pApicReg->pszBusDeliverR0));
2796 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Vrc (R0 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2797 return VERR_INVALID_PARAMETER;
2798 }
2799 if (!ppApicHlpR3)
2800 {
2801 Assert(ppApicHlpR3);
2802 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Vrc (ppApicHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2803 return VERR_INVALID_PARAMETER;
2804 }
2805
2806 /*
2807 * Only one APIC device. (malc: only in UP case actually)
2808 */
2809 PVM pVM = pDevIns->Internal.s.pVMHC;
2810 if (pVM->pdm.s.Apic.pDevInsR3)
2811 {
2812 AssertMsgFailed(("Only one apic device is supported!\n"));
2813 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2814 return VERR_INVALID_PARAMETER;
2815 }
2816
2817 /*
2818 * Resolve & initialize the GC bits.
2819 */
2820 if (pApicReg->pszGetInterruptGC)
2821 {
2822 int rc = PDMR3GetSymbolGCLazy(pVM, pDevIns->pDevReg->szGCMod, pApicReg->pszGetInterruptGC, &pVM->pdm.s.Apic.pfnGetInterruptGC);
2823 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szGCMod, pApicReg->pszGetInterruptGC, rc));
2824 if (RT_SUCCESS(rc))
2825 {
2826 rc = PDMR3GetSymbolGCLazy(pVM, pDevIns->pDevReg->szGCMod, pApicReg->pszSetBaseGC, &pVM->pdm.s.Apic.pfnSetBaseGC);
2827 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szGCMod, pApicReg->pszSetBaseGC, rc));
2828 }
2829 if (RT_SUCCESS(rc))
2830 {
2831 rc = PDMR3GetSymbolGCLazy(pVM, pDevIns->pDevReg->szGCMod, pApicReg->pszGetBaseGC, &pVM->pdm.s.Apic.pfnGetBaseGC);
2832 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szGCMod, pApicReg->pszGetBaseGC, rc));
2833 }
2834 if (RT_SUCCESS(rc))
2835 {
2836 rc = PDMR3GetSymbolGCLazy(pVM, pDevIns->pDevReg->szGCMod, pApicReg->pszSetTPRGC, &pVM->pdm.s.Apic.pfnSetTPRGC);
2837 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szGCMod, pApicReg->pszSetTPRGC, rc));
2838 }
2839 if (RT_SUCCESS(rc))
2840 {
2841 rc = PDMR3GetSymbolGCLazy(pVM, pDevIns->pDevReg->szGCMod, pApicReg->pszGetTPRGC, &pVM->pdm.s.Apic.pfnGetTPRGC);
2842 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szGCMod, pApicReg->pszGetTPRGC, rc));
2843 }
2844 if (RT_SUCCESS(rc))
2845 {
2846 rc = PDMR3GetSymbolGCLazy(pVM, pDevIns->pDevReg->szGCMod, pApicReg->pszBusDeliverGC, &pVM->pdm.s.Apic.pfnBusDeliverGC);
2847 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szGCMod, pApicReg->pszBusDeliverGC, rc));
2848 }
2849 if (VBOX_FAILURE(rc))
2850 {
2851 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2852 return rc;
2853 }
2854 pVM->pdm.s.Apic.pDevInsGC = PDMDEVINS_2_GCPTR(pDevIns);
2855 }
2856 else
2857 {
2858 pVM->pdm.s.Apic.pDevInsGC = 0;
2859 pVM->pdm.s.Apic.pfnGetInterruptGC = 0;
2860 pVM->pdm.s.Apic.pfnSetBaseGC = 0;
2861 pVM->pdm.s.Apic.pfnGetBaseGC = 0;
2862 pVM->pdm.s.Apic.pfnSetTPRGC = 0;
2863 pVM->pdm.s.Apic.pfnGetTPRGC = 0;
2864 pVM->pdm.s.Apic.pfnBusDeliverGC = 0;
2865 }
2866
2867 /*
2868 * Resolve & initialize the R0 bits.
2869 */
2870 if ( HWACCMR3IsAllowed(pVM)
2871 && pApicReg->pszGetInterruptR0)
2872 {
2873 int rc = PDMR3GetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetInterruptR0, &pVM->pdm.s.Apic.pfnGetInterruptR0);
2874 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetInterruptR0, rc));
2875 if (RT_SUCCESS(rc))
2876 {
2877 rc = PDMR3GetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszSetBaseR0, &pVM->pdm.s.Apic.pfnSetBaseR0);
2878 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszSetBaseR0, rc));
2879 }
2880 if (RT_SUCCESS(rc))
2881 {
2882 rc = PDMR3GetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetBaseR0, &pVM->pdm.s.Apic.pfnGetBaseR0);
2883 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetBaseR0, rc));
2884 }
2885 if (RT_SUCCESS(rc))
2886 {
2887 rc = PDMR3GetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszSetTPRR0, &pVM->pdm.s.Apic.pfnSetTPRR0);
2888 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszSetTPRR0, rc));
2889 }
2890 if (RT_SUCCESS(rc))
2891 {
2892 rc = PDMR3GetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetTPRR0, &pVM->pdm.s.Apic.pfnGetTPRR0);
2893 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetTPRR0, rc));
2894 }
2895 if (RT_SUCCESS(rc))
2896 {
2897 rc = PDMR3GetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszBusDeliverR0, &pVM->pdm.s.Apic.pfnBusDeliverR0);
2898 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszBusDeliverR0, rc));
2899 }
2900 if (VBOX_FAILURE(rc))
2901 {
2902 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2903 return rc;
2904 }
2905 pVM->pdm.s.Apic.pDevInsR0 = MMHyperR3ToR0(pVM, pDevIns);
2906 Assert(pVM->pdm.s.Apic.pDevInsR0);
2907 }
2908 else
2909 {
2910 pVM->pdm.s.Apic.pfnGetInterruptR0 = 0;
2911 pVM->pdm.s.Apic.pfnSetBaseR0 = 0;
2912 pVM->pdm.s.Apic.pfnGetBaseR0 = 0;
2913 pVM->pdm.s.Apic.pfnSetTPRR0 = 0;
2914 pVM->pdm.s.Apic.pfnGetTPRR0 = 0;
2915 pVM->pdm.s.Apic.pfnBusDeliverR0 = 0;
2916 pVM->pdm.s.Apic.pDevInsR0 = 0;
2917 }
2918
2919 /*
2920 * Initialize the HC bits.
2921 */
2922 pVM->pdm.s.Apic.pDevInsR3 = pDevIns;
2923 pVM->pdm.s.Apic.pfnGetInterruptR3 = pApicReg->pfnGetInterruptHC;
2924 pVM->pdm.s.Apic.pfnSetBaseR3 = pApicReg->pfnSetBaseHC;
2925 pVM->pdm.s.Apic.pfnGetBaseR3 = pApicReg->pfnGetBaseHC;
2926 pVM->pdm.s.Apic.pfnSetTPRR3 = pApicReg->pfnSetTPRHC;
2927 pVM->pdm.s.Apic.pfnGetTPRR3 = pApicReg->pfnGetTPRHC;
2928 pVM->pdm.s.Apic.pfnBusDeliverR3 = pApicReg->pfnBusDeliverHC;
2929 Log(("PDM: Registered APIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
2930
2931 /* set the helper pointer and return. */
2932 *ppApicHlpR3 = &g_pdmR3DevApicHlp;
2933 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
2934 return VINF_SUCCESS;
2935}
2936
2937
2938/** @copydoc PDMDEVHLP::pfnIOAPICRegister */
2939static DECLCALLBACK(int) pdmR3DevHlp_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
2940{
2941 PDMDEV_ASSERT_DEVINS(pDevIns);
2942 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
2943 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: pIoApicReg=%p:{.u32Version=%#x, .pfnSetIrqHC=%p, .pszSetIrqGC=%p:{%s}} ppIoApicHlpR3=%p\n",
2944 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pIoApicReg, pIoApicReg->u32Version, pIoApicReg->pfnSetIrqHC, pIoApicReg->pszSetIrqGC,
2945 pIoApicReg->pszSetIrqGC, ppIoApicHlpR3));
2946
2947 /*
2948 * Validate input.
2949 */
2950 if (pIoApicReg->u32Version != PDM_IOAPICREG_VERSION)
2951 {
2952 AssertMsgFailed(("u32Version=%#x expected %#x\n", pIoApicReg->u32Version, PDM_IOAPICREG_VERSION));
2953 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Vrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2954 return VERR_INVALID_PARAMETER;
2955 }
2956 if (!pIoApicReg->pfnSetIrqHC)
2957 {
2958 Assert(pIoApicReg->pfnSetIrqHC);
2959 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Vrc (HC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2960 return VERR_INVALID_PARAMETER;
2961 }
2962 if ( pIoApicReg->pszSetIrqGC
2963 && !VALID_PTR(pIoApicReg->pszSetIrqGC))
2964 {
2965 Assert(VALID_PTR(pIoApicReg->pszSetIrqGC));
2966 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Vrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2967 return VERR_INVALID_PARAMETER;
2968 }
2969 if ( pIoApicReg->pszSetIrqR0
2970 && !VALID_PTR(pIoApicReg->pszSetIrqR0))
2971 {
2972 Assert(VALID_PTR(pIoApicReg->pszSetIrqR0));
2973 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Vrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2974 return VERR_INVALID_PARAMETER;
2975 }
2976 if (!ppIoApicHlpR3)
2977 {
2978 Assert(ppIoApicHlpR3);
2979 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Vrc (ppApicHlp)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2980 return VERR_INVALID_PARAMETER;
2981 }
2982
2983 /*
2984 * The I/O APIC requires the APIC to be present (hacks++).
2985 * If the I/O APIC does GC stuff so must the APIC.
2986 */
2987 PVM pVM = pDevIns->Internal.s.pVMHC;
2988 if (!pVM->pdm.s.Apic.pDevInsR3)
2989 {
2990 AssertMsgFailed(("Configuration error / Init order error! No APIC!\n"));
2991 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Vrc (no APIC)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2992 return VERR_INVALID_PARAMETER;
2993 }
2994 if ( pIoApicReg->pszSetIrqGC
2995 && !pVM->pdm.s.Apic.pDevInsGC)
2996 {
2997 AssertMsgFailed(("Configuration error! APIC doesn't do GC, I/O APIC does!\n"));
2998 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Vrc (no GC APIC)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2999 return VERR_INVALID_PARAMETER;
3000 }
3001
3002 /*
3003 * Only one I/O APIC device.
3004 */
3005 if (pVM->pdm.s.IoApic.pDevInsR3)
3006 {
3007 AssertMsgFailed(("Only one ioapic device is supported!\n"));
3008 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Vrc (only one)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3009 return VERR_INVALID_PARAMETER;
3010 }
3011
3012 /*
3013 * Resolve & initialize the GC bits.
3014 */
3015 if (pIoApicReg->pszSetIrqGC)
3016 {
3017 int rc = PDMR3GetSymbolGCLazy(pVM, pDevIns->pDevReg->szGCMod, pIoApicReg->pszSetIrqGC, &pVM->pdm.s.IoApic.pfnSetIrqGC);
3018 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szGCMod, pIoApicReg->pszSetIrqGC, rc));
3019 if (VBOX_FAILURE(rc))
3020 {
3021 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
3022 return rc;
3023 }
3024 pVM->pdm.s.IoApic.pDevInsGC = PDMDEVINS_2_GCPTR(pDevIns);
3025 }
3026 else
3027 {
3028 pVM->pdm.s.IoApic.pDevInsGC = 0;
3029 pVM->pdm.s.IoApic.pfnSetIrqGC = 0;
3030 }
3031
3032 /*
3033 * Resolve & initialize the R0 bits.
3034 */
3035 if ( HWACCMR3IsAllowed(pVM)
3036 && pIoApicReg->pszSetIrqR0)
3037 {
3038 int rc = PDMR3GetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pIoApicReg->pszSetIrqR0, &pVM->pdm.s.IoApic.pfnSetIrqR0);
3039 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szR0Mod, pIoApicReg->pszSetIrqR0, rc));
3040 if (VBOX_FAILURE(rc))
3041 {
3042 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
3043 return rc;
3044 }
3045 pVM->pdm.s.IoApic.pDevInsR0 = MMHyperR3ToR0(pVM, pDevIns);
3046 Assert(pVM->pdm.s.IoApic.pDevInsR0);
3047 }
3048 else
3049 {
3050 pVM->pdm.s.IoApic.pfnSetIrqR0 = 0;
3051 pVM->pdm.s.IoApic.pDevInsR0 = 0;
3052 }
3053
3054 /*
3055 * Initialize the HC bits.
3056 */
3057 pVM->pdm.s.IoApic.pDevInsR3 = pDevIns;
3058 pVM->pdm.s.IoApic.pfnSetIrqR3 = pIoApicReg->pfnSetIrqHC;
3059 Log(("PDM: Registered I/O APIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
3060
3061 /* set the helper pointer and return. */
3062 *ppIoApicHlpR3 = &g_pdmR3DevIoApicHlp;
3063 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
3064 return VINF_SUCCESS;
3065}
3066
3067
3068/** @copydoc PDMDEVHLP::pfnDMACRegister */
3069static DECLCALLBACK(int) pdmR3DevHlp_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
3070{
3071 PDMDEV_ASSERT_DEVINS(pDevIns);
3072 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
3073 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: pDmacReg=%p:{.u32Version=%#x, .pfnRun=%p, .pfnRegister=%p, .pfnReadMemory=%p, .pfnWriteMemory=%p, .pfnSetDREQ=%p, .pfnGetChannelMode=%p} ppDmacHlp=%p\n",
3074 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDmacReg, pDmacReg->u32Version, pDmacReg->pfnRun, pDmacReg->pfnRegister,
3075 pDmacReg->pfnReadMemory, pDmacReg->pfnWriteMemory, pDmacReg->pfnSetDREQ, pDmacReg->pfnGetChannelMode, ppDmacHlp));
3076
3077 /*
3078 * Validate input.
3079 */
3080 if (pDmacReg->u32Version != PDM_DMACREG_VERSION)
3081 {
3082 AssertMsgFailed(("u32Version=%#x expected %#x\n", pDmacReg->u32Version,
3083 PDM_DMACREG_VERSION));
3084 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Vrc (version)\n",
3085 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3086 return VERR_INVALID_PARAMETER;
3087 }
3088 if ( !pDmacReg->pfnRun
3089 || !pDmacReg->pfnRegister
3090 || !pDmacReg->pfnReadMemory
3091 || !pDmacReg->pfnWriteMemory
3092 || !pDmacReg->pfnSetDREQ
3093 || !pDmacReg->pfnGetChannelMode)
3094 {
3095 Assert(pDmacReg->pfnRun);
3096 Assert(pDmacReg->pfnRegister);
3097 Assert(pDmacReg->pfnReadMemory);
3098 Assert(pDmacReg->pfnWriteMemory);
3099 Assert(pDmacReg->pfnSetDREQ);
3100 Assert(pDmacReg->pfnGetChannelMode);
3101 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Vrc (callbacks)\n",
3102 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3103 return VERR_INVALID_PARAMETER;
3104 }
3105
3106 if (!ppDmacHlp)
3107 {
3108 Assert(ppDmacHlp);
3109 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Vrc (ppDmacHlp)\n",
3110 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3111 return VERR_INVALID_PARAMETER;
3112 }
3113
3114 /*
3115 * Only one DMA device.
3116 */
3117 PVM pVM = pDevIns->Internal.s.pVMHC;
3118 if (pVM->pdm.s.pDmac)
3119 {
3120 AssertMsgFailed(("Only one DMA device is supported!\n"));
3121 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Vrc\n",
3122 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3123 return VERR_INVALID_PARAMETER;
3124 }
3125
3126 /*
3127 * Allocate and initialize pci bus structure.
3128 */
3129 int rc = VINF_SUCCESS;
3130 PPDMDMAC pDmac = (PPDMDMAC)MMR3HeapAlloc(pDevIns->Internal.s.pVMHC, MM_TAG_PDM_DEVICE, sizeof(*pDmac));
3131 if (pDmac)
3132 {
3133 pDmac->pDevIns = pDevIns;
3134 pDmac->Reg = *pDmacReg;
3135 pVM->pdm.s.pDmac = pDmac;
3136
3137 /* set the helper pointer. */
3138 *ppDmacHlp = &g_pdmR3DevDmacHlp;
3139 Log(("PDM: Registered DMAC device '%s'/%d pDevIns=%p\n",
3140 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
3141 }
3142 else
3143 rc = VERR_NO_MEMORY;
3144
3145 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Vrc\n",
3146 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
3147 return rc;
3148}
3149
3150
3151/** @copydoc PDMDEVHLP::pfnPhysRead */
3152static DECLCALLBACK(void) pdmR3DevHlp_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
3153{
3154 PDMDEV_ASSERT_DEVINS(pDevIns);
3155 LogFlow(("pdmR3DevHlp_PhysRead: caller='%s'/%d: GCPhys=%VGp pvBuf=%p cbRead=%#x\n",
3156 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, pvBuf, cbRead));
3157
3158 /*
3159 * For the convenience of the device we put no thread restriction on this interface.
3160 * That means we'll have to check which thread we're in and choose our path.
3161 */
3162#ifdef PDM_PHYS_READWRITE_FROM_ANY_THREAD
3163 PGMPhysRead(pDevIns->Internal.s.pVMHC, GCPhys, pvBuf, cbRead);
3164#else
3165 if (VM_IS_EMT(pDevIns->Internal.s.pVMHC) || VMMR3LockIsOwner(pDevIns->Internal.s.pVMHC))
3166 PGMPhysRead(pDevIns->Internal.s.pVMHC, GCPhys, pvBuf, cbRead);
3167 else
3168 {
3169 Log(("pdmR3DevHlp_PhysRead: caller='%s'/%d: Requesting call in EMT...\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3170 PVMREQ pReq;
3171 int rc = VMR3ReqCallVoid(pDevIns->Internal.s.pVMHC, &pReq, RT_INDEFINITE_WAIT,
3172 (PFNRT)PGMPhysRead, 4, pDevIns->Internal.s.pVMHC, GCPhys, pvBuf, cbRead);
3173 while (rc == VERR_TIMEOUT)
3174 rc = VMR3ReqWait(pReq, RT_INDEFINITE_WAIT);
3175 AssertReleaseRC(rc);
3176 VMR3ReqFree(pReq);
3177 }
3178#endif
3179 Log(("pdmR3DevHlp_PhysRead: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3180}
3181
3182
3183/** @copydoc PDMDEVHLP::pfnPhysWrite */
3184static DECLCALLBACK(void) pdmR3DevHlp_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
3185{
3186 PDMDEV_ASSERT_DEVINS(pDevIns);
3187 LogFlow(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: GCPhys=%VGp pvBuf=%p cbWrite=%#x\n",
3188 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, pvBuf, cbWrite));
3189
3190 /*
3191 * For the convenience of the device we put no thread restriction on this interface.
3192 * That means we'll have to check which thread we're in and choose our path.
3193 */
3194#ifdef PDM_PHYS_READWRITE_FROM_ANY_THREAD
3195 PGMPhysWrite(pDevIns->Internal.s.pVMHC, GCPhys, pvBuf, cbWrite);
3196#else
3197 if (VM_IS_EMT(pDevIns->Internal.s.pVMHC) || VMMR3LockIsOwner(pDevIns->Internal.s.pVMHC))
3198 PGMPhysWrite(pDevIns->Internal.s.pVMHC, GCPhys, pvBuf, cbWrite);
3199 else
3200 {
3201 Log(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: Requesting call in EMT...\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3202 PVMREQ pReq;
3203 int rc = VMR3ReqCallVoid(pDevIns->Internal.s.pVMHC, &pReq, RT_INDEFINITE_WAIT,
3204 (PFNRT)PGMPhysWrite, 4, pDevIns->Internal.s.pVMHC, GCPhys, pvBuf, cbWrite);
3205 while (rc == VERR_TIMEOUT)
3206 rc = VMR3ReqWait(pReq, RT_INDEFINITE_WAIT);
3207 AssertReleaseRC(rc);
3208 VMR3ReqFree(pReq);
3209 }
3210#endif
3211 Log(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3212}
3213
3214
3215/** @copydoc PDMDEVHLP::pfnPhysReadGCVirt */
3216static DECLCALLBACK(int) pdmR3DevHlp_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
3217{
3218 PDMDEV_ASSERT_DEVINS(pDevIns);
3219 PVM pVM = pDevIns->Internal.s.pVMHC;
3220 VM_ASSERT_EMT(pVM);
3221 LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: pvDst=%p GCVirt=%VGv cb=%#x\n",
3222 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pvDst, GCVirtSrc, cb));
3223
3224 if (!VM_IS_EMT(pVM))
3225 return VERR_ACCESS_DENIED;
3226
3227 int rc = PGMPhysReadGCPtr(pVM, pvDst, GCVirtSrc, cb);
3228
3229 LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
3230
3231 return rc;
3232}
3233
3234
3235/** @copydoc PDMDEVHLP::pfnPhysWriteGCVirt */
3236static DECLCALLBACK(int) pdmR3DevHlp_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
3237{
3238 PDMDEV_ASSERT_DEVINS(pDevIns);
3239 PVM pVM = pDevIns->Internal.s.pVMHC;
3240 VM_ASSERT_EMT(pVM);
3241 LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: GCVirtDst=%VGv pvSrc=%p cb=%#x\n",
3242 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCVirtDst, pvSrc, cb));
3243
3244 if (!VM_IS_EMT(pVM))
3245 return VERR_ACCESS_DENIED;
3246
3247 int rc = PGMPhysWriteGCPtr(pVM, GCVirtDst, pvSrc, cb);
3248
3249 LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
3250
3251 return rc;
3252}
3253
3254
3255/** @copydoc PDMDEVHLP::pfnPhysReserve */
3256static DECLCALLBACK(int) pdmR3DevHlp_PhysReserve(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc)
3257{
3258 PDMDEV_ASSERT_DEVINS(pDevIns);
3259 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
3260 LogFlow(("pdmR3DevHlp_PhysReserve: caller='%s'/%d: GCPhys=%VGp cbRange=%#x pszDesc=%p:{%s}\n",
3261 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, cbRange, pszDesc, pszDesc));
3262
3263 int rc = MMR3PhysReserve(pDevIns->Internal.s.pVMHC, GCPhys, cbRange, pszDesc);
3264
3265 LogFlow(("pdmR3DevHlp_PhysReserve: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
3266
3267 return rc;
3268}
3269
3270/** @copydoc PDMDEVHLP::pfnPhysGCPtr2GCPhys */
3271static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
3272{
3273 PDMDEV_ASSERT_DEVINS(pDevIns);
3274 PVM pVM = pDevIns->Internal.s.pVMHC;
3275 VM_ASSERT_EMT(pVM);
3276 LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: GCPtr=%VGv pGCPhys=%p\n",
3277 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPtr, pGCPhys));
3278
3279 if (!VM_IS_EMT(pVM))
3280 return VERR_ACCESS_DENIED;
3281
3282 int rc = PGMPhysGCPtr2GCPhys(pVM, GCPtr, pGCPhys);
3283
3284 LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: returns %Vrc *pGCPhys=%VGp\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, *pGCPhys));
3285
3286 return rc;
3287}
3288
3289
3290/** @copydoc PDMDEVHLP::pfnA20IsEnabled */
3291static DECLCALLBACK(bool) pdmR3DevHlp_A20IsEnabled(PPDMDEVINS pDevIns)
3292{
3293 PDMDEV_ASSERT_DEVINS(pDevIns);
3294 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
3295
3296 bool fRc = PGMPhysIsA20Enabled(pDevIns->Internal.s.pVMHC);
3297
3298 LogFlow(("pdmR3DevHlp_A20IsEnabled: caller='%s'/%d: returns %d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, fRc));
3299 return fRc;
3300}
3301
3302
3303/** @copydoc PDMDEVHLP::pfnA20Set */
3304static DECLCALLBACK(void) pdmR3DevHlp_A20Set(PPDMDEVINS pDevIns, bool fEnable)
3305{
3306 PDMDEV_ASSERT_DEVINS(pDevIns);
3307 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
3308 LogFlow(("pdmR3DevHlp_A20Set: caller='%s'/%d: fEnable=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, fEnable));
3309 //Assert(*(unsigned *)&fEnable <= 1);
3310 PGMR3PhysSetA20(pDevIns->Internal.s.pVMHC, fEnable);
3311}
3312
3313
3314/** @copydoc PDMDEVHLP::pfnVMReset */
3315static DECLCALLBACK(int) pdmR3DevHlp_VMReset(PPDMDEVINS pDevIns)
3316{
3317 PDMDEV_ASSERT_DEVINS(pDevIns);
3318 PVM pVM = pDevIns->Internal.s.pVMHC;
3319 VM_ASSERT_EMT(pVM);
3320 LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: VM_FF_RESET %d -> 1\n",
3321 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_RESET)));
3322
3323 /*
3324 * We postpone this operation because we're likely to be inside a I/O instruction
3325 * and the EIP will be updated when we return.
3326 * We still return VINF_EM_RESET to break out of any execution loops and force FF evaluation.
3327 */
3328 bool fHaltOnReset;
3329 int rc = CFGMR3QueryBool(CFGMR3GetChild(CFGMR3GetRoot(pVM), "PDM"), "HaltOnReset", &fHaltOnReset);
3330 if (VBOX_SUCCESS(rc) && fHaltOnReset)
3331 {
3332 Log(("pdmR3DevHlp_VMReset: Halt On Reset!\n"));
3333 rc = VINF_EM_HALT;
3334 }
3335 else
3336 {
3337 VM_FF_SET(pVM, VM_FF_RESET);
3338 rc = VINF_EM_RESET;
3339 }
3340
3341 LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
3342 return rc;
3343}
3344
3345
3346/** @copydoc PDMDEVHLP::pfnVMSuspend */
3347static DECLCALLBACK(int) pdmR3DevHlp_VMSuspend(PPDMDEVINS pDevIns)
3348{
3349 PDMDEV_ASSERT_DEVINS(pDevIns);
3350 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
3351 LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d:\n",
3352 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3353
3354 int rc = VMR3Suspend(pDevIns->Internal.s.pVMHC);
3355
3356 LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
3357 return rc;
3358}
3359
3360
3361/** @copydoc PDMDEVHLP::pfnVMPowerOff */
3362static DECLCALLBACK(int) pdmR3DevHlp_VMPowerOff(PPDMDEVINS pDevIns)
3363{
3364 PDMDEV_ASSERT_DEVINS(pDevIns);
3365 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
3366 LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d:\n",
3367 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3368
3369 int rc = VMR3PowerOff(pDevIns->Internal.s.pVMHC);
3370
3371 LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
3372 return rc;
3373}
3374
3375
3376/** @copydoc PDMDEVHLP::pfnLockVM */
3377static DECLCALLBACK(int) pdmR3DevHlp_LockVM(PPDMDEVINS pDevIns)
3378{
3379 return VMMR3Lock(pDevIns->Internal.s.pVMHC);
3380}
3381
3382
3383/** @copydoc PDMDEVHLP::pfnUnlockVM */
3384static DECLCALLBACK(int) pdmR3DevHlp_UnlockVM(PPDMDEVINS pDevIns)
3385{
3386 return VMMR3Unlock(pDevIns->Internal.s.pVMHC);
3387}
3388
3389
3390/** @copydoc PDMDEVHLP::pfnAssertVMLock */
3391static DECLCALLBACK(bool) pdmR3DevHlp_AssertVMLock(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
3392{
3393 PVM pVM = pDevIns->Internal.s.pVMHC;
3394 if (VMMR3LockIsOwner(pVM))
3395 return true;
3396
3397 RTNATIVETHREAD NativeThreadOwner = VMMR3LockGetOwner(pVM);
3398 RTTHREAD ThreadOwner = RTThreadFromNative(NativeThreadOwner);
3399 char szMsg[100];
3400 RTStrPrintf(szMsg, sizeof(szMsg), "AssertVMLocked '%s'/%d ThreadOwner=%RTnthrd/%RTthrd/'%s' Self='%s'\n",
3401 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
3402 NativeThreadOwner, ThreadOwner, RTThreadGetName(ThreadOwner), RTThreadSelfName());
3403 AssertMsg1(szMsg, iLine, pszFile, pszFunction);
3404 AssertBreakpoint();
3405 return false;
3406}
3407
3408/** @copydoc PDMDEVHLP::pfnDMARegister */
3409static DECLCALLBACK(int) pdmR3DevHlp_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
3410{
3411 PDMDEV_ASSERT_DEVINS(pDevIns);
3412 PVM pVM = pDevIns->Internal.s.pVMHC;
3413 VM_ASSERT_EMT(pVM);
3414 LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: uChannel=%d pfnTransferHandler=%p pvUser=%p\n",
3415 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pfnTransferHandler, pvUser));
3416 int rc = VINF_SUCCESS;
3417 if (pVM->pdm.s.pDmac)
3418 pVM->pdm.s.pDmac->Reg.pfnRegister(pVM->pdm.s.pDmac->pDevIns, uChannel, pfnTransferHandler, pvUser);
3419 else
3420 {
3421 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
3422 rc = VERR_PDM_NO_DMAC_INSTANCE;
3423 }
3424 LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: returns %Vrc\n",
3425 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
3426 return rc;
3427}
3428
3429/** @copydoc PDMDEVHLP::pfnDMAReadMemory */
3430static DECLCALLBACK(int) pdmR3DevHlp_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
3431{
3432 PDMDEV_ASSERT_DEVINS(pDevIns);
3433 PVM pVM = pDevIns->Internal.s.pVMHC;
3434 VM_ASSERT_EMT(pVM);
3435 LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbRead=%p\n",
3436 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbRead));
3437 int rc = VINF_SUCCESS;
3438 if (pVM->pdm.s.pDmac)
3439 {
3440 uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnReadMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
3441 if (pcbRead)
3442 *pcbRead = cb;
3443 }
3444 else
3445 {
3446 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
3447 rc = VERR_PDM_NO_DMAC_INSTANCE;
3448 }
3449 LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: returns %Vrc\n",
3450 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
3451 return rc;
3452}
3453
3454/** @copydoc PDMDEVHLP::pfnDMAWriteMemory */
3455static DECLCALLBACK(int) pdmR3DevHlp_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
3456{
3457 PDMDEV_ASSERT_DEVINS(pDevIns);
3458 PVM pVM = pDevIns->Internal.s.pVMHC;
3459 VM_ASSERT_EMT(pVM);
3460 LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbWritten=%p\n",
3461 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbWritten));
3462 int rc = VINF_SUCCESS;
3463 if (pVM->pdm.s.pDmac)
3464 {
3465 uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnWriteMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
3466 if (pcbWritten)
3467 *pcbWritten = cb;
3468 }
3469 else
3470 {
3471 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
3472 rc = VERR_PDM_NO_DMAC_INSTANCE;
3473 }
3474 LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: returns %Vrc\n",
3475 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
3476 return rc;
3477}
3478
3479/** @copydoc PDMDEVHLP::pfnDMASetDREQ */
3480static DECLCALLBACK(int) pdmR3DevHlp_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
3481{
3482 PDMDEV_ASSERT_DEVINS(pDevIns);
3483 PVM pVM = pDevIns->Internal.s.pVMHC;
3484 VM_ASSERT_EMT(pVM);
3485 LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: uChannel=%d uLevel=%d\n",
3486 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, uLevel));
3487 int rc = VINF_SUCCESS;
3488 if (pVM->pdm.s.pDmac)
3489 pVM->pdm.s.pDmac->Reg.pfnSetDREQ(pVM->pdm.s.pDmac->pDevIns, uChannel, uLevel);
3490 else
3491 {
3492 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
3493 rc = VERR_PDM_NO_DMAC_INSTANCE;
3494 }
3495 LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: returns %Vrc\n",
3496 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
3497 return rc;
3498}
3499
3500/** @copydoc PDMDEVHLP::pfnDMAGetChannelMode */
3501static DECLCALLBACK(uint8_t) pdmR3DevHlp_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
3502{
3503 PDMDEV_ASSERT_DEVINS(pDevIns);
3504 PVM pVM = pDevIns->Internal.s.pVMHC;
3505 VM_ASSERT_EMT(pVM);
3506 LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: uChannel=%d\n",
3507 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel));
3508 uint8_t u8Mode;
3509 if (pVM->pdm.s.pDmac)
3510 u8Mode = pVM->pdm.s.pDmac->Reg.pfnGetChannelMode(pVM->pdm.s.pDmac->pDevIns, uChannel);
3511 else
3512 {
3513 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
3514 u8Mode = 3 << 2 /* illegal mode type */;
3515 }
3516 LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: returns %#04x\n",
3517 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, u8Mode));
3518 return u8Mode;
3519}
3520
3521/** @copydoc PDMDEVHLP::pfnDMASchedule */
3522static DECLCALLBACK(void) pdmR3DevHlp_DMASchedule(PPDMDEVINS pDevIns)
3523{
3524 PDMDEV_ASSERT_DEVINS(pDevIns);
3525 PVM pVM = pDevIns->Internal.s.pVMHC;
3526 VM_ASSERT_EMT(pVM);
3527 LogFlow(("pdmR3DevHlp_DMASchedule: caller='%s'/%d: VM_FF_PDM_DMA %d -> 1\n",
3528 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_PDM_DMA)));
3529
3530 AssertMsg(pVM->pdm.s.pDmac, ("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
3531 VM_FF_SET(pVM, VM_FF_PDM_DMA);
3532 REMR3NotifyDmaPending(pVM);
3533 VMR3NotifyFF(pVM, true);
3534}
3535
3536
3537/** @copydoc PDMDEVHLP::pfnCMOSWrite */
3538static DECLCALLBACK(int) pdmR3DevHlp_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
3539{
3540 PDMDEV_ASSERT_DEVINS(pDevIns);
3541 PVM pVM = pDevIns->Internal.s.pVMHC;
3542 VM_ASSERT_EMT(pVM);
3543
3544 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x u8Value=%#04x\n",
3545 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iReg, u8Value));
3546 int rc;
3547 if (pVM->pdm.s.pRtc)
3548 rc = pVM->pdm.s.pRtc->Reg.pfnWrite(pVM->pdm.s.pRtc->pDevIns, iReg, u8Value);
3549 else
3550 rc = VERR_PDM_NO_RTC_INSTANCE;
3551
3552 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Vrc\n",
3553 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
3554 return rc;
3555}
3556
3557
3558/** @copydoc PDMDEVHLP::pfnCMOSRead */
3559static DECLCALLBACK(int) pdmR3DevHlp_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
3560{
3561 PDMDEV_ASSERT_DEVINS(pDevIns);
3562 PVM pVM = pDevIns->Internal.s.pVMHC;
3563 VM_ASSERT_EMT(pVM);
3564
3565 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x pu8Value=%p\n",
3566 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iReg, pu8Value));
3567 int rc;
3568 if (pVM->pdm.s.pRtc)
3569 rc = pVM->pdm.s.pRtc->Reg.pfnRead(pVM->pdm.s.pRtc->pDevIns, iReg, pu8Value);
3570 else
3571 rc = VERR_PDM_NO_RTC_INSTANCE;
3572
3573 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Vrc\n",
3574 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
3575 return rc;
3576}
3577
3578
3579/** @copydoc PDMDEVHLP::pfnGetCpuId */
3580static DECLCALLBACK(void) pdmR3DevHlp_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
3581 uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
3582{
3583 PDMDEV_ASSERT_DEVINS(pDevIns);
3584 LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: iLeaf=%d pEax=%p pEbx=%p pEcx=%p pEdx=%p\n",
3585 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iLeaf, pEax, pEbx, pEcx, pEdx));
3586 AssertPtr(pEax); AssertPtr(pEbx); AssertPtr(pEcx); AssertPtr(pEdx);
3587
3588 CPUMGetGuestCpuId(pDevIns->Internal.s.pVMHC, iLeaf, pEax, pEbx, pEcx, pEdx);
3589
3590 LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: returns void - *pEax=%#x *pEbx=%#x *pEcx=%#x *pEdx=%#x\n",
3591 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, *pEax, *pEbx, *pEcx, *pEdx));
3592}
3593
3594
3595/** @copydoc PDMDEVHLP::pfnROMProtectShadow */
3596static DECLCALLBACK(int) pdmR3DevHlp_ROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
3597{
3598 PDMDEV_ASSERT_DEVINS(pDevIns);
3599 LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: GCPhysStart=%VGp cbRange=%#x\n",
3600 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange));
3601
3602 int rc = MMR3PhysRomProtect(pDevIns->Internal.s.pVMHC, GCPhysStart, cbRange);
3603
3604 LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
3605 return rc;
3606}
3607
3608
3609
3610/** @copydoc PDMDEVHLP::pfnGetVM */
3611static DECLCALLBACK(PVM) pdmR3DevHlp_Untrusted_GetVM(PPDMDEVINS pDevIns)
3612{
3613 PDMDEV_ASSERT_DEVINS(pDevIns);
3614 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3615 return NULL;
3616}
3617
3618
3619/** @copydoc PDMDEVHLP::pfnPCIBusRegister */
3620static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
3621{
3622 PDMDEV_ASSERT_DEVINS(pDevIns);
3623 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3624 NOREF(pPciBusReg);
3625 NOREF(ppPciHlpR3);
3626 return VERR_ACCESS_DENIED;
3627}
3628
3629
3630/** @copydoc PDMDEVHLP::pfnPICRegister */
3631static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
3632{
3633 PDMDEV_ASSERT_DEVINS(pDevIns);
3634 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3635 NOREF(pPicReg);
3636 NOREF(ppPicHlpR3);
3637 return VERR_ACCESS_DENIED;
3638}
3639
3640
3641/** @copydoc PDMDEVHLP::pfnAPICRegister */
3642static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
3643{
3644 PDMDEV_ASSERT_DEVINS(pDevIns);
3645 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3646 NOREF(pApicReg);
3647 NOREF(ppApicHlpR3);
3648 return VERR_ACCESS_DENIED;
3649}
3650
3651
3652/** @copydoc PDMDEVHLP::pfnIOAPICRegister */
3653static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
3654{
3655 PDMDEV_ASSERT_DEVINS(pDevIns);
3656 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3657 NOREF(pIoApicReg);
3658 NOREF(ppIoApicHlpR3);
3659 return VERR_ACCESS_DENIED;
3660}
3661
3662
3663/** @copydoc PDMDEVHLP::pfnDMACRegister */
3664static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
3665{
3666 PDMDEV_ASSERT_DEVINS(pDevIns);
3667 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3668 NOREF(pDmacReg);
3669 NOREF(ppDmacHlp);
3670 return VERR_ACCESS_DENIED;
3671}
3672
3673
3674/** @copydoc PDMDEVHLP::pfnPhysRead */
3675static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
3676{
3677 PDMDEV_ASSERT_DEVINS(pDevIns);
3678 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3679 NOREF(GCPhys);
3680 NOREF(pvBuf);
3681 NOREF(cbRead);
3682}
3683
3684
3685/** @copydoc PDMDEVHLP::pfnPhysWrite */
3686static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
3687{
3688 PDMDEV_ASSERT_DEVINS(pDevIns);
3689 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3690 NOREF(GCPhys);
3691 NOREF(pvBuf);
3692 NOREF(cbWrite);
3693}
3694
3695
3696/** @copydoc PDMDEVHLP::pfnPhysReadGCVirt */
3697static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
3698{
3699 PDMDEV_ASSERT_DEVINS(pDevIns);
3700 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3701 NOREF(pvDst);
3702 NOREF(GCVirtSrc);
3703 NOREF(cb);
3704 return VERR_ACCESS_DENIED;
3705}
3706
3707
3708/** @copydoc PDMDEVHLP::pfnPhysWriteGCVirt */
3709static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
3710{
3711 PDMDEV_ASSERT_DEVINS(pDevIns);
3712 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3713 NOREF(GCVirtDst);
3714 NOREF(pvSrc);
3715 NOREF(cb);
3716 return VERR_ACCESS_DENIED;
3717}
3718
3719
3720/** @copydoc PDMDEVHLP::pfnPhysReserve */
3721static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysReserve(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc)
3722{
3723 PDMDEV_ASSERT_DEVINS(pDevIns);
3724 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3725 NOREF(GCPhys);
3726 NOREF(cbRange);
3727 return VERR_ACCESS_DENIED;
3728}
3729
3730
3731/** @copydoc PDMDEVHLP::pfnPhys2HCVirt */
3732static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_Obsolete_Phys2HCVirt(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR ppvHC)
3733{
3734 PDMDEV_ASSERT_DEVINS(pDevIns);
3735 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3736 NOREF(GCPhys);
3737 NOREF(cbRange);
3738 NOREF(ppvHC);
3739 return VERR_ACCESS_DENIED;
3740}
3741
3742
3743/** @copydoc PDMDEVHLP::pfnPhysGCPtr2HCPtr */
3744static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_Obsolete_PhysGCPtr2HCPtr(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTHCPTR pHCPtr)
3745{
3746 PDMDEV_ASSERT_DEVINS(pDevIns);
3747 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3748 NOREF(GCPtr);
3749 NOREF(pHCPtr);
3750 return VERR_ACCESS_DENIED;
3751}
3752
3753
3754/** @copydoc PDMDEVHLP::pfnA20IsEnabled */
3755static DECLCALLBACK(bool) pdmR3DevHlp_Untrusted_A20IsEnabled(PPDMDEVINS pDevIns)
3756{
3757 PDMDEV_ASSERT_DEVINS(pDevIns);
3758 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3759 return false;
3760}
3761
3762
3763/** @copydoc PDMDEVHLP::pfnA20Set */
3764static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_A20Set(PPDMDEVINS pDevIns, bool fEnable)
3765{
3766 PDMDEV_ASSERT_DEVINS(pDevIns);
3767 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3768 NOREF(fEnable);
3769}
3770
3771
3772/** @copydoc PDMDEVHLP::pfnVMReset */
3773static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMReset(PPDMDEVINS pDevIns)
3774{
3775 PDMDEV_ASSERT_DEVINS(pDevIns);
3776 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3777 return VERR_ACCESS_DENIED;
3778}
3779
3780
3781/** @copydoc PDMDEVHLP::pfnVMSuspend */
3782static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMSuspend(PPDMDEVINS pDevIns)
3783{
3784 PDMDEV_ASSERT_DEVINS(pDevIns);
3785 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3786 return VERR_ACCESS_DENIED;
3787}
3788
3789
3790/** @copydoc PDMDEVHLP::pfnVMPowerOff */
3791static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMPowerOff(PPDMDEVINS pDevIns)
3792{
3793 PDMDEV_ASSERT_DEVINS(pDevIns);
3794 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3795 return VERR_ACCESS_DENIED;
3796}
3797
3798
3799/** @copydoc PDMDEVHLP::pfnLockVM */
3800static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_LockVM(PPDMDEVINS pDevIns)
3801{
3802 PDMDEV_ASSERT_DEVINS(pDevIns);
3803 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3804 return VERR_ACCESS_DENIED;
3805}
3806
3807
3808/** @copydoc PDMDEVHLP::pfnUnlockVM */
3809static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_UnlockVM(PPDMDEVINS pDevIns)
3810{
3811 PDMDEV_ASSERT_DEVINS(pDevIns);
3812 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3813 return VERR_ACCESS_DENIED;
3814}
3815
3816
3817/** @copydoc PDMDEVHLP::pfnAssertVMLock */
3818static DECLCALLBACK(bool) pdmR3DevHlp_Untrusted_AssertVMLock(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
3819{
3820 PDMDEV_ASSERT_DEVINS(pDevIns);
3821 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3822 return false;
3823}
3824
3825
3826/** @copydoc PDMDEVHLP::pfnDMARegister */
3827static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
3828{
3829 PDMDEV_ASSERT_DEVINS(pDevIns);
3830 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3831 return VERR_ACCESS_DENIED;
3832}
3833
3834
3835/** @copydoc PDMDEVHLP::pfnDMAReadMemory */
3836static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
3837{
3838 PDMDEV_ASSERT_DEVINS(pDevIns);
3839 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3840 if (pcbRead)
3841 *pcbRead = 0;
3842 return VERR_ACCESS_DENIED;
3843}
3844
3845
3846/** @copydoc PDMDEVHLP::pfnDMAWriteMemory */
3847static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
3848{
3849 PDMDEV_ASSERT_DEVINS(pDevIns);
3850 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3851 if (pcbWritten)
3852 *pcbWritten = 0;
3853 return VERR_ACCESS_DENIED;
3854}
3855
3856
3857/** @copydoc PDMDEVHLP::pfnDMASetDREQ */
3858static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
3859{
3860 PDMDEV_ASSERT_DEVINS(pDevIns);
3861 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3862 return VERR_ACCESS_DENIED;
3863}
3864
3865
3866/** @copydoc PDMDEVHLP::pfnDMAGetChannelMode */
3867static DECLCALLBACK(uint8_t) pdmR3DevHlp_Untrusted_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
3868{
3869 PDMDEV_ASSERT_DEVINS(pDevIns);
3870 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3871 return 3 << 2 /* illegal mode type */;
3872}
3873
3874
3875/** @copydoc PDMDEVHLP::pfnDMASchedule */
3876static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_DMASchedule(PPDMDEVINS pDevIns)
3877{
3878 PDMDEV_ASSERT_DEVINS(pDevIns);
3879 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3880}
3881
3882
3883/** @copydoc PDMDEVHLP::pfnCMOSWrite */
3884static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
3885{
3886 PDMDEV_ASSERT_DEVINS(pDevIns);
3887 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3888 return VERR_ACCESS_DENIED;
3889}
3890
3891
3892/** @copydoc PDMDEVHLP::pfnCMOSRead */
3893static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
3894{
3895 PDMDEV_ASSERT_DEVINS(pDevIns);
3896 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3897 return VERR_ACCESS_DENIED;
3898}
3899
3900
3901/** @copydoc PDMDEVHLP::pfnQueryCPUId */
3902static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_QueryCPUId(PPDMDEVINS pDevIns, uint32_t iLeaf,
3903 uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
3904{
3905 PDMDEV_ASSERT_DEVINS(pDevIns);
3906 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3907}
3908
3909
3910/** @copydoc PDMDEVHLP::pfnROMProtectShadow */
3911static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_ROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
3912{
3913 PDMDEV_ASSERT_DEVINS(pDevIns);
3914 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3915 return VERR_ACCESS_DENIED;
3916}
3917
3918
3919/** @copydoc PDMPICHLPR3::pfnSetInterruptFF */
3920static DECLCALLBACK(void) pdmR3PicHlp_SetInterruptFF(PPDMDEVINS pDevIns)
3921{
3922 PDMDEV_ASSERT_DEVINS(pDevIns);
3923 PVM pVM = pDevIns->Internal.s.pVMHC;
3924 LogFlow(("pdmR3PicHlp_SetInterruptFF: caller='%s'/%d: VM_FF_INTERRUPT_PIC %d -> 1\n",
3925 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_INTERRUPT_PIC)));
3926 VM_FF_SET(pVM, VM_FF_INTERRUPT_PIC);
3927 REMR3NotifyInterruptSet(pVM);
3928#ifdef VBOX_WITH_PDM_LOCK
3929 VMR3NotifyFF(pVM, true);
3930#endif
3931}
3932
3933
3934/** @copydoc PDMPICHLPR3::pfnClearInterruptFF */
3935static DECLCALLBACK(void) pdmR3PicHlp_ClearInterruptFF(PPDMDEVINS pDevIns)
3936{
3937 PDMDEV_ASSERT_DEVINS(pDevIns);
3938 LogFlow(("pdmR3PicHlp_ClearInterruptFF: caller='%s'/%d: VM_FF_INTERRUPT_PIC %d -> 0\n",
3939 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VM_FF_ISSET(pDevIns->Internal.s.pVMHC, VM_FF_INTERRUPT_PIC)));
3940 VM_FF_CLEAR(pDevIns->Internal.s.pVMHC, VM_FF_INTERRUPT_PIC);
3941 REMR3NotifyInterruptClear(pDevIns->Internal.s.pVMHC);
3942}
3943
3944
3945#ifdef VBOX_WITH_PDM_LOCK
3946/** @copydoc PDMPICHLPR3::pfnLock */
3947static DECLCALLBACK(int) pdmR3PicHlp_Lock(PPDMDEVINS pDevIns, int rc)
3948{
3949 PDMDEV_ASSERT_DEVINS(pDevIns);
3950 return pdmLockEx(pDevIns->Internal.s.pVMHC, rc);
3951}
3952
3953
3954/** @copydoc PDMPICHLPR3::pfnUnlock */
3955static DECLCALLBACK(void) pdmR3PicHlp_Unlock(PPDMDEVINS pDevIns)
3956{
3957 PDMDEV_ASSERT_DEVINS(pDevIns);
3958 pdmUnlock(pDevIns->Internal.s.pVMHC);
3959}
3960#endif /* VBOX_WITH_PDM_LOCK */
3961
3962
3963/** @copydoc PDMPICHLPR3::pfnGetGCHelpers */
3964static DECLCALLBACK(PCPDMPICHLPGC) pdmR3PicHlp_GetGCHelpers(PPDMDEVINS pDevIns)
3965{
3966 PDMDEV_ASSERT_DEVINS(pDevIns);
3967 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
3968 RTGCPTR pGCHelpers = 0;
3969 int rc = PDMR3GetSymbolGC(pDevIns->Internal.s.pVMHC, NULL, "g_pdmGCPicHlp", &pGCHelpers);
3970 AssertReleaseRC(rc);
3971 AssertRelease(pGCHelpers);
3972 LogFlow(("pdmR3PicHlp_GetGCHelpers: caller='%s'/%d: returns %VGv\n",
3973 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pGCHelpers));
3974 return pGCHelpers;
3975}
3976
3977
3978/** @copydoc PDMPICHLPR3::pfnGetR0Helpers */
3979static DECLCALLBACK(PCPDMPICHLPR0) pdmR3PicHlp_GetR0Helpers(PPDMDEVINS pDevIns)
3980{
3981 PDMDEV_ASSERT_DEVINS(pDevIns);
3982 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
3983 PCPDMPICHLPR0 pR0Helpers = 0;
3984 int rc = PDMR3GetSymbolR0(pDevIns->Internal.s.pVMHC, NULL, "g_pdmR0PicHlp", &pR0Helpers);
3985 AssertReleaseRC(rc);
3986 AssertRelease(pR0Helpers);
3987 LogFlow(("pdmR3PicHlp_GetR0Helpers: caller='%s'/%d: returns %VHv\n",
3988 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pR0Helpers));
3989 return pR0Helpers;
3990}
3991
3992
3993/** @copydoc PDMAPICHLPR3::pfnSetInterruptFF */
3994static DECLCALLBACK(void) pdmR3ApicHlp_SetInterruptFF(PPDMDEVINS pDevIns)
3995{
3996 PDMDEV_ASSERT_DEVINS(pDevIns);
3997 PVM pVM = pDevIns->Internal.s.pVMHC;
3998 LogFlow(("pdmR3ApicHlp_SetInterruptFF: caller='%s'/%d: VM_FF_INTERRUPT %d -> 1\n",
3999 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_INTERRUPT_APIC)));
4000 VM_FF_SET(pVM, VM_FF_INTERRUPT_APIC);
4001 REMR3NotifyInterruptSet(pVM);
4002#ifdef VBOX_WITH_PDM_LOCK
4003 VMR3NotifyFF(pVM, true);
4004#endif
4005}
4006
4007
4008/** @copydoc PDMAPICHLPR3::pfnClearInterruptFF */
4009static DECLCALLBACK(void) pdmR3ApicHlp_ClearInterruptFF(PPDMDEVINS pDevIns)
4010{
4011 PDMDEV_ASSERT_DEVINS(pDevIns);
4012 LogFlow(("pdmR3ApicHlp_ClearInterruptFF: caller='%s'/%d: VM_FF_INTERRUPT %d -> 0\n",
4013 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VM_FF_ISSET(pDevIns->Internal.s.pVMHC, VM_FF_INTERRUPT_APIC)));
4014 VM_FF_CLEAR(pDevIns->Internal.s.pVMHC, VM_FF_INTERRUPT_APIC);
4015 REMR3NotifyInterruptClear(pDevIns->Internal.s.pVMHC);
4016}
4017
4018
4019/** @copydoc PDMAPICHLPR3::pfnChangeFeature */
4020static DECLCALLBACK(void) pdmR3ApicHlp_ChangeFeature(PPDMDEVINS pDevIns, bool fEnabled)
4021{
4022 PDMDEV_ASSERT_DEVINS(pDevIns);
4023 LogFlow(("pdmR3ApicHlp_ClearInterruptFF: caller='%s'/%d: fEnabled=%RTbool\n",
4024 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, fEnabled));
4025 if (fEnabled)
4026 CPUMSetGuestCpuIdFeature(pDevIns->Internal.s.pVMHC, CPUMCPUIDFEATURE_APIC);
4027 else
4028 CPUMClearGuestCpuIdFeature(pDevIns->Internal.s.pVMHC, CPUMCPUIDFEATURE_APIC);
4029}
4030
4031#ifdef VBOX_WITH_PDM_LOCK
4032/** @copydoc PDMAPICHLPR3::pfnLock */
4033static DECLCALLBACK(int) pdmR3ApicHlp_Lock(PPDMDEVINS pDevIns, int rc)
4034{
4035 PDMDEV_ASSERT_DEVINS(pDevIns);
4036 return pdmLockEx(pDevIns->Internal.s.pVMHC, rc);
4037}
4038
4039
4040/** @copydoc PDMAPICHLPR3::pfnUnlock */
4041static DECLCALLBACK(void) pdmR3ApicHlp_Unlock(PPDMDEVINS pDevIns)
4042{
4043 PDMDEV_ASSERT_DEVINS(pDevIns);
4044 pdmUnlock(pDevIns->Internal.s.pVMHC);
4045}
4046#endif /* VBOX_WITH_PDM_LOCK */
4047
4048
4049/** @copydoc PDMAPICHLPR3::pfnGetGCHelpers */
4050static DECLCALLBACK(PCPDMAPICHLPGC) pdmR3ApicHlp_GetGCHelpers(PPDMDEVINS pDevIns)
4051{
4052 PDMDEV_ASSERT_DEVINS(pDevIns);
4053 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
4054 RTGCPTR pGCHelpers = 0;
4055 int rc = PDMR3GetSymbolGC(pDevIns->Internal.s.pVMHC, NULL, "g_pdmGCApicHlp", &pGCHelpers);
4056 AssertReleaseRC(rc);
4057 AssertRelease(pGCHelpers);
4058 LogFlow(("pdmR3ApicHlp_GetGCHelpers: caller='%s'/%d: returns %VGv\n",
4059 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pGCHelpers));
4060 return pGCHelpers;
4061}
4062
4063
4064/** @copydoc PDMAPICHLPR3::pfnGetR0Helpers */
4065static DECLCALLBACK(PCPDMAPICHLPR0) pdmR3ApicHlp_GetR0Helpers(PPDMDEVINS pDevIns)
4066{
4067 PDMDEV_ASSERT_DEVINS(pDevIns);
4068 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
4069 PCPDMAPICHLPR0 pR0Helpers = 0;
4070 int rc = PDMR3GetSymbolR0(pDevIns->Internal.s.pVMHC, NULL, "g_pdmR0ApicHlp", &pR0Helpers);
4071 AssertReleaseRC(rc);
4072 AssertRelease(pR0Helpers);
4073 LogFlow(("pdmR3ApicHlp_GetR0Helpers: caller='%s'/%d: returns %VHv\n",
4074 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pR0Helpers));
4075 return pR0Helpers;
4076}
4077
4078
4079/** @copydoc PDMIOAPICHLPR3::pfnApicBusDeliver */
4080static DECLCALLBACK(void) pdmR3IoApicHlp_ApicBusDeliver(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
4081 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode)
4082{
4083 PDMDEV_ASSERT_DEVINS(pDevIns);
4084 PVM pVM = pDevIns->Internal.s.pVMHC;
4085#ifndef VBOX_WITH_PDM_LOCK
4086 VM_ASSERT_EMT(pVM);
4087#endif
4088 LogFlow(("pdmR3IoApicHlp_ApicBusDeliver: caller='%s'/%d: u8Dest=%RX8 u8DestMode=%RX8 u8DeliveryMode=%RX8 iVector=%RX8 u8Polarity=%RX8 u8TriggerMode=%RX8\n",
4089 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, u8Dest, u8DestMode, u8DeliveryMode, iVector, u8Polarity, u8TriggerMode));
4090 if (pVM->pdm.s.Apic.pfnBusDeliverR3)
4091 pVM->pdm.s.Apic.pfnBusDeliverR3(pVM->pdm.s.Apic.pDevInsR3, u8Dest, u8DestMode, u8DeliveryMode, iVector, u8Polarity, u8TriggerMode);
4092}
4093
4094
4095#ifdef VBOX_WITH_PDM_LOCK
4096/** @copydoc PDMIOAPICHLPR3::pfnLock */
4097static DECLCALLBACK(int) pdmR3IoApicHlp_Lock(PPDMDEVINS pDevIns, int rc)
4098{
4099 PDMDEV_ASSERT_DEVINS(pDevIns);
4100 return pdmLockEx(pDevIns->Internal.s.pVMHC, rc);
4101}
4102
4103
4104/** @copydoc PDMIOAPICHLPR3::pfnUnlock */
4105static DECLCALLBACK(void) pdmR3IoApicHlp_Unlock(PPDMDEVINS pDevIns)
4106{
4107 PDMDEV_ASSERT_DEVINS(pDevIns);
4108 pdmUnlock(pDevIns->Internal.s.pVMHC);
4109}
4110#endif /* VBOX_WITH_PDM_LOCK */
4111
4112
4113/** @copydoc PDMIOAPICHLPR3::pfnGetGCHelpers */
4114static DECLCALLBACK(PCPDMIOAPICHLPGC) pdmR3IoApicHlp_GetGCHelpers(PPDMDEVINS pDevIns)
4115{
4116 PDMDEV_ASSERT_DEVINS(pDevIns);
4117 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
4118 RTGCPTR pGCHelpers = 0;
4119 int rc = PDMR3GetSymbolGC(pDevIns->Internal.s.pVMHC, NULL, "g_pdmGCIoApicHlp", &pGCHelpers);
4120 AssertReleaseRC(rc);
4121 AssertRelease(pGCHelpers);
4122 LogFlow(("pdmR3IoApicHlp_GetGCHelpers: caller='%s'/%d: returns %VGv\n",
4123 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pGCHelpers));
4124 return pGCHelpers;
4125}
4126
4127
4128/** @copydoc PDMIOAPICHLPR3::pfnGetR0Helpers */
4129static DECLCALLBACK(PCPDMIOAPICHLPR0) pdmR3IoApicHlp_GetR0Helpers(PPDMDEVINS pDevIns)
4130{
4131 PDMDEV_ASSERT_DEVINS(pDevIns);
4132 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
4133 PCPDMIOAPICHLPR0 pR0Helpers = 0;
4134 int rc = PDMR3GetSymbolR0(pDevIns->Internal.s.pVMHC, NULL, "g_pdmR0IoApicHlp", &pR0Helpers);
4135 AssertReleaseRC(rc);
4136 AssertRelease(pR0Helpers);
4137 LogFlow(("pdmR3IoApicHlp_GetR0Helpers: caller='%s'/%d: returns %VHv\n",
4138 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pR0Helpers));
4139 return pR0Helpers;
4140}
4141
4142
4143/** @copydoc PDMPCIHLPR3::pfnIsaSetIrq */
4144static DECLCALLBACK(void) pdmR3PciHlp_IsaSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4145{
4146 PDMDEV_ASSERT_DEVINS(pDevIns);
4147#ifndef VBOX_WITH_PDM_LOCK
4148 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
4149#endif
4150 Log4(("pdmR3PciHlp_IsaSetIrq: iIrq=%d iLevel=%d\n", iIrq, iLevel));
4151 PDMIsaSetIrq(pDevIns->Internal.s.pVMHC, iIrq, iLevel);
4152}
4153
4154
4155/** @copydoc PDMPCIHLPR3::pfnIoApicSetIrq */
4156static DECLCALLBACK(void) pdmR3PciHlp_IoApicSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4157{
4158 PDMDEV_ASSERT_DEVINS(pDevIns);
4159#ifndef VBOX_WITH_PDM_LOCK
4160 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
4161#endif
4162 Log4(("pdmR3PciHlp_IsaSetIrq: iIrq=%d iLevel=%d\n", iIrq, iLevel));
4163 PDMIoApicSetIrq(pDevIns->Internal.s.pVMHC, iIrq, iLevel);
4164}
4165
4166
4167#ifdef VBOX_WITH_PDM_LOCK
4168/** @copydoc PDMPCIHLPR3::pfnLock */
4169static DECLCALLBACK(int) pdmR3PciHlp_Lock(PPDMDEVINS pDevIns, int rc)
4170{
4171 PDMDEV_ASSERT_DEVINS(pDevIns);
4172 return pdmLockEx(pDevIns->Internal.s.pVMHC, rc);
4173}
4174
4175
4176/** @copydoc PDMPCIHLPR3::pfnUnlock */
4177static DECLCALLBACK(void) pdmR3PciHlp_Unlock(PPDMDEVINS pDevIns)
4178{
4179 PDMDEV_ASSERT_DEVINS(pDevIns);
4180 pdmUnlock(pDevIns->Internal.s.pVMHC);
4181}
4182#endif /* VBOX_WITH_PDM_LOCK */
4183
4184
4185/** @copydoc PDMPCIHLPR3::pfnGetGCHelpers */
4186static DECLCALLBACK(PCPDMPCIHLPGC) pdmR3PciHlp_GetGCHelpers(PPDMDEVINS pDevIns)
4187{
4188 PDMDEV_ASSERT_DEVINS(pDevIns);
4189 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
4190 RTGCPTR pGCHelpers = 0;
4191 int rc = PDMR3GetSymbolGC(pDevIns->Internal.s.pVMHC, NULL, "g_pdmGCPciHlp", &pGCHelpers);
4192 AssertReleaseRC(rc);
4193 AssertRelease(pGCHelpers);
4194 LogFlow(("pdmR3IoApicHlp_GetGCHelpers: caller='%s'/%d: returns %VGv\n",
4195 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pGCHelpers));
4196 return pGCHelpers;
4197}
4198
4199
4200/** @copydoc PDMPCIHLPR3::pfnGetR0Helpers */
4201static DECLCALLBACK(PCPDMPCIHLPR0) pdmR3PciHlp_GetR0Helpers(PPDMDEVINS pDevIns)
4202{
4203 PDMDEV_ASSERT_DEVINS(pDevIns);
4204 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
4205 PCPDMPCIHLPR0 pR0Helpers = 0;
4206 int rc = PDMR3GetSymbolR0(pDevIns->Internal.s.pVMHC, NULL, "g_pdmR0PciHlp", &pR0Helpers);
4207 AssertReleaseRC(rc);
4208 AssertRelease(pR0Helpers);
4209 LogFlow(("pdmR3IoApicHlp_GetR0Helpers: caller='%s'/%d: returns %VHv\n",
4210 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pR0Helpers));
4211 return pR0Helpers;
4212}
4213
4214
4215/**
4216 * Locates a LUN.
4217 *
4218 * @returns VBox status code.
4219 * @param pVM VM Handle.
4220 * @param pszDevice Device name.
4221 * @param iInstance Device instance.
4222 * @param iLun The Logical Unit to obtain the interface of.
4223 * @param ppLun Where to store the pointer to the LUN if found.
4224 * @thread Try only do this in EMT...
4225 */
4226int pdmR3DevFindLun(PVM pVM, const char *pszDevice, unsigned iInstance, unsigned iLun, PPDMLUN *ppLun)
4227{
4228 /*
4229 * Iterate registered devices looking for the device.
4230 */
4231 RTUINT cchDevice = strlen(pszDevice);
4232 for (PPDMDEV pDev = pVM->pdm.s.pDevs; pDev; pDev = pDev->pNext)
4233 {
4234 if ( pDev->cchName == cchDevice
4235 && !memcmp(pDev->pDevReg->szDeviceName, pszDevice, cchDevice))
4236 {
4237 /*
4238 * Iterate device instances.
4239 */
4240 for (PPDMDEVINS pDevIns = pDev->pInstances; pDevIns; pDevIns = pDevIns->Internal.s.pPerDeviceNextHC)
4241 {
4242 if (pDevIns->iInstance == iInstance)
4243 {
4244 /*
4245 * Iterate luns.
4246 */
4247 for (PPDMLUN pLun = pDevIns->Internal.s.pLunsHC; pLun; pLun = pLun->pNext)
4248 {
4249 if (pLun->iLun == iLun)
4250 {
4251 *ppLun = pLun;
4252 return VINF_SUCCESS;
4253 }
4254 }
4255 return VERR_PDM_LUN_NOT_FOUND;
4256 }
4257 }
4258 return VERR_PDM_DEVICE_INSTANCE_NOT_FOUND;
4259 }
4260 }
4261 return VERR_PDM_DEVICE_NOT_FOUND;
4262}
4263
4264
4265/**
4266 * Attaches a preconfigured driver to an existing device instance.
4267 *
4268 * This is used to change drivers and suchlike at runtime.
4269 *
4270 * @returns VBox status code.
4271 * @param pVM VM Handle.
4272 * @param pszDevice Device name.
4273 * @param iInstance Device instance.
4274 * @param iLun The Logical Unit to obtain the interface of.
4275 * @param ppBase Where to store the base interface pointer. Optional.
4276 * @thread EMT
4277 */
4278PDMR3DECL(int) PDMR3DeviceAttach(PVM pVM, const char *pszDevice, unsigned iInstance, unsigned iLun, PPDMIBASE *ppBase)
4279{
4280 VM_ASSERT_EMT(pVM);
4281 LogFlow(("PDMR3DeviceAttach: pszDevice=%p:{%s} iInstance=%d iLun=%d ppBase=%p\n",
4282 pszDevice, pszDevice, iInstance, iLun, ppBase));
4283
4284 /*
4285 * Find the LUN in question.
4286 */
4287 PPDMLUN pLun;
4288 int rc = pdmR3DevFindLun(pVM, pszDevice, iInstance, iLun, &pLun);
4289 if (VBOX_SUCCESS(rc))
4290 {
4291 /*
4292 * Can we attach anything at runtime?
4293 */
4294 PPDMDEVINS pDevIns = pLun->pDevIns;
4295 if (pDevIns->pDevReg->pfnAttach)
4296 {
4297 if (!pLun->pTop)
4298 {
4299 rc = pDevIns->pDevReg->pfnAttach(pDevIns, iLun);
4300
4301 }
4302 else
4303 rc = VERR_PDM_DRIVER_ALREADY_ATTACHED;
4304 }
4305 else
4306 rc = VERR_PDM_DEVICE_NO_RT_ATTACH;
4307
4308 if (ppBase)
4309 *ppBase = pLun->pTop ? &pLun->pTop->IBase : NULL;
4310 }
4311 else if (ppBase)
4312 *ppBase = NULL;
4313
4314 if (ppBase)
4315 LogFlow(("PDMR3DeviceAttach: returns %Vrc *ppBase=%p\n", rc, *ppBase));
4316 else
4317 LogFlow(("PDMR3DeviceAttach: returns %Vrc\n", rc));
4318 return rc;
4319}
4320
4321
4322/**
4323 * Detaches a driver chain from an existing device instance.
4324 *
4325 * This is used to change drivers and suchlike at runtime.
4326 *
4327 * @returns VBox status code.
4328 * @param pVM VM Handle.
4329 * @param pszDevice Device name.
4330 * @param iInstance Device instance.
4331 * @param iLun The Logical Unit to obtain the interface of.
4332 * @thread EMT
4333 */
4334PDMR3DECL(int) PDMR3DeviceDetach(PVM pVM, const char *pszDevice, unsigned iInstance, unsigned iLun)
4335{
4336 VM_ASSERT_EMT(pVM);
4337 LogFlow(("PDMR3DeviceDetach: pszDevice=%p:{%s} iInstance=%d iLun=%d\n",
4338 pszDevice, pszDevice, iInstance, iLun));
4339
4340 /*
4341 * Find the LUN in question.
4342 */
4343 PPDMLUN pLun;
4344 int rc = pdmR3DevFindLun(pVM, pszDevice, iInstance, iLun, &pLun);
4345 if (VBOX_SUCCESS(rc))
4346 {
4347 /*
4348 * Can we detach anything at runtime?
4349 */
4350 PPDMDEVINS pDevIns = pLun->pDevIns;
4351 if (pDevIns->pDevReg->pfnDetach)
4352 {
4353 if (pLun->pTop)
4354 rc = pdmR3DrvDetach(pLun->pTop);
4355 else
4356 rc = VINF_PDM_NO_DRIVER_ATTACHED_TO_LUN;
4357 }
4358 else
4359 rc = VERR_PDM_DEVICE_NO_RT_DETACH;
4360 }
4361
4362 LogFlow(("PDMR3DeviceDetach: returns %Vrc\n", rc));
4363 return rc;
4364}
4365
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