VirtualBox

source: vbox/trunk/src/VBox/VMM/PDMDevice.cpp@ 4012

Last change on this file since 4012 was 4012, checked in by vboxsync, 17 years ago

Hooked up the PDMThread stuff.
  • Property svn:eol-style set to native
  • Property svn:keywords set to Id
File size: 176.5 KB
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1/* $Id: PDMDevice.cpp 4012 2007-08-02 23:48:45Z vboxsync $ */
2/** @file
3 * PDM - Pluggable Device and Driver Manager, Device parts.
4 */
5
6/*
7 * Copyright (C) 2006-2007 innotek GmbH
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License as published by the Free Software Foundation,
13 * in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
14 * distribution. VirtualBox OSE is distributed in the hope that it will
15 * be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * If you received this file as part of a commercial VirtualBox
18 * distribution, then only the terms of your commercial VirtualBox
19 * license agreement apply instead of the previous paragraph.
20 */
21
22
23/*******************************************************************************
24* Header Files *
25*******************************************************************************/
26#define LOG_GROUP LOG_GROUP_PDM_DEVICE
27#include "PDMInternal.h"
28#include <VBox/pdm.h>
29#include <VBox/mm.h>
30#include <VBox/pgm.h>
31#include <VBox/iom.h>
32#include <VBox/cfgm.h>
33#include <VBox/rem.h>
34#include <VBox/dbgf.h>
35#include <VBox/vm.h>
36#include <VBox/vmm.h>
37#include <VBox/hwaccm.h>
38
39#include <VBox/version.h>
40#include <VBox/log.h>
41#include <VBox/err.h>
42#include <iprt/alloc.h>
43#include <iprt/alloca.h>
44#include <iprt/asm.h>
45#include <iprt/assert.h>
46#include <iprt/path.h>
47#include <iprt/semaphore.h>
48#include <iprt/string.h>
49#include <iprt/thread.h>
50
51
52
53/*******************************************************************************
54* Structures and Typedefs *
55*******************************************************************************/
56/**
57 * Internal callback structure pointer.
58 * The main purpose is to define the extra data we associate
59 * with PDMDEVREGCB so we can find the VM instance and so on.
60 */
61typedef struct PDMDEVREGCBINT
62{
63 /** The callback structure. */
64 PDMDEVREGCB Core;
65 /** A bit of padding. */
66 uint32_t u32[4];
67 /** VM Handle. */
68 PVM pVM;
69} PDMDEVREGCBINT, *PPDMDEVREGCBINT;
70typedef const PDMDEVREGCBINT *PCPDMDEVREGCBINT;
71
72
73/*******************************************************************************
74* Internal Functions *
75*******************************************************************************/
76static DECLCALLBACK(int) pdmR3DevReg_Register(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pDevReg);
77static DECLCALLBACK(void *) pdmR3DevReg_MMHeapAlloc(PPDMDEVREGCB pCallbacks, size_t cb);
78static DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem);
79
80/* VSlick regex:
81search : \om/\*\*.+?\*\/\nDECLCALLBACKMEMBER\(([^,]*), *pfn([^)]*)\)\(
82replace: \/\*\* @copydoc PDMDEVHLP::pfn\2 \*\/\nstatic DECLCALLBACK\(\1\) pdmR3DevHlp_\2\(
83 */
84
85/** @name R3 DevHlp
86 * @{
87 */
88static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser, PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn, PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc);
89static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterGC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTGCPTR pvUser, const char *pszOut, const char *pszIn, const char *pszOutStr, const char *pszInStr, const char *pszDesc);
90static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser, const char *pszOut, const char *pszIn, const char *pszOutStr, const char *pszInStr, const char *pszDesc);
91static DECLCALLBACK(int) pdmR3DevHlp_IOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts);
92static DECLCALLBACK(int) pdmR3DevHlp_MMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
93 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
94 const char *pszDesc);
95static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterGC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
96 const char *pszWrite, const char *pszRead, const char *pszFill,
97 const char *pszDesc);
98static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
99 const char *pszWrite, const char *pszRead, const char *pszFill,
100 const char *pszDesc);
101static DECLCALLBACK(int) pdmR3DevHlp_MMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange);
102static DECLCALLBACK(int) pdmR3DevHlp_ROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, const char *pszDesc);
103static DECLCALLBACK(int) pdmR3DevHlp_SSMRegister(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
104 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
105 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone);
106static DECLCALLBACK(int) pdmR3DevHlp_TMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERHC ppTimer);
107static DECLCALLBACK(PTMTIMERHC) pdmR3DevHlp_TMTimerCreateExternal(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMEREXT pfnCallback, void *pvUser, const char *pszDesc);
108static DECLCALLBACK(int) pdmR3DevHlp_PCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev);
109static DECLCALLBACK(int) pdmR3DevHlp_PCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback);
110static DECLCALLBACK(void) pdmR3DevHlp_PCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
111 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld);
112static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel);
113static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel);
114static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel);
115static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel);
116static DECLCALLBACK(int) pdmR3DevHlp_DriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc);
117static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAlloc(PPDMDEVINS pDevIns, size_t cb);
118static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb);
119static DECLCALLBACK(void) pdmR3DevHlp_MMHeapFree(PPDMDEVINS pDevIns, void *pv);
120static DECLCALLBACK(int) pdmR3DevHlp_VMSetError(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...);
121static DECLCALLBACK(int) pdmR3DevHlp_VMSetErrorV(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va);
122static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeError(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...);
123static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeErrorV(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va);
124static DECLCALLBACK(bool) pdmR3DevHlp_AssertEMT(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction);
125static DECLCALLBACK(bool) pdmR3DevHlp_AssertOther(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction);
126static DECLCALLBACK(int) pdmR3DevHlp_DBGFStopV(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args);
127static DECLCALLBACK(int) pdmR3DevHlp_DBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler);
128static DECLCALLBACK(void) pdmR3DevHlp_STAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc);
129static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...);
130static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterV(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args);
131static DECLCALLBACK(int) pdmR3DevHlp_CritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName);
132static DECLCALLBACK(PRTTIMESPEC) pdmR3DevHlp_UTCNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime);
133static DECLCALLBACK(int) pdmR3DevHlp_PDMThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
134 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName);
135
136static DECLCALLBACK(PVM) pdmR3DevHlp_GetVM(PPDMDEVINS pDevIns);
137static DECLCALLBACK(int) pdmR3DevHlp_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3);
138static DECLCALLBACK(int) pdmR3DevHlp_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3);
139static DECLCALLBACK(int) pdmR3DevHlp_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3);
140static DECLCALLBACK(int) pdmR3DevHlp_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3);
141static DECLCALLBACK(int) pdmR3DevHlp_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp);
142static DECLCALLBACK(int) pdmR3DevHlp_RTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp);
143static DECLCALLBACK(int) pdmR3DevHlp_PDMQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval, PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue);
144static DECLCALLBACK(void) pdmR3DevHlp_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead);
145static DECLCALLBACK(void) pdmR3DevHlp_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite);
146static DECLCALLBACK(int) pdmR3DevHlp_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb);
147static DECLCALLBACK(int) pdmR3DevHlp_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb);
148static DECLCALLBACK(int) pdmR3DevHlp_PhysReserve(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc);
149static DECLCALLBACK(int) pdmR3DevHlp_Phys2HCVirt(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR ppvHC);
150static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPtr2HCPtr(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTHCPTR pHCPtr);
151static DECLCALLBACK(bool) pdmR3DevHlp_A20IsEnabled(PPDMDEVINS pDevIns);
152static DECLCALLBACK(void) pdmR3DevHlp_A20Set(PPDMDEVINS pDevIns, bool fEnable);
153static DECLCALLBACK(int) pdmR3DevHlp_VMReset(PPDMDEVINS pDevIns);
154static DECLCALLBACK(int) pdmR3DevHlp_VMPowerOff(PPDMDEVINS pDevIns);
155static DECLCALLBACK(int) pdmR3DevHlp_VMSuspend(PPDMDEVINS pDevIns);
156static DECLCALLBACK(int) pdmR3DevHlp_LockVM(PPDMDEVINS pDevIns);
157static DECLCALLBACK(int) pdmR3DevHlp_UnlockVM(PPDMDEVINS pDevIns);
158static DECLCALLBACK(bool) pdmR3DevHlp_AssertVMLock(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction);
159static DECLCALLBACK(int) pdmR3DevHlp_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser);
160static DECLCALLBACK(int) pdmR3DevHlp_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead);
161static DECLCALLBACK(int) pdmR3DevHlp_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten);
162static DECLCALLBACK(int) pdmR3DevHlp_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel);
163static DECLCALLBACK(uint8_t) pdmR3DevHlp_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel);
164static DECLCALLBACK(void) pdmR3DevHlp_DMASchedule(PPDMDEVINS pDevIns);
165static DECLCALLBACK(int) pdmR3DevHlp_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value);
166static DECLCALLBACK(int) pdmR3DevHlp_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value);
167static DECLCALLBACK(void) pdmR3DevHlp_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
168 uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx);
169
170static DECLCALLBACK(PVM) pdmR3DevHlp_Untrusted_GetVM(PPDMDEVINS pDevIns);
171static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3);
172static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3);
173static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3);
174static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3);
175static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp);
176static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead);
177static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite);
178static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb);
179static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb);
180static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysReserve(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc);
181static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_Phys2HCVirt(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR ppvHC);
182static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysGCPtr2HCPtr(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTHCPTR pHCPtr);
183static DECLCALLBACK(bool) pdmR3DevHlp_Untrusted_A20IsEnabled(PPDMDEVINS pDevIns);
184static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_A20Set(PPDMDEVINS pDevIns, bool fEnable);
185static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMReset(PPDMDEVINS pDevIns);
186static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMPowerOff(PPDMDEVINS pDevIns);
187static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMSuspend(PPDMDEVINS pDevIns);
188static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_LockVM(PPDMDEVINS pDevIns);
189static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_UnlockVM(PPDMDEVINS pDevIns);
190static DECLCALLBACK(bool) pdmR3DevHlp_Untrusted_AssertVMLock(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction);
191static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser);
192static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead);
193static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten);
194static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel);
195static DECLCALLBACK(uint8_t) pdmR3DevHlp_Untrusted_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel);
196static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_DMASchedule(PPDMDEVINS pDevIns);
197static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value);
198static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value);
199static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_QueryCPUId(PPDMDEVINS pDevIns, uint32_t iLeaf,
200 uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx);
201
202/** @} */
203
204
205/** @name HC PIC Helpers
206 * @{
207 */
208static DECLCALLBACK(void) pdmR3PicHlp_SetInterruptFF(PPDMDEVINS pDevIns);
209static DECLCALLBACK(void) pdmR3PicHlp_ClearInterruptFF(PPDMDEVINS pDevIns);
210#ifdef VBOX_WITH_PDM_LOCK
211static DECLCALLBACK(int) pdmR3PicHlp_Lock(PPDMDEVINS pDevIns, int rc);
212static DECLCALLBACK(void) pdmR3PicHlp_Unlock(PPDMDEVINS pDevIns);
213#endif
214static DECLCALLBACK(PCPDMPICHLPGC) pdmR3PicHlp_GetGCHelpers(PPDMDEVINS pDevIns);
215static DECLCALLBACK(PCPDMPICHLPR0) pdmR3PicHlp_GetR0Helpers(PPDMDEVINS pDevIns);
216/** @} */
217
218
219/** @name HC APIC Helpers
220 * @{
221 */
222static DECLCALLBACK(void) pdmR3ApicHlp_SetInterruptFF(PPDMDEVINS pDevIns);
223static DECLCALLBACK(void) pdmR3ApicHlp_ClearInterruptFF(PPDMDEVINS pDevIns);
224static DECLCALLBACK(void) pdmR3ApicHlp_ChangeFeature(PPDMDEVINS pDevIns, bool fEnabled);
225#ifdef VBOX_WITH_PDM_LOCK
226static DECLCALLBACK(int) pdmR3ApicHlp_Lock(PPDMDEVINS pDevIns, int rc);
227static DECLCALLBACK(void) pdmR3ApicHlp_Unlock(PPDMDEVINS pDevIns);
228#endif
229static DECLCALLBACK(PCPDMAPICHLPGC) pdmR3ApicHlp_GetGCHelpers(PPDMDEVINS pDevIns);
230static DECLCALLBACK(PCPDMAPICHLPR0) pdmR3ApicHlp_GetR0Helpers(PPDMDEVINS pDevIns);
231/** @} */
232
233
234/** @name HC I/O APIC Helpers
235 * @{
236 */
237static DECLCALLBACK(void) pdmR3IoApicHlp_ApicBusDeliver(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
238 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode);
239#ifdef VBOX_WITH_PDM_LOCK
240static DECLCALLBACK(int) pdmR3IoApicHlp_Lock(PPDMDEVINS pDevIns, int rc);
241static DECLCALLBACK(void) pdmR3IoApicHlp_Unlock(PPDMDEVINS pDevIns);
242#endif
243static DECLCALLBACK(PCPDMIOAPICHLPGC) pdmR3IoApicHlp_GetGCHelpers(PPDMDEVINS pDevIns);
244static DECLCALLBACK(PCPDMIOAPICHLPR0) pdmR3IoApicHlp_GetR0Helpers(PPDMDEVINS pDevIns);
245/** @} */
246
247
248/** @name HC PCI Bus Helpers
249 * @{
250 */
251static DECLCALLBACK(void) pdmR3PciHlp_IsaSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel);
252static DECLCALLBACK(void) pdmR3PciHlp_IoApicSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel);
253#ifdef VBOX_WITH_PDM_LOCK
254static DECLCALLBACK(int) pdmR3PciHlp_Lock(PPDMDEVINS pDevIns, int rc);
255static DECLCALLBACK(void) pdmR3PciHlp_Unlock(PPDMDEVINS pDevIns);
256#endif
257static DECLCALLBACK(PCPDMPCIHLPGC) pdmR3PciHlp_GetGCHelpers(PPDMDEVINS pDevIns);
258static DECLCALLBACK(PCPDMPCIHLPR0) pdmR3PciHlp_GetR0Helpers(PPDMDEVINS pDevIns);
259/** @} */
260
261/** @def PDMDEV_ASSERT_DEVINS
262 * Asserts the validity of the driver instance.
263 */
264#ifdef VBOX_STRICT
265# define PDMDEV_ASSERT_DEVINS(pDevIns) do { Assert(pDevIns); Assert(pDevIns->u32Version == PDM_DEVINS_VERSION); Assert(pDevIns->pvInstanceDataR3 == (void *)&pDevIns->achInstanceData[0]); } while (0)
266#else
267# define PDMDEV_ASSERT_DEVINS(pDevIns) do { } while (0)
268#endif
269static int pdmR3DevLoad(PVM pVM, PPDMDEVREGCBINT pRegCB, const char *pszFilename, const char *pszName);
270
271
272/*
273 * Allow physical read and writes from any thread
274 */
275#define PDM_PHYS_READWRITE_FROM_ANY_THREAD
276
277/*******************************************************************************
278* Global Variables *
279*******************************************************************************/
280/**
281 * The device helper structure for trusted devices.
282 */
283const PDMDEVHLP g_pdmR3DevHlpTrusted =
284{
285 PDM_DEVHLP_VERSION,
286 pdmR3DevHlp_IOPortRegister,
287 pdmR3DevHlp_IOPortRegisterGC,
288 pdmR3DevHlp_IOPortRegisterR0,
289 pdmR3DevHlp_IOPortDeregister,
290 pdmR3DevHlp_MMIORegister,
291 pdmR3DevHlp_MMIORegisterGC,
292 pdmR3DevHlp_MMIORegisterR0,
293 pdmR3DevHlp_MMIODeregister,
294 pdmR3DevHlp_ROMRegister,
295 pdmR3DevHlp_SSMRegister,
296 pdmR3DevHlp_TMTimerCreate,
297 pdmR3DevHlp_TMTimerCreateExternal,
298 pdmR3DevHlp_PCIRegister,
299 pdmR3DevHlp_PCIIORegionRegister,
300 pdmR3DevHlp_PCISetConfigCallbacks,
301 pdmR3DevHlp_PCISetIrq,
302 pdmR3DevHlp_PCISetIrqNoWait,
303 pdmR3DevHlp_ISASetIrq,
304 pdmR3DevHlp_ISASetIrqNoWait,
305 pdmR3DevHlp_DriverAttach,
306 pdmR3DevHlp_MMHeapAlloc,
307 pdmR3DevHlp_MMHeapAllocZ,
308 pdmR3DevHlp_MMHeapFree,
309 pdmR3DevHlp_VMSetError,
310 pdmR3DevHlp_VMSetErrorV,
311 pdmR3DevHlp_VMSetRuntimeError,
312 pdmR3DevHlp_VMSetRuntimeErrorV,
313 pdmR3DevHlp_AssertEMT,
314 pdmR3DevHlp_AssertOther,
315 pdmR3DevHlp_DBGFStopV,
316 pdmR3DevHlp_DBGFInfoRegister,
317 pdmR3DevHlp_STAMRegister,
318 pdmR3DevHlp_STAMRegisterF,
319 pdmR3DevHlp_STAMRegisterV,
320 pdmR3DevHlp_RTCRegister,
321 pdmR3DevHlp_PDMQueueCreate,
322 pdmR3DevHlp_CritSectInit,
323 pdmR3DevHlp_UTCNow,
324 pdmR3DevHlp_PDMThreadCreate,
325 0,
326 0,
327 0,
328 0,
329 0,
330 0,
331 0,
332 0,
333 0,
334 pdmR3DevHlp_GetVM,
335 pdmR3DevHlp_PCIBusRegister,
336 pdmR3DevHlp_PICRegister,
337 pdmR3DevHlp_APICRegister,
338 pdmR3DevHlp_IOAPICRegister,
339 pdmR3DevHlp_DMACRegister,
340 pdmR3DevHlp_PhysRead,
341 pdmR3DevHlp_PhysWrite,
342 pdmR3DevHlp_PhysReadGCVirt,
343 pdmR3DevHlp_PhysWriteGCVirt,
344 pdmR3DevHlp_PhysReserve,
345 pdmR3DevHlp_Phys2HCVirt,
346 pdmR3DevHlp_PhysGCPtr2HCPtr,
347 pdmR3DevHlp_A20IsEnabled,
348 pdmR3DevHlp_A20Set,
349 pdmR3DevHlp_VMReset,
350 pdmR3DevHlp_VMSuspend,
351 pdmR3DevHlp_VMPowerOff,
352 pdmR3DevHlp_LockVM,
353 pdmR3DevHlp_UnlockVM,
354 pdmR3DevHlp_AssertVMLock,
355 pdmR3DevHlp_DMARegister,
356 pdmR3DevHlp_DMAReadMemory,
357 pdmR3DevHlp_DMAWriteMemory,
358 pdmR3DevHlp_DMASetDREQ,
359 pdmR3DevHlp_DMAGetChannelMode,
360 pdmR3DevHlp_DMASchedule,
361 pdmR3DevHlp_CMOSWrite,
362 pdmR3DevHlp_CMOSRead,
363 pdmR3DevHlp_GetCpuId,
364 PDM_DEVHLP_VERSION /* the end */
365};
366
367
368/**
369 * The device helper structure for non-trusted devices.
370 */
371const PDMDEVHLP g_pdmR3DevHlpUnTrusted =
372{
373 PDM_DEVHLP_VERSION,
374 pdmR3DevHlp_IOPortRegister,
375 pdmR3DevHlp_IOPortRegisterGC,
376 pdmR3DevHlp_IOPortRegisterR0,
377 pdmR3DevHlp_IOPortDeregister,
378 pdmR3DevHlp_MMIORegister,
379 pdmR3DevHlp_MMIORegisterGC,
380 pdmR3DevHlp_MMIORegisterR0,
381 pdmR3DevHlp_MMIODeregister,
382 pdmR3DevHlp_ROMRegister,
383 pdmR3DevHlp_SSMRegister,
384 pdmR3DevHlp_TMTimerCreate,
385 pdmR3DevHlp_TMTimerCreateExternal,
386 pdmR3DevHlp_PCIRegister,
387 pdmR3DevHlp_PCIIORegionRegister,
388 pdmR3DevHlp_PCISetConfigCallbacks,
389 pdmR3DevHlp_PCISetIrq,
390 pdmR3DevHlp_PCISetIrqNoWait,
391 pdmR3DevHlp_ISASetIrq,
392 pdmR3DevHlp_ISASetIrqNoWait,
393 pdmR3DevHlp_DriverAttach,
394 pdmR3DevHlp_MMHeapAlloc,
395 pdmR3DevHlp_MMHeapAllocZ,
396 pdmR3DevHlp_MMHeapFree,
397 pdmR3DevHlp_VMSetError,
398 pdmR3DevHlp_VMSetErrorV,
399 pdmR3DevHlp_VMSetRuntimeError,
400 pdmR3DevHlp_VMSetRuntimeErrorV,
401 pdmR3DevHlp_AssertEMT,
402 pdmR3DevHlp_AssertOther,
403 pdmR3DevHlp_DBGFStopV,
404 pdmR3DevHlp_DBGFInfoRegister,
405 pdmR3DevHlp_STAMRegister,
406 pdmR3DevHlp_STAMRegisterF,
407 pdmR3DevHlp_STAMRegisterV,
408 pdmR3DevHlp_RTCRegister,
409 pdmR3DevHlp_PDMQueueCreate,
410 pdmR3DevHlp_CritSectInit,
411 pdmR3DevHlp_UTCNow,
412 pdmR3DevHlp_PDMThreadCreate,
413 0,
414 0,
415 0,
416 0,
417 0,
418 0,
419 0,
420 0,
421 0,
422 pdmR3DevHlp_Untrusted_GetVM,
423 pdmR3DevHlp_Untrusted_PCIBusRegister,
424 pdmR3DevHlp_Untrusted_PICRegister,
425 pdmR3DevHlp_Untrusted_APICRegister,
426 pdmR3DevHlp_Untrusted_IOAPICRegister,
427 pdmR3DevHlp_Untrusted_DMACRegister,
428 pdmR3DevHlp_Untrusted_PhysRead,
429 pdmR3DevHlp_Untrusted_PhysWrite,
430 pdmR3DevHlp_Untrusted_PhysReadGCVirt,
431 pdmR3DevHlp_Untrusted_PhysWriteGCVirt,
432 pdmR3DevHlp_Untrusted_PhysReserve,
433 pdmR3DevHlp_Untrusted_Phys2HCVirt,
434 pdmR3DevHlp_Untrusted_PhysGCPtr2HCPtr,
435 pdmR3DevHlp_Untrusted_A20IsEnabled,
436 pdmR3DevHlp_Untrusted_A20Set,
437 pdmR3DevHlp_Untrusted_VMReset,
438 pdmR3DevHlp_Untrusted_VMSuspend,
439 pdmR3DevHlp_Untrusted_VMPowerOff,
440 pdmR3DevHlp_Untrusted_LockVM,
441 pdmR3DevHlp_Untrusted_UnlockVM,
442 pdmR3DevHlp_Untrusted_AssertVMLock,
443 pdmR3DevHlp_Untrusted_DMARegister,
444 pdmR3DevHlp_Untrusted_DMAReadMemory,
445 pdmR3DevHlp_Untrusted_DMAWriteMemory,
446 pdmR3DevHlp_Untrusted_DMASetDREQ,
447 pdmR3DevHlp_Untrusted_DMAGetChannelMode,
448 pdmR3DevHlp_Untrusted_DMASchedule,
449 pdmR3DevHlp_Untrusted_CMOSWrite,
450 pdmR3DevHlp_Untrusted_CMOSRead,
451 pdmR3DevHlp_Untrusted_QueryCPUId,
452 PDM_DEVHLP_VERSION /* the end */
453};
454
455
456/**
457 * PIC Device Helpers.
458 */
459const PDMPICHLPR3 g_pdmR3DevPicHlp =
460{
461 PDM_PICHLPR3_VERSION,
462 pdmR3PicHlp_SetInterruptFF,
463 pdmR3PicHlp_ClearInterruptFF,
464#ifdef VBOX_WITH_PDM_LOCK
465 pdmR3PicHlp_Lock,
466 pdmR3PicHlp_Unlock,
467#endif
468 pdmR3PicHlp_GetGCHelpers,
469 pdmR3PicHlp_GetR0Helpers,
470 PDM_PICHLPR3_VERSION /* the end */
471};
472
473
474/**
475 * APIC Device Helpers.
476 */
477const PDMAPICHLPR3 g_pdmR3DevApicHlp =
478{
479 PDM_APICHLPR3_VERSION,
480 pdmR3ApicHlp_SetInterruptFF,
481 pdmR3ApicHlp_ClearInterruptFF,
482 pdmR3ApicHlp_ChangeFeature,
483#ifdef VBOX_WITH_PDM_LOCK
484 pdmR3ApicHlp_Lock,
485 pdmR3ApicHlp_Unlock,
486#endif
487 pdmR3ApicHlp_GetGCHelpers,
488 pdmR3ApicHlp_GetR0Helpers,
489 PDM_APICHLPR3_VERSION /* the end */
490};
491
492
493/**
494 * I/O APIC Device Helpers.
495 */
496const PDMIOAPICHLPR3 g_pdmR3DevIoApicHlp =
497{
498 PDM_IOAPICHLPR3_VERSION,
499 pdmR3IoApicHlp_ApicBusDeliver,
500#ifdef VBOX_WITH_PDM_LOCK
501 pdmR3IoApicHlp_Lock,
502 pdmR3IoApicHlp_Unlock,
503#endif
504 pdmR3IoApicHlp_GetGCHelpers,
505 pdmR3IoApicHlp_GetR0Helpers,
506 PDM_IOAPICHLPR3_VERSION /* the end */
507};
508
509
510/**
511 * PCI Bus Device Helpers.
512 */
513const PDMPCIHLPR3 g_pdmR3DevPciHlp =
514{
515 PDM_PCIHLPR3_VERSION,
516 pdmR3PciHlp_IsaSetIrq,
517 pdmR3PciHlp_IoApicSetIrq,
518#ifdef VBOX_WITH_PDM_LOCK
519 pdmR3PciHlp_Lock,
520 pdmR3PciHlp_Unlock,
521#endif
522 pdmR3PciHlp_GetGCHelpers,
523 pdmR3PciHlp_GetR0Helpers,
524 PDM_PCIHLPR3_VERSION, /* the end */
525};
526
527
528/**
529 * DMAC Device Helpers.
530 */
531const PDMDMACHLP g_pdmR3DevDmacHlp =
532{
533 PDM_DMACHLP_VERSION
534};
535
536
537/**
538 * RTC Device Helpers.
539 */
540const PDMRTCHLP g_pdmR3DevRtcHlp =
541{
542 PDM_RTCHLP_VERSION
543};
544
545
546/**
547 * This function will initialize the devices for this VM instance.
548 *
549 *
550 * First of all this mean loading the builtin device and letting them
551 * register themselves. Beyond that any additional device modules are
552 * loaded and called for registration.
553 *
554 * Then the device configuration is enumerated, the instantiation order
555 * is determined, and finally they are instantiated.
556 *
557 * After all device have been successfully instantiated the the primary
558 * PCI Bus device is called to emulate the PCI BIOS, i.e. making the
559 * resource assignments. If there is no PCI device, this step is of course
560 * skipped.
561 *
562 * Finally the init completion routines of the instantiated devices
563 * are called.
564 *
565 * @returns VBox status code.
566 * @param pVM VM Handle.
567 */
568int pdmR3DevInit(PVM pVM)
569{
570 LogFlow(("pdmR3DevInit:\n"));
571
572 AssertRelease(!(RT_OFFSETOF(PDMDEVINS, achInstanceData) & 15));
573 AssertRelease(sizeof(pVM->pdm.s.pDevInstances->Internal.s) <= sizeof(pVM->pdm.s.pDevInstances->Internal.padding));
574
575 /*
576 * Get the GC & R0 devhlps and create the devhlp R3 task queue.
577 */
578 GCPTRTYPE(PCPDMDEVHLPGC) pDevHlpGC;
579 int rc = PDMR3GetSymbolGC(pVM, NULL, "g_pdmGCDevHlp", &pDevHlpGC);
580 AssertReleaseRCReturn(rc, rc);
581
582 R0PTRTYPE(PCPDMDEVHLPR0) pDevHlpR0;
583 rc = PDMR3GetSymbolR0(pVM, NULL, "g_pdmR0DevHlp", &pDevHlpR0);
584 AssertReleaseRCReturn(rc, rc);
585
586 rc = PDMR3QueueCreateInternal(pVM, sizeof(PDMDEVHLPTASK), 8, 0, pdmR3DevHlpQueueConsumer, true, &pVM->pdm.s.pDevHlpQueueHC);
587 AssertRCReturn(rc, rc);
588 pVM->pdm.s.pDevHlpQueueGC = PDMQueueGCPtr(pVM->pdm.s.pDevHlpQueueHC);
589
590
591 /*
592 * Initialize the callback structure.
593 */
594 PDMDEVREGCBINT RegCB;
595 RegCB.Core.u32Version = PDM_DEVREG_CB_VERSION;
596 RegCB.Core.pfnRegister = pdmR3DevReg_Register;
597 RegCB.Core.pfnMMHeapAlloc = pdmR3DevReg_MMHeapAlloc;
598 RegCB.pVM = pVM;
599
600 /*
601 * Load the builtin module
602 */
603 PCFGMNODE pDevicesNode = CFGMR3GetChild(CFGMR3GetRoot(pVM), "PDM/Devices");
604 bool fLoadBuiltin;
605 rc = CFGMR3QueryBool(pDevicesNode, "LoadBuiltin", &fLoadBuiltin);
606 if (rc == VERR_CFGM_VALUE_NOT_FOUND || rc == VERR_CFGM_NO_PARENT)
607 fLoadBuiltin = true;
608 else if (VBOX_FAILURE(rc))
609 {
610 AssertMsgFailed(("Configuration error: Querying boolean \"LoadBuiltin\" failed with %Vrc\n", rc));
611 return rc;
612 }
613 if (fLoadBuiltin)
614 {
615 /* make filename */
616 char *pszFilename = pdmR3FileR3("VBoxDD", /*fShared=*/true);
617 if (!pszFilename)
618 return VERR_NO_TMP_MEMORY;
619 rc = pdmR3DevLoad(pVM, &RegCB, pszFilename, "VBoxDD");
620 RTMemTmpFree(pszFilename);
621 if (VBOX_FAILURE(rc))
622 return rc;
623
624 /* make filename */
625 pszFilename = pdmR3FileR3("VBoxDD2", /*fShared=*/true);
626 if (!pszFilename)
627 return VERR_NO_TMP_MEMORY;
628 rc = pdmR3DevLoad(pVM, &RegCB, pszFilename, "VBoxDD2");
629 RTMemTmpFree(pszFilename);
630 if (VBOX_FAILURE(rc))
631 return rc;
632 }
633
634 /*
635 * Load additional device modules.
636 */
637 PCFGMNODE pCur;
638 for (pCur = CFGMR3GetFirstChild(pDevicesNode); pCur; pCur = CFGMR3GetNextChild(pCur))
639 {
640 /*
641 * Get the name and path.
642 */
643 char szName[PDMMOD_NAME_LEN];
644 rc = CFGMR3GetName(pCur, &szName[0], sizeof(szName));
645 if (rc == VERR_CFGM_NOT_ENOUGH_SPACE)
646 {
647 AssertMsgFailed(("configuration error: The module name is too long, cchName=%d.\n", CFGMR3GetNameLen(pCur)));
648 return VERR_PDM_MODULE_NAME_TOO_LONG;
649 }
650 else if (VBOX_FAILURE(rc))
651 {
652 AssertMsgFailed(("CFGMR3GetName -> %Vrc.\n", rc));
653 return rc;
654 }
655
656 /* the path is optional, if no path the module name + path is used. */
657 char szFilename[RTPATH_MAX];
658 rc = CFGMR3QueryString(pCur, "Path", &szFilename[0], sizeof(szFilename));
659 if (rc == VERR_CFGM_VALUE_NOT_FOUND)
660 strcpy(szFilename, szName);
661 else if (VBOX_FAILURE(rc))
662 {
663 AssertMsgFailed(("configuration error: Failure to query the module path, rc=%Vrc.\n", rc));
664 return rc;
665 }
666
667 /* prepend path? */
668 if (!RTPathHavePath(szFilename))
669 {
670 char *psz = pdmR3FileR3(szFilename);
671 if (!psz)
672 return VERR_NO_TMP_MEMORY;
673 size_t cch = strlen(psz) + 1;
674 if (cch > sizeof(szFilename))
675 {
676 RTMemTmpFree(psz);
677 AssertMsgFailed(("Filename too long! cch=%d '%s'\n", cch, psz));
678 return VERR_FILENAME_TOO_LONG;
679 }
680 memcpy(szFilename, psz, cch);
681 RTMemTmpFree(psz);
682 }
683
684 /*
685 * Load the module and register it's devices.
686 */
687 rc = pdmR3DevLoad(pVM, &RegCB, szFilename, szName);
688 if (VBOX_FAILURE(rc))
689 return rc;
690 }
691
692#ifdef VBOX_WITH_USB
693 /* ditto for USB Devices. */
694 rc = pdmR3UsbLoadModules(pVM);
695 if (RT_FAILURE(rc))
696 return rc;
697#endif
698
699
700 /*
701 *
702 * Enumerate the device instance configurations
703 * and come up with a instantiation order.
704 *
705 */
706 /* Switch to /Devices, which contains the device instantiations. */
707 pDevicesNode = CFGMR3GetChild(CFGMR3GetRoot(pVM), "Devices");
708
709 /*
710 * Count the device instances.
711 */
712 PCFGMNODE pInstanceNode;
713 unsigned cDevs = 0;
714 for (pCur = CFGMR3GetFirstChild(pDevicesNode); pCur; pCur = CFGMR3GetNextChild(pCur))
715 for (pInstanceNode = CFGMR3GetFirstChild(pCur); pInstanceNode; pInstanceNode = CFGMR3GetNextChild(pInstanceNode))
716 cDevs++;
717 if (!cDevs)
718 {
719 Log(("PDM: No devices were configured!\n"));
720 return VINF_SUCCESS;
721 }
722 Log2(("PDM: cDevs=%d!\n", cDevs));
723
724 /*
725 * Collect info on each device instance.
726 */
727 struct DEVORDER
728 {
729 /** Configuration node. */
730 PCFGMNODE pNode;
731 /** Pointer to device. */
732 PPDMDEV pDev;
733 /** Init order. */
734 uint32_t u32Order;
735 /** VBox instance number. */
736 uint32_t iInstance;
737 } *paDevs = (struct DEVORDER *)alloca(sizeof(paDevs[0]) * (cDevs + 1)); /* (One extra for swapping) */
738 Assert(paDevs);
739 unsigned i = 0;
740 for (pCur = CFGMR3GetFirstChild(pDevicesNode); pCur; pCur = CFGMR3GetNextChild(pCur))
741 {
742 /* Get the device name. */
743 char szName[sizeof(paDevs[0].pDev->pDevReg->szDeviceName)];
744 rc = CFGMR3GetName(pCur, szName, sizeof(szName));
745 AssertMsgRCReturn(rc, ("Configuration error: device name is too long (or something)! rc=%Vrc\n", rc), rc);
746
747 /* Find the device. */
748 PPDMDEV pDev = pdmR3DevLookup(pVM, szName);
749 AssertMsgReturn(pDev, ("Configuration error: device '%s' not found!\n", szName), VERR_PDM_DEVICE_NOT_FOUND);
750
751 /* Configured priority or use default based on device class? */
752 uint32_t u32Order;
753 rc = CFGMR3QueryU32(pCur, "Priority", &u32Order);
754 if (rc == VERR_CFGM_VALUE_NOT_FOUND)
755 {
756 uint32_t u32 = pDev->pDevReg->fClass;
757 for (u32Order = 1; !(u32 & u32Order); u32Order <<= 1)
758 /* nop */;
759 }
760 else
761 AssertMsgRCReturn(rc, ("Configuration error: reading \"Priority\" for the '%s' device failed rc=%Vrc!\n", szName, rc), rc);
762
763 /* Enumerate the device instances. */
764 for (pInstanceNode = CFGMR3GetFirstChild(pCur); pInstanceNode; pInstanceNode = CFGMR3GetNextChild(pInstanceNode))
765 {
766 paDevs[i].pNode = pInstanceNode;
767 paDevs[i].pDev = pDev;
768 paDevs[i].u32Order = u32Order;
769
770 /* Get the instance number. */
771 char szInstance[32];
772 rc = CFGMR3GetName(pInstanceNode, szInstance, sizeof(szInstance));
773 AssertMsgRCReturn(rc, ("Configuration error: instance name is too long (or something)! rc=%Vrc\n", rc), rc);
774 char *pszNext = NULL;
775 rc = RTStrToUInt32Ex(szInstance, &pszNext, 0, &paDevs[i].iInstance);
776 AssertMsgRCReturn(rc, ("Configuration error: RTStrToInt32Ex failed on the instance name '%s'! rc=%Vrc\n", szInstance, rc), rc);
777 AssertMsgReturn(!*pszNext, ("Configuration error: the instance name '%s' isn't all digits. (%s)\n", szInstance, pszNext), VERR_INVALID_PARAMETER);
778
779 /* next instance */
780 i++;
781 }
782 } /* devices */
783 Assert(i == cDevs);
784
785 /*
786 * Sort the device array ascending on u32Order. (bubble)
787 */
788 unsigned c = cDevs - 1;
789 while (c)
790 {
791 unsigned j = 0;
792 for (i = 0; i < c; i++)
793 if (paDevs[i].u32Order > paDevs[i + 1].u32Order)
794 {
795 paDevs[cDevs] = paDevs[i + 1];
796 paDevs[i + 1] = paDevs[i];
797 paDevs[i] = paDevs[cDevs];
798 j = i;
799 }
800 c = j;
801 }
802
803
804 /*
805 *
806 * Instantiate the devices.
807 *
808 */
809 for (i = 0; i < cDevs; i++)
810 {
811 /*
812 * Gather a bit of config.
813 */
814 /* trusted */
815 bool fTrusted;
816 rc = CFGMR3QueryBool(paDevs[i].pNode, "Trusted", &fTrusted);
817 if (rc == VERR_CFGM_VALUE_NOT_FOUND)
818 fTrusted = false;
819 else if (VBOX_FAILURE(rc))
820 {
821 AssertMsgFailed(("configuration error: failed to query boolean \"Trusted\", rc=%Vrc\n", rc));
822 return rc;
823 }
824 /* config node */
825 PCFGMNODE pConfigNode = CFGMR3GetChild(paDevs[i].pNode, "Config");
826 if (!pConfigNode)
827 {
828 rc = CFGMR3InsertNode(paDevs[i].pNode, "Config", &pConfigNode);
829 if (VBOX_FAILURE(rc))
830 {
831 AssertMsgFailed(("Failed to create Config node! rc=%Vrc\n", rc));
832 return rc;
833 }
834 }
835 CFGMR3SetRestrictedRoot(pConfigNode);
836
837 /*
838 * Allocate the device instance.
839 */
840 size_t cb = RT_OFFSETOF(PDMDEVINS, achInstanceData[paDevs[i].pDev->pDevReg->cbInstance]);
841 cb = RT_ALIGN_Z(cb, 16);
842 PPDMDEVINS pDevIns;
843 if (paDevs[i].pDev->pDevReg->fFlags & (PDM_DEVREG_FLAGS_GC | PDM_DEVREG_FLAGS_R0))
844 rc = MMR3HyperAllocOnceNoRel(pVM, cb, 0, MM_TAG_PDM_DEVICE, (void **)&pDevIns);
845 else
846 rc = MMR3HeapAllocZEx(pVM, MM_TAG_PDM_DEVICE, cb, (void **)&pDevIns);
847 if (VBOX_FAILURE(rc))
848 {
849 AssertMsgFailed(("Failed to allocate %d bytes of instance data for device '%s'. rc=%Vrc\n",
850 cb, paDevs[i].pDev->pDevReg->szDeviceName, rc));
851 return rc;
852 }
853
854 /*
855 * Initialize it.
856 */
857 pDevIns->u32Version = PDM_DEVINS_VERSION;
858 //pDevIns->Internal.s.pNextHC = NULL;
859 //pDevIns->Internal.s.pPerDeviceNextHC = NULL;
860 pDevIns->Internal.s.pDevHC = paDevs[i].pDev;
861 pDevIns->Internal.s.pVMHC = pVM;
862 pDevIns->Internal.s.pVMGC = pVM->pVMGC;
863 //pDevIns->Internal.s.pLunsHC = NULL;
864 pDevIns->Internal.s.pCfgHandle = paDevs[i].pNode;
865 //pDevIns->Internal.s.pPciDevice = NULL;
866 //pDevIns->Internal.s.pPciBus = NULL; /** @todo pci bus selection. (in 2008 perhaps) */
867 pDevIns->pDevHlp = fTrusted ? &g_pdmR3DevHlpTrusted : &g_pdmR3DevHlpUnTrusted;
868 pDevIns->pDevHlpGC = pDevHlpGC;
869 pDevIns->pDevHlpR0 = pDevHlpR0;
870 pDevIns->pDevReg = paDevs[i].pDev->pDevReg;
871 pDevIns->pCfgHandle = pConfigNode;
872 pDevIns->iInstance = paDevs[i].iInstance;
873 pDevIns->pvInstanceDataR3 = &pDevIns->achInstanceData[0];
874 pDevIns->pvInstanceDataGC = pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_GC
875 ? MMHyperHC2GC(pVM, pDevIns->pvInstanceDataR3) : 0;
876 pDevIns->pvInstanceDataR0 = pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0
877 ? MMHyperR3ToR0(pVM, pDevIns->pvInstanceDataR3) : 0;
878
879 /*
880 * Link it into all the lists.
881 */
882 /* The global instance FIFO. */
883 PPDMDEVINS pPrev1 = pVM->pdm.s.pDevInstances;
884 if (!pPrev1)
885 pVM->pdm.s.pDevInstances = pDevIns;
886 else
887 {
888 while (pPrev1->Internal.s.pNextHC)
889 pPrev1 = pPrev1->Internal.s.pNextHC;
890 pPrev1->Internal.s.pNextHC = pDevIns;
891 }
892
893 /* The per device instance FIFO. */
894 PPDMDEVINS pPrev2 = paDevs[i].pDev->pInstances;
895 if (!pPrev2)
896 paDevs[i].pDev->pInstances = pDevIns;
897 else
898 {
899 while (pPrev2->Internal.s.pPerDeviceNextHC)
900 pPrev2 = pPrev2->Internal.s.pPerDeviceNextHC;
901 pPrev2->Internal.s.pPerDeviceNextHC = pDevIns;
902 }
903
904 /*
905 * Call the constructor.
906 */
907 Log(("PDM: Constructing device '%s' instance %d...\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
908 rc = pDevIns->pDevReg->pfnConstruct(pDevIns, pDevIns->iInstance, pDevIns->pCfgHandle);
909 if (VBOX_FAILURE(rc))
910 {
911 AssertMsgFailed(("Failed to construct '%s'/%d! %Vra\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
912 /* because we're damn lazy right now, we'll say that the destructor will be called even if the constructor fails. */
913 return rc;
914 }
915 } /* for device instances */
916
917#ifdef VBOX_WITH_USB
918 /* ditto for USB Devices. */
919 rc = pdmR3UsbInstantiateDevices(pVM);
920 if (RT_FAILURE(rc))
921 return rc;
922#endif
923
924
925 /*
926 *
927 * PCI BIOS Fake and Init Complete.
928 *
929 */
930 if (pVM->pdm.s.aPciBuses[0].pDevInsR3)
931 {
932 pdmLock(pVM);
933 rc = pVM->pdm.s.aPciBuses[0].pfnFakePCIBIOSR3(pVM->pdm.s.aPciBuses[0].pDevInsR3);
934 pdmUnlock(pVM);
935 if (VBOX_FAILURE(rc))
936 {
937 AssertMsgFailed(("PCI BIOS fake failed rc=%Vrc\n", rc));
938 return rc;
939 }
940 }
941
942 for (PPDMDEVINS pDevIns = pVM->pdm.s.pDevInstances; pDevIns; pDevIns = pDevIns->Internal.s.pNextHC)
943 {
944 if (pDevIns->pDevReg->pfnInitComplete)
945 {
946 rc = pDevIns->pDevReg->pfnInitComplete(pDevIns);
947 if (VBOX_FAILURE(rc))
948 {
949 AssertMsgFailed(("InitComplete on device '%s'/%d failed with rc=%Vrc\n",
950 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
951 return rc;
952 }
953 }
954 }
955
956#ifdef VBOX_WITH_USB
957 /* ditto for USB Devices. */
958 rc = pdmR3UsbInitComplete(pVM);
959 if (RT_FAILURE(rc))
960 return rc;
961#endif
962
963 LogFlow(("pdmR3DevInit: returns %Vrc\n", VINF_SUCCESS));
964 return VINF_SUCCESS;
965}
966
967
968/**
969 * Lookups a device structure by name.
970 * @internal
971 */
972PPDMDEV pdmR3DevLookup(PVM pVM, const char *pszName)
973{
974 RTUINT cchName = strlen(pszName);
975 for (PPDMDEV pDev = pVM->pdm.s.pDevs; pDev; pDev = pDev->pNext)
976 if ( pDev->cchName == cchName
977 && !strcmp(pDev->pDevReg->szDeviceName, pszName))
978 return pDev;
979 return NULL;
980}
981
982
983/**
984 * Loads one device module and call the registration entry point.
985 *
986 * @returns VBox status code.
987 * @param pVM VM handle.
988 * @param pRegCB The registration callback stuff.
989 * @param pszFilename Module filename.
990 * @param pszName Module name.
991 */
992static int pdmR3DevLoad(PVM pVM, PPDMDEVREGCBINT pRegCB, const char *pszFilename, const char *pszName)
993{
994 /*
995 * Load it.
996 */
997 int rc = pdmR3LoadR3(pVM, pszFilename, pszName);
998 if (VBOX_SUCCESS(rc))
999 {
1000 /*
1001 * Get the registration export and call it.
1002 */
1003 FNPDMVBOXDEVICESREGISTER *pfnVBoxDevicesRegister;
1004 rc = PDMR3GetSymbolR3(pVM, pszName, "VBoxDevicesRegister", (void **)&pfnVBoxDevicesRegister);
1005 if (VBOX_SUCCESS(rc))
1006 {
1007 Log(("PDM: Calling VBoxDevicesRegister (%p) of %s (%s)\n", pfnVBoxDevicesRegister, pszName, pszFilename));
1008 rc = pfnVBoxDevicesRegister(&pRegCB->Core, VBOX_VERSION);
1009 if (VBOX_SUCCESS(rc))
1010 Log(("PDM: Successfully loaded device module %s (%s).\n", pszName, pszFilename));
1011 else
1012 AssertMsgFailed(("VBoxDevicesRegister failed with rc=%Vrc for module %s (%s)\n", rc, pszName, pszFilename));
1013 }
1014 else
1015 {
1016 AssertMsgFailed(("Failed to locate 'VBoxDevicesRegister' in %s (%s) rc=%Vrc\n", pszName, pszFilename, rc));
1017 if (rc == VERR_SYMBOL_NOT_FOUND)
1018 rc = VERR_PDM_NO_REGISTRATION_EXPORT;
1019 }
1020 }
1021 else
1022 AssertMsgFailed(("Failed to load VBoxDD!\n"));
1023 return rc;
1024}
1025
1026
1027
1028/**
1029 * Registers a device with the current VM instance.
1030 *
1031 * @returns VBox status code.
1032 * @param pCallbacks Pointer to the callback table.
1033 * @param pDevReg Pointer to the device registration record.
1034 * This data must be permanent and readonly.
1035 */
1036static DECLCALLBACK(int) pdmR3DevReg_Register(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pDevReg)
1037{
1038 /*
1039 * Validate the registration structure.
1040 */
1041 Assert(pDevReg);
1042 if (pDevReg->u32Version != PDM_DEVREG_VERSION)
1043 {
1044 AssertMsgFailed(("Unknown struct version %#x!\n", pDevReg->u32Version));
1045 return VERR_PDM_UNKNOWN_DEVREG_VERSION;
1046 }
1047 if ( !pDevReg->szDeviceName[0]
1048 || strlen(pDevReg->szDeviceName) >= sizeof(pDevReg->szDeviceName))
1049 {
1050 AssertMsgFailed(("Invalid name '%s'\n", pDevReg->szDeviceName));
1051 return VERR_PDM_INVALID_DEVICE_REGISTRATION;
1052 }
1053 if ( (pDevReg->fFlags & PDM_DEVREG_FLAGS_GC)
1054 && ( !pDevReg->szGCMod[0]
1055 || strlen(pDevReg->szGCMod) >= sizeof(pDevReg->szGCMod)))
1056 {
1057 AssertMsgFailed(("Invalid GC module name '%s' - (Device %s)\n", pDevReg->szGCMod, pDevReg->szDeviceName));
1058 return VERR_PDM_INVALID_DEVICE_REGISTRATION;
1059 }
1060 if ( (pDevReg->fFlags & PDM_DEVREG_FLAGS_R0)
1061 && ( !pDevReg->szR0Mod[0]
1062 || strlen(pDevReg->szR0Mod) >= sizeof(pDevReg->szR0Mod)))
1063 {
1064 AssertMsgFailed(("Invalid R0 module name '%s' - (Device %s)\n", pDevReg->szR0Mod, pDevReg->szDeviceName));
1065 return VERR_PDM_INVALID_DEVICE_REGISTRATION;
1066 }
1067 if ((pDevReg->fFlags & PDM_DEVREG_FLAGS_HOST_BITS_MASK) != PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT)
1068 {
1069 AssertMsgFailed(("Invalid host bits flags! fFlags=%#x (Device %s)\n", pDevReg->fFlags, pDevReg->szDeviceName));
1070 return VERR_PDM_INVALID_DEVICE_HOST_BITS;
1071 }
1072 if (!(pDevReg->fFlags & PDM_DEVREG_FLAGS_GUEST_BITS_MASK))
1073 {
1074 AssertMsgFailed(("Invalid guest bits flags! fFlags=%#x (Device %s)\n", pDevReg->fFlags, pDevReg->szDeviceName));
1075 return VERR_PDM_INVALID_DEVICE_REGISTRATION;
1076 }
1077 if (!pDevReg->fClass)
1078 {
1079 AssertMsgFailed(("No class! (Device %s)\n", pDevReg->szDeviceName));
1080 return VERR_PDM_INVALID_DEVICE_REGISTRATION;
1081 }
1082 if (pDevReg->cMaxInstances <= 0)
1083 {
1084 AssertMsgFailed(("Max instances %u! (Device %s)\n", pDevReg->cMaxInstances, pDevReg->szDeviceName));
1085 return VERR_PDM_INVALID_DEVICE_REGISTRATION;
1086 }
1087 if (pDevReg->cbInstance > (RTUINT)(pDevReg->fFlags & (PDM_DEVREG_FLAGS_GC | PDM_DEVREG_FLAGS_R0) ? 96 * _1K : _1M))
1088 {
1089 AssertMsgFailed(("Instance size %d bytes! (Device %s)\n", pDevReg->cbInstance, pDevReg->szDeviceName));
1090 return VERR_PDM_INVALID_DEVICE_REGISTRATION;
1091 }
1092 if (!pDevReg->pfnConstruct)
1093 {
1094 AssertMsgFailed(("No constructore! (Device %s)\n", pDevReg->szDeviceName));
1095 return VERR_PDM_INVALID_DEVICE_REGISTRATION;
1096 }
1097 /* Check matching guest bits last without any asserting. Enables trial and error registration. */
1098 if (!(pDevReg->fFlags & PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT))
1099 {
1100 Log(("PDM: Rejected device '%s' because it didn't match the guest bits.\n", pDevReg->szDeviceName));
1101 return VERR_PDM_INVALID_DEVICE_GUEST_BITS;
1102 }
1103
1104 /*
1105 * Check for duplicate and find FIFO entry at the same time.
1106 */
1107 PCPDMDEVREGCBINT pRegCB = (PCPDMDEVREGCBINT)pCallbacks;
1108 PPDMDEV pDevPrev = NULL;
1109 PPDMDEV pDev = pRegCB->pVM->pdm.s.pDevs;
1110 for (; pDev; pDevPrev = pDev, pDev = pDev->pNext)
1111 {
1112 if (!strcmp(pDev->pDevReg->szDeviceName, pDevReg->szDeviceName))
1113 {
1114 AssertMsgFailed(("Device '%s' already exists\n", pDevReg->szDeviceName));
1115 return VERR_PDM_DEVICE_NAME_CLASH;
1116 }
1117 }
1118
1119 /*
1120 * Allocate new device structure and insert it into the list.
1121 */
1122 pDev = (PPDMDEV)MMR3HeapAlloc(pRegCB->pVM, MM_TAG_PDM_DEVICE, sizeof(*pDev));
1123 if (pDev)
1124 {
1125 pDev->pNext = NULL;
1126 pDev->cInstances = 0;
1127 pDev->pInstances = NULL;
1128 pDev->pDevReg = pDevReg;
1129 pDev->cchName = strlen(pDevReg->szDeviceName);
1130
1131 if (pDevPrev)
1132 pDevPrev->pNext = pDev;
1133 else
1134 pRegCB->pVM->pdm.s.pDevs = pDev;
1135 Log(("PDM: Registered device '%s'\n", pDevReg->szDeviceName));
1136 return VINF_SUCCESS;
1137 }
1138 return VERR_NO_MEMORY;
1139}
1140
1141
1142/**
1143 * Allocate memory which is associated with current VM instance
1144 * and automatically freed on it's destruction.
1145 *
1146 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
1147 * @param pCallbacks Pointer to the callback table.
1148 * @param cb Number of bytes to allocate.
1149 */
1150static DECLCALLBACK(void *) pdmR3DevReg_MMHeapAlloc(PPDMDEVREGCB pCallbacks, size_t cb)
1151{
1152 Assert(pCallbacks);
1153 Assert(pCallbacks->u32Version == PDM_DEVREG_CB_VERSION);
1154 LogFlow(("pdmR3DevReg_MMHeapAlloc: cb=%#x\n", cb));
1155
1156 void *pv = MMR3HeapAlloc(((PPDMDEVREGCBINT)pCallbacks)->pVM, MM_TAG_PDM_DEVICE_USER, cb);
1157
1158 LogFlow(("pdmR3DevReg_MMHeapAlloc: returns %p\n", pv));
1159 return pv;
1160}
1161
1162
1163/**
1164 * Queue consumer callback for internal component.
1165 *
1166 * @returns Success indicator.
1167 * If false the item will not be removed and the flushing will stop.
1168 * @param pVM The VM handle.
1169 * @param pItem The item to consume. Upon return this item will be freed.
1170 */
1171static DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem)
1172{
1173 PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)pItem;
1174 LogFlow(("pdmR3DevHlpQueueConsumer: enmOp=%d pDevIns=%p\n", pTask->enmOp, pTask->pDevInsHC));
1175 switch (pTask->enmOp)
1176 {
1177 case PDMDEVHLPTASKOP_ISA_SET_IRQ:
1178 PDMIsaSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
1179 break;
1180
1181 case PDMDEVHLPTASKOP_PCI_SET_IRQ:
1182 pdmR3DevHlp_PCISetIrq(pTask->pDevInsHC, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
1183 break;
1184
1185 case PDMDEVHLPTASKOP_IOAPIC_SET_IRQ:
1186 PDMIoApicSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
1187 break;
1188
1189 default:
1190 AssertReleaseMsgFailed(("Invalid operation %d\n", pTask->enmOp));
1191 break;
1192 }
1193 return true;
1194}
1195
1196
1197/** @copydoc PDMDEVHLP::pfnIOPortRegister */
1198static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser, PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
1199 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
1200{
1201 PDMDEV_ASSERT_DEVINS(pDevIns);
1202 LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pfnOut=%p pfnIn=%p pfnOutStr=%p pfnInStr=%p p32_tszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
1203 Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc, pszDesc));
1204 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
1205
1206 int rc = IOMR3IOPortRegisterR3(pDevIns->Internal.s.pVMHC, pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
1207
1208 LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1209 return rc;
1210}
1211
1212
1213/** @copydoc PDMDEVHLP::pfnIOPortRegisterGC */
1214static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterGC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTGCPTR pvUser,
1215 const char *pszOut, const char *pszIn,
1216 const char *pszOutStr, const char *pszInStr, const char *pszDesc)
1217{
1218 PDMDEV_ASSERT_DEVINS(pDevIns);
1219 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
1220 LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
1221 Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
1222
1223 /*
1224 * Resolve the functions (one of the can be NULL).
1225 */
1226 int rc = VINF_SUCCESS;
1227 if ( pDevIns->pDevReg->szGCMod[0]
1228 && (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_GC))
1229 {
1230 RTGCPTR GCPtrIn = 0;
1231 if (pszIn)
1232 {
1233 rc = PDMR3GetSymbolGCLazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szGCMod, pszIn, &GCPtrIn);
1234 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pDevReg->szGCMod, pszIn));
1235 }
1236 RTGCPTR GCPtrOut = 0;
1237 if (pszOut && VBOX_SUCCESS(rc))
1238 {
1239 rc = PDMR3GetSymbolGCLazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szGCMod, pszOut, &GCPtrOut);
1240 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pDevReg->szGCMod, pszOut));
1241 }
1242 RTGCPTR GCPtrInStr = 0;
1243 if (pszInStr && VBOX_SUCCESS(rc))
1244 {
1245 rc = PDMR3GetSymbolGCLazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szGCMod, pszInStr, &GCPtrInStr);
1246 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pDevReg->szGCMod, pszInStr));
1247 }
1248 RTGCPTR GCPtrOutStr = 0;
1249 if (pszOutStr && VBOX_SUCCESS(rc))
1250 {
1251 rc = PDMR3GetSymbolGCLazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szGCMod, pszOutStr, &GCPtrOutStr);
1252 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pDevReg->szGCMod, pszOutStr));
1253 }
1254
1255 if (VBOX_SUCCESS(rc))
1256 rc = IOMIOPortRegisterGC(pDevIns->Internal.s.pVMHC, pDevIns, Port, cPorts, pvUser, GCPtrOut, GCPtrIn, GCPtrOutStr, GCPtrInStr, pszDesc);
1257 }
1258 else
1259 {
1260 AssertMsgFailed(("No GC module for this driver!\n"));
1261 rc = VERR_INVALID_PARAMETER;
1262 }
1263
1264 LogFlow(("pdmR3DevHlp_IOPortRegisterGC: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1265 return rc;
1266}
1267
1268
1269/** @copydoc PDMDEVHLP::pfnIOPortRegisterR0 */
1270static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
1271 const char *pszOut, const char *pszIn,
1272 const char *pszOutStr, const char *pszInStr, const char *pszDesc)
1273{
1274 PDMDEV_ASSERT_DEVINS(pDevIns);
1275 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
1276 LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
1277 Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
1278
1279 if (!HWACCMR3IsAllowed(pDevIns->Internal.s.pVMHC))
1280 return VINF_SUCCESS; /* NOP */
1281
1282 /*
1283 * Resolve the functions (one of the can be NULL).
1284 */
1285 int rc = VINF_SUCCESS;
1286 if ( pDevIns->pDevReg->szR0Mod[0]
1287 && (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
1288 {
1289 R0PTRTYPE(PFNIOMIOPORTIN) pfnR0PtrIn = 0;
1290 if (pszIn)
1291 {
1292 rc = PDMR3GetSymbolR0Lazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szR0Mod, pszIn, &pfnR0PtrIn);
1293 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pDevReg->szR0Mod, pszIn));
1294 }
1295 R0PTRTYPE(PFNIOMIOPORTOUT) pfnR0PtrOut = 0;
1296 if (pszOut && VBOX_SUCCESS(rc))
1297 {
1298 rc = PDMR3GetSymbolR0Lazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szR0Mod, pszOut, &pfnR0PtrOut);
1299 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pDevReg->szR0Mod, pszOut));
1300 }
1301 R0PTRTYPE(PFNIOMIOPORTINSTRING) pfnR0PtrInStr = 0;
1302 if (pszInStr && VBOX_SUCCESS(rc))
1303 {
1304 rc = PDMR3GetSymbolR0Lazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szR0Mod, pszInStr, &pfnR0PtrInStr);
1305 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pDevReg->szR0Mod, pszInStr));
1306 }
1307 R0PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnR0PtrOutStr = 0;
1308 if (pszOutStr && VBOX_SUCCESS(rc))
1309 {
1310 rc = PDMR3GetSymbolR0Lazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szR0Mod, pszOutStr, &pfnR0PtrOutStr);
1311 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pDevReg->szR0Mod, pszOutStr));
1312 }
1313
1314 if (VBOX_SUCCESS(rc))
1315 rc = IOMIOPortRegisterR0(pDevIns->Internal.s.pVMHC, pDevIns, Port, cPorts, pvUser, pfnR0PtrOut, pfnR0PtrIn, pfnR0PtrOutStr, pfnR0PtrInStr, pszDesc);
1316 }
1317 else
1318 {
1319 AssertMsgFailed(("No R0 module for this driver!\n"));
1320 rc = VERR_INVALID_PARAMETER;
1321 }
1322
1323 LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1324 return rc;
1325}
1326
1327
1328/** @copydoc PDMDEVHLP::pfnIOPortDeregister */
1329static DECLCALLBACK(int) pdmR3DevHlp_IOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts)
1330{
1331 PDMDEV_ASSERT_DEVINS(pDevIns);
1332 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
1333 LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: Port=%#x cPorts=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
1334 Port, cPorts));
1335
1336 int rc = IOMR3IOPortDeregister(pDevIns->Internal.s.pVMHC, pDevIns, Port, cPorts);
1337
1338 LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1339 return rc;
1340}
1341
1342
1343/** @copydoc PDMDEVHLP::pfnMMIORegister */
1344static DECLCALLBACK(int) pdmR3DevHlp_MMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
1345 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
1346 const char *pszDesc)
1347{
1348 PDMDEV_ASSERT_DEVINS(pDevIns);
1349 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
1350 LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: GCPhysStart=%VGp cbRange=%#x pvUser=%p pfnWrite=%p pfnRead=%p pfnFill=%p pszDesc=%p:{%s}\n",
1351 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc, pszDesc));
1352
1353 int rc = IOMR3MMIORegisterR3(pDevIns->Internal.s.pVMHC, pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
1354
1355 LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1356 return rc;
1357}
1358
1359
1360/** @copydoc PDMDEVHLP::pfnMMIORegisterGC */
1361static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterGC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
1362 const char *pszWrite, const char *pszRead, const char *pszFill,
1363 const char *pszDesc)
1364{
1365 PDMDEV_ASSERT_DEVINS(pDevIns);
1366 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
1367 LogFlow(("pdmR3DevHlp_MMIORegisterGC: caller='%s'/%d: GCPhysStart=%VGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s} pszDesc=%p:{%s}\n",
1368 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill, pszDesc, pszDesc));
1369
1370 /*
1371 * Resolve the functions.
1372 * Not all function have to present, leave it to IOM to enforce this.
1373 */
1374 int rc = VINF_SUCCESS;
1375 if ( pDevIns->pDevReg->szGCMod[0]
1376 && (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_GC))
1377 {
1378 RTGCPTR GCPtrWrite = 0;
1379 if (pszWrite)
1380 rc = PDMR3GetSymbolGCLazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szGCMod, pszWrite, &GCPtrWrite);
1381 RTGCPTR GCPtrRead = 0;
1382 int rc2 = VINF_SUCCESS;
1383 if (pszRead)
1384 rc2 = PDMR3GetSymbolGCLazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szGCMod, pszRead, &GCPtrRead);
1385 RTGCPTR GCPtrFill = 0;
1386 int rc3 = VINF_SUCCESS;
1387 if (pszFill)
1388 rc3 = PDMR3GetSymbolGCLazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szGCMod, pszFill, &GCPtrFill);
1389 if (VBOX_SUCCESS(rc) && VBOX_SUCCESS(rc2) && VBOX_SUCCESS(rc3))
1390 rc = IOMMMIORegisterGC(pDevIns->Internal.s.pVMHC, pDevIns, GCPhysStart, cbRange, pvUser, GCPtrWrite, GCPtrRead, GCPtrFill, pszDesc);
1391 else
1392 {
1393 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pDevReg->szGCMod, pszWrite));
1394 AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pDevReg->szGCMod, pszRead));
1395 AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pDevReg->szGCMod, pszFill));
1396 if (VBOX_FAILURE(rc2) && VBOX_SUCCESS(rc))
1397 rc = rc2;
1398 if (VBOX_FAILURE(rc3) && VBOX_SUCCESS(rc))
1399 rc = rc3;
1400 }
1401 }
1402 else
1403 {
1404 AssertMsgFailed(("No GC module for this driver!\n"));
1405 rc = VERR_INVALID_PARAMETER;
1406 }
1407
1408 LogFlow(("pdmR3DevHlp_MMIORegisterGC: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1409 return rc;
1410}
1411
1412/** @copydoc PDMDEVHLP::pfnMMIORegisterR0 */
1413static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
1414 const char *pszWrite, const char *pszRead, const char *pszFill,
1415 const char *pszDesc)
1416{
1417 PDMDEV_ASSERT_DEVINS(pDevIns);
1418 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
1419 LogFlow(("pdmR3DevHlp_MMIORegisterHC: caller='%s'/%d: GCPhysStart=%VGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s} pszDesc=%p:{%s}\n",
1420 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill, pszDesc, pszDesc));
1421
1422 if (!HWACCMR3IsAllowed(pDevIns->Internal.s.pVMHC))
1423 return VINF_SUCCESS; /* NOP */
1424
1425 /*
1426 * Resolve the functions.
1427 * Not all function have to present, leave it to IOM to enforce this.
1428 */
1429 int rc = VINF_SUCCESS;
1430 if ( pDevIns->pDevReg->szR0Mod[0]
1431 && (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
1432 {
1433 R0PTRTYPE(PFNIOMMMIOWRITE) pfnR0PtrWrite = 0;
1434 if (pszWrite)
1435 rc = PDMR3GetSymbolR0Lazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szR0Mod, pszWrite, &pfnR0PtrWrite);
1436 R0PTRTYPE(PFNIOMMMIOREAD) pfnR0PtrRead = 0;
1437 int rc2 = VINF_SUCCESS;
1438 if (pszRead)
1439 rc2 = PDMR3GetSymbolR0Lazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szR0Mod, pszRead, &pfnR0PtrRead);
1440 R0PTRTYPE(PFNIOMMMIOFILL) pfnR0PtrFill = 0;
1441 int rc3 = VINF_SUCCESS;
1442 if (pszFill)
1443 rc3 = PDMR3GetSymbolR0Lazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szR0Mod, pszFill, &pfnR0PtrFill);
1444 if (VBOX_SUCCESS(rc) && VBOX_SUCCESS(rc2) && VBOX_SUCCESS(rc3))
1445 rc = IOMMMIORegisterR0(pDevIns->Internal.s.pVMHC, pDevIns, GCPhysStart, cbRange, pvUser, pfnR0PtrWrite, pfnR0PtrRead, pfnR0PtrFill, pszDesc);
1446 else
1447 {
1448 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pDevReg->szR0Mod, pszWrite));
1449 AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pDevReg->szR0Mod, pszRead));
1450 AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pDevReg->szR0Mod, pszFill));
1451 if (VBOX_FAILURE(rc2) && VBOX_SUCCESS(rc))
1452 rc = rc2;
1453 if (VBOX_FAILURE(rc3) && VBOX_SUCCESS(rc))
1454 rc = rc3;
1455 }
1456 }
1457 else
1458 {
1459 AssertMsgFailed(("No R0 module for this driver!\n"));
1460 rc = VERR_INVALID_PARAMETER;
1461 }
1462
1463 LogFlow(("pdmR3DevHlp_MMIORegisterR0: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1464 return rc;
1465}
1466
1467
1468/** @copydoc PDMDEVHLP::pfnMMIODeregister */
1469static DECLCALLBACK(int) pdmR3DevHlp_MMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
1470{
1471 PDMDEV_ASSERT_DEVINS(pDevIns);
1472 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
1473 LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: GCPhysStart=%VGp cbRange=%#x\n",
1474 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange));
1475
1476 int rc = IOMR3MMIODeregister(pDevIns->Internal.s.pVMHC, pDevIns, GCPhysStart, cbRange);
1477
1478 LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1479 return rc;
1480}
1481
1482
1483/** @copydoc PDMDEVHLP::pfnROMRegister */
1484static DECLCALLBACK(int) pdmR3DevHlp_ROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, const char *pszDesc)
1485{
1486 PDMDEV_ASSERT_DEVINS(pDevIns);
1487 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
1488 LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: GCPhysStart=%VGp cbRange=%#x pvBinary=%p pszDesc=%p:{%s}\n",
1489 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvBinary, pszDesc, pszDesc));
1490
1491 int rc = MMR3PhysRomRegister(pDevIns->Internal.s.pVMHC, pDevIns, GCPhysStart, cbRange, pvBinary, pszDesc);
1492
1493 LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1494 return rc;
1495}
1496
1497
1498/** @copydoc PDMDEVHLP::pfnSSMRegister */
1499static DECLCALLBACK(int) pdmR3DevHlp_SSMRegister(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
1500 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
1501 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
1502{
1503 PDMDEV_ASSERT_DEVINS(pDevIns);
1504 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
1505 LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: pszName=%p:{%s} u32Instance=%#x u32Version=#x cbGuess=%#x pfnSavePrep=%p pfnSaveExec=%p pfnSaveDone=%p pszLoadPrep=%p pfnLoadExec=%p pfnLoaddone=%p\n",
1506 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pszName, pszName, u32Instance, u32Version, cbGuess, pfnSavePrep, pfnSaveExec, pfnSaveDone, pfnLoadPrep, pfnLoadExec, pfnLoadDone));
1507
1508 int rc = SSMR3Register(pDevIns->Internal.s.pVMHC, pDevIns, pszName, u32Instance, u32Version, cbGuess,
1509 pfnSavePrep, pfnSaveExec, pfnSaveDone,
1510 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
1511
1512 LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1513 return rc;
1514}
1515
1516
1517/** @copydoc PDMDEVHLP::pfnTMTimerCreate */
1518static DECLCALLBACK(int) pdmR3DevHlp_TMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERHC ppTimer)
1519{
1520 PDMDEV_ASSERT_DEVINS(pDevIns);
1521 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
1522 LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: enmClock=%d pfnCallback=%p pszDesc=%p:{%s} ppTimer=%p\n",
1523 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, enmClock, pfnCallback, pszDesc, pszDesc, ppTimer));
1524
1525 int rc = TMR3TimerCreateDevice(pDevIns->Internal.s.pVMHC, pDevIns, enmClock, pfnCallback, pszDesc, ppTimer);
1526
1527 LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1528 return rc;
1529}
1530
1531
1532/** @copydoc PDMDEVHLP::pfnTMTimerCreateExternal */
1533static DECLCALLBACK(PTMTIMERHC) pdmR3DevHlp_TMTimerCreateExternal(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMEREXT pfnCallback, void *pvUser, const char *pszDesc)
1534{
1535 PDMDEV_ASSERT_DEVINS(pDevIns);
1536 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
1537
1538 return TMR3TimerCreateExternal(pDevIns->Internal.s.pVMHC, enmClock, pfnCallback, pvUser, pszDesc);
1539}
1540
1541/** @copydoc PDMDEVHLP::pfnPCIRegister */
1542static DECLCALLBACK(int) pdmR3DevHlp_PCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
1543{
1544 PDMDEV_ASSERT_DEVINS(pDevIns);
1545 PVM pVM = pDevIns->Internal.s.pVMHC;
1546 VM_ASSERT_EMT(pVM);
1547 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: pPciDev=%p:{.config={%#.256Vhxs}\n",
1548 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev, pPciDev->config));
1549
1550 /*
1551 * Validate input.
1552 */
1553 if (!pPciDev)
1554 {
1555 Assert(pPciDev);
1556 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Vrc (pPciDev)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1557 return VERR_INVALID_PARAMETER;
1558 }
1559 if (!pPciDev->config[0] && !pPciDev->config[1])
1560 {
1561 Assert(pPciDev->config[0] || pPciDev->config[1]);
1562 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Vrc (vendor)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1563 return VERR_INVALID_PARAMETER;
1564 }
1565 if (pDevIns->Internal.s.pPciDeviceHC)
1566 {
1567 /** @todo the PCI device vs. PDM device designed is a bit flawed if we have to
1568 * support a PDM device with multiple PCI devices. This might become a problem
1569 * when upgrading the chipset for instance...
1570 */
1571 AssertMsgFailed(("Only one PCI device per device is currently implemented!\n"));
1572 return VERR_INTERNAL_ERROR;
1573 }
1574
1575 /*
1576 * Choose the PCI bus for the device.
1577 * This is simple. If the device was configured for a particular bus, it'll
1578 * already have one. If not, we'll just take the first one.
1579 */
1580 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusHC;
1581 if (!pBus)
1582 pBus = pDevIns->Internal.s.pPciBusHC = &pVM->pdm.s.aPciBuses[0];
1583 int rc;
1584 if (pBus)
1585 {
1586 if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_GC)
1587 pDevIns->Internal.s.pPciBusGC = MMHyperHC2GC(pVM, pDevIns->Internal.s.pPciBusHC);
1588
1589 /*
1590 * Check the configuration for PCI device and function assignment.
1591 */
1592 int iDev = -1;
1593 uint8_t u8Device;
1594 rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIDeviceNo", &u8Device);
1595 if (VBOX_SUCCESS(rc))
1596 {
1597 if (u8Device > 31)
1598 {
1599 AssertMsgFailed(("Configuration error: PCIDeviceNo=%d, max is 31. (%s/%d)\n",
1600 u8Device, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1601 return VERR_INTERNAL_ERROR;
1602 }
1603
1604 uint8_t u8Function;
1605 rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIFunctionNo", &u8Function);
1606 if (VBOX_FAILURE(rc))
1607 {
1608 AssertMsgFailed(("Configuration error: PCIDeviceNo, but PCIFunctionNo query failed with rc=%Vrc (%s/%d)\n",
1609 rc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1610 return rc;
1611 }
1612 if (u8Function > 7)
1613 {
1614 AssertMsgFailed(("Configuration error: PCIFunctionNo=%d, max is 7. (%s/%d)\n",
1615 u8Function, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1616 return VERR_INTERNAL_ERROR;
1617 }
1618 iDev = (u8Device << 3) | u8Function;
1619 }
1620 else if (rc != VERR_CFGM_VALUE_NOT_FOUND)
1621 {
1622 AssertMsgFailed(("Configuration error: PCIDeviceNo query failed with rc=%Vrc (%s/%d)\n",
1623 rc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1624 return rc;
1625 }
1626
1627 /*
1628 * Call the pci bus device to do the actual registration.
1629 */
1630 pdmLock(pVM);
1631 rc = pBus->pfnRegisterR3(pBus->pDevInsR3, pPciDev, pDevIns->pDevReg->szDeviceName, iDev);
1632 pdmUnlock(pVM);
1633 if (VBOX_SUCCESS(rc))
1634 {
1635 pDevIns->Internal.s.pPciDeviceHC = pPciDev;
1636 if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_GC)
1637 pDevIns->Internal.s.pPciDeviceGC = MMHyperHC2GC(pVM, pPciDev);
1638 else
1639 pDevIns->Internal.s.pPciDeviceGC = 0;
1640 pPciDev->pDevIns = pDevIns;
1641 Log(("PDM: Registered device '%s'/%d as PCI device %d on bus %d\n",
1642 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev->devfn, pDevIns->Internal.s.pPciBusHC->iBus));
1643 }
1644 }
1645 else
1646 {
1647 AssertMsgFailed(("Configuration error: No PCI bus available. This could be related to init order too!\n"));
1648 rc = VERR_PDM_NO_PCI_BUS;
1649 }
1650
1651 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1652 return rc;
1653}
1654
1655
1656/** @copydoc PDMDEVHLP::pfnPCIIORegionRegister */
1657static DECLCALLBACK(int) pdmR3DevHlp_PCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
1658{
1659 PDMDEV_ASSERT_DEVINS(pDevIns);
1660 PVM pVM = pDevIns->Internal.s.pVMHC;
1661 VM_ASSERT_EMT(pVM);
1662 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: iRegion=%d cbRegion=%#x enmType=%d pfnCallback=%p\n",
1663 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, cbRegion, enmType, pfnCallback));
1664
1665 /*
1666 * Validate input.
1667 */
1668 if (iRegion < 0 || iRegion >= PCI_NUM_REGIONS)
1669 {
1670 Assert(iRegion >= 0 && iRegion < PCI_NUM_REGIONS);
1671 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Vrc (iRegion)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1672 return VERR_INVALID_PARAMETER;
1673 }
1674 switch (enmType)
1675 {
1676 case PCI_ADDRESS_SPACE_MEM:
1677 case PCI_ADDRESS_SPACE_IO:
1678 case PCI_ADDRESS_SPACE_MEM_PREFETCH:
1679 break;
1680 default:
1681 AssertMsgFailed(("enmType=%#x is unknown\n", enmType));
1682 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Vrc (enmType)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1683 return VERR_INVALID_PARAMETER;
1684 }
1685 if (!pfnCallback)
1686 {
1687 Assert(pfnCallback);
1688 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Vrc (callback)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1689 return VERR_INVALID_PARAMETER;
1690 }
1691 AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
1692
1693 /*
1694 * Must have a PCI device registered!
1695 */
1696 int rc;
1697 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceHC;
1698 if (pPciDev)
1699 {
1700 /*
1701 * We're currently restricted to page aligned MMIO regions.
1702 */
1703 if ( (enmType == PCI_ADDRESS_SPACE_MEM || enmType == PCI_ADDRESS_SPACE_MEM_PREFETCH)
1704 && cbRegion != RT_ALIGN_32(cbRegion, PAGE_SIZE))
1705 {
1706 Log(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: aligning cbRegion %#x -> %#x\n",
1707 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbRegion, RT_ALIGN_32(cbRegion, PAGE_SIZE)));
1708 cbRegion = RT_ALIGN_32(cbRegion, PAGE_SIZE);
1709 }
1710
1711 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusHC;
1712 Assert(pBus);
1713 pdmLock(pVM);
1714 rc = pBus->pfnIORegionRegisterR3(pBus->pDevInsR3, pPciDev, iRegion, cbRegion, enmType, pfnCallback);
1715 pdmUnlock(pVM);
1716 }
1717 else
1718 {
1719 AssertMsgFailed(("No PCI device registered!\n"));
1720 rc = VERR_PDM_NOT_PCI_DEVICE;
1721 }
1722
1723 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1724 return rc;
1725}
1726
1727
1728/** @copydoc PDMDEVHLP::pfnPCISetConfigCallbacks */
1729static DECLCALLBACK(void) pdmR3DevHlp_PCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
1730 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
1731{
1732 PDMDEV_ASSERT_DEVINS(pDevIns);
1733 PVM pVM = pDevIns->Internal.s.pVMHC;
1734 VM_ASSERT_EMT(pVM);
1735 LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: pPciDev=%p pfnRead=%p ppfnReadOld=%p pfnWrite=%p ppfnWriteOld=%p\n",
1736 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld));
1737
1738 /*
1739 * Validate input and resolve defaults.
1740 */
1741 AssertPtr(pfnRead);
1742 AssertPtr(pfnWrite);
1743 AssertPtrNull(ppfnReadOld);
1744 AssertPtrNull(ppfnWriteOld);
1745 AssertPtrNull(pPciDev);
1746
1747 if (!pPciDev)
1748 pPciDev = pDevIns->Internal.s.pPciDeviceHC;
1749 AssertReleaseMsg(pPciDev, ("You must register your device first!\n"));
1750 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusHC;
1751 AssertRelease(pBus);
1752 AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
1753
1754 /*
1755 * Do the job.
1756 */
1757 pdmLock(pVM);
1758 pBus->pfnSetConfigCallbacksR3(pBus->pDevInsR3, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
1759 pdmUnlock(pVM);
1760
1761 LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1762}
1763
1764
1765/** @copydoc PDMDEVHLP::pfnPCISetIrq */
1766static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1767{
1768 PDMDEV_ASSERT_DEVINS(pDevIns);
1769 LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iIrq, iLevel));
1770
1771 /*
1772 * Validate input.
1773 */
1774 /** @todo iIrq and iLevel checks. */
1775
1776 /*
1777 * Must have a PCI device registered!
1778 */
1779 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceHC;
1780 if (pPciDev)
1781 {
1782 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusHC; /** @todo the bus should be associated with the PCI device not the PDM device. */
1783 Assert(pBus);
1784#ifdef VBOX_WITH_PDM_LOCK
1785 PVM pVM = pDevIns->Internal.s.pVMHC;
1786 pdmLock(pVM);
1787 pBus->pfnSetIrqR3(pBus->pDevInsR3, pPciDev, iIrq, iLevel);
1788 pdmUnlock(pVM);
1789
1790#else /* !VBOX_WITH_PDM_LOCK */
1791 /*
1792 * For the convenience of the device we put no thread restriction on this interface.
1793 * That means we'll have to check which thread we're in and choose our path.
1794 */
1795 if (VM_IS_EMT(pDevIns->Internal.s.pVMHC) || VMMR3LockIsOwner(pDevIns->Internal.s.pVMHC))
1796 pBus->pfnSetIrqR3(pBus->pDevInsR3, pPciDev, iIrq, iLevel);
1797 else
1798 {
1799 Log(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: Requesting call in EMT...\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1800 PVMREQ pReq;
1801 int rc = VMR3ReqCallVoid(pDevIns->Internal.s.pVMHC, &pReq, RT_INDEFINITE_WAIT,
1802 (PFNRT)pBus->pfnSetIrqR3, 4, pBus->pDevInsR3, pPciDev, iIrq, iLevel);
1803 while (rc == VERR_TIMEOUT)
1804 rc = VMR3ReqWait(pReq, RT_INDEFINITE_WAIT);
1805 AssertReleaseRC(rc);
1806 VMR3ReqFree(pReq);
1807 }
1808#endif /* !VBOX_WITH_PDM_LOCK */
1809 }
1810 else
1811 AssertReleaseMsgFailed(("No PCI device registered!\n"));
1812
1813 LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1814}
1815
1816
1817/** @copydoc PDMDEVHLP::pfnPCISetIrqNoWait */
1818static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1819{
1820#ifdef VBOX_WITH_PDM_LOCK
1821 pdmR3DevHlp_PCISetIrq(pDevIns, iIrq, iLevel);
1822#else /* !VBOX_WITH_PDM_LOCK */
1823 PDMDEV_ASSERT_DEVINS(pDevIns);
1824 LogFlow(("pdmR3DevHlp_PCISetIrqNoWait: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iIrq, iLevel));
1825
1826 /*
1827 * Validate input.
1828 */
1829 /** @todo iIrq and iLevel checks. */
1830
1831 /*
1832 * Must have a PCI device registered!
1833 */
1834 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceHC;
1835 if (pPciDev)
1836 {
1837 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusHC;
1838 Assert(pBus);
1839
1840 /*
1841 * For the convenience of the device we put no thread restriction on this interface.
1842 * That means we'll have to check which thread we're in and choose our path.
1843 */
1844 if (VM_IS_EMT(pDevIns->Internal.s.pVMHC) || VMMR3LockIsOwner(pDevIns->Internal.s.pVMHC))
1845 pBus->pfnSetIrqR3(pBus->pDevInsR3, pPciDev, iIrq, iLevel);
1846 else
1847 {
1848 Log(("pdmR3DevHlp_PCISetIrqNoWait: caller='%s'/%d: Queueing call in EMT...\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1849 int rc = VMR3ReqCallEx(pDevIns->Internal.s.pVMHC, NULL, RT_INDEFINITE_WAIT, VMREQFLAGS_NO_WAIT | VMREQFLAGS_VOID,
1850 (PFNRT)pBus->pfnSetIrqR3, 4, pBus->pDevInsR3, pPciDev, iIrq, iLevel);
1851 AssertReleaseRC(rc);
1852 }
1853 }
1854 else
1855 AssertReleaseMsgFailed(("No PCI device registered!\n"));
1856
1857 LogFlow(("pdmR3DevHlp_PCISetIrqNoWait: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1858#endif /* !VBOX_WITH_PDM_LOCK */
1859}
1860
1861
1862/** @copydoc PDMDEVHLP::pfnISASetIrq */
1863static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1864{
1865 PDMDEV_ASSERT_DEVINS(pDevIns);
1866 LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iIrq, iLevel));
1867
1868 /*
1869 * Validate input.
1870 */
1871 /** @todo iIrq and iLevel checks. */
1872
1873 PVM pVM = pDevIns->Internal.s.pVMHC;
1874#ifdef VBOX_WITH_PDM_LOCK
1875 PDMIsaSetIrq(pVM, iIrq, iLevel); /* (The API takes the lock.) */
1876#else /* !VBOX_WITH_PDM_LOCK */
1877 if (VM_IS_EMT(pDevIns->Internal.s.pVMHC) || VMMR3LockIsOwner(pDevIns->Internal.s.pVMHC))
1878 PDMIsaSetIrq(pVM, iIrq, iLevel);
1879 else
1880 {
1881 Log(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: Requesting call in EMT...\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1882 PVMREQ pReq;
1883 int rc = VMR3ReqCallVoid(pDevIns->Internal.s.pVMHC, &pReq, RT_INDEFINITE_WAIT,
1884 (PFNRT)PDMIsaSetIrq, 3, pVM, iIrq, iLevel);
1885 while (rc == VERR_TIMEOUT)
1886 rc = VMR3ReqWait(pReq, RT_INDEFINITE_WAIT);
1887 AssertReleaseRC(rc);
1888 VMR3ReqFree(pReq);
1889 }
1890#endif /* !VBOX_WITH_PDM_LOCK */
1891
1892 LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1893}
1894
1895/** @copydoc PDMDEVHLP::pfnISASetIrqNoWait */
1896static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1897{
1898#ifdef VBOX_WITH_PDM_LOCK
1899 pdmR3DevHlp_ISASetIrq(pDevIns, iIrq, iLevel);
1900#else /* !VBOX_WITH_PDM_LOCK */
1901 PDMDEV_ASSERT_DEVINS(pDevIns);
1902 LogFlow(("pdmR3DevHlp_ISASetIrqNoWait: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iIrq, iLevel));
1903
1904 /*
1905 * Validate input.
1906 */
1907 /** @todo iIrq and iLevel checks. */
1908
1909 PVM pVM = pDevIns->Internal.s.pVMHC;
1910 /*
1911 * For the convenience of the device we put no thread restriction on this interface.
1912 * That means we'll have to check which thread we're in and choose our path.
1913 */
1914 if (VM_IS_EMT(pDevIns->Internal.s.pVMHC) || VMMR3LockIsOwner(pDevIns->Internal.s.pVMHC))
1915 PDMIsaSetIrq(pVM, iIrq, iLevel);
1916 else
1917 {
1918 Log(("pdmR3DevHlp_ISASetIrqNoWait: caller='%s'/%d: Queueing call in EMT...\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1919 int rc = VMR3ReqCallEx(pDevIns->Internal.s.pVMHC, NULL, 0, VMREQFLAGS_NO_WAIT | VMREQFLAGS_VOID,
1920 (PFNRT)PDMIsaSetIrq, 3, pVM, iIrq, iLevel);
1921 AssertReleaseRC(rc);
1922 }
1923
1924 LogFlow(("pdmR3DevHlp_ISASetIrqNoWait: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1925#endif /* !VBOX_WITH_PDM_LOCK */
1926}
1927
1928
1929/** @copydoc PDMDEVHLP::pfnDriverAttach */
1930static DECLCALLBACK(int) pdmR3DevHlp_DriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
1931{
1932 PDMDEV_ASSERT_DEVINS(pDevIns);
1933 PVM pVM = pDevIns->Internal.s.pVMHC;
1934 VM_ASSERT_EMT(pVM);
1935 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: iLun=%d pBaseInterface=%p ppBaseInterface=%p pszDesc=%p:{%s}\n",
1936 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iLun, pBaseInterface, ppBaseInterface, pszDesc, pszDesc));
1937
1938 /*
1939 * Lookup the LUN, it might already be registered.
1940 */
1941 PPDMLUN pLunPrev = NULL;
1942 PPDMLUN pLun = pDevIns->Internal.s.pLunsHC;
1943 for (; pLun; pLunPrev = pLun, pLun = pLun->pNext)
1944 if (pLun->iLun == iLun)
1945 break;
1946
1947 /*
1948 * Create the LUN if if wasn't found, else check if driver is already attached to it.
1949 */
1950 if (!pLun)
1951 {
1952 if ( !pBaseInterface
1953 || !pszDesc
1954 || !*pszDesc)
1955 {
1956 Assert(pBaseInterface);
1957 Assert(pszDesc || *pszDesc);
1958 return VERR_INVALID_PARAMETER;
1959 }
1960
1961 pLun = (PPDMLUN)MMR3HeapAlloc(pVM, MM_TAG_PDM_LUN, sizeof(*pLun));
1962 if (!pLun)
1963 return VERR_NO_MEMORY;
1964
1965 pLun->iLun = iLun;
1966 pLun->pNext = pLunPrev ? pLunPrev->pNext : NULL;
1967 pLun->pTop = NULL;
1968 pLun->pDevIns = pDevIns;
1969 pLun->pszDesc = pszDesc;
1970 pLun->pBase = pBaseInterface;
1971 if (!pLunPrev)
1972 pDevIns->Internal.s.pLunsHC = pLun;
1973 else
1974 pLunPrev->pNext = pLun;
1975 Log(("pdmR3DevHlp_DriverAttach: Registered LUN#%d '%s' with device '%s'/%d.\n",
1976 iLun, pszDesc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1977 }
1978 else if (pLun->pTop)
1979 {
1980 AssertMsgFailed(("Already attached! The device should keep track of such things!\n"));
1981 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_PDM_DRIVER_ALREADY_ATTACHED));
1982 return VERR_PDM_DRIVER_ALREADY_ATTACHED;
1983 }
1984 Assert(pLun->pBase == pBaseInterface);
1985
1986
1987 /*
1988 * Get the attached driver configuration.
1989 */
1990 int rc;
1991 char szNode[48];
1992 RTStrPrintf(szNode, sizeof(szNode), "LUN#%d", iLun);
1993 PCFGMNODE pNode = CFGMR3GetChild(pDevIns->Internal.s.pCfgHandle, szNode);
1994 if (pNode)
1995 {
1996 char *pszName;
1997 rc = CFGMR3QueryStringAlloc(pNode, "Driver", &pszName);
1998 if (VBOX_SUCCESS(rc))
1999 {
2000 /*
2001 * Find the driver.
2002 */
2003 PPDMDRV pDrv = pdmR3DrvLookup(pVM, pszName);
2004 if (pDrv)
2005 {
2006 /* config node */
2007 PCFGMNODE pConfigNode = CFGMR3GetChild(pNode, "Config");
2008 if (!pConfigNode)
2009 rc = CFGMR3InsertNode(pNode, "Config", &pConfigNode);
2010 if (VBOX_SUCCESS(rc))
2011 {
2012 CFGMR3SetRestrictedRoot(pConfigNode);
2013
2014 /*
2015 * Allocate the driver instance.
2016 */
2017 size_t cb = RT_OFFSETOF(PDMDRVINS, achInstanceData[pDrv->pDrvReg->cbInstance]);
2018 cb = RT_ALIGN_Z(cb, 16);
2019 PPDMDRVINS pNew = (PPDMDRVINS)MMR3HeapAllocZ(pVM, MM_TAG_PDM_DRIVER, cb);
2020 if (pNew)
2021 {
2022 /*
2023 * Initialize the instance structure (declaration order).
2024 */
2025 pNew->u32Version = PDM_DRVINS_VERSION;
2026 //pNew->Internal.s.pUp = NULL;
2027 //pNew->Internal.s.pDown = NULL;
2028 pNew->Internal.s.pLun = pLun;
2029 pNew->Internal.s.pDrv = pDrv;
2030 pNew->Internal.s.pVM = pVM;
2031 //pNew->Internal.s.fDetaching = false;
2032 pNew->Internal.s.pCfgHandle = pNode;
2033 pNew->pDrvHlp = &g_pdmR3DrvHlp;
2034 pNew->pDrvReg = pDrv->pDrvReg;
2035 pNew->pCfgHandle = pConfigNode;
2036 pNew->iInstance = pDrv->cInstances++;
2037 pNew->pUpBase = pBaseInterface;
2038 //pNew->pDownBase = NULL;
2039 //pNew->IBase.pfnQueryInterface = NULL;
2040 pNew->pvInstanceData = &pNew->achInstanceData[0];
2041
2042 /*
2043 * Link with LUN and call the constructor.
2044 */
2045 rc = pDrv->pDrvReg->pfnConstruct(pNew, pNew->pCfgHandle);
2046 if (VBOX_SUCCESS(rc))
2047 {
2048 pLun->pTop = pNew;
2049 MMR3HeapFree(pszName);
2050 *ppBaseInterface = &pNew->IBase;
2051 Log(("PDM: Attached driver '%s'/%d to LUN#%d on device '%s'/%d.\n",
2052 pDrv->pDrvReg->szDriverName, pNew->iInstance, iLun, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2053 LogFlow(("pdmR3DevHlp_DriverAttach: caller '%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
2054 /*
2055 * Might return != VINF_SUCCESS (e.g. VINF_NAT_DNS) */
2056 return rc;
2057 }
2058
2059 /*
2060 * Free the driver.
2061 */
2062 pLun->pTop = NULL;
2063 ASMMemFill32(pNew, cb, 0xdeadd0d0);
2064 MMR3HeapFree(pNew);
2065 pDrv->cInstances--;
2066 }
2067 else
2068 {
2069 AssertMsgFailed(("Failed to allocate %d bytes for instantiating driver '%s'\n", cb, pszName));
2070 rc = VERR_NO_MEMORY;
2071 }
2072 }
2073 else
2074 AssertMsgFailed(("Failed to create Config node! rc=%Vrc\n", rc));
2075 }
2076 else
2077 {
2078 AssertMsgFailed(("Driver '%s' wasn't found!\n", pszName));
2079 rc = VERR_PDM_DRIVER_NOT_FOUND;
2080 }
2081 MMR3HeapFree(pszName);
2082 }
2083 else
2084 {
2085 AssertMsgFailed(("Query for string value of \"Driver\" -> %Vrc\n", rc));
2086 if (rc == VERR_CFGM_VALUE_NOT_FOUND)
2087 rc = VERR_PDM_CFG_MISSING_DRIVER_NAME;
2088 }
2089 }
2090 else
2091 rc = VERR_PDM_NO_ATTACHED_DRIVER;
2092
2093
2094 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2095 return rc;
2096}
2097
2098
2099/** @copydoc PDMDEVHLP::pfnMMHeapAlloc */
2100static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
2101{
2102 PDMDEV_ASSERT_DEVINS(pDevIns);
2103 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: cb=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cb));
2104
2105 void *pv = MMR3HeapAlloc(pDevIns->Internal.s.pVMHC, MM_TAG_PDM_DEVICE_USER, cb);
2106
2107 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
2108 return pv;
2109}
2110
2111
2112/** @copydoc PDMDEVHLP::pfnMMHeapAllocZ */
2113static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
2114{
2115 PDMDEV_ASSERT_DEVINS(pDevIns);
2116 LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: cb=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cb));
2117
2118 void *pv = MMR3HeapAllocZ(pDevIns->Internal.s.pVMHC, MM_TAG_PDM_DEVICE_USER, cb);
2119
2120 LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
2121 return pv;
2122}
2123
2124
2125/** @copydoc PDMDEVHLP::pfnMMHeapFree */
2126static DECLCALLBACK(void) pdmR3DevHlp_MMHeapFree(PPDMDEVINS pDevIns, void *pv)
2127{
2128 PDMDEV_ASSERT_DEVINS(pDevIns);
2129 LogFlow(("pdmR3DevHlp_MMHeapFree: caller='%s'/%d: pv=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
2130
2131 MMR3HeapFree(pv);
2132
2133 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2134}
2135
2136
2137/** @copydoc PDMDEVHLP::pfnVMSetError */
2138static DECLCALLBACK(int) pdmR3DevHlp_VMSetError(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
2139{
2140 PDMDEV_ASSERT_DEVINS(pDevIns);
2141 va_list args;
2142 va_start(args, pszFormat);
2143 int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMHC, rc, RT_SRC_POS_ARGS, pszFormat, args); Assert(rc2 == rc); NOREF(rc2);
2144 va_end(args);
2145 return rc;
2146}
2147
2148
2149/** @copydoc PDMDEVHLP::pfnVMSetErrorV */
2150static DECLCALLBACK(int) pdmR3DevHlp_VMSetErrorV(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va)
2151{
2152 PDMDEV_ASSERT_DEVINS(pDevIns);
2153 int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMHC, rc, RT_SRC_POS_ARGS, pszFormat, va); Assert(rc2 == rc); NOREF(rc2);
2154 return rc;
2155}
2156
2157
2158/** @copydoc PDMDEVHLP::pfnVMSetRuntimeError */
2159static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeError(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...)
2160{
2161 PDMDEV_ASSERT_DEVINS(pDevIns);
2162 va_list args;
2163 va_start(args, pszFormat);
2164 int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMHC, fFatal, pszErrorID, pszFormat, args);
2165 va_end(args);
2166 return rc;
2167}
2168
2169
2170/** @copydoc PDMDEVHLP::pfnVMSetRuntimeErrorV */
2171static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeErrorV(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va)
2172{
2173 PDMDEV_ASSERT_DEVINS(pDevIns);
2174 int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMHC, fFatal, pszErrorID, pszFormat, va);
2175 return rc;
2176}
2177
2178
2179/** @copydoc PDMDEVHLP::pfnAssertEMT */
2180static DECLCALLBACK(bool) pdmR3DevHlp_AssertEMT(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
2181{
2182 PDMDEV_ASSERT_DEVINS(pDevIns);
2183 if (VM_IS_EMT(pDevIns->Internal.s.pVMHC))
2184 return true;
2185
2186 char szMsg[100];
2187 RTStrPrintf(szMsg, sizeof(szMsg), "AssertEMT '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance);
2188 AssertMsg1(szMsg, iLine, pszFile, pszFunction);
2189 AssertBreakpoint();
2190 return false;
2191}
2192
2193
2194/** @copydoc PDMDEVHLP::pfnAssertOther */
2195static DECLCALLBACK(bool) pdmR3DevHlp_AssertOther(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
2196{
2197 PDMDEV_ASSERT_DEVINS(pDevIns);
2198 if (!VM_IS_EMT(pDevIns->Internal.s.pVMHC))
2199 return true;
2200
2201 char szMsg[100];
2202 RTStrPrintf(szMsg, sizeof(szMsg), "AssertOther '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance);
2203 AssertMsg1(szMsg, iLine, pszFile, pszFunction);
2204 AssertBreakpoint();
2205 return false;
2206}
2207
2208
2209/** @copydoc PDMDEVHLP::pfnDBGFStopV */
2210static DECLCALLBACK(int) pdmR3DevHlp_DBGFStopV(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args)
2211{
2212 PDMDEV_ASSERT_DEVINS(pDevIns);
2213 LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: pszFile=%p:{%s} iLine=%d pszFunction=%p:{%s} pszFormat=%p:{%s} (%N)\n",
2214 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pszFile, pszFile, iLine, pszFunction, pszFunction, pszFormat, pszFormat, pszFormat, &args));
2215
2216 PVM pVM = pDevIns->Internal.s.pVMHC;
2217 VM_ASSERT_EMT(pVM);
2218 int rc = DBGFR3EventSrcV(pVM, DBGFEVENT_DEV_STOP, pszFile, iLine, pszFunction, pszFormat, args);
2219
2220 LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2221 return rc;
2222}
2223
2224
2225/** @copydoc PDMDEVHLP::pfnDBGFInfoRegister */
2226static DECLCALLBACK(int) pdmR3DevHlp_DBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
2227{
2228 PDMDEV_ASSERT_DEVINS(pDevIns);
2229 LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: pszName=%p:{%s} pszDesc=%p:{%s} pfnHandler=%p\n",
2230 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pszName, pszName, pszDesc, pszDesc, pfnHandler));
2231
2232 PVM pVM = pDevIns->Internal.s.pVMHC;
2233 VM_ASSERT_EMT(pVM);
2234 int rc = DBGFR3InfoRegisterDevice(pVM, pszName, pszDesc, pfnHandler, pDevIns);
2235
2236 LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2237 return rc;
2238}
2239
2240
2241/** @copydoc PDMDEVHLP::pfnSTAMRegister */
2242static DECLCALLBACK(void) pdmR3DevHlp_STAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
2243{
2244 PDMDEV_ASSERT_DEVINS(pDevIns);
2245 PVM pVM = pDevIns->Internal.s.pVMHC;
2246 VM_ASSERT_EMT(pVM);
2247
2248 STAM_REG(pVM, pvSample, enmType, pszName, enmUnit, pszDesc);
2249 NOREF(pVM);
2250}
2251
2252
2253
2254/** @copydoc PDMDEVHLP::pfnSTAMRegisterF */
2255static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2256 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...)
2257{
2258 PDMDEV_ASSERT_DEVINS(pDevIns);
2259 PVM pVM = pDevIns->Internal.s.pVMHC;
2260 VM_ASSERT_EMT(pVM);
2261
2262 va_list args;
2263 va_start(args, pszName);
2264 int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
2265 va_end(args);
2266 AssertRC(rc);
2267
2268 NOREF(pVM);
2269}
2270
2271
2272/** @copydoc PDMDEVHLP::pfnSTAMRegisterV */
2273static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterV(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2274 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args)
2275{
2276 PDMDEV_ASSERT_DEVINS(pDevIns);
2277 PVM pVM = pDevIns->Internal.s.pVMHC;
2278 VM_ASSERT_EMT(pVM);
2279
2280 int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
2281 AssertRC(rc);
2282
2283 NOREF(pVM);
2284}
2285
2286
2287/** @copydoc PDMDEVHLP::pfnRTCRegister */
2288static DECLCALLBACK(int) pdmR3DevHlp_RTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
2289{
2290 PDMDEV_ASSERT_DEVINS(pDevIns);
2291 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
2292 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: pRtcReg=%p:{.u32Version=%#x, .pfnWrite=%p, .pfnRead=%p} ppRtcHlp=%p\n",
2293 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pRtcReg, pRtcReg->u32Version, pRtcReg->pfnWrite,
2294 pRtcReg->pfnWrite, ppRtcHlp));
2295
2296 /*
2297 * Validate input.
2298 */
2299 if (pRtcReg->u32Version != PDM_RTCREG_VERSION)
2300 {
2301 AssertMsgFailed(("u32Version=%#x expected %#x\n", pRtcReg->u32Version,
2302 PDM_RTCREG_VERSION));
2303 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Vrc (version)\n",
2304 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2305 return VERR_INVALID_PARAMETER;
2306 }
2307 if ( !pRtcReg->pfnWrite
2308 || !pRtcReg->pfnRead)
2309 {
2310 Assert(pRtcReg->pfnWrite);
2311 Assert(pRtcReg->pfnRead);
2312 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Vrc (callbacks)\n",
2313 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2314 return VERR_INVALID_PARAMETER;
2315 }
2316
2317 if (!ppRtcHlp)
2318 {
2319 Assert(ppRtcHlp);
2320 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Vrc (ppRtcHlp)\n",
2321 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2322 return VERR_INVALID_PARAMETER;
2323 }
2324
2325 /*
2326 * Only one DMA device.
2327 */
2328 PVM pVM = pDevIns->Internal.s.pVMHC;
2329 if (pVM->pdm.s.pRtc)
2330 {
2331 AssertMsgFailed(("Only one RTC device is supported!\n"));
2332 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Vrc\n",
2333 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2334 return VERR_INVALID_PARAMETER;
2335 }
2336
2337 /*
2338 * Allocate and initialize pci bus structure.
2339 */
2340 int rc = VINF_SUCCESS;
2341 PPDMRTC pRtc = (PPDMRTC)MMR3HeapAlloc(pDevIns->Internal.s.pVMHC, MM_TAG_PDM_DEVICE, sizeof(*pRtc));
2342 if (pRtc)
2343 {
2344 pRtc->pDevIns = pDevIns;
2345 pRtc->Reg = *pRtcReg;
2346 pVM->pdm.s.pRtc = pRtc;
2347
2348 /* set the helper pointer. */
2349 *ppRtcHlp = &g_pdmR3DevRtcHlp;
2350 Log(("PDM: Registered RTC device '%s'/%d pDevIns=%p\n",
2351 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
2352 }
2353 else
2354 rc = VERR_NO_MEMORY;
2355
2356 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Vrc\n",
2357 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2358 return rc;
2359}
2360
2361
2362/** @copydoc PDMDEVHLP::pfnPDMQueueCreate */
2363static DECLCALLBACK(int) pdmR3DevHlp_PDMQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
2364 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue)
2365{
2366 PDMDEV_ASSERT_DEVINS(pDevIns);
2367 LogFlow(("pdmR3DevHlp_PDMQueueCreate: caller='%s'/%d: cbItem=%#x cItems=%#x cMilliesInterval=%u pfnCallback=%p fGCEnabled=%RTbool ppQueue=%p\n",
2368 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, ppQueue));
2369
2370 PVM pVM = pDevIns->Internal.s.pVMHC;
2371 VM_ASSERT_EMT(pVM);
2372 int rc = PDMR3QueueCreateDevice(pVM, pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, ppQueue);
2373
2374 LogFlow(("pdmR3DevHlp_PDMQueueCreate: caller='%s'/%d: returns %Vrc *ppQueue=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, *ppQueue));
2375 return rc;
2376}
2377
2378
2379/** @copydoc PDMDEVHLP::pfnCritSectInit */
2380static DECLCALLBACK(int) pdmR3DevHlp_CritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName)
2381{
2382 PDMDEV_ASSERT_DEVINS(pDevIns);
2383 LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: pCritSect=%p pszName=%p:{%s}\n",
2384 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pCritSect, pszName, pszName));
2385
2386 PVM pVM = pDevIns->Internal.s.pVMHC;
2387 VM_ASSERT_EMT(pVM);
2388 int rc = pdmR3CritSectInitDevice(pVM, pDevIns, pCritSect, pszName);
2389
2390 LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2391 return rc;
2392}
2393
2394
2395/** @copydoc PDMDEVHLP::pfnUTCNow */
2396static DECLCALLBACK(PRTTIMESPEC) pdmR3DevHlp_UTCNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
2397{
2398 PDMDEV_ASSERT_DEVINS(pDevIns);
2399 LogFlow(("pdmR3DevHlp_UTCNow: caller='%s'/%d: pTime=%p\n",
2400 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pTime));
2401
2402 pTime = TMR3UTCNow(pDevIns->Internal.s.pVMHC, pTime);
2403
2404 LogFlow(("pdmR3DevHlp_UTCNow: caller='%s'/%d: returns %RU64\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, RTTimeSpecGetNano(pTime)));
2405 return pTime;
2406}
2407
2408
2409/** @copydoc PDMDEVHLP::pfnPDMThreadCreate */
2410static DECLCALLBACK(int) pdmR3DevHlp_PDMThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
2411 PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
2412{
2413 PDMDEV_ASSERT_DEVINS(pDevIns);
2414 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
2415 LogFlow(("pdmR3DevHlp_PDMThreadCreate: caller='%s'/%d: ppThread=%p pvUser=%p pfnThread=%p pfnWakeup=%p cbStack=%#zx enmType=%d pszName=%p:{%s}\n",
2416 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName, pszName));
2417
2418 int rc = pdmR3ThreadCreateDevice(pDevIns->Internal.s.pVMHC, pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
2419
2420 LogFlow(("pdmR3DevHlp_PDMThreadCreate: caller='%s'/%d: returns %Vrc *ppThread=%RTthrd\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
2421 rc, *ppThread));
2422 return rc;
2423}
2424
2425
2426/** @copydoc PDMDEVHLP::pfnGetVM */
2427static DECLCALLBACK(PVM) pdmR3DevHlp_GetVM(PPDMDEVINS pDevIns)
2428{
2429 PDMDEV_ASSERT_DEVINS(pDevIns);
2430 LogFlow(("pdmR3DevHlp_GetVM: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns->Internal.s.pVMHC));
2431 return pDevIns->Internal.s.pVMHC;
2432}
2433
2434
2435/** @copydoc PDMDEVHLP::pfnPCIBusRegister */
2436static DECLCALLBACK(int) pdmR3DevHlp_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
2437{
2438 PDMDEV_ASSERT_DEVINS(pDevIns);
2439 PVM pVM = pDevIns->Internal.s.pVMHC;
2440 VM_ASSERT_EMT(pVM);
2441 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: pPciBusReg=%p:{.u32Version=%#x, .pfnRegisterHC=%p, .pfnIORegionRegisterHC=%p, .pfnSetIrqHC=%p, "
2442 ".pfnSaveExecHC=%p, .pfnLoadExecHC=%p, .pfnFakePCIBIOSHC=%p, .pszSetIrqGC=%p:{%s}} ppPciHlpR3=%p\n",
2443 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciBusReg, pPciBusReg->u32Version, pPciBusReg->pfnRegisterHC,
2444 pPciBusReg->pfnIORegionRegisterHC, pPciBusReg->pfnSetIrqHC, pPciBusReg->pfnSaveExecHC, pPciBusReg->pfnLoadExecHC,
2445 pPciBusReg->pfnFakePCIBIOSHC, pPciBusReg->pszSetIrqGC, pPciBusReg->pszSetIrqGC, ppPciHlpR3));
2446
2447 /*
2448 * Validate the structure.
2449 */
2450 if (pPciBusReg->u32Version != PDM_PCIBUSREG_VERSION)
2451 {
2452 AssertMsgFailed(("u32Version=%#x expected %#x\n", pPciBusReg->u32Version, PDM_PCIBUSREG_VERSION));
2453 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Vrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2454 return VERR_INVALID_PARAMETER;
2455 }
2456 if ( !pPciBusReg->pfnRegisterHC
2457 || !pPciBusReg->pfnIORegionRegisterHC
2458 || !pPciBusReg->pfnSetIrqHC
2459 || !pPciBusReg->pfnSaveExecHC
2460 || !pPciBusReg->pfnLoadExecHC
2461 || !pPciBusReg->pfnFakePCIBIOSHC)
2462 {
2463 Assert(pPciBusReg->pfnRegisterHC);
2464 Assert(pPciBusReg->pfnIORegionRegisterHC);
2465 Assert(pPciBusReg->pfnSetIrqHC);
2466 Assert(pPciBusReg->pfnSaveExecHC);
2467 Assert(pPciBusReg->pfnLoadExecHC);
2468 Assert(pPciBusReg->pfnFakePCIBIOSHC);
2469 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Vrc (HC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2470 return VERR_INVALID_PARAMETER;
2471 }
2472 if ( pPciBusReg->pszSetIrqGC
2473 && !VALID_PTR(pPciBusReg->pszSetIrqGC))
2474 {
2475 Assert(VALID_PTR(pPciBusReg->pszSetIrqGC));
2476 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Vrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2477 return VERR_INVALID_PARAMETER;
2478 }
2479 if ( pPciBusReg->pszSetIrqR0
2480 && !VALID_PTR(pPciBusReg->pszSetIrqR0))
2481 {
2482 Assert(VALID_PTR(pPciBusReg->pszSetIrqR0));
2483 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Vrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2484 return VERR_INVALID_PARAMETER;
2485 }
2486 if (!ppPciHlpR3)
2487 {
2488 Assert(ppPciHlpR3);
2489 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Vrc (ppPciHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2490 return VERR_INVALID_PARAMETER;
2491 }
2492
2493 /*
2494 * Find free PCI bus entry.
2495 */
2496 unsigned iBus = 0;
2497 for (iBus = 0; iBus < ELEMENTS(pVM->pdm.s.aPciBuses); iBus++)
2498 if (!pVM->pdm.s.aPciBuses[iBus].pDevInsR3)
2499 break;
2500 if (iBus >= ELEMENTS(pVM->pdm.s.aPciBuses))
2501 {
2502 AssertMsgFailed(("Too many PCI buses. Max=%u\n", ELEMENTS(pVM->pdm.s.aPciBuses)));
2503 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Vrc (pci bus)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2504 return VERR_INVALID_PARAMETER;
2505 }
2506 PPDMPCIBUS pPciBus = &pVM->pdm.s.aPciBuses[iBus];
2507
2508 /*
2509 * Resolve and init the GC bits.
2510 */
2511 if (pPciBusReg->pszSetIrqGC)
2512 {
2513 int rc = PDMR3GetSymbolGCLazy(pVM, pDevIns->pDevReg->szGCMod, pPciBusReg->pszSetIrqGC, &pPciBus->pfnSetIrqGC);
2514 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szGCMod, pPciBusReg->pszSetIrqGC, rc));
2515 if (VBOX_FAILURE(rc))
2516 {
2517 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2518 return rc;
2519 }
2520 pPciBus->pDevInsGC = PDMDEVINS_2_GCPTR(pDevIns);
2521 }
2522 else
2523 {
2524 pPciBus->pfnSetIrqGC = 0;
2525 pPciBus->pDevInsGC = 0;
2526 }
2527
2528 /*
2529 * Resolve and init the R0 bits.
2530 */
2531 if ( HWACCMR3IsAllowed(pVM)
2532 && pPciBusReg->pszSetIrqR0)
2533 {
2534 int rc = PDMR3GetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPciBusReg->pszSetIrqR0, &pPciBus->pfnSetIrqR0);
2535 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szR0Mod, pPciBusReg->pszSetIrqR0, rc));
2536 if (VBOX_FAILURE(rc))
2537 {
2538 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2539 return rc;
2540 }
2541 pPciBus->pDevInsR0 = MMHyperR3ToR0(pVM, pDevIns);
2542 }
2543 else
2544 {
2545 pPciBus->pfnSetIrqR0 = 0;
2546 pPciBus->pDevInsR0 = 0;
2547 }
2548
2549 /*
2550 * Init the HC bits.
2551 */
2552 pPciBus->iBus = iBus;
2553 pPciBus->pDevInsR3 = pDevIns;
2554 pPciBus->pfnRegisterR3 = pPciBusReg->pfnRegisterHC;
2555 pPciBus->pfnIORegionRegisterR3 = pPciBusReg->pfnIORegionRegisterHC;
2556 pPciBus->pfnSetConfigCallbacksR3 = pPciBusReg->pfnSetConfigCallbacksHC;
2557 pPciBus->pfnSetIrqR3 = pPciBusReg->pfnSetIrqHC;
2558 pPciBus->pfnSaveExecR3 = pPciBusReg->pfnSaveExecHC;
2559 pPciBus->pfnLoadExecR3 = pPciBusReg->pfnLoadExecHC;
2560 pPciBus->pfnFakePCIBIOSR3 = pPciBusReg->pfnFakePCIBIOSHC;
2561
2562 Log(("PDM: Registered PCI bus device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
2563
2564 /* set the helper pointer and return. */
2565 *ppPciHlpR3 = &g_pdmR3DevPciHlp;
2566 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
2567 return VINF_SUCCESS;
2568}
2569
2570
2571/** @copydoc PDMDEVHLP::pfnPICRegister */
2572static DECLCALLBACK(int) pdmR3DevHlp_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
2573{
2574 PDMDEV_ASSERT_DEVINS(pDevIns);
2575 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
2576 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: pPicReg=%p:{.u32Version=%#x, .pfnSetIrqHC=%p, .pfnGetInterruptHC=%p, .pszGetIrqGC=%p:{%s}, .pszGetInterruptGC=%p:{%s}} ppPicHlpR3=%p\n",
2577 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPicReg, pPicReg->u32Version, pPicReg->pfnSetIrqHC, pPicReg->pfnGetInterruptHC,
2578 pPicReg->pszSetIrqGC, pPicReg->pszSetIrqGC, pPicReg->pszGetInterruptGC, pPicReg->pszGetInterruptGC, ppPicHlpR3));
2579
2580 /*
2581 * Validate input.
2582 */
2583 if (pPicReg->u32Version != PDM_PICREG_VERSION)
2584 {
2585 AssertMsgFailed(("u32Version=%#x expected %#x\n", pPicReg->u32Version, PDM_PICREG_VERSION));
2586 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Vrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2587 return VERR_INVALID_PARAMETER;
2588 }
2589 if ( !pPicReg->pfnSetIrqHC
2590 || !pPicReg->pfnGetInterruptHC)
2591 {
2592 Assert(pPicReg->pfnSetIrqHC);
2593 Assert(pPicReg->pfnGetInterruptHC);
2594 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Vrc (HC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2595 return VERR_INVALID_PARAMETER;
2596 }
2597 if ( ( pPicReg->pszSetIrqGC
2598 || pPicReg->pszGetInterruptGC)
2599 && ( !VALID_PTR(pPicReg->pszSetIrqGC)
2600 || !VALID_PTR(pPicReg->pszGetInterruptGC))
2601 )
2602 {
2603 Assert(VALID_PTR(pPicReg->pszSetIrqGC));
2604 Assert(VALID_PTR(pPicReg->pszGetInterruptGC));
2605 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Vrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2606 return VERR_INVALID_PARAMETER;
2607 }
2608 if ( pPicReg->pszSetIrqGC
2609 && !(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_GC))
2610 {
2611 Assert(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_GC);
2612 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Vrc (GC flag)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2613 return VERR_INVALID_PARAMETER;
2614 }
2615 if ( pPicReg->pszSetIrqR0
2616 && !(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
2617 {
2618 Assert(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0);
2619 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Vrc (R0 flag)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2620 return VERR_INVALID_PARAMETER;
2621 }
2622 if (!ppPicHlpR3)
2623 {
2624 Assert(ppPicHlpR3);
2625 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Vrc (ppPicHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2626 return VERR_INVALID_PARAMETER;
2627 }
2628
2629 /*
2630 * Only one PIC device.
2631 */
2632 PVM pVM = pDevIns->Internal.s.pVMHC;
2633 if (pVM->pdm.s.Pic.pDevInsR3)
2634 {
2635 AssertMsgFailed(("Only one pic device is supported!\n"));
2636 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2637 return VERR_INVALID_PARAMETER;
2638 }
2639
2640 /*
2641 * GC stuff.
2642 */
2643 if (pPicReg->pszSetIrqGC)
2644 {
2645 int rc = PDMR3GetSymbolGCLazy(pVM, pDevIns->pDevReg->szGCMod, pPicReg->pszSetIrqGC, &pVM->pdm.s.Pic.pfnSetIrqGC);
2646 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szGCMod, pPicReg->pszSetIrqGC, rc));
2647 if (VBOX_SUCCESS(rc))
2648 {
2649 rc = PDMR3GetSymbolGCLazy(pVM, pDevIns->pDevReg->szGCMod, pPicReg->pszGetInterruptGC, &pVM->pdm.s.Pic.pfnGetInterruptGC);
2650 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szGCMod, pPicReg->pszGetInterruptGC, rc));
2651 }
2652 if (VBOX_FAILURE(rc))
2653 {
2654 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2655 return rc;
2656 }
2657 pVM->pdm.s.Pic.pDevInsGC = PDMDEVINS_2_GCPTR(pDevIns);
2658 }
2659 else
2660 {
2661 pVM->pdm.s.Pic.pDevInsGC = 0;
2662 pVM->pdm.s.Pic.pfnSetIrqGC = 0;
2663 pVM->pdm.s.Pic.pfnGetInterruptGC = 0;
2664 }
2665
2666 /*
2667 * R0 stuff.
2668 */
2669 if ( HWACCMR3IsAllowed(pVM)
2670 && pPicReg->pszSetIrqR0)
2671 {
2672 int rc = PDMR3GetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPicReg->pszSetIrqR0, &pVM->pdm.s.Pic.pfnSetIrqR0);
2673 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szR0Mod, pPicReg->pszSetIrqR0, rc));
2674 if (VBOX_SUCCESS(rc))
2675 {
2676 rc = PDMR3GetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPicReg->pszGetInterruptR0, &pVM->pdm.s.Pic.pfnGetInterruptR0);
2677 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szR0Mod, pPicReg->pszGetInterruptR0, rc));
2678 }
2679 if (VBOX_FAILURE(rc))
2680 {
2681 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2682 return rc;
2683 }
2684 pVM->pdm.s.Pic.pDevInsR0 = MMHyperR3ToR0(pVM, pDevIns);
2685 Assert(pVM->pdm.s.Pic.pDevInsR0);
2686 }
2687 else
2688 {
2689 pVM->pdm.s.Pic.pfnSetIrqR0 = 0;
2690 pVM->pdm.s.Pic.pfnGetInterruptR0 = 0;
2691 pVM->pdm.s.Pic.pDevInsR0 = 0;
2692 }
2693
2694 /*
2695 * HC stuff.
2696 */
2697 pVM->pdm.s.Pic.pDevInsR3 = pDevIns;
2698 pVM->pdm.s.Pic.pfnSetIrqR3 = pPicReg->pfnSetIrqHC;
2699 pVM->pdm.s.Pic.pfnGetInterruptR3 = pPicReg->pfnGetInterruptHC;
2700 Log(("PDM: Registered PIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
2701
2702 /* set the helper pointer and return. */
2703 *ppPicHlpR3 = &g_pdmR3DevPicHlp;
2704 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
2705 return VINF_SUCCESS;
2706}
2707
2708
2709/** @copydoc PDMDEVHLP::pfnAPICRegister */
2710static DECLCALLBACK(int) pdmR3DevHlp_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
2711{
2712 PDMDEV_ASSERT_DEVINS(pDevIns);
2713 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
2714 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: pApicReg=%p:{.u32Version=%#x, .pfnGetInterruptHC=%p, .pfnSetBaseHC=%p, .pfnGetBaseHC=%p, "
2715 ".pfnSetTPRHC=%p, .pfnGetTPRHC=%p, .pfnBusDeliverHC=%p, pszGetInterruptGC=%p:{%s}, pszSetBaseGC=%p:{%s}, pszGetBaseGC=%p:{%s}, "
2716 ".pszSetTPRGC=%p:{%s}, .pszGetTPRGC=%p:{%s}, .pszBusDeliverGC=%p:{%s}} ppApicHlpR3=%p\n",
2717 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pApicReg, pApicReg->u32Version, pApicReg->pfnGetInterruptHC, pApicReg->pfnSetBaseHC,
2718 pApicReg->pfnGetBaseHC, pApicReg->pfnSetTPRHC, pApicReg->pfnGetTPRHC, pApicReg->pfnBusDeliverHC, pApicReg->pszGetInterruptGC,
2719 pApicReg->pszGetInterruptGC, pApicReg->pszSetBaseGC, pApicReg->pszSetBaseGC, pApicReg->pszGetBaseGC, pApicReg->pszGetBaseGC,
2720 pApicReg->pszSetTPRGC, pApicReg->pszSetTPRGC, pApicReg->pszGetTPRGC, pApicReg->pszGetTPRGC, pApicReg->pszBusDeliverGC,
2721 pApicReg->pszBusDeliverGC, ppApicHlpR3));
2722
2723 /*
2724 * Validate input.
2725 */
2726 if (pApicReg->u32Version != PDM_APICREG_VERSION)
2727 {
2728 AssertMsgFailed(("u32Version=%#x expected %#x\n", pApicReg->u32Version, PDM_APICREG_VERSION));
2729 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Vrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2730 return VERR_INVALID_PARAMETER;
2731 }
2732 if ( !pApicReg->pfnGetInterruptHC
2733 || !pApicReg->pfnSetBaseHC
2734 || !pApicReg->pfnGetBaseHC
2735 || !pApicReg->pfnSetTPRHC
2736 || !pApicReg->pfnGetTPRHC
2737 || !pApicReg->pfnBusDeliverHC)
2738 {
2739 Assert(pApicReg->pfnGetInterruptHC);
2740 Assert(pApicReg->pfnSetBaseHC);
2741 Assert(pApicReg->pfnGetBaseHC);
2742 Assert(pApicReg->pfnSetTPRHC);
2743 Assert(pApicReg->pfnGetTPRHC);
2744 Assert(pApicReg->pfnBusDeliverHC);
2745 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Vrc (HC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2746 return VERR_INVALID_PARAMETER;
2747 }
2748 if ( ( pApicReg->pszGetInterruptGC
2749 || pApicReg->pszSetBaseGC
2750 || pApicReg->pszGetBaseGC
2751 || pApicReg->pszSetTPRGC
2752 || pApicReg->pszGetTPRGC
2753 || pApicReg->pszBusDeliverGC)
2754 && ( !VALID_PTR(pApicReg->pszGetInterruptGC)
2755 || !VALID_PTR(pApicReg->pszSetBaseGC)
2756 || !VALID_PTR(pApicReg->pszGetBaseGC)
2757 || !VALID_PTR(pApicReg->pszSetTPRGC)
2758 || !VALID_PTR(pApicReg->pszGetTPRGC)
2759 || !VALID_PTR(pApicReg->pszBusDeliverGC))
2760 )
2761 {
2762 Assert(VALID_PTR(pApicReg->pszGetInterruptGC));
2763 Assert(VALID_PTR(pApicReg->pszSetBaseGC));
2764 Assert(VALID_PTR(pApicReg->pszGetBaseGC));
2765 Assert(VALID_PTR(pApicReg->pszSetTPRGC));
2766 Assert(VALID_PTR(pApicReg->pszGetTPRGC));
2767 Assert(VALID_PTR(pApicReg->pszBusDeliverGC));
2768 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Vrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2769 return VERR_INVALID_PARAMETER;
2770 }
2771 if ( ( pApicReg->pszGetInterruptR0
2772 || pApicReg->pszSetBaseR0
2773 || pApicReg->pszGetBaseR0
2774 || pApicReg->pszSetTPRR0
2775 || pApicReg->pszGetTPRR0
2776 || pApicReg->pszBusDeliverR0)
2777 && ( !VALID_PTR(pApicReg->pszGetInterruptR0)
2778 || !VALID_PTR(pApicReg->pszSetBaseR0)
2779 || !VALID_PTR(pApicReg->pszGetBaseR0)
2780 || !VALID_PTR(pApicReg->pszSetTPRR0)
2781 || !VALID_PTR(pApicReg->pszGetTPRR0)
2782 || !VALID_PTR(pApicReg->pszBusDeliverR0))
2783 )
2784 {
2785 Assert(VALID_PTR(pApicReg->pszGetInterruptR0));
2786 Assert(VALID_PTR(pApicReg->pszSetBaseR0));
2787 Assert(VALID_PTR(pApicReg->pszGetBaseR0));
2788 Assert(VALID_PTR(pApicReg->pszSetTPRR0));
2789 Assert(VALID_PTR(pApicReg->pszGetTPRR0));
2790 Assert(VALID_PTR(pApicReg->pszBusDeliverR0));
2791 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Vrc (R0 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2792 return VERR_INVALID_PARAMETER;
2793 }
2794 if (!ppApicHlpR3)
2795 {
2796 Assert(ppApicHlpR3);
2797 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Vrc (ppApicHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2798 return VERR_INVALID_PARAMETER;
2799 }
2800
2801 /*
2802 * Only one APIC device. (malc: only in UP case actually)
2803 */
2804 PVM pVM = pDevIns->Internal.s.pVMHC;
2805 if (pVM->pdm.s.Apic.pDevInsR3)
2806 {
2807 AssertMsgFailed(("Only one apic device is supported!\n"));
2808 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2809 return VERR_INVALID_PARAMETER;
2810 }
2811
2812 /*
2813 * Resolve & initialize the GC bits.
2814 */
2815 if (pApicReg->pszGetInterruptGC)
2816 {
2817 int rc = PDMR3GetSymbolGCLazy(pVM, pDevIns->pDevReg->szGCMod, pApicReg->pszGetInterruptGC, &pVM->pdm.s.Apic.pfnGetInterruptGC);
2818 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szGCMod, pApicReg->pszGetInterruptGC, rc));
2819 if (RT_SUCCESS(rc))
2820 {
2821 rc = PDMR3GetSymbolGCLazy(pVM, pDevIns->pDevReg->szGCMod, pApicReg->pszSetBaseGC, &pVM->pdm.s.Apic.pfnSetBaseGC);
2822 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szGCMod, pApicReg->pszSetBaseGC, rc));
2823 }
2824 if (RT_SUCCESS(rc))
2825 {
2826 rc = PDMR3GetSymbolGCLazy(pVM, pDevIns->pDevReg->szGCMod, pApicReg->pszGetBaseGC, &pVM->pdm.s.Apic.pfnGetBaseGC);
2827 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szGCMod, pApicReg->pszGetBaseGC, rc));
2828 }
2829 if (RT_SUCCESS(rc))
2830 {
2831 rc = PDMR3GetSymbolGCLazy(pVM, pDevIns->pDevReg->szGCMod, pApicReg->pszSetTPRGC, &pVM->pdm.s.Apic.pfnSetTPRGC);
2832 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szGCMod, pApicReg->pszSetTPRGC, rc));
2833 }
2834 if (RT_SUCCESS(rc))
2835 {
2836 rc = PDMR3GetSymbolGCLazy(pVM, pDevIns->pDevReg->szGCMod, pApicReg->pszGetTPRGC, &pVM->pdm.s.Apic.pfnGetTPRGC);
2837 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szGCMod, pApicReg->pszGetTPRGC, rc));
2838 }
2839 if (RT_SUCCESS(rc))
2840 {
2841 rc = PDMR3GetSymbolGCLazy(pVM, pDevIns->pDevReg->szGCMod, pApicReg->pszBusDeliverGC, &pVM->pdm.s.Apic.pfnBusDeliverGC);
2842 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szGCMod, pApicReg->pszBusDeliverGC, rc));
2843 }
2844 if (VBOX_FAILURE(rc))
2845 {
2846 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2847 return rc;
2848 }
2849 pVM->pdm.s.Apic.pDevInsGC = PDMDEVINS_2_GCPTR(pDevIns);
2850 }
2851 else
2852 {
2853 pVM->pdm.s.Apic.pDevInsGC = 0;
2854 pVM->pdm.s.Apic.pfnGetInterruptGC = 0;
2855 pVM->pdm.s.Apic.pfnSetBaseGC = 0;
2856 pVM->pdm.s.Apic.pfnGetBaseGC = 0;
2857 pVM->pdm.s.Apic.pfnSetTPRGC = 0;
2858 pVM->pdm.s.Apic.pfnGetTPRGC = 0;
2859 pVM->pdm.s.Apic.pfnBusDeliverGC = 0;
2860 }
2861
2862 /*
2863 * Resolve & initialize the R0 bits.
2864 */
2865 if ( HWACCMR3IsAllowed(pVM)
2866 && pApicReg->pszGetInterruptR0)
2867 {
2868 int rc = PDMR3GetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetInterruptR0, &pVM->pdm.s.Apic.pfnGetInterruptR0);
2869 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetInterruptR0, rc));
2870 if (RT_SUCCESS(rc))
2871 {
2872 rc = PDMR3GetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszSetBaseR0, &pVM->pdm.s.Apic.pfnSetBaseR0);
2873 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszSetBaseR0, rc));
2874 }
2875 if (RT_SUCCESS(rc))
2876 {
2877 rc = PDMR3GetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetBaseR0, &pVM->pdm.s.Apic.pfnGetBaseR0);
2878 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetBaseR0, rc));
2879 }
2880 if (RT_SUCCESS(rc))
2881 {
2882 rc = PDMR3GetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszSetTPRR0, &pVM->pdm.s.Apic.pfnSetTPRR0);
2883 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszSetTPRR0, rc));
2884 }
2885 if (RT_SUCCESS(rc))
2886 {
2887 rc = PDMR3GetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetTPRR0, &pVM->pdm.s.Apic.pfnGetTPRR0);
2888 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetTPRR0, rc));
2889 }
2890 if (RT_SUCCESS(rc))
2891 {
2892 rc = PDMR3GetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszBusDeliverR0, &pVM->pdm.s.Apic.pfnBusDeliverR0);
2893 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszBusDeliverR0, rc));
2894 }
2895 if (VBOX_FAILURE(rc))
2896 {
2897 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2898 return rc;
2899 }
2900 pVM->pdm.s.Apic.pDevInsR0 = MMHyperR3ToR0(pVM, pDevIns);
2901 Assert(pVM->pdm.s.Apic.pDevInsR0);
2902 }
2903 else
2904 {
2905 pVM->pdm.s.Apic.pfnGetInterruptR0 = 0;
2906 pVM->pdm.s.Apic.pfnSetBaseR0 = 0;
2907 pVM->pdm.s.Apic.pfnGetBaseR0 = 0;
2908 pVM->pdm.s.Apic.pfnSetTPRR0 = 0;
2909 pVM->pdm.s.Apic.pfnGetTPRR0 = 0;
2910 pVM->pdm.s.Apic.pfnBusDeliverR0 = 0;
2911 pVM->pdm.s.Apic.pDevInsR0 = 0;
2912 }
2913
2914 /*
2915 * Initialize the HC bits.
2916 */
2917 pVM->pdm.s.Apic.pDevInsR3 = pDevIns;
2918 pVM->pdm.s.Apic.pfnGetInterruptR3 = pApicReg->pfnGetInterruptHC;
2919 pVM->pdm.s.Apic.pfnSetBaseR3 = pApicReg->pfnSetBaseHC;
2920 pVM->pdm.s.Apic.pfnGetBaseR3 = pApicReg->pfnGetBaseHC;
2921 pVM->pdm.s.Apic.pfnSetTPRR3 = pApicReg->pfnSetTPRHC;
2922 pVM->pdm.s.Apic.pfnGetTPRR3 = pApicReg->pfnGetTPRHC;
2923 pVM->pdm.s.Apic.pfnBusDeliverR3 = pApicReg->pfnBusDeliverHC;
2924 Log(("PDM: Registered APIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
2925
2926 /* set the helper pointer and return. */
2927 *ppApicHlpR3 = &g_pdmR3DevApicHlp;
2928 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
2929 return VINF_SUCCESS;
2930}
2931
2932
2933/** @copydoc PDMDEVHLP::pfnIOAPICRegister */
2934static DECLCALLBACK(int) pdmR3DevHlp_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
2935{
2936 PDMDEV_ASSERT_DEVINS(pDevIns);
2937 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
2938 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: pIoApicReg=%p:{.u32Version=%#x, .pfnSetIrqHC=%p, .pszSetIrqGC=%p:{%s}} ppIoApicHlpR3=%p\n",
2939 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pIoApicReg, pIoApicReg->u32Version, pIoApicReg->pfnSetIrqHC, pIoApicReg->pszSetIrqGC,
2940 pIoApicReg->pszSetIrqGC, ppIoApicHlpR3));
2941
2942 /*
2943 * Validate input.
2944 */
2945 if (pIoApicReg->u32Version != PDM_IOAPICREG_VERSION)
2946 {
2947 AssertMsgFailed(("u32Version=%#x expected %#x\n", pIoApicReg->u32Version, PDM_IOAPICREG_VERSION));
2948 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Vrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2949 return VERR_INVALID_PARAMETER;
2950 }
2951 if (!pIoApicReg->pfnSetIrqHC)
2952 {
2953 Assert(pIoApicReg->pfnSetIrqHC);
2954 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Vrc (HC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2955 return VERR_INVALID_PARAMETER;
2956 }
2957 if ( pIoApicReg->pszSetIrqGC
2958 && !VALID_PTR(pIoApicReg->pszSetIrqGC))
2959 {
2960 Assert(VALID_PTR(pIoApicReg->pszSetIrqGC));
2961 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Vrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2962 return VERR_INVALID_PARAMETER;
2963 }
2964 if ( pIoApicReg->pszSetIrqR0
2965 && !VALID_PTR(pIoApicReg->pszSetIrqR0))
2966 {
2967 Assert(VALID_PTR(pIoApicReg->pszSetIrqR0));
2968 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Vrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2969 return VERR_INVALID_PARAMETER;
2970 }
2971 if (!ppIoApicHlpR3)
2972 {
2973 Assert(ppIoApicHlpR3);
2974 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Vrc (ppApicHlp)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2975 return VERR_INVALID_PARAMETER;
2976 }
2977
2978 /*
2979 * The I/O APIC requires the APIC to be present (hacks++).
2980 * If the I/O APIC does GC stuff so must the APIC.
2981 */
2982 PVM pVM = pDevIns->Internal.s.pVMHC;
2983 if (!pVM->pdm.s.Apic.pDevInsR3)
2984 {
2985 AssertMsgFailed(("Configuration error / Init order error! No APIC!\n"));
2986 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Vrc (no APIC)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2987 return VERR_INVALID_PARAMETER;
2988 }
2989 if ( pIoApicReg->pszSetIrqGC
2990 && !pVM->pdm.s.Apic.pDevInsGC)
2991 {
2992 AssertMsgFailed(("Configuration error! APIC doesn't do GC, I/O APIC does!\n"));
2993 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Vrc (no GC APIC)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2994 return VERR_INVALID_PARAMETER;
2995 }
2996
2997 /*
2998 * Only one I/O APIC device.
2999 */
3000 if (pVM->pdm.s.IoApic.pDevInsR3)
3001 {
3002 AssertMsgFailed(("Only one ioapic device is supported!\n"));
3003 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Vrc (only one)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3004 return VERR_INVALID_PARAMETER;
3005 }
3006
3007 /*
3008 * Resolve & initialize the GC bits.
3009 */
3010 if (pIoApicReg->pszSetIrqGC)
3011 {
3012 int rc = PDMR3GetSymbolGCLazy(pVM, pDevIns->pDevReg->szGCMod, pIoApicReg->pszSetIrqGC, &pVM->pdm.s.IoApic.pfnSetIrqGC);
3013 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szGCMod, pIoApicReg->pszSetIrqGC, rc));
3014 if (VBOX_FAILURE(rc))
3015 {
3016 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
3017 return rc;
3018 }
3019 pVM->pdm.s.IoApic.pDevInsGC = PDMDEVINS_2_GCPTR(pDevIns);
3020 }
3021 else
3022 {
3023 pVM->pdm.s.IoApic.pDevInsGC = 0;
3024 pVM->pdm.s.IoApic.pfnSetIrqGC = 0;
3025 }
3026
3027 /*
3028 * Resolve & initialize the R0 bits.
3029 */
3030 if ( HWACCMR3IsAllowed(pVM)
3031 && pIoApicReg->pszSetIrqR0)
3032 {
3033 int rc = PDMR3GetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pIoApicReg->pszSetIrqR0, &pVM->pdm.s.IoApic.pfnSetIrqR0);
3034 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szR0Mod, pIoApicReg->pszSetIrqR0, rc));
3035 if (VBOX_FAILURE(rc))
3036 {
3037 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
3038 return rc;
3039 }
3040 pVM->pdm.s.IoApic.pDevInsR0 = MMHyperR3ToR0(pVM, pDevIns);
3041 Assert(pVM->pdm.s.IoApic.pDevInsR0);
3042 }
3043 else
3044 {
3045 pVM->pdm.s.IoApic.pfnSetIrqR0 = 0;
3046 pVM->pdm.s.IoApic.pDevInsR0 = 0;
3047 }
3048
3049 /*
3050 * Initialize the HC bits.
3051 */
3052 pVM->pdm.s.IoApic.pDevInsR3 = pDevIns;
3053 pVM->pdm.s.IoApic.pfnSetIrqR3 = pIoApicReg->pfnSetIrqHC;
3054 Log(("PDM: Registered I/O APIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
3055
3056 /* set the helper pointer and return. */
3057 *ppIoApicHlpR3 = &g_pdmR3DevIoApicHlp;
3058 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
3059 return VINF_SUCCESS;
3060}
3061
3062
3063/** @copydoc PDMDEVHLP::pfnDMACRegister */
3064static DECLCALLBACK(int) pdmR3DevHlp_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
3065{
3066 PDMDEV_ASSERT_DEVINS(pDevIns);
3067 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
3068 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: pDmacReg=%p:{.u32Version=%#x, .pfnRun=%p, .pfnRegister=%p, .pfnReadMemory=%p, .pfnWriteMemory=%p, .pfnSetDREQ=%p, .pfnGetChannelMode=%p} ppDmacHlp=%p\n",
3069 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDmacReg, pDmacReg->u32Version, pDmacReg->pfnRun, pDmacReg->pfnRegister,
3070 pDmacReg->pfnReadMemory, pDmacReg->pfnWriteMemory, pDmacReg->pfnSetDREQ, pDmacReg->pfnGetChannelMode, ppDmacHlp));
3071
3072 /*
3073 * Validate input.
3074 */
3075 if (pDmacReg->u32Version != PDM_DMACREG_VERSION)
3076 {
3077 AssertMsgFailed(("u32Version=%#x expected %#x\n", pDmacReg->u32Version,
3078 PDM_DMACREG_VERSION));
3079 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Vrc (version)\n",
3080 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3081 return VERR_INVALID_PARAMETER;
3082 }
3083 if ( !pDmacReg->pfnRun
3084 || !pDmacReg->pfnRegister
3085 || !pDmacReg->pfnReadMemory
3086 || !pDmacReg->pfnWriteMemory
3087 || !pDmacReg->pfnSetDREQ
3088 || !pDmacReg->pfnGetChannelMode)
3089 {
3090 Assert(pDmacReg->pfnRun);
3091 Assert(pDmacReg->pfnRegister);
3092 Assert(pDmacReg->pfnReadMemory);
3093 Assert(pDmacReg->pfnWriteMemory);
3094 Assert(pDmacReg->pfnSetDREQ);
3095 Assert(pDmacReg->pfnGetChannelMode);
3096 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Vrc (callbacks)\n",
3097 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3098 return VERR_INVALID_PARAMETER;
3099 }
3100
3101 if (!ppDmacHlp)
3102 {
3103 Assert(ppDmacHlp);
3104 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Vrc (ppDmacHlp)\n",
3105 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3106 return VERR_INVALID_PARAMETER;
3107 }
3108
3109 /*
3110 * Only one DMA device.
3111 */
3112 PVM pVM = pDevIns->Internal.s.pVMHC;
3113 if (pVM->pdm.s.pDmac)
3114 {
3115 AssertMsgFailed(("Only one DMA device is supported!\n"));
3116 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Vrc\n",
3117 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3118 return VERR_INVALID_PARAMETER;
3119 }
3120
3121 /*
3122 * Allocate and initialize pci bus structure.
3123 */
3124 int rc = VINF_SUCCESS;
3125 PPDMDMAC pDmac = (PPDMDMAC)MMR3HeapAlloc(pDevIns->Internal.s.pVMHC, MM_TAG_PDM_DEVICE, sizeof(*pDmac));
3126 if (pDmac)
3127 {
3128 pDmac->pDevIns = pDevIns;
3129 pDmac->Reg = *pDmacReg;
3130 pVM->pdm.s.pDmac = pDmac;
3131
3132 /* set the helper pointer. */
3133 *ppDmacHlp = &g_pdmR3DevDmacHlp;
3134 Log(("PDM: Registered DMAC device '%s'/%d pDevIns=%p\n",
3135 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
3136 }
3137 else
3138 rc = VERR_NO_MEMORY;
3139
3140 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Vrc\n",
3141 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
3142 return rc;
3143}
3144
3145
3146/** @copydoc PDMDEVHLP::pfnPhysRead */
3147static DECLCALLBACK(void) pdmR3DevHlp_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
3148{
3149 PDMDEV_ASSERT_DEVINS(pDevIns);
3150 LogFlow(("pdmR3DevHlp_PhysRead: caller='%s'/%d: GCPhys=%VGp pvBuf=%p cbRead=%#x\n",
3151 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, pvBuf, cbRead));
3152
3153 /*
3154 * For the convenience of the device we put no thread restriction on this interface.
3155 * That means we'll have to check which thread we're in and choose our path.
3156 */
3157#ifdef PDM_PHYS_READWRITE_FROM_ANY_THREAD
3158 PGMPhysRead(pDevIns->Internal.s.pVMHC, GCPhys, pvBuf, cbRead);
3159#else
3160 if (VM_IS_EMT(pDevIns->Internal.s.pVMHC) || VMMR3LockIsOwner(pDevIns->Internal.s.pVMHC))
3161 PGMPhysRead(pDevIns->Internal.s.pVMHC, GCPhys, pvBuf, cbRead);
3162 else
3163 {
3164 Log(("pdmR3DevHlp_PhysRead: caller='%s'/%d: Requesting call in EMT...\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3165 PVMREQ pReq;
3166 int rc = VMR3ReqCallVoid(pDevIns->Internal.s.pVMHC, &pReq, RT_INDEFINITE_WAIT,
3167 (PFNRT)PGMPhysRead, 4, pDevIns->Internal.s.pVMHC, GCPhys, pvBuf, cbRead);
3168 while (rc == VERR_TIMEOUT)
3169 rc = VMR3ReqWait(pReq, RT_INDEFINITE_WAIT);
3170 AssertReleaseRC(rc);
3171 VMR3ReqFree(pReq);
3172 }
3173#endif
3174 Log(("pdmR3DevHlp_PhysRead: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3175}
3176
3177
3178/** @copydoc PDMDEVHLP::pfnPhysWrite */
3179static DECLCALLBACK(void) pdmR3DevHlp_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
3180{
3181 PDMDEV_ASSERT_DEVINS(pDevIns);
3182 LogFlow(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: GCPhys=%VGp pvBuf=%p cbWrite=%#x\n",
3183 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, pvBuf, cbWrite));
3184
3185 /*
3186 * For the convenience of the device we put no thread restriction on this interface.
3187 * That means we'll have to check which thread we're in and choose our path.
3188 */
3189#ifdef PDM_PHYS_READWRITE_FROM_ANY_THREAD
3190 PGMPhysWrite(pDevIns->Internal.s.pVMHC, GCPhys, pvBuf, cbWrite);
3191#else
3192 if (VM_IS_EMT(pDevIns->Internal.s.pVMHC) || VMMR3LockIsOwner(pDevIns->Internal.s.pVMHC))
3193 PGMPhysWrite(pDevIns->Internal.s.pVMHC, GCPhys, pvBuf, cbWrite);
3194 else
3195 {
3196 Log(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: Requesting call in EMT...\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3197 PVMREQ pReq;
3198 int rc = VMR3ReqCallVoid(pDevIns->Internal.s.pVMHC, &pReq, RT_INDEFINITE_WAIT,
3199 (PFNRT)PGMPhysWrite, 4, pDevIns->Internal.s.pVMHC, GCPhys, pvBuf, cbWrite);
3200 while (rc == VERR_TIMEOUT)
3201 rc = VMR3ReqWait(pReq, RT_INDEFINITE_WAIT);
3202 AssertReleaseRC(rc);
3203 VMR3ReqFree(pReq);
3204 }
3205#endif
3206 Log(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3207}
3208
3209
3210/** @copydoc PDMDEVHLP::pfnPhysReadGCVirt */
3211static DECLCALLBACK(int) pdmR3DevHlp_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
3212{
3213 PDMDEV_ASSERT_DEVINS(pDevIns);
3214 LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: pvDst=%p GCVirt=%VGv cb=%#x\n",
3215 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pvDst, GCVirtSrc, cb));
3216
3217 int rc = PGMPhysReadGCPtr(pDevIns->Internal.s.pVMHC, pvDst, GCVirtSrc, cb);
3218
3219 LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
3220
3221 return rc;
3222}
3223
3224
3225/** @copydoc PDMDEVHLP::pfnPhysWriteGCVirt */
3226static DECLCALLBACK(int) pdmR3DevHlp_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
3227{
3228 PDMDEV_ASSERT_DEVINS(pDevIns);
3229 LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: GCVirtDst=%VGv pvSrc=%p cb=%#x\n",
3230 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCVirtDst, pvSrc, cb));
3231
3232 int rc = PGMPhysWriteGCPtr(pDevIns->Internal.s.pVMHC, GCVirtDst, pvSrc, cb);
3233
3234 LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
3235
3236 return rc;
3237}
3238
3239
3240/** @copydoc PDMDEVHLP::pfnPhysReserve */
3241static DECLCALLBACK(int) pdmR3DevHlp_PhysReserve(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc)
3242{
3243 PDMDEV_ASSERT_DEVINS(pDevIns);
3244 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
3245 LogFlow(("pdmR3DevHlp_PhysReserve: caller='%s'/%d: GCPhys=%VGp cbRange=%#x pszDesc=%p:{%s}\n",
3246 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, cbRange, pszDesc, pszDesc));
3247
3248 int rc = MMR3PhysReserve(pDevIns->Internal.s.pVMHC, GCPhys, cbRange, pszDesc);
3249
3250 LogFlow(("pdmR3DevHlp_PhysReserve: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
3251
3252 return rc;
3253}
3254
3255
3256/** @copydoc PDMDEVHLP::pfnPhys2HCVirt */
3257static DECLCALLBACK(int) pdmR3DevHlp_Phys2HCVirt(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR ppvHC)
3258{
3259 PDMDEV_ASSERT_DEVINS(pDevIns);
3260 LogFlow(("pdmR3DevHlp_Phys2HCVirt: caller='%s'/%d: GCPhys=%VGp cbRange=%#x ppvHC=%p\n",
3261 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, cbRange, ppvHC));
3262
3263 int rc = PGMPhysGCPhys2HCPtr(pDevIns->Internal.s.pVMHC, GCPhys, cbRange, ppvHC);
3264
3265 LogFlow(("pdmR3DevHlp_Phys2HCVirt: caller='%s'/%d: returns %Vrc *ppvHC=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, *ppvHC));
3266
3267 return rc;
3268}
3269
3270
3271/** @copydoc PDMDEVHLP::pfnPhysGCPtr2HCPtr */
3272static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPtr2HCPtr(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTHCPTR pHCPtr)
3273{
3274 PDMDEV_ASSERT_DEVINS(pDevIns);
3275 PVM pVM = pDevIns->Internal.s.pVMHC;
3276 VM_ASSERT_EMT(pVM);
3277 LogFlow(("pdmR3DevHlp_PhysGCPtr2HCPtr: caller='%s'/%d: GCPtr=%VGv pHCPtr=%p\n",
3278 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPtr, pHCPtr));
3279
3280 int rc = PGMPhysGCPtr2HCPtr(pVM, GCPtr, pHCPtr);
3281
3282 LogFlow(("pdmR3DevHlp_PhysGCPtr2HCPtr: caller='%s'/%d: returns %Vrc *pHCPtr=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, *pHCPtr));
3283
3284 return rc;
3285}
3286
3287
3288/** @copydoc PDMDEVHLP::pfnA20IsEnabled */
3289static DECLCALLBACK(bool) pdmR3DevHlp_A20IsEnabled(PPDMDEVINS pDevIns)
3290{
3291 PDMDEV_ASSERT_DEVINS(pDevIns);
3292 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
3293
3294 bool fRc = PGMPhysIsA20Enabled(pDevIns->Internal.s.pVMHC);
3295
3296 LogFlow(("pdmR3DevHlp_A20IsEnabled: caller='%s'/%d: returns %d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, fRc));
3297 return fRc;
3298}
3299
3300
3301/** @copydoc PDMDEVHLP::pfnA20Set */
3302static DECLCALLBACK(void) pdmR3DevHlp_A20Set(PPDMDEVINS pDevIns, bool fEnable)
3303{
3304 PDMDEV_ASSERT_DEVINS(pDevIns);
3305 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
3306 LogFlow(("pdmR3DevHlp_A20Set: caller='%s'/%d: fEnable=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, fEnable));
3307 //Assert(*(unsigned *)&fEnable <= 1);
3308 PGMR3PhysSetA20(pDevIns->Internal.s.pVMHC, fEnable);
3309}
3310
3311
3312/** @copydoc PDMDEVHLP::pfnVMReset */
3313static DECLCALLBACK(int) pdmR3DevHlp_VMReset(PPDMDEVINS pDevIns)
3314{
3315 PDMDEV_ASSERT_DEVINS(pDevIns);
3316 PVM pVM = pDevIns->Internal.s.pVMHC;
3317 VM_ASSERT_EMT(pVM);
3318 LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: VM_FF_RESET %d -> 1\n",
3319 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_RESET)));
3320
3321 /*
3322 * We postpone this operation because we're likely to be inside a I/O instruction
3323 * and the EIP will be updated when we return.
3324 * We still return VINF_EM_RESET to break out of any execution loops and force FF evaluation.
3325 */
3326 bool fHaltOnReset;
3327 int rc = CFGMR3QueryBool(CFGMR3GetChild(CFGMR3GetRoot(pVM), "PDM"), "HaltOnReset", &fHaltOnReset);
3328 if (VBOX_SUCCESS(rc) && fHaltOnReset)
3329 {
3330 Log(("pdmR3DevHlp_VMReset: Halt On Reset!\n"));
3331 rc = VINF_EM_HALT;
3332 }
3333 else
3334 {
3335 VM_FF_SET(pVM, VM_FF_RESET);
3336 rc = VINF_EM_RESET;
3337 }
3338
3339 LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
3340 return rc;
3341}
3342
3343
3344/** @copydoc PDMDEVHLP::pfnVMSuspend */
3345static DECLCALLBACK(int) pdmR3DevHlp_VMSuspend(PPDMDEVINS pDevIns)
3346{
3347 PDMDEV_ASSERT_DEVINS(pDevIns);
3348 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
3349 LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d:\n",
3350 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3351
3352 int rc = VMR3Suspend(pDevIns->Internal.s.pVMHC);
3353
3354 LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
3355 return rc;
3356}
3357
3358
3359/** @copydoc PDMDEVHLP::pfnVMPowerOff */
3360static DECLCALLBACK(int) pdmR3DevHlp_VMPowerOff(PPDMDEVINS pDevIns)
3361{
3362 PDMDEV_ASSERT_DEVINS(pDevIns);
3363 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
3364 LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d:\n",
3365 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3366
3367 int rc = VMR3PowerOff(pDevIns->Internal.s.pVMHC);
3368
3369 LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
3370 return rc;
3371}
3372
3373
3374/** @copydoc PDMDEVHLP::pfnLockVM */
3375static DECLCALLBACK(int) pdmR3DevHlp_LockVM(PPDMDEVINS pDevIns)
3376{
3377 return VMMR3Lock(pDevIns->Internal.s.pVMHC);
3378}
3379
3380
3381/** @copydoc PDMDEVHLP::pfnUnlockVM */
3382static DECLCALLBACK(int) pdmR3DevHlp_UnlockVM(PPDMDEVINS pDevIns)
3383{
3384 return VMMR3Unlock(pDevIns->Internal.s.pVMHC);
3385}
3386
3387
3388/** @copydoc PDMDEVHLP::pfnAssertVMLock */
3389static DECLCALLBACK(bool) pdmR3DevHlp_AssertVMLock(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
3390{
3391 PVM pVM = pDevIns->Internal.s.pVMHC;
3392 if (VMMR3LockIsOwner(pVM))
3393 return true;
3394
3395 RTNATIVETHREAD NativeThreadOwner = VMMR3LockGetOwner(pVM);
3396 RTTHREAD ThreadOwner = RTThreadFromNative(NativeThreadOwner);
3397 char szMsg[100];
3398 RTStrPrintf(szMsg, sizeof(szMsg), "AssertVMLocked '%s'/%d ThreadOwner=%RTnthrd/%RTthrd/'%s' Self='%s'\n",
3399 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
3400 NativeThreadOwner, ThreadOwner, RTThreadGetName(ThreadOwner), RTThreadSelfName());
3401 AssertMsg1(szMsg, iLine, pszFile, pszFunction);
3402 AssertBreakpoint();
3403 return false;
3404}
3405
3406/** @copydoc PDMDEVHLP::pfnDMARegister */
3407static DECLCALLBACK(int) pdmR3DevHlp_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
3408{
3409 PDMDEV_ASSERT_DEVINS(pDevIns);
3410 PVM pVM = pDevIns->Internal.s.pVMHC;
3411 VM_ASSERT_EMT(pVM);
3412 LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: uChannel=%d pfnTransferHandler=%p pvUser=%p\n",
3413 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pfnTransferHandler, pvUser));
3414 int rc = VINF_SUCCESS;
3415 if (pVM->pdm.s.pDmac)
3416 pVM->pdm.s.pDmac->Reg.pfnRegister(pVM->pdm.s.pDmac->pDevIns, uChannel, pfnTransferHandler, pvUser);
3417 else
3418 {
3419 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
3420 rc = VERR_PDM_NO_DMAC_INSTANCE;
3421 }
3422 LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: returns %Vrc\n",
3423 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
3424 return rc;
3425}
3426
3427/** @copydoc PDMDEVHLP::pfnDMAReadMemory */
3428static DECLCALLBACK(int) pdmR3DevHlp_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
3429{
3430 PDMDEV_ASSERT_DEVINS(pDevIns);
3431 PVM pVM = pDevIns->Internal.s.pVMHC;
3432 VM_ASSERT_EMT(pVM);
3433 LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbRead=%p\n",
3434 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbRead));
3435 int rc = VINF_SUCCESS;
3436 if (pVM->pdm.s.pDmac)
3437 {
3438 uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnReadMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
3439 if (pcbRead)
3440 *pcbRead = cb;
3441 }
3442 else
3443 {
3444 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
3445 rc = VERR_PDM_NO_DMAC_INSTANCE;
3446 }
3447 LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: returns %Vrc\n",
3448 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
3449 return rc;
3450}
3451
3452/** @copydoc PDMDEVHLP::pfnDMAWriteMemory */
3453static DECLCALLBACK(int) pdmR3DevHlp_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
3454{
3455 PDMDEV_ASSERT_DEVINS(pDevIns);
3456 PVM pVM = pDevIns->Internal.s.pVMHC;
3457 VM_ASSERT_EMT(pVM);
3458 LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbWritten=%p\n",
3459 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbWritten));
3460 int rc = VINF_SUCCESS;
3461 if (pVM->pdm.s.pDmac)
3462 {
3463 uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnWriteMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
3464 if (pcbWritten)
3465 *pcbWritten = cb;
3466 }
3467 else
3468 {
3469 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
3470 rc = VERR_PDM_NO_DMAC_INSTANCE;
3471 }
3472 LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: returns %Vrc\n",
3473 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
3474 return rc;
3475}
3476
3477/** @copydoc PDMDEVHLP::pfnDMASetDREQ */
3478static DECLCALLBACK(int) pdmR3DevHlp_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
3479{
3480 PDMDEV_ASSERT_DEVINS(pDevIns);
3481 PVM pVM = pDevIns->Internal.s.pVMHC;
3482 VM_ASSERT_EMT(pVM);
3483 LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: uChannel=%d uLevel=%d\n",
3484 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, uLevel));
3485 int rc = VINF_SUCCESS;
3486 if (pVM->pdm.s.pDmac)
3487 pVM->pdm.s.pDmac->Reg.pfnSetDREQ(pVM->pdm.s.pDmac->pDevIns, uChannel, uLevel);
3488 else
3489 {
3490 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
3491 rc = VERR_PDM_NO_DMAC_INSTANCE;
3492 }
3493 LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: returns %Vrc\n",
3494 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
3495 return rc;
3496}
3497
3498/** @copydoc PDMDEVHLP::pfnDMAGetChannelMode */
3499static DECLCALLBACK(uint8_t) pdmR3DevHlp_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
3500{
3501 PDMDEV_ASSERT_DEVINS(pDevIns);
3502 PVM pVM = pDevIns->Internal.s.pVMHC;
3503 VM_ASSERT_EMT(pVM);
3504 LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: uChannel=%d\n",
3505 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel));
3506 uint8_t u8Mode;
3507 if (pVM->pdm.s.pDmac)
3508 u8Mode = pVM->pdm.s.pDmac->Reg.pfnGetChannelMode(pVM->pdm.s.pDmac->pDevIns, uChannel);
3509 else
3510 {
3511 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
3512 u8Mode = 3 << 2 /* illegal mode type */;
3513 }
3514 LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: returns %#04x\n",
3515 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, u8Mode));
3516 return u8Mode;
3517}
3518
3519/** @copydoc PDMDEVHLP::pfnDMASchedule */
3520static DECLCALLBACK(void) pdmR3DevHlp_DMASchedule(PPDMDEVINS pDevIns)
3521{
3522 PDMDEV_ASSERT_DEVINS(pDevIns);
3523 PVM pVM = pDevIns->Internal.s.pVMHC;
3524 VM_ASSERT_EMT(pVM);
3525 LogFlow(("pdmR3DevHlp_DMASchedule: caller='%s'/%d: VM_FF_PDM_DMA %d -> 1\n",
3526 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_PDM_DMA)));
3527
3528 AssertMsg(pVM->pdm.s.pDmac, ("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
3529 VM_FF_SET(pVM, VM_FF_PDM_DMA);
3530 REMR3NotifyDmaPending(pVM);
3531 VMR3NotifyFF(pVM, true);
3532}
3533
3534
3535/** @copydoc PDMDEVHLP::pfnCMOSWrite */
3536static DECLCALLBACK(int) pdmR3DevHlp_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
3537{
3538 PDMDEV_ASSERT_DEVINS(pDevIns);
3539 PVM pVM = pDevIns->Internal.s.pVMHC;
3540 VM_ASSERT_EMT(pVM);
3541
3542 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x u8Value=%#04x\n",
3543 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iReg, u8Value));
3544 int rc;
3545 if (pVM->pdm.s.pRtc)
3546 rc = pVM->pdm.s.pRtc->Reg.pfnWrite(pVM->pdm.s.pRtc->pDevIns, iReg, u8Value);
3547 else
3548 rc = VERR_PDM_NO_RTC_INSTANCE;
3549
3550 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Vrc\n",
3551 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
3552 return rc;
3553}
3554
3555
3556/** @copydoc PDMDEVHLP::pfnCMOSRead */
3557static DECLCALLBACK(int) pdmR3DevHlp_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
3558{
3559 PDMDEV_ASSERT_DEVINS(pDevIns);
3560 PVM pVM = pDevIns->Internal.s.pVMHC;
3561 VM_ASSERT_EMT(pVM);
3562
3563 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x pu8Value=%p\n",
3564 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iReg, pu8Value));
3565 int rc;
3566 if (pVM->pdm.s.pRtc)
3567 rc = pVM->pdm.s.pRtc->Reg.pfnRead(pVM->pdm.s.pRtc->pDevIns, iReg, pu8Value);
3568 else
3569 rc = VERR_PDM_NO_RTC_INSTANCE;
3570
3571 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Vrc\n",
3572 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
3573 return rc;
3574}
3575
3576
3577/** @copydoc PDMDEVHLP::pfnGetCpuId */
3578static DECLCALLBACK(void) pdmR3DevHlp_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
3579 uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
3580{
3581 PDMDEV_ASSERT_DEVINS(pDevIns);
3582 LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: iLeaf=%d pEax=%p pEbx=%p pEcx=%p pEdx=%p\n",
3583 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iLeaf, pEax, pEbx, pEcx, pEdx));
3584 AssertPtr(pEax); AssertPtr(pEbx); AssertPtr(pEcx); AssertPtr(pEdx);
3585
3586 CPUMGetGuestCpuId(pDevIns->Internal.s.pVMHC, iLeaf, pEax, pEbx, pEcx, pEdx);
3587
3588 LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: returns void - *pEax=%#x *pEbx=%#x *pEcx=%#x *pEdx=%#x\n",
3589 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, *pEax, *pEbx, *pEcx, *pEdx));
3590}
3591
3592
3593
3594
3595/** @copydoc PDMDEVHLP::pfnGetVM */
3596static DECLCALLBACK(PVM) pdmR3DevHlp_Untrusted_GetVM(PPDMDEVINS pDevIns)
3597{
3598 PDMDEV_ASSERT_DEVINS(pDevIns);
3599 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3600 return NULL;
3601}
3602
3603
3604/** @copydoc PDMDEVHLP::pfnPCIBusRegister */
3605static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
3606{
3607 PDMDEV_ASSERT_DEVINS(pDevIns);
3608 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3609 NOREF(pPciBusReg);
3610 NOREF(ppPciHlpR3);
3611 return VERR_ACCESS_DENIED;
3612}
3613
3614
3615/** @copydoc PDMDEVHLP::pfnPICRegister */
3616static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
3617{
3618 PDMDEV_ASSERT_DEVINS(pDevIns);
3619 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3620 NOREF(pPicReg);
3621 NOREF(ppPicHlpR3);
3622 return VERR_ACCESS_DENIED;
3623}
3624
3625
3626/** @copydoc PDMDEVHLP::pfnAPICRegister */
3627static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
3628{
3629 PDMDEV_ASSERT_DEVINS(pDevIns);
3630 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3631 NOREF(pApicReg);
3632 NOREF(ppApicHlpR3);
3633 return VERR_ACCESS_DENIED;
3634}
3635
3636
3637/** @copydoc PDMDEVHLP::pfnIOAPICRegister */
3638static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
3639{
3640 PDMDEV_ASSERT_DEVINS(pDevIns);
3641 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3642 NOREF(pIoApicReg);
3643 NOREF(ppIoApicHlpR3);
3644 return VERR_ACCESS_DENIED;
3645}
3646
3647
3648/** @copydoc PDMDEVHLP::pfnDMACRegister */
3649static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
3650{
3651 PDMDEV_ASSERT_DEVINS(pDevIns);
3652 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3653 NOREF(pDmacReg);
3654 NOREF(ppDmacHlp);
3655 return VERR_ACCESS_DENIED;
3656}
3657
3658
3659/** @copydoc PDMDEVHLP::pfnPhysRead */
3660static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
3661{
3662 PDMDEV_ASSERT_DEVINS(pDevIns);
3663 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3664 NOREF(GCPhys);
3665 NOREF(pvBuf);
3666 NOREF(cbRead);
3667}
3668
3669
3670/** @copydoc PDMDEVHLP::pfnPhysWrite */
3671static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
3672{
3673 PDMDEV_ASSERT_DEVINS(pDevIns);
3674 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3675 NOREF(GCPhys);
3676 NOREF(pvBuf);
3677 NOREF(cbWrite);
3678}
3679
3680
3681/** @copydoc PDMDEVHLP::pfnPhysReadGCVirt */
3682static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
3683{
3684 PDMDEV_ASSERT_DEVINS(pDevIns);
3685 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3686 NOREF(pvDst);
3687 NOREF(GCVirtSrc);
3688 NOREF(cb);
3689 return VERR_ACCESS_DENIED;
3690}
3691
3692
3693/** @copydoc PDMDEVHLP::pfnPhysWriteGCVirt */
3694static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
3695{
3696 PDMDEV_ASSERT_DEVINS(pDevIns);
3697 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3698 NOREF(GCVirtDst);
3699 NOREF(pvSrc);
3700 NOREF(cb);
3701 return VERR_ACCESS_DENIED;
3702}
3703
3704
3705/** @copydoc PDMDEVHLP::pfnPhysReserve */
3706static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysReserve(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc)
3707{
3708 PDMDEV_ASSERT_DEVINS(pDevIns);
3709 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3710 NOREF(GCPhys);
3711 NOREF(cbRange);
3712 return VERR_ACCESS_DENIED;
3713}
3714
3715
3716/** @copydoc PDMDEVHLP::pfnPhys2HCVirt */
3717static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_Phys2HCVirt(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR ppvHC)
3718{
3719 PDMDEV_ASSERT_DEVINS(pDevIns);
3720 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3721 NOREF(GCPhys);
3722 NOREF(cbRange);
3723 NOREF(ppvHC);
3724 return VERR_ACCESS_DENIED;
3725}
3726
3727
3728/** @copydoc PDMDEVHLP::pfnPhysGCPtr2HCPtr */
3729static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysGCPtr2HCPtr(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTHCPTR pHCPtr)
3730{
3731 PDMDEV_ASSERT_DEVINS(pDevIns);
3732 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3733 NOREF(GCPtr);
3734 NOREF(pHCPtr);
3735 return VERR_ACCESS_DENIED;
3736}
3737
3738
3739/** @copydoc PDMDEVHLP::pfnA20IsEnabled */
3740static DECLCALLBACK(bool) pdmR3DevHlp_Untrusted_A20IsEnabled(PPDMDEVINS pDevIns)
3741{
3742 PDMDEV_ASSERT_DEVINS(pDevIns);
3743 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3744 return false;
3745}
3746
3747
3748/** @copydoc PDMDEVHLP::pfnA20Set */
3749static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_A20Set(PPDMDEVINS pDevIns, bool fEnable)
3750{
3751 PDMDEV_ASSERT_DEVINS(pDevIns);
3752 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3753 NOREF(fEnable);
3754}
3755
3756
3757/** @copydoc PDMDEVHLP::pfnVMReset */
3758static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMReset(PPDMDEVINS pDevIns)
3759{
3760 PDMDEV_ASSERT_DEVINS(pDevIns);
3761 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3762 return VERR_ACCESS_DENIED;
3763}
3764
3765
3766/** @copydoc PDMDEVHLP::pfnVMSuspend */
3767static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMSuspend(PPDMDEVINS pDevIns)
3768{
3769 PDMDEV_ASSERT_DEVINS(pDevIns);
3770 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3771 return VERR_ACCESS_DENIED;
3772}
3773
3774
3775/** @copydoc PDMDEVHLP::pfnVMPowerOff */
3776static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMPowerOff(PPDMDEVINS pDevIns)
3777{
3778 PDMDEV_ASSERT_DEVINS(pDevIns);
3779 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3780 return VERR_ACCESS_DENIED;
3781}
3782
3783
3784/** @copydoc PDMDEVHLP::pfnLockVM */
3785static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_LockVM(PPDMDEVINS pDevIns)
3786{
3787 PDMDEV_ASSERT_DEVINS(pDevIns);
3788 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3789 return VERR_ACCESS_DENIED;
3790}
3791
3792
3793/** @copydoc PDMDEVHLP::pfnUnlockVM */
3794static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_UnlockVM(PPDMDEVINS pDevIns)
3795{
3796 PDMDEV_ASSERT_DEVINS(pDevIns);
3797 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3798 return VERR_ACCESS_DENIED;
3799}
3800
3801
3802/** @copydoc PDMDEVHLP::pfnAssertVMLock */
3803static DECLCALLBACK(bool) pdmR3DevHlp_Untrusted_AssertVMLock(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
3804{
3805 PDMDEV_ASSERT_DEVINS(pDevIns);
3806 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3807 return false;
3808}
3809
3810
3811/** @copydoc PDMDEVHLP::pfnDMARegister */
3812static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
3813{
3814 PDMDEV_ASSERT_DEVINS(pDevIns);
3815 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3816 return VERR_ACCESS_DENIED;
3817}
3818
3819
3820/** @copydoc PDMDEVHLP::pfnDMAReadMemory */
3821static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
3822{
3823 PDMDEV_ASSERT_DEVINS(pDevIns);
3824 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3825 if (pcbRead)
3826 *pcbRead = 0;
3827 return VERR_ACCESS_DENIED;
3828}
3829
3830
3831/** @copydoc PDMDEVHLP::pfnDMAWriteMemory */
3832static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
3833{
3834 PDMDEV_ASSERT_DEVINS(pDevIns);
3835 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3836 if (pcbWritten)
3837 *pcbWritten = 0;
3838 return VERR_ACCESS_DENIED;
3839}
3840
3841
3842/** @copydoc PDMDEVHLP::pfnDMASetDREQ */
3843static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
3844{
3845 PDMDEV_ASSERT_DEVINS(pDevIns);
3846 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3847 return VERR_ACCESS_DENIED;
3848}
3849
3850
3851/** @copydoc PDMDEVHLP::pfnDMAGetChannelMode */
3852static DECLCALLBACK(uint8_t) pdmR3DevHlp_Untrusted_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
3853{
3854 PDMDEV_ASSERT_DEVINS(pDevIns);
3855 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3856 return 3 << 2 /* illegal mode type */;
3857}
3858
3859
3860/** @copydoc PDMDEVHLP::pfnDMASchedule */
3861static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_DMASchedule(PPDMDEVINS pDevIns)
3862{
3863 PDMDEV_ASSERT_DEVINS(pDevIns);
3864 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3865}
3866
3867
3868/** @copydoc PDMDEVHLP::pfnCMOSWrite */
3869static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
3870{
3871 PDMDEV_ASSERT_DEVINS(pDevIns);
3872 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3873 return VERR_ACCESS_DENIED;
3874}
3875
3876
3877/** @copydoc PDMDEVHLP::pfnCMOSRead */
3878static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
3879{
3880 PDMDEV_ASSERT_DEVINS(pDevIns);
3881 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3882 return VERR_ACCESS_DENIED;
3883}
3884
3885
3886/** @copydoc PDMDEVHLP::pfnQueryCPUId */
3887static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_QueryCPUId(PPDMDEVINS pDevIns, uint32_t iLeaf,
3888 uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
3889{
3890 PDMDEV_ASSERT_DEVINS(pDevIns);
3891 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3892}
3893
3894
3895/** @copydoc PDMPICHLPR3::pfnSetInterruptFF */
3896static DECLCALLBACK(void) pdmR3PicHlp_SetInterruptFF(PPDMDEVINS pDevIns)
3897{
3898 PDMDEV_ASSERT_DEVINS(pDevIns);
3899 PVM pVM = pDevIns->Internal.s.pVMHC;
3900 LogFlow(("pdmR3PicHlp_SetInterruptFF: caller='%s'/%d: VM_FF_INTERRUPT_PIC %d -> 1\n",
3901 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_INTERRUPT_PIC)));
3902 VM_FF_SET(pVM, VM_FF_INTERRUPT_PIC);
3903 REMR3NotifyInterruptSet(pVM);
3904#ifdef VBOX_WITH_PDM_LOCK
3905 VMR3NotifyFF(pVM, true);
3906#endif
3907}
3908
3909
3910/** @copydoc PDMPICHLPR3::pfnClearInterruptFF */
3911static DECLCALLBACK(void) pdmR3PicHlp_ClearInterruptFF(PPDMDEVINS pDevIns)
3912{
3913 PDMDEV_ASSERT_DEVINS(pDevIns);
3914 LogFlow(("pdmR3PicHlp_ClearInterruptFF: caller='%s'/%d: VM_FF_INTERRUPT_PIC %d -> 0\n",
3915 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VM_FF_ISSET(pDevIns->Internal.s.pVMHC, VM_FF_INTERRUPT_PIC)));
3916 VM_FF_CLEAR(pDevIns->Internal.s.pVMHC, VM_FF_INTERRUPT_PIC);
3917 REMR3NotifyInterruptClear(pDevIns->Internal.s.pVMHC);
3918}
3919
3920
3921#ifdef VBOX_WITH_PDM_LOCK
3922/** @copydoc PDMPICHLPR3::pfnLock */
3923static DECLCALLBACK(int) pdmR3PicHlp_Lock(PPDMDEVINS pDevIns, int rc)
3924{
3925 PDMDEV_ASSERT_DEVINS(pDevIns);
3926 return pdmLockEx(pDevIns->Internal.s.pVMHC, rc);
3927}
3928
3929
3930/** @copydoc PDMPICHLPR3::pfnUnlock */
3931static DECLCALLBACK(void) pdmR3PicHlp_Unlock(PPDMDEVINS pDevIns)
3932{
3933 PDMDEV_ASSERT_DEVINS(pDevIns);
3934 pdmUnlock(pDevIns->Internal.s.pVMHC);
3935}
3936#endif /* VBOX_WITH_PDM_LOCK */
3937
3938
3939/** @copydoc PDMPICHLPR3::pfnGetGCHelpers */
3940static DECLCALLBACK(PCPDMPICHLPGC) pdmR3PicHlp_GetGCHelpers(PPDMDEVINS pDevIns)
3941{
3942 PDMDEV_ASSERT_DEVINS(pDevIns);
3943 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
3944 RTGCPTR pGCHelpers = 0;
3945 int rc = PDMR3GetSymbolGC(pDevIns->Internal.s.pVMHC, NULL, "g_pdmGCPicHlp", &pGCHelpers);
3946 AssertReleaseRC(rc);
3947 AssertRelease(pGCHelpers);
3948 LogFlow(("pdmR3PicHlp_GetGCHelpers: caller='%s'/%d: returns %VGv\n",
3949 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pGCHelpers));
3950 return pGCHelpers;
3951}
3952
3953
3954/** @copydoc PDMPICHLPR3::pfnGetR0Helpers */
3955static DECLCALLBACK(PCPDMPICHLPR0) pdmR3PicHlp_GetR0Helpers(PPDMDEVINS pDevIns)
3956{
3957 PDMDEV_ASSERT_DEVINS(pDevIns);
3958 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
3959 PCPDMPICHLPR0 pR0Helpers = 0;
3960 int rc = PDMR3GetSymbolR0(pDevIns->Internal.s.pVMHC, NULL, "g_pdmR0PicHlp", &pR0Helpers);
3961 AssertReleaseRC(rc);
3962 AssertRelease(pR0Helpers);
3963 LogFlow(("pdmR3PicHlp_GetR0Helpers: caller='%s'/%d: returns %VHv\n",
3964 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pR0Helpers));
3965 return pR0Helpers;
3966}
3967
3968
3969/** @copydoc PDMAPICHLPR3::pfnSetInterruptFF */
3970static DECLCALLBACK(void) pdmR3ApicHlp_SetInterruptFF(PPDMDEVINS pDevIns)
3971{
3972 PDMDEV_ASSERT_DEVINS(pDevIns);
3973 PVM pVM = pDevIns->Internal.s.pVMHC;
3974 LogFlow(("pdmR3ApicHlp_SetInterruptFF: caller='%s'/%d: VM_FF_INTERRUPT %d -> 1\n",
3975 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_INTERRUPT_APIC)));
3976 VM_FF_SET(pVM, VM_FF_INTERRUPT_APIC);
3977 REMR3NotifyInterruptSet(pVM);
3978#ifdef VBOX_WITH_PDM_LOCK
3979 VMR3NotifyFF(pVM, true);
3980#endif
3981}
3982
3983
3984/** @copydoc PDMAPICHLPR3::pfnClearInterruptFF */
3985static DECLCALLBACK(void) pdmR3ApicHlp_ClearInterruptFF(PPDMDEVINS pDevIns)
3986{
3987 PDMDEV_ASSERT_DEVINS(pDevIns);
3988 LogFlow(("pdmR3ApicHlp_ClearInterruptFF: caller='%s'/%d: VM_FF_INTERRUPT %d -> 0\n",
3989 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VM_FF_ISSET(pDevIns->Internal.s.pVMHC, VM_FF_INTERRUPT_APIC)));
3990 VM_FF_CLEAR(pDevIns->Internal.s.pVMHC, VM_FF_INTERRUPT_APIC);
3991 REMR3NotifyInterruptClear(pDevIns->Internal.s.pVMHC);
3992}
3993
3994
3995/** @copydoc PDMAPICHLPR3::pfnChangeFeature */
3996static DECLCALLBACK(void) pdmR3ApicHlp_ChangeFeature(PPDMDEVINS pDevIns, bool fEnabled)
3997{
3998 PDMDEV_ASSERT_DEVINS(pDevIns);
3999 LogFlow(("pdmR3ApicHlp_ClearInterruptFF: caller='%s'/%d: fEnabled=%RTbool\n",
4000 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, fEnabled));
4001 if (fEnabled)
4002 CPUMSetGuestCpuIdFeature(pDevIns->Internal.s.pVMHC, CPUMCPUIDFEATURE_APIC);
4003 else
4004 CPUMClearGuestCpuIdFeature(pDevIns->Internal.s.pVMHC, CPUMCPUIDFEATURE_APIC);
4005}
4006
4007#ifdef VBOX_WITH_PDM_LOCK
4008/** @copydoc PDMAPICHLPR3::pfnLock */
4009static DECLCALLBACK(int) pdmR3ApicHlp_Lock(PPDMDEVINS pDevIns, int rc)
4010{
4011 PDMDEV_ASSERT_DEVINS(pDevIns);
4012 return pdmLockEx(pDevIns->Internal.s.pVMHC, rc);
4013}
4014
4015
4016/** @copydoc PDMAPICHLPR3::pfnUnlock */
4017static DECLCALLBACK(void) pdmR3ApicHlp_Unlock(PPDMDEVINS pDevIns)
4018{
4019 PDMDEV_ASSERT_DEVINS(pDevIns);
4020 pdmUnlock(pDevIns->Internal.s.pVMHC);
4021}
4022#endif /* VBOX_WITH_PDM_LOCK */
4023
4024
4025/** @copydoc PDMAPICHLPR3::pfnGetGCHelpers */
4026static DECLCALLBACK(PCPDMAPICHLPGC) pdmR3ApicHlp_GetGCHelpers(PPDMDEVINS pDevIns)
4027{
4028 PDMDEV_ASSERT_DEVINS(pDevIns);
4029 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
4030 RTGCPTR pGCHelpers = 0;
4031 int rc = PDMR3GetSymbolGC(pDevIns->Internal.s.pVMHC, NULL, "g_pdmGCApicHlp", &pGCHelpers);
4032 AssertReleaseRC(rc);
4033 AssertRelease(pGCHelpers);
4034 LogFlow(("pdmR3ApicHlp_GetGCHelpers: caller='%s'/%d: returns %VGv\n",
4035 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pGCHelpers));
4036 return pGCHelpers;
4037}
4038
4039
4040/** @copydoc PDMAPICHLPR3::pfnGetR0Helpers */
4041static DECLCALLBACK(PCPDMAPICHLPR0) pdmR3ApicHlp_GetR0Helpers(PPDMDEVINS pDevIns)
4042{
4043 PDMDEV_ASSERT_DEVINS(pDevIns);
4044 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
4045 PCPDMAPICHLPR0 pR0Helpers = 0;
4046 int rc = PDMR3GetSymbolR0(pDevIns->Internal.s.pVMHC, NULL, "g_pdmR0ApicHlp", &pR0Helpers);
4047 AssertReleaseRC(rc);
4048 AssertRelease(pR0Helpers);
4049 LogFlow(("pdmR3ApicHlp_GetR0Helpers: caller='%s'/%d: returns %VHv\n",
4050 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pR0Helpers));
4051 return pR0Helpers;
4052}
4053
4054
4055/** @copydoc PDMIOAPICHLPR3::pfnApicBusDeliver */
4056static DECLCALLBACK(void) pdmR3IoApicHlp_ApicBusDeliver(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
4057 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode)
4058{
4059 PDMDEV_ASSERT_DEVINS(pDevIns);
4060 PVM pVM = pDevIns->Internal.s.pVMHC;
4061#ifndef VBOX_WITH_PDM_LOCK
4062 VM_ASSERT_EMT(pVM);
4063#endif
4064 LogFlow(("pdmR3IoApicHlp_ApicBusDeliver: caller='%s'/%d: u8Dest=%RX8 u8DestMode=%RX8 u8DeliveryMode=%RX8 iVector=%RX8 u8Polarity=%RX8 u8TriggerMode=%RX8\n",
4065 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, u8Dest, u8DestMode, u8DeliveryMode, iVector, u8Polarity, u8TriggerMode));
4066 if (pVM->pdm.s.Apic.pfnBusDeliverR3)
4067 pVM->pdm.s.Apic.pfnBusDeliverR3(pVM->pdm.s.Apic.pDevInsR3, u8Dest, u8DestMode, u8DeliveryMode, iVector, u8Polarity, u8TriggerMode);
4068}
4069
4070
4071#ifdef VBOX_WITH_PDM_LOCK
4072/** @copydoc PDMIOAPICHLPR3::pfnLock */
4073static DECLCALLBACK(int) pdmR3IoApicHlp_Lock(PPDMDEVINS pDevIns, int rc)
4074{
4075 PDMDEV_ASSERT_DEVINS(pDevIns);
4076 return pdmLockEx(pDevIns->Internal.s.pVMHC, rc);
4077}
4078
4079
4080/** @copydoc PDMIOAPICHLPR3::pfnUnlock */
4081static DECLCALLBACK(void) pdmR3IoApicHlp_Unlock(PPDMDEVINS pDevIns)
4082{
4083 PDMDEV_ASSERT_DEVINS(pDevIns);
4084 pdmUnlock(pDevIns->Internal.s.pVMHC);
4085}
4086#endif /* VBOX_WITH_PDM_LOCK */
4087
4088
4089/** @copydoc PDMIOAPICHLPR3::pfnGetGCHelpers */
4090static DECLCALLBACK(PCPDMIOAPICHLPGC) pdmR3IoApicHlp_GetGCHelpers(PPDMDEVINS pDevIns)
4091{
4092 PDMDEV_ASSERT_DEVINS(pDevIns);
4093 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
4094 RTGCPTR pGCHelpers = 0;
4095 int rc = PDMR3GetSymbolGC(pDevIns->Internal.s.pVMHC, NULL, "g_pdmGCIoApicHlp", &pGCHelpers);
4096 AssertReleaseRC(rc);
4097 AssertRelease(pGCHelpers);
4098 LogFlow(("pdmR3IoApicHlp_GetGCHelpers: caller='%s'/%d: returns %VGv\n",
4099 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pGCHelpers));
4100 return pGCHelpers;
4101}
4102
4103
4104/** @copydoc PDMIOAPICHLPR3::pfnGetR0Helpers */
4105static DECLCALLBACK(PCPDMIOAPICHLPR0) pdmR3IoApicHlp_GetR0Helpers(PPDMDEVINS pDevIns)
4106{
4107 PDMDEV_ASSERT_DEVINS(pDevIns);
4108 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
4109 PCPDMIOAPICHLPR0 pR0Helpers = 0;
4110 int rc = PDMR3GetSymbolR0(pDevIns->Internal.s.pVMHC, NULL, "g_pdmR0IoApicHlp", &pR0Helpers);
4111 AssertReleaseRC(rc);
4112 AssertRelease(pR0Helpers);
4113 LogFlow(("pdmR3IoApicHlp_GetR0Helpers: caller='%s'/%d: returns %VHv\n",
4114 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pR0Helpers));
4115 return pR0Helpers;
4116}
4117
4118
4119/** @copydoc PDMPCIHLPR3::pfnIsaSetIrq */
4120static DECLCALLBACK(void) pdmR3PciHlp_IsaSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4121{
4122 PDMDEV_ASSERT_DEVINS(pDevIns);
4123#ifndef VBOX_WITH_PDM_LOCK
4124 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
4125#endif
4126 Log4(("pdmR3PciHlp_IsaSetIrq: iIrq=%d iLevel=%d\n", iIrq, iLevel));
4127 PDMIsaSetIrq(pDevIns->Internal.s.pVMHC, iIrq, iLevel);
4128}
4129
4130
4131/** @copydoc PDMPCIHLPR3::pfnIoApicSetIrq */
4132static DECLCALLBACK(void) pdmR3PciHlp_IoApicSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4133{
4134 PDMDEV_ASSERT_DEVINS(pDevIns);
4135#ifndef VBOX_WITH_PDM_LOCK
4136 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
4137#endif
4138 Log4(("pdmR3PciHlp_IsaSetIrq: iIrq=%d iLevel=%d\n", iIrq, iLevel));
4139 PDMIoApicSetIrq(pDevIns->Internal.s.pVMHC, iIrq, iLevel);
4140}
4141
4142
4143#ifdef VBOX_WITH_PDM_LOCK
4144/** @copydoc PDMPCIHLPR3::pfnLock */
4145static DECLCALLBACK(int) pdmR3PciHlp_Lock(PPDMDEVINS pDevIns, int rc)
4146{
4147 PDMDEV_ASSERT_DEVINS(pDevIns);
4148 return pdmLockEx(pDevIns->Internal.s.pVMHC, rc);
4149}
4150
4151
4152/** @copydoc PDMPCIHLPR3::pfnUnlock */
4153static DECLCALLBACK(void) pdmR3PciHlp_Unlock(PPDMDEVINS pDevIns)
4154{
4155 PDMDEV_ASSERT_DEVINS(pDevIns);
4156 pdmUnlock(pDevIns->Internal.s.pVMHC);
4157}
4158#endif /* VBOX_WITH_PDM_LOCK */
4159
4160
4161/** @copydoc PDMPCIHLPR3::pfnGetGCHelpers */
4162static DECLCALLBACK(PCPDMPCIHLPGC) pdmR3PciHlp_GetGCHelpers(PPDMDEVINS pDevIns)
4163{
4164 PDMDEV_ASSERT_DEVINS(pDevIns);
4165 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
4166 RTGCPTR pGCHelpers = 0;
4167 int rc = PDMR3GetSymbolGC(pDevIns->Internal.s.pVMHC, NULL, "g_pdmGCPciHlp", &pGCHelpers);
4168 AssertReleaseRC(rc);
4169 AssertRelease(pGCHelpers);
4170 LogFlow(("pdmR3IoApicHlp_GetGCHelpers: caller='%s'/%d: returns %VGv\n",
4171 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pGCHelpers));
4172 return pGCHelpers;
4173}
4174
4175
4176/** @copydoc PDMPCIHLPR3::pfnGetR0Helpers */
4177static DECLCALLBACK(PCPDMPCIHLPR0) pdmR3PciHlp_GetR0Helpers(PPDMDEVINS pDevIns)
4178{
4179 PDMDEV_ASSERT_DEVINS(pDevIns);
4180 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
4181 PCPDMPCIHLPR0 pR0Helpers = 0;
4182 int rc = PDMR3GetSymbolR0(pDevIns->Internal.s.pVMHC, NULL, "g_pdmR0PciHlp", &pR0Helpers);
4183 AssertReleaseRC(rc);
4184 AssertRelease(pR0Helpers);
4185 LogFlow(("pdmR3IoApicHlp_GetR0Helpers: caller='%s'/%d: returns %VHv\n",
4186 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pR0Helpers));
4187 return pR0Helpers;
4188}
4189
4190
4191/**
4192 * Locates a LUN.
4193 *
4194 * @returns VBox status code.
4195 * @param pVM VM Handle.
4196 * @param pszDevice Device name.
4197 * @param iInstance Device instance.
4198 * @param iLun The Logical Unit to obtain the interface of.
4199 * @param ppLun Where to store the pointer to the LUN if found.
4200 * @thread Try only do this in EMT...
4201 */
4202int pdmR3DevFindLun(PVM pVM, const char *pszDevice, unsigned iInstance, unsigned iLun, PPDMLUN *ppLun)
4203{
4204 /*
4205 * Iterate registered devices looking for the device.
4206 */
4207 RTUINT cchDevice = strlen(pszDevice);
4208 for (PPDMDEV pDev = pVM->pdm.s.pDevs; pDev; pDev = pDev->pNext)
4209 {
4210 if ( pDev->cchName == cchDevice
4211 && !memcmp(pDev->pDevReg->szDeviceName, pszDevice, cchDevice))
4212 {
4213 /*
4214 * Iterate device instances.
4215 */
4216 for (PPDMDEVINS pDevIns = pDev->pInstances; pDevIns; pDevIns = pDevIns->Internal.s.pPerDeviceNextHC)
4217 {
4218 if (pDevIns->iInstance == iInstance)
4219 {
4220 /*
4221 * Iterate luns.
4222 */
4223 for (PPDMLUN pLun = pDevIns->Internal.s.pLunsHC; pLun; pLun = pLun->pNext)
4224 {
4225 if (pLun->iLun == iLun)
4226 {
4227 *ppLun = pLun;
4228 return VINF_SUCCESS;
4229 }
4230 }
4231 return VERR_PDM_LUN_NOT_FOUND;
4232 }
4233 }
4234 return VERR_PDM_DEVICE_INSTANCE_NOT_FOUND;
4235 }
4236 }
4237 return VERR_PDM_DEVICE_NOT_FOUND;
4238}
4239
4240
4241/**
4242 * Attaches a preconfigured driver to an existing device instance.
4243 *
4244 * This is used to change drivers and suchlike at runtime.
4245 *
4246 * @returns VBox status code.
4247 * @param pVM VM Handle.
4248 * @param pszDevice Device name.
4249 * @param iInstance Device instance.
4250 * @param iLun The Logical Unit to obtain the interface of.
4251 * @param ppBase Where to store the base interface pointer. Optional.
4252 * @thread EMT
4253 */
4254PDMR3DECL(int) PDMR3DeviceAttach(PVM pVM, const char *pszDevice, unsigned iInstance, unsigned iLun, PPDMIBASE *ppBase)
4255{
4256 VM_ASSERT_EMT(pVM);
4257 LogFlow(("PDMR3DeviceAttach: pszDevice=%p:{%s} iInstance=%d iLun=%d ppBase=%p\n",
4258 pszDevice, pszDevice, iInstance, iLun, ppBase));
4259
4260 /*
4261 * Find the LUN in question.
4262 */
4263 PPDMLUN pLun;
4264 int rc = pdmR3DevFindLun(pVM, pszDevice, iInstance, iLun, &pLun);
4265 if (VBOX_SUCCESS(rc))
4266 {
4267 /*
4268 * Can we attach anything at runtime?
4269 */
4270 PPDMDEVINS pDevIns = pLun->pDevIns;
4271 if (pDevIns->pDevReg->pfnAttach)
4272 {
4273 if (!pLun->pTop)
4274 {
4275 rc = pDevIns->pDevReg->pfnAttach(pDevIns, iLun);
4276
4277 }
4278 else
4279 rc = VERR_PDM_DRIVER_ALREADY_ATTACHED;
4280 }
4281 else
4282 rc = VERR_PDM_DEVICE_NO_RT_ATTACH;
4283
4284 if (ppBase)
4285 *ppBase = pLun->pTop ? &pLun->pTop->IBase : NULL;
4286 }
4287 else if (ppBase)
4288 *ppBase = NULL;
4289
4290 if (ppBase)
4291 LogFlow(("PDMR3DeviceAttach: returns %Vrc *ppBase=%p\n", rc, *ppBase));
4292 else
4293 LogFlow(("PDMR3DeviceAttach: returns %Vrc\n", rc));
4294 return rc;
4295}
4296
4297
4298/**
4299 * Detaches a driver from an existing device instance.
4300 *
4301 * This is used to change drivers and suchlike at runtime.
4302 *
4303 * @returns VBox status code.
4304 * @param pVM VM Handle.
4305 * @param pszDevice Device name.
4306 * @param iInstance Device instance.
4307 * @param iLun The Logical Unit to obtain the interface of.
4308 * @thread EMT
4309 */
4310PDMR3DECL(int) PDMR3DeviceDetach(PVM pVM, const char *pszDevice, unsigned iInstance, unsigned iLun)
4311{
4312 VM_ASSERT_EMT(pVM);
4313 LogFlow(("PDMR3DeviceDetach: pszDevice=%p:{%s} iInstance=%d iLun=%d\n",
4314 pszDevice, pszDevice, iInstance, iLun));
4315
4316 /*
4317 * Find the LUN in question.
4318 */
4319 PPDMLUN pLun;
4320 int rc = pdmR3DevFindLun(pVM, pszDevice, iInstance, iLun, &pLun);
4321 if (VBOX_SUCCESS(rc))
4322 {
4323 /*
4324 * Can we detach anything at runtime?
4325 */
4326 PPDMDEVINS pDevIns = pLun->pDevIns;
4327 if (pDevIns->pDevReg->pfnDetach)
4328 {
4329 if (pLun->pTop)
4330 rc = pdmR3DrvDetach(pLun->pTop);
4331 else
4332 rc = VINF_PDM_NO_DRIVER_ATTACHED_TO_LUN;
4333 }
4334 else
4335 rc = VERR_PDM_DEVICE_NO_RT_DETACH;
4336 }
4337
4338 LogFlow(("PDMR3DeviceDetach: returns %Vrc\n", rc));
4339 return rc;
4340}
4341
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