VirtualBox

source: vbox/trunk/src/VBox/VMM/PDMDevice.cpp@ 3857

Last change on this file since 3857 was 3857, checked in by vboxsync, 17 years ago

PDMUsb - work in progress.
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1/* $Id: PDMDevice.cpp 3857 2007-07-25 22:02:21Z vboxsync $ */
2/** @file
3 * PDM - Pluggable Device and Driver Manager, Device parts.
4 */
5
6/*
7 * Copyright (C) 2006-2007 innotek GmbH
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License as published by the Free Software Foundation,
13 * in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
14 * distribution. VirtualBox OSE is distributed in the hope that it will
15 * be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * If you received this file as part of a commercial VirtualBox
18 * distribution, then only the terms of your commercial VirtualBox
19 * license agreement apply instead of the previous paragraph.
20 */
21
22
23/*******************************************************************************
24* Header Files *
25*******************************************************************************/
26#define LOG_GROUP LOG_GROUP_PDM_DEVICE
27#include "PDMInternal.h"
28#include <VBox/pdm.h>
29#include <VBox/mm.h>
30#include <VBox/pgm.h>
31#include <VBox/iom.h>
32#include <VBox/cfgm.h>
33#include <VBox/rem.h>
34#include <VBox/dbgf.h>
35#include <VBox/vm.h>
36#include <VBox/vmm.h>
37#include <VBox/hwaccm.h>
38
39#include <VBox/version.h>
40#include <VBox/log.h>
41#include <VBox/err.h>
42#include <iprt/alloc.h>
43#include <iprt/alloca.h>
44#include <iprt/asm.h>
45#include <iprt/assert.h>
46#include <iprt/path.h>
47#include <iprt/semaphore.h>
48#include <iprt/string.h>
49#include <iprt/thread.h>
50
51
52
53/*******************************************************************************
54* Structures and Typedefs *
55*******************************************************************************/
56/**
57 * Internal callback structure pointer.
58 * The main purpose is to define the extra data we associate
59 * with PDMDEVREGCB so we can find the VM instance and so on.
60 */
61typedef struct PDMDEVREGCBINT
62{
63 /** The callback structure. */
64 PDMDEVREGCB Core;
65 /** A bit of padding. */
66 uint32_t u32[4];
67 /** VM Handle. */
68 PVM pVM;
69} PDMDEVREGCBINT, *PPDMDEVREGCBINT;
70typedef const PDMDEVREGCBINT *PCPDMDEVREGCBINT;
71
72
73/*******************************************************************************
74* Internal Functions *
75*******************************************************************************/
76static DECLCALLBACK(int) pdmR3DevReg_Register(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pDevReg);
77static DECLCALLBACK(void *) pdmR3DevReg_MMHeapAlloc(PPDMDEVREGCB pCallbacks, size_t cb);
78static DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem);
79
80/* VSlick regex:
81search : \om/\*\*.+?\*\/\nDECLCALLBACKMEMBER\(([^,]*), *pfn([^)]*)\)\(
82replace: \/\*\* @copydoc PDMDEVHLP::pfn\2 \*\/\nstatic DECLCALLBACK\(\1\) pdmR3DevHlp_\2\(
83 */
84
85/** @name R3 DevHlp
86 * @{
87 */
88static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser, PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn, PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc);
89static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterGC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTGCPTR pvUser, const char *pszOut, const char *pszIn, const char *pszOutStr, const char *pszInStr, const char *pszDesc);
90static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser, const char *pszOut, const char *pszIn, const char *pszOutStr, const char *pszInStr, const char *pszDesc);
91static DECLCALLBACK(int) pdmR3DevHlp_IOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts);
92static DECLCALLBACK(int) pdmR3DevHlp_MMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
93 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
94 const char *pszDesc);
95static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterGC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
96 const char *pszWrite, const char *pszRead, const char *pszFill,
97 const char *pszDesc);
98static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
99 const char *pszWrite, const char *pszRead, const char *pszFill,
100 const char *pszDesc);
101static DECLCALLBACK(int) pdmR3DevHlp_MMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange);
102static DECLCALLBACK(int) pdmR3DevHlp_ROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, const char *pszDesc);
103static DECLCALLBACK(int) pdmR3DevHlp_SSMRegister(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
104 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
105 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone);
106static DECLCALLBACK(int) pdmR3DevHlp_TMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERHC ppTimer);
107static DECLCALLBACK(PTMTIMERHC) pdmR3DevHlp_TMTimerCreateExternal(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMEREXT pfnCallback, void *pvUser, const char *pszDesc);
108static DECLCALLBACK(int) pdmR3DevHlp_PCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev);
109static DECLCALLBACK(int) pdmR3DevHlp_PCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback);
110static DECLCALLBACK(void) pdmR3DevHlp_PCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
111 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld);
112static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel);
113static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel);
114static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel);
115static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel);
116static DECLCALLBACK(int) pdmR3DevHlp_DriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc);
117static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAlloc(PPDMDEVINS pDevIns, size_t cb);
118static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb);
119static DECLCALLBACK(void) pdmR3DevHlp_MMHeapFree(PPDMDEVINS pDevIns, void *pv);
120static DECLCALLBACK(int) pdmR3DevHlp_VMSetError(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...);
121static DECLCALLBACK(int) pdmR3DevHlp_VMSetErrorV(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va);
122static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeError(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...);
123static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeErrorV(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va);
124static DECLCALLBACK(bool) pdmR3DevHlp_AssertEMT(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction);
125static DECLCALLBACK(bool) pdmR3DevHlp_AssertOther(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction);
126static DECLCALLBACK(int) pdmR3DevHlp_DBGFStopV(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args);
127static DECLCALLBACK(int) pdmR3DevHlp_DBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler);
128static DECLCALLBACK(void) pdmR3DevHlp_STAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc);
129static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...);
130static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterV(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility, STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args);
131static DECLCALLBACK(int) pdmR3DevHlp_CritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName);
132static DECLCALLBACK(PRTTIMESPEC) pdmR3DevHlp_UTCNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime);
133
134static DECLCALLBACK(PVM) pdmR3DevHlp_GetVM(PPDMDEVINS pDevIns);
135static DECLCALLBACK(int) pdmR3DevHlp_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3);
136static DECLCALLBACK(int) pdmR3DevHlp_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3);
137static DECLCALLBACK(int) pdmR3DevHlp_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3);
138static DECLCALLBACK(int) pdmR3DevHlp_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3);
139static DECLCALLBACK(int) pdmR3DevHlp_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp);
140static DECLCALLBACK(int) pdmR3DevHlp_RTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp);
141static DECLCALLBACK(int) pdmR3DevHlp_PDMQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval, PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue);
142static DECLCALLBACK(void) pdmR3DevHlp_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead);
143static DECLCALLBACK(void) pdmR3DevHlp_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite);
144static DECLCALLBACK(int) pdmR3DevHlp_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb);
145static DECLCALLBACK(int) pdmR3DevHlp_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb);
146static DECLCALLBACK(int) pdmR3DevHlp_PhysReserve(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc);
147static DECLCALLBACK(int) pdmR3DevHlp_Phys2HCVirt(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR ppvHC);
148static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPtr2HCPtr(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTHCPTR pHCPtr);
149static DECLCALLBACK(bool) pdmR3DevHlp_A20IsEnabled(PPDMDEVINS pDevIns);
150static DECLCALLBACK(void) pdmR3DevHlp_A20Set(PPDMDEVINS pDevIns, bool fEnable);
151static DECLCALLBACK(int) pdmR3DevHlp_VMReset(PPDMDEVINS pDevIns);
152static DECLCALLBACK(int) pdmR3DevHlp_VMPowerOff(PPDMDEVINS pDevIns);
153static DECLCALLBACK(int) pdmR3DevHlp_VMSuspend(PPDMDEVINS pDevIns);
154static DECLCALLBACK(int) pdmR3DevHlp_LockVM(PPDMDEVINS pDevIns);
155static DECLCALLBACK(int) pdmR3DevHlp_UnlockVM(PPDMDEVINS pDevIns);
156static DECLCALLBACK(bool) pdmR3DevHlp_AssertVMLock(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction);
157static DECLCALLBACK(int) pdmR3DevHlp_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser);
158static DECLCALLBACK(int) pdmR3DevHlp_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead);
159static DECLCALLBACK(int) pdmR3DevHlp_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten);
160static DECLCALLBACK(int) pdmR3DevHlp_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel);
161static DECLCALLBACK(uint8_t) pdmR3DevHlp_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel);
162static DECLCALLBACK(void) pdmR3DevHlp_DMASchedule(PPDMDEVINS pDevIns);
163static DECLCALLBACK(int) pdmR3DevHlp_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value);
164static DECLCALLBACK(int) pdmR3DevHlp_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value);
165static DECLCALLBACK(void) pdmR3DevHlp_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
166 uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx);
167
168static DECLCALLBACK(PVM) pdmR3DevHlp_Untrusted_GetVM(PPDMDEVINS pDevIns);
169static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3);
170static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3);
171static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3);
172static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3);
173static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp);
174static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead);
175static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite);
176static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb);
177static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb);
178static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysReserve(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc);
179static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_Phys2HCVirt(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR ppvHC);
180static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysGCPtr2HCPtr(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTHCPTR pHCPtr);
181static DECLCALLBACK(bool) pdmR3DevHlp_Untrusted_A20IsEnabled(PPDMDEVINS pDevIns);
182static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_A20Set(PPDMDEVINS pDevIns, bool fEnable);
183static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMReset(PPDMDEVINS pDevIns);
184static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMPowerOff(PPDMDEVINS pDevIns);
185static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMSuspend(PPDMDEVINS pDevIns);
186static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_LockVM(PPDMDEVINS pDevIns);
187static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_UnlockVM(PPDMDEVINS pDevIns);
188static DECLCALLBACK(bool) pdmR3DevHlp_Untrusted_AssertVMLock(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction);
189static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser);
190static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead);
191static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten);
192static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel);
193static DECLCALLBACK(uint8_t) pdmR3DevHlp_Untrusted_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel);
194static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_DMASchedule(PPDMDEVINS pDevIns);
195static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value);
196static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value);
197static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_QueryCPUId(PPDMDEVINS pDevIns, uint32_t iLeaf,
198 uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx);
199
200/** @} */
201
202
203/** @name HC PIC Helpers
204 * @{
205 */
206static DECLCALLBACK(void) pdmR3PicHlp_SetInterruptFF(PPDMDEVINS pDevIns);
207static DECLCALLBACK(void) pdmR3PicHlp_ClearInterruptFF(PPDMDEVINS pDevIns);
208#ifdef VBOX_WITH_PDM_LOCK
209static DECLCALLBACK(int) pdmR3PicHlp_Lock(PPDMDEVINS pDevIns, int rc);
210static DECLCALLBACK(void) pdmR3PicHlp_Unlock(PPDMDEVINS pDevIns);
211#endif
212static DECLCALLBACK(PCPDMPICHLPGC) pdmR3PicHlp_GetGCHelpers(PPDMDEVINS pDevIns);
213static DECLCALLBACK(PCPDMPICHLPR0) pdmR3PicHlp_GetR0Helpers(PPDMDEVINS pDevIns);
214/** @} */
215
216
217/** @name HC APIC Helpers
218 * @{
219 */
220static DECLCALLBACK(void) pdmR3ApicHlp_SetInterruptFF(PPDMDEVINS pDevIns);
221static DECLCALLBACK(void) pdmR3ApicHlp_ClearInterruptFF(PPDMDEVINS pDevIns);
222static DECLCALLBACK(void) pdmR3ApicHlp_ChangeFeature(PPDMDEVINS pDevIns, bool fEnabled);
223#ifdef VBOX_WITH_PDM_LOCK
224static DECLCALLBACK(int) pdmR3ApicHlp_Lock(PPDMDEVINS pDevIns, int rc);
225static DECLCALLBACK(void) pdmR3ApicHlp_Unlock(PPDMDEVINS pDevIns);
226#endif
227static DECLCALLBACK(PCPDMAPICHLPGC) pdmR3ApicHlp_GetGCHelpers(PPDMDEVINS pDevIns);
228static DECLCALLBACK(PCPDMAPICHLPR0) pdmR3ApicHlp_GetR0Helpers(PPDMDEVINS pDevIns);
229/** @} */
230
231
232/** @name HC I/O APIC Helpers
233 * @{
234 */
235static DECLCALLBACK(void) pdmR3IoApicHlp_ApicBusDeliver(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
236 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode);
237#ifdef VBOX_WITH_PDM_LOCK
238static DECLCALLBACK(int) pdmR3IoApicHlp_Lock(PPDMDEVINS pDevIns, int rc);
239static DECLCALLBACK(void) pdmR3IoApicHlp_Unlock(PPDMDEVINS pDevIns);
240#endif
241static DECLCALLBACK(PCPDMIOAPICHLPGC) pdmR3IoApicHlp_GetGCHelpers(PPDMDEVINS pDevIns);
242static DECLCALLBACK(PCPDMIOAPICHLPR0) pdmR3IoApicHlp_GetR0Helpers(PPDMDEVINS pDevIns);
243/** @} */
244
245
246/** @name HC PCI Bus Helpers
247 * @{
248 */
249static DECLCALLBACK(void) pdmR3PciHlp_IsaSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel);
250static DECLCALLBACK(void) pdmR3PciHlp_IoApicSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel);
251#ifdef VBOX_WITH_PDM_LOCK
252static DECLCALLBACK(int) pdmR3PciHlp_Lock(PPDMDEVINS pDevIns, int rc);
253static DECLCALLBACK(void) pdmR3PciHlp_Unlock(PPDMDEVINS pDevIns);
254#endif
255static DECLCALLBACK(PCPDMPCIHLPGC) pdmR3PciHlp_GetGCHelpers(PPDMDEVINS pDevIns);
256static DECLCALLBACK(PCPDMPCIHLPR0) pdmR3PciHlp_GetR0Helpers(PPDMDEVINS pDevIns);
257/** @} */
258
259/** @def PDMDEV_ASSERT_DEVINS
260 * Asserts the validity of the driver instance.
261 */
262#ifdef VBOX_STRICT
263# define PDMDEV_ASSERT_DEVINS(pDevIns) do { Assert(pDevIns); Assert(pDevIns->u32Version == PDM_DEVINS_VERSION); Assert(pDevIns->pvInstanceDataR3 == (void *)&pDevIns->achInstanceData[0]); } while (0)
264#else
265# define PDMDEV_ASSERT_DEVINS(pDevIns) do { } while (0)
266#endif
267static int pdmR3DevLoad(PVM pVM, PPDMDEVREGCBINT pRegCB, const char *pszFilename, const char *pszName);
268
269
270/*
271 * Allow physical read and writes from any thread
272 */
273#define PDM_PHYS_READWRITE_FROM_ANY_THREAD
274
275/*******************************************************************************
276* Global Variables *
277*******************************************************************************/
278/**
279 * The device helper structure for trusted devices.
280 */
281const PDMDEVHLP g_pdmR3DevHlpTrusted =
282{
283 PDM_DEVHLP_VERSION,
284 pdmR3DevHlp_IOPortRegister,
285 pdmR3DevHlp_IOPortRegisterGC,
286 pdmR3DevHlp_IOPortRegisterR0,
287 pdmR3DevHlp_IOPortDeregister,
288 pdmR3DevHlp_MMIORegister,
289 pdmR3DevHlp_MMIORegisterGC,
290 pdmR3DevHlp_MMIORegisterR0,
291 pdmR3DevHlp_MMIODeregister,
292 pdmR3DevHlp_ROMRegister,
293 pdmR3DevHlp_SSMRegister,
294 pdmR3DevHlp_TMTimerCreate,
295 pdmR3DevHlp_TMTimerCreateExternal,
296 pdmR3DevHlp_PCIRegister,
297 pdmR3DevHlp_PCIIORegionRegister,
298 pdmR3DevHlp_PCISetConfigCallbacks,
299 pdmR3DevHlp_PCISetIrq,
300 pdmR3DevHlp_PCISetIrqNoWait,
301 pdmR3DevHlp_ISASetIrq,
302 pdmR3DevHlp_ISASetIrqNoWait,
303 pdmR3DevHlp_DriverAttach,
304 pdmR3DevHlp_MMHeapAlloc,
305 pdmR3DevHlp_MMHeapAllocZ,
306 pdmR3DevHlp_MMHeapFree,
307 pdmR3DevHlp_VMSetError,
308 pdmR3DevHlp_VMSetErrorV,
309 pdmR3DevHlp_VMSetRuntimeError,
310 pdmR3DevHlp_VMSetRuntimeErrorV,
311 pdmR3DevHlp_AssertEMT,
312 pdmR3DevHlp_AssertOther,
313 pdmR3DevHlp_DBGFStopV,
314 pdmR3DevHlp_DBGFInfoRegister,
315 pdmR3DevHlp_STAMRegister,
316 pdmR3DevHlp_STAMRegisterF,
317 pdmR3DevHlp_STAMRegisterV,
318 pdmR3DevHlp_RTCRegister,
319 pdmR3DevHlp_PDMQueueCreate,
320 pdmR3DevHlp_CritSectInit,
321 pdmR3DevHlp_UTCNow,
322 0,
323 0,
324 0,
325 0,
326 0,
327 0,
328 0,
329 0,
330 0,
331 0,
332 pdmR3DevHlp_GetVM,
333 pdmR3DevHlp_PCIBusRegister,
334 pdmR3DevHlp_PICRegister,
335 pdmR3DevHlp_APICRegister,
336 pdmR3DevHlp_IOAPICRegister,
337 pdmR3DevHlp_DMACRegister,
338 pdmR3DevHlp_PhysRead,
339 pdmR3DevHlp_PhysWrite,
340 pdmR3DevHlp_PhysReadGCVirt,
341 pdmR3DevHlp_PhysWriteGCVirt,
342 pdmR3DevHlp_PhysReserve,
343 pdmR3DevHlp_Phys2HCVirt,
344 pdmR3DevHlp_PhysGCPtr2HCPtr,
345 pdmR3DevHlp_A20IsEnabled,
346 pdmR3DevHlp_A20Set,
347 pdmR3DevHlp_VMReset,
348 pdmR3DevHlp_VMSuspend,
349 pdmR3DevHlp_VMPowerOff,
350 pdmR3DevHlp_LockVM,
351 pdmR3DevHlp_UnlockVM,
352 pdmR3DevHlp_AssertVMLock,
353 pdmR3DevHlp_DMARegister,
354 pdmR3DevHlp_DMAReadMemory,
355 pdmR3DevHlp_DMAWriteMemory,
356 pdmR3DevHlp_DMASetDREQ,
357 pdmR3DevHlp_DMAGetChannelMode,
358 pdmR3DevHlp_DMASchedule,
359 pdmR3DevHlp_CMOSWrite,
360 pdmR3DevHlp_CMOSRead,
361 pdmR3DevHlp_GetCpuId,
362 PDM_DEVHLP_VERSION /* the end */
363};
364
365
366/**
367 * The device helper structure for non-trusted devices.
368 */
369const PDMDEVHLP g_pdmR3DevHlpUnTrusted =
370{
371 PDM_DEVHLP_VERSION,
372 pdmR3DevHlp_IOPortRegister,
373 pdmR3DevHlp_IOPortRegisterGC,
374 pdmR3DevHlp_IOPortRegisterR0,
375 pdmR3DevHlp_IOPortDeregister,
376 pdmR3DevHlp_MMIORegister,
377 pdmR3DevHlp_MMIORegisterGC,
378 pdmR3DevHlp_MMIORegisterR0,
379 pdmR3DevHlp_MMIODeregister,
380 pdmR3DevHlp_ROMRegister,
381 pdmR3DevHlp_SSMRegister,
382 pdmR3DevHlp_TMTimerCreate,
383 pdmR3DevHlp_TMTimerCreateExternal,
384 pdmR3DevHlp_PCIRegister,
385 pdmR3DevHlp_PCIIORegionRegister,
386 pdmR3DevHlp_PCISetConfigCallbacks,
387 pdmR3DevHlp_PCISetIrq,
388 pdmR3DevHlp_PCISetIrqNoWait,
389 pdmR3DevHlp_ISASetIrq,
390 pdmR3DevHlp_ISASetIrqNoWait,
391 pdmR3DevHlp_DriverAttach,
392 pdmR3DevHlp_MMHeapAlloc,
393 pdmR3DevHlp_MMHeapAllocZ,
394 pdmR3DevHlp_MMHeapFree,
395 pdmR3DevHlp_VMSetError,
396 pdmR3DevHlp_VMSetErrorV,
397 pdmR3DevHlp_VMSetRuntimeError,
398 pdmR3DevHlp_VMSetRuntimeErrorV,
399 pdmR3DevHlp_AssertEMT,
400 pdmR3DevHlp_AssertOther,
401 pdmR3DevHlp_DBGFStopV,
402 pdmR3DevHlp_DBGFInfoRegister,
403 pdmR3DevHlp_STAMRegister,
404 pdmR3DevHlp_STAMRegisterF,
405 pdmR3DevHlp_STAMRegisterV,
406 pdmR3DevHlp_RTCRegister,
407 pdmR3DevHlp_PDMQueueCreate,
408 pdmR3DevHlp_CritSectInit,
409 pdmR3DevHlp_UTCNow,
410 0,
411 0,
412 0,
413 0,
414 0,
415 0,
416 0,
417 0,
418 0,
419 0,
420 pdmR3DevHlp_Untrusted_GetVM,
421 pdmR3DevHlp_Untrusted_PCIBusRegister,
422 pdmR3DevHlp_Untrusted_PICRegister,
423 pdmR3DevHlp_Untrusted_APICRegister,
424 pdmR3DevHlp_Untrusted_IOAPICRegister,
425 pdmR3DevHlp_Untrusted_DMACRegister,
426 pdmR3DevHlp_Untrusted_PhysRead,
427 pdmR3DevHlp_Untrusted_PhysWrite,
428 pdmR3DevHlp_Untrusted_PhysReadGCVirt,
429 pdmR3DevHlp_Untrusted_PhysWriteGCVirt,
430 pdmR3DevHlp_Untrusted_PhysReserve,
431 pdmR3DevHlp_Untrusted_Phys2HCVirt,
432 pdmR3DevHlp_Untrusted_PhysGCPtr2HCPtr,
433 pdmR3DevHlp_Untrusted_A20IsEnabled,
434 pdmR3DevHlp_Untrusted_A20Set,
435 pdmR3DevHlp_Untrusted_VMReset,
436 pdmR3DevHlp_Untrusted_VMSuspend,
437 pdmR3DevHlp_Untrusted_VMPowerOff,
438 pdmR3DevHlp_Untrusted_LockVM,
439 pdmR3DevHlp_Untrusted_UnlockVM,
440 pdmR3DevHlp_Untrusted_AssertVMLock,
441 pdmR3DevHlp_Untrusted_DMARegister,
442 pdmR3DevHlp_Untrusted_DMAReadMemory,
443 pdmR3DevHlp_Untrusted_DMAWriteMemory,
444 pdmR3DevHlp_Untrusted_DMASetDREQ,
445 pdmR3DevHlp_Untrusted_DMAGetChannelMode,
446 pdmR3DevHlp_Untrusted_DMASchedule,
447 pdmR3DevHlp_Untrusted_CMOSWrite,
448 pdmR3DevHlp_Untrusted_CMOSRead,
449 pdmR3DevHlp_Untrusted_QueryCPUId,
450 PDM_DEVHLP_VERSION /* the end */
451};
452
453
454/**
455 * PIC Device Helpers.
456 */
457const PDMPICHLPR3 g_pdmR3DevPicHlp =
458{
459 PDM_PICHLPR3_VERSION,
460 pdmR3PicHlp_SetInterruptFF,
461 pdmR3PicHlp_ClearInterruptFF,
462#ifdef VBOX_WITH_PDM_LOCK
463 pdmR3PicHlp_Lock,
464 pdmR3PicHlp_Unlock,
465#endif
466 pdmR3PicHlp_GetGCHelpers,
467 pdmR3PicHlp_GetR0Helpers,
468 PDM_PICHLPR3_VERSION /* the end */
469};
470
471
472/**
473 * APIC Device Helpers.
474 */
475const PDMAPICHLPR3 g_pdmR3DevApicHlp =
476{
477 PDM_APICHLPR3_VERSION,
478 pdmR3ApicHlp_SetInterruptFF,
479 pdmR3ApicHlp_ClearInterruptFF,
480 pdmR3ApicHlp_ChangeFeature,
481#ifdef VBOX_WITH_PDM_LOCK
482 pdmR3ApicHlp_Lock,
483 pdmR3ApicHlp_Unlock,
484#endif
485 pdmR3ApicHlp_GetGCHelpers,
486 pdmR3ApicHlp_GetR0Helpers,
487 PDM_APICHLPR3_VERSION /* the end */
488};
489
490
491/**
492 * I/O APIC Device Helpers.
493 */
494const PDMIOAPICHLPR3 g_pdmR3DevIoApicHlp =
495{
496 PDM_IOAPICHLPR3_VERSION,
497 pdmR3IoApicHlp_ApicBusDeliver,
498#ifdef VBOX_WITH_PDM_LOCK
499 pdmR3IoApicHlp_Lock,
500 pdmR3IoApicHlp_Unlock,
501#endif
502 pdmR3IoApicHlp_GetGCHelpers,
503 pdmR3IoApicHlp_GetR0Helpers,
504 PDM_IOAPICHLPR3_VERSION /* the end */
505};
506
507
508/**
509 * PCI Bus Device Helpers.
510 */
511const PDMPCIHLPR3 g_pdmR3DevPciHlp =
512{
513 PDM_PCIHLPR3_VERSION,
514 pdmR3PciHlp_IsaSetIrq,
515 pdmR3PciHlp_IoApicSetIrq,
516#ifdef VBOX_WITH_PDM_LOCK
517 pdmR3PciHlp_Lock,
518 pdmR3PciHlp_Unlock,
519#endif
520 pdmR3PciHlp_GetGCHelpers,
521 pdmR3PciHlp_GetR0Helpers,
522 PDM_PCIHLPR3_VERSION, /* the end */
523};
524
525
526/**
527 * DMAC Device Helpers.
528 */
529const PDMDMACHLP g_pdmR3DevDmacHlp =
530{
531 PDM_DMACHLP_VERSION
532};
533
534
535/**
536 * RTC Device Helpers.
537 */
538const PDMRTCHLP g_pdmR3DevRtcHlp =
539{
540 PDM_RTCHLP_VERSION
541};
542
543
544/**
545 * This function will initialize the devices for this VM instance.
546 *
547 *
548 * First of all this mean loading the builtin device and letting them
549 * register themselves. Beyond that any additional device modules are
550 * loaded and called for registration.
551 *
552 * Then the device configuration is enumerated, the instantiation order
553 * is determined, and finally they are instantiated.
554 *
555 * After all device have been successfully instantiated the the primary
556 * PCI Bus device is called to emulate the PCI BIOS, i.e. making the
557 * resource assignments. If there is no PCI device, this step is of course
558 * skipped.
559 *
560 * Finally the init completion routines of the instantiated devices
561 * are called.
562 *
563 * @returns VBox status code.
564 * @param pVM VM Handle.
565 */
566int pdmR3DevInit(PVM pVM)
567{
568 LogFlow(("pdmR3DevInit:\n"));
569
570 AssertRelease(!(RT_OFFSETOF(PDMDEVINS, achInstanceData) & 15));
571 AssertRelease(sizeof(pVM->pdm.s.pDevInstances->Internal.s) <= sizeof(pVM->pdm.s.pDevInstances->Internal.padding));
572
573 /*
574 * Get the GC & R0 devhlps and create the devhlp R3 task queue.
575 */
576 GCPTRTYPE(PCPDMDEVHLPGC) pDevHlpGC;
577 int rc = PDMR3GetSymbolGC(pVM, NULL, "g_pdmGCDevHlp", &pDevHlpGC);
578 AssertReleaseRCReturn(rc, rc);
579
580 R0PTRTYPE(PCPDMDEVHLPR0) pDevHlpR0;
581 rc = PDMR3GetSymbolR0(pVM, NULL, "g_pdmR0DevHlp", &pDevHlpR0);
582 AssertReleaseRCReturn(rc, rc);
583
584 rc = PDMR3QueueCreateInternal(pVM, sizeof(PDMDEVHLPTASK), 8, 0, pdmR3DevHlpQueueConsumer, true, &pVM->pdm.s.pDevHlpQueueHC);
585 AssertRCReturn(rc, rc);
586 pVM->pdm.s.pDevHlpQueueGC = PDMQueueGCPtr(pVM->pdm.s.pDevHlpQueueHC);
587
588
589 /*
590 * Initialize the callback structure.
591 */
592 PDMDEVREGCBINT RegCB;
593 RegCB.Core.u32Version = PDM_DEVREG_CB_VERSION;
594 RegCB.Core.pfnRegister = pdmR3DevReg_Register;
595 RegCB.Core.pfnMMHeapAlloc = pdmR3DevReg_MMHeapAlloc;
596 RegCB.pVM = pVM;
597
598 /*
599 * Load the builtin module
600 */
601 PCFGMNODE pDevicesNode = CFGMR3GetChild(CFGMR3GetRoot(pVM), "PDM/Devices");
602 bool fLoadBuiltin;
603 rc = CFGMR3QueryBool(pDevicesNode, "LoadBuiltin", &fLoadBuiltin);
604 if (rc == VERR_CFGM_VALUE_NOT_FOUND || rc == VERR_CFGM_NO_PARENT)
605 fLoadBuiltin = true;
606 else if (VBOX_FAILURE(rc))
607 {
608 AssertMsgFailed(("Configuration error: Querying boolean \"LoadBuiltin\" failed with %Vrc\n", rc));
609 return rc;
610 }
611 if (fLoadBuiltin)
612 {
613 /* make filename */
614 char *pszFilename = pdmR3FileR3("VBoxDD", /*fShared=*/true);
615 if (!pszFilename)
616 return VERR_NO_TMP_MEMORY;
617 rc = pdmR3DevLoad(pVM, &RegCB, pszFilename, "VBoxDD");
618 RTMemTmpFree(pszFilename);
619 if (VBOX_FAILURE(rc))
620 return rc;
621
622 /* make filename */
623 pszFilename = pdmR3FileR3("VBoxDD2", /*fShared=*/true);
624 if (!pszFilename)
625 return VERR_NO_TMP_MEMORY;
626 rc = pdmR3DevLoad(pVM, &RegCB, pszFilename, "VBoxDD2");
627 RTMemTmpFree(pszFilename);
628 if (VBOX_FAILURE(rc))
629 return rc;
630 }
631
632 /*
633 * Load additional device modules.
634 */
635 PCFGMNODE pCur;
636 for (pCur = CFGMR3GetFirstChild(pDevicesNode); pCur; pCur = CFGMR3GetNextChild(pCur))
637 {
638 /*
639 * Get the name and path.
640 */
641 char szName[PDMMOD_NAME_LEN];
642 rc = CFGMR3GetName(pCur, &szName[0], sizeof(szName));
643 if (rc == VERR_CFGM_NOT_ENOUGH_SPACE)
644 {
645 AssertMsgFailed(("configuration error: The module name is too long, cchName=%d.\n", CFGMR3GetNameLen(pCur)));
646 return VERR_PDM_MODULE_NAME_TOO_LONG;
647 }
648 else if (VBOX_FAILURE(rc))
649 {
650 AssertMsgFailed(("CFGMR3GetName -> %Vrc.\n", rc));
651 return rc;
652 }
653
654 /* the path is optional, if no path the module name + path is used. */
655 char szFilename[RTPATH_MAX];
656 rc = CFGMR3QueryString(pCur, "Path", &szFilename[0], sizeof(szFilename));
657 if (rc == VERR_CFGM_VALUE_NOT_FOUND)
658 strcpy(szFilename, szName);
659 else if (VBOX_FAILURE(rc))
660 {
661 AssertMsgFailed(("configuration error: Failure to query the module path, rc=%Vrc.\n", rc));
662 return rc;
663 }
664
665 /* prepend path? */
666 if (!RTPathHavePath(szFilename))
667 {
668 char *psz = pdmR3FileR3(szFilename);
669 if (!psz)
670 return VERR_NO_TMP_MEMORY;
671 size_t cch = strlen(psz) + 1;
672 if (cch > sizeof(szFilename))
673 {
674 RTMemTmpFree(psz);
675 AssertMsgFailed(("Filename too long! cch=%d '%s'\n", cch, psz));
676 return VERR_FILENAME_TOO_LONG;
677 }
678 memcpy(szFilename, psz, cch);
679 RTMemTmpFree(psz);
680 }
681
682 /*
683 * Load the module and register it's devices.
684 */
685 rc = pdmR3DevLoad(pVM, &RegCB, szFilename, szName);
686 if (VBOX_FAILURE(rc))
687 return rc;
688 }
689
690#ifdef VBOX_WITH_USB
691 /* ditto for USB Devices. */
692 rc = pdmR3UsbLoadModules(pVM);
693 if (RT_FAILURE(rc))
694 return rc;
695#endif
696
697
698 /*
699 *
700 * Enumerate the device instance configurations
701 * and come up with a instantiation order.
702 *
703 */
704 /* Switch to /Devices, which contains the device instantiations. */
705 pDevicesNode = CFGMR3GetChild(CFGMR3GetRoot(pVM), "Devices");
706
707 /*
708 * Count the device instances.
709 */
710 PCFGMNODE pInstanceNode;
711 unsigned cDevs = 0;
712 for (pCur = CFGMR3GetFirstChild(pDevicesNode); pCur; pCur = CFGMR3GetNextChild(pCur))
713 for (pInstanceNode = CFGMR3GetFirstChild(pCur); pInstanceNode; pInstanceNode = CFGMR3GetNextChild(pInstanceNode))
714 cDevs++;
715 if (!cDevs)
716 {
717 Log(("PDM: No devices were configured!\n"));
718 return VINF_SUCCESS;
719 }
720 Log2(("PDM: cDevs=%d!\n", cDevs));
721
722 /*
723 * Collect info on each device instance.
724 */
725 struct DEVORDER
726 {
727 /** Configuration node. */
728 PCFGMNODE pNode;
729 /** Pointer to device. */
730 PPDMDEV pDev;
731 /** Init order. */
732 uint32_t u32Order;
733 /** VBox instance number. */
734 uint32_t iInstance;
735 } *paDevs = (struct DEVORDER *)alloca(sizeof(paDevs[0]) * (cDevs + 1)); /* (One extra for swapping) */
736 Assert(paDevs);
737 unsigned i = 0;
738 for (pCur = CFGMR3GetFirstChild(pDevicesNode); pCur; pCur = CFGMR3GetNextChild(pCur))
739 {
740 /* Get the device name. */
741 char szName[sizeof(paDevs[0].pDev->pDevReg->szDeviceName)];
742 rc = CFGMR3GetName(pCur, szName, sizeof(szName));
743 AssertMsgRCReturn(rc, ("Configuration error: device name is too long (or something)! rc=%Vrc\n", rc), rc);
744
745 /* Find the device. */
746 PPDMDEV pDev = pdmR3DevLookup(pVM, szName);
747 AssertMsgReturn(pDev, ("Configuration error: device '%s' not found!\n", szName), VERR_PDM_DEVICE_NOT_FOUND);
748
749 /* Configured priority or use default based on device class? */
750 uint32_t u32Order;
751 rc = CFGMR3QueryU32(pCur, "Priority", &u32Order);
752 if (rc == VERR_CFGM_VALUE_NOT_FOUND)
753 {
754 uint32_t u32 = pDev->pDevReg->fClass;
755 for (u32Order = 1; !(u32 & u32Order); u32Order <<= 1)
756 /* nop */;
757 }
758 else
759 AssertMsgRCReturn(rc, ("Configuration error: reading \"Priority\" for the '%s' device failed rc=%Vrc!\n", szName, rc), rc);
760
761 /* Enumerate the device instances. */
762 for (pInstanceNode = CFGMR3GetFirstChild(pCur); pInstanceNode; pInstanceNode = CFGMR3GetNextChild(pInstanceNode))
763 {
764 paDevs[i].pNode = pInstanceNode;
765 paDevs[i].pDev = pDev;
766 paDevs[i].u32Order = u32Order;
767
768 /* Get the instance number. */
769 char szInstance[32];
770 rc = CFGMR3GetName(pInstanceNode, szInstance, sizeof(szInstance));
771 AssertMsgRCReturn(rc, ("Configuration error: instance name is too long (or something)! rc=%Vrc\n", rc), rc);
772 char *pszNext = NULL;
773 rc = RTStrToUInt32Ex(szInstance, &pszNext, 0, &paDevs[i].iInstance);
774 AssertMsgRCReturn(rc, ("Configuration error: RTStrToInt32Ex failed on the instance name '%s'! rc=%Vrc\n", szInstance, rc), rc);
775 AssertMsgReturn(!*pszNext, ("Configuration error: the instance name '%s' isn't all digits. (%s)\n", szInstance, pszNext), VERR_INVALID_PARAMETER);
776
777 /* next instance */
778 i++;
779 }
780 } /* devices */
781 Assert(i == cDevs);
782
783 /*
784 * Sort the device array ascending on u32Order. (bubble)
785 */
786 unsigned c = cDevs - 1;
787 while (c)
788 {
789 unsigned j = 0;
790 for (i = 0; i < c; i++)
791 if (paDevs[i].u32Order > paDevs[i + 1].u32Order)
792 {
793 paDevs[cDevs] = paDevs[i + 1];
794 paDevs[i + 1] = paDevs[i];
795 paDevs[i] = paDevs[cDevs];
796 j = i;
797 }
798 c = j;
799 }
800
801
802 /*
803 *
804 * Instantiate the devices.
805 *
806 */
807 for (i = 0; i < cDevs; i++)
808 {
809 /*
810 * Gather a bit of config.
811 */
812 /* trusted */
813 bool fTrusted;
814 rc = CFGMR3QueryBool(paDevs[i].pNode, "Trusted", &fTrusted);
815 if (rc == VERR_CFGM_VALUE_NOT_FOUND)
816 fTrusted = false;
817 else if (VBOX_FAILURE(rc))
818 {
819 AssertMsgFailed(("configuration error: failed to query boolean \"Trusted\", rc=%Vrc\n", rc));
820 return rc;
821 }
822 /* config node */
823 PCFGMNODE pConfigNode = CFGMR3GetChild(paDevs[i].pNode, "Config");
824 if (!pConfigNode)
825 {
826 rc = CFGMR3InsertNode(paDevs[i].pNode, "Config", &pConfigNode);
827 if (VBOX_FAILURE(rc))
828 {
829 AssertMsgFailed(("Failed to create Config node! rc=%Vrc\n", rc));
830 return rc;
831 }
832 }
833 CFGMR3SetRestrictedRoot(pConfigNode);
834
835 /*
836 * Allocate the device instance.
837 */
838 size_t cb = RT_OFFSETOF(PDMDEVINS, achInstanceData[paDevs[i].pDev->pDevReg->cbInstance]);
839 cb = RT_ALIGN_Z(cb, 16);
840 PPDMDEVINS pDevIns;
841 if (paDevs[i].pDev->pDevReg->fFlags & (PDM_DEVREG_FLAGS_GC | PDM_DEVREG_FLAGS_R0))
842 rc = MMR3HyperAllocOnceNoRel(pVM, cb, 0, MM_TAG_PDM_DEVICE, (void **)&pDevIns);
843 else
844 rc = MMR3HeapAllocZEx(pVM, MM_TAG_PDM_DEVICE, cb, (void **)&pDevIns);
845 if (VBOX_FAILURE(rc))
846 {
847 AssertMsgFailed(("Failed to allocate %d bytes of instance data for device '%s'. rc=%Vrc\n",
848 cb, paDevs[i].pDev->pDevReg->szDeviceName, rc));
849 return rc;
850 }
851
852 /*
853 * Initialize it.
854 */
855 pDevIns->u32Version = PDM_DEVINS_VERSION;
856 //pDevIns->Internal.s.pNextHC = NULL;
857 //pDevIns->Internal.s.pPerDeviceNextHC = NULL;
858 pDevIns->Internal.s.pDevHC = paDevs[i].pDev;
859 pDevIns->Internal.s.pVMHC = pVM;
860 pDevIns->Internal.s.pVMGC = pVM->pVMGC;
861 //pDevIns->Internal.s.pLunsHC = NULL;
862 pDevIns->Internal.s.pCfgHandle = paDevs[i].pNode;
863 //pDevIns->Internal.s.pPciDevice = NULL;
864 //pDevIns->Internal.s.pPciBus = NULL; /** @todo pci bus selection. (in 2008 perhaps) */
865 pDevIns->pDevHlp = fTrusted ? &g_pdmR3DevHlpTrusted : &g_pdmR3DevHlpUnTrusted;
866 pDevIns->pDevHlpGC = pDevHlpGC;
867 pDevIns->pDevHlpR0 = pDevHlpR0;
868 pDevIns->pDevReg = paDevs[i].pDev->pDevReg;
869 pDevIns->pCfgHandle = pConfigNode;
870 pDevIns->iInstance = paDevs[i].iInstance;
871 pDevIns->pvInstanceDataR3 = &pDevIns->achInstanceData[0];
872 pDevIns->pvInstanceDataGC = pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_GC
873 ? MMHyperHC2GC(pVM, pDevIns->pvInstanceDataR3) : 0;
874 pDevIns->pvInstanceDataR0 = pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0
875 ? MMHyperR3ToR0(pVM, pDevIns->pvInstanceDataR3) : 0;
876
877 /*
878 * Link it into all the lists.
879 */
880 /* The global instance FIFO. */
881 PPDMDEVINS pPrev1 = pVM->pdm.s.pDevInstances;
882 if (!pPrev1)
883 pVM->pdm.s.pDevInstances = pDevIns;
884 else
885 {
886 while (pPrev1->Internal.s.pNextHC)
887 pPrev1 = pPrev1->Internal.s.pNextHC;
888 pPrev1->Internal.s.pNextHC = pDevIns;
889 }
890
891 /* The per device instance FIFO. */
892 PPDMDEVINS pPrev2 = paDevs[i].pDev->pInstances;
893 if (!pPrev2)
894 paDevs[i].pDev->pInstances = pDevIns;
895 else
896 {
897 while (pPrev2->Internal.s.pPerDeviceNextHC)
898 pPrev2 = pPrev2->Internal.s.pPerDeviceNextHC;
899 pPrev2->Internal.s.pPerDeviceNextHC = pDevIns;
900 }
901
902 /*
903 * Call the constructor.
904 */
905 Log(("PDM: Constructing device '%s' instance %d...\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
906 rc = pDevIns->pDevReg->pfnConstruct(pDevIns, pDevIns->iInstance, pDevIns->pCfgHandle);
907 if (VBOX_FAILURE(rc))
908 {
909 AssertMsgFailed(("Failed to construct '%s'/%d! %Vra\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
910 /* because we're damn lazy right now, we'll say that the destructor will be called even if the constructor fails. */
911 return rc;
912 }
913 } /* for device instances */
914
915#ifdef VBOX_WITH_USB
916 /* ditto for USB Devices. */
917 rc = pdmR3UsbInstantiateDevices(pVM);
918 if (RT_FAILURE(rc))
919 return rc;
920#endif
921
922
923 /*
924 *
925 * PCI BIOS Fake and Init Complete.
926 *
927 */
928 if (pVM->pdm.s.aPciBuses[0].pDevInsR3)
929 {
930 pdmLock(pVM);
931 rc = pVM->pdm.s.aPciBuses[0].pfnFakePCIBIOSR3(pVM->pdm.s.aPciBuses[0].pDevInsR3);
932 pdmUnlock(pVM);
933 if (VBOX_FAILURE(rc))
934 {
935 AssertMsgFailed(("PCI BIOS fake failed rc=%Vrc\n", rc));
936 return rc;
937 }
938 }
939
940 for (PPDMDEVINS pDevIns = pVM->pdm.s.pDevInstances; pDevIns; pDevIns = pDevIns->Internal.s.pNextHC)
941 {
942 if (pDevIns->pDevReg->pfnInitComplete)
943 {
944 rc = pDevIns->pDevReg->pfnInitComplete(pDevIns);
945 if (VBOX_FAILURE(rc))
946 {
947 AssertMsgFailed(("InitComplete on device '%s'/%d failed with rc=%Vrc\n",
948 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
949 return rc;
950 }
951 }
952 }
953
954#ifdef VBOX_WITH_USB
955 /* ditto for USB Devices. */
956 rc = pdmR3UsbInitComplete(pVM);
957 if (RT_FAILURE(rc))
958 return rc;
959#endif
960
961 LogFlow(("pdmR3DevInit: returns %Vrc\n", VINF_SUCCESS));
962 return VINF_SUCCESS;
963}
964
965
966/**
967 * Lookups a device structure by name.
968 * @internal
969 */
970PPDMDEV pdmR3DevLookup(PVM pVM, const char *pszName)
971{
972 RTUINT cchName = strlen(pszName);
973 for (PPDMDEV pDev = pVM->pdm.s.pDevs; pDev; pDev = pDev->pNext)
974 if ( pDev->cchName == cchName
975 && !strcmp(pDev->pDevReg->szDeviceName, pszName))
976 return pDev;
977 return NULL;
978}
979
980
981/**
982 * Loads one device module and call the registration entry point.
983 *
984 * @returns VBox status code.
985 * @param pVM VM handle.
986 * @param pRegCB The registration callback stuff.
987 * @param pszFilename Module filename.
988 * @param pszName Module name.
989 */
990static int pdmR3DevLoad(PVM pVM, PPDMDEVREGCBINT pRegCB, const char *pszFilename, const char *pszName)
991{
992 /*
993 * Load it.
994 */
995 int rc = pdmR3LoadR3(pVM, pszFilename, pszName);
996 if (VBOX_SUCCESS(rc))
997 {
998 /*
999 * Get the registration export and call it.
1000 */
1001 FNPDMVBOXDEVICESREGISTER *pfnVBoxDevicesRegister;
1002 rc = PDMR3GetSymbolR3(pVM, pszName, "VBoxDevicesRegister", (void **)&pfnVBoxDevicesRegister);
1003 if (VBOX_SUCCESS(rc))
1004 {
1005 Log(("PDM: Calling VBoxDevicesRegister (%p) of %s (%s)\n", pfnVBoxDevicesRegister, pszName, pszFilename));
1006 rc = pfnVBoxDevicesRegister(&pRegCB->Core, VBOX_VERSION);
1007 if (VBOX_SUCCESS(rc))
1008 Log(("PDM: Successfully loaded device module %s (%s).\n", pszName, pszFilename));
1009 else
1010 AssertMsgFailed(("VBoxDevicesRegister failed with rc=%Vrc for module %s (%s)\n", rc, pszName, pszFilename));
1011 }
1012 else
1013 {
1014 AssertMsgFailed(("Failed to locate 'VBoxDevicesRegister' in %s (%s) rc=%Vrc\n", pszName, pszFilename, rc));
1015 if (rc == VERR_SYMBOL_NOT_FOUND)
1016 rc = VERR_PDM_NO_REGISTRATION_EXPORT;
1017 }
1018 }
1019 else
1020 AssertMsgFailed(("Failed to load VBoxDD!\n"));
1021 return rc;
1022}
1023
1024
1025
1026/**
1027 * Registers a device with the current VM instance.
1028 *
1029 * @returns VBox status code.
1030 * @param pCallbacks Pointer to the callback table.
1031 * @param pDevReg Pointer to the device registration record.
1032 * This data must be permanent and readonly.
1033 */
1034static DECLCALLBACK(int) pdmR3DevReg_Register(PPDMDEVREGCB pCallbacks, PCPDMDEVREG pDevReg)
1035{
1036 /*
1037 * Validate the registration structure.
1038 */
1039 Assert(pDevReg);
1040 if (pDevReg->u32Version != PDM_DEVREG_VERSION)
1041 {
1042 AssertMsgFailed(("Unknown struct version %#x!\n", pDevReg->u32Version));
1043 return VERR_PDM_UNKNOWN_DEVREG_VERSION;
1044 }
1045 if ( !pDevReg->szDeviceName[0]
1046 || strlen(pDevReg->szDeviceName) >= sizeof(pDevReg->szDeviceName))
1047 {
1048 AssertMsgFailed(("Invalid name '%s'\n", pDevReg->szDeviceName));
1049 return VERR_PDM_INVALID_DEVICE_REGISTRATION;
1050 }
1051 if ( (pDevReg->fFlags & PDM_DEVREG_FLAGS_GC)
1052 && ( !pDevReg->szGCMod[0]
1053 || strlen(pDevReg->szGCMod) >= sizeof(pDevReg->szGCMod)))
1054 {
1055 AssertMsgFailed(("Invalid GC module name '%s' - (Device %s)\n", pDevReg->szGCMod, pDevReg->szDeviceName));
1056 return VERR_PDM_INVALID_DEVICE_REGISTRATION;
1057 }
1058 if ( (pDevReg->fFlags & PDM_DEVREG_FLAGS_R0)
1059 && ( !pDevReg->szR0Mod[0]
1060 || strlen(pDevReg->szR0Mod) >= sizeof(pDevReg->szR0Mod)))
1061 {
1062 AssertMsgFailed(("Invalid R0 module name '%s' - (Device %s)\n", pDevReg->szR0Mod, pDevReg->szDeviceName));
1063 return VERR_PDM_INVALID_DEVICE_REGISTRATION;
1064 }
1065 if ((pDevReg->fFlags & PDM_DEVREG_FLAGS_HOST_BITS_MASK) != PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT)
1066 {
1067 AssertMsgFailed(("Invalid host bits flags! fFlags=%#x (Device %s)\n", pDevReg->fFlags, pDevReg->szDeviceName));
1068 return VERR_PDM_INVALID_DEVICE_HOST_BITS;
1069 }
1070 if (!(pDevReg->fFlags & PDM_DEVREG_FLAGS_GUEST_BITS_MASK))
1071 {
1072 AssertMsgFailed(("Invalid guest bits flags! fFlags=%#x (Device %s)\n", pDevReg->fFlags, pDevReg->szDeviceName));
1073 return VERR_PDM_INVALID_DEVICE_REGISTRATION;
1074 }
1075 if (!pDevReg->fClass)
1076 {
1077 AssertMsgFailed(("No class! (Device %s)\n", pDevReg->szDeviceName));
1078 return VERR_PDM_INVALID_DEVICE_REGISTRATION;
1079 }
1080 if (pDevReg->cMaxInstances <= 0)
1081 {
1082 AssertMsgFailed(("Max instances %u! (Device %s)\n", pDevReg->cMaxInstances, pDevReg->szDeviceName));
1083 return VERR_PDM_INVALID_DEVICE_REGISTRATION;
1084 }
1085 if (pDevReg->cbInstance > (RTUINT)(pDevReg->fFlags & (PDM_DEVREG_FLAGS_GC | PDM_DEVREG_FLAGS_R0) ? 96 * _1K : _1M))
1086 {
1087 AssertMsgFailed(("Instance size %d bytes! (Device %s)\n", pDevReg->cbInstance, pDevReg->szDeviceName));
1088 return VERR_PDM_INVALID_DEVICE_REGISTRATION;
1089 }
1090 if (!pDevReg->pfnConstruct)
1091 {
1092 AssertMsgFailed(("No constructore! (Device %s)\n", pDevReg->szDeviceName));
1093 return VERR_PDM_INVALID_DEVICE_REGISTRATION;
1094 }
1095 /* Check matching guest bits last without any asserting. Enables trial and error registration. */
1096 if (!(pDevReg->fFlags & PDM_DEVREG_FLAGS_GUEST_BITS_DEFAULT))
1097 {
1098 Log(("PDM: Rejected device '%s' because it didn't match the guest bits.\n", pDevReg->szDeviceName));
1099 return VERR_PDM_INVALID_DEVICE_GUEST_BITS;
1100 }
1101
1102 /*
1103 * Check for duplicate and find FIFO entry at the same time.
1104 */
1105 PCPDMDEVREGCBINT pRegCB = (PCPDMDEVREGCBINT)pCallbacks;
1106 PPDMDEV pDevPrev = NULL;
1107 PPDMDEV pDev = pRegCB->pVM->pdm.s.pDevs;
1108 for (; pDev; pDevPrev = pDev, pDev = pDev->pNext)
1109 {
1110 if (!strcmp(pDev->pDevReg->szDeviceName, pDevReg->szDeviceName))
1111 {
1112 AssertMsgFailed(("Device '%s' already exists\n", pDevReg->szDeviceName));
1113 return VERR_PDM_DEVICE_NAME_CLASH;
1114 }
1115 }
1116
1117 /*
1118 * Allocate new device structure and insert it into the list.
1119 */
1120 pDev = (PPDMDEV)MMR3HeapAlloc(pRegCB->pVM, MM_TAG_PDM_DEVICE, sizeof(*pDev));
1121 if (pDev)
1122 {
1123 pDev->pNext = NULL;
1124 pDev->cInstances = 0;
1125 pDev->pInstances = NULL;
1126 pDev->pDevReg = pDevReg;
1127 pDev->cchName = strlen(pDevReg->szDeviceName);
1128
1129 if (pDevPrev)
1130 pDevPrev->pNext = pDev;
1131 else
1132 pRegCB->pVM->pdm.s.pDevs = pDev;
1133 Log(("PDM: Registered device '%s'\n", pDevReg->szDeviceName));
1134 return VINF_SUCCESS;
1135 }
1136 return VERR_NO_MEMORY;
1137}
1138
1139
1140/**
1141 * Allocate memory which is associated with current VM instance
1142 * and automatically freed on it's destruction.
1143 *
1144 * @returns Pointer to allocated memory. The memory is *NOT* zero-ed.
1145 * @param pCallbacks Pointer to the callback table.
1146 * @param cb Number of bytes to allocate.
1147 */
1148static DECLCALLBACK(void *) pdmR3DevReg_MMHeapAlloc(PPDMDEVREGCB pCallbacks, size_t cb)
1149{
1150 Assert(pCallbacks);
1151 Assert(pCallbacks->u32Version == PDM_DEVREG_CB_VERSION);
1152 LogFlow(("pdmR3DevReg_MMHeapAlloc: cb=%#x\n", cb));
1153
1154 void *pv = MMR3HeapAlloc(((PPDMDEVREGCBINT)pCallbacks)->pVM, MM_TAG_PDM_DEVICE_USER, cb);
1155
1156 LogFlow(("pdmR3DevReg_MMHeapAlloc: returns %p\n", pv));
1157 return pv;
1158}
1159
1160
1161/**
1162 * Queue consumer callback for internal component.
1163 *
1164 * @returns Success indicator.
1165 * If false the item will not be removed and the flushing will stop.
1166 * @param pVM The VM handle.
1167 * @param pItem The item to consume. Upon return this item will be freed.
1168 */
1169static DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem)
1170{
1171 PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)pItem;
1172 LogFlow(("pdmR3DevHlpQueueConsumer: enmOp=%d pDevIns=%p\n", pTask->enmOp, pTask->pDevInsHC));
1173 switch (pTask->enmOp)
1174 {
1175 case PDMDEVHLPTASKOP_ISA_SET_IRQ:
1176 PDMIsaSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
1177 break;
1178
1179 case PDMDEVHLPTASKOP_PCI_SET_IRQ:
1180 pdmR3DevHlp_PCISetIrq(pTask->pDevInsHC, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
1181 break;
1182
1183 case PDMDEVHLPTASKOP_IOAPIC_SET_IRQ:
1184 PDMIoApicSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
1185 break;
1186
1187 default:
1188 AssertReleaseMsgFailed(("Invalid operation %d\n", pTask->enmOp));
1189 break;
1190 }
1191 return true;
1192}
1193
1194
1195/** @copydoc PDMDEVHLP::pfnIOPortRegister */
1196static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser, PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
1197 PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
1198{
1199 PDMDEV_ASSERT_DEVINS(pDevIns);
1200 LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pfnOut=%p pfnIn=%p pfnOutStr=%p pfnInStr=%p p32_tszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
1201 Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc, pszDesc));
1202 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
1203
1204 int rc = IOMR3IOPortRegisterR3(pDevIns->Internal.s.pVMHC, pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
1205
1206 LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1207 return rc;
1208}
1209
1210
1211/** @copydoc PDMDEVHLP::pfnIOPortRegisterGC */
1212static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterGC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTGCPTR pvUser,
1213 const char *pszOut, const char *pszIn,
1214 const char *pszOutStr, const char *pszInStr, const char *pszDesc)
1215{
1216 PDMDEV_ASSERT_DEVINS(pDevIns);
1217 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
1218 LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
1219 Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
1220
1221 /*
1222 * Resolve the functions (one of the can be NULL).
1223 */
1224 int rc = VINF_SUCCESS;
1225 if ( pDevIns->pDevReg->szGCMod[0]
1226 && (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_GC))
1227 {
1228 RTGCPTR GCPtrIn = 0;
1229 if (pszIn)
1230 {
1231 rc = PDMR3GetSymbolGCLazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szGCMod, pszIn, &GCPtrIn);
1232 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pDevReg->szGCMod, pszIn));
1233 }
1234 RTGCPTR GCPtrOut = 0;
1235 if (pszOut && VBOX_SUCCESS(rc))
1236 {
1237 rc = PDMR3GetSymbolGCLazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szGCMod, pszOut, &GCPtrOut);
1238 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pDevReg->szGCMod, pszOut));
1239 }
1240 RTGCPTR GCPtrInStr = 0;
1241 if (pszInStr && VBOX_SUCCESS(rc))
1242 {
1243 rc = PDMR3GetSymbolGCLazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szGCMod, pszInStr, &GCPtrInStr);
1244 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pDevReg->szGCMod, pszInStr));
1245 }
1246 RTGCPTR GCPtrOutStr = 0;
1247 if (pszOutStr && VBOX_SUCCESS(rc))
1248 {
1249 rc = PDMR3GetSymbolGCLazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szGCMod, pszOutStr, &GCPtrOutStr);
1250 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pDevReg->szGCMod, pszOutStr));
1251 }
1252
1253 if (VBOX_SUCCESS(rc))
1254 rc = IOMIOPortRegisterGC(pDevIns->Internal.s.pVMHC, pDevIns, Port, cPorts, pvUser, GCPtrOut, GCPtrIn, GCPtrOutStr, GCPtrInStr, pszDesc);
1255 }
1256 else
1257 {
1258 AssertMsgFailed(("No GC module for this driver!\n"));
1259 rc = VERR_INVALID_PARAMETER;
1260 }
1261
1262 LogFlow(("pdmR3DevHlp_IOPortRegisterGC: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1263 return rc;
1264}
1265
1266
1267/** @copydoc PDMDEVHLP::pfnIOPortRegisterR0 */
1268static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
1269 const char *pszOut, const char *pszIn,
1270 const char *pszOutStr, const char *pszInStr, const char *pszDesc)
1271{
1272 PDMDEV_ASSERT_DEVINS(pDevIns);
1273 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
1274 LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
1275 Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
1276
1277 if (!HWACCMR3IsAllowed(pDevIns->Internal.s.pVMHC))
1278 return VINF_SUCCESS; /* NOP */
1279
1280 /*
1281 * Resolve the functions (one of the can be NULL).
1282 */
1283 int rc = VINF_SUCCESS;
1284 if ( pDevIns->pDevReg->szR0Mod[0]
1285 && (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
1286 {
1287 R0PTRTYPE(PFNIOMIOPORTIN) pfnR0PtrIn = 0;
1288 if (pszIn)
1289 {
1290 rc = PDMR3GetSymbolR0Lazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szR0Mod, pszIn, &pfnR0PtrIn);
1291 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pDevReg->szR0Mod, pszIn));
1292 }
1293 R0PTRTYPE(PFNIOMIOPORTOUT) pfnR0PtrOut = 0;
1294 if (pszOut && VBOX_SUCCESS(rc))
1295 {
1296 rc = PDMR3GetSymbolR0Lazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szR0Mod, pszOut, &pfnR0PtrOut);
1297 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pDevReg->szR0Mod, pszOut));
1298 }
1299 R0PTRTYPE(PFNIOMIOPORTINSTRING) pfnR0PtrInStr = 0;
1300 if (pszInStr && VBOX_SUCCESS(rc))
1301 {
1302 rc = PDMR3GetSymbolR0Lazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szR0Mod, pszInStr, &pfnR0PtrInStr);
1303 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pDevReg->szR0Mod, pszInStr));
1304 }
1305 R0PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnR0PtrOutStr = 0;
1306 if (pszOutStr && VBOX_SUCCESS(rc))
1307 {
1308 rc = PDMR3GetSymbolR0Lazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szR0Mod, pszOutStr, &pfnR0PtrOutStr);
1309 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pDevReg->szR0Mod, pszOutStr));
1310 }
1311
1312 if (VBOX_SUCCESS(rc))
1313 rc = IOMIOPortRegisterR0(pDevIns->Internal.s.pVMHC, pDevIns, Port, cPorts, pvUser, pfnR0PtrOut, pfnR0PtrIn, pfnR0PtrOutStr, pfnR0PtrInStr, pszDesc);
1314 }
1315 else
1316 {
1317 AssertMsgFailed(("No R0 module for this driver!\n"));
1318 rc = VERR_INVALID_PARAMETER;
1319 }
1320
1321 LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1322 return rc;
1323}
1324
1325
1326/** @copydoc PDMDEVHLP::pfnIOPortDeregister */
1327static DECLCALLBACK(int) pdmR3DevHlp_IOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts)
1328{
1329 PDMDEV_ASSERT_DEVINS(pDevIns);
1330 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
1331 LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: Port=%#x cPorts=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
1332 Port, cPorts));
1333
1334 int rc = IOMR3IOPortDeregister(pDevIns->Internal.s.pVMHC, pDevIns, Port, cPorts);
1335
1336 LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1337 return rc;
1338}
1339
1340
1341/** @copydoc PDMDEVHLP::pfnMMIORegister */
1342static DECLCALLBACK(int) pdmR3DevHlp_MMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
1343 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
1344 const char *pszDesc)
1345{
1346 PDMDEV_ASSERT_DEVINS(pDevIns);
1347 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
1348 LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: GCPhysStart=%VGp cbRange=%#x pvUser=%p pfnWrite=%p pfnRead=%p pfnFill=%p pszDesc=%p:{%s}\n",
1349 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc, pszDesc));
1350
1351 int rc = IOMR3MMIORegisterR3(pDevIns->Internal.s.pVMHC, pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
1352
1353 LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1354 return rc;
1355}
1356
1357
1358/** @copydoc PDMDEVHLP::pfnMMIORegisterGC */
1359static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterGC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
1360 const char *pszWrite, const char *pszRead, const char *pszFill,
1361 const char *pszDesc)
1362{
1363 PDMDEV_ASSERT_DEVINS(pDevIns);
1364 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
1365 LogFlow(("pdmR3DevHlp_MMIORegisterGC: caller='%s'/%d: GCPhysStart=%VGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s} pszDesc=%p:{%s}\n",
1366 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill, pszDesc, pszDesc));
1367
1368 /*
1369 * Resolve the functions.
1370 * Not all function have to present, leave it to IOM to enforce this.
1371 */
1372 int rc = VINF_SUCCESS;
1373 if ( pDevIns->pDevReg->szGCMod[0]
1374 && (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_GC))
1375 {
1376 RTGCPTR GCPtrWrite = 0;
1377 if (pszWrite)
1378 rc = PDMR3GetSymbolGCLazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szGCMod, pszWrite, &GCPtrWrite);
1379 RTGCPTR GCPtrRead = 0;
1380 int rc2 = VINF_SUCCESS;
1381 if (pszRead)
1382 rc2 = PDMR3GetSymbolGCLazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szGCMod, pszRead, &GCPtrRead);
1383 RTGCPTR GCPtrFill = 0;
1384 int rc3 = VINF_SUCCESS;
1385 if (pszFill)
1386 rc3 = PDMR3GetSymbolGCLazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szGCMod, pszFill, &GCPtrFill);
1387 if (VBOX_SUCCESS(rc) && VBOX_SUCCESS(rc2) && VBOX_SUCCESS(rc3))
1388 rc = IOMMMIORegisterGC(pDevIns->Internal.s.pVMHC, pDevIns, GCPhysStart, cbRange, pvUser, GCPtrWrite, GCPtrRead, GCPtrFill, pszDesc);
1389 else
1390 {
1391 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pDevReg->szGCMod, pszWrite));
1392 AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pDevReg->szGCMod, pszRead));
1393 AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pDevReg->szGCMod, pszFill));
1394 if (VBOX_FAILURE(rc2) && VBOX_SUCCESS(rc))
1395 rc = rc2;
1396 if (VBOX_FAILURE(rc3) && VBOX_SUCCESS(rc))
1397 rc = rc3;
1398 }
1399 }
1400 else
1401 {
1402 AssertMsgFailed(("No GC module for this driver!\n"));
1403 rc = VERR_INVALID_PARAMETER;
1404 }
1405
1406 LogFlow(("pdmR3DevHlp_MMIORegisterGC: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1407 return rc;
1408}
1409
1410/** @copydoc PDMDEVHLP::pfnMMIORegisterR0 */
1411static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
1412 const char *pszWrite, const char *pszRead, const char *pszFill,
1413 const char *pszDesc)
1414{
1415 PDMDEV_ASSERT_DEVINS(pDevIns);
1416 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
1417 LogFlow(("pdmR3DevHlp_MMIORegisterHC: caller='%s'/%d: GCPhysStart=%VGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s} pszDesc=%p:{%s}\n",
1418 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill, pszDesc, pszDesc));
1419
1420 if (!HWACCMR3IsAllowed(pDevIns->Internal.s.pVMHC))
1421 return VINF_SUCCESS; /* NOP */
1422
1423 /*
1424 * Resolve the functions.
1425 * Not all function have to present, leave it to IOM to enforce this.
1426 */
1427 int rc = VINF_SUCCESS;
1428 if ( pDevIns->pDevReg->szR0Mod[0]
1429 && (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
1430 {
1431 R0PTRTYPE(PFNIOMMMIOWRITE) pfnR0PtrWrite = 0;
1432 if (pszWrite)
1433 rc = PDMR3GetSymbolR0Lazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szR0Mod, pszWrite, &pfnR0PtrWrite);
1434 R0PTRTYPE(PFNIOMMMIOREAD) pfnR0PtrRead = 0;
1435 int rc2 = VINF_SUCCESS;
1436 if (pszRead)
1437 rc2 = PDMR3GetSymbolR0Lazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szR0Mod, pszRead, &pfnR0PtrRead);
1438 R0PTRTYPE(PFNIOMMMIOFILL) pfnR0PtrFill = 0;
1439 int rc3 = VINF_SUCCESS;
1440 if (pszFill)
1441 rc3 = PDMR3GetSymbolR0Lazy(pDevIns->Internal.s.pVMHC, pDevIns->pDevReg->szR0Mod, pszFill, &pfnR0PtrFill);
1442 if (VBOX_SUCCESS(rc) && VBOX_SUCCESS(rc2) && VBOX_SUCCESS(rc3))
1443 rc = IOMMMIORegisterR0(pDevIns->Internal.s.pVMHC, pDevIns, GCPhysStart, cbRange, pvUser, pfnR0PtrWrite, pfnR0PtrRead, pfnR0PtrFill, pszDesc);
1444 else
1445 {
1446 AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pDevReg->szR0Mod, pszWrite));
1447 AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pDevReg->szR0Mod, pszRead));
1448 AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pDevReg->szR0Mod, pszFill));
1449 if (VBOX_FAILURE(rc2) && VBOX_SUCCESS(rc))
1450 rc = rc2;
1451 if (VBOX_FAILURE(rc3) && VBOX_SUCCESS(rc))
1452 rc = rc3;
1453 }
1454 }
1455 else
1456 {
1457 AssertMsgFailed(("No R0 module for this driver!\n"));
1458 rc = VERR_INVALID_PARAMETER;
1459 }
1460
1461 LogFlow(("pdmR3DevHlp_MMIORegisterR0: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1462 return rc;
1463}
1464
1465
1466/** @copydoc PDMDEVHLP::pfnMMIODeregister */
1467static DECLCALLBACK(int) pdmR3DevHlp_MMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
1468{
1469 PDMDEV_ASSERT_DEVINS(pDevIns);
1470 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
1471 LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: GCPhysStart=%VGp cbRange=%#x\n",
1472 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange));
1473
1474 int rc = IOMR3MMIODeregister(pDevIns->Internal.s.pVMHC, pDevIns, GCPhysStart, cbRange);
1475
1476 LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1477 return rc;
1478}
1479
1480
1481/** @copydoc PDMDEVHLP::pfnROMRegister */
1482static DECLCALLBACK(int) pdmR3DevHlp_ROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void *pvBinary, const char *pszDesc)
1483{
1484 PDMDEV_ASSERT_DEVINS(pDevIns);
1485 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
1486 LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: GCPhysStart=%VGp cbRange=%#x pvBinary=%p pszDesc=%p:{%s}\n",
1487 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhysStart, cbRange, pvBinary, pszDesc, pszDesc));
1488
1489 int rc = MMR3PhysRomRegister(pDevIns->Internal.s.pVMHC, pDevIns, GCPhysStart, cbRange, pvBinary, pszDesc);
1490
1491 LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1492 return rc;
1493}
1494
1495
1496/** @copydoc PDMDEVHLP::pfnSSMRegister */
1497static DECLCALLBACK(int) pdmR3DevHlp_SSMRegister(PPDMDEVINS pDevIns, const char *pszName, uint32_t u32Instance, uint32_t u32Version, size_t cbGuess,
1498 PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
1499 PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
1500{
1501 PDMDEV_ASSERT_DEVINS(pDevIns);
1502 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
1503 LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: pszName=%p:{%s} u32Instance=%#x u32Version=#x cbGuess=%#x pfnSavePrep=%p pfnSaveExec=%p pfnSaveDone=%p pszLoadPrep=%p pfnLoadExec=%p pfnLoaddone=%p\n",
1504 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pszName, pszName, u32Instance, u32Version, cbGuess, pfnSavePrep, pfnSaveExec, pfnSaveDone, pfnLoadPrep, pfnLoadExec, pfnLoadDone));
1505
1506 int rc = SSMR3Register(pDevIns->Internal.s.pVMHC, pDevIns, pszName, u32Instance, u32Version, cbGuess,
1507 pfnSavePrep, pfnSaveExec, pfnSaveDone,
1508 pfnLoadPrep, pfnLoadExec, pfnLoadDone);
1509
1510 LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1511 return rc;
1512}
1513
1514
1515/** @copydoc PDMDEVHLP::pfnTMTimerCreate */
1516static DECLCALLBACK(int) pdmR3DevHlp_TMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, const char *pszDesc, PPTMTIMERHC ppTimer)
1517{
1518 PDMDEV_ASSERT_DEVINS(pDevIns);
1519 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
1520 LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: enmClock=%d pfnCallback=%p pszDesc=%p:{%s} ppTimer=%p\n",
1521 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, enmClock, pfnCallback, pszDesc, pszDesc, ppTimer));
1522
1523 int rc = TMR3TimerCreateDevice(pDevIns->Internal.s.pVMHC, pDevIns, enmClock, pfnCallback, pszDesc, ppTimer);
1524
1525 LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1526 return rc;
1527}
1528
1529
1530/** @copydoc PDMDEVHLP::pfnTMTimerCreateExternal */
1531static DECLCALLBACK(PTMTIMERHC) pdmR3DevHlp_TMTimerCreateExternal(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMEREXT pfnCallback, void *pvUser, const char *pszDesc)
1532{
1533 PDMDEV_ASSERT_DEVINS(pDevIns);
1534 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
1535
1536 return TMR3TimerCreateExternal(pDevIns->Internal.s.pVMHC, enmClock, pfnCallback, pvUser, pszDesc);
1537}
1538
1539/** @copydoc PDMDEVHLP::pfnPCIRegister */
1540static DECLCALLBACK(int) pdmR3DevHlp_PCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
1541{
1542 PDMDEV_ASSERT_DEVINS(pDevIns);
1543 PVM pVM = pDevIns->Internal.s.pVMHC;
1544 VM_ASSERT_EMT(pVM);
1545 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: pPciDev=%p:{.config={%#.256Vhxs}\n",
1546 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev, pPciDev->config));
1547
1548 /*
1549 * Validate input.
1550 */
1551 if (!pPciDev)
1552 {
1553 Assert(pPciDev);
1554 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Vrc (pPciDev)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1555 return VERR_INVALID_PARAMETER;
1556 }
1557 if (!pPciDev->config[0] && !pPciDev->config[1])
1558 {
1559 Assert(pPciDev->config[0] || pPciDev->config[1]);
1560 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Vrc (vendor)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1561 return VERR_INVALID_PARAMETER;
1562 }
1563 if (pDevIns->Internal.s.pPciDeviceHC)
1564 {
1565 /** @todo the PCI device vs. PDM device designed is a bit flawed if we have to
1566 * support a PDM device with multiple PCI devices. This might become a problem
1567 * when upgrading the chipset for instance...
1568 */
1569 AssertMsgFailed(("Only one PCI device per device is currently implemented!\n"));
1570 return VERR_INTERNAL_ERROR;
1571 }
1572
1573 /*
1574 * Choose the PCI bus for the device.
1575 * This is simple. If the device was configured for a particular bus, it'll
1576 * already have one. If not, we'll just take the first one.
1577 */
1578 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusHC;
1579 if (!pBus)
1580 pBus = pDevIns->Internal.s.pPciBusHC = &pVM->pdm.s.aPciBuses[0];
1581 int rc;
1582 if (pBus)
1583 {
1584 if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_GC)
1585 pDevIns->Internal.s.pPciBusGC = MMHyperHC2GC(pVM, pDevIns->Internal.s.pPciBusHC);
1586
1587 /*
1588 * Check the configuration for PCI device and function assignment.
1589 */
1590 int iDev = -1;
1591 uint8_t u8Device;
1592 rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIDeviceNo", &u8Device);
1593 if (VBOX_SUCCESS(rc))
1594 {
1595 if (u8Device > 31)
1596 {
1597 AssertMsgFailed(("Configuration error: PCIDeviceNo=%d, max is 31. (%s/%d)\n",
1598 u8Device, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1599 return VERR_INTERNAL_ERROR;
1600 }
1601
1602 uint8_t u8Function;
1603 rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIFunctionNo", &u8Function);
1604 if (VBOX_FAILURE(rc))
1605 {
1606 AssertMsgFailed(("Configuration error: PCIDeviceNo, but PCIFunctionNo query failed with rc=%Vrc (%s/%d)\n",
1607 rc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1608 return rc;
1609 }
1610 if (u8Function > 7)
1611 {
1612 AssertMsgFailed(("Configuration error: PCIFunctionNo=%d, max is 7. (%s/%d)\n",
1613 u8Function, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1614 return VERR_INTERNAL_ERROR;
1615 }
1616 iDev = (u8Device << 3) | u8Function;
1617 }
1618 else if (rc != VERR_CFGM_VALUE_NOT_FOUND)
1619 {
1620 AssertMsgFailed(("Configuration error: PCIDeviceNo query failed with rc=%Vrc (%s/%d)\n",
1621 rc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1622 return rc;
1623 }
1624
1625 /*
1626 * Call the pci bus device to do the actual registration.
1627 */
1628 pdmLock(pVM);
1629 rc = pBus->pfnRegisterR3(pBus->pDevInsR3, pPciDev, pDevIns->pDevReg->szDeviceName, iDev);
1630 pdmUnlock(pVM);
1631 if (VBOX_SUCCESS(rc))
1632 {
1633 pDevIns->Internal.s.pPciDeviceHC = pPciDev;
1634 if (pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_GC)
1635 pDevIns->Internal.s.pPciDeviceGC = MMHyperHC2GC(pVM, pPciDev);
1636 else
1637 pDevIns->Internal.s.pPciDeviceGC = 0;
1638 pPciDev->pDevIns = pDevIns;
1639 Log(("PDM: Registered device '%s'/%d as PCI device %d on bus %d\n",
1640 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev->devfn, pDevIns->Internal.s.pPciBusHC->iBus));
1641 }
1642 }
1643 else
1644 {
1645 AssertMsgFailed(("Configuration error: No PCI bus available. This could be related to init order too!\n"));
1646 rc = VERR_PDM_NO_PCI_BUS;
1647 }
1648
1649 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1650 return rc;
1651}
1652
1653
1654/** @copydoc PDMDEVHLP::pfnPCIIORegionRegister */
1655static DECLCALLBACK(int) pdmR3DevHlp_PCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
1656{
1657 PDMDEV_ASSERT_DEVINS(pDevIns);
1658 PVM pVM = pDevIns->Internal.s.pVMHC;
1659 VM_ASSERT_EMT(pVM);
1660 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: iRegion=%d cbRegion=%#x enmType=%d pfnCallback=%p\n",
1661 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iRegion, cbRegion, enmType, pfnCallback));
1662
1663 /*
1664 * Validate input.
1665 */
1666 if (iRegion < 0 || iRegion >= PCI_NUM_REGIONS)
1667 {
1668 Assert(iRegion >= 0 && iRegion < PCI_NUM_REGIONS);
1669 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Vrc (iRegion)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1670 return VERR_INVALID_PARAMETER;
1671 }
1672 switch (enmType)
1673 {
1674 case PCI_ADDRESS_SPACE_MEM:
1675 case PCI_ADDRESS_SPACE_IO:
1676 case PCI_ADDRESS_SPACE_MEM_PREFETCH:
1677 break;
1678 default:
1679 AssertMsgFailed(("enmType=%#x is unknown\n", enmType));
1680 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Vrc (enmType)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1681 return VERR_INVALID_PARAMETER;
1682 }
1683 if (!pfnCallback)
1684 {
1685 Assert(pfnCallback);
1686 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Vrc (callback)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1687 return VERR_INVALID_PARAMETER;
1688 }
1689 AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
1690
1691 /*
1692 * Must have a PCI device registered!
1693 */
1694 int rc;
1695 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceHC;
1696 if (pPciDev)
1697 {
1698 /*
1699 * We're currently restricted to page aligned MMIO regions.
1700 */
1701 if ( (enmType == PCI_ADDRESS_SPACE_MEM || enmType == PCI_ADDRESS_SPACE_MEM_PREFETCH)
1702 && cbRegion != RT_ALIGN_32(cbRegion, PAGE_SIZE))
1703 {
1704 Log(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: aligning cbRegion %#x -> %#x\n",
1705 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbRegion, RT_ALIGN_32(cbRegion, PAGE_SIZE)));
1706 cbRegion = RT_ALIGN_32(cbRegion, PAGE_SIZE);
1707 }
1708
1709 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusHC;
1710 Assert(pBus);
1711 pdmLock(pVM);
1712 rc = pBus->pfnIORegionRegisterR3(pBus->pDevInsR3, pPciDev, iRegion, cbRegion, enmType, pfnCallback);
1713 pdmUnlock(pVM);
1714 }
1715 else
1716 {
1717 AssertMsgFailed(("No PCI device registered!\n"));
1718 rc = VERR_PDM_NOT_PCI_DEVICE;
1719 }
1720
1721 LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
1722 return rc;
1723}
1724
1725
1726/** @copydoc PDMDEVHLP::pfnPCISetConfigCallbacks */
1727static DECLCALLBACK(void) pdmR3DevHlp_PCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
1728 PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
1729{
1730 PDMDEV_ASSERT_DEVINS(pDevIns);
1731 PVM pVM = pDevIns->Internal.s.pVMHC;
1732 VM_ASSERT_EMT(pVM);
1733 LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: pPciDev=%p pfnRead=%p ppfnReadOld=%p pfnWrite=%p ppfnWriteOld=%p\n",
1734 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld));
1735
1736 /*
1737 * Validate input and resolve defaults.
1738 */
1739 AssertPtr(pfnRead);
1740 AssertPtr(pfnWrite);
1741 AssertPtrNull(ppfnReadOld);
1742 AssertPtrNull(ppfnWriteOld);
1743 AssertPtrNull(pPciDev);
1744
1745 if (!pPciDev)
1746 pPciDev = pDevIns->Internal.s.pPciDeviceHC;
1747 AssertReleaseMsg(pPciDev, ("You must register your device first!\n"));
1748 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusHC;
1749 AssertRelease(pBus);
1750 AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
1751
1752 /*
1753 * Do the job.
1754 */
1755 pdmLock(pVM);
1756 pBus->pfnSetConfigCallbacksR3(pBus->pDevInsR3, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
1757 pdmUnlock(pVM);
1758
1759 LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1760}
1761
1762
1763/** @copydoc PDMDEVHLP::pfnPCISetIrq */
1764static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1765{
1766 PDMDEV_ASSERT_DEVINS(pDevIns);
1767 LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iIrq, iLevel));
1768
1769 /*
1770 * Validate input.
1771 */
1772 /** @todo iIrq and iLevel checks. */
1773
1774 /*
1775 * Must have a PCI device registered!
1776 */
1777 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceHC;
1778 if (pPciDev)
1779 {
1780 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusHC; /** @todo the bus should be associated with the PCI device not the PDM device. */
1781 Assert(pBus);
1782#ifdef VBOX_WITH_PDM_LOCK
1783 PVM pVM = pDevIns->Internal.s.pVMHC;
1784 pdmLock(pVM);
1785 pBus->pfnSetIrqR3(pBus->pDevInsR3, pPciDev, iIrq, iLevel);
1786 pdmUnlock(pVM);
1787
1788#else /* !VBOX_WITH_PDM_LOCK */
1789 /*
1790 * For the convenience of the device we put no thread restriction on this interface.
1791 * That means we'll have to check which thread we're in and choose our path.
1792 */
1793 if (VM_IS_EMT(pDevIns->Internal.s.pVMHC) || VMMR3LockIsOwner(pDevIns->Internal.s.pVMHC))
1794 pBus->pfnSetIrqR3(pBus->pDevInsR3, pPciDev, iIrq, iLevel);
1795 else
1796 {
1797 Log(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: Requesting call in EMT...\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1798 PVMREQ pReq;
1799 int rc = VMR3ReqCallVoid(pDevIns->Internal.s.pVMHC, &pReq, RT_INDEFINITE_WAIT,
1800 (PFNRT)pBus->pfnSetIrqR3, 4, pBus->pDevInsR3, pPciDev, iIrq, iLevel);
1801 while (rc == VERR_TIMEOUT)
1802 rc = VMR3ReqWait(pReq, RT_INDEFINITE_WAIT);
1803 AssertReleaseRC(rc);
1804 VMR3ReqFree(pReq);
1805 }
1806#endif /* !VBOX_WITH_PDM_LOCK */
1807 }
1808 else
1809 AssertReleaseMsgFailed(("No PCI device registered!\n"));
1810
1811 LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1812}
1813
1814
1815/** @copydoc PDMDEVHLP::pfnPCISetIrqNoWait */
1816static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1817{
1818#ifdef VBOX_WITH_PDM_LOCK
1819 pdmR3DevHlp_PCISetIrq(pDevIns, iIrq, iLevel);
1820#else /* !VBOX_WITH_PDM_LOCK */
1821 PDMDEV_ASSERT_DEVINS(pDevIns);
1822 LogFlow(("pdmR3DevHlp_PCISetIrqNoWait: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iIrq, iLevel));
1823
1824 /*
1825 * Validate input.
1826 */
1827 /** @todo iIrq and iLevel checks. */
1828
1829 /*
1830 * Must have a PCI device registered!
1831 */
1832 PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceHC;
1833 if (pPciDev)
1834 {
1835 PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusHC;
1836 Assert(pBus);
1837
1838 /*
1839 * For the convenience of the device we put no thread restriction on this interface.
1840 * That means we'll have to check which thread we're in and choose our path.
1841 */
1842 if (VM_IS_EMT(pDevIns->Internal.s.pVMHC) || VMMR3LockIsOwner(pDevIns->Internal.s.pVMHC))
1843 pBus->pfnSetIrqR3(pBus->pDevInsR3, pPciDev, iIrq, iLevel);
1844 else
1845 {
1846 Log(("pdmR3DevHlp_PCISetIrqNoWait: caller='%s'/%d: Queueing call in EMT...\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1847 int rc = VMR3ReqCallEx(pDevIns->Internal.s.pVMHC, NULL, RT_INDEFINITE_WAIT, VMREQFLAGS_NO_WAIT | VMREQFLAGS_VOID,
1848 (PFNRT)pBus->pfnSetIrqR3, 4, pBus->pDevInsR3, pPciDev, iIrq, iLevel);
1849 AssertReleaseRC(rc);
1850 }
1851 }
1852 else
1853 AssertReleaseMsgFailed(("No PCI device registered!\n"));
1854
1855 LogFlow(("pdmR3DevHlp_PCISetIrqNoWait: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1856#endif /* !VBOX_WITH_PDM_LOCK */
1857}
1858
1859
1860/** @copydoc PDMDEVHLP::pfnISASetIrq */
1861static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1862{
1863 PDMDEV_ASSERT_DEVINS(pDevIns);
1864 LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iIrq, iLevel));
1865
1866 /*
1867 * Validate input.
1868 */
1869 /** @todo iIrq and iLevel checks. */
1870
1871 PVM pVM = pDevIns->Internal.s.pVMHC;
1872#ifdef VBOX_WITH_PDM_LOCK
1873 PDMIsaSetIrq(pVM, iIrq, iLevel); /* (The API takes the lock.) */
1874#else /* !VBOX_WITH_PDM_LOCK */
1875 if (VM_IS_EMT(pDevIns->Internal.s.pVMHC) || VMMR3LockIsOwner(pDevIns->Internal.s.pVMHC))
1876 PDMIsaSetIrq(pVM, iIrq, iLevel);
1877 else
1878 {
1879 Log(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: Requesting call in EMT...\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1880 PVMREQ pReq;
1881 int rc = VMR3ReqCallVoid(pDevIns->Internal.s.pVMHC, &pReq, RT_INDEFINITE_WAIT,
1882 (PFNRT)PDMIsaSetIrq, 3, pVM, iIrq, iLevel);
1883 while (rc == VERR_TIMEOUT)
1884 rc = VMR3ReqWait(pReq, RT_INDEFINITE_WAIT);
1885 AssertReleaseRC(rc);
1886 VMR3ReqFree(pReq);
1887 }
1888#endif /* !VBOX_WITH_PDM_LOCK */
1889
1890 LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1891}
1892
1893/** @copydoc PDMDEVHLP::pfnISASetIrqNoWait */
1894static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1895{
1896#ifdef VBOX_WITH_PDM_LOCK
1897 pdmR3DevHlp_ISASetIrq(pDevIns, iIrq, iLevel);
1898#else /* !VBOX_WITH_PDM_LOCK */
1899 PDMDEV_ASSERT_DEVINS(pDevIns);
1900 LogFlow(("pdmR3DevHlp_ISASetIrqNoWait: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iIrq, iLevel));
1901
1902 /*
1903 * Validate input.
1904 */
1905 /** @todo iIrq and iLevel checks. */
1906
1907 PVM pVM = pDevIns->Internal.s.pVMHC;
1908 /*
1909 * For the convenience of the device we put no thread restriction on this interface.
1910 * That means we'll have to check which thread we're in and choose our path.
1911 */
1912 if (VM_IS_EMT(pDevIns->Internal.s.pVMHC) || VMMR3LockIsOwner(pDevIns->Internal.s.pVMHC))
1913 PDMIsaSetIrq(pVM, iIrq, iLevel);
1914 else
1915 {
1916 Log(("pdmR3DevHlp_ISASetIrqNoWait: caller='%s'/%d: Queueing call in EMT...\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1917 int rc = VMR3ReqCallEx(pDevIns->Internal.s.pVMHC, NULL, 0, VMREQFLAGS_NO_WAIT | VMREQFLAGS_VOID,
1918 (PFNRT)PDMIsaSetIrq, 3, pVM, iIrq, iLevel);
1919 AssertReleaseRC(rc);
1920 }
1921
1922 LogFlow(("pdmR3DevHlp_ISASetIrqNoWait: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1923#endif /* !VBOX_WITH_PDM_LOCK */
1924}
1925
1926
1927/** @copydoc PDMDEVHLP::pfnDriverAttach */
1928static DECLCALLBACK(int) pdmR3DevHlp_DriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE *ppBaseInterface, const char *pszDesc)
1929{
1930 PDMDEV_ASSERT_DEVINS(pDevIns);
1931 PVM pVM = pDevIns->Internal.s.pVMHC;
1932 VM_ASSERT_EMT(pVM);
1933 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: iLun=%d pBaseInterface=%p ppBaseInterface=%p pszDesc=%p:{%s}\n",
1934 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iLun, pBaseInterface, ppBaseInterface, pszDesc, pszDesc));
1935
1936 /*
1937 * Lookup the LUN, it might already be registered.
1938 */
1939 PPDMLUN pLunPrev = NULL;
1940 PPDMLUN pLun = pDevIns->Internal.s.pLunsHC;
1941 for (; pLun; pLunPrev = pLun, pLun = pLun->pNext)
1942 if (pLun->iLun == iLun)
1943 break;
1944
1945 /*
1946 * Create the LUN if if wasn't found, else check if driver is already attached to it.
1947 */
1948 if (!pLun)
1949 {
1950 if ( !pBaseInterface
1951 || !pszDesc
1952 || !*pszDesc)
1953 {
1954 Assert(pBaseInterface);
1955 Assert(pszDesc || *pszDesc);
1956 return VERR_INVALID_PARAMETER;
1957 }
1958
1959 pLun = (PPDMLUN)MMR3HeapAlloc(pVM, MM_TAG_PDM_LUN, sizeof(*pLun));
1960 if (!pLun)
1961 return VERR_NO_MEMORY;
1962
1963 pLun->iLun = iLun;
1964 pLun->pNext = pLunPrev ? pLunPrev->pNext : NULL;
1965 pLun->pTop = NULL;
1966 pLun->pDevIns = pDevIns;
1967 pLun->pszDesc = pszDesc;
1968 pLun->pBase = pBaseInterface;
1969 if (!pLunPrev)
1970 pDevIns->Internal.s.pLunsHC = pLun;
1971 else
1972 pLunPrev->pNext = pLun;
1973 Log(("pdmR3DevHlp_DriverAttach: Registered LUN#%d '%s' with device '%s'/%d.\n",
1974 iLun, pszDesc, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
1975 }
1976 else if (pLun->pTop)
1977 {
1978 AssertMsgFailed(("Already attached! The device should keep track of such things!\n"));
1979 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_PDM_DRIVER_ALREADY_ATTACHED));
1980 return VERR_PDM_DRIVER_ALREADY_ATTACHED;
1981 }
1982 Assert(pLun->pBase == pBaseInterface);
1983
1984
1985 /*
1986 * Get the attached driver configuration.
1987 */
1988 int rc;
1989 char szNode[48];
1990 RTStrPrintf(szNode, sizeof(szNode), "LUN#%d", iLun);
1991 PCFGMNODE pNode = CFGMR3GetChild(pDevIns->Internal.s.pCfgHandle, szNode);
1992 if (pNode)
1993 {
1994 char *pszName;
1995 rc = CFGMR3QueryStringAlloc(pNode, "Driver", &pszName);
1996 if (VBOX_SUCCESS(rc))
1997 {
1998 /*
1999 * Find the driver.
2000 */
2001 PPDMDRV pDrv = pdmR3DrvLookup(pVM, pszName);
2002 if (pDrv)
2003 {
2004 /* config node */
2005 PCFGMNODE pConfigNode = CFGMR3GetChild(pNode, "Config");
2006 if (!pConfigNode)
2007 rc = CFGMR3InsertNode(pNode, "Config", &pConfigNode);
2008 if (VBOX_SUCCESS(rc))
2009 {
2010 CFGMR3SetRestrictedRoot(pConfigNode);
2011
2012 /*
2013 * Allocate the driver instance.
2014 */
2015 size_t cb = RT_OFFSETOF(PDMDRVINS, achInstanceData[pDrv->pDrvReg->cbInstance]);
2016 cb = RT_ALIGN_Z(cb, 16);
2017 PPDMDRVINS pNew = (PPDMDRVINS)MMR3HeapAllocZ(pVM, MM_TAG_PDM_DRIVER, cb);
2018 if (pNew)
2019 {
2020 /*
2021 * Initialize the instance structure (declaration order).
2022 */
2023 pNew->u32Version = PDM_DRVINS_VERSION;
2024 //pNew->Internal.s.pUp = NULL;
2025 //pNew->Internal.s.pDown = NULL;
2026 pNew->Internal.s.pLun = pLun;
2027 pNew->Internal.s.pDrv = pDrv;
2028 pNew->Internal.s.pVM = pVM;
2029 //pNew->Internal.s.fDetaching = false;
2030 pNew->Internal.s.pCfgHandle = pNode;
2031 pNew->pDrvHlp = &g_pdmR3DrvHlp;
2032 pNew->pDrvReg = pDrv->pDrvReg;
2033 pNew->pCfgHandle = pConfigNode;
2034 pNew->iInstance = pDrv->cInstances++;
2035 pNew->pUpBase = pBaseInterface;
2036 //pNew->pDownBase = NULL;
2037 //pNew->IBase.pfnQueryInterface = NULL;
2038 pNew->pvInstanceData = &pNew->achInstanceData[0];
2039
2040 /*
2041 * Link with LUN and call the constructor.
2042 */
2043 rc = pDrv->pDrvReg->pfnConstruct(pNew, pNew->pCfgHandle);
2044 if (VBOX_SUCCESS(rc))
2045 {
2046 pLun->pTop = pNew;
2047 MMR3HeapFree(pszName);
2048 *ppBaseInterface = &pNew->IBase;
2049 Log(("PDM: Attached driver '%s'/%d to LUN#%d on device '%s'/%d.\n",
2050 pDrv->pDrvReg->szDriverName, pNew->iInstance, iLun, pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2051 LogFlow(("pdmR3DevHlp_DriverAttach: caller '%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
2052 /*
2053 * Might return != VINF_SUCCESS (e.g. VINF_NAT_DNS) */
2054 return rc;
2055 }
2056
2057 /*
2058 * Free the driver.
2059 */
2060 pLun->pTop = NULL;
2061 ASMMemFill32(pNew, cb, 0xdeadd0d0);
2062 MMR3HeapFree(pNew);
2063 pDrv->cInstances--;
2064 }
2065 else
2066 {
2067 AssertMsgFailed(("Failed to allocate %d bytes for instantiating driver '%s'\n", cb, pszName));
2068 rc = VERR_NO_MEMORY;
2069 }
2070 }
2071 else
2072 AssertMsgFailed(("Failed to create Config node! rc=%Vrc\n", rc));
2073 }
2074 else
2075 {
2076 AssertMsgFailed(("Driver '%s' wasn't found!\n", pszName));
2077 rc = VERR_PDM_DRIVER_NOT_FOUND;
2078 }
2079 MMR3HeapFree(pszName);
2080 }
2081 else
2082 {
2083 AssertMsgFailed(("Query for string value of \"Driver\" -> %Vrc\n", rc));
2084 if (rc == VERR_CFGM_VALUE_NOT_FOUND)
2085 rc = VERR_PDM_CFG_MISSING_DRIVER_NAME;
2086 }
2087 }
2088 else
2089 rc = VERR_PDM_NO_ATTACHED_DRIVER;
2090
2091
2092 LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2093 return rc;
2094}
2095
2096
2097/** @copydoc PDMDEVHLP::pfnMMHeapAlloc */
2098static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
2099{
2100 PDMDEV_ASSERT_DEVINS(pDevIns);
2101 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: cb=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cb));
2102
2103 void *pv = MMR3HeapAlloc(pDevIns->Internal.s.pVMHC, MM_TAG_PDM_DEVICE_USER, cb);
2104
2105 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
2106 return pv;
2107}
2108
2109
2110/** @copydoc PDMDEVHLP::pfnMMHeapAllocZ */
2111static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
2112{
2113 PDMDEV_ASSERT_DEVINS(pDevIns);
2114 LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: cb=%#x\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cb));
2115
2116 void *pv = MMR3HeapAllocZ(pDevIns->Internal.s.pVMHC, MM_TAG_PDM_DEVICE_USER, cb);
2117
2118 LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
2119 return pv;
2120}
2121
2122
2123/** @copydoc PDMDEVHLP::pfnMMHeapFree */
2124static DECLCALLBACK(void) pdmR3DevHlp_MMHeapFree(PPDMDEVINS pDevIns, void *pv)
2125{
2126 PDMDEV_ASSERT_DEVINS(pDevIns);
2127 LogFlow(("pdmR3DevHlp_MMHeapFree: caller='%s'/%d: pv=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pv));
2128
2129 MMR3HeapFree(pv);
2130
2131 LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
2132}
2133
2134
2135/** @copydoc PDMDEVHLP::pfnVMSetError */
2136static DECLCALLBACK(int) pdmR3DevHlp_VMSetError(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
2137{
2138 PDMDEV_ASSERT_DEVINS(pDevIns);
2139 va_list args;
2140 va_start(args, pszFormat);
2141 int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMHC, rc, RT_SRC_POS_ARGS, pszFormat, args); Assert(rc2 == rc); NOREF(rc2);
2142 va_end(args);
2143 return rc;
2144}
2145
2146
2147/** @copydoc PDMDEVHLP::pfnVMSetErrorV */
2148static DECLCALLBACK(int) pdmR3DevHlp_VMSetErrorV(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va)
2149{
2150 PDMDEV_ASSERT_DEVINS(pDevIns);
2151 int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMHC, rc, RT_SRC_POS_ARGS, pszFormat, va); Assert(rc2 == rc); NOREF(rc2);
2152 return rc;
2153}
2154
2155
2156/** @copydoc PDMDEVHLP::pfnVMSetRuntimeError */
2157static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeError(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, ...)
2158{
2159 PDMDEV_ASSERT_DEVINS(pDevIns);
2160 va_list args;
2161 va_start(args, pszFormat);
2162 int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMHC, fFatal, pszErrorID, pszFormat, args);
2163 va_end(args);
2164 return rc;
2165}
2166
2167
2168/** @copydoc PDMDEVHLP::pfnVMSetRuntimeErrorV */
2169static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeErrorV(PPDMDEVINS pDevIns, bool fFatal, const char *pszErrorID, const char *pszFormat, va_list va)
2170{
2171 PDMDEV_ASSERT_DEVINS(pDevIns);
2172 int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMHC, fFatal, pszErrorID, pszFormat, va);
2173 return rc;
2174}
2175
2176
2177/** @copydoc PDMDEVHLP::pfnAssertEMT */
2178static DECLCALLBACK(bool) pdmR3DevHlp_AssertEMT(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
2179{
2180 PDMDEV_ASSERT_DEVINS(pDevIns);
2181 if (VM_IS_EMT(pDevIns->Internal.s.pVMHC))
2182 return true;
2183
2184 char szMsg[100];
2185 RTStrPrintf(szMsg, sizeof(szMsg), "AssertEMT '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance);
2186 AssertMsg1(szMsg, iLine, pszFile, pszFunction);
2187 AssertBreakpoint();
2188 return false;
2189}
2190
2191
2192/** @copydoc PDMDEVHLP::pfnAssertOther */
2193static DECLCALLBACK(bool) pdmR3DevHlp_AssertOther(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
2194{
2195 PDMDEV_ASSERT_DEVINS(pDevIns);
2196 if (!VM_IS_EMT(pDevIns->Internal.s.pVMHC))
2197 return true;
2198
2199 char szMsg[100];
2200 RTStrPrintf(szMsg, sizeof(szMsg), "AssertOther '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance);
2201 AssertMsg1(szMsg, iLine, pszFile, pszFunction);
2202 AssertBreakpoint();
2203 return false;
2204}
2205
2206
2207/** @copydoc PDMDEVHLP::pfnDBGFStopV */
2208static DECLCALLBACK(int) pdmR3DevHlp_DBGFStopV(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction, const char *pszFormat, va_list args)
2209{
2210 PDMDEV_ASSERT_DEVINS(pDevIns);
2211 LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: pszFile=%p:{%s} iLine=%d pszFunction=%p:{%s} pszFormat=%p:{%s} (%N)\n",
2212 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pszFile, pszFile, iLine, pszFunction, pszFunction, pszFormat, pszFormat, pszFormat, &args));
2213
2214 PVM pVM = pDevIns->Internal.s.pVMHC;
2215 VM_ASSERT_EMT(pVM);
2216 int rc = DBGFR3EventSrcV(pVM, DBGFEVENT_DEV_STOP, pszFile, iLine, pszFunction, pszFormat, args);
2217
2218 LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2219 return rc;
2220}
2221
2222
2223/** @copydoc PDMDEVHLP::pfnDBGFInfoRegister */
2224static DECLCALLBACK(int) pdmR3DevHlp_DBGFInfoRegister(PPDMDEVINS pDevIns, const char *pszName, const char *pszDesc, PFNDBGFHANDLERDEV pfnHandler)
2225{
2226 PDMDEV_ASSERT_DEVINS(pDevIns);
2227 LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: pszName=%p:{%s} pszDesc=%p:{%s} pfnHandler=%p\n",
2228 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pszName, pszName, pszDesc, pszDesc, pfnHandler));
2229
2230 PVM pVM = pDevIns->Internal.s.pVMHC;
2231 VM_ASSERT_EMT(pVM);
2232 int rc = DBGFR3InfoRegisterDevice(pVM, pszName, pszDesc, pfnHandler, pDevIns);
2233
2234 LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2235 return rc;
2236}
2237
2238
2239/** @copydoc PDMDEVHLP::pfnSTAMRegister */
2240static DECLCALLBACK(void) pdmR3DevHlp_STAMRegister(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, const char *pszName, STAMUNIT enmUnit, const char *pszDesc)
2241{
2242 PDMDEV_ASSERT_DEVINS(pDevIns);
2243 PVM pVM = pDevIns->Internal.s.pVMHC;
2244 VM_ASSERT_EMT(pVM);
2245
2246 STAM_REG(pVM, pvSample, enmType, pszName, enmUnit, pszDesc);
2247 NOREF(pVM);
2248}
2249
2250
2251
2252/** @copydoc PDMDEVHLP::pfnSTAMRegisterF */
2253static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2254 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, ...)
2255{
2256 PDMDEV_ASSERT_DEVINS(pDevIns);
2257 PVM pVM = pDevIns->Internal.s.pVMHC;
2258 VM_ASSERT_EMT(pVM);
2259
2260 va_list args;
2261 va_start(args, pszName);
2262 int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
2263 va_end(args);
2264 AssertRC(rc);
2265
2266 NOREF(pVM);
2267}
2268
2269
2270/** @copydoc PDMDEVHLP::pfnSTAMRegisterV */
2271static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterV(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
2272 STAMUNIT enmUnit, const char *pszDesc, const char *pszName, va_list args)
2273{
2274 PDMDEV_ASSERT_DEVINS(pDevIns);
2275 PVM pVM = pDevIns->Internal.s.pVMHC;
2276 VM_ASSERT_EMT(pVM);
2277
2278 int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
2279 AssertRC(rc);
2280
2281 NOREF(pVM);
2282}
2283
2284
2285/** @copydoc PDMDEVHLP::pfnRTCRegister */
2286static DECLCALLBACK(int) pdmR3DevHlp_RTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
2287{
2288 PDMDEV_ASSERT_DEVINS(pDevIns);
2289 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
2290 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: pRtcReg=%p:{.u32Version=%#x, .pfnWrite=%p, .pfnRead=%p} ppRtcHlp=%p\n",
2291 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pRtcReg, pRtcReg->u32Version, pRtcReg->pfnWrite,
2292 pRtcReg->pfnWrite, ppRtcHlp));
2293
2294 /*
2295 * Validate input.
2296 */
2297 if (pRtcReg->u32Version != PDM_RTCREG_VERSION)
2298 {
2299 AssertMsgFailed(("u32Version=%#x expected %#x\n", pRtcReg->u32Version,
2300 PDM_RTCREG_VERSION));
2301 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Vrc (version)\n",
2302 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2303 return VERR_INVALID_PARAMETER;
2304 }
2305 if ( !pRtcReg->pfnWrite
2306 || !pRtcReg->pfnRead)
2307 {
2308 Assert(pRtcReg->pfnWrite);
2309 Assert(pRtcReg->pfnRead);
2310 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Vrc (callbacks)\n",
2311 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2312 return VERR_INVALID_PARAMETER;
2313 }
2314
2315 if (!ppRtcHlp)
2316 {
2317 Assert(ppRtcHlp);
2318 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Vrc (ppRtcHlp)\n",
2319 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2320 return VERR_INVALID_PARAMETER;
2321 }
2322
2323 /*
2324 * Only one DMA device.
2325 */
2326 PVM pVM = pDevIns->Internal.s.pVMHC;
2327 if (pVM->pdm.s.pRtc)
2328 {
2329 AssertMsgFailed(("Only one RTC device is supported!\n"));
2330 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Vrc\n",
2331 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2332 return VERR_INVALID_PARAMETER;
2333 }
2334
2335 /*
2336 * Allocate and initialize pci bus structure.
2337 */
2338 int rc = VINF_SUCCESS;
2339 PPDMRTC pRtc = (PPDMRTC)MMR3HeapAlloc(pDevIns->Internal.s.pVMHC, MM_TAG_PDM_DEVICE, sizeof(*pRtc));
2340 if (pRtc)
2341 {
2342 pRtc->pDevIns = pDevIns;
2343 pRtc->Reg = *pRtcReg;
2344 pVM->pdm.s.pRtc = pRtc;
2345
2346 /* set the helper pointer. */
2347 *ppRtcHlp = &g_pdmR3DevRtcHlp;
2348 Log(("PDM: Registered RTC device '%s'/%d pDevIns=%p\n",
2349 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
2350 }
2351 else
2352 rc = VERR_NO_MEMORY;
2353
2354 LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Vrc\n",
2355 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2356 return rc;
2357}
2358
2359
2360/** @copydoc PDMDEVHLP::pfnPDMQueueCreate */
2361static DECLCALLBACK(int) pdmR3DevHlp_PDMQueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
2362 PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, PPDMQUEUE *ppQueue)
2363{
2364 PDMDEV_ASSERT_DEVINS(pDevIns);
2365 LogFlow(("pdmR3DevHlp_PDMQueueCreate: caller='%s'/%d: cbItem=%#x cItems=%#x cMilliesInterval=%u pfnCallback=%p fGCEnabled=%RTbool ppQueue=%p\n",
2366 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, ppQueue));
2367
2368 PVM pVM = pDevIns->Internal.s.pVMHC;
2369 VM_ASSERT_EMT(pVM);
2370 int rc = PDMR3QueueCreateDevice(pVM, pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, ppQueue);
2371
2372 LogFlow(("pdmR3DevHlp_PDMQueueCreate: caller='%s'/%d: returns %Vrc *ppQueue=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, *ppQueue));
2373 return rc;
2374}
2375
2376
2377/** @copydoc PDMDEVHLP::pfnCritSectInit */
2378static DECLCALLBACK(int) pdmR3DevHlp_CritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, const char *pszName)
2379{
2380 PDMDEV_ASSERT_DEVINS(pDevIns);
2381 LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: pCritSect=%p pszName=%p:{%s}\n",
2382 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pCritSect, pszName, pszName));
2383
2384 PVM pVM = pDevIns->Internal.s.pVMHC;
2385 VM_ASSERT_EMT(pVM);
2386 int rc = pdmR3CritSectInitDevice(pVM, pDevIns, pCritSect, pszName);
2387
2388 LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2389 return rc;
2390}
2391
2392
2393/** @copydoc PDMDEVHLP::pfnUTCNow */
2394static DECLCALLBACK(PRTTIMESPEC) pdmR3DevHlp_UTCNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
2395{
2396 PDMDEV_ASSERT_DEVINS(pDevIns);
2397 LogFlow(("pdmR3DevHlp_UTCNow: caller='%s'/%d: pTime=%p\n",
2398 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pTime));
2399
2400 pTime = TMR3UTCNow(pDevIns->Internal.s.pVMHC, pTime);
2401
2402 LogFlow(("pdmR3DevHlp_UTCNow: caller='%s'/%d: returns %RU64\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, RTTimeSpecGetNano(pTime)));
2403 return pTime;
2404}
2405
2406
2407/** @copydoc PDMDEVHLP::pfnGetVM */
2408static DECLCALLBACK(PVM) pdmR3DevHlp_GetVM(PPDMDEVINS pDevIns)
2409{
2410 PDMDEV_ASSERT_DEVINS(pDevIns);
2411 LogFlow(("pdmR3DevHlp_GetVM: caller='%s'/%d: returns %p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns->Internal.s.pVMHC));
2412 return pDevIns->Internal.s.pVMHC;
2413}
2414
2415
2416/** @copydoc PDMDEVHLP::pfnPCIBusRegister */
2417static DECLCALLBACK(int) pdmR3DevHlp_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
2418{
2419 PDMDEV_ASSERT_DEVINS(pDevIns);
2420 PVM pVM = pDevIns->Internal.s.pVMHC;
2421 VM_ASSERT_EMT(pVM);
2422 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: pPciBusReg=%p:{.u32Version=%#x, .pfnRegisterHC=%p, .pfnIORegionRegisterHC=%p, .pfnSetIrqHC=%p, "
2423 ".pfnSaveExecHC=%p, .pfnLoadExecHC=%p, .pfnFakePCIBIOSHC=%p, .pszSetIrqGC=%p:{%s}} ppPciHlpR3=%p\n",
2424 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPciBusReg, pPciBusReg->u32Version, pPciBusReg->pfnRegisterHC,
2425 pPciBusReg->pfnIORegionRegisterHC, pPciBusReg->pfnSetIrqHC, pPciBusReg->pfnSaveExecHC, pPciBusReg->pfnLoadExecHC,
2426 pPciBusReg->pfnFakePCIBIOSHC, pPciBusReg->pszSetIrqGC, pPciBusReg->pszSetIrqGC, ppPciHlpR3));
2427
2428 /*
2429 * Validate the structure.
2430 */
2431 if (pPciBusReg->u32Version != PDM_PCIBUSREG_VERSION)
2432 {
2433 AssertMsgFailed(("u32Version=%#x expected %#x\n", pPciBusReg->u32Version, PDM_PCIBUSREG_VERSION));
2434 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Vrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2435 return VERR_INVALID_PARAMETER;
2436 }
2437 if ( !pPciBusReg->pfnRegisterHC
2438 || !pPciBusReg->pfnIORegionRegisterHC
2439 || !pPciBusReg->pfnSetIrqHC
2440 || !pPciBusReg->pfnSaveExecHC
2441 || !pPciBusReg->pfnLoadExecHC
2442 || !pPciBusReg->pfnFakePCIBIOSHC)
2443 {
2444 Assert(pPciBusReg->pfnRegisterHC);
2445 Assert(pPciBusReg->pfnIORegionRegisterHC);
2446 Assert(pPciBusReg->pfnSetIrqHC);
2447 Assert(pPciBusReg->pfnSaveExecHC);
2448 Assert(pPciBusReg->pfnLoadExecHC);
2449 Assert(pPciBusReg->pfnFakePCIBIOSHC);
2450 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Vrc (HC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2451 return VERR_INVALID_PARAMETER;
2452 }
2453 if ( pPciBusReg->pszSetIrqGC
2454 && !VALID_PTR(pPciBusReg->pszSetIrqGC))
2455 {
2456 Assert(VALID_PTR(pPciBusReg->pszSetIrqGC));
2457 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Vrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2458 return VERR_INVALID_PARAMETER;
2459 }
2460 if ( pPciBusReg->pszSetIrqR0
2461 && !VALID_PTR(pPciBusReg->pszSetIrqR0))
2462 {
2463 Assert(VALID_PTR(pPciBusReg->pszSetIrqR0));
2464 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Vrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2465 return VERR_INVALID_PARAMETER;
2466 }
2467 if (!ppPciHlpR3)
2468 {
2469 Assert(ppPciHlpR3);
2470 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Vrc (ppPciHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2471 return VERR_INVALID_PARAMETER;
2472 }
2473
2474 /*
2475 * Find free PCI bus entry.
2476 */
2477 unsigned iBus = 0;
2478 for (iBus = 0; iBus < ELEMENTS(pVM->pdm.s.aPciBuses); iBus++)
2479 if (!pVM->pdm.s.aPciBuses[iBus].pDevInsR3)
2480 break;
2481 if (iBus >= ELEMENTS(pVM->pdm.s.aPciBuses))
2482 {
2483 AssertMsgFailed(("Too many PCI buses. Max=%u\n", ELEMENTS(pVM->pdm.s.aPciBuses)));
2484 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Vrc (pci bus)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2485 return VERR_INVALID_PARAMETER;
2486 }
2487 PPDMPCIBUS pPciBus = &pVM->pdm.s.aPciBuses[iBus];
2488
2489 /*
2490 * Resolve and init the GC bits.
2491 */
2492 if (pPciBusReg->pszSetIrqGC)
2493 {
2494 int rc = PDMR3GetSymbolGCLazy(pVM, pDevIns->pDevReg->szGCMod, pPciBusReg->pszSetIrqGC, &pPciBus->pfnSetIrqGC);
2495 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szGCMod, pPciBusReg->pszSetIrqGC, rc));
2496 if (VBOX_FAILURE(rc))
2497 {
2498 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2499 return rc;
2500 }
2501 pPciBus->pDevInsGC = PDMDEVINS_2_GCPTR(pDevIns);
2502 }
2503 else
2504 {
2505 pPciBus->pfnSetIrqGC = 0;
2506 pPciBus->pDevInsGC = 0;
2507 }
2508
2509 /*
2510 * Resolve and init the R0 bits.
2511 */
2512 if ( HWACCMR3IsAllowed(pVM)
2513 && pPciBusReg->pszSetIrqR0)
2514 {
2515 int rc = PDMR3GetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPciBusReg->pszSetIrqR0, &pPciBus->pfnSetIrqR0);
2516 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szR0Mod, pPciBusReg->pszSetIrqR0, rc));
2517 if (VBOX_FAILURE(rc))
2518 {
2519 LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2520 return rc;
2521 }
2522 pPciBus->pDevInsR0 = MMHyperR3ToR0(pVM, pDevIns);
2523 }
2524 else
2525 {
2526 pPciBus->pfnSetIrqR0 = 0;
2527 pPciBus->pDevInsR0 = 0;
2528 }
2529
2530 /*
2531 * Init the HC bits.
2532 */
2533 pPciBus->iBus = iBus;
2534 pPciBus->pDevInsR3 = pDevIns;
2535 pPciBus->pfnRegisterR3 = pPciBusReg->pfnRegisterHC;
2536 pPciBus->pfnIORegionRegisterR3 = pPciBusReg->pfnIORegionRegisterHC;
2537 pPciBus->pfnSetConfigCallbacksR3 = pPciBusReg->pfnSetConfigCallbacksHC;
2538 pPciBus->pfnSetIrqR3 = pPciBusReg->pfnSetIrqHC;
2539 pPciBus->pfnSaveExecR3 = pPciBusReg->pfnSaveExecHC;
2540 pPciBus->pfnLoadExecR3 = pPciBusReg->pfnLoadExecHC;
2541 pPciBus->pfnFakePCIBIOSR3 = pPciBusReg->pfnFakePCIBIOSHC;
2542
2543 Log(("PDM: Registered PCI bus device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
2544
2545 /* set the helper pointer and return. */
2546 *ppPciHlpR3 = &g_pdmR3DevPciHlp;
2547 LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
2548 return VINF_SUCCESS;
2549}
2550
2551
2552/** @copydoc PDMDEVHLP::pfnPICRegister */
2553static DECLCALLBACK(int) pdmR3DevHlp_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
2554{
2555 PDMDEV_ASSERT_DEVINS(pDevIns);
2556 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
2557 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: pPicReg=%p:{.u32Version=%#x, .pfnSetIrqHC=%p, .pfnGetInterruptHC=%p, .pszGetIrqGC=%p:{%s}, .pszGetInterruptGC=%p:{%s}} ppPicHlpR3=%p\n",
2558 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pPicReg, pPicReg->u32Version, pPicReg->pfnSetIrqHC, pPicReg->pfnGetInterruptHC,
2559 pPicReg->pszSetIrqGC, pPicReg->pszSetIrqGC, pPicReg->pszGetInterruptGC, pPicReg->pszGetInterruptGC, ppPicHlpR3));
2560
2561 /*
2562 * Validate input.
2563 */
2564 if (pPicReg->u32Version != PDM_PICREG_VERSION)
2565 {
2566 AssertMsgFailed(("u32Version=%#x expected %#x\n", pPicReg->u32Version, PDM_PICREG_VERSION));
2567 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Vrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2568 return VERR_INVALID_PARAMETER;
2569 }
2570 if ( !pPicReg->pfnSetIrqHC
2571 || !pPicReg->pfnGetInterruptHC)
2572 {
2573 Assert(pPicReg->pfnSetIrqHC);
2574 Assert(pPicReg->pfnGetInterruptHC);
2575 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Vrc (HC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2576 return VERR_INVALID_PARAMETER;
2577 }
2578 if ( ( pPicReg->pszSetIrqGC
2579 || pPicReg->pszGetInterruptGC)
2580 && ( !VALID_PTR(pPicReg->pszSetIrqGC)
2581 || !VALID_PTR(pPicReg->pszGetInterruptGC))
2582 )
2583 {
2584 Assert(VALID_PTR(pPicReg->pszSetIrqGC));
2585 Assert(VALID_PTR(pPicReg->pszGetInterruptGC));
2586 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Vrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2587 return VERR_INVALID_PARAMETER;
2588 }
2589 if ( pPicReg->pszSetIrqGC
2590 && !(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_GC))
2591 {
2592 Assert(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_GC);
2593 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Vrc (GC flag)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2594 return VERR_INVALID_PARAMETER;
2595 }
2596 if ( pPicReg->pszSetIrqR0
2597 && !(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0))
2598 {
2599 Assert(pDevIns->pDevReg->fFlags & PDM_DEVREG_FLAGS_R0);
2600 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Vrc (R0 flag)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2601 return VERR_INVALID_PARAMETER;
2602 }
2603 if (!ppPicHlpR3)
2604 {
2605 Assert(ppPicHlpR3);
2606 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Vrc (ppPicHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2607 return VERR_INVALID_PARAMETER;
2608 }
2609
2610 /*
2611 * Only one PIC device.
2612 */
2613 PVM pVM = pDevIns->Internal.s.pVMHC;
2614 if (pVM->pdm.s.Pic.pDevInsR3)
2615 {
2616 AssertMsgFailed(("Only one pic device is supported!\n"));
2617 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2618 return VERR_INVALID_PARAMETER;
2619 }
2620
2621 /*
2622 * GC stuff.
2623 */
2624 if (pPicReg->pszSetIrqGC)
2625 {
2626 int rc = PDMR3GetSymbolGCLazy(pVM, pDevIns->pDevReg->szGCMod, pPicReg->pszSetIrqGC, &pVM->pdm.s.Pic.pfnSetIrqGC);
2627 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szGCMod, pPicReg->pszSetIrqGC, rc));
2628 if (VBOX_SUCCESS(rc))
2629 {
2630 rc = PDMR3GetSymbolGCLazy(pVM, pDevIns->pDevReg->szGCMod, pPicReg->pszGetInterruptGC, &pVM->pdm.s.Pic.pfnGetInterruptGC);
2631 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szGCMod, pPicReg->pszGetInterruptGC, rc));
2632 }
2633 if (VBOX_FAILURE(rc))
2634 {
2635 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2636 return rc;
2637 }
2638 pVM->pdm.s.Pic.pDevInsGC = PDMDEVINS_2_GCPTR(pDevIns);
2639 }
2640 else
2641 {
2642 pVM->pdm.s.Pic.pDevInsGC = 0;
2643 pVM->pdm.s.Pic.pfnSetIrqGC = 0;
2644 pVM->pdm.s.Pic.pfnGetInterruptGC = 0;
2645 }
2646
2647 /*
2648 * R0 stuff.
2649 */
2650 if ( HWACCMR3IsAllowed(pVM)
2651 && pPicReg->pszSetIrqR0)
2652 {
2653 int rc = PDMR3GetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPicReg->pszSetIrqR0, &pVM->pdm.s.Pic.pfnSetIrqR0);
2654 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szR0Mod, pPicReg->pszSetIrqR0, rc));
2655 if (VBOX_SUCCESS(rc))
2656 {
2657 rc = PDMR3GetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pPicReg->pszGetInterruptR0, &pVM->pdm.s.Pic.pfnGetInterruptR0);
2658 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szR0Mod, pPicReg->pszGetInterruptR0, rc));
2659 }
2660 if (VBOX_FAILURE(rc))
2661 {
2662 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2663 return rc;
2664 }
2665 pVM->pdm.s.Pic.pDevInsR0 = MMHyperR3ToR0(pVM, pDevIns);
2666 Assert(pVM->pdm.s.Pic.pDevInsR0);
2667 }
2668 else
2669 {
2670 pVM->pdm.s.Pic.pfnSetIrqR0 = 0;
2671 pVM->pdm.s.Pic.pfnGetInterruptR0 = 0;
2672 pVM->pdm.s.Pic.pDevInsR0 = 0;
2673 }
2674
2675 /*
2676 * HC stuff.
2677 */
2678 pVM->pdm.s.Pic.pDevInsR3 = pDevIns;
2679 pVM->pdm.s.Pic.pfnSetIrqR3 = pPicReg->pfnSetIrqHC;
2680 pVM->pdm.s.Pic.pfnGetInterruptR3 = pPicReg->pfnGetInterruptHC;
2681 Log(("PDM: Registered PIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
2682
2683 /* set the helper pointer and return. */
2684 *ppPicHlpR3 = &g_pdmR3DevPicHlp;
2685 LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
2686 return VINF_SUCCESS;
2687}
2688
2689
2690/** @copydoc PDMDEVHLP::pfnAPICRegister */
2691static DECLCALLBACK(int) pdmR3DevHlp_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
2692{
2693 PDMDEV_ASSERT_DEVINS(pDevIns);
2694 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
2695 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: pApicReg=%p:{.u32Version=%#x, .pfnGetInterruptHC=%p, .pfnSetBaseHC=%p, .pfnGetBaseHC=%p, "
2696 ".pfnSetTPRHC=%p, .pfnGetTPRHC=%p, .pfnBusDeliverHC=%p, pszGetInterruptGC=%p:{%s}, pszSetBaseGC=%p:{%s}, pszGetBaseGC=%p:{%s}, "
2697 ".pszSetTPRGC=%p:{%s}, .pszGetTPRGC=%p:{%s}, .pszBusDeliverGC=%p:{%s}} ppApicHlpR3=%p\n",
2698 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pApicReg, pApicReg->u32Version, pApicReg->pfnGetInterruptHC, pApicReg->pfnSetBaseHC,
2699 pApicReg->pfnGetBaseHC, pApicReg->pfnSetTPRHC, pApicReg->pfnGetTPRHC, pApicReg->pfnBusDeliverHC, pApicReg->pszGetInterruptGC,
2700 pApicReg->pszGetInterruptGC, pApicReg->pszSetBaseGC, pApicReg->pszSetBaseGC, pApicReg->pszGetBaseGC, pApicReg->pszGetBaseGC,
2701 pApicReg->pszSetTPRGC, pApicReg->pszSetTPRGC, pApicReg->pszGetTPRGC, pApicReg->pszGetTPRGC, pApicReg->pszBusDeliverGC,
2702 pApicReg->pszBusDeliverGC, ppApicHlpR3));
2703
2704 /*
2705 * Validate input.
2706 */
2707 if (pApicReg->u32Version != PDM_APICREG_VERSION)
2708 {
2709 AssertMsgFailed(("u32Version=%#x expected %#x\n", pApicReg->u32Version, PDM_APICREG_VERSION));
2710 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Vrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2711 return VERR_INVALID_PARAMETER;
2712 }
2713 if ( !pApicReg->pfnGetInterruptHC
2714 || !pApicReg->pfnSetBaseHC
2715 || !pApicReg->pfnGetBaseHC
2716 || !pApicReg->pfnSetTPRHC
2717 || !pApicReg->pfnGetTPRHC
2718 || !pApicReg->pfnBusDeliverHC)
2719 {
2720 Assert(pApicReg->pfnGetInterruptHC);
2721 Assert(pApicReg->pfnSetBaseHC);
2722 Assert(pApicReg->pfnGetBaseHC);
2723 Assert(pApicReg->pfnSetTPRHC);
2724 Assert(pApicReg->pfnGetTPRHC);
2725 Assert(pApicReg->pfnBusDeliverHC);
2726 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Vrc (HC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2727 return VERR_INVALID_PARAMETER;
2728 }
2729 if ( ( pApicReg->pszGetInterruptGC
2730 || pApicReg->pszSetBaseGC
2731 || pApicReg->pszGetBaseGC
2732 || pApicReg->pszSetTPRGC
2733 || pApicReg->pszGetTPRGC
2734 || pApicReg->pszBusDeliverGC)
2735 && ( !VALID_PTR(pApicReg->pszGetInterruptGC)
2736 || !VALID_PTR(pApicReg->pszSetBaseGC)
2737 || !VALID_PTR(pApicReg->pszGetBaseGC)
2738 || !VALID_PTR(pApicReg->pszSetTPRGC)
2739 || !VALID_PTR(pApicReg->pszGetTPRGC)
2740 || !VALID_PTR(pApicReg->pszBusDeliverGC))
2741 )
2742 {
2743 Assert(VALID_PTR(pApicReg->pszGetInterruptGC));
2744 Assert(VALID_PTR(pApicReg->pszSetBaseGC));
2745 Assert(VALID_PTR(pApicReg->pszGetBaseGC));
2746 Assert(VALID_PTR(pApicReg->pszSetTPRGC));
2747 Assert(VALID_PTR(pApicReg->pszGetTPRGC));
2748 Assert(VALID_PTR(pApicReg->pszBusDeliverGC));
2749 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Vrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2750 return VERR_INVALID_PARAMETER;
2751 }
2752 if ( ( pApicReg->pszGetInterruptR0
2753 || pApicReg->pszSetBaseR0
2754 || pApicReg->pszGetBaseR0
2755 || pApicReg->pszSetTPRR0
2756 || pApicReg->pszGetTPRR0
2757 || pApicReg->pszBusDeliverR0)
2758 && ( !VALID_PTR(pApicReg->pszGetInterruptR0)
2759 || !VALID_PTR(pApicReg->pszSetBaseR0)
2760 || !VALID_PTR(pApicReg->pszGetBaseR0)
2761 || !VALID_PTR(pApicReg->pszSetTPRR0)
2762 || !VALID_PTR(pApicReg->pszGetTPRR0)
2763 || !VALID_PTR(pApicReg->pszBusDeliverR0))
2764 )
2765 {
2766 Assert(VALID_PTR(pApicReg->pszGetInterruptR0));
2767 Assert(VALID_PTR(pApicReg->pszSetBaseR0));
2768 Assert(VALID_PTR(pApicReg->pszGetBaseR0));
2769 Assert(VALID_PTR(pApicReg->pszSetTPRR0));
2770 Assert(VALID_PTR(pApicReg->pszGetTPRR0));
2771 Assert(VALID_PTR(pApicReg->pszBusDeliverR0));
2772 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Vrc (R0 callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2773 return VERR_INVALID_PARAMETER;
2774 }
2775 if (!ppApicHlpR3)
2776 {
2777 Assert(ppApicHlpR3);
2778 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Vrc (ppApicHlpR3)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2779 return VERR_INVALID_PARAMETER;
2780 }
2781
2782 /*
2783 * Only one APIC device. (malc: only in UP case actually)
2784 */
2785 PVM pVM = pDevIns->Internal.s.pVMHC;
2786 if (pVM->pdm.s.Apic.pDevInsR3)
2787 {
2788 AssertMsgFailed(("Only one apic device is supported!\n"));
2789 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2790 return VERR_INVALID_PARAMETER;
2791 }
2792
2793 /*
2794 * Resolve & initialize the GC bits.
2795 */
2796 if (pApicReg->pszGetInterruptGC)
2797 {
2798 int rc = PDMR3GetSymbolGCLazy(pVM, pDevIns->pDevReg->szGCMod, pApicReg->pszGetInterruptGC, &pVM->pdm.s.Apic.pfnGetInterruptGC);
2799 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szGCMod, pApicReg->pszGetInterruptGC, rc));
2800 if (RT_SUCCESS(rc))
2801 {
2802 rc = PDMR3GetSymbolGCLazy(pVM, pDevIns->pDevReg->szGCMod, pApicReg->pszSetBaseGC, &pVM->pdm.s.Apic.pfnSetBaseGC);
2803 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szGCMod, pApicReg->pszSetBaseGC, rc));
2804 }
2805 if (RT_SUCCESS(rc))
2806 {
2807 rc = PDMR3GetSymbolGCLazy(pVM, pDevIns->pDevReg->szGCMod, pApicReg->pszGetBaseGC, &pVM->pdm.s.Apic.pfnGetBaseGC);
2808 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szGCMod, pApicReg->pszGetBaseGC, rc));
2809 }
2810 if (RT_SUCCESS(rc))
2811 {
2812 rc = PDMR3GetSymbolGCLazy(pVM, pDevIns->pDevReg->szGCMod, pApicReg->pszSetTPRGC, &pVM->pdm.s.Apic.pfnSetTPRGC);
2813 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szGCMod, pApicReg->pszSetTPRGC, rc));
2814 }
2815 if (RT_SUCCESS(rc))
2816 {
2817 rc = PDMR3GetSymbolGCLazy(pVM, pDevIns->pDevReg->szGCMod, pApicReg->pszGetTPRGC, &pVM->pdm.s.Apic.pfnGetTPRGC);
2818 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szGCMod, pApicReg->pszGetTPRGC, rc));
2819 }
2820 if (RT_SUCCESS(rc))
2821 {
2822 rc = PDMR3GetSymbolGCLazy(pVM, pDevIns->pDevReg->szGCMod, pApicReg->pszBusDeliverGC, &pVM->pdm.s.Apic.pfnBusDeliverGC);
2823 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szGCMod, pApicReg->pszBusDeliverGC, rc));
2824 }
2825 if (VBOX_FAILURE(rc))
2826 {
2827 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2828 return rc;
2829 }
2830 pVM->pdm.s.Apic.pDevInsGC = PDMDEVINS_2_GCPTR(pDevIns);
2831 }
2832 else
2833 {
2834 pVM->pdm.s.Apic.pDevInsGC = 0;
2835 pVM->pdm.s.Apic.pfnGetInterruptGC = 0;
2836 pVM->pdm.s.Apic.pfnSetBaseGC = 0;
2837 pVM->pdm.s.Apic.pfnGetBaseGC = 0;
2838 pVM->pdm.s.Apic.pfnSetTPRGC = 0;
2839 pVM->pdm.s.Apic.pfnGetTPRGC = 0;
2840 pVM->pdm.s.Apic.pfnBusDeliverGC = 0;
2841 }
2842
2843 /*
2844 * Resolve & initialize the R0 bits.
2845 */
2846 if ( HWACCMR3IsAllowed(pVM)
2847 && pApicReg->pszGetInterruptR0)
2848 {
2849 int rc = PDMR3GetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetInterruptR0, &pVM->pdm.s.Apic.pfnGetInterruptR0);
2850 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetInterruptR0, rc));
2851 if (RT_SUCCESS(rc))
2852 {
2853 rc = PDMR3GetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszSetBaseR0, &pVM->pdm.s.Apic.pfnSetBaseR0);
2854 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszSetBaseR0, rc));
2855 }
2856 if (RT_SUCCESS(rc))
2857 {
2858 rc = PDMR3GetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetBaseR0, &pVM->pdm.s.Apic.pfnGetBaseR0);
2859 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetBaseR0, rc));
2860 }
2861 if (RT_SUCCESS(rc))
2862 {
2863 rc = PDMR3GetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszSetTPRR0, &pVM->pdm.s.Apic.pfnSetTPRR0);
2864 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszSetTPRR0, rc));
2865 }
2866 if (RT_SUCCESS(rc))
2867 {
2868 rc = PDMR3GetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszGetTPRR0, &pVM->pdm.s.Apic.pfnGetTPRR0);
2869 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszGetTPRR0, rc));
2870 }
2871 if (RT_SUCCESS(rc))
2872 {
2873 rc = PDMR3GetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pApicReg->pszBusDeliverR0, &pVM->pdm.s.Apic.pfnBusDeliverR0);
2874 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szR0Mod, pApicReg->pszBusDeliverR0, rc));
2875 }
2876 if (VBOX_FAILURE(rc))
2877 {
2878 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2879 return rc;
2880 }
2881 pVM->pdm.s.Apic.pDevInsR0 = MMHyperR3ToR0(pVM, pDevIns);
2882 Assert(pVM->pdm.s.Apic.pDevInsR0);
2883 }
2884 else
2885 {
2886 pVM->pdm.s.Apic.pfnGetInterruptR0 = 0;
2887 pVM->pdm.s.Apic.pfnSetBaseR0 = 0;
2888 pVM->pdm.s.Apic.pfnGetBaseR0 = 0;
2889 pVM->pdm.s.Apic.pfnSetTPRR0 = 0;
2890 pVM->pdm.s.Apic.pfnGetTPRR0 = 0;
2891 pVM->pdm.s.Apic.pfnBusDeliverR0 = 0;
2892 pVM->pdm.s.Apic.pDevInsR0 = 0;
2893 }
2894
2895 /*
2896 * Initialize the HC bits.
2897 */
2898 pVM->pdm.s.Apic.pDevInsR3 = pDevIns;
2899 pVM->pdm.s.Apic.pfnGetInterruptR3 = pApicReg->pfnGetInterruptHC;
2900 pVM->pdm.s.Apic.pfnSetBaseR3 = pApicReg->pfnSetBaseHC;
2901 pVM->pdm.s.Apic.pfnGetBaseR3 = pApicReg->pfnGetBaseHC;
2902 pVM->pdm.s.Apic.pfnSetTPRR3 = pApicReg->pfnSetTPRHC;
2903 pVM->pdm.s.Apic.pfnGetTPRR3 = pApicReg->pfnGetTPRHC;
2904 pVM->pdm.s.Apic.pfnBusDeliverR3 = pApicReg->pfnBusDeliverHC;
2905 Log(("PDM: Registered APIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
2906
2907 /* set the helper pointer and return. */
2908 *ppApicHlpR3 = &g_pdmR3DevApicHlp;
2909 LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
2910 return VINF_SUCCESS;
2911}
2912
2913
2914/** @copydoc PDMDEVHLP::pfnIOAPICRegister */
2915static DECLCALLBACK(int) pdmR3DevHlp_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
2916{
2917 PDMDEV_ASSERT_DEVINS(pDevIns);
2918 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
2919 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: pIoApicReg=%p:{.u32Version=%#x, .pfnSetIrqHC=%p, .pszSetIrqGC=%p:{%s}} ppIoApicHlpR3=%p\n",
2920 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pIoApicReg, pIoApicReg->u32Version, pIoApicReg->pfnSetIrqHC, pIoApicReg->pszSetIrqGC,
2921 pIoApicReg->pszSetIrqGC, ppIoApicHlpR3));
2922
2923 /*
2924 * Validate input.
2925 */
2926 if (pIoApicReg->u32Version != PDM_IOAPICREG_VERSION)
2927 {
2928 AssertMsgFailed(("u32Version=%#x expected %#x\n", pIoApicReg->u32Version, PDM_IOAPICREG_VERSION));
2929 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Vrc (version)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2930 return VERR_INVALID_PARAMETER;
2931 }
2932 if (!pIoApicReg->pfnSetIrqHC)
2933 {
2934 Assert(pIoApicReg->pfnSetIrqHC);
2935 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Vrc (HC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2936 return VERR_INVALID_PARAMETER;
2937 }
2938 if ( pIoApicReg->pszSetIrqGC
2939 && !VALID_PTR(pIoApicReg->pszSetIrqGC))
2940 {
2941 Assert(VALID_PTR(pIoApicReg->pszSetIrqGC));
2942 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Vrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2943 return VERR_INVALID_PARAMETER;
2944 }
2945 if ( pIoApicReg->pszSetIrqR0
2946 && !VALID_PTR(pIoApicReg->pszSetIrqR0))
2947 {
2948 Assert(VALID_PTR(pIoApicReg->pszSetIrqR0));
2949 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Vrc (GC callbacks)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2950 return VERR_INVALID_PARAMETER;
2951 }
2952 if (!ppIoApicHlpR3)
2953 {
2954 Assert(ppIoApicHlpR3);
2955 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Vrc (ppApicHlp)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2956 return VERR_INVALID_PARAMETER;
2957 }
2958
2959 /*
2960 * The I/O APIC requires the APIC to be present (hacks++).
2961 * If the I/O APIC does GC stuff so must the APIC.
2962 */
2963 PVM pVM = pDevIns->Internal.s.pVMHC;
2964 if (!pVM->pdm.s.Apic.pDevInsR3)
2965 {
2966 AssertMsgFailed(("Configuration error / Init order error! No APIC!\n"));
2967 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Vrc (no APIC)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2968 return VERR_INVALID_PARAMETER;
2969 }
2970 if ( pIoApicReg->pszSetIrqGC
2971 && !pVM->pdm.s.Apic.pDevInsGC)
2972 {
2973 AssertMsgFailed(("Configuration error! APIC doesn't do GC, I/O APIC does!\n"));
2974 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Vrc (no GC APIC)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2975 return VERR_INVALID_PARAMETER;
2976 }
2977
2978 /*
2979 * Only one I/O APIC device.
2980 */
2981 if (pVM->pdm.s.IoApic.pDevInsR3)
2982 {
2983 AssertMsgFailed(("Only one ioapic device is supported!\n"));
2984 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Vrc (only one)\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2985 return VERR_INVALID_PARAMETER;
2986 }
2987
2988 /*
2989 * Resolve & initialize the GC bits.
2990 */
2991 if (pIoApicReg->pszSetIrqGC)
2992 {
2993 int rc = PDMR3GetSymbolGCLazy(pVM, pDevIns->pDevReg->szGCMod, pIoApicReg->pszSetIrqGC, &pVM->pdm.s.IoApic.pfnSetIrqGC);
2994 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szGCMod, pIoApicReg->pszSetIrqGC, rc));
2995 if (VBOX_FAILURE(rc))
2996 {
2997 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
2998 return rc;
2999 }
3000 pVM->pdm.s.IoApic.pDevInsGC = PDMDEVINS_2_GCPTR(pDevIns);
3001 }
3002 else
3003 {
3004 pVM->pdm.s.IoApic.pDevInsGC = 0;
3005 pVM->pdm.s.IoApic.pfnSetIrqGC = 0;
3006 }
3007
3008 /*
3009 * Resolve & initialize the R0 bits.
3010 */
3011 if ( HWACCMR3IsAllowed(pVM)
3012 && pIoApicReg->pszSetIrqR0)
3013 {
3014 int rc = PDMR3GetSymbolR0Lazy(pVM, pDevIns->pDevReg->szR0Mod, pIoApicReg->pszSetIrqR0, &pVM->pdm.s.IoApic.pfnSetIrqR0);
3015 AssertMsgRC(rc, ("%s::%s rc=%Vrc\n", pDevIns->pDevReg->szR0Mod, pIoApicReg->pszSetIrqR0, rc));
3016 if (VBOX_FAILURE(rc))
3017 {
3018 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
3019 return rc;
3020 }
3021 pVM->pdm.s.IoApic.pDevInsR0 = MMHyperR3ToR0(pVM, pDevIns);
3022 Assert(pVM->pdm.s.IoApic.pDevInsR0);
3023 }
3024 else
3025 {
3026 pVM->pdm.s.IoApic.pfnSetIrqR0 = 0;
3027 pVM->pdm.s.IoApic.pDevInsR0 = 0;
3028 }
3029
3030 /*
3031 * Initialize the HC bits.
3032 */
3033 pVM->pdm.s.IoApic.pDevInsR3 = pDevIns;
3034 pVM->pdm.s.IoApic.pfnSetIrqR3 = pIoApicReg->pfnSetIrqHC;
3035 Log(("PDM: Registered I/O APIC device '%s'/%d pDevIns=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
3036
3037 /* set the helper pointer and return. */
3038 *ppIoApicHlpR3 = &g_pdmR3DevIoApicHlp;
3039 LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VINF_SUCCESS));
3040 return VINF_SUCCESS;
3041}
3042
3043
3044/** @copydoc PDMDEVHLP::pfnDMACRegister */
3045static DECLCALLBACK(int) pdmR3DevHlp_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
3046{
3047 PDMDEV_ASSERT_DEVINS(pDevIns);
3048 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
3049 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: pDmacReg=%p:{.u32Version=%#x, .pfnRun=%p, .pfnRegister=%p, .pfnReadMemory=%p, .pfnWriteMemory=%p, .pfnSetDREQ=%p, .pfnGetChannelMode=%p} ppDmacHlp=%p\n",
3050 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDmacReg, pDmacReg->u32Version, pDmacReg->pfnRun, pDmacReg->pfnRegister,
3051 pDmacReg->pfnReadMemory, pDmacReg->pfnWriteMemory, pDmacReg->pfnSetDREQ, pDmacReg->pfnGetChannelMode, ppDmacHlp));
3052
3053 /*
3054 * Validate input.
3055 */
3056 if (pDmacReg->u32Version != PDM_DMACREG_VERSION)
3057 {
3058 AssertMsgFailed(("u32Version=%#x expected %#x\n", pDmacReg->u32Version,
3059 PDM_DMACREG_VERSION));
3060 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Vrc (version)\n",
3061 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3062 return VERR_INVALID_PARAMETER;
3063 }
3064 if ( !pDmacReg->pfnRun
3065 || !pDmacReg->pfnRegister
3066 || !pDmacReg->pfnReadMemory
3067 || !pDmacReg->pfnWriteMemory
3068 || !pDmacReg->pfnSetDREQ
3069 || !pDmacReg->pfnGetChannelMode)
3070 {
3071 Assert(pDmacReg->pfnRun);
3072 Assert(pDmacReg->pfnRegister);
3073 Assert(pDmacReg->pfnReadMemory);
3074 Assert(pDmacReg->pfnWriteMemory);
3075 Assert(pDmacReg->pfnSetDREQ);
3076 Assert(pDmacReg->pfnGetChannelMode);
3077 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Vrc (callbacks)\n",
3078 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3079 return VERR_INVALID_PARAMETER;
3080 }
3081
3082 if (!ppDmacHlp)
3083 {
3084 Assert(ppDmacHlp);
3085 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Vrc (ppDmacHlp)\n",
3086 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3087 return VERR_INVALID_PARAMETER;
3088 }
3089
3090 /*
3091 * Only one DMA device.
3092 */
3093 PVM pVM = pDevIns->Internal.s.pVMHC;
3094 if (pVM->pdm.s.pDmac)
3095 {
3096 AssertMsgFailed(("Only one DMA device is supported!\n"));
3097 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Vrc\n",
3098 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
3099 return VERR_INVALID_PARAMETER;
3100 }
3101
3102 /*
3103 * Allocate and initialize pci bus structure.
3104 */
3105 int rc = VINF_SUCCESS;
3106 PPDMDMAC pDmac = (PPDMDMAC)MMR3HeapAlloc(pDevIns->Internal.s.pVMHC, MM_TAG_PDM_DEVICE, sizeof(*pDmac));
3107 if (pDmac)
3108 {
3109 pDmac->pDevIns = pDevIns;
3110 pDmac->Reg = *pDmacReg;
3111 pVM->pdm.s.pDmac = pDmac;
3112
3113 /* set the helper pointer. */
3114 *ppDmacHlp = &g_pdmR3DevDmacHlp;
3115 Log(("PDM: Registered DMAC device '%s'/%d pDevIns=%p\n",
3116 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pDevIns));
3117 }
3118 else
3119 rc = VERR_NO_MEMORY;
3120
3121 LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Vrc\n",
3122 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
3123 return rc;
3124}
3125
3126
3127/** @copydoc PDMDEVHLP::pfnPhysRead */
3128static DECLCALLBACK(void) pdmR3DevHlp_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
3129{
3130 PDMDEV_ASSERT_DEVINS(pDevIns);
3131 LogFlow(("pdmR3DevHlp_PhysRead: caller='%s'/%d: GCPhys=%VGp pvBuf=%p cbRead=%#x\n",
3132 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, pvBuf, cbRead));
3133
3134 /*
3135 * For the convenience of the device we put no thread restriction on this interface.
3136 * That means we'll have to check which thread we're in and choose our path.
3137 */
3138#ifdef PDM_PHYS_READWRITE_FROM_ANY_THREAD
3139 PGMPhysRead(pDevIns->Internal.s.pVMHC, GCPhys, pvBuf, cbRead);
3140#else
3141 if (VM_IS_EMT(pDevIns->Internal.s.pVMHC) || VMMR3LockIsOwner(pDevIns->Internal.s.pVMHC))
3142 PGMPhysRead(pDevIns->Internal.s.pVMHC, GCPhys, pvBuf, cbRead);
3143 else
3144 {
3145 Log(("pdmR3DevHlp_PhysRead: caller='%s'/%d: Requesting call in EMT...\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3146 PVMREQ pReq;
3147 int rc = VMR3ReqCallVoid(pDevIns->Internal.s.pVMHC, &pReq, RT_INDEFINITE_WAIT,
3148 (PFNRT)PGMPhysRead, 4, pDevIns->Internal.s.pVMHC, GCPhys, pvBuf, cbRead);
3149 while (rc == VERR_TIMEOUT)
3150 rc = VMR3ReqWait(pReq, RT_INDEFINITE_WAIT);
3151 AssertReleaseRC(rc);
3152 VMR3ReqFree(pReq);
3153 }
3154#endif
3155 Log(("pdmR3DevHlp_PhysRead: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3156}
3157
3158
3159/** @copydoc PDMDEVHLP::pfnPhysWrite */
3160static DECLCALLBACK(void) pdmR3DevHlp_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
3161{
3162 PDMDEV_ASSERT_DEVINS(pDevIns);
3163 LogFlow(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: GCPhys=%VGp pvBuf=%p cbWrite=%#x\n",
3164 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, pvBuf, cbWrite));
3165
3166 /*
3167 * For the convenience of the device we put no thread restriction on this interface.
3168 * That means we'll have to check which thread we're in and choose our path.
3169 */
3170#ifdef PDM_PHYS_READWRITE_FROM_ANY_THREAD
3171 PGMPhysWrite(pDevIns->Internal.s.pVMHC, GCPhys, pvBuf, cbWrite);
3172#else
3173 if (VM_IS_EMT(pDevIns->Internal.s.pVMHC) || VMMR3LockIsOwner(pDevIns->Internal.s.pVMHC))
3174 PGMPhysWrite(pDevIns->Internal.s.pVMHC, GCPhys, pvBuf, cbWrite);
3175 else
3176 {
3177 Log(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: Requesting call in EMT...\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3178 PVMREQ pReq;
3179 int rc = VMR3ReqCallVoid(pDevIns->Internal.s.pVMHC, &pReq, RT_INDEFINITE_WAIT,
3180 (PFNRT)PGMPhysWrite, 4, pDevIns->Internal.s.pVMHC, GCPhys, pvBuf, cbWrite);
3181 while (rc == VERR_TIMEOUT)
3182 rc = VMR3ReqWait(pReq, RT_INDEFINITE_WAIT);
3183 AssertReleaseRC(rc);
3184 VMR3ReqFree(pReq);
3185 }
3186#endif
3187 Log(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: returns void\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3188}
3189
3190
3191/** @copydoc PDMDEVHLP::pfnPhysReadGCVirt */
3192static DECLCALLBACK(int) pdmR3DevHlp_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
3193{
3194 PDMDEV_ASSERT_DEVINS(pDevIns);
3195 LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: pvDst=%p GCVirt=%VGv cb=%#x\n",
3196 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pvDst, GCVirtSrc, cb));
3197
3198 int rc = PGMPhysReadGCPtr(pDevIns->Internal.s.pVMHC, pvDst, GCVirtSrc, cb);
3199
3200 LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
3201
3202 return rc;
3203}
3204
3205
3206/** @copydoc PDMDEVHLP::pfnPhysWriteGCVirt */
3207static DECLCALLBACK(int) pdmR3DevHlp_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
3208{
3209 PDMDEV_ASSERT_DEVINS(pDevIns);
3210 LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: GCVirtDst=%VGv pvSrc=%p cb=%#x\n",
3211 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCVirtDst, pvSrc, cb));
3212
3213 int rc = PGMPhysWriteGCPtr(pDevIns->Internal.s.pVMHC, GCVirtDst, pvSrc, cb);
3214
3215 LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
3216
3217 return rc;
3218}
3219
3220
3221/** @copydoc PDMDEVHLP::pfnPhysReserve */
3222static DECLCALLBACK(int) pdmR3DevHlp_PhysReserve(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc)
3223{
3224 PDMDEV_ASSERT_DEVINS(pDevIns);
3225 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
3226 LogFlow(("pdmR3DevHlp_PhysReserve: caller='%s'/%d: GCPhys=%VGp cbRange=%#x pszDesc=%p:{%s}\n",
3227 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, cbRange, pszDesc, pszDesc));
3228
3229 int rc = MMR3PhysReserve(pDevIns->Internal.s.pVMHC, GCPhys, cbRange, pszDesc);
3230
3231 LogFlow(("pdmR3DevHlp_PhysReserve: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
3232
3233 return rc;
3234}
3235
3236
3237/** @copydoc PDMDEVHLP::pfnPhys2HCVirt */
3238static DECLCALLBACK(int) pdmR3DevHlp_Phys2HCVirt(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR ppvHC)
3239{
3240 PDMDEV_ASSERT_DEVINS(pDevIns);
3241 LogFlow(("pdmR3DevHlp_Phys2HCVirt: caller='%s'/%d: GCPhys=%VGp cbRange=%#x ppvHC=%p\n",
3242 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPhys, cbRange, ppvHC));
3243
3244 int rc = PGMPhysGCPhys2HCPtr(pDevIns->Internal.s.pVMHC, GCPhys, cbRange, ppvHC);
3245
3246 LogFlow(("pdmR3DevHlp_Phys2HCVirt: caller='%s'/%d: returns %Vrc *ppvHC=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, *ppvHC));
3247
3248 return rc;
3249}
3250
3251
3252/** @copydoc PDMDEVHLP::pfnPhysGCPtr2HCPtr */
3253static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPtr2HCPtr(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTHCPTR pHCPtr)
3254{
3255 PDMDEV_ASSERT_DEVINS(pDevIns);
3256 PVM pVM = pDevIns->Internal.s.pVMHC;
3257 VM_ASSERT_EMT(pVM);
3258 LogFlow(("pdmR3DevHlp_PhysGCPtr2HCPtr: caller='%s'/%d: GCPtr=%VGv pHCPtr=%p\n",
3259 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, GCPtr, pHCPtr));
3260
3261 int rc = PGMPhysGCPtr2HCPtr(pVM, GCPtr, pHCPtr);
3262
3263 LogFlow(("pdmR3DevHlp_PhysGCPtr2HCPtr: caller='%s'/%d: returns %Vrc *pHCPtr=%p\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc, *pHCPtr));
3264
3265 return rc;
3266}
3267
3268
3269/** @copydoc PDMDEVHLP::pfnA20IsEnabled */
3270static DECLCALLBACK(bool) pdmR3DevHlp_A20IsEnabled(PPDMDEVINS pDevIns)
3271{
3272 PDMDEV_ASSERT_DEVINS(pDevIns);
3273 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
3274
3275 bool fRc = PGMPhysIsA20Enabled(pDevIns->Internal.s.pVMHC);
3276
3277 LogFlow(("pdmR3DevHlp_A20IsEnabled: caller='%s'/%d: returns %d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, fRc));
3278 return fRc;
3279}
3280
3281
3282/** @copydoc PDMDEVHLP::pfnA20Set */
3283static DECLCALLBACK(void) pdmR3DevHlp_A20Set(PPDMDEVINS pDevIns, bool fEnable)
3284{
3285 PDMDEV_ASSERT_DEVINS(pDevIns);
3286 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
3287 LogFlow(("pdmR3DevHlp_A20Set: caller='%s'/%d: fEnable=%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, fEnable));
3288 //Assert(*(unsigned *)&fEnable <= 1);
3289 PGMR3PhysSetA20(pDevIns->Internal.s.pVMHC, fEnable);
3290}
3291
3292
3293/** @copydoc PDMDEVHLP::pfnVMReset */
3294static DECLCALLBACK(int) pdmR3DevHlp_VMReset(PPDMDEVINS pDevIns)
3295{
3296 PDMDEV_ASSERT_DEVINS(pDevIns);
3297 PVM pVM = pDevIns->Internal.s.pVMHC;
3298 VM_ASSERT_EMT(pVM);
3299 LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: VM_FF_RESET %d -> 1\n",
3300 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_RESET)));
3301
3302 /*
3303 * We postpone this operation because we're likely to be inside a I/O instruction
3304 * and the EIP will be updated when we return.
3305 * We still return VINF_EM_RESET to break out of any execution loops and force FF evaluation.
3306 */
3307 bool fHaltOnReset;
3308 int rc = CFGMR3QueryBool(CFGMR3GetChild(CFGMR3GetRoot(pVM), "PDM"), "HaltOnReset", &fHaltOnReset);
3309 if (VBOX_SUCCESS(rc) && fHaltOnReset)
3310 {
3311 Log(("pdmR3DevHlp_VMReset: Halt On Reset!\n"));
3312 rc = VINF_EM_HALT;
3313 }
3314 else
3315 {
3316 VM_FF_SET(pVM, VM_FF_RESET);
3317 rc = VINF_EM_RESET;
3318 }
3319
3320 LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
3321 return rc;
3322}
3323
3324
3325/** @copydoc PDMDEVHLP::pfnVMSuspend */
3326static DECLCALLBACK(int) pdmR3DevHlp_VMSuspend(PPDMDEVINS pDevIns)
3327{
3328 PDMDEV_ASSERT_DEVINS(pDevIns);
3329 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
3330 LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d:\n",
3331 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3332
3333 int rc = VMR3Suspend(pDevIns->Internal.s.pVMHC);
3334
3335 LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
3336 return rc;
3337}
3338
3339
3340/** @copydoc PDMDEVHLP::pfnVMPowerOff */
3341static DECLCALLBACK(int) pdmR3DevHlp_VMPowerOff(PPDMDEVINS pDevIns)
3342{
3343 PDMDEV_ASSERT_DEVINS(pDevIns);
3344 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
3345 LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d:\n",
3346 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3347
3348 int rc = VMR3PowerOff(pDevIns->Internal.s.pVMHC);
3349
3350 LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d: returns %Vrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
3351 return rc;
3352}
3353
3354
3355/** @copydoc PDMDEVHLP::pfnLockVM */
3356static DECLCALLBACK(int) pdmR3DevHlp_LockVM(PPDMDEVINS pDevIns)
3357{
3358 return VMMR3Lock(pDevIns->Internal.s.pVMHC);
3359}
3360
3361
3362/** @copydoc PDMDEVHLP::pfnUnlockVM */
3363static DECLCALLBACK(int) pdmR3DevHlp_UnlockVM(PPDMDEVINS pDevIns)
3364{
3365 return VMMR3Unlock(pDevIns->Internal.s.pVMHC);
3366}
3367
3368
3369/** @copydoc PDMDEVHLP::pfnAssertVMLock */
3370static DECLCALLBACK(bool) pdmR3DevHlp_AssertVMLock(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
3371{
3372 PVM pVM = pDevIns->Internal.s.pVMHC;
3373 if (VMMR3LockIsOwner(pVM))
3374 return true;
3375
3376 RTNATIVETHREAD NativeThreadOwner = VMMR3LockGetOwner(pVM);
3377 RTTHREAD ThreadOwner = RTThreadFromNative(NativeThreadOwner);
3378 char szMsg[100];
3379 RTStrPrintf(szMsg, sizeof(szMsg), "AssertVMLocked '%s'/%d ThreadOwner=%RTnthrd/%RTthrd/'%s' Self='%s'\n",
3380 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance,
3381 NativeThreadOwner, ThreadOwner, RTThreadGetName(ThreadOwner), RTThreadSelfName());
3382 AssertMsg1(szMsg, iLine, pszFile, pszFunction);
3383 AssertBreakpoint();
3384 return false;
3385}
3386
3387/** @copydoc PDMDEVHLP::pfnDMARegister */
3388static DECLCALLBACK(int) pdmR3DevHlp_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
3389{
3390 PDMDEV_ASSERT_DEVINS(pDevIns);
3391 PVM pVM = pDevIns->Internal.s.pVMHC;
3392 VM_ASSERT_EMT(pVM);
3393 LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: uChannel=%d pfnTransferHandler=%p pvUser=%p\n",
3394 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pfnTransferHandler, pvUser));
3395 int rc = VINF_SUCCESS;
3396 if (pVM->pdm.s.pDmac)
3397 pVM->pdm.s.pDmac->Reg.pfnRegister(pVM->pdm.s.pDmac->pDevIns, uChannel, pfnTransferHandler, pvUser);
3398 else
3399 {
3400 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
3401 rc = VERR_PDM_NO_DMAC_INSTANCE;
3402 }
3403 LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: returns %Vrc\n",
3404 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
3405 return rc;
3406}
3407
3408/** @copydoc PDMDEVHLP::pfnDMAReadMemory */
3409static DECLCALLBACK(int) pdmR3DevHlp_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
3410{
3411 PDMDEV_ASSERT_DEVINS(pDevIns);
3412 PVM pVM = pDevIns->Internal.s.pVMHC;
3413 VM_ASSERT_EMT(pVM);
3414 LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbRead=%p\n",
3415 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbRead));
3416 int rc = VINF_SUCCESS;
3417 if (pVM->pdm.s.pDmac)
3418 {
3419 uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnReadMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
3420 if (pcbRead)
3421 *pcbRead = cb;
3422 }
3423 else
3424 {
3425 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
3426 rc = VERR_PDM_NO_DMAC_INSTANCE;
3427 }
3428 LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: returns %Vrc\n",
3429 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
3430 return rc;
3431}
3432
3433/** @copydoc PDMDEVHLP::pfnDMAWriteMemory */
3434static DECLCALLBACK(int) pdmR3DevHlp_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
3435{
3436 PDMDEV_ASSERT_DEVINS(pDevIns);
3437 PVM pVM = pDevIns->Internal.s.pVMHC;
3438 VM_ASSERT_EMT(pVM);
3439 LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbWritten=%p\n",
3440 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbWritten));
3441 int rc = VINF_SUCCESS;
3442 if (pVM->pdm.s.pDmac)
3443 {
3444 uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnWriteMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
3445 if (pcbWritten)
3446 *pcbWritten = cb;
3447 }
3448 else
3449 {
3450 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
3451 rc = VERR_PDM_NO_DMAC_INSTANCE;
3452 }
3453 LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: returns %Vrc\n",
3454 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
3455 return rc;
3456}
3457
3458/** @copydoc PDMDEVHLP::pfnDMASetDREQ */
3459static DECLCALLBACK(int) pdmR3DevHlp_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
3460{
3461 PDMDEV_ASSERT_DEVINS(pDevIns);
3462 PVM pVM = pDevIns->Internal.s.pVMHC;
3463 VM_ASSERT_EMT(pVM);
3464 LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: uChannel=%d uLevel=%d\n",
3465 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel, uLevel));
3466 int rc = VINF_SUCCESS;
3467 if (pVM->pdm.s.pDmac)
3468 pVM->pdm.s.pDmac->Reg.pfnSetDREQ(pVM->pdm.s.pDmac->pDevIns, uChannel, uLevel);
3469 else
3470 {
3471 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
3472 rc = VERR_PDM_NO_DMAC_INSTANCE;
3473 }
3474 LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: returns %Vrc\n",
3475 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
3476 return rc;
3477}
3478
3479/** @copydoc PDMDEVHLP::pfnDMAGetChannelMode */
3480static DECLCALLBACK(uint8_t) pdmR3DevHlp_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
3481{
3482 PDMDEV_ASSERT_DEVINS(pDevIns);
3483 PVM pVM = pDevIns->Internal.s.pVMHC;
3484 VM_ASSERT_EMT(pVM);
3485 LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: uChannel=%d\n",
3486 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, uChannel));
3487 uint8_t u8Mode;
3488 if (pVM->pdm.s.pDmac)
3489 u8Mode = pVM->pdm.s.pDmac->Reg.pfnGetChannelMode(pVM->pdm.s.pDmac->pDevIns, uChannel);
3490 else
3491 {
3492 AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
3493 u8Mode = 3 << 2 /* illegal mode type */;
3494 }
3495 LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: returns %#04x\n",
3496 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, u8Mode));
3497 return u8Mode;
3498}
3499
3500/** @copydoc PDMDEVHLP::pfnDMASchedule */
3501static DECLCALLBACK(void) pdmR3DevHlp_DMASchedule(PPDMDEVINS pDevIns)
3502{
3503 PDMDEV_ASSERT_DEVINS(pDevIns);
3504 PVM pVM = pDevIns->Internal.s.pVMHC;
3505 VM_ASSERT_EMT(pVM);
3506 LogFlow(("pdmR3DevHlp_DMASchedule: caller='%s'/%d: VM_FF_PDM_DMA %d -> 1\n",
3507 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_PDM_DMA)));
3508
3509 AssertMsg(pVM->pdm.s.pDmac, ("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
3510 VM_FF_SET(pVM, VM_FF_PDM_DMA);
3511 REMR3NotifyDmaPending(pVM);
3512 VMR3NotifyFF(pVM, true);
3513}
3514
3515
3516/** @copydoc PDMDEVHLP::pfnCMOSWrite */
3517static DECLCALLBACK(int) pdmR3DevHlp_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
3518{
3519 PDMDEV_ASSERT_DEVINS(pDevIns);
3520 PVM pVM = pDevIns->Internal.s.pVMHC;
3521 VM_ASSERT_EMT(pVM);
3522
3523 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x u8Value=%#04x\n",
3524 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iReg, u8Value));
3525 int rc;
3526 if (pVM->pdm.s.pRtc)
3527 rc = pVM->pdm.s.pRtc->Reg.pfnWrite(pVM->pdm.s.pRtc->pDevIns, iReg, u8Value);
3528 else
3529 rc = VERR_PDM_NO_RTC_INSTANCE;
3530
3531 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Vrc\n",
3532 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
3533 return rc;
3534}
3535
3536
3537/** @copydoc PDMDEVHLP::pfnCMOSRead */
3538static DECLCALLBACK(int) pdmR3DevHlp_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
3539{
3540 PDMDEV_ASSERT_DEVINS(pDevIns);
3541 PVM pVM = pDevIns->Internal.s.pVMHC;
3542 VM_ASSERT_EMT(pVM);
3543
3544 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x pu8Value=%p\n",
3545 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iReg, pu8Value));
3546 int rc;
3547 if (pVM->pdm.s.pRtc)
3548 rc = pVM->pdm.s.pRtc->Reg.pfnRead(pVM->pdm.s.pRtc->pDevIns, iReg, pu8Value);
3549 else
3550 rc = VERR_PDM_NO_RTC_INSTANCE;
3551
3552 LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Vrc\n",
3553 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
3554 return rc;
3555}
3556
3557
3558/** @copydoc PDMDEVHLP::pfnGetCpuId */
3559static DECLCALLBACK(void) pdmR3DevHlp_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
3560 uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
3561{
3562 PDMDEV_ASSERT_DEVINS(pDevIns);
3563 LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: iLeaf=%d pEax=%p pEbx=%p pEcx=%p pEdx=%p\n",
3564 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, iLeaf, pEax, pEbx, pEcx, pEdx));
3565 AssertPtr(pEax); AssertPtr(pEbx); AssertPtr(pEcx); AssertPtr(pEdx);
3566
3567 CPUMGetGuestCpuId(pDevIns->Internal.s.pVMHC, iLeaf, pEax, pEbx, pEcx, pEdx);
3568
3569 LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: returns void - *pEax=%#x *pEbx=%#x *pEcx=%#x *pEdx=%#x\n",
3570 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, *pEax, *pEbx, *pEcx, *pEdx));
3571}
3572
3573
3574
3575
3576/** @copydoc PDMDEVHLP::pfnGetVM */
3577static DECLCALLBACK(PVM) pdmR3DevHlp_Untrusted_GetVM(PPDMDEVINS pDevIns)
3578{
3579 PDMDEV_ASSERT_DEVINS(pDevIns);
3580 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3581 return NULL;
3582}
3583
3584
3585/** @copydoc PDMDEVHLP::pfnPCIBusRegister */
3586static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
3587{
3588 PDMDEV_ASSERT_DEVINS(pDevIns);
3589 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3590 NOREF(pPciBusReg);
3591 NOREF(ppPciHlpR3);
3592 return VERR_ACCESS_DENIED;
3593}
3594
3595
3596/** @copydoc PDMDEVHLP::pfnPICRegister */
3597static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
3598{
3599 PDMDEV_ASSERT_DEVINS(pDevIns);
3600 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3601 NOREF(pPicReg);
3602 NOREF(ppPicHlpR3);
3603 return VERR_ACCESS_DENIED;
3604}
3605
3606
3607/** @copydoc PDMDEVHLP::pfnAPICRegister */
3608static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
3609{
3610 PDMDEV_ASSERT_DEVINS(pDevIns);
3611 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3612 NOREF(pApicReg);
3613 NOREF(ppApicHlpR3);
3614 return VERR_ACCESS_DENIED;
3615}
3616
3617
3618/** @copydoc PDMDEVHLP::pfnIOAPICRegister */
3619static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
3620{
3621 PDMDEV_ASSERT_DEVINS(pDevIns);
3622 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3623 NOREF(pIoApicReg);
3624 NOREF(ppIoApicHlpR3);
3625 return VERR_ACCESS_DENIED;
3626}
3627
3628
3629/** @copydoc PDMDEVHLP::pfnDMACRegister */
3630static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
3631{
3632 PDMDEV_ASSERT_DEVINS(pDevIns);
3633 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3634 NOREF(pDmacReg);
3635 NOREF(ppDmacHlp);
3636 return VERR_ACCESS_DENIED;
3637}
3638
3639
3640/** @copydoc PDMDEVHLP::pfnPhysRead */
3641static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
3642{
3643 PDMDEV_ASSERT_DEVINS(pDevIns);
3644 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3645 NOREF(GCPhys);
3646 NOREF(pvBuf);
3647 NOREF(cbRead);
3648}
3649
3650
3651/** @copydoc PDMDEVHLP::pfnPhysWrite */
3652static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
3653{
3654 PDMDEV_ASSERT_DEVINS(pDevIns);
3655 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3656 NOREF(GCPhys);
3657 NOREF(pvBuf);
3658 NOREF(cbWrite);
3659}
3660
3661
3662/** @copydoc PDMDEVHLP::pfnPhysReadGCVirt */
3663static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
3664{
3665 PDMDEV_ASSERT_DEVINS(pDevIns);
3666 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3667 NOREF(pvDst);
3668 NOREF(GCVirtSrc);
3669 NOREF(cb);
3670 return VERR_ACCESS_DENIED;
3671}
3672
3673
3674/** @copydoc PDMDEVHLP::pfnPhysWriteGCVirt */
3675static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
3676{
3677 PDMDEV_ASSERT_DEVINS(pDevIns);
3678 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3679 NOREF(GCVirtDst);
3680 NOREF(pvSrc);
3681 NOREF(cb);
3682 return VERR_ACCESS_DENIED;
3683}
3684
3685
3686/** @copydoc PDMDEVHLP::pfnPhysReserve */
3687static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysReserve(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc)
3688{
3689 PDMDEV_ASSERT_DEVINS(pDevIns);
3690 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3691 NOREF(GCPhys);
3692 NOREF(cbRange);
3693 return VERR_ACCESS_DENIED;
3694}
3695
3696
3697/** @copydoc PDMDEVHLP::pfnPhys2HCVirt */
3698static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_Phys2HCVirt(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, PRTHCPTR ppvHC)
3699{
3700 PDMDEV_ASSERT_DEVINS(pDevIns);
3701 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3702 NOREF(GCPhys);
3703 NOREF(cbRange);
3704 NOREF(ppvHC);
3705 return VERR_ACCESS_DENIED;
3706}
3707
3708
3709/** @copydoc PDMDEVHLP::pfnPhysGCPtr2HCPtr */
3710static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_PhysGCPtr2HCPtr(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTHCPTR pHCPtr)
3711{
3712 PDMDEV_ASSERT_DEVINS(pDevIns);
3713 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3714 NOREF(GCPtr);
3715 NOREF(pHCPtr);
3716 return VERR_ACCESS_DENIED;
3717}
3718
3719
3720/** @copydoc PDMDEVHLP::pfnA20IsEnabled */
3721static DECLCALLBACK(bool) pdmR3DevHlp_Untrusted_A20IsEnabled(PPDMDEVINS pDevIns)
3722{
3723 PDMDEV_ASSERT_DEVINS(pDevIns);
3724 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3725 return false;
3726}
3727
3728
3729/** @copydoc PDMDEVHLP::pfnA20Set */
3730static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_A20Set(PPDMDEVINS pDevIns, bool fEnable)
3731{
3732 PDMDEV_ASSERT_DEVINS(pDevIns);
3733 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3734 NOREF(fEnable);
3735}
3736
3737
3738/** @copydoc PDMDEVHLP::pfnVMReset */
3739static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMReset(PPDMDEVINS pDevIns)
3740{
3741 PDMDEV_ASSERT_DEVINS(pDevIns);
3742 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3743 return VERR_ACCESS_DENIED;
3744}
3745
3746
3747/** @copydoc PDMDEVHLP::pfnVMSuspend */
3748static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMSuspend(PPDMDEVINS pDevIns)
3749{
3750 PDMDEV_ASSERT_DEVINS(pDevIns);
3751 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3752 return VERR_ACCESS_DENIED;
3753}
3754
3755
3756/** @copydoc PDMDEVHLP::pfnVMPowerOff */
3757static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMPowerOff(PPDMDEVINS pDevIns)
3758{
3759 PDMDEV_ASSERT_DEVINS(pDevIns);
3760 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3761 return VERR_ACCESS_DENIED;
3762}
3763
3764
3765/** @copydoc PDMDEVHLP::pfnLockVM */
3766static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_LockVM(PPDMDEVINS pDevIns)
3767{
3768 PDMDEV_ASSERT_DEVINS(pDevIns);
3769 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3770 return VERR_ACCESS_DENIED;
3771}
3772
3773
3774/** @copydoc PDMDEVHLP::pfnUnlockVM */
3775static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_UnlockVM(PPDMDEVINS pDevIns)
3776{
3777 PDMDEV_ASSERT_DEVINS(pDevIns);
3778 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3779 return VERR_ACCESS_DENIED;
3780}
3781
3782
3783/** @copydoc PDMDEVHLP::pfnAssertVMLock */
3784static DECLCALLBACK(bool) pdmR3DevHlp_Untrusted_AssertVMLock(PPDMDEVINS pDevIns, const char *pszFile, unsigned iLine, const char *pszFunction)
3785{
3786 PDMDEV_ASSERT_DEVINS(pDevIns);
3787 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3788 return false;
3789}
3790
3791
3792/** @copydoc PDMDEVHLP::pfnDMARegister */
3793static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
3794{
3795 PDMDEV_ASSERT_DEVINS(pDevIns);
3796 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3797 return VERR_ACCESS_DENIED;
3798}
3799
3800
3801/** @copydoc PDMDEVHLP::pfnDMAReadMemory */
3802static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbRead)
3803{
3804 PDMDEV_ASSERT_DEVINS(pDevIns);
3805 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3806 if (pcbRead)
3807 *pcbRead = 0;
3808 return VERR_ACCESS_DENIED;
3809}
3810
3811
3812/** @copydoc PDMDEVHLP::pfnDMAWriteMemory */
3813static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void *pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t *pcbWritten)
3814{
3815 PDMDEV_ASSERT_DEVINS(pDevIns);
3816 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3817 if (pcbWritten)
3818 *pcbWritten = 0;
3819 return VERR_ACCESS_DENIED;
3820}
3821
3822
3823/** @copydoc PDMDEVHLP::pfnDMASetDREQ */
3824static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
3825{
3826 PDMDEV_ASSERT_DEVINS(pDevIns);
3827 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3828 return VERR_ACCESS_DENIED;
3829}
3830
3831
3832/** @copydoc PDMDEVHLP::pfnDMAGetChannelMode */
3833static DECLCALLBACK(uint8_t) pdmR3DevHlp_Untrusted_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
3834{
3835 PDMDEV_ASSERT_DEVINS(pDevIns);
3836 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3837 return 3 << 2 /* illegal mode type */;
3838}
3839
3840
3841/** @copydoc PDMDEVHLP::pfnDMASchedule */
3842static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_DMASchedule(PPDMDEVINS pDevIns)
3843{
3844 PDMDEV_ASSERT_DEVINS(pDevIns);
3845 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3846}
3847
3848
3849/** @copydoc PDMDEVHLP::pfnCMOSWrite */
3850static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
3851{
3852 PDMDEV_ASSERT_DEVINS(pDevIns);
3853 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3854 return VERR_ACCESS_DENIED;
3855}
3856
3857
3858/** @copydoc PDMDEVHLP::pfnCMOSRead */
3859static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
3860{
3861 PDMDEV_ASSERT_DEVINS(pDevIns);
3862 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3863 return VERR_ACCESS_DENIED;
3864}
3865
3866
3867/** @copydoc PDMDEVHLP::pfnQueryCPUId */
3868static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_QueryCPUId(PPDMDEVINS pDevIns, uint32_t iLeaf,
3869 uint32_t *pEax, uint32_t *pEbx, uint32_t *pEcx, uint32_t *pEdx)
3870{
3871 PDMDEV_ASSERT_DEVINS(pDevIns);
3872 AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
3873}
3874
3875
3876/** @copydoc PDMPICHLPR3::pfnSetInterruptFF */
3877static DECLCALLBACK(void) pdmR3PicHlp_SetInterruptFF(PPDMDEVINS pDevIns)
3878{
3879 PDMDEV_ASSERT_DEVINS(pDevIns);
3880 PVM pVM = pDevIns->Internal.s.pVMHC;
3881 LogFlow(("pdmR3PicHlp_SetInterruptFF: caller='%s'/%d: VM_FF_INTERRUPT_PIC %d -> 1\n",
3882 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_INTERRUPT_PIC)));
3883 VM_FF_SET(pVM, VM_FF_INTERRUPT_PIC);
3884 REMR3NotifyInterruptSet(pVM);
3885#ifdef VBOX_WITH_PDM_LOCK
3886 VMR3NotifyFF(pVM, true);
3887#endif
3888}
3889
3890
3891/** @copydoc PDMPICHLPR3::pfnClearInterruptFF */
3892static DECLCALLBACK(void) pdmR3PicHlp_ClearInterruptFF(PPDMDEVINS pDevIns)
3893{
3894 PDMDEV_ASSERT_DEVINS(pDevIns);
3895 LogFlow(("pdmR3PicHlp_ClearInterruptFF: caller='%s'/%d: VM_FF_INTERRUPT_PIC %d -> 0\n",
3896 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VM_FF_ISSET(pDevIns->Internal.s.pVMHC, VM_FF_INTERRUPT_PIC)));
3897 VM_FF_CLEAR(pDevIns->Internal.s.pVMHC, VM_FF_INTERRUPT_PIC);
3898 REMR3NotifyInterruptClear(pDevIns->Internal.s.pVMHC);
3899}
3900
3901
3902#ifdef VBOX_WITH_PDM_LOCK
3903/** @copydoc PDMPICHLPR3::pfnLock */
3904static DECLCALLBACK(int) pdmR3PicHlp_Lock(PPDMDEVINS pDevIns, int rc)
3905{
3906 PDMDEV_ASSERT_DEVINS(pDevIns);
3907 return pdmLockEx(pDevIns->Internal.s.pVMHC, rc);
3908}
3909
3910
3911/** @copydoc PDMPICHLPR3::pfnUnlock */
3912static DECLCALLBACK(void) pdmR3PicHlp_Unlock(PPDMDEVINS pDevIns)
3913{
3914 PDMDEV_ASSERT_DEVINS(pDevIns);
3915 pdmUnlock(pDevIns->Internal.s.pVMHC);
3916}
3917#endif /* VBOX_WITH_PDM_LOCK */
3918
3919
3920/** @copydoc PDMPICHLPR3::pfnGetGCHelpers */
3921static DECLCALLBACK(PCPDMPICHLPGC) pdmR3PicHlp_GetGCHelpers(PPDMDEVINS pDevIns)
3922{
3923 PDMDEV_ASSERT_DEVINS(pDevIns);
3924 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
3925 RTGCPTR pGCHelpers = 0;
3926 int rc = PDMR3GetSymbolGC(pDevIns->Internal.s.pVMHC, NULL, "g_pdmGCPicHlp", &pGCHelpers);
3927 AssertReleaseRC(rc);
3928 AssertRelease(pGCHelpers);
3929 LogFlow(("pdmR3PicHlp_GetGCHelpers: caller='%s'/%d: returns %VGv\n",
3930 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pGCHelpers));
3931 return pGCHelpers;
3932}
3933
3934
3935/** @copydoc PDMPICHLPR3::pfnGetR0Helpers */
3936static DECLCALLBACK(PCPDMPICHLPR0) pdmR3PicHlp_GetR0Helpers(PPDMDEVINS pDevIns)
3937{
3938 PDMDEV_ASSERT_DEVINS(pDevIns);
3939 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
3940 PCPDMPICHLPR0 pR0Helpers = 0;
3941 int rc = PDMR3GetSymbolR0(pDevIns->Internal.s.pVMHC, NULL, "g_pdmR0PicHlp", &pR0Helpers);
3942 AssertReleaseRC(rc);
3943 AssertRelease(pR0Helpers);
3944 LogFlow(("pdmR3PicHlp_GetR0Helpers: caller='%s'/%d: returns %VHv\n",
3945 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pR0Helpers));
3946 return pR0Helpers;
3947}
3948
3949
3950/** @copydoc PDMAPICHLPR3::pfnSetInterruptFF */
3951static DECLCALLBACK(void) pdmR3ApicHlp_SetInterruptFF(PPDMDEVINS pDevIns)
3952{
3953 PDMDEV_ASSERT_DEVINS(pDevIns);
3954 PVM pVM = pDevIns->Internal.s.pVMHC;
3955 LogFlow(("pdmR3ApicHlp_SetInterruptFF: caller='%s'/%d: VM_FF_INTERRUPT %d -> 1\n",
3956 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_INTERRUPT_APIC)));
3957 VM_FF_SET(pVM, VM_FF_INTERRUPT_APIC);
3958 REMR3NotifyInterruptSet(pVM);
3959#ifdef VBOX_WITH_PDM_LOCK
3960 VMR3NotifyFF(pVM, true);
3961#endif
3962}
3963
3964
3965/** @copydoc PDMAPICHLPR3::pfnClearInterruptFF */
3966static DECLCALLBACK(void) pdmR3ApicHlp_ClearInterruptFF(PPDMDEVINS pDevIns)
3967{
3968 PDMDEV_ASSERT_DEVINS(pDevIns);
3969 LogFlow(("pdmR3ApicHlp_ClearInterruptFF: caller='%s'/%d: VM_FF_INTERRUPT %d -> 0\n",
3970 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VM_FF_ISSET(pDevIns->Internal.s.pVMHC, VM_FF_INTERRUPT_APIC)));
3971 VM_FF_CLEAR(pDevIns->Internal.s.pVMHC, VM_FF_INTERRUPT_APIC);
3972 REMR3NotifyInterruptClear(pDevIns->Internal.s.pVMHC);
3973}
3974
3975
3976/** @copydoc PDMAPICHLPR3::pfnChangeFeature */
3977static DECLCALLBACK(void) pdmR3ApicHlp_ChangeFeature(PPDMDEVINS pDevIns, bool fEnabled)
3978{
3979 PDMDEV_ASSERT_DEVINS(pDevIns);
3980 LogFlow(("pdmR3ApicHlp_ClearInterruptFF: caller='%s'/%d: fEnabled=%RTbool\n",
3981 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, fEnabled));
3982 if (fEnabled)
3983 CPUMSetGuestCpuIdFeature(pDevIns->Internal.s.pVMHC, CPUMCPUIDFEATURE_APIC);
3984 else
3985 CPUMClearGuestCpuIdFeature(pDevIns->Internal.s.pVMHC, CPUMCPUIDFEATURE_APIC);
3986}
3987
3988#ifdef VBOX_WITH_PDM_LOCK
3989/** @copydoc PDMAPICHLPR3::pfnLock */
3990static DECLCALLBACK(int) pdmR3ApicHlp_Lock(PPDMDEVINS pDevIns, int rc)
3991{
3992 PDMDEV_ASSERT_DEVINS(pDevIns);
3993 return pdmLockEx(pDevIns->Internal.s.pVMHC, rc);
3994}
3995
3996
3997/** @copydoc PDMAPICHLPR3::pfnUnlock */
3998static DECLCALLBACK(void) pdmR3ApicHlp_Unlock(PPDMDEVINS pDevIns)
3999{
4000 PDMDEV_ASSERT_DEVINS(pDevIns);
4001 pdmUnlock(pDevIns->Internal.s.pVMHC);
4002}
4003#endif /* VBOX_WITH_PDM_LOCK */
4004
4005
4006/** @copydoc PDMAPICHLPR3::pfnGetGCHelpers */
4007static DECLCALLBACK(PCPDMAPICHLPGC) pdmR3ApicHlp_GetGCHelpers(PPDMDEVINS pDevIns)
4008{
4009 PDMDEV_ASSERT_DEVINS(pDevIns);
4010 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
4011 RTGCPTR pGCHelpers = 0;
4012 int rc = PDMR3GetSymbolGC(pDevIns->Internal.s.pVMHC, NULL, "g_pdmGCApicHlp", &pGCHelpers);
4013 AssertReleaseRC(rc);
4014 AssertRelease(pGCHelpers);
4015 LogFlow(("pdmR3ApicHlp_GetGCHelpers: caller='%s'/%d: returns %VGv\n",
4016 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pGCHelpers));
4017 return pGCHelpers;
4018}
4019
4020
4021/** @copydoc PDMAPICHLPR3::pfnGetR0Helpers */
4022static DECLCALLBACK(PCPDMAPICHLPR0) pdmR3ApicHlp_GetR0Helpers(PPDMDEVINS pDevIns)
4023{
4024 PDMDEV_ASSERT_DEVINS(pDevIns);
4025 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
4026 PCPDMAPICHLPR0 pR0Helpers = 0;
4027 int rc = PDMR3GetSymbolR0(pDevIns->Internal.s.pVMHC, NULL, "g_pdmR0ApicHlp", &pR0Helpers);
4028 AssertReleaseRC(rc);
4029 AssertRelease(pR0Helpers);
4030 LogFlow(("pdmR3ApicHlp_GetR0Helpers: caller='%s'/%d: returns %VHv\n",
4031 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pR0Helpers));
4032 return pR0Helpers;
4033}
4034
4035
4036/** @copydoc PDMIOAPICHLPR3::pfnApicBusDeliver */
4037static DECLCALLBACK(void) pdmR3IoApicHlp_ApicBusDeliver(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
4038 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode)
4039{
4040 PDMDEV_ASSERT_DEVINS(pDevIns);
4041 PVM pVM = pDevIns->Internal.s.pVMHC;
4042#ifndef VBOX_WITH_PDM_LOCK
4043 VM_ASSERT_EMT(pVM);
4044#endif
4045 LogFlow(("pdmR3IoApicHlp_ApicBusDeliver: caller='%s'/%d: u8Dest=%RX8 u8DestMode=%RX8 u8DeliveryMode=%RX8 iVector=%RX8 u8Polarity=%RX8 u8TriggerMode=%RX8\n",
4046 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, u8Dest, u8DestMode, u8DeliveryMode, iVector, u8Polarity, u8TriggerMode));
4047 if (pVM->pdm.s.Apic.pfnBusDeliverR3)
4048 pVM->pdm.s.Apic.pfnBusDeliverR3(pVM->pdm.s.Apic.pDevInsR3, u8Dest, u8DestMode, u8DeliveryMode, iVector, u8Polarity, u8TriggerMode);
4049}
4050
4051
4052#ifdef VBOX_WITH_PDM_LOCK
4053/** @copydoc PDMIOAPICHLPR3::pfnLock */
4054static DECLCALLBACK(int) pdmR3IoApicHlp_Lock(PPDMDEVINS pDevIns, int rc)
4055{
4056 PDMDEV_ASSERT_DEVINS(pDevIns);
4057 return pdmLockEx(pDevIns->Internal.s.pVMHC, rc);
4058}
4059
4060
4061/** @copydoc PDMIOAPICHLPR3::pfnUnlock */
4062static DECLCALLBACK(void) pdmR3IoApicHlp_Unlock(PPDMDEVINS pDevIns)
4063{
4064 PDMDEV_ASSERT_DEVINS(pDevIns);
4065 pdmUnlock(pDevIns->Internal.s.pVMHC);
4066}
4067#endif /* VBOX_WITH_PDM_LOCK */
4068
4069
4070/** @copydoc PDMIOAPICHLPR3::pfnGetGCHelpers */
4071static DECLCALLBACK(PCPDMIOAPICHLPGC) pdmR3IoApicHlp_GetGCHelpers(PPDMDEVINS pDevIns)
4072{
4073 PDMDEV_ASSERT_DEVINS(pDevIns);
4074 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
4075 RTGCPTR pGCHelpers = 0;
4076 int rc = PDMR3GetSymbolGC(pDevIns->Internal.s.pVMHC, NULL, "g_pdmGCIoApicHlp", &pGCHelpers);
4077 AssertReleaseRC(rc);
4078 AssertRelease(pGCHelpers);
4079 LogFlow(("pdmR3IoApicHlp_GetGCHelpers: caller='%s'/%d: returns %VGv\n",
4080 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pGCHelpers));
4081 return pGCHelpers;
4082}
4083
4084
4085/** @copydoc PDMIOAPICHLPR3::pfnGetR0Helpers */
4086static DECLCALLBACK(PCPDMIOAPICHLPR0) pdmR3IoApicHlp_GetR0Helpers(PPDMDEVINS pDevIns)
4087{
4088 PDMDEV_ASSERT_DEVINS(pDevIns);
4089 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
4090 PCPDMIOAPICHLPR0 pR0Helpers = 0;
4091 int rc = PDMR3GetSymbolR0(pDevIns->Internal.s.pVMHC, NULL, "g_pdmR0IoApicHlp", &pR0Helpers);
4092 AssertReleaseRC(rc);
4093 AssertRelease(pR0Helpers);
4094 LogFlow(("pdmR3IoApicHlp_GetR0Helpers: caller='%s'/%d: returns %VHv\n",
4095 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pR0Helpers));
4096 return pR0Helpers;
4097}
4098
4099
4100/** @copydoc PDMPCIHLPR3::pfnIsaSetIrq */
4101static DECLCALLBACK(void) pdmR3PciHlp_IsaSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4102{
4103 PDMDEV_ASSERT_DEVINS(pDevIns);
4104#ifndef VBOX_WITH_PDM_LOCK
4105 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
4106#endif
4107 Log4(("pdmR3PciHlp_IsaSetIrq: iIrq=%d iLevel=%d\n", iIrq, iLevel));
4108 PDMIsaSetIrq(pDevIns->Internal.s.pVMHC, iIrq, iLevel);
4109}
4110
4111
4112/** @copydoc PDMPCIHLPR3::pfnIoApicSetIrq */
4113static DECLCALLBACK(void) pdmR3PciHlp_IoApicSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
4114{
4115 PDMDEV_ASSERT_DEVINS(pDevIns);
4116#ifndef VBOX_WITH_PDM_LOCK
4117 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
4118#endif
4119 Log4(("pdmR3PciHlp_IsaSetIrq: iIrq=%d iLevel=%d\n", iIrq, iLevel));
4120 PDMIoApicSetIrq(pDevIns->Internal.s.pVMHC, iIrq, iLevel);
4121}
4122
4123
4124#ifdef VBOX_WITH_PDM_LOCK
4125/** @copydoc PDMPCIHLPR3::pfnLock */
4126static DECLCALLBACK(int) pdmR3PciHlp_Lock(PPDMDEVINS pDevIns, int rc)
4127{
4128 PDMDEV_ASSERT_DEVINS(pDevIns);
4129 return pdmLockEx(pDevIns->Internal.s.pVMHC, rc);
4130}
4131
4132
4133/** @copydoc PDMPCIHLPR3::pfnUnlock */
4134static DECLCALLBACK(void) pdmR3PciHlp_Unlock(PPDMDEVINS pDevIns)
4135{
4136 PDMDEV_ASSERT_DEVINS(pDevIns);
4137 pdmUnlock(pDevIns->Internal.s.pVMHC);
4138}
4139#endif /* VBOX_WITH_PDM_LOCK */
4140
4141
4142/** @copydoc PDMPCIHLPR3::pfnGetGCHelpers */
4143static DECLCALLBACK(PCPDMPCIHLPGC) pdmR3PciHlp_GetGCHelpers(PPDMDEVINS pDevIns)
4144{
4145 PDMDEV_ASSERT_DEVINS(pDevIns);
4146 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
4147 RTGCPTR pGCHelpers = 0;
4148 int rc = PDMR3GetSymbolGC(pDevIns->Internal.s.pVMHC, NULL, "g_pdmGCPciHlp", &pGCHelpers);
4149 AssertReleaseRC(rc);
4150 AssertRelease(pGCHelpers);
4151 LogFlow(("pdmR3IoApicHlp_GetGCHelpers: caller='%s'/%d: returns %VGv\n",
4152 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pGCHelpers));
4153 return pGCHelpers;
4154}
4155
4156
4157/** @copydoc PDMPCIHLPR3::pfnGetR0Helpers */
4158static DECLCALLBACK(PCPDMPCIHLPR0) pdmR3PciHlp_GetR0Helpers(PPDMDEVINS pDevIns)
4159{
4160 PDMDEV_ASSERT_DEVINS(pDevIns);
4161 VM_ASSERT_EMT(pDevIns->Internal.s.pVMHC);
4162 PCPDMPCIHLPR0 pR0Helpers = 0;
4163 int rc = PDMR3GetSymbolR0(pDevIns->Internal.s.pVMHC, NULL, "g_pdmR0PciHlp", &pR0Helpers);
4164 AssertReleaseRC(rc);
4165 AssertRelease(pR0Helpers);
4166 LogFlow(("pdmR3IoApicHlp_GetR0Helpers: caller='%s'/%d: returns %VHv\n",
4167 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pR0Helpers));
4168 return pR0Helpers;
4169}
4170
4171
4172/**
4173 * Locates a LUN.
4174 *
4175 * @returns VBox status code.
4176 * @param pVM VM Handle.
4177 * @param pszDevice Device name.
4178 * @param iInstance Device instance.
4179 * @param iLun The Logical Unit to obtain the interface of.
4180 * @param ppLun Where to store the pointer to the LUN if found.
4181 * @thread Try only do this in EMT...
4182 */
4183int pdmR3DevFindLun(PVM pVM, const char *pszDevice, unsigned iInstance, unsigned iLun, PPDMLUN *ppLun)
4184{
4185 /*
4186 * Iterate registered devices looking for the device.
4187 */
4188 RTUINT cchDevice = strlen(pszDevice);
4189 for (PPDMDEV pDev = pVM->pdm.s.pDevs; pDev; pDev = pDev->pNext)
4190 {
4191 if ( pDev->cchName == cchDevice
4192 && !memcmp(pDev->pDevReg->szDeviceName, pszDevice, cchDevice))
4193 {
4194 /*
4195 * Iterate device instances.
4196 */
4197 for (PPDMDEVINS pDevIns = pDev->pInstances; pDevIns; pDevIns = pDevIns->Internal.s.pPerDeviceNextHC)
4198 {
4199 if (pDevIns->iInstance == iInstance)
4200 {
4201 /*
4202 * Iterate luns.
4203 */
4204 for (PPDMLUN pLun = pDevIns->Internal.s.pLunsHC; pLun; pLun = pLun->pNext)
4205 {
4206 if (pLun->iLun == iLun)
4207 {
4208 *ppLun = pLun;
4209 return VINF_SUCCESS;
4210 }
4211 }
4212 return VERR_PDM_LUN_NOT_FOUND;
4213 }
4214 }
4215 return VERR_PDM_DEVICE_INSTANCE_NOT_FOUND;
4216 }
4217 }
4218 return VERR_PDM_DEVICE_NOT_FOUND;
4219}
4220
4221
4222/**
4223 * Attaches a preconfigured driver to an existing device instance.
4224 *
4225 * This is used to change drivers and suchlike at runtime.
4226 *
4227 * @returns VBox status code.
4228 * @param pVM VM Handle.
4229 * @param pszDevice Device name.
4230 * @param iInstance Device instance.
4231 * @param iLun The Logical Unit to obtain the interface of.
4232 * @param ppBase Where to store the base interface pointer. Optional.
4233 * @thread EMT
4234 */
4235PDMR3DECL(int) PDMR3DeviceAttach(PVM pVM, const char *pszDevice, unsigned iInstance, unsigned iLun, PPDMIBASE *ppBase)
4236{
4237 VM_ASSERT_EMT(pVM);
4238 LogFlow(("PDMR3DeviceAttach: pszDevice=%p:{%s} iInstance=%d iLun=%d ppBase=%p\n",
4239 pszDevice, pszDevice, iInstance, iLun, ppBase));
4240
4241 /*
4242 * Find the LUN in question.
4243 */
4244 PPDMLUN pLun;
4245 int rc = pdmR3DevFindLun(pVM, pszDevice, iInstance, iLun, &pLun);
4246 if (VBOX_SUCCESS(rc))
4247 {
4248 /*
4249 * Can we attach anything at runtime?
4250 */
4251 PPDMDEVINS pDevIns = pLun->pDevIns;
4252 if (pDevIns->pDevReg->pfnAttach)
4253 {
4254 if (!pLun->pTop)
4255 {
4256 rc = pDevIns->pDevReg->pfnAttach(pDevIns, iLun);
4257
4258 }
4259 else
4260 rc = VERR_PDM_DRIVER_ALREADY_ATTACHED;
4261 }
4262 else
4263 rc = VERR_PDM_DEVICE_NO_RT_ATTACH;
4264
4265 if (ppBase)
4266 *ppBase = pLun->pTop ? &pLun->pTop->IBase : NULL;
4267 }
4268 else if (ppBase)
4269 *ppBase = NULL;
4270
4271 if (ppBase)
4272 LogFlow(("PDMR3DeviceAttach: returns %Vrc *ppBase=%p\n", rc, *ppBase));
4273 else
4274 LogFlow(("PDMR3DeviceAttach: returns %Vrc\n", rc));
4275 return rc;
4276}
4277
4278
4279/**
4280 * Detaches a driver from an existing device instance.
4281 *
4282 * This is used to change drivers and suchlike at runtime.
4283 *
4284 * @returns VBox status code.
4285 * @param pVM VM Handle.
4286 * @param pszDevice Device name.
4287 * @param iInstance Device instance.
4288 * @param iLun The Logical Unit to obtain the interface of.
4289 * @thread EMT
4290 */
4291PDMR3DECL(int) PDMR3DeviceDetach(PVM pVM, const char *pszDevice, unsigned iInstance, unsigned iLun)
4292{
4293 VM_ASSERT_EMT(pVM);
4294 LogFlow(("PDMR3DeviceDetach: pszDevice=%p:{%s} iInstance=%d iLun=%d\n",
4295 pszDevice, pszDevice, iInstance, iLun));
4296
4297 /*
4298 * Find the LUN in question.
4299 */
4300 PPDMLUN pLun;
4301 int rc = pdmR3DevFindLun(pVM, pszDevice, iInstance, iLun, &pLun);
4302 if (VBOX_SUCCESS(rc))
4303 {
4304 /*
4305 * Can we detach anything at runtime?
4306 */
4307 PPDMDEVINS pDevIns = pLun->pDevIns;
4308 if (pDevIns->pDevReg->pfnDetach)
4309 {
4310 if (pLun->pTop)
4311 rc = pdmR3DrvDetach(pLun->pTop);
4312 else
4313 rc = VINF_PDM_NO_DRIVER_ATTACHED_TO_LUN;
4314 }
4315 else
4316 rc = VERR_PDM_DEVICE_NO_RT_DETACH;
4317 }
4318
4319 LogFlow(("PDMR3DeviceDetach: returns %Vrc\n", rc));
4320 return rc;
4321}
4322
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