VirtualBox

source: vbox/trunk/src/VBox/VMM/PDMDevMiscHlp.cpp@ 22493

Last change on this file since 22493 was 20902, checked in by vboxsync, 15 years ago

VMM: nitpicking - just use default
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File size: 17.2 KB
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1/* $Id: PDMDevMiscHlp.cpp 20902 2009-06-24 18:26:25Z vboxsync $ */
2/** @file
3 * PDM - Pluggable Device and Driver Manager, Misc. Device Helpers.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22
23/*******************************************************************************
24* Header Files *
25*******************************************************************************/
26#define LOG_GROUP LOG_GROUP_PDM_DEVICE
27#include "PDMInternal.h"
28#include <VBox/pdm.h>
29#include <VBox/rem.h>
30#include <VBox/vm.h>
31#include <VBox/vmm.h>
32
33#include <VBox/log.h>
34#include <VBox/err.h>
35#include <iprt/asm.h>
36#include <iprt/assert.h>
37#include <iprt/thread.h>
38
39
40
41/** @name HC PIC Helpers
42 * @{
43 */
44
45/** @copydoc PDMPICHLPR3::pfnSetInterruptFF */
46static DECLCALLBACK(void) pdmR3PicHlp_SetInterruptFF(PPDMDEVINS pDevIns)
47{
48 PDMDEV_ASSERT_DEVINS(pDevIns);
49 PVM pVM = pDevIns->Internal.s.pVMR3;
50 PVMCPU pVCpu = &pVM->aCpus[0]; /* for PIC we always deliver to CPU 0, MP use APIC */
51
52 LogFlow(("pdmR3PicHlp_SetInterruptFF: caller='%s'/%d: VM_FF_INTERRUPT_PIC %d -> 1\n",
53 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VMCPU_FF_ISSET(pVCpu, VMCPU_FF_INTERRUPT_PIC)));
54
55 VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_PIC);
56 REMR3NotifyInterruptSet(pVM, pVCpu);
57 VMR3NotifyCpuFFU(pVCpu->pUVCpu, VMNOTIFYFF_FLAGS_DONE_REM | VMNOTIFYFF_FLAGS_POKE);
58}
59
60
61/** @copydoc PDMPICHLPR3::pfnClearInterruptFF */
62static DECLCALLBACK(void) pdmR3PicHlp_ClearInterruptFF(PPDMDEVINS pDevIns)
63{
64 PDMDEV_ASSERT_DEVINS(pDevIns);
65 PVM pVM = pDevIns->Internal.s.pVMR3;
66 PVMCPU pVCpu = &pVM->aCpus[0]; /* for PIC we always deliver to CPU 0, MP use APIC */
67
68 LogFlow(("pdmR3PicHlp_ClearInterruptFF: caller='%s'/%d: VM_FF_INTERRUPT_PIC %d -> 0\n",
69 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VMCPU_FF_ISSET(pVCpu, VMCPU_FF_INTERRUPT_PIC)));
70
71 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_INTERRUPT_PIC);
72 REMR3NotifyInterruptClear(pVM, pVCpu);
73}
74
75
76/** @copydoc PDMPICHLPR3::pfnLock */
77static DECLCALLBACK(int) pdmR3PicHlp_Lock(PPDMDEVINS pDevIns, int rc)
78{
79 PDMDEV_ASSERT_DEVINS(pDevIns);
80 return pdmLockEx(pDevIns->Internal.s.pVMR3, rc);
81}
82
83
84/** @copydoc PDMPICHLPR3::pfnUnlock */
85static DECLCALLBACK(void) pdmR3PicHlp_Unlock(PPDMDEVINS pDevIns)
86{
87 PDMDEV_ASSERT_DEVINS(pDevIns);
88 pdmUnlock(pDevIns->Internal.s.pVMR3);
89}
90
91
92/** @copydoc PDMPICHLPR3::pfnGetRCHelpers */
93static DECLCALLBACK(PCPDMPICHLPRC) pdmR3PicHlp_GetRCHelpers(PPDMDEVINS pDevIns)
94{
95 PDMDEV_ASSERT_DEVINS(pDevIns);
96 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
97 RTRCPTR pRCHelpers = 0;
98 int rc = PDMR3LdrGetSymbolRC(pDevIns->Internal.s.pVMR3, NULL, "g_pdmRCPicHlp", &pRCHelpers);
99 AssertReleaseRC(rc);
100 AssertRelease(pRCHelpers);
101 LogFlow(("pdmR3PicHlp_GetRCHelpers: caller='%s'/%d: returns %RRv\n",
102 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pRCHelpers));
103 return pRCHelpers;
104}
105
106
107/** @copydoc PDMPICHLPR3::pfnGetR0Helpers */
108static DECLCALLBACK(PCPDMPICHLPR0) pdmR3PicHlp_GetR0Helpers(PPDMDEVINS pDevIns)
109{
110 PDMDEV_ASSERT_DEVINS(pDevIns);
111 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
112 PCPDMPICHLPR0 pR0Helpers = 0;
113 int rc = PDMR3LdrGetSymbolR0(pDevIns->Internal.s.pVMR3, NULL, "g_pdmR0PicHlp", &pR0Helpers);
114 AssertReleaseRC(rc);
115 AssertRelease(pR0Helpers);
116 LogFlow(("pdmR3PicHlp_GetR0Helpers: caller='%s'/%d: returns %RHv\n",
117 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pR0Helpers));
118 return pR0Helpers;
119}
120
121
122/**
123 * PIC Device Helpers.
124 */
125const PDMPICHLPR3 g_pdmR3DevPicHlp =
126{
127 PDM_PICHLPR3_VERSION,
128 pdmR3PicHlp_SetInterruptFF,
129 pdmR3PicHlp_ClearInterruptFF,
130 pdmR3PicHlp_Lock,
131 pdmR3PicHlp_Unlock,
132 pdmR3PicHlp_GetRCHelpers,
133 pdmR3PicHlp_GetR0Helpers,
134 PDM_PICHLPR3_VERSION /* the end */
135};
136
137/** @} */
138
139
140
141
142/** @name HC APIC Helpers
143 * @{
144 */
145
146/** @copydoc PDMAPICHLPR3::pfnSetInterruptFF */
147static DECLCALLBACK(void) pdmR3ApicHlp_SetInterruptFF(PPDMDEVINS pDevIns, PDMAPICIRQ enmType, VMCPUID idCpu)
148{
149 PDMDEV_ASSERT_DEVINS(pDevIns);
150 PVM pVM = pDevIns->Internal.s.pVMR3;
151 PVMCPU pVCpu = &pVM->aCpus[idCpu];
152
153 AssertReturnVoid(idCpu < pVM->cCPUs);
154
155 LogFlow(("pdmR3ApicHlp_SetInterruptFF: caller='%s'/%d: VM_FF_INTERRUPT(%d) %d -> 1\n",
156 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, idCpu, VMCPU_FF_ISSET(pVCpu, VMCPU_FF_INTERRUPT_APIC)));
157
158 switch (enmType)
159 {
160 case PDMAPICIRQ_HARDWARE:
161 VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_APIC);
162 break;
163 case PDMAPICIRQ_NMI:
164 VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_NMI);
165 break;
166 case PDMAPICIRQ_SMI:
167 VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_SMI);
168 break;
169 default:
170 AssertMsgFailed(("enmType=%d\n", enmType));
171 break;
172 }
173 REMR3NotifyInterruptSet(pVM, pVCpu);
174 VMR3NotifyCpuFFU(pVCpu->pUVCpu, VMNOTIFYFF_FLAGS_DONE_REM | VMNOTIFYFF_FLAGS_POKE);
175}
176
177
178/** @copydoc PDMAPICHLPR3::pfnClearInterruptFF */
179static DECLCALLBACK(void) pdmR3ApicHlp_ClearInterruptFF(PPDMDEVINS pDevIns, VMCPUID idCpu)
180{
181 PDMDEV_ASSERT_DEVINS(pDevIns);
182 PVM pVM = pDevIns->Internal.s.pVMR3;
183 PVMCPU pVCpu = &pVM->aCpus[idCpu];
184
185 AssertReturnVoid(idCpu < pVM->cCPUs);
186
187 LogFlow(("pdmR3ApicHlp_ClearInterruptFF: caller='%s'/%d: VM_FF_INTERRUPT(%d) %d -> 0\n",
188 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, idCpu, VMCPU_FF_ISSET(pVCpu, VMCPU_FF_INTERRUPT_APIC)));
189
190 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_INTERRUPT_APIC);
191 REMR3NotifyInterruptClear(pVM, pVCpu);
192}
193
194
195/** @copydoc PDMAPICHLPR3::pfnChangeFeature */
196static DECLCALLBACK(void) pdmR3ApicHlp_ChangeFeature(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion)
197{
198 PDMDEV_ASSERT_DEVINS(pDevIns);
199 LogFlow(("pdmR3ApicHlp_ChangeFeature: caller='%s'/%d: version=%d\n",
200 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, (int)enmVersion));
201 switch (enmVersion)
202 {
203 case PDMAPICVERSION_NONE:
204 CPUMClearGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_APIC);
205 CPUMClearGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_X2APIC);
206 break;
207 case PDMAPICVERSION_APIC:
208 CPUMSetGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_APIC);
209 CPUMClearGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_X2APIC);
210 break;
211 case PDMAPICVERSION_X2APIC:
212 CPUMSetGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_X2APIC);
213 CPUMSetGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_APIC);
214 break;
215 default:
216 AssertMsgFailed(("Unknown APIC version: %d\n", (int)enmVersion));
217 }
218}
219
220/** @copydoc PDMAPICHLPR3::pfnGetCpuId */
221static DECLCALLBACK(VMCPUID) pdmR3ApicHlp_GetCpuId(PPDMDEVINS pDevIns)
222{
223 PDMDEV_ASSERT_DEVINS(pDevIns);
224 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
225 return VMMGetCpuId(pDevIns->Internal.s.pVMR3);
226}
227
228
229/** @copydoc PDMAPICHLPR3::pfnSendSipi */
230static DECLCALLBACK(void) pdmR3ApicHlp_SendSipi(PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t uVector)
231{
232 PDMDEV_ASSERT_DEVINS(pDevIns);
233 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
234 VMMR3SendSipi(pDevIns->Internal.s.pVMR3, idCpu, uVector);
235}
236
237/** @copydoc PDMAPICHLPR3::pfnSendInitIpi */
238static DECLCALLBACK(void) pdmR3ApicHlp_SendInitIpi(PPDMDEVINS pDevIns, VMCPUID idCpu)
239{
240 PDMDEV_ASSERT_DEVINS(pDevIns);
241 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
242 VMMR3SendInitIpi(pDevIns->Internal.s.pVMR3, idCpu);
243}
244
245/** @copydoc PDMAPICHLPR3::pfnGetRCHelpers */
246static DECLCALLBACK(PCPDMAPICHLPRC) pdmR3ApicHlp_GetRCHelpers(PPDMDEVINS pDevIns)
247{
248 PDMDEV_ASSERT_DEVINS(pDevIns);
249 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
250 RTRCPTR pRCHelpers = 0;
251 int rc = PDMR3LdrGetSymbolRC(pDevIns->Internal.s.pVMR3, NULL, "g_pdmRCApicHlp", &pRCHelpers);
252 AssertReleaseRC(rc);
253 AssertRelease(pRCHelpers);
254 LogFlow(("pdmR3ApicHlp_GetRCHelpers: caller='%s'/%d: returns %RRv\n",
255 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pRCHelpers));
256 return pRCHelpers;
257}
258
259
260/** @copydoc PDMAPICHLPR3::pfnGetR0Helpers */
261static DECLCALLBACK(PCPDMAPICHLPR0) pdmR3ApicHlp_GetR0Helpers(PPDMDEVINS pDevIns)
262{
263 PDMDEV_ASSERT_DEVINS(pDevIns);
264 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
265 PCPDMAPICHLPR0 pR0Helpers = 0;
266 int rc = PDMR3LdrGetSymbolR0(pDevIns->Internal.s.pVMR3, NULL, "g_pdmR0ApicHlp", &pR0Helpers);
267 AssertReleaseRC(rc);
268 AssertRelease(pR0Helpers);
269 LogFlow(("pdmR3ApicHlp_GetR0Helpers: caller='%s'/%d: returns %RHv\n",
270 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pR0Helpers));
271 return pR0Helpers;
272}
273
274
275/** @copydoc PDMAPICHLPR3::pfnGetR3CritSect */
276static DECLCALLBACK(R3PTRTYPE(PPDMCRITSECT)) pdmR3ApicHlp_GetR3CritSect(PPDMDEVINS pDevIns)
277{
278 PDMDEV_ASSERT_DEVINS(pDevIns);
279 LogFlow(("pdmR3ApicHlp_Lock: caller='%s'/%d\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
280 return &pDevIns->Internal.s.pVMR3->pdm.s.CritSect;
281}
282
283
284/** @copydoc PDMAPICHLPR3::pfnGetRCCritSect */
285static DECLCALLBACK(RCPTRTYPE(PPDMCRITSECT)) pdmR3ApicHlp_GetRCCritSect(PPDMDEVINS pDevIns)
286{
287 PDMDEV_ASSERT_DEVINS(pDevIns);
288 PVM pVM = pDevIns->Internal.s.pVMR3;
289 RTRCPTR RCPtr = MMHyperCCToRC(pVM, &pVM->pdm.s.CritSect);
290 LogFlow(("pdmR3ApicHlp_GetR0CritSect: caller='%s'/%d: return %RRv\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, RCPtr));
291 return RCPtr;
292}
293
294
295/** @copydoc PDMAPICHLPR3::pfnGetR3CritSect */
296static DECLCALLBACK(R0PTRTYPE(PPDMCRITSECT)) pdmR3ApicHlp_GetR0CritSect(PPDMDEVINS pDevIns)
297{
298 PDMDEV_ASSERT_DEVINS(pDevIns);
299 PVM pVM = pDevIns->Internal.s.pVMR3;
300 RTR0PTR R0Ptr = MMHyperCCToR0(pVM, &pVM->pdm.s.CritSect);
301 LogFlow(("pdmR3ApicHlp_GetR0CritSect: caller='%s'/%d: return %RHv\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, R0Ptr));
302 return R0Ptr;
303}
304
305
306
307/**
308 * APIC Device Helpers.
309 */
310const PDMAPICHLPR3 g_pdmR3DevApicHlp =
311{
312 PDM_APICHLPR3_VERSION,
313 pdmR3ApicHlp_SetInterruptFF,
314 pdmR3ApicHlp_ClearInterruptFF,
315 pdmR3ApicHlp_ChangeFeature,
316 pdmR3ApicHlp_GetCpuId,
317 pdmR3ApicHlp_SendSipi,
318 pdmR3ApicHlp_SendInitIpi,
319 pdmR3ApicHlp_GetRCHelpers,
320 pdmR3ApicHlp_GetR0Helpers,
321 pdmR3ApicHlp_GetR3CritSect,
322 pdmR3ApicHlp_GetRCCritSect,
323 pdmR3ApicHlp_GetR0CritSect,
324 PDM_APICHLPR3_VERSION /* the end */
325};
326
327/** @} */
328
329
330
331
332/** @name HC I/O APIC Helpers
333 * @{
334 */
335
336/** @copydoc PDMIOAPICHLPR3::pfnApicBusDeliver */
337static DECLCALLBACK(int) pdmR3IoApicHlp_ApicBusDeliver(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
338 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode)
339{
340 PDMDEV_ASSERT_DEVINS(pDevIns);
341 PVM pVM = pDevIns->Internal.s.pVMR3;
342 LogFlow(("pdmR3IoApicHlp_ApicBusDeliver: caller='%s'/%d: u8Dest=%RX8 u8DestMode=%RX8 u8DeliveryMode=%RX8 iVector=%RX8 u8Polarity=%RX8 u8TriggerMode=%RX8\n",
343 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, u8Dest, u8DestMode, u8DeliveryMode, iVector, u8Polarity, u8TriggerMode));
344 if (pVM->pdm.s.Apic.pfnBusDeliverR3)
345 return pVM->pdm.s.Apic.pfnBusDeliverR3(pVM->pdm.s.Apic.pDevInsR3, u8Dest, u8DestMode, u8DeliveryMode, iVector, u8Polarity, u8TriggerMode);
346 return VINF_SUCCESS;
347}
348
349
350/** @copydoc PDMIOAPICHLPR3::pfnLock */
351static DECLCALLBACK(int) pdmR3IoApicHlp_Lock(PPDMDEVINS pDevIns, int rc)
352{
353 PDMDEV_ASSERT_DEVINS(pDevIns);
354 LogFlow(("pdmR3IoApicHlp_Lock: caller='%s'/%d: rc=%Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
355 return pdmLockEx(pDevIns->Internal.s.pVMR3, rc);
356}
357
358
359/** @copydoc PDMIOAPICHLPR3::pfnUnlock */
360static DECLCALLBACK(void) pdmR3IoApicHlp_Unlock(PPDMDEVINS pDevIns)
361{
362 PDMDEV_ASSERT_DEVINS(pDevIns);
363 LogFlow(("pdmR3IoApicHlp_Unlock: caller='%s'/%d:\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
364 pdmUnlock(pDevIns->Internal.s.pVMR3);
365}
366
367
368/** @copydoc PDMIOAPICHLPR3::pfnGetRCHelpers */
369static DECLCALLBACK(PCPDMIOAPICHLPRC) pdmR3IoApicHlp_GetRCHelpers(PPDMDEVINS pDevIns)
370{
371 PDMDEV_ASSERT_DEVINS(pDevIns);
372 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
373 RTRCPTR pRCHelpers = 0;
374 int rc = PDMR3LdrGetSymbolRC(pDevIns->Internal.s.pVMR3, NULL, "g_pdmRCIoApicHlp", &pRCHelpers);
375 AssertReleaseRC(rc);
376 AssertRelease(pRCHelpers);
377 LogFlow(("pdmR3IoApicHlp_GetRCHelpers: caller='%s'/%d: returns %RRv\n",
378 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pRCHelpers));
379 return pRCHelpers;
380}
381
382
383/** @copydoc PDMIOAPICHLPR3::pfnGetR0Helpers */
384static DECLCALLBACK(PCPDMIOAPICHLPR0) pdmR3IoApicHlp_GetR0Helpers(PPDMDEVINS pDevIns)
385{
386 PDMDEV_ASSERT_DEVINS(pDevIns);
387 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
388 PCPDMIOAPICHLPR0 pR0Helpers = 0;
389 int rc = PDMR3LdrGetSymbolR0(pDevIns->Internal.s.pVMR3, NULL, "g_pdmR0IoApicHlp", &pR0Helpers);
390 AssertReleaseRC(rc);
391 AssertRelease(pR0Helpers);
392 LogFlow(("pdmR3IoApicHlp_GetR0Helpers: caller='%s'/%d: returns %RHv\n",
393 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pR0Helpers));
394 return pR0Helpers;
395}
396
397
398/**
399 * I/O APIC Device Helpers.
400 */
401const PDMIOAPICHLPR3 g_pdmR3DevIoApicHlp =
402{
403 PDM_IOAPICHLPR3_VERSION,
404 pdmR3IoApicHlp_ApicBusDeliver,
405 pdmR3IoApicHlp_Lock,
406 pdmR3IoApicHlp_Unlock,
407 pdmR3IoApicHlp_GetRCHelpers,
408 pdmR3IoApicHlp_GetR0Helpers,
409 PDM_IOAPICHLPR3_VERSION /* the end */
410};
411
412/** @} */
413
414
415
416
417/** @name HC PCI Bus Helpers
418 * @{
419 */
420
421/** @copydoc PDMPCIHLPR3::pfnIsaSetIrq */
422static DECLCALLBACK(void) pdmR3PciHlp_IsaSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
423{
424 PDMDEV_ASSERT_DEVINS(pDevIns);
425 Log4(("pdmR3PciHlp_IsaSetIrq: iIrq=%d iLevel=%d\n", iIrq, iLevel));
426 PDMIsaSetIrq(pDevIns->Internal.s.pVMR3, iIrq, iLevel);
427}
428
429
430/** @copydoc PDMPCIHLPR3::pfnIoApicSetIrq */
431static DECLCALLBACK(void) pdmR3PciHlp_IoApicSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
432{
433 PDMDEV_ASSERT_DEVINS(pDevIns);
434 Log4(("pdmR3PciHlp_IsaSetIrq: iIrq=%d iLevel=%d\n", iIrq, iLevel));
435 PDMIoApicSetIrq(pDevIns->Internal.s.pVMR3, iIrq, iLevel);
436}
437
438
439/** @copydoc PDMPCIHLPR3::pfnIsMMIO2Base */
440static DECLCALLBACK(bool) pdmR3PciHlp_IsMMIO2Base(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys)
441{
442 PDMDEV_ASSERT_DEVINS(pDevIns);
443 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
444 bool fRc = PGMR3PhysMMIO2IsBase(pDevIns->Internal.s.pVMR3, pOwner, GCPhys);
445 Log4(("pdmR3PciHlp_IsMMIO2Base: pOwner=%p GCPhys=%RGp -> %RTbool\n", pOwner, GCPhys, fRc));
446 return fRc;
447}
448
449
450/** @copydoc PDMPCIHLPR3::pfnLock */
451static DECLCALLBACK(int) pdmR3PciHlp_Lock(PPDMDEVINS pDevIns, int rc)
452{
453 PDMDEV_ASSERT_DEVINS(pDevIns);
454 LogFlow(("pdmR3PciHlp_Lock: caller='%s'/%d: rc=%Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
455 return pdmLockEx(pDevIns->Internal.s.pVMR3, rc);
456}
457
458
459/** @copydoc PDMPCIHLPR3::pfnUnlock */
460static DECLCALLBACK(void) pdmR3PciHlp_Unlock(PPDMDEVINS pDevIns)
461{
462 PDMDEV_ASSERT_DEVINS(pDevIns);
463 LogFlow(("pdmR3PciHlp_Unlock: caller='%s'/%d:\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
464 pdmUnlock(pDevIns->Internal.s.pVMR3);
465}
466
467
468/** @copydoc PDMPCIHLPR3::pfnGetRCHelpers */
469static DECLCALLBACK(PCPDMPCIHLPRC) pdmR3PciHlp_GetRCHelpers(PPDMDEVINS pDevIns)
470{
471 PDMDEV_ASSERT_DEVINS(pDevIns);
472 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
473 RTRCPTR pRCHelpers = 0;
474 int rc = PDMR3LdrGetSymbolRC(pDevIns->Internal.s.pVMR3, NULL, "g_pdmRCPciHlp", &pRCHelpers);
475 AssertReleaseRC(rc);
476 AssertRelease(pRCHelpers);
477 LogFlow(("pdmR3IoApicHlp_GetGCHelpers: caller='%s'/%d: returns %RRv\n",
478 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pRCHelpers));
479 return pRCHelpers;
480}
481
482
483/** @copydoc PDMPCIHLPR3::pfnGetR0Helpers */
484static DECLCALLBACK(PCPDMPCIHLPR0) pdmR3PciHlp_GetR0Helpers(PPDMDEVINS pDevIns)
485{
486 PDMDEV_ASSERT_DEVINS(pDevIns);
487 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
488 PCPDMPCIHLPR0 pR0Helpers = 0;
489 int rc = PDMR3LdrGetSymbolR0(pDevIns->Internal.s.pVMR3, NULL, "g_pdmR0PciHlp", &pR0Helpers);
490 AssertReleaseRC(rc);
491 AssertRelease(pR0Helpers);
492 LogFlow(("pdmR3IoApicHlp_GetR0Helpers: caller='%s'/%d: returns %RHv\n",
493 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pR0Helpers));
494 return pR0Helpers;
495}
496
497
498/**
499 * PCI Bus Device Helpers.
500 */
501const PDMPCIHLPR3 g_pdmR3DevPciHlp =
502{
503 PDM_PCIHLPR3_VERSION,
504 pdmR3PciHlp_IsaSetIrq,
505 pdmR3PciHlp_IoApicSetIrq,
506 pdmR3PciHlp_IsMMIO2Base,
507 pdmR3PciHlp_GetRCHelpers,
508 pdmR3PciHlp_GetR0Helpers,
509 pdmR3PciHlp_Lock,
510 pdmR3PciHlp_Unlock,
511 PDM_PCIHLPR3_VERSION, /* the end */
512};
513
514/** @} */
515
516
517
518/* none yet */
519
520/**
521 * DMAC Device Helpers.
522 */
523const PDMDMACHLP g_pdmR3DevDmacHlp =
524{
525 PDM_DMACHLP_VERSION
526};
527
528
529
530
531/* none yet */
532
533/**
534 * RTC Device Helpers.
535 */
536const PDMRTCHLP g_pdmR3DevRtcHlp =
537{
538 PDM_RTCHLP_VERSION
539};
540
541
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