VirtualBox

source: vbox/trunk/src/VBox/VMM/PDMDevMiscHlp.cpp@ 19468

Last change on this file since 19468 was 19468, checked in by vboxsync, 16 years ago

VMM: better SIPI sending, reschedule to R3 as needed
  • Property svn:eol-style set to native
  • Property svn:keywords set to Id
File size: 15.8 KB
Line 
1/* $Id: PDMDevMiscHlp.cpp 19468 2009-05-07 09:03:15Z vboxsync $ */
2/** @file
3 * PDM - Pluggable Device and Driver Manager, Misc. Device Helpers.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22
23/*******************************************************************************
24* Header Files *
25*******************************************************************************/
26#define LOG_GROUP LOG_GROUP_PDM_DEVICE
27#include "PDMInternal.h"
28#include <VBox/pdm.h>
29#include <VBox/rem.h>
30#include <VBox/vm.h>
31#include <VBox/vmm.h>
32
33#include <VBox/log.h>
34#include <VBox/err.h>
35#include <iprt/asm.h>
36#include <iprt/assert.h>
37#include <iprt/thread.h>
38
39
40
41/** @name HC PIC Helpers
42 * @{
43 */
44
45/** @copydoc PDMPICHLPR3::pfnSetInterruptFF */
46static DECLCALLBACK(void) pdmR3PicHlp_SetInterruptFF(PPDMDEVINS pDevIns)
47{
48 PDMDEV_ASSERT_DEVINS(pDevIns);
49 PVM pVM = pDevIns->Internal.s.pVMR3;
50 PVMCPU pVCpu = &pVM->aCpus[0]; /* for PIC we always deliver to CPU 0, MP use APIC */
51
52 LogFlow(("pdmR3PicHlp_SetInterruptFF: caller='%s'/%d: VM_FF_INTERRUPT_PIC %d -> 1\n",
53 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VMCPU_FF_ISSET(pVCpu, VMCPU_FF_INTERRUPT_PIC)));
54
55 VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_PIC);
56 REMR3NotifyInterruptSet(pVM, pVCpu);
57 VMR3NotifyCpuFFU(pVCpu->pUVCpu, VMNOTIFYFF_FLAGS_DONE_REM | VMNOTIFYFF_FLAGS_POKE);
58}
59
60
61/** @copydoc PDMPICHLPR3::pfnClearInterruptFF */
62static DECLCALLBACK(void) pdmR3PicHlp_ClearInterruptFF(PPDMDEVINS pDevIns)
63{
64 PDMDEV_ASSERT_DEVINS(pDevIns);
65 PVM pVM = pDevIns->Internal.s.pVMR3;
66 PVMCPU pVCpu = &pVM->aCpus[0]; /* for PIC we always deliver to CPU 0, MP use APIC */
67
68 LogFlow(("pdmR3PicHlp_ClearInterruptFF: caller='%s'/%d: VM_FF_INTERRUPT_PIC %d -> 0\n",
69 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, VMCPU_FF_ISSET(pVCpu, VMCPU_FF_INTERRUPT_PIC)));
70
71 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_INTERRUPT_PIC);
72 REMR3NotifyInterruptClear(pVM, pVCpu);
73}
74
75
76/** @copydoc PDMPICHLPR3::pfnLock */
77static DECLCALLBACK(int) pdmR3PicHlp_Lock(PPDMDEVINS pDevIns, int rc)
78{
79 PDMDEV_ASSERT_DEVINS(pDevIns);
80 return pdmLockEx(pDevIns->Internal.s.pVMR3, rc);
81}
82
83
84/** @copydoc PDMPICHLPR3::pfnUnlock */
85static DECLCALLBACK(void) pdmR3PicHlp_Unlock(PPDMDEVINS pDevIns)
86{
87 PDMDEV_ASSERT_DEVINS(pDevIns);
88 pdmUnlock(pDevIns->Internal.s.pVMR3);
89}
90
91
92/** @copydoc PDMPICHLPR3::pfnGetRCHelpers */
93static DECLCALLBACK(PCPDMPICHLPRC) pdmR3PicHlp_GetRCHelpers(PPDMDEVINS pDevIns)
94{
95 PDMDEV_ASSERT_DEVINS(pDevIns);
96 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
97 RTRCPTR pRCHelpers = 0;
98 int rc = PDMR3LdrGetSymbolRC(pDevIns->Internal.s.pVMR3, NULL, "g_pdmRCPicHlp", &pRCHelpers);
99 AssertReleaseRC(rc);
100 AssertRelease(pRCHelpers);
101 LogFlow(("pdmR3PicHlp_GetRCHelpers: caller='%s'/%d: returns %RRv\n",
102 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pRCHelpers));
103 return pRCHelpers;
104}
105
106
107/** @copydoc PDMPICHLPR3::pfnGetR0Helpers */
108static DECLCALLBACK(PCPDMPICHLPR0) pdmR3PicHlp_GetR0Helpers(PPDMDEVINS pDevIns)
109{
110 PDMDEV_ASSERT_DEVINS(pDevIns);
111 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
112 PCPDMPICHLPR0 pR0Helpers = 0;
113 int rc = PDMR3LdrGetSymbolR0(pDevIns->Internal.s.pVMR3, NULL, "g_pdmR0PicHlp", &pR0Helpers);
114 AssertReleaseRC(rc);
115 AssertRelease(pR0Helpers);
116 LogFlow(("pdmR3PicHlp_GetR0Helpers: caller='%s'/%d: returns %RHv\n",
117 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pR0Helpers));
118 return pR0Helpers;
119}
120
121
122/**
123 * PIC Device Helpers.
124 */
125const PDMPICHLPR3 g_pdmR3DevPicHlp =
126{
127 PDM_PICHLPR3_VERSION,
128 pdmR3PicHlp_SetInterruptFF,
129 pdmR3PicHlp_ClearInterruptFF,
130 pdmR3PicHlp_Lock,
131 pdmR3PicHlp_Unlock,
132 pdmR3PicHlp_GetRCHelpers,
133 pdmR3PicHlp_GetR0Helpers,
134 PDM_PICHLPR3_VERSION /* the end */
135};
136
137/** @} */
138
139
140
141
142/** @name HC APIC Helpers
143 * @{
144 */
145
146/** @copydoc PDMAPICHLPR3::pfnSetInterruptFF */
147static DECLCALLBACK(void) pdmR3ApicHlp_SetInterruptFF(PPDMDEVINS pDevIns, VMCPUID idCpu)
148{
149 PDMDEV_ASSERT_DEVINS(pDevIns);
150 PVM pVM = pDevIns->Internal.s.pVMR3;
151 PVMCPU pVCpu = &pVM->aCpus[idCpu];
152
153 AssertReturnVoid(idCpu < pVM->cCPUs);
154
155 LogFlow(("pdmR3ApicHlp_SetInterruptFF: caller='%s'/%d: VM_FF_INTERRUPT(%d) %d -> 1\n",
156 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, idCpu, VMCPU_FF_ISSET(pVCpu, VMCPU_FF_INTERRUPT_APIC)));
157
158 VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_APIC);
159 REMR3NotifyInterruptSet(pVM, pVCpu);
160 VMR3NotifyCpuFFU(pVCpu->pUVCpu, VMNOTIFYFF_FLAGS_DONE_REM | VMNOTIFYFF_FLAGS_POKE);
161}
162
163
164/** @copydoc PDMAPICHLPR3::pfnClearInterruptFF */
165static DECLCALLBACK(void) pdmR3ApicHlp_ClearInterruptFF(PPDMDEVINS pDevIns, VMCPUID idCpu)
166{
167 PDMDEV_ASSERT_DEVINS(pDevIns);
168 PVM pVM = pDevIns->Internal.s.pVMR3;
169 PVMCPU pVCpu = &pVM->aCpus[idCpu];
170
171 AssertReturnVoid(idCpu < pVM->cCPUs);
172
173 LogFlow(("pdmR3ApicHlp_ClearInterruptFF: caller='%s'/%d: VM_FF_INTERRUPT(%d) %d -> 0\n",
174 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, idCpu, VMCPU_FF_ISSET(pVCpu, VMCPU_FF_INTERRUPT_APIC)));
175
176 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_INTERRUPT_APIC);
177 REMR3NotifyInterruptClear(pVM, pVCpu);
178}
179
180
181/** @copydoc PDMAPICHLPR3::pfnChangeFeature */
182static DECLCALLBACK(void) pdmR3ApicHlp_ChangeFeature(PPDMDEVINS pDevIns, PDMAPICVERSION enmVersion)
183{
184 PDMDEV_ASSERT_DEVINS(pDevIns);
185 LogFlow(("pdmR3ApicHlp_ChangeFeature: caller='%s'/%d: version=%d\n",
186 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, (int)enmVersion));
187 switch (enmVersion)
188 {
189 case PDMAPICVERSION_NONE:
190 CPUMClearGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_APIC);
191 CPUMClearGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_X2APIC);
192 break;
193 case PDMAPICVERSION_APIC:
194 CPUMSetGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_APIC);
195 CPUMClearGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_X2APIC);
196 break;
197 case PDMAPICVERSION_X2APIC:
198 CPUMSetGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_X2APIC);
199 CPUMSetGuestCpuIdFeature(pDevIns->Internal.s.pVMR3, CPUMCPUIDFEATURE_APIC);
200 break;
201 default:
202 AssertMsgFailed(("Unknown APIC version: %d\n", (int)enmVersion));
203 }
204}
205
206/** @copydoc PDMAPICHLPR3::pfnLock */
207static DECLCALLBACK(int) pdmR3ApicHlp_Lock(PPDMDEVINS pDevIns, int rc)
208{
209 PDMDEV_ASSERT_DEVINS(pDevIns);
210 LogFlow(("pdmR3ApicHlp_Lock: caller='%s'/%d: rc=%Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
211 return pdmLockEx(pDevIns->Internal.s.pVMR3, rc);
212}
213
214
215/** @copydoc PDMAPICHLPR3::pfnUnlock */
216static DECLCALLBACK(void) pdmR3ApicHlp_Unlock(PPDMDEVINS pDevIns)
217{
218 PDMDEV_ASSERT_DEVINS(pDevIns);
219 LogFlow(("pdmR3ApicHlp_Unlock: caller='%s'/%d:\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
220 pdmUnlock(pDevIns->Internal.s.pVMR3);
221}
222
223
224/** @copydoc PDMAPICHLPR3::pfnGetCpuId */
225static DECLCALLBACK(VMCPUID) pdmR3ApicHlp_GetCpuId(PPDMDEVINS pDevIns)
226{
227 PDMDEV_ASSERT_DEVINS(pDevIns);
228 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
229 return VMMGetCpuId(pDevIns->Internal.s.pVMR3);
230}
231
232
233/** @copydoc PDMAPICHLPR3::pfnSendSipi */
234static DECLCALLBACK(void) pdmR3ApicHlp_SendSipi(PPDMDEVINS pDevIns, VMCPUID idCpu, uint32_t uVector)
235{
236 PDMDEV_ASSERT_DEVINS(pDevIns);
237 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
238 VMMR3SendSipi(pDevIns->Internal.s.pVMR3, idCpu, uVector);
239}
240
241
242/** @copydoc PDMAPICHLPR3::pfnGetRCHelpers */
243static DECLCALLBACK(PCPDMAPICHLPRC) pdmR3ApicHlp_GetRCHelpers(PPDMDEVINS pDevIns)
244{
245 PDMDEV_ASSERT_DEVINS(pDevIns);
246 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
247 RTRCPTR pRCHelpers = 0;
248 int rc = PDMR3LdrGetSymbolRC(pDevIns->Internal.s.pVMR3, NULL, "g_pdmRCApicHlp", &pRCHelpers);
249 AssertReleaseRC(rc);
250 AssertRelease(pRCHelpers);
251 LogFlow(("pdmR3ApicHlp_GetRCHelpers: caller='%s'/%d: returns %RRv\n",
252 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pRCHelpers));
253 return pRCHelpers;
254}
255
256
257/** @copydoc PDMAPICHLPR3::pfnGetR0Helpers */
258static DECLCALLBACK(PCPDMAPICHLPR0) pdmR3ApicHlp_GetR0Helpers(PPDMDEVINS pDevIns)
259{
260 PDMDEV_ASSERT_DEVINS(pDevIns);
261 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
262 PCPDMAPICHLPR0 pR0Helpers = 0;
263 int rc = PDMR3LdrGetSymbolR0(pDevIns->Internal.s.pVMR3, NULL, "g_pdmR0ApicHlp", &pR0Helpers);
264 AssertReleaseRC(rc);
265 AssertRelease(pR0Helpers);
266 LogFlow(("pdmR3ApicHlp_GetR0Helpers: caller='%s'/%d: returns %RHv\n",
267 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pR0Helpers));
268 return pR0Helpers;
269}
270
271
272/**
273 * APIC Device Helpers.
274 */
275const PDMAPICHLPR3 g_pdmR3DevApicHlp =
276{
277 PDM_APICHLPR3_VERSION,
278 pdmR3ApicHlp_SetInterruptFF,
279 pdmR3ApicHlp_ClearInterruptFF,
280 pdmR3ApicHlp_ChangeFeature,
281 pdmR3ApicHlp_Lock,
282 pdmR3ApicHlp_Unlock,
283 pdmR3ApicHlp_GetCpuId,
284 pdmR3ApicHlp_SendSipi,
285 pdmR3ApicHlp_GetRCHelpers,
286 pdmR3ApicHlp_GetR0Helpers,
287 PDM_APICHLPR3_VERSION /* the end */
288};
289
290/** @} */
291
292
293
294
295/** @name HC I/O APIC Helpers
296 * @{
297 */
298
299/** @copydoc PDMIOAPICHLPR3::pfnApicBusDeliver */
300static DECLCALLBACK(void) pdmR3IoApicHlp_ApicBusDeliver(PPDMDEVINS pDevIns, uint8_t u8Dest, uint8_t u8DestMode, uint8_t u8DeliveryMode,
301 uint8_t iVector, uint8_t u8Polarity, uint8_t u8TriggerMode)
302{
303 PDMDEV_ASSERT_DEVINS(pDevIns);
304 PVM pVM = pDevIns->Internal.s.pVMR3;
305 LogFlow(("pdmR3IoApicHlp_ApicBusDeliver: caller='%s'/%d: u8Dest=%RX8 u8DestMode=%RX8 u8DeliveryMode=%RX8 iVector=%RX8 u8Polarity=%RX8 u8TriggerMode=%RX8\n",
306 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, u8Dest, u8DestMode, u8DeliveryMode, iVector, u8Polarity, u8TriggerMode));
307 if (pVM->pdm.s.Apic.pfnBusDeliverR3)
308 pVM->pdm.s.Apic.pfnBusDeliverR3(pVM->pdm.s.Apic.pDevInsR3, u8Dest, u8DestMode, u8DeliveryMode, iVector, u8Polarity, u8TriggerMode);
309}
310
311
312/** @copydoc PDMIOAPICHLPR3::pfnLock */
313static DECLCALLBACK(int) pdmR3IoApicHlp_Lock(PPDMDEVINS pDevIns, int rc)
314{
315 PDMDEV_ASSERT_DEVINS(pDevIns);
316 LogFlow(("pdmR3IoApicHlp_Lock: caller='%s'/%d: rc=%Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
317 return pdmLockEx(pDevIns->Internal.s.pVMR3, rc);
318}
319
320
321/** @copydoc PDMIOAPICHLPR3::pfnUnlock */
322static DECLCALLBACK(void) pdmR3IoApicHlp_Unlock(PPDMDEVINS pDevIns)
323{
324 PDMDEV_ASSERT_DEVINS(pDevIns);
325 LogFlow(("pdmR3IoApicHlp_Unlock: caller='%s'/%d:\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
326 pdmUnlock(pDevIns->Internal.s.pVMR3);
327}
328
329
330/** @copydoc PDMIOAPICHLPR3::pfnGetRCHelpers */
331static DECLCALLBACK(PCPDMIOAPICHLPRC) pdmR3IoApicHlp_GetRCHelpers(PPDMDEVINS pDevIns)
332{
333 PDMDEV_ASSERT_DEVINS(pDevIns);
334 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
335 RTRCPTR pRCHelpers = 0;
336 int rc = PDMR3LdrGetSymbolRC(pDevIns->Internal.s.pVMR3, NULL, "g_pdmRCIoApicHlp", &pRCHelpers);
337 AssertReleaseRC(rc);
338 AssertRelease(pRCHelpers);
339 LogFlow(("pdmR3IoApicHlp_GetRCHelpers: caller='%s'/%d: returns %RRv\n",
340 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pRCHelpers));
341 return pRCHelpers;
342}
343
344
345/** @copydoc PDMIOAPICHLPR3::pfnGetR0Helpers */
346static DECLCALLBACK(PCPDMIOAPICHLPR0) pdmR3IoApicHlp_GetR0Helpers(PPDMDEVINS pDevIns)
347{
348 PDMDEV_ASSERT_DEVINS(pDevIns);
349 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
350 PCPDMIOAPICHLPR0 pR0Helpers = 0;
351 int rc = PDMR3LdrGetSymbolR0(pDevIns->Internal.s.pVMR3, NULL, "g_pdmR0IoApicHlp", &pR0Helpers);
352 AssertReleaseRC(rc);
353 AssertRelease(pR0Helpers);
354 LogFlow(("pdmR3IoApicHlp_GetR0Helpers: caller='%s'/%d: returns %RHv\n",
355 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pR0Helpers));
356 return pR0Helpers;
357}
358
359
360/**
361 * I/O APIC Device Helpers.
362 */
363const PDMIOAPICHLPR3 g_pdmR3DevIoApicHlp =
364{
365 PDM_IOAPICHLPR3_VERSION,
366 pdmR3IoApicHlp_ApicBusDeliver,
367 pdmR3IoApicHlp_Lock,
368 pdmR3IoApicHlp_Unlock,
369 pdmR3IoApicHlp_GetRCHelpers,
370 pdmR3IoApicHlp_GetR0Helpers,
371 PDM_IOAPICHLPR3_VERSION /* the end */
372};
373
374/** @} */
375
376
377
378
379/** @name HC PCI Bus Helpers
380 * @{
381 */
382
383/** @copydoc PDMPCIHLPR3::pfnIsaSetIrq */
384static DECLCALLBACK(void) pdmR3PciHlp_IsaSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
385{
386 PDMDEV_ASSERT_DEVINS(pDevIns);
387 Log4(("pdmR3PciHlp_IsaSetIrq: iIrq=%d iLevel=%d\n", iIrq, iLevel));
388 PDMIsaSetIrq(pDevIns->Internal.s.pVMR3, iIrq, iLevel);
389}
390
391
392/** @copydoc PDMPCIHLPR3::pfnIoApicSetIrq */
393static DECLCALLBACK(void) pdmR3PciHlp_IoApicSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
394{
395 PDMDEV_ASSERT_DEVINS(pDevIns);
396 Log4(("pdmR3PciHlp_IsaSetIrq: iIrq=%d iLevel=%d\n", iIrq, iLevel));
397 PDMIoApicSetIrq(pDevIns->Internal.s.pVMR3, iIrq, iLevel);
398}
399
400
401/** @copydoc PDMPCIHLPR3::pfnIsMMIO2Base */
402static DECLCALLBACK(bool) pdmR3PciHlp_IsMMIO2Base(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys)
403{
404 PDMDEV_ASSERT_DEVINS(pDevIns);
405 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
406 bool fRc = PGMR3PhysMMIO2IsBase(pDevIns->Internal.s.pVMR3, pOwner, GCPhys);
407 Log4(("pdmR3PciHlp_IsMMIO2Base: pOwner=%p GCPhys=%RGp -> %RTbool\n", pOwner, GCPhys, fRc));
408 return fRc;
409}
410
411
412/** @copydoc PDMPCIHLPR3::pfnLock */
413static DECLCALLBACK(int) pdmR3PciHlp_Lock(PPDMDEVINS pDevIns, int rc)
414{
415 PDMDEV_ASSERT_DEVINS(pDevIns);
416 LogFlow(("pdmR3PciHlp_Lock: caller='%s'/%d: rc=%Rrc\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, rc));
417 return pdmLockEx(pDevIns->Internal.s.pVMR3, rc);
418}
419
420
421/** @copydoc PDMPCIHLPR3::pfnUnlock */
422static DECLCALLBACK(void) pdmR3PciHlp_Unlock(PPDMDEVINS pDevIns)
423{
424 PDMDEV_ASSERT_DEVINS(pDevIns);
425 LogFlow(("pdmR3PciHlp_Unlock: caller='%s'/%d:\n", pDevIns->pDevReg->szDeviceName, pDevIns->iInstance));
426 pdmUnlock(pDevIns->Internal.s.pVMR3);
427}
428
429
430/** @copydoc PDMPCIHLPR3::pfnGetRCHelpers */
431static DECLCALLBACK(PCPDMPCIHLPRC) pdmR3PciHlp_GetRCHelpers(PPDMDEVINS pDevIns)
432{
433 PDMDEV_ASSERT_DEVINS(pDevIns);
434 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
435 RTRCPTR pRCHelpers = 0;
436 int rc = PDMR3LdrGetSymbolRC(pDevIns->Internal.s.pVMR3, NULL, "g_pdmRCPciHlp", &pRCHelpers);
437 AssertReleaseRC(rc);
438 AssertRelease(pRCHelpers);
439 LogFlow(("pdmR3IoApicHlp_GetGCHelpers: caller='%s'/%d: returns %RRv\n",
440 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pRCHelpers));
441 return pRCHelpers;
442}
443
444
445/** @copydoc PDMPCIHLPR3::pfnGetR0Helpers */
446static DECLCALLBACK(PCPDMPCIHLPR0) pdmR3PciHlp_GetR0Helpers(PPDMDEVINS pDevIns)
447{
448 PDMDEV_ASSERT_DEVINS(pDevIns);
449 VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
450 PCPDMPCIHLPR0 pR0Helpers = 0;
451 int rc = PDMR3LdrGetSymbolR0(pDevIns->Internal.s.pVMR3, NULL, "g_pdmR0PciHlp", &pR0Helpers);
452 AssertReleaseRC(rc);
453 AssertRelease(pR0Helpers);
454 LogFlow(("pdmR3IoApicHlp_GetR0Helpers: caller='%s'/%d: returns %RHv\n",
455 pDevIns->pDevReg->szDeviceName, pDevIns->iInstance, pR0Helpers));
456 return pR0Helpers;
457}
458
459
460/**
461 * PCI Bus Device Helpers.
462 */
463const PDMPCIHLPR3 g_pdmR3DevPciHlp =
464{
465 PDM_PCIHLPR3_VERSION,
466 pdmR3PciHlp_IsaSetIrq,
467 pdmR3PciHlp_IoApicSetIrq,
468 pdmR3PciHlp_IsMMIO2Base,
469 pdmR3PciHlp_GetRCHelpers,
470 pdmR3PciHlp_GetR0Helpers,
471 pdmR3PciHlp_Lock,
472 pdmR3PciHlp_Unlock,
473 PDM_PCIHLPR3_VERSION, /* the end */
474};
475
476/** @} */
477
478
479
480/* none yet */
481
482/**
483 * DMAC Device Helpers.
484 */
485const PDMDMACHLP g_pdmR3DevDmacHlp =
486{
487 PDM_DMACHLP_VERSION
488};
489
490
491
492
493/* none yet */
494
495/**
496 * RTC Device Helpers.
497 */
498const PDMRTCHLP g_pdmR3DevRtcHlp =
499{
500 PDM_RTCHLP_VERSION
501};
502
503
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