PDMDevHlp.cpp@ 26944

Last change on this file since 26944 was 26939, checked in by vboxsync, 15 years ago
ACPI, APIC, HPET: emulate typical configuration wrt ISA interrupt routing
Property svn:eol-style set to `native` Property svn:keywords set to `Id`
File size: 129.4 KB

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1	/* $Id: PDMDevHlp.cpp 26939 2010-03-02 12:13:40Z vboxsync $ */
2	/** @file
3	* PDM - Pluggable Device and Driver Manager, Device Helpers.
4	*/
5
6	/*
7	* Copyright (C) 2006-2010 Sun Microsystems, Inc.
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18	* Clara, CA 95054 USA or visit http://www.sun.com if you need
19	* additional information or have any questions.
20	*/
21
22
23	/*******************************************************************************
24	* Header Files *
25	*******************************************************************************/
26	#define LOG_GROUP LOG_GROUP_PDM_DEVICE
27	#include "PDMInternal.h"
28	#include <VBox/pdm.h>
29	#include <VBox/mm.h>
30	#include <VBox/pgm.h>
31	#include <VBox/iom.h>
32	#include <VBox/rem.h>
33	#include <VBox/dbgf.h>
34	#include <VBox/vm.h>
35	#include <VBox/vmm.h>
36
37	#include <VBox/version.h>
38	#include <VBox/log.h>
39	#include <VBox/err.h>
40	#include <iprt/asm.h>
41	#include <iprt/assert.h>
42	#include <iprt/string.h>
43	#include <iprt/thread.h>
44
45
46	/*******************************************************************************
47	* Defined Constants And Macros *
48	*******************************************************************************/
49	/** @def PDM_DEVHLP_DEADLOCK_DETECTION
50	* Define this to enable the deadlock detection when accessing physical memory.
51	*/
52	#if /defined(DEBUG_bird) \|\|/ defined(DOXYGEN_RUNNING)
53	# define PDM_DEVHLP_DEADLOCK_DETECTION /*< @todo enable DevHlp deadlock detection! /
54	#endif
55
56
57	/*******************************************************************************
58	* Defined Constants And Macros *
59	*******************************************************************************/
60	/** @name R3 DevHlp
61	* @{
62	*/
63
64
65	/** @interface_method_impl{PDMDEVHLPR3,pfnIOPortRegister} */
66	static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTHCPTR pvUser, PFNIOMIOPORTOUT pfnOut, PFNIOMIOPORTIN pfnIn,
67	PFNIOMIOPORTOUTSTRING pfnOutStr, PFNIOMIOPORTINSTRING pfnInStr, const char *pszDesc)
68	{
69	PDMDEV_ASSERT_DEVINS(pDevIns);
70	LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pfnOut=%p pfnIn=%p pfnOutStr=%p pfnInStr=%p p32_tszDesc=%p:{%s}\n", pDevIns->pReg->szName, pDevIns->iInstance,
71	Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc, pszDesc));
72	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
73
74	#if 0 /** @todo needs a real string cache for this */
75	if (pDevIns->iInstance > 0)
76	{
77	char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
78	if (pszDesc2)
79	pszDesc = pszDesc2;
80	}
81	#endif
82
83	int rc = IOMR3IOPortRegisterR3(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, pfnOut, pfnIn, pfnOutStr, pfnInStr, pszDesc);
84
85	LogFlow(("pdmR3DevHlp_IOPortRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
86	return rc;
87	}
88
89
90	/** @interface_method_impl{PDMDEVHLPR3,pfnIOPortRegisterRC} */
91	static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterRC(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTRCPTR pvUser,
92	const char pszOut, const char pszIn,
93	const char pszOutStr, const char pszInStr, const char *pszDesc)
94	{
95	PDMDEV_ASSERT_DEVINS(pDevIns);
96	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
97	LogFlow(("pdmR3DevHlp_IOPortRegisterRC: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pReg->szName, pDevIns->iInstance,
98	Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
99
100	/*
101	* Resolve the functions (one of the can be NULL).
102	*/
103	int rc = VINF_SUCCESS;
104	if ( pDevIns->pReg->szRCMod[0]
105	&& (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC))
106	{
107	RTRCPTR RCPtrIn = NIL_RTRCPTR;
108	if (pszIn)
109	{
110	rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pReg->szRCMod, pszIn, &RCPtrIn);
111	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pReg->szRCMod, pszIn));
112	}
113	RTRCPTR RCPtrOut = NIL_RTRCPTR;
114	if (pszOut && RT_SUCCESS(rc))
115	{
116	rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pReg->szRCMod, pszOut, &RCPtrOut);
117	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pReg->szRCMod, pszOut));
118	}
119	RTRCPTR RCPtrInStr = NIL_RTRCPTR;
120	if (pszInStr && RT_SUCCESS(rc))
121	{
122	rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pReg->szRCMod, pszInStr, &RCPtrInStr);
123	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pReg->szRCMod, pszInStr));
124	}
125	RTRCPTR RCPtrOutStr = NIL_RTRCPTR;
126	if (pszOutStr && RT_SUCCESS(rc))
127	{
128	rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pReg->szRCMod, pszOutStr, &RCPtrOutStr);
129	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pReg->szRCMod, pszOutStr));
130	}
131
132	if (RT_SUCCESS(rc))
133	{
134	#if 0 /** @todo needs a real string cache for this */
135	if (pDevIns->iInstance > 0)
136	{
137	char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
138	if (pszDesc2)
139	pszDesc = pszDesc2;
140	}
141	#endif
142
143	rc = IOMR3IOPortRegisterRC(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, RCPtrOut, RCPtrIn, RCPtrOutStr, RCPtrInStr, pszDesc);
144	}
145	}
146	else
147	{
148	AssertMsgFailed(("No GC module for this driver!\n"));
149	rc = VERR_INVALID_PARAMETER;
150	}
151
152	LogFlow(("pdmR3DevHlp_IOPortRegisterRC: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
153	return rc;
154	}
155
156
157	/** @interface_method_impl{PDMDEVHLPR3,pfnIOPortRegisterR0} */
158	static DECLCALLBACK(int) pdmR3DevHlp_IOPortRegisterR0(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts, RTR0PTR pvUser,
159	const char pszOut, const char pszIn,
160	const char pszOutStr, const char pszInStr, const char *pszDesc)
161	{
162	PDMDEV_ASSERT_DEVINS(pDevIns);
163	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
164	LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: Port=%#x cPorts=%#x pvUser=%p pszOut=%p:{%s} pszIn=%p:{%s} pszOutStr=%p:{%s} pszInStr=%p:{%s} pszDesc=%p:{%s}\n", pDevIns->pReg->szName, pDevIns->iInstance,
165	Port, cPorts, pvUser, pszOut, pszOut, pszIn, pszIn, pszOutStr, pszOutStr, pszInStr, pszInStr, pszDesc, pszDesc));
166
167	/*
168	* Resolve the functions (one of the can be NULL).
169	*/
170	int rc = VINF_SUCCESS;
171	if ( pDevIns->pReg->szR0Mod[0]
172	&& (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0))
173	{
174	R0PTRTYPE(PFNIOMIOPORTIN) pfnR0PtrIn = 0;
175	if (pszIn)
176	{
177	rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pReg->szR0Mod, pszIn, &pfnR0PtrIn);
178	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszIn)\n", pDevIns->pReg->szR0Mod, pszIn));
179	}
180	R0PTRTYPE(PFNIOMIOPORTOUT) pfnR0PtrOut = 0;
181	if (pszOut && RT_SUCCESS(rc))
182	{
183	rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pReg->szR0Mod, pszOut, &pfnR0PtrOut);
184	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOut)\n", pDevIns->pReg->szR0Mod, pszOut));
185	}
186	R0PTRTYPE(PFNIOMIOPORTINSTRING) pfnR0PtrInStr = 0;
187	if (pszInStr && RT_SUCCESS(rc))
188	{
189	rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pReg->szR0Mod, pszInStr, &pfnR0PtrInStr);
190	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszInStr)\n", pDevIns->pReg->szR0Mod, pszInStr));
191	}
192	R0PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnR0PtrOutStr = 0;
193	if (pszOutStr && RT_SUCCESS(rc))
194	{
195	rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pReg->szR0Mod, pszOutStr, &pfnR0PtrOutStr);
196	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszOutStr)\n", pDevIns->pReg->szR0Mod, pszOutStr));
197	}
198
199	if (RT_SUCCESS(rc))
200	{
201	#if 0 /** @todo needs a real string cache for this */
202	if (pDevIns->iInstance > 0)
203	{
204	char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
205	if (pszDesc2)
206	pszDesc = pszDesc2;
207	}
208	#endif
209
210	rc = IOMR3IOPortRegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts, pvUser, pfnR0PtrOut, pfnR0PtrIn, pfnR0PtrOutStr, pfnR0PtrInStr, pszDesc);
211	}
212	}
213	else
214	{
215	AssertMsgFailed(("No R0 module for this driver!\n"));
216	rc = VERR_INVALID_PARAMETER;
217	}
218
219	LogFlow(("pdmR3DevHlp_IOPortRegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
220	return rc;
221	}
222
223
224	/** @interface_method_impl{PDMDEVHLPR3,pfnIOPortDeregister} */
225	static DECLCALLBACK(int) pdmR3DevHlp_IOPortDeregister(PPDMDEVINS pDevIns, RTIOPORT Port, RTUINT cPorts)
226	{
227	PDMDEV_ASSERT_DEVINS(pDevIns);
228	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
229	LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: Port=%#x cPorts=%#x\n", pDevIns->pReg->szName, pDevIns->iInstance,
230	Port, cPorts));
231
232	int rc = IOMR3IOPortDeregister(pDevIns->Internal.s.pVMR3, pDevIns, Port, cPorts);
233
234	LogFlow(("pdmR3DevHlp_IOPortDeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
235	return rc;
236	}
237
238
239	/** @interface_method_impl{PDMDEVHLPR3,pfnMMIORegister} */
240	static DECLCALLBACK(int) pdmR3DevHlp_MMIORegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
241	PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,
242	const char *pszDesc)
243	{
244	PDMDEV_ASSERT_DEVINS(pDevIns);
245	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
246	LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pfnWrite=%p pfnRead=%p pfnFill=%p pszDesc=%p:{%s}\n",
247	pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc, pszDesc));
248
249	/** @todo IOMR3MMIORegisterR3 mangles the description, move it here. */
250	int rc = IOMR3MMIORegisterR3(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, pfnWrite, pfnRead, pfnFill, pszDesc);
251
252	LogFlow(("pdmR3DevHlp_MMIORegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
253	return rc;
254	}
255
256
257	/** @interface_method_impl{PDMDEVHLPR3,pfnMMIORegisterRC} */
258	static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterRC(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
259	const char pszWrite, const char pszRead, const char *pszFill,
260	const char *pszDesc)
261	{
262	PDMDEV_ASSERT_DEVINS(pDevIns);
263	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
264	LogFlow(("pdmR3DevHlp_MMIORegisterRC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
265	pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
266
267	/** @todo pszDesc is unused here, drop it. */
268
269	/*
270	* Resolve the functions.
271	* Not all function have to present, leave it to IOM to enforce this.
272	*/
273	int rc = VINF_SUCCESS;
274	if ( pDevIns->pReg->szRCMod[0]
275	&& (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC))
276	{
277	RTRCPTR RCPtrWrite = NIL_RTRCPTR;
278	if (pszWrite)
279	rc = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pReg->szRCMod, pszWrite, &RCPtrWrite);
280
281	RTRCPTR RCPtrRead = NIL_RTRCPTR;
282	int rc2 = VINF_SUCCESS;
283	if (pszRead)
284	rc2 = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pReg->szRCMod, pszRead, &RCPtrRead);
285
286	RTRCPTR RCPtrFill = NIL_RTRCPTR;
287	int rc3 = VINF_SUCCESS;
288	if (pszFill)
289	rc3 = PDMR3LdrGetSymbolRCLazy(pDevIns->Internal.s.pVMR3, pDevIns->pReg->szRCMod, pszFill, &RCPtrFill);
290
291	if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
292	rc = IOMR3MMIORegisterRC(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, RCPtrWrite, RCPtrRead, RCPtrFill);
293	else
294	{
295	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pReg->szRCMod, pszWrite));
296	AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pReg->szRCMod, pszRead));
297	AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pReg->szRCMod, pszFill));
298	if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
299	rc = rc2;
300	if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
301	rc = rc3;
302	}
303	}
304	else
305	{
306	AssertMsgFailed(("No GC module for this driver!\n"));
307	rc = VERR_INVALID_PARAMETER;
308	}
309
310	LogFlow(("pdmR3DevHlp_MMIORegisterRC: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
311	return rc;
312	}
313
314	/** @interface_method_impl{PDMDEVHLPR3,pfnMMIORegisterR0} */
315	static DECLCALLBACK(int) pdmR3DevHlp_MMIORegisterR0(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
316	const char pszWrite, const char pszRead, const char *pszFill,
317	const char *pszDesc)
318	{
319	PDMDEV_ASSERT_DEVINS(pDevIns);
320	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
321	LogFlow(("pdmR3DevHlp_MMIORegisterHC: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvUser=%p pszWrite=%p:{%s} pszRead=%p:{%s} pszFill=%p:{%s}\n",
322	pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, pvUser, pszWrite, pszWrite, pszRead, pszRead, pszFill, pszFill));
323
324	/** @todo pszDesc is unused here, remove it. */
325
326	/*
327	* Resolve the functions.
328	* Not all function have to present, leave it to IOM to enforce this.
329	*/
330	int rc = VINF_SUCCESS;
331	if ( pDevIns->pReg->szR0Mod[0]
332	&& (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0))
333	{
334	R0PTRTYPE(PFNIOMMMIOWRITE) pfnR0PtrWrite = 0;
335	if (pszWrite)
336	rc = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pReg->szR0Mod, pszWrite, &pfnR0PtrWrite);
337	R0PTRTYPE(PFNIOMMMIOREAD) pfnR0PtrRead = 0;
338	int rc2 = VINF_SUCCESS;
339	if (pszRead)
340	rc2 = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pReg->szR0Mod, pszRead, &pfnR0PtrRead);
341	R0PTRTYPE(PFNIOMMMIOFILL) pfnR0PtrFill = 0;
342	int rc3 = VINF_SUCCESS;
343	if (pszFill)
344	rc3 = PDMR3LdrGetSymbolR0Lazy(pDevIns->Internal.s.pVMR3, pDevIns->pReg->szR0Mod, pszFill, &pfnR0PtrFill);
345	if (RT_SUCCESS(rc) && RT_SUCCESS(rc2) && RT_SUCCESS(rc3))
346	rc = IOMR3MMIORegisterR0(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvUser, pfnR0PtrWrite, pfnR0PtrRead, pfnR0PtrFill);
347	else
348	{
349	AssertMsgRC(rc, ("Failed to resolve %s.%s (pszWrite)\n", pDevIns->pReg->szR0Mod, pszWrite));
350	AssertMsgRC(rc2, ("Failed to resolve %s.%s (pszRead)\n", pDevIns->pReg->szR0Mod, pszRead));
351	AssertMsgRC(rc3, ("Failed to resolve %s.%s (pszFill)\n", pDevIns->pReg->szR0Mod, pszFill));
352	if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
353	rc = rc2;
354	if (RT_FAILURE(rc3) && RT_SUCCESS(rc))
355	rc = rc3;
356	}
357	}
358	else
359	{
360	AssertMsgFailed(("No R0 module for this driver!\n"));
361	rc = VERR_INVALID_PARAMETER;
362	}
363
364	LogFlow(("pdmR3DevHlp_MMIORegisterR0: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
365	return rc;
366	}
367
368
369	/** @interface_method_impl{PDMDEVHLPR3,pfnMMIODeregister} */
370	static DECLCALLBACK(int) pdmR3DevHlp_MMIODeregister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
371	{
372	PDMDEV_ASSERT_DEVINS(pDevIns);
373	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
374	LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x\n",
375	pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange));
376
377	int rc = IOMR3MMIODeregister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange);
378
379	LogFlow(("pdmR3DevHlp_MMIODeregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
380	return rc;
381	}
382
383
384	/**
385	* @copydoc PDMDEVHLPR3::pfnMMIO2Register
386	*/
387	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Register(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void *ppv, const char pszDesc)
388	{
389	PDMDEV_ASSERT_DEVINS(pDevIns);
390	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
391	LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: iRegion=%#x cb=%#RGp fFlags=%RX32 ppv=%p pszDescp=%p:{%s}\n",
392	pDevIns->pReg->szName, pDevIns->iInstance, iRegion, cb, fFlags, ppv, pszDesc, pszDesc));
393
394	/** @todo PGMR3PhysMMIO2Register mangles the description, move it here and
395	* use a real string cache. */
396	int rc = PGMR3PhysMMIO2Register(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, cb, fFlags, ppv, pszDesc);
397
398	LogFlow(("pdmR3DevHlp_MMIO2Register: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
399	return rc;
400	}
401
402
403	/**
404	* @copydoc PDMDEVHLPR3::pfnMMIO2Deregister
405	*/
406	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Deregister(PPDMDEVINS pDevIns, uint32_t iRegion)
407	{
408	PDMDEV_ASSERT_DEVINS(pDevIns);
409	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
410	LogFlow(("pdmR3DevHlp_MMIO2Deregister: caller='%s'/%d: iRegion=%#x\n",
411	pDevIns->pReg->szName, pDevIns->iInstance, iRegion));
412
413	AssertReturn(iRegion == UINT32_MAX, VERR_INVALID_PARAMETER);
414
415	int rc = PGMR3PhysMMIO2Deregister(pDevIns->Internal.s.pVMR3, pDevIns, iRegion);
416
417	LogFlow(("pdmR3DevHlp_MMIO2Deregister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
418	return rc;
419	}
420
421
422	/**
423	* @copydoc PDMDEVHLPR3::pfnMMIO2Map
424	*/
425	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Map(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
426	{
427	PDMDEV_ASSERT_DEVINS(pDevIns);
428	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
429	LogFlow(("pdmR3DevHlp_MMIO2Map: caller='%s'/%d: iRegion=%#x GCPhys=%#RGp\n",
430	pDevIns->pReg->szName, pDevIns->iInstance, iRegion, GCPhys));
431
432	int rc = PGMR3PhysMMIO2Map(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, GCPhys);
433
434	LogFlow(("pdmR3DevHlp_MMIO2Map: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
435	return rc;
436	}
437
438
439	/**
440	* @copydoc PDMDEVHLPR3::pfnMMIO2Unmap
441	*/
442	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2Unmap(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS GCPhys)
443	{
444	PDMDEV_ASSERT_DEVINS(pDevIns);
445	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
446	LogFlow(("pdmR3DevHlp_MMIO2Unmap: caller='%s'/%d: iRegion=%#x GCPhys=%#RGp\n",
447	pDevIns->pReg->szName, pDevIns->iInstance, iRegion, GCPhys));
448
449	int rc = PGMR3PhysMMIO2Unmap(pDevIns->Internal.s.pVMR3, pDevIns, iRegion, GCPhys);
450
451	LogFlow(("pdmR3DevHlp_MMIO2Unmap: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
452	return rc;
453	}
454
455
456	/**
457	* @copydoc PDMDEVHLPR3::pfnMMHyperMapMMIO2
458	*/
459	static DECLCALLBACK(int) pdmR3DevHlp_MMHyperMapMMIO2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
460	const char *pszDesc, PRTRCPTR pRCPtr)
461	{
462	PDMDEV_ASSERT_DEVINS(pDevIns);
463	PVM pVM = pDevIns->Internal.s.pVMR3;
464	VM_ASSERT_EMT(pVM);
465	LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: iRegion=%#x off=%RGp cb=%RGp pszDesc=%p:{%s} pRCPtr=%p\n",
466	pDevIns->pReg->szName, pDevIns->iInstance, iRegion, off, cb, pszDesc, pszDesc, pRCPtr));
467
468	if (pDevIns->iInstance > 0)
469	{
470	char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
471	if (pszDesc2)
472	pszDesc = pszDesc2;
473	}
474
475	int rc = MMR3HyperMapMMIO2(pVM, pDevIns, iRegion, off, cb, pszDesc, pRCPtr);
476
477	LogFlow(("pdmR3DevHlp_MMHyperMapMMIO2: caller='%s'/%d: returns %Rrc pRCPtr=%RRv\n", pDevIns->pReg->szName, pDevIns->iInstance, rc, pRCPtr));
478	return rc;
479	}
480
481
482	/**
483	* @copydoc PDMDEVHLPR3::pfnMMIO2MapKernel
484	*/
485	static DECLCALLBACK(int) pdmR3DevHlp_MMIO2MapKernel(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb,
486	const char *pszDesc, PRTR0PTR pR0Ptr)
487	{
488	PDMDEV_ASSERT_DEVINS(pDevIns);
489	PVM pVM = pDevIns->Internal.s.pVMR3;
490	VM_ASSERT_EMT(pVM);
491	LogFlow(("pdmR3DevHlp_MMIO2MapKernel: caller='%s'/%d: iRegion=%#x off=%RGp cb=%RGp pszDesc=%p:{%s} pR0Ptr=%p\n",
492	pDevIns->pReg->szName, pDevIns->iInstance, iRegion, off, cb, pszDesc, pszDesc, pR0Ptr));
493
494	if (pDevIns->iInstance > 0)
495	{
496	char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
497	if (pszDesc2)
498	pszDesc = pszDesc2;
499	}
500
501	int rc = PGMR3PhysMMIO2MapKernel(pVM, pDevIns, iRegion, off, cb, pszDesc, pR0Ptr);
502
503	LogFlow(("pdmR3DevHlp_MMIO2MapKernel: caller='%s'/%d: returns %Rrc pR0Ptr=%RHv\n", pDevIns->pReg->szName, pDevIns->iInstance, rc, pR0Ptr));
504	return rc;
505	}
506
507
508	/** @interface_method_impl{PDMDEVHLPR3,pfnROMRegister} */
509	static DECLCALLBACK(int) pdmR3DevHlp_ROMRegister(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, const void pvBinary, uint32_t fFlags, const char pszDesc)
510	{
511	PDMDEV_ASSERT_DEVINS(pDevIns);
512	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
513	LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x pvBinary=%p fFlags=%#RX32 pszDesc=%p:{%s}\n",
514	pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, pvBinary, fFlags, pszDesc, pszDesc));
515
516	/** @todo can we mangle pszDesc? */
517	int rc = PGMR3PhysRomRegister(pDevIns->Internal.s.pVMR3, pDevIns, GCPhysStart, cbRange, pvBinary, fFlags, pszDesc);
518
519	LogFlow(("pdmR3DevHlp_ROMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
520	return rc;
521	}
522
523
524	/** @interface_method_impl{PDMDEVHLPR3,pfnROMProtectShadow} */
525	static DECLCALLBACK(int) pdmR3DevHlp_ROMProtectShadow(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, PGMROMPROT enmProt)
526	{
527	PDMDEV_ASSERT_DEVINS(pDevIns);
528	LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: GCPhysStart=%RGp cbRange=%#x enmProt=%d\n",
529	pDevIns->pReg->szName, pDevIns->iInstance, GCPhysStart, cbRange, enmProt));
530
531	int rc = PGMR3PhysRomProtect(pDevIns->Internal.s.pVMR3, GCPhysStart, cbRange, enmProt);
532
533	LogFlow(("pdmR3DevHlp_ROMProtectShadow: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
534	return rc;
535	}
536
537
538	/** @interface_method_impl{PDMDEVHLPR3,pfnSSMRegister} */
539	static DECLCALLBACK(int) pdmR3DevHlp_SSMRegister(PPDMDEVINS pDevIns, uint32_t uVersion, size_t cbGuess, const char *pszBefore,
540	PFNSSMDEVLIVEPREP pfnLivePrep, PFNSSMDEVLIVEEXEC pfnLiveExec, PFNSSMDEVLIVEVOTE pfnLiveVote,
541	PFNSSMDEVSAVEPREP pfnSavePrep, PFNSSMDEVSAVEEXEC pfnSaveExec, PFNSSMDEVSAVEDONE pfnSaveDone,
542	PFNSSMDEVLOADPREP pfnLoadPrep, PFNSSMDEVLOADEXEC pfnLoadExec, PFNSSMDEVLOADDONE pfnLoadDone)
543	{
544	PDMDEV_ASSERT_DEVINS(pDevIns);
545	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
546	LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: uVersion=#x cbGuess=%#x pszBefore=%p:{%s}\n"
547	" pfnLivePrep=%p pfnLiveExec=%p pfnLiveVote=%p pfnSavePrep=%p pfnSaveExec=%p pfnSaveDone=%p pszLoadPrep=%p pfnLoadExec=%p pfnLoadDone=%p\n",
548	pDevIns->pReg->szName, pDevIns->iInstance, uVersion, cbGuess, pszBefore, pszBefore,
549	pfnLivePrep, pfnLiveExec, pfnLiveVote,
550	pfnSavePrep, pfnSaveExec, pfnSaveDone,
551	pfnLoadPrep, pfnLoadExec, pfnLoadDone));
552
553	int rc = SSMR3RegisterDevice(pDevIns->Internal.s.pVMR3, pDevIns, pDevIns->pReg->szName, pDevIns->iInstance,
554	uVersion, cbGuess, pszBefore,
555	pfnLivePrep, pfnLiveExec, pfnLiveVote,
556	pfnSavePrep, pfnSaveExec, pfnSaveDone,
557	pfnLoadPrep, pfnLoadExec, pfnLoadDone);
558
559	LogFlow(("pdmR3DevHlp_SSMRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
560	return rc;
561	}
562
563
564	/** @interface_method_impl{PDMDEVHLPR3,pfnTMTimerCreate} */
565	static DECLCALLBACK(int) pdmR3DevHlp_TMTimerCreate(PPDMDEVINS pDevIns, TMCLOCK enmClock, PFNTMTIMERDEV pfnCallback, void pvUser, uint32_t fFlags, const char pszDesc, PPTMTIMERR3 ppTimer)
566	{
567	PDMDEV_ASSERT_DEVINS(pDevIns);
568	PVM pVM = pDevIns->Internal.s.pVMR3;
569	VM_ASSERT_EMT(pVM);
570	LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: enmClock=%d pfnCallback=%p pvUser=%p fFlags=%#x pszDesc=%p:{%s} ppTimer=%p\n",
571	pDevIns->pReg->szName, pDevIns->iInstance, enmClock, pfnCallback, pvUser, fFlags, pszDesc, pszDesc, ppTimer));
572
573	if (pDevIns->iInstance > 0) /** @todo use a string cache here later. */
574	{
575	char *pszDesc2 = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s [%u]", pszDesc, pDevIns->iInstance);
576	if (pszDesc2)
577	pszDesc = pszDesc2;
578	}
579
580	int rc = TMR3TimerCreateDevice(pVM, pDevIns, enmClock, pfnCallback, pvUser, fFlags, pszDesc, ppTimer);
581
582	LogFlow(("pdmR3DevHlp_TMTimerCreate: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
583	return rc;
584	}
585
586
587	/** @interface_method_impl{PDMDEVHLPR3,pfnTMUtcNow} */
588	static DECLCALLBACK(PRTTIMESPEC) pdmR3DevHlp_TMUtcNow(PPDMDEVINS pDevIns, PRTTIMESPEC pTime)
589	{
590	PDMDEV_ASSERT_DEVINS(pDevIns);
591	LogFlow(("pdmR3DevHlp_TMUtcNow: caller='%s'/%d: pTime=%p\n",
592	pDevIns->pReg->szName, pDevIns->iInstance, pTime));
593
594	pTime = TMR3UtcNow(pDevIns->Internal.s.pVMR3, pTime);
595
596	LogFlow(("pdmR3DevHlp_TMUtcNow: caller='%s'/%d: returns %RU64\n", pDevIns->pReg->szName, pDevIns->iInstance, RTTimeSpecGetNano(pTime)));
597	return pTime;
598	}
599
600
601	/** @interface_method_impl{PDMDEVHLPR3,pfnPhysRead} */
602	static DECLCALLBACK(int) pdmR3DevHlp_PhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
603	{
604	PDMDEV_ASSERT_DEVINS(pDevIns);
605	PVM pVM = pDevIns->Internal.s.pVMR3;
606	LogFlow(("pdmR3DevHlp_PhysRead: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbRead=%#x\n",
607	pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, pvBuf, cbRead));
608
609	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
610	if (!VM_IS_EMT(pVM))
611	{
612	char szNames[128];
613	uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
614	AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
615	}
616	#endif
617
618	int rc;
619	if (VM_IS_EMT(pVM))
620	rc = PGMPhysRead(pVM, GCPhys, pvBuf, cbRead);
621	else
622	rc = PGMR3PhysReadExternal(pVM, GCPhys, pvBuf, cbRead);
623
624	Log(("pdmR3DevHlp_PhysRead: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
625	return rc;
626	}
627
628
629	/** @interface_method_impl{PDMDEVHLPR3,pfnPhysWrite} */
630	static DECLCALLBACK(int) pdmR3DevHlp_PhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
631	{
632	PDMDEV_ASSERT_DEVINS(pDevIns);
633	PVM pVM = pDevIns->Internal.s.pVMR3;
634	LogFlow(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: GCPhys=%RGp pvBuf=%p cbWrite=%#x\n",
635	pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, pvBuf, cbWrite));
636
637	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
638	if (!VM_IS_EMT(pVM))
639	{
640	char szNames[128];
641	uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
642	AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
643	}
644	#endif
645
646	int rc;
647	if (VM_IS_EMT(pVM))
648	rc = PGMPhysWrite(pVM, GCPhys, pvBuf, cbWrite);
649	else
650	rc = PGMR3PhysWriteExternal(pVM, GCPhys, pvBuf, cbWrite, pDevIns->pReg->szName);
651
652	Log(("pdmR3DevHlp_PhysWrite: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
653	return rc;
654	}
655
656
657	/** @interface_method_impl{PDMDEVHLPR3,pfnPhysGCPhys2CCPtr} */
658	static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPhys2CCPtr(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, void **ppv, PPGMPAGEMAPLOCK pLock)
659	{
660	PDMDEV_ASSERT_DEVINS(pDevIns);
661	PVM pVM = pDevIns->Internal.s.pVMR3;
662	LogFlow(("pdmR3DevHlp_PhysGCPhys2CCPtr: caller='%s'/%d: GCPhys=%RGp fFlags=%#x ppv=%p pLock=%p\n",
663	pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, fFlags, ppv, pLock));
664	AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
665
666	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
667	if (!VM_IS_EMT(pVM))
668	{
669	char szNames[128];
670	uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
671	AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
672	}
673	#endif
674
675	int rc = PGMR3PhysGCPhys2CCPtrExternal(pVM, GCPhys, ppv, pLock);
676
677	Log(("pdmR3DevHlp_PhysGCPhys2CCPtr: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
678	return rc;
679	}
680
681
682	/** @interface_method_impl{PDMDEVHLPR3,pfnPhysGCPhys2CCPtrReadOnly} */
683	static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t fFlags, const void **ppv, PPGMPAGEMAPLOCK pLock)
684	{
685	PDMDEV_ASSERT_DEVINS(pDevIns);
686	PVM pVM = pDevIns->Internal.s.pVMR3;
687	LogFlow(("pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly: caller='%s'/%d: GCPhys=%RGp fFlags=%#x ppv=%p pLock=%p\n",
688	pDevIns->pReg->szName, pDevIns->iInstance, GCPhys, fFlags, ppv, pLock));
689	AssertReturn(!fFlags, VERR_INVALID_PARAMETER);
690
691	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
692	if (!VM_IS_EMT(pVM))
693	{
694	char szNames[128];
695	uint32_t cLocks = PDMR3CritSectCountOwned(pVM, szNames, sizeof(szNames));
696	AssertMsg(cLocks == 0, ("cLocks=%u %s\n", cLocks, szNames));
697	}
698	#endif
699
700	int rc = PGMR3PhysGCPhys2CCPtrReadOnlyExternal(pVM, GCPhys, ppv, pLock);
701
702	Log(("pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
703	return rc;
704	}
705
706
707	/** @interface_method_impl{PDMDEVHLPR3,pfnPhysReleasePageMappingLock} */
708	static DECLCALLBACK(void) pdmR3DevHlp_PhysReleasePageMappingLock(PPDMDEVINS pDevIns, PPGMPAGEMAPLOCK pLock)
709	{
710	PDMDEV_ASSERT_DEVINS(pDevIns);
711	PVM pVM = pDevIns->Internal.s.pVMR3;
712	LogFlow(("pdmR3DevHlp_PhysReleasePageMappingLock: caller='%s'/%d: pLock=%p\n",
713	pDevIns->pReg->szName, pDevIns->iInstance, pLock));
714
715	PGMPhysReleasePageMappingLock(pVM, pLock);
716
717	Log(("pdmR3DevHlp_PhysReleasePageMappingLock: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
718	}
719
720
721	/** @interface_method_impl{PDMDEVHLPR3,pfnPhysReadGCVirt} */
722	static DECLCALLBACK(int) pdmR3DevHlp_PhysReadGCVirt(PPDMDEVINS pDevIns, void *pvDst, RTGCPTR GCVirtSrc, size_t cb)
723	{
724	PDMDEV_ASSERT_DEVINS(pDevIns);
725	PVM pVM = pDevIns->Internal.s.pVMR3;
726	VM_ASSERT_EMT(pVM);
727	LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: pvDst=%p GCVirt=%RGv cb=%#x\n",
728	pDevIns->pReg->szName, pDevIns->iInstance, pvDst, GCVirtSrc, cb));
729
730	PVMCPU pVCpu = VMMGetCpu(pVM);
731	if (!pVCpu)
732	return VERR_ACCESS_DENIED;
733	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
734	/** @todo SMP. */
735	#endif
736
737	int rc = PGMPhysSimpleReadGCPtr(pVCpu, pvDst, GCVirtSrc, cb);
738
739	LogFlow(("pdmR3DevHlp_PhysReadGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
740
741	return rc;
742	}
743
744
745	/** @interface_method_impl{PDMDEVHLPR3,pfnPhysWriteGCVirt} */
746	static DECLCALLBACK(int) pdmR3DevHlp_PhysWriteGCVirt(PPDMDEVINS pDevIns, RTGCPTR GCVirtDst, const void *pvSrc, size_t cb)
747	{
748	PDMDEV_ASSERT_DEVINS(pDevIns);
749	PVM pVM = pDevIns->Internal.s.pVMR3;
750	VM_ASSERT_EMT(pVM);
751	LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: GCVirtDst=%RGv pvSrc=%p cb=%#x\n",
752	pDevIns->pReg->szName, pDevIns->iInstance, GCVirtDst, pvSrc, cb));
753
754	PVMCPU pVCpu = VMMGetCpu(pVM);
755	if (!pVCpu)
756	return VERR_ACCESS_DENIED;
757	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
758	/** @todo SMP. */
759	#endif
760
761	int rc = PGMPhysSimpleWriteGCPtr(pVCpu, GCVirtDst, pvSrc, cb);
762
763	LogFlow(("pdmR3DevHlp_PhysWriteGCVirt: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
764
765	return rc;
766	}
767
768
769	/** @interface_method_impl{PDMDEVHLPR3,pfnPhysGCPtr2GCPhys} */
770	static DECLCALLBACK(int) pdmR3DevHlp_PhysGCPtr2GCPhys(PPDMDEVINS pDevIns, RTGCPTR GCPtr, PRTGCPHYS pGCPhys)
771	{
772	PDMDEV_ASSERT_DEVINS(pDevIns);
773	PVM pVM = pDevIns->Internal.s.pVMR3;
774	VM_ASSERT_EMT(pVM);
775	LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: GCPtr=%RGv pGCPhys=%p\n",
776	pDevIns->pReg->szName, pDevIns->iInstance, GCPtr, pGCPhys));
777
778	PVMCPU pVCpu = VMMGetCpu(pVM);
779	if (!pVCpu)
780	return VERR_ACCESS_DENIED;
781	#if defined(VBOX_STRICT) && defined(PDM_DEVHLP_DEADLOCK_DETECTION)
782	/** @todo SMP. */
783	#endif
784
785	int rc = PGMPhysGCPtr2GCPhys(pVCpu, GCPtr, pGCPhys);
786
787	LogFlow(("pdmR3DevHlp_PhysGCPtr2GCPhys: caller='%s'/%d: returns %Rrc pGCPhys=%RGp\n", pDevIns->pReg->szName, pDevIns->iInstance, rc, pGCPhys));
788
789	return rc;
790	}
791
792
793	/** @interface_method_impl{PDMDEVHLPR3,pfnMMHeapAlloc} */
794	static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAlloc(PPDMDEVINS pDevIns, size_t cb)
795	{
796	PDMDEV_ASSERT_DEVINS(pDevIns);
797	LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: cb=%#x\n", pDevIns->pReg->szName, pDevIns->iInstance, cb));
798
799	void *pv = MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
800
801	LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns %p\n", pDevIns->pReg->szName, pDevIns->iInstance, pv));
802	return pv;
803	}
804
805
806	/** @interface_method_impl{PDMDEVHLPR3,pfnMMHeapAllocZ} */
807	static DECLCALLBACK(void *) pdmR3DevHlp_MMHeapAllocZ(PPDMDEVINS pDevIns, size_t cb)
808	{
809	PDMDEV_ASSERT_DEVINS(pDevIns);
810	LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: cb=%#x\n", pDevIns->pReg->szName, pDevIns->iInstance, cb));
811
812	void *pv = MMR3HeapAllocZ(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE_USER, cb);
813
814	LogFlow(("pdmR3DevHlp_MMHeapAllocZ: caller='%s'/%d: returns %p\n", pDevIns->pReg->szName, pDevIns->iInstance, pv));
815	return pv;
816	}
817
818
819	/** @interface_method_impl{PDMDEVHLPR3,pfnMMHeapFree} */
820	static DECLCALLBACK(void) pdmR3DevHlp_MMHeapFree(PPDMDEVINS pDevIns, void *pv)
821	{
822	PDMDEV_ASSERT_DEVINS(pDevIns);
823	LogFlow(("pdmR3DevHlp_MMHeapFree: caller='%s'/%d: pv=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pv));
824
825	MMR3HeapFree(pv);
826
827	LogFlow(("pdmR3DevHlp_MMHeapAlloc: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
828	}
829
830
831	/** @interface_method_impl{PDMDEVHLPR3,pfnVMState} */
832	static DECLCALLBACK(VMSTATE) pdmR3DevHlp_VMState(PPDMDEVINS pDevIns)
833	{
834	PDMDEV_ASSERT_DEVINS(pDevIns);
835
836	VMSTATE enmVMState = VMR3GetState(pDevIns->Internal.s.pVMR3);
837
838	LogFlow(("pdmR3DevHlp_VMState: caller='%s'/%d: returns %d (%s)\n", pDevIns->pReg->szName, pDevIns->iInstance,
839	enmVMState, VMR3GetStateName(enmVMState)));
840	return enmVMState;
841	}
842
843
844	/** @interface_method_impl{PDMDEVHLPR3,pfnVMTeleportedAndNotFullyResumedYet} */
845	static DECLCALLBACK(bool) pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet(PPDMDEVINS pDevIns)
846	{
847	PDMDEV_ASSERT_DEVINS(pDevIns);
848
849	bool fRc = VMR3TeleportedAndNotFullyResumedYet(pDevIns->Internal.s.pVMR3);
850
851	LogFlow(("pdmR3DevHlp_VMState: caller='%s'/%d: returns %RTbool\n", pDevIns->pReg->szName, pDevIns->iInstance,
852	fRc));
853	return fRc;
854	}
855
856
857	/** @interface_method_impl{PDMDEVHLPR3,pfnVMSetError} */
858	static DECLCALLBACK(int) pdmR3DevHlp_VMSetError(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, ...)
859	{
860	PDMDEV_ASSERT_DEVINS(pDevIns);
861	va_list args;
862	va_start(args, pszFormat);
863	int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, args); Assert(rc2 == rc); NOREF(rc2);
864	va_end(args);
865	return rc;
866	}
867
868
869	/** @interface_method_impl{PDMDEVHLPR3,pfnVMSetErrorV} */
870	static DECLCALLBACK(int) pdmR3DevHlp_VMSetErrorV(PPDMDEVINS pDevIns, int rc, RT_SRC_POS_DECL, const char *pszFormat, va_list va)
871	{
872	PDMDEV_ASSERT_DEVINS(pDevIns);
873	int rc2 = VMSetErrorV(pDevIns->Internal.s.pVMR3, rc, RT_SRC_POS_ARGS, pszFormat, va); Assert(rc2 == rc); NOREF(rc2);
874	return rc;
875	}
876
877
878	/** @interface_method_impl{PDMDEVHLPR3,pfnVMSetRuntimeError} */
879	static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeError(PPDMDEVINS pDevIns, uint32_t fFlags, const char pszErrorId, const char pszFormat, ...)
880	{
881	PDMDEV_ASSERT_DEVINS(pDevIns);
882	va_list args;
883	va_start(args, pszFormat);
884	int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFlags, pszErrorId, pszFormat, args);
885	va_end(args);
886	return rc;
887	}
888
889
890	/** @interface_method_impl{PDMDEVHLPR3,pfnVMSetRuntimeErrorV} */
891	static DECLCALLBACK(int) pdmR3DevHlp_VMSetRuntimeErrorV(PPDMDEVINS pDevIns, uint32_t fFlags, const char pszErrorId, const char pszFormat, va_list va)
892	{
893	PDMDEV_ASSERT_DEVINS(pDevIns);
894	int rc = VMSetRuntimeErrorV(pDevIns->Internal.s.pVMR3, fFlags, pszErrorId, pszFormat, va);
895	return rc;
896	}
897
898
899	/** @interface_method_impl{PDMDEVHLPR3,pfnDBGFStopV} */
900	static DECLCALLBACK(int) pdmR3DevHlp_DBGFStopV(PPDMDEVINS pDevIns, const char pszFile, unsigned iLine, const char pszFunction, const char *pszFormat, va_list args)
901	{
902	PDMDEV_ASSERT_DEVINS(pDevIns);
903	#ifdef LOG_ENABLED
904	va_list va2;
905	va_copy(va2, args);
906	LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: pszFile=%p:{%s} iLine=%d pszFunction=%p:{%s} pszFormat=%p:{%s} (%N)\n",
907	pDevIns->pReg->szName, pDevIns->iInstance, pszFile, pszFile, iLine, pszFunction, pszFunction, pszFormat, pszFormat, pszFormat, &va2));
908	va_end(va2);
909	#endif
910
911	PVM pVM = pDevIns->Internal.s.pVMR3;
912	VM_ASSERT_EMT(pVM);
913	int rc = DBGFR3EventSrcV(pVM, DBGFEVENT_DEV_STOP, pszFile, iLine, pszFunction, pszFormat, args);
914	if (rc == VERR_DBGF_NOT_ATTACHED)
915	rc = VINF_SUCCESS;
916
917	LogFlow(("pdmR3DevHlp_DBGFStopV: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
918	return rc;
919	}
920
921
922	/** @interface_method_impl{PDMDEVHLPR3,pfnDBGFInfoRegister} */
923	static DECLCALLBACK(int) pdmR3DevHlp_DBGFInfoRegister(PPDMDEVINS pDevIns, const char pszName, const char pszDesc, PFNDBGFHANDLERDEV pfnHandler)
924	{
925	PDMDEV_ASSERT_DEVINS(pDevIns);
926	LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: pszName=%p:{%s} pszDesc=%p:{%s} pfnHandler=%p\n",
927	pDevIns->pReg->szName, pDevIns->iInstance, pszName, pszName, pszDesc, pszDesc, pfnHandler));
928
929	PVM pVM = pDevIns->Internal.s.pVMR3;
930	VM_ASSERT_EMT(pVM);
931	int rc = DBGFR3InfoRegisterDevice(pVM, pszName, pszDesc, pfnHandler, pDevIns);
932
933	LogFlow(("pdmR3DevHlp_DBGFInfoRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
934	return rc;
935	}
936
937
938	/** @interface_method_impl{PDMDEVHLPR3,pfnSTAMRegister} */
939	static DECLCALLBACK(void) pdmR3DevHlp_STAMRegister(PPDMDEVINS pDevIns, void pvSample, STAMTYPE enmType, const char pszName, STAMUNIT enmUnit, const char *pszDesc)
940	{
941	PDMDEV_ASSERT_DEVINS(pDevIns);
942	PVM pVM = pDevIns->Internal.s.pVMR3;
943	VM_ASSERT_EMT(pVM);
944
945	STAM_REG(pVM, pvSample, enmType, pszName, enmUnit, pszDesc);
946	NOREF(pVM);
947	}
948
949
950
951	/** @interface_method_impl{PDMDEVHLPR3,pfnSTAMRegisterF} */
952	static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterF(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
953	STAMUNIT enmUnit, const char pszDesc, const char pszName, ...)
954	{
955	PDMDEV_ASSERT_DEVINS(pDevIns);
956	PVM pVM = pDevIns->Internal.s.pVMR3;
957	VM_ASSERT_EMT(pVM);
958
959	va_list args;
960	va_start(args, pszName);
961	int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
962	va_end(args);
963	AssertRC(rc);
964
965	NOREF(pVM);
966	}
967
968
969	/** @interface_method_impl{PDMDEVHLPR3,pfnSTAMRegisterV} */
970	static DECLCALLBACK(void) pdmR3DevHlp_STAMRegisterV(PPDMDEVINS pDevIns, void *pvSample, STAMTYPE enmType, STAMVISIBILITY enmVisibility,
971	STAMUNIT enmUnit, const char pszDesc, const char pszName, va_list args)
972	{
973	PDMDEV_ASSERT_DEVINS(pDevIns);
974	PVM pVM = pDevIns->Internal.s.pVMR3;
975	VM_ASSERT_EMT(pVM);
976
977	int rc = STAMR3RegisterV(pVM, pvSample, enmType, enmVisibility, enmUnit, pszDesc, pszName, args);
978	AssertRC(rc);
979
980	NOREF(pVM);
981	}
982
983
984	/** @interface_method_impl{PDMDEVHLPR3,pfnPCIRegister} */
985	static DECLCALLBACK(int) pdmR3DevHlp_PCIRegister(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev)
986	{
987	PDMDEV_ASSERT_DEVINS(pDevIns);
988	PVM pVM = pDevIns->Internal.s.pVMR3;
989	VM_ASSERT_EMT(pVM);
990	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: pPciDev=%p:{.config={%#.256Rhxs}\n",
991	pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pPciDev->config));
992
993	/*
994	* Validate input.
995	*/
996	if (!pPciDev)
997	{
998	Assert(pPciDev);
999	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (pPciDev)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1000	return VERR_INVALID_PARAMETER;
1001	}
1002	if (!pPciDev->config[0] && !pPciDev->config[1])
1003	{
1004	Assert(pPciDev->config[0] \|\| pPciDev->config[1]);
1005	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (vendor)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1006	return VERR_INVALID_PARAMETER;
1007	}
1008	if (pDevIns->Internal.s.pPciDeviceR3)
1009	{
1010	/** @todo the PCI device vs. PDM device designed is a bit flawed if we have to
1011	* support a PDM device with multiple PCI devices. This might become a problem
1012	* when upgrading the chipset for instance because of multiple functions in some
1013	* devices...
1014	*/
1015	AssertMsgFailed(("Only one PCI device per device is currently implemented!\n"));
1016	return VERR_INTERNAL_ERROR;
1017	}
1018
1019	/*
1020	* Choose the PCI bus for the device.
1021	*
1022	* This is simple. If the device was configured for a particular bus, the PCIBusNo
1023	* configuration value will be set. If not the default bus is 0.
1024	*/
1025	int rc;
1026	PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
1027	if (!pBus)
1028	{
1029	uint8_t u8Bus;
1030	rc = CFGMR3QueryU8Def(pDevIns->Internal.s.pCfgHandle, "PCIBusNo", &u8Bus, 0);
1031	AssertLogRelMsgRCReturn(rc, ("Configuration error: PCIBusNo query failed with rc=%Rrc (%s/%d)\n",
1032	rc, pDevIns->pReg->szName, pDevIns->iInstance), rc);
1033	AssertLogRelMsgReturn(u8Bus < RT_ELEMENTS(pVM->pdm.s.aPciBuses),
1034	("Configuration error: PCIBusNo=%d, max is %d. (%s/%d)\n", u8Bus,
1035	RT_ELEMENTS(pVM->pdm.s.aPciBuses), pDevIns->pReg->szName, pDevIns->iInstance),
1036	VERR_PDM_NO_PCI_BUS);
1037	pBus = pDevIns->Internal.s.pPciBusR3 = &pVM->pdm.s.aPciBuses[u8Bus];
1038	}
1039	if (pBus->pDevInsR3)
1040	{
1041	if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)
1042	pDevIns->Internal.s.pPciBusR0 = MMHyperR3ToR0(pVM, pDevIns->Internal.s.pPciBusR3);
1043	else
1044	pDevIns->Internal.s.pPciBusR0 = NIL_RTR0PTR;
1045
1046	if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)
1047	pDevIns->Internal.s.pPciBusRC = MMHyperR3ToRC(pVM, pDevIns->Internal.s.pPciBusR3);
1048	else
1049	pDevIns->Internal.s.pPciBusRC = NIL_RTRCPTR;
1050
1051	/*
1052	* Check the configuration for PCI device and function assignment.
1053	*/
1054	int iDev = -1;
1055	uint8_t u8Device;
1056	rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIDeviceNo", &u8Device);
1057	if (RT_SUCCESS(rc))
1058	{
1059	if (u8Device > 31)
1060	{
1061	AssertMsgFailed(("Configuration error: PCIDeviceNo=%d, max is 31. (%s/%d)\n",
1062	u8Device, pDevIns->pReg->szName, pDevIns->iInstance));
1063	return VERR_INTERNAL_ERROR;
1064	}
1065
1066	uint8_t u8Function;
1067	rc = CFGMR3QueryU8(pDevIns->Internal.s.pCfgHandle, "PCIFunctionNo", &u8Function);
1068	if (RT_FAILURE(rc))
1069	{
1070	AssertMsgFailed(("Configuration error: PCIDeviceNo, but PCIFunctionNo query failed with rc=%Rrc (%s/%d)\n",
1071	rc, pDevIns->pReg->szName, pDevIns->iInstance));
1072	return rc;
1073	}
1074	if (u8Function > 7)
1075	{
1076	AssertMsgFailed(("Configuration error: PCIFunctionNo=%d, max is 7. (%s/%d)\n",
1077	u8Function, pDevIns->pReg->szName, pDevIns->iInstance));
1078	return VERR_INTERNAL_ERROR;
1079	}
1080	iDev = (u8Device << 3) \| u8Function;
1081	}
1082	else if (rc != VERR_CFGM_VALUE_NOT_FOUND)
1083	{
1084	AssertMsgFailed(("Configuration error: PCIDeviceNo query failed with rc=%Rrc (%s/%d)\n",
1085	rc, pDevIns->pReg->szName, pDevIns->iInstance));
1086	return rc;
1087	}
1088
1089	/*
1090	* Call the pci bus device to do the actual registration.
1091	*/
1092	pdmLock(pVM);
1093	rc = pBus->pfnRegisterR3(pBus->pDevInsR3, pPciDev, pDevIns->pReg->szName, iDev);
1094	pdmUnlock(pVM);
1095	if (RT_SUCCESS(rc))
1096	{
1097	pPciDev->pDevIns = pDevIns;
1098
1099	pDevIns->Internal.s.pPciDeviceR3 = pPciDev;
1100	if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
1101	pDevIns->Internal.s.pPciDeviceR0 = MMHyperR3ToR0(pVM, pPciDev);
1102	else
1103	pDevIns->Internal.s.pPciDeviceR0 = NIL_RTR0PTR;
1104
1105	if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)
1106	pDevIns->Internal.s.pPciDeviceRC = MMHyperR3ToRC(pVM, pPciDev);
1107	else
1108	pDevIns->Internal.s.pPciDeviceRC = NIL_RTRCPTR;
1109
1110	Log(("PDM: Registered device '%s'/%d as PCI device %d on bus %d\n",
1111	pDevIns->pReg->szName, pDevIns->iInstance, pPciDev->devfn, pDevIns->Internal.s.pPciBusR3->iBus));
1112	}
1113	}
1114	else
1115	{
1116	AssertLogRelMsgFailed(("Configuration error: No PCI bus available. This could be related to init order too!\n"));
1117	rc = VERR_PDM_NO_PCI_BUS;
1118	}
1119
1120	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1121	return rc;
1122	}
1123
1124
1125	/** @interface_method_impl{PDMDEVHLPR3,pfnPCIIORegionRegister} */
1126	static DECLCALLBACK(int) pdmR3DevHlp_PCIIORegionRegister(PPDMDEVINS pDevIns, int iRegion, uint32_t cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
1127	{
1128	PDMDEV_ASSERT_DEVINS(pDevIns);
1129	PVM pVM = pDevIns->Internal.s.pVMR3;
1130	VM_ASSERT_EMT(pVM);
1131	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: iRegion=%d cbRegion=%#x enmType=%d pfnCallback=%p\n",
1132	pDevIns->pReg->szName, pDevIns->iInstance, iRegion, cbRegion, enmType, pfnCallback));
1133
1134	/*
1135	* Validate input.
1136	*/
1137	if (iRegion < 0 \|\| iRegion >= PCI_NUM_REGIONS)
1138	{
1139	Assert(iRegion >= 0 && iRegion < PCI_NUM_REGIONS);
1140	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (iRegion)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1141	return VERR_INVALID_PARAMETER;
1142	}
1143	switch (enmType)
1144	{
1145	case PCI_ADDRESS_SPACE_IO:
1146	/*
1147	* Sanity check: don't allow to register more than 32K of the PCI I/O space.
1148	*/
1149	AssertMsgReturn(cbRegion <= _32K,
1150	("caller='%s'/%d: %#x\n", pDevIns->pReg->szName, pDevIns->iInstance, cbRegion),
1151	VERR_INVALID_PARAMETER);
1152	break;
1153
1154	case PCI_ADDRESS_SPACE_MEM:
1155	case PCI_ADDRESS_SPACE_MEM_PREFETCH:
1156	/*
1157	* Sanity check: don't allow to register more than 512MB of the PCI MMIO space for
1158	* now. If this limit is increased beyond 2GB, adapt the aligned check below as well!
1159	*/
1160	AssertMsgReturn(cbRegion <= 512 * _1M,
1161	("caller='%s'/%d: %#x\n", pDevIns->pReg->szName, pDevIns->iInstance, cbRegion),
1162	VERR_INVALID_PARAMETER);
1163	break;
1164	default:
1165	AssertMsgFailed(("enmType=%#x is unknown\n", enmType));
1166	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (enmType)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1167	return VERR_INVALID_PARAMETER;
1168	}
1169	if (!pfnCallback)
1170	{
1171	Assert(pfnCallback);
1172	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (callback)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1173	return VERR_INVALID_PARAMETER;
1174	}
1175	AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
1176
1177	/*
1178	* Must have a PCI device registered!
1179	*/
1180	int rc;
1181	PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
1182	if (pPciDev)
1183	{
1184	/*
1185	* We're currently restricted to page aligned MMIO regions.
1186	*/
1187	if ( (enmType == PCI_ADDRESS_SPACE_MEM \|\| enmType == PCI_ADDRESS_SPACE_MEM_PREFETCH)
1188	&& cbRegion != RT_ALIGN_32(cbRegion, PAGE_SIZE))
1189	{
1190	Log(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: aligning cbRegion %#x -> %#x\n",
1191	pDevIns->pReg->szName, pDevIns->iInstance, cbRegion, RT_ALIGN_32(cbRegion, PAGE_SIZE)));
1192	cbRegion = RT_ALIGN_32(cbRegion, PAGE_SIZE);
1193	}
1194
1195	/*
1196	* For registering PCI MMIO memory or PCI I/O memory, the size of the region must be a power of 2!
1197	*/
1198	int iLastSet = ASMBitLastSetU32(cbRegion);
1199	Assert(iLastSet > 0);
1200	uint32_t cbRegionAligned = RT_BIT_32(iLastSet - 1);
1201	if (cbRegion > cbRegionAligned)
1202	cbRegion = cbRegionAligned * 2; /* round up */
1203
1204	PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
1205	Assert(pBus);
1206	pdmLock(pVM);
1207	rc = pBus->pfnIORegionRegisterR3(pBus->pDevInsR3, pPciDev, iRegion, cbRegion, enmType, pfnCallback);
1208	pdmUnlock(pVM);
1209	}
1210	else
1211	{
1212	AssertMsgFailed(("No PCI device registered!\n"));
1213	rc = VERR_PDM_NOT_PCI_DEVICE;
1214	}
1215
1216	LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1217	return rc;
1218	}
1219
1220
1221	/** @interface_method_impl{PDMDEVHLPR3,pfnPCISetConfigCallbacks} */
1222	static DECLCALLBACK(void) pdmR3DevHlp_PCISetConfigCallbacks(PPDMDEVINS pDevIns, PPCIDEVICE pPciDev, PFNPCICONFIGREAD pfnRead, PPFNPCICONFIGREAD ppfnReadOld,
1223	PFNPCICONFIGWRITE pfnWrite, PPFNPCICONFIGWRITE ppfnWriteOld)
1224	{
1225	PDMDEV_ASSERT_DEVINS(pDevIns);
1226	PVM pVM = pDevIns->Internal.s.pVMR3;
1227	VM_ASSERT_EMT(pVM);
1228	LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: pPciDev=%p pfnRead=%p ppfnReadOld=%p pfnWrite=%p ppfnWriteOld=%p\n",
1229	pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld));
1230
1231	/*
1232	* Validate input and resolve defaults.
1233	*/
1234	AssertPtr(pfnRead);
1235	AssertPtr(pfnWrite);
1236	AssertPtrNull(ppfnReadOld);
1237	AssertPtrNull(ppfnWriteOld);
1238	AssertPtrNull(pPciDev);
1239
1240	if (!pPciDev)
1241	pPciDev = pDevIns->Internal.s.pPciDeviceR3;
1242	AssertReleaseMsg(pPciDev, ("You must register your device first!\n"));
1243	PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3;
1244	AssertRelease(pBus);
1245	AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
1246
1247	/*
1248	* Do the job.
1249	*/
1250	pdmLock(pVM);
1251	pBus->pfnSetConfigCallbacksR3(pBus->pDevInsR3, pPciDev, pfnRead, ppfnReadOld, pfnWrite, ppfnWriteOld);
1252	pdmUnlock(pVM);
1253
1254	LogFlow(("pdmR3DevHlp_PCISetConfigCallbacks: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
1255	}
1256
1257
1258	/** @interface_method_impl{PDMDEVHLPR3,pfnPCISetIrq} */
1259	static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1260	{
1261	PDMDEV_ASSERT_DEVINS(pDevIns);
1262	LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pReg->szName, pDevIns->iInstance, iIrq, iLevel));
1263
1264	/*
1265	* Validate input.
1266	*/
1267	/** @todo iIrq and iLevel checks. */
1268
1269	/*
1270	* Must have a PCI device registered!
1271	*/
1272	PPCIDEVICE pPciDev = pDevIns->Internal.s.pPciDeviceR3;
1273	if (pPciDev)
1274	{
1275	PPDMPCIBUS pBus = pDevIns->Internal.s.pPciBusR3; /** @todo the bus should be associated with the PCI device not the PDM device. */
1276	Assert(pBus);
1277	PVM pVM = pDevIns->Internal.s.pVMR3;
1278	pdmLock(pVM);
1279	pBus->pfnSetIrqR3(pBus->pDevInsR3, pPciDev, iIrq, iLevel);
1280	pdmUnlock(pVM);
1281	}
1282	else
1283	AssertReleaseMsgFailed(("No PCI device registered!\n"));
1284
1285	LogFlow(("pdmR3DevHlp_PCISetIrq: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
1286	}
1287
1288
1289	/** @interface_method_impl{PDMDEVHLPR3,pfnPCISetIrqNoWait} */
1290	static DECLCALLBACK(void) pdmR3DevHlp_PCISetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1291	{
1292	pdmR3DevHlp_PCISetIrq(pDevIns, iIrq, iLevel);
1293	}
1294
1295
1296	/** @interface_method_impl{PDMDEVHLPR3,pfnISASetIrq} */
1297	static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1298	{
1299	PDMDEV_ASSERT_DEVINS(pDevIns);
1300	LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: iIrq=%d iLevel=%d\n", pDevIns->pReg->szName, pDevIns->iInstance, iIrq, iLevel));
1301
1302	/*
1303	* Validate input.
1304	*/
1305	/** @todo iIrq and iLevel checks. */
1306
1307	PVM pVM = pDevIns->Internal.s.pVMR3;
1308	PDMIsaSetIrq(pVM, iIrq, iLevel, true); /* (The API takes the lock.) */
1309
1310	LogFlow(("pdmR3DevHlp_ISASetIrq: caller='%s'/%d: returns void\n", pDevIns->pReg->szName, pDevIns->iInstance));
1311	}
1312
1313
1314	/** @interface_method_impl{PDMDEVHLPR3,pfnISASetIrqNoWait} */
1315	static DECLCALLBACK(void) pdmR3DevHlp_ISASetIrqNoWait(PPDMDEVINS pDevIns, int iIrq, int iLevel)
1316	{
1317	pdmR3DevHlp_ISASetIrq(pDevIns, iIrq, iLevel);
1318	}
1319
1320
1321	/** @interface_method_impl{PDMDEVHLPR3,pfnDriverAttach} */
1322	static DECLCALLBACK(int) pdmR3DevHlp_DriverAttach(PPDMDEVINS pDevIns, RTUINT iLun, PPDMIBASE pBaseInterface, PPDMIBASE ppBaseInterface, const char pszDesc)
1323	{
1324	PDMDEV_ASSERT_DEVINS(pDevIns);
1325	PVM pVM = pDevIns->Internal.s.pVMR3;
1326	VM_ASSERT_EMT(pVM);
1327	LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: iLun=%d pBaseInterface=%p ppBaseInterface=%p pszDesc=%p:{%s}\n",
1328	pDevIns->pReg->szName, pDevIns->iInstance, iLun, pBaseInterface, ppBaseInterface, pszDesc, pszDesc));
1329
1330	/*
1331	* Lookup the LUN, it might already be registered.
1332	*/
1333	PPDMLUN pLunPrev = NULL;
1334	PPDMLUN pLun = pDevIns->Internal.s.pLunsR3;
1335	for (; pLun; pLunPrev = pLun, pLun = pLun->pNext)
1336	if (pLun->iLun == iLun)
1337	break;
1338
1339	/*
1340	* Create the LUN if if wasn't found, else check if driver is already attached to it.
1341	*/
1342	if (!pLun)
1343	{
1344	if ( !pBaseInterface
1345	\|\| !pszDesc
1346	\|\| !*pszDesc)
1347	{
1348	Assert(pBaseInterface);
1349	Assert(pszDesc \|\| *pszDesc);
1350	return VERR_INVALID_PARAMETER;
1351	}
1352
1353	pLun = (PPDMLUN)MMR3HeapAlloc(pVM, MM_TAG_PDM_LUN, sizeof(*pLun));
1354	if (!pLun)
1355	return VERR_NO_MEMORY;
1356
1357	pLun->iLun = iLun;
1358	pLun->pNext = pLunPrev ? pLunPrev->pNext : NULL;
1359	pLun->pTop = NULL;
1360	pLun->pBottom = NULL;
1361	pLun->pDevIns = pDevIns;
1362	pLun->pUsbIns = NULL;
1363	pLun->pszDesc = pszDesc;
1364	pLun->pBase = pBaseInterface;
1365	if (!pLunPrev)
1366	pDevIns->Internal.s.pLunsR3 = pLun;
1367	else
1368	pLunPrev->pNext = pLun;
1369	Log(("pdmR3DevHlp_DriverAttach: Registered LUN#%d '%s' with device '%s'/%d.\n",
1370	iLun, pszDesc, pDevIns->pReg->szName, pDevIns->iInstance));
1371	}
1372	else if (pLun->pTop)
1373	{
1374	AssertMsgFailed(("Already attached! The device should keep track of such things!\n"));
1375	LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_PDM_DRIVER_ALREADY_ATTACHED));
1376	return VERR_PDM_DRIVER_ALREADY_ATTACHED;
1377	}
1378	Assert(pLun->pBase == pBaseInterface);
1379
1380
1381	/*
1382	* Get the attached driver configuration.
1383	*/
1384	int rc;
1385	PCFGMNODE pNode = CFGMR3GetChildF(pDevIns->Internal.s.pCfgHandle, "LUN#%u", iLun);
1386	if (pNode)
1387	rc = pdmR3DrvInstantiate(pVM, pNode, pBaseInterface, NULL /pDrvAbove/, pLun, ppBaseInterface);
1388	else
1389	rc = VERR_PDM_NO_ATTACHED_DRIVER;
1390
1391
1392	LogFlow(("pdmR3DevHlp_DriverAttach: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1393	return rc;
1394	}
1395
1396
1397	/** @interface_method_impl{PDMDEVHLPR3,pfnQueueCreate} */
1398	static DECLCALLBACK(int) pdmR3DevHlp_QueueCreate(PPDMDEVINS pDevIns, RTUINT cbItem, RTUINT cItems, uint32_t cMilliesInterval,
1399	PFNPDMQUEUEDEV pfnCallback, bool fGCEnabled, const char pszName, PPDMQUEUE ppQueue)
1400	{
1401	PDMDEV_ASSERT_DEVINS(pDevIns);
1402	LogFlow(("pdmR3DevHlp_QueueCreate: caller='%s'/%d: cbItem=%#x cItems=%#x cMilliesInterval=%u pfnCallback=%p fGCEnabled=%RTbool pszName=%p:{%s} ppQueue=%p\n",
1403	pDevIns->pReg->szName, pDevIns->iInstance, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, pszName, pszName, ppQueue));
1404
1405	PVM pVM = pDevIns->Internal.s.pVMR3;
1406	VM_ASSERT_EMT(pVM);
1407
1408	if (pDevIns->iInstance > 0)
1409	{
1410	pszName = MMR3HeapAPrintf(pVM, MM_TAG_PDM_DEVICE_DESC, "%s_%u", pszName, pDevIns->iInstance);
1411	AssertLogRelReturn(pszName, VERR_NO_MEMORY);
1412	}
1413
1414	int rc = PDMR3QueueCreateDevice(pVM, pDevIns, cbItem, cItems, cMilliesInterval, pfnCallback, fGCEnabled, pszName, ppQueue);
1415
1416	LogFlow(("pdmR3DevHlp_QueueCreate: caller='%s'/%d: returns %Rrc ppQueue=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, rc, ppQueue));
1417	return rc;
1418	}
1419
1420
1421	/** @interface_method_impl{PDMDEVHLPR3,pfnCritSectInit} */
1422	static DECLCALLBACK(int) pdmR3DevHlp_CritSectInit(PPDMDEVINS pDevIns, PPDMCRITSECT pCritSect, RT_SRC_POS_DECL,
1423	const char *pszNameFmt, va_list va)
1424	{
1425	PDMDEV_ASSERT_DEVINS(pDevIns);
1426	LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: pCritSect=%p pszNameFmt=%p:{%s}\n",
1427	pDevIns->pReg->szName, pDevIns->iInstance, pCritSect, pszNameFmt, pszNameFmt));
1428
1429	PVM pVM = pDevIns->Internal.s.pVMR3;
1430	VM_ASSERT_EMT(pVM);
1431	int rc = pdmR3CritSectInitDevice(pVM, pDevIns, pCritSect, RT_SRC_POS_ARGS, pszNameFmt, va);
1432
1433	LogFlow(("pdmR3DevHlp_CritSectInit: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1434	return rc;
1435	}
1436
1437
1438	/** @interface_method_impl{PDMDEVHLPR3,pfnThreadCreate} */
1439	static DECLCALLBACK(int) pdmR3DevHlp_ThreadCreate(PPDMDEVINS pDevIns, PPPDMTHREAD ppThread, void *pvUser, PFNPDMTHREADDEV pfnThread,
1440	PFNPDMTHREADWAKEUPDEV pfnWakeup, size_t cbStack, RTTHREADTYPE enmType, const char *pszName)
1441	{
1442	PDMDEV_ASSERT_DEVINS(pDevIns);
1443	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1444	LogFlow(("pdmR3DevHlp_ThreadCreate: caller='%s'/%d: ppThread=%p pvUser=%p pfnThread=%p pfnWakeup=%p cbStack=%#zx enmType=%d pszName=%p:{%s}\n",
1445	pDevIns->pReg->szName, pDevIns->iInstance, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName, pszName));
1446
1447	int rc = pdmR3ThreadCreateDevice(pDevIns->Internal.s.pVMR3, pDevIns, ppThread, pvUser, pfnThread, pfnWakeup, cbStack, enmType, pszName);
1448
1449	LogFlow(("pdmR3DevHlp_ThreadCreate: caller='%s'/%d: returns %Rrc *ppThread=%RTthrd\n", pDevIns->pReg->szName, pDevIns->iInstance,
1450	rc, *ppThread));
1451	return rc;
1452	}
1453
1454
1455	/** @interface_method_impl{PDMDEVHLPR3,pfnSetAsyncNotification} */
1456	static DECLCALLBACK(int) pdmR3DevHlp_SetAsyncNotification(PPDMDEVINS pDevIns, PFNPDMDEVASYNCNOTIFY pfnAsyncNotify)
1457	{
1458	PDMDEV_ASSERT_DEVINS(pDevIns);
1459	VM_ASSERT_EMT0(pDevIns->Internal.s.pVMR3);
1460	LogFlow(("pdmR3DevHlp_SetAsyncNotification: caller='%s'/%d: pfnAsyncNotify=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pfnAsyncNotify));
1461
1462	int rc = VINF_SUCCESS;
1463	AssertStmt(pfnAsyncNotify, rc = VERR_INVALID_PARAMETER);
1464	AssertStmt(!pDevIns->Internal.s.pfnAsyncNotify, rc = VERR_WRONG_ORDER);
1465	AssertStmt(pDevIns->Internal.s.fIntFlags & (PDMDEVINSINT_FLAGS_SUSPENDED \| PDMDEVINSINT_FLAGS_RESET), rc = VERR_WRONG_ORDER);
1466	VMSTATE enmVMState = VMR3GetState(pDevIns->Internal.s.pVMR3);
1467	AssertStmt( enmVMState == VMSTATE_SUSPENDING
1468	\|\| enmVMState == VMSTATE_SUSPENDING_EXT_LS
1469	\|\| enmVMState == VMSTATE_SUSPENDING_LS
1470	\|\| enmVMState == VMSTATE_RESETTING
1471	\|\| enmVMState == VMSTATE_RESETTING_LS
1472	\|\| enmVMState == VMSTATE_POWERING_OFF
1473	\|\| enmVMState == VMSTATE_POWERING_OFF_LS,
1474	rc = VERR_INVALID_STATE);
1475
1476	if (RT_SUCCESS(rc))
1477	pDevIns->Internal.s.pfnAsyncNotify = pfnAsyncNotify;
1478
1479	LogFlow(("pdmR3DevHlp_SetAsyncNotification: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1480	return rc;
1481	}
1482
1483
1484	/** @interface_method_impl{PDMDEVHLPR3,pfnAsyncNotificationCompleted} */
1485	static DECLCALLBACK(void) pdmR3DevHlp_AsyncNotificationCompleted(PPDMDEVINS pDevIns)
1486	{
1487	PDMDEV_ASSERT_DEVINS(pDevIns);
1488	PVM pVM = pDevIns->Internal.s.pVMR3;
1489
1490	VMSTATE enmVMState = VMR3GetState(pVM);
1491	if ( enmVMState == VMSTATE_SUSPENDING
1492	\|\| enmVMState == VMSTATE_SUSPENDING_EXT_LS
1493	\|\| enmVMState == VMSTATE_SUSPENDING_LS
1494	\|\| enmVMState == VMSTATE_RESETTING
1495	\|\| enmVMState == VMSTATE_RESETTING_LS
1496	\|\| enmVMState == VMSTATE_POWERING_OFF
1497	\|\| enmVMState == VMSTATE_POWERING_OFF_LS)
1498	{
1499	LogFlow(("pdmR3DevHlp_AsyncNotificationCompleted: caller='%s'/%d:\n", pDevIns->pReg->szName, pDevIns->iInstance));
1500	VMR3AsyncPdmNotificationWakeupU(pVM->pUVM);
1501	}
1502	else
1503	LogFlow(("pdmR3DevHlp_AsyncNotificationCompleted: caller='%s'/%d: enmVMState=%d\n", pDevIns->pReg->szName, pDevIns->iInstance, enmVMState));
1504	}
1505
1506
1507	/** @interface_method_impl{PDMDEVHLPR3,pfnRTCRegister} */
1508	static DECLCALLBACK(int) pdmR3DevHlp_RTCRegister(PPDMDEVINS pDevIns, PCPDMRTCREG pRtcReg, PCPDMRTCHLP *ppRtcHlp)
1509	{
1510	PDMDEV_ASSERT_DEVINS(pDevIns);
1511	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1512	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: pRtcReg=%p:{.u32Version=%#x, .pfnWrite=%p, .pfnRead=%p} ppRtcHlp=%p\n",
1513	pDevIns->pReg->szName, pDevIns->iInstance, pRtcReg, pRtcReg->u32Version, pRtcReg->pfnWrite,
1514	pRtcReg->pfnWrite, ppRtcHlp));
1515
1516	/*
1517	* Validate input.
1518	*/
1519	if (pRtcReg->u32Version != PDM_RTCREG_VERSION)
1520	{
1521	AssertMsgFailed(("u32Version=%#x expected %#x\n", pRtcReg->u32Version,
1522	PDM_RTCREG_VERSION));
1523	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (version)\n",
1524	pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1525	return VERR_INVALID_PARAMETER;
1526	}
1527	if ( !pRtcReg->pfnWrite
1528	\|\| !pRtcReg->pfnRead)
1529	{
1530	Assert(pRtcReg->pfnWrite);
1531	Assert(pRtcReg->pfnRead);
1532	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
1533	pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1534	return VERR_INVALID_PARAMETER;
1535	}
1536
1537	if (!ppRtcHlp)
1538	{
1539	Assert(ppRtcHlp);
1540	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc (ppRtcHlp)\n",
1541	pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1542	return VERR_INVALID_PARAMETER;
1543	}
1544
1545	/*
1546	* Only one DMA device.
1547	*/
1548	PVM pVM = pDevIns->Internal.s.pVMR3;
1549	if (pVM->pdm.s.pRtc)
1550	{
1551	AssertMsgFailed(("Only one RTC device is supported!\n"));
1552	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
1553	pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1554	return VERR_INVALID_PARAMETER;
1555	}
1556
1557	/*
1558	* Allocate and initialize pci bus structure.
1559	*/
1560	int rc = VINF_SUCCESS;
1561	PPDMRTC pRtc = (PPDMRTC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pRtc));
1562	if (pRtc)
1563	{
1564	pRtc->pDevIns = pDevIns;
1565	pRtc->Reg = *pRtcReg;
1566	pVM->pdm.s.pRtc = pRtc;
1567
1568	/* set the helper pointer. */
1569	*ppRtcHlp = &g_pdmR3DevRtcHlp;
1570	Log(("PDM: Registered RTC device '%s'/%d pDevIns=%p\n",
1571	pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
1572	}
1573	else
1574	rc = VERR_NO_MEMORY;
1575
1576	LogFlow(("pdmR3DevHlp_RTCRegister: caller='%s'/%d: returns %Rrc\n",
1577	pDevIns->pReg->szName, pDevIns->iInstance, rc));
1578	return rc;
1579	}
1580
1581
1582	/** @interface_method_impl{PDMDEVHLPR3,pfnDMARegister} */
1583	static DECLCALLBACK(int) pdmR3DevHlp_DMARegister(PPDMDEVINS pDevIns, unsigned uChannel, PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
1584	{
1585	PDMDEV_ASSERT_DEVINS(pDevIns);
1586	PVM pVM = pDevIns->Internal.s.pVMR3;
1587	VM_ASSERT_EMT(pVM);
1588	LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: uChannel=%d pfnTransferHandler=%p pvUser=%p\n",
1589	pDevIns->pReg->szName, pDevIns->iInstance, uChannel, pfnTransferHandler, pvUser));
1590	int rc = VINF_SUCCESS;
1591	if (pVM->pdm.s.pDmac)
1592	pVM->pdm.s.pDmac->Reg.pfnRegister(pVM->pdm.s.pDmac->pDevIns, uChannel, pfnTransferHandler, pvUser);
1593	else
1594	{
1595	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1596	rc = VERR_PDM_NO_DMAC_INSTANCE;
1597	}
1598	LogFlow(("pdmR3DevHlp_DMARegister: caller='%s'/%d: returns %Rrc\n",
1599	pDevIns->pReg->szName, pDevIns->iInstance, rc));
1600	return rc;
1601	}
1602
1603
1604	/** @interface_method_impl{PDMDEVHLPR3,pfnDMAReadMemory} */
1605	static DECLCALLBACK(int) pdmR3DevHlp_DMAReadMemory(PPDMDEVINS pDevIns, unsigned uChannel, void pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t pcbRead)
1606	{
1607	PDMDEV_ASSERT_DEVINS(pDevIns);
1608	PVM pVM = pDevIns->Internal.s.pVMR3;
1609	VM_ASSERT_EMT(pVM);
1610	LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbRead=%p\n",
1611	pDevIns->pReg->szName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbRead));
1612	int rc = VINF_SUCCESS;
1613	if (pVM->pdm.s.pDmac)
1614	{
1615	uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnReadMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
1616	if (pcbRead)
1617	*pcbRead = cb;
1618	}
1619	else
1620	{
1621	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1622	rc = VERR_PDM_NO_DMAC_INSTANCE;
1623	}
1624	LogFlow(("pdmR3DevHlp_DMAReadMemory: caller='%s'/%d: returns %Rrc\n",
1625	pDevIns->pReg->szName, pDevIns->iInstance, rc));
1626	return rc;
1627	}
1628
1629
1630	/** @interface_method_impl{PDMDEVHLPR3,pfnDMAWriteMemory} */
1631	static DECLCALLBACK(int) pdmR3DevHlp_DMAWriteMemory(PPDMDEVINS pDevIns, unsigned uChannel, const void pvBuffer, uint32_t off, uint32_t cbBlock, uint32_t pcbWritten)
1632	{
1633	PDMDEV_ASSERT_DEVINS(pDevIns);
1634	PVM pVM = pDevIns->Internal.s.pVMR3;
1635	VM_ASSERT_EMT(pVM);
1636	LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: uChannel=%d pvBuffer=%p off=%#x cbBlock=%#x pcbWritten=%p\n",
1637	pDevIns->pReg->szName, pDevIns->iInstance, uChannel, pvBuffer, off, cbBlock, pcbWritten));
1638	int rc = VINF_SUCCESS;
1639	if (pVM->pdm.s.pDmac)
1640	{
1641	uint32_t cb = pVM->pdm.s.pDmac->Reg.pfnWriteMemory(pVM->pdm.s.pDmac->pDevIns, uChannel, pvBuffer, off, cbBlock);
1642	if (pcbWritten)
1643	*pcbWritten = cb;
1644	}
1645	else
1646	{
1647	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1648	rc = VERR_PDM_NO_DMAC_INSTANCE;
1649	}
1650	LogFlow(("pdmR3DevHlp_DMAWriteMemory: caller='%s'/%d: returns %Rrc\n",
1651	pDevIns->pReg->szName, pDevIns->iInstance, rc));
1652	return rc;
1653	}
1654
1655
1656	/** @interface_method_impl{PDMDEVHLPR3,pfnDMASetDREQ} */
1657	static DECLCALLBACK(int) pdmR3DevHlp_DMASetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
1658	{
1659	PDMDEV_ASSERT_DEVINS(pDevIns);
1660	PVM pVM = pDevIns->Internal.s.pVMR3;
1661	VM_ASSERT_EMT(pVM);
1662	LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: uChannel=%d uLevel=%d\n",
1663	pDevIns->pReg->szName, pDevIns->iInstance, uChannel, uLevel));
1664	int rc = VINF_SUCCESS;
1665	if (pVM->pdm.s.pDmac)
1666	pVM->pdm.s.pDmac->Reg.pfnSetDREQ(pVM->pdm.s.pDmac->pDevIns, uChannel, uLevel);
1667	else
1668	{
1669	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1670	rc = VERR_PDM_NO_DMAC_INSTANCE;
1671	}
1672	LogFlow(("pdmR3DevHlp_DMASetDREQ: caller='%s'/%d: returns %Rrc\n",
1673	pDevIns->pReg->szName, pDevIns->iInstance, rc));
1674	return rc;
1675	}
1676
1677	/** @interface_method_impl{PDMDEVHLPR3,pfnDMAGetChannelMode} */
1678	static DECLCALLBACK(uint8_t) pdmR3DevHlp_DMAGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
1679	{
1680	PDMDEV_ASSERT_DEVINS(pDevIns);
1681	PVM pVM = pDevIns->Internal.s.pVMR3;
1682	VM_ASSERT_EMT(pVM);
1683	LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: uChannel=%d\n",
1684	pDevIns->pReg->szName, pDevIns->iInstance, uChannel));
1685	uint8_t u8Mode;
1686	if (pVM->pdm.s.pDmac)
1687	u8Mode = pVM->pdm.s.pDmac->Reg.pfnGetChannelMode(pVM->pdm.s.pDmac->pDevIns, uChannel);
1688	else
1689	{
1690	AssertMsgFailed(("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1691	u8Mode = 3 << 2 /* illegal mode type */;
1692	}
1693	LogFlow(("pdmR3DevHlp_DMAGetChannelMode: caller='%s'/%d: returns %#04x\n",
1694	pDevIns->pReg->szName, pDevIns->iInstance, u8Mode));
1695	return u8Mode;
1696	}
1697
1698	/** @interface_method_impl{PDMDEVHLPR3,pfnDMASchedule} */
1699	static DECLCALLBACK(void) pdmR3DevHlp_DMASchedule(PPDMDEVINS pDevIns)
1700	{
1701	PDMDEV_ASSERT_DEVINS(pDevIns);
1702	PVM pVM = pDevIns->Internal.s.pVMR3;
1703	VM_ASSERT_EMT(pVM);
1704	LogFlow(("pdmR3DevHlp_DMASchedule: caller='%s'/%d: VM_FF_PDM_DMA %d -> 1\n",
1705	pDevIns->pReg->szName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_PDM_DMA)));
1706
1707	AssertMsg(pVM->pdm.s.pDmac, ("Configuration error: No DMAC controller available. This could be related to init order too!\n"));
1708	VM_FF_SET(pVM, VM_FF_PDM_DMA);
1709	REMR3NotifyDmaPending(pVM);
1710	VMR3NotifyGlobalFFU(pVM->pUVM, VMNOTIFYFF_FLAGS_DONE_REM);
1711	}
1712
1713
1714	/** @interface_method_impl{PDMDEVHLPR3,pfnCMOSWrite} */
1715	static DECLCALLBACK(int) pdmR3DevHlp_CMOSWrite(PPDMDEVINS pDevIns, unsigned iReg, uint8_t u8Value)
1716	{
1717	PDMDEV_ASSERT_DEVINS(pDevIns);
1718	PVM pVM = pDevIns->Internal.s.pVMR3;
1719	VM_ASSERT_EMT(pVM);
1720
1721	LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x u8Value=%#04x\n",
1722	pDevIns->pReg->szName, pDevIns->iInstance, iReg, u8Value));
1723	int rc;
1724	if (pVM->pdm.s.pRtc)
1725	rc = pVM->pdm.s.pRtc->Reg.pfnWrite(pVM->pdm.s.pRtc->pDevIns, iReg, u8Value);
1726	else
1727	rc = VERR_PDM_NO_RTC_INSTANCE;
1728
1729	LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
1730	pDevIns->pReg->szName, pDevIns->iInstance, rc));
1731	return rc;
1732	}
1733
1734
1735	/** @interface_method_impl{PDMDEVHLPR3,pfnCMOSRead} */
1736	static DECLCALLBACK(int) pdmR3DevHlp_CMOSRead(PPDMDEVINS pDevIns, unsigned iReg, uint8_t *pu8Value)
1737	{
1738	PDMDEV_ASSERT_DEVINS(pDevIns);
1739	PVM pVM = pDevIns->Internal.s.pVMR3;
1740	VM_ASSERT_EMT(pVM);
1741
1742	LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: iReg=%#04x pu8Value=%p\n",
1743	pDevIns->pReg->szName, pDevIns->iInstance, iReg, pu8Value));
1744	int rc;
1745	if (pVM->pdm.s.pRtc)
1746	rc = pVM->pdm.s.pRtc->Reg.pfnRead(pVM->pdm.s.pRtc->pDevIns, iReg, pu8Value);
1747	else
1748	rc = VERR_PDM_NO_RTC_INSTANCE;
1749
1750	LogFlow(("pdmR3DevHlp_CMOSWrite: caller='%s'/%d: return %Rrc\n",
1751	pDevIns->pReg->szName, pDevIns->iInstance, rc));
1752	return rc;
1753	}
1754
1755
1756	/** @interface_method_impl{PDMDEVHLPR3,pfnAssertEMT} */
1757	static DECLCALLBACK(bool) pdmR3DevHlp_AssertEMT(PPDMDEVINS pDevIns, const char pszFile, unsigned iLine, const char pszFunction)
1758	{
1759	PDMDEV_ASSERT_DEVINS(pDevIns);
1760	if (VM_IS_EMT(pDevIns->Internal.s.pVMR3))
1761	return true;
1762
1763	char szMsg[100];
1764	RTStrPrintf(szMsg, sizeof(szMsg), "AssertEMT '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance);
1765	RTAssertMsg1Weak(szMsg, iLine, pszFile, pszFunction);
1766	AssertBreakpoint();
1767	return false;
1768	}
1769
1770
1771	/** @interface_method_impl{PDMDEVHLPR3,pfnAssertOther} */
1772	static DECLCALLBACK(bool) pdmR3DevHlp_AssertOther(PPDMDEVINS pDevIns, const char pszFile, unsigned iLine, const char pszFunction)
1773	{
1774	PDMDEV_ASSERT_DEVINS(pDevIns);
1775	if (!VM_IS_EMT(pDevIns->Internal.s.pVMR3))
1776	return true;
1777
1778	char szMsg[100];
1779	RTStrPrintf(szMsg, sizeof(szMsg), "AssertOther '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance);
1780	RTAssertMsg1Weak(szMsg, iLine, pszFile, pszFunction);
1781	AssertBreakpoint();
1782	return false;
1783	}
1784
1785
1786	/** @interface_method_impl{PDMDEVHLP,pfnLdrGetRCInterfaceSymbols} */
1787	static DECLCALLBACK(int) pdmR3DevHlp_LdrGetRCInterfaceSymbols(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
1788	const char pszSymPrefix, const char pszSymList)
1789	{
1790	PDMDEV_ASSERT_DEVINS(pDevIns);
1791	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1792	LogFlow(("pdmR3DevHlp_PDMLdrGetRCInterfaceSymbols: caller='%s'/%d: pvInterface=%p cbInterface=%zu pszSymPrefix=%p:{%s} pszSymList=%p:{%s}\n",
1793	pDevIns->pReg->szName, pDevIns->iInstance, pvInterface, cbInterface, pszSymPrefix, pszSymPrefix, pszSymList, pszSymList));
1794
1795	int rc;
1796	if ( strncmp(pszSymPrefix, "dev", 3) == 0
1797	&& RTStrIStr(pszSymPrefix + 3, pDevIns->pReg->szName) != NULL)
1798	{
1799	if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC)
1800	rc = PDMR3LdrGetInterfaceSymbols(pDevIns->Internal.s.pVMR3, pvInterface, cbInterface,
1801	pDevIns->pReg->szName, pszSymPrefix, pszSymList,
1802	false /fRing0OrRC/);
1803	else
1804	{
1805	AssertMsgFailed(("Not a raw-mode enabled driver\n"));
1806	rc = VERR_PERMISSION_DENIED;
1807	}
1808	}
1809	else
1810	{
1811	AssertMsgFailed(("Invalid prefix '%s' for '%s'; must start with 'dev' and contain the driver name!\n",
1812	pszSymPrefix, pDevIns->pReg->szName));
1813	rc = VERR_INVALID_NAME;
1814	}
1815
1816	LogFlow(("pdmR3DevHlp_PDMLdrGetRCInterfaceSymbols: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName,
1817	pDevIns->iInstance, rc));
1818	return rc;
1819	}
1820
1821
1822	/** @interface_method_impl{PDMDEVHLP,pfnLdrGetR0InterfaceSymbols} */
1823	static DECLCALLBACK(int) pdmR3DevHlp_LdrGetR0InterfaceSymbols(PPDMDEVINS pDevIns, void *pvInterface, size_t cbInterface,
1824	const char pszSymPrefix, const char pszSymList)
1825	{
1826	PDMDEV_ASSERT_DEVINS(pDevIns);
1827	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1828	LogFlow(("pdmR3DevHlp_PDMLdrGetR0InterfaceSymbols: caller='%s'/%d: pvInterface=%p cbInterface=%zu pszSymPrefix=%p:{%s} pszSymList=%p:{%s}\n",
1829	pDevIns->pReg->szName, pDevIns->iInstance, pvInterface, cbInterface, pszSymPrefix, pszSymPrefix, pszSymList, pszSymList));
1830
1831	int rc;
1832	if ( strncmp(pszSymPrefix, "dev", 3) == 0
1833	&& RTStrIStr(pszSymPrefix + 3, pDevIns->pReg->szName) != NULL)
1834	{
1835	if (pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0)
1836	rc = PDMR3LdrGetInterfaceSymbols(pDevIns->Internal.s.pVMR3, pvInterface, cbInterface,
1837	pDevIns->pReg->szName, pszSymPrefix, pszSymList,
1838	true /fRing0OrRC/);
1839	else
1840	{
1841	AssertMsgFailed(("Not a ring-0 enabled driver\n"));
1842	rc = VERR_PERMISSION_DENIED;
1843	}
1844	}
1845	else
1846	{
1847	AssertMsgFailed(("Invalid prefix '%s' for '%s'; must start with 'dev' and contain the driver name!\n",
1848	pszSymPrefix, pDevIns->pReg->szName));
1849	rc = VERR_INVALID_NAME;
1850	}
1851
1852	LogFlow(("pdmR3DevHlp_PDMLdrGetR0InterfaceSymbols: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName,
1853	pDevIns->iInstance, rc));
1854	return rc;
1855	}
1856
1857
1858	/** @interface_method_impl{PDMDEVHLPR3,pfnGetVM} */
1859	static DECLCALLBACK(PVM) pdmR3DevHlp_GetVM(PPDMDEVINS pDevIns)
1860	{
1861	PDMDEV_ASSERT_DEVINS(pDevIns);
1862	LogFlow(("pdmR3DevHlp_GetVM: caller='%s'/%d: returns %p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns->Internal.s.pVMR3));
1863	return pDevIns->Internal.s.pVMR3;
1864	}
1865
1866
1867	/** @interface_method_impl{PDMDEVHLPR3,pfnGetVMCPU} */
1868	static DECLCALLBACK(PVMCPU) pdmR3DevHlp_GetVMCPU(PPDMDEVINS pDevIns)
1869	{
1870	PDMDEV_ASSERT_DEVINS(pDevIns);
1871	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
1872	LogFlow(("pdmR3DevHlp_GetVMCPU: caller='%s'/%d for CPU %u\n", pDevIns->pReg->szName, pDevIns->iInstance, VMMGetCpuId(pDevIns->Internal.s.pVMR3)));
1873	return VMMGetCpu(pDevIns->Internal.s.pVMR3);
1874	}
1875
1876
1877	/** @interface_method_impl{PDMDEVHLPR3,pfnPCIBusRegister} */
1878	static DECLCALLBACK(int) pdmR3DevHlp_PCIBusRegister(PPDMDEVINS pDevIns, PPDMPCIBUSREG pPciBusReg, PCPDMPCIHLPR3 *ppPciHlpR3)
1879	{
1880	PDMDEV_ASSERT_DEVINS(pDevIns);
1881	PVM pVM = pDevIns->Internal.s.pVMR3;
1882	VM_ASSERT_EMT(pVM);
1883	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: pPciBusReg=%p:{.u32Version=%#x, .pfnRegisterR3=%p, .pfnIORegionRegisterR3=%p, .pfnSetIrqR3=%p, "
1884	".pfnSaveExecR3=%p, .pfnLoadExecR3=%p, .pfnFakePCIBIOSR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppPciHlpR3=%p\n",
1885	pDevIns->pReg->szName, pDevIns->iInstance, pPciBusReg, pPciBusReg->u32Version, pPciBusReg->pfnRegisterR3,
1886	pPciBusReg->pfnIORegionRegisterR3, pPciBusReg->pfnSetIrqR3, pPciBusReg->pfnSaveExecR3, pPciBusReg->pfnLoadExecR3,
1887	pPciBusReg->pfnFakePCIBIOSR3, pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqRC, pPciBusReg->pszSetIrqR0, pPciBusReg->pszSetIrqR0, ppPciHlpR3));
1888
1889	/*
1890	* Validate the structure.
1891	*/
1892	if (pPciBusReg->u32Version != PDM_PCIBUSREG_VERSION)
1893	{
1894	AssertMsgFailed(("u32Version=%#x expected %#x\n", pPciBusReg->u32Version, PDM_PCIBUSREG_VERSION));
1895	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1896	return VERR_INVALID_PARAMETER;
1897	}
1898	if ( !pPciBusReg->pfnRegisterR3
1899	\|\| !pPciBusReg->pfnIORegionRegisterR3
1900	\|\| !pPciBusReg->pfnSetIrqR3
1901	\|\| !pPciBusReg->pfnSaveExecR3
1902	\|\| !pPciBusReg->pfnLoadExecR3
1903	\|\| (!pPciBusReg->pfnFakePCIBIOSR3 && !pVM->pdm.s.aPciBuses[0].pDevInsR3)) /* Only the first bus needs to do the BIOS work. */
1904	{
1905	Assert(pPciBusReg->pfnRegisterR3);
1906	Assert(pPciBusReg->pfnIORegionRegisterR3);
1907	Assert(pPciBusReg->pfnSetIrqR3);
1908	Assert(pPciBusReg->pfnSaveExecR3);
1909	Assert(pPciBusReg->pfnLoadExecR3);
1910	Assert(pPciBusReg->pfnFakePCIBIOSR3);
1911	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1912	return VERR_INVALID_PARAMETER;
1913	}
1914	if ( pPciBusReg->pszSetIrqRC
1915	&& !VALID_PTR(pPciBusReg->pszSetIrqRC))
1916	{
1917	Assert(VALID_PTR(pPciBusReg->pszSetIrqRC));
1918	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1919	return VERR_INVALID_PARAMETER;
1920	}
1921	if ( pPciBusReg->pszSetIrqR0
1922	&& !VALID_PTR(pPciBusReg->pszSetIrqR0))
1923	{
1924	Assert(VALID_PTR(pPciBusReg->pszSetIrqR0));
1925	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1926	return VERR_INVALID_PARAMETER;
1927	}
1928	if (!ppPciHlpR3)
1929	{
1930	Assert(ppPciHlpR3);
1931	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (ppPciHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1932	return VERR_INVALID_PARAMETER;
1933	}
1934
1935	/*
1936	* Find free PCI bus entry.
1937	*/
1938	unsigned iBus = 0;
1939	for (iBus = 0; iBus < RT_ELEMENTS(pVM->pdm.s.aPciBuses); iBus++)
1940	if (!pVM->pdm.s.aPciBuses[iBus].pDevInsR3)
1941	break;
1942	if (iBus >= RT_ELEMENTS(pVM->pdm.s.aPciBuses))
1943	{
1944	AssertMsgFailed(("Too many PCI buses. Max=%u\n", RT_ELEMENTS(pVM->pdm.s.aPciBuses)));
1945	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc (pci bus)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
1946	return VERR_INVALID_PARAMETER;
1947	}
1948	PPDMPCIBUS pPciBus = &pVM->pdm.s.aPciBuses[iBus];
1949
1950	/*
1951	* Resolve and init the RC bits.
1952	*/
1953	if (pPciBusReg->pszSetIrqRC)
1954	{
1955	int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pReg->szRCMod, pPciBusReg->pszSetIrqRC, &pPciBus->pfnSetIrqRC);
1956	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pPciBusReg->pszSetIrqRC, rc));
1957	if (RT_FAILURE(rc))
1958	{
1959	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1960	return rc;
1961	}
1962	pPciBus->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
1963	}
1964	else
1965	{
1966	pPciBus->pfnSetIrqRC = 0;
1967	pPciBus->pDevInsRC = 0;
1968	}
1969
1970	/*
1971	* Resolve and init the R0 bits.
1972	*/
1973	if (pPciBusReg->pszSetIrqR0)
1974	{
1975	int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pReg->szR0Mod, pPciBusReg->pszSetIrqR0, &pPciBus->pfnSetIrqR0);
1976	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pPciBusReg->pszSetIrqR0, rc));
1977	if (RT_FAILURE(rc))
1978	{
1979	LogFlow(("pdmR3DevHlp_PCIRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
1980	return rc;
1981	}
1982	pPciBus->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
1983	}
1984	else
1985	{
1986	pPciBus->pfnSetIrqR0 = 0;
1987	pPciBus->pDevInsR0 = 0;
1988	}
1989
1990	/*
1991	* Init the R3 bits.
1992	*/
1993	pPciBus->iBus = iBus;
1994	pPciBus->pDevInsR3 = pDevIns;
1995	pPciBus->pfnRegisterR3 = pPciBusReg->pfnRegisterR3;
1996	pPciBus->pfnIORegionRegisterR3 = pPciBusReg->pfnIORegionRegisterR3;
1997	pPciBus->pfnSetConfigCallbacksR3 = pPciBusReg->pfnSetConfigCallbacksR3;
1998	pPciBus->pfnSetIrqR3 = pPciBusReg->pfnSetIrqR3;
1999	pPciBus->pfnSaveExecR3 = pPciBusReg->pfnSaveExecR3;
2000	pPciBus->pfnLoadExecR3 = pPciBusReg->pfnLoadExecR3;
2001	pPciBus->pfnFakePCIBIOSR3 = pPciBusReg->pfnFakePCIBIOSR3;
2002
2003	Log(("PDM: Registered PCI bus device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
2004
2005	/* set the helper pointer and return. */
2006	*ppPciHlpR3 = &g_pdmR3DevPciHlp;
2007	LogFlow(("pdmR3DevHlp_PCIBusRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
2008	return VINF_SUCCESS;
2009	}
2010
2011
2012	/** @interface_method_impl{PDMDEVHLPR3,pfnPICRegister} */
2013	static DECLCALLBACK(int) pdmR3DevHlp_PICRegister(PPDMDEVINS pDevIns, PPDMPICREG pPicReg, PCPDMPICHLPR3 *ppPicHlpR3)
2014	{
2015	PDMDEV_ASSERT_DEVINS(pDevIns);
2016	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2017	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: pPicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pfnGetInterruptR3=%p, .pszGetIrqRC=%p:{%s}, .pszGetInterruptRC=%p:{%s}, .pszGetIrqR0=%p:{%s}, .pszGetInterruptR0=%p:{%s} } ppPicHlpR3=%p\n",
2018	pDevIns->pReg->szName, pDevIns->iInstance, pPicReg, pPicReg->u32Version, pPicReg->pfnSetIrqR3, pPicReg->pfnGetInterruptR3,
2019	pPicReg->pszSetIrqRC, pPicReg->pszSetIrqRC, pPicReg->pszGetInterruptRC, pPicReg->pszGetInterruptRC,
2020	pPicReg->pszSetIrqR0, pPicReg->pszSetIrqR0, pPicReg->pszGetInterruptR0, pPicReg->pszGetInterruptR0,
2021	ppPicHlpR3));
2022
2023	/*
2024	* Validate input.
2025	*/
2026	if (pPicReg->u32Version != PDM_PICREG_VERSION)
2027	{
2028	AssertMsgFailed(("u32Version=%#x expected %#x\n", pPicReg->u32Version, PDM_PICREG_VERSION));
2029	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2030	return VERR_INVALID_PARAMETER;
2031	}
2032	if ( !pPicReg->pfnSetIrqR3
2033	\|\| !pPicReg->pfnGetInterruptR3)
2034	{
2035	Assert(pPicReg->pfnSetIrqR3);
2036	Assert(pPicReg->pfnGetInterruptR3);
2037	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2038	return VERR_INVALID_PARAMETER;
2039	}
2040	if ( ( pPicReg->pszSetIrqRC
2041	\|\| pPicReg->pszGetInterruptRC)
2042	&& ( !VALID_PTR(pPicReg->pszSetIrqRC)
2043	\|\| !VALID_PTR(pPicReg->pszGetInterruptRC))
2044	)
2045	{
2046	Assert(VALID_PTR(pPicReg->pszSetIrqRC));
2047	Assert(VALID_PTR(pPicReg->pszGetInterruptRC));
2048	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2049	return VERR_INVALID_PARAMETER;
2050	}
2051	if ( pPicReg->pszSetIrqRC
2052	&& !(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC))
2053	{
2054	Assert(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_RC);
2055	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (RC flag)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2056	return VERR_INVALID_PARAMETER;
2057	}
2058	if ( pPicReg->pszSetIrqR0
2059	&& !(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0))
2060	{
2061	Assert(pDevIns->pReg->fFlags & PDM_DEVREG_FLAGS_R0);
2062	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (R0 flag)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2063	return VERR_INVALID_PARAMETER;
2064	}
2065	if (!ppPicHlpR3)
2066	{
2067	Assert(ppPicHlpR3);
2068	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc (ppPicHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2069	return VERR_INVALID_PARAMETER;
2070	}
2071
2072	/*
2073	* Only one PIC device.
2074	*/
2075	PVM pVM = pDevIns->Internal.s.pVMR3;
2076	if (pVM->pdm.s.Pic.pDevInsR3)
2077	{
2078	AssertMsgFailed(("Only one pic device is supported!\n"));
2079	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2080	return VERR_INVALID_PARAMETER;
2081	}
2082
2083	/*
2084	* RC stuff.
2085	*/
2086	if (pPicReg->pszSetIrqRC)
2087	{
2088	int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pReg->szRCMod, pPicReg->pszSetIrqRC, &pVM->pdm.s.Pic.pfnSetIrqRC);
2089	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pPicReg->pszSetIrqRC, rc));
2090	if (RT_SUCCESS(rc))
2091	{
2092	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pReg->szRCMod, pPicReg->pszGetInterruptRC, &pVM->pdm.s.Pic.pfnGetInterruptRC);
2093	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pPicReg->pszGetInterruptRC, rc));
2094	}
2095	if (RT_FAILURE(rc))
2096	{
2097	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2098	return rc;
2099	}
2100	pVM->pdm.s.Pic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
2101	}
2102	else
2103	{
2104	pVM->pdm.s.Pic.pDevInsRC = 0;
2105	pVM->pdm.s.Pic.pfnSetIrqRC = 0;
2106	pVM->pdm.s.Pic.pfnGetInterruptRC = 0;
2107	}
2108
2109	/*
2110	* R0 stuff.
2111	*/
2112	if (pPicReg->pszSetIrqR0)
2113	{
2114	int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pReg->szR0Mod, pPicReg->pszSetIrqR0, &pVM->pdm.s.Pic.pfnSetIrqR0);
2115	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pPicReg->pszSetIrqR0, rc));
2116	if (RT_SUCCESS(rc))
2117	{
2118	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pReg->szR0Mod, pPicReg->pszGetInterruptR0, &pVM->pdm.s.Pic.pfnGetInterruptR0);
2119	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pPicReg->pszGetInterruptR0, rc));
2120	}
2121	if (RT_FAILURE(rc))
2122	{
2123	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2124	return rc;
2125	}
2126	pVM->pdm.s.Pic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2127	Assert(pVM->pdm.s.Pic.pDevInsR0);
2128	}
2129	else
2130	{
2131	pVM->pdm.s.Pic.pfnSetIrqR0 = 0;
2132	pVM->pdm.s.Pic.pfnGetInterruptR0 = 0;
2133	pVM->pdm.s.Pic.pDevInsR0 = 0;
2134	}
2135
2136	/*
2137	* R3 stuff.
2138	*/
2139	pVM->pdm.s.Pic.pDevInsR3 = pDevIns;
2140	pVM->pdm.s.Pic.pfnSetIrqR3 = pPicReg->pfnSetIrqR3;
2141	pVM->pdm.s.Pic.pfnGetInterruptR3 = pPicReg->pfnGetInterruptR3;
2142	Log(("PDM: Registered PIC device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
2143
2144	/* set the helper pointer and return. */
2145	*ppPicHlpR3 = &g_pdmR3DevPicHlp;
2146	LogFlow(("pdmR3DevHlp_PICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
2147	return VINF_SUCCESS;
2148	}
2149
2150
2151	/** @interface_method_impl{PDMDEVHLPR3,pfnAPICRegister} */
2152	static DECLCALLBACK(int) pdmR3DevHlp_APICRegister(PPDMDEVINS pDevIns, PPDMAPICREG pApicReg, PCPDMAPICHLPR3 *ppApicHlpR3)
2153	{
2154	PDMDEV_ASSERT_DEVINS(pDevIns);
2155	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2156	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: pApicReg=%p:{.u32Version=%#x, .pfnGetInterruptR3=%p, .pfnSetBaseR3=%p, .pfnGetBaseR3=%p, "
2157	".pfnSetTPRR3=%p, .pfnGetTPRR3=%p, .pfnWriteMSR3=%p, .pfnReadMSR3=%p, .pfnBusDeliverR3=%p, .pfnLocalInterruptR3=%p, pszGetInterruptRC=%p:{%s}, pszSetBaseRC=%p:{%s}, pszGetBaseRC=%p:{%s}, "
2158	".pszSetTPRRC=%p:{%s}, .pszGetTPRRC=%p:{%s}, .pszWriteMSRRC=%p:{%s}, .pszReadMSRRC=%p:{%s}, .pszBusDeliverRC=%p:{%s}, .pszLocalInterruptRC=%p:{%s}} ppApicHlpR3=%p\n",
2159	pDevIns->pReg->szName, pDevIns->iInstance, pApicReg, pApicReg->u32Version, pApicReg->pfnGetInterruptR3, pApicReg->pfnSetBaseR3,
2160	pApicReg->pfnGetBaseR3, pApicReg->pfnSetTPRR3, pApicReg->pfnGetTPRR3, pApicReg->pfnWriteMSRR3, pApicReg->pfnReadMSRR3, pApicReg->pfnBusDeliverR3, pApicReg->pfnLocalInterruptR3, pApicReg->pszGetInterruptRC,
2161	pApicReg->pszGetInterruptRC, pApicReg->pszSetBaseRC, pApicReg->pszSetBaseRC, pApicReg->pszGetBaseRC, pApicReg->pszGetBaseRC,
2162	pApicReg->pszSetTPRRC, pApicReg->pszSetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszGetTPRRC, pApicReg->pszWriteMSRRC, pApicReg->pszWriteMSRRC, pApicReg->pszReadMSRRC, pApicReg->pszReadMSRRC, pApicReg->pszBusDeliverRC,
2163	pApicReg->pszBusDeliverRC, pApicReg->pszLocalInterruptRC, pApicReg->pszLocalInterruptRC, ppApicHlpR3));
2164
2165	/*
2166	* Validate input.
2167	*/
2168	if (pApicReg->u32Version != PDM_APICREG_VERSION)
2169	{
2170	AssertMsgFailed(("u32Version=%#x expected %#x\n", pApicReg->u32Version, PDM_APICREG_VERSION));
2171	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2172	return VERR_INVALID_PARAMETER;
2173	}
2174	if ( !pApicReg->pfnGetInterruptR3
2175	\|\| !pApicReg->pfnHasPendingIrqR3
2176	\|\| !pApicReg->pfnSetBaseR3
2177	\|\| !pApicReg->pfnGetBaseR3
2178	\|\| !pApicReg->pfnSetTPRR3
2179	\|\| !pApicReg->pfnGetTPRR3
2180	\|\| !pApicReg->pfnWriteMSRR3
2181	\|\| !pApicReg->pfnReadMSRR3
2182	\|\| !pApicReg->pfnBusDeliverR3
2183	\|\| !pApicReg->pfnLocalInterruptR3)
2184	{
2185	Assert(pApicReg->pfnGetInterruptR3);
2186	Assert(pApicReg->pfnHasPendingIrqR3);
2187	Assert(pApicReg->pfnSetBaseR3);
2188	Assert(pApicReg->pfnGetBaseR3);
2189	Assert(pApicReg->pfnSetTPRR3);
2190	Assert(pApicReg->pfnGetTPRR3);
2191	Assert(pApicReg->pfnWriteMSRR3);
2192	Assert(pApicReg->pfnReadMSRR3);
2193	Assert(pApicReg->pfnBusDeliverR3);
2194	Assert(pApicReg->pfnLocalInterruptR3);
2195	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2196	return VERR_INVALID_PARAMETER;
2197	}
2198	if ( ( pApicReg->pszGetInterruptRC
2199	\|\| pApicReg->pszHasPendingIrqRC
2200	\|\| pApicReg->pszSetBaseRC
2201	\|\| pApicReg->pszGetBaseRC
2202	\|\| pApicReg->pszSetTPRRC
2203	\|\| pApicReg->pszGetTPRRC
2204	\|\| pApicReg->pszWriteMSRRC
2205	\|\| pApicReg->pszReadMSRRC
2206	\|\| pApicReg->pszBusDeliverRC
2207	\|\| pApicReg->pszLocalInterruptRC)
2208	&& ( !VALID_PTR(pApicReg->pszGetInterruptRC)
2209	\|\| !VALID_PTR(pApicReg->pszHasPendingIrqRC)
2210	\|\| !VALID_PTR(pApicReg->pszSetBaseRC)
2211	\|\| !VALID_PTR(pApicReg->pszGetBaseRC)
2212	\|\| !VALID_PTR(pApicReg->pszSetTPRRC)
2213	\|\| !VALID_PTR(pApicReg->pszGetTPRRC)
2214	\|\| !VALID_PTR(pApicReg->pszWriteMSRRC)
2215	\|\| !VALID_PTR(pApicReg->pszReadMSRRC)
2216	\|\| !VALID_PTR(pApicReg->pszBusDeliverRC)
2217	\|\| !VALID_PTR(pApicReg->pszLocalInterruptRC))
2218	)
2219	{
2220	Assert(VALID_PTR(pApicReg->pszGetInterruptRC));
2221	Assert(VALID_PTR(pApicReg->pszHasPendingIrqRC));
2222	Assert(VALID_PTR(pApicReg->pszSetBaseRC));
2223	Assert(VALID_PTR(pApicReg->pszGetBaseRC));
2224	Assert(VALID_PTR(pApicReg->pszSetTPRRC));
2225	Assert(VALID_PTR(pApicReg->pszGetTPRRC));
2226	Assert(VALID_PTR(pApicReg->pszReadMSRRC));
2227	Assert(VALID_PTR(pApicReg->pszWriteMSRRC));
2228	Assert(VALID_PTR(pApicReg->pszBusDeliverRC));
2229	Assert(VALID_PTR(pApicReg->pszLocalInterruptRC));
2230	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (RC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2231	return VERR_INVALID_PARAMETER;
2232	}
2233	if ( ( pApicReg->pszGetInterruptR0
2234	\|\| pApicReg->pszHasPendingIrqR0
2235	\|\| pApicReg->pszSetBaseR0
2236	\|\| pApicReg->pszGetBaseR0
2237	\|\| pApicReg->pszSetTPRR0
2238	\|\| pApicReg->pszGetTPRR0
2239	\|\| pApicReg->pszWriteMSRR0
2240	\|\| pApicReg->pszReadMSRR0
2241	\|\| pApicReg->pszBusDeliverR0
2242	\|\| pApicReg->pszLocalInterruptR0)
2243	&& ( !VALID_PTR(pApicReg->pszGetInterruptR0)
2244	\|\| !VALID_PTR(pApicReg->pszHasPendingIrqR0)
2245	\|\| !VALID_PTR(pApicReg->pszSetBaseR0)
2246	\|\| !VALID_PTR(pApicReg->pszGetBaseR0)
2247	\|\| !VALID_PTR(pApicReg->pszSetTPRR0)
2248	\|\| !VALID_PTR(pApicReg->pszGetTPRR0)
2249	\|\| !VALID_PTR(pApicReg->pszReadMSRR0)
2250	\|\| !VALID_PTR(pApicReg->pszWriteMSRR0)
2251	\|\| !VALID_PTR(pApicReg->pszBusDeliverR0)
2252	\|\| !VALID_PTR(pApicReg->pszLocalInterruptR0))
2253	)
2254	{
2255	Assert(VALID_PTR(pApicReg->pszGetInterruptR0));
2256	Assert(VALID_PTR(pApicReg->pszHasPendingIrqR0));
2257	Assert(VALID_PTR(pApicReg->pszSetBaseR0));
2258	Assert(VALID_PTR(pApicReg->pszGetBaseR0));
2259	Assert(VALID_PTR(pApicReg->pszSetTPRR0));
2260	Assert(VALID_PTR(pApicReg->pszGetTPRR0));
2261	Assert(VALID_PTR(pApicReg->pszReadMSRR0));
2262	Assert(VALID_PTR(pApicReg->pszWriteMSRR0));
2263	Assert(VALID_PTR(pApicReg->pszBusDeliverR0));
2264	Assert(VALID_PTR(pApicReg->pszLocalInterruptR0));
2265	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (R0 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2266	return VERR_INVALID_PARAMETER;
2267	}
2268	if (!ppApicHlpR3)
2269	{
2270	Assert(ppApicHlpR3);
2271	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc (ppApicHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2272	return VERR_INVALID_PARAMETER;
2273	}
2274
2275	/*
2276	* Only one APIC device. On SMP we have single logical device covering all LAPICs,
2277	* as they need to communicate and share state easily.
2278	*/
2279	PVM pVM = pDevIns->Internal.s.pVMR3;
2280	if (pVM->pdm.s.Apic.pDevInsR3)
2281	{
2282	AssertMsgFailed(("Only one apic device is supported!\n"));
2283	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2284	return VERR_INVALID_PARAMETER;
2285	}
2286
2287	/*
2288	* Resolve & initialize the RC bits.
2289	*/
2290	if (pApicReg->pszGetInterruptRC)
2291	{
2292	int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pReg->szRCMod, pApicReg->pszGetInterruptRC, &pVM->pdm.s.Apic.pfnGetInterruptRC);
2293	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszGetInterruptRC, rc));
2294	if (RT_SUCCESS(rc))
2295	{
2296	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pReg->szRCMod, pApicReg->pszHasPendingIrqRC, &pVM->pdm.s.Apic.pfnHasPendingIrqRC);
2297	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszHasPendingIrqRC, rc));
2298	}
2299	if (RT_SUCCESS(rc))
2300	{
2301	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pReg->szRCMod, pApicReg->pszSetBaseRC, &pVM->pdm.s.Apic.pfnSetBaseRC);
2302	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszSetBaseRC, rc));
2303	}
2304	if (RT_SUCCESS(rc))
2305	{
2306	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pReg->szRCMod, pApicReg->pszGetBaseRC, &pVM->pdm.s.Apic.pfnGetBaseRC);
2307	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszGetBaseRC, rc));
2308	}
2309	if (RT_SUCCESS(rc))
2310	{
2311	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pReg->szRCMod, pApicReg->pszSetTPRRC, &pVM->pdm.s.Apic.pfnSetTPRRC);
2312	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszSetTPRRC, rc));
2313	}
2314	if (RT_SUCCESS(rc))
2315	{
2316	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pReg->szRCMod, pApicReg->pszGetTPRRC, &pVM->pdm.s.Apic.pfnGetTPRRC);
2317	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszGetTPRRC, rc));
2318	}
2319	if (RT_SUCCESS(rc))
2320	{
2321	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pReg->szRCMod, pApicReg->pszWriteMSRRC, &pVM->pdm.s.Apic.pfnWriteMSRRC);
2322	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszWriteMSRRC, rc));
2323	}
2324	if (RT_SUCCESS(rc))
2325	{
2326	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pReg->szRCMod, pApicReg->pszReadMSRRC, &pVM->pdm.s.Apic.pfnReadMSRRC);
2327	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszReadMSRRC, rc));
2328	}
2329	if (RT_SUCCESS(rc))
2330	{
2331	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pReg->szRCMod, pApicReg->pszBusDeliverRC, &pVM->pdm.s.Apic.pfnBusDeliverRC);
2332	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszBusDeliverRC, rc));
2333	}
2334	if (RT_SUCCESS(rc))
2335	{
2336	rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pReg->szRCMod, pApicReg->pszLocalInterruptRC, &pVM->pdm.s.Apic.pfnLocalInterruptRC);
2337	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pApicReg->pszLocalInterruptRC, rc));
2338	}
2339	if (RT_FAILURE(rc))
2340	{
2341	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2342	return rc;
2343	}
2344	pVM->pdm.s.Apic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
2345	}
2346	else
2347	{
2348	pVM->pdm.s.Apic.pDevInsRC = 0;
2349	pVM->pdm.s.Apic.pfnGetInterruptRC = 0;
2350	pVM->pdm.s.Apic.pfnHasPendingIrqRC = 0;
2351	pVM->pdm.s.Apic.pfnSetBaseRC = 0;
2352	pVM->pdm.s.Apic.pfnGetBaseRC = 0;
2353	pVM->pdm.s.Apic.pfnSetTPRRC = 0;
2354	pVM->pdm.s.Apic.pfnGetTPRRC = 0;
2355	pVM->pdm.s.Apic.pfnWriteMSRRC = 0;
2356	pVM->pdm.s.Apic.pfnReadMSRRC = 0;
2357	pVM->pdm.s.Apic.pfnBusDeliverRC = 0;
2358	pVM->pdm.s.Apic.pfnLocalInterruptRC = 0;
2359	}
2360
2361	/*
2362	* Resolve & initialize the R0 bits.
2363	*/
2364	if (pApicReg->pszGetInterruptR0)
2365	{
2366	int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pReg->szR0Mod, pApicReg->pszGetInterruptR0, &pVM->pdm.s.Apic.pfnGetInterruptR0);
2367	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszGetInterruptR0, rc));
2368	if (RT_SUCCESS(rc))
2369	{
2370	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pReg->szR0Mod, pApicReg->pszHasPendingIrqR0, &pVM->pdm.s.Apic.pfnHasPendingIrqR0);
2371	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszHasPendingIrqR0, rc));
2372	}
2373	if (RT_SUCCESS(rc))
2374	{
2375	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pReg->szR0Mod, pApicReg->pszSetBaseR0, &pVM->pdm.s.Apic.pfnSetBaseR0);
2376	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszSetBaseR0, rc));
2377	}
2378	if (RT_SUCCESS(rc))
2379	{
2380	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pReg->szR0Mod, pApicReg->pszGetBaseR0, &pVM->pdm.s.Apic.pfnGetBaseR0);
2381	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszGetBaseR0, rc));
2382	}
2383	if (RT_SUCCESS(rc))
2384	{
2385	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pReg->szR0Mod, pApicReg->pszSetTPRR0, &pVM->pdm.s.Apic.pfnSetTPRR0);
2386	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszSetTPRR0, rc));
2387	}
2388	if (RT_SUCCESS(rc))
2389	{
2390	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pReg->szR0Mod, pApicReg->pszGetTPRR0, &pVM->pdm.s.Apic.pfnGetTPRR0);
2391	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszGetTPRR0, rc));
2392	}
2393	if (RT_SUCCESS(rc))
2394	{
2395	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pReg->szR0Mod, pApicReg->pszWriteMSRR0, &pVM->pdm.s.Apic.pfnWriteMSRR0);
2396	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszWriteMSRR0, rc));
2397	}
2398	if (RT_SUCCESS(rc))
2399	{
2400	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pReg->szR0Mod, pApicReg->pszReadMSRR0, &pVM->pdm.s.Apic.pfnReadMSRR0);
2401	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszReadMSRR0, rc));
2402	}
2403	if (RT_SUCCESS(rc))
2404	{
2405	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pReg->szR0Mod, pApicReg->pszBusDeliverR0, &pVM->pdm.s.Apic.pfnBusDeliverR0);
2406	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszBusDeliverR0, rc));
2407	}
2408	if (RT_SUCCESS(rc))
2409	{
2410	rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pReg->szR0Mod, pApicReg->pszLocalInterruptR0, &pVM->pdm.s.Apic.pfnLocalInterruptR0);
2411	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pApicReg->pszLocalInterruptR0, rc));
2412	}
2413	if (RT_FAILURE(rc))
2414	{
2415	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2416	return rc;
2417	}
2418	pVM->pdm.s.Apic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2419	Assert(pVM->pdm.s.Apic.pDevInsR0);
2420	}
2421	else
2422	{
2423	pVM->pdm.s.Apic.pfnGetInterruptR0 = 0;
2424	pVM->pdm.s.Apic.pfnHasPendingIrqR0 = 0;
2425	pVM->pdm.s.Apic.pfnSetBaseR0 = 0;
2426	pVM->pdm.s.Apic.pfnGetBaseR0 = 0;
2427	pVM->pdm.s.Apic.pfnSetTPRR0 = 0;
2428	pVM->pdm.s.Apic.pfnGetTPRR0 = 0;
2429	pVM->pdm.s.Apic.pfnWriteMSRR0 = 0;
2430	pVM->pdm.s.Apic.pfnReadMSRR0 = 0;
2431	pVM->pdm.s.Apic.pfnBusDeliverR0 = 0;
2432	pVM->pdm.s.Apic.pfnLocalInterruptR0 = 0;
2433	pVM->pdm.s.Apic.pDevInsR0 = 0;
2434	}
2435
2436	/*
2437	* Initialize the HC bits.
2438	*/
2439	pVM->pdm.s.Apic.pDevInsR3 = pDevIns;
2440	pVM->pdm.s.Apic.pfnGetInterruptR3 = pApicReg->pfnGetInterruptR3;
2441	pVM->pdm.s.Apic.pfnHasPendingIrqR3 = pApicReg->pfnHasPendingIrqR3;
2442	pVM->pdm.s.Apic.pfnSetBaseR3 = pApicReg->pfnSetBaseR3;
2443	pVM->pdm.s.Apic.pfnGetBaseR3 = pApicReg->pfnGetBaseR3;
2444	pVM->pdm.s.Apic.pfnSetTPRR3 = pApicReg->pfnSetTPRR3;
2445	pVM->pdm.s.Apic.pfnGetTPRR3 = pApicReg->pfnGetTPRR3;
2446	pVM->pdm.s.Apic.pfnWriteMSRR3 = pApicReg->pfnWriteMSRR3;
2447	pVM->pdm.s.Apic.pfnReadMSRR3 = pApicReg->pfnReadMSRR3;
2448	pVM->pdm.s.Apic.pfnBusDeliverR3 = pApicReg->pfnBusDeliverR3;
2449	pVM->pdm.s.Apic.pfnLocalInterruptR3 = pApicReg->pfnLocalInterruptR3;
2450	Log(("PDM: Registered APIC device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
2451
2452	/* set the helper pointer and return. */
2453	*ppApicHlpR3 = &g_pdmR3DevApicHlp;
2454	LogFlow(("pdmR3DevHlp_APICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
2455	return VINF_SUCCESS;
2456	}
2457
2458
2459	/** @interface_method_impl{PDMDEVHLPR3,pfnIOAPICRegister} */
2460	static DECLCALLBACK(int) pdmR3DevHlp_IOAPICRegister(PPDMDEVINS pDevIns, PPDMIOAPICREG pIoApicReg, PCPDMIOAPICHLPR3 *ppIoApicHlpR3)
2461	{
2462	PDMDEV_ASSERT_DEVINS(pDevIns);
2463	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2464	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: pIoApicReg=%p:{.u32Version=%#x, .pfnSetIrqR3=%p, .pszSetIrqRC=%p:{%s}, .pszSetIrqR0=%p:{%s}} ppIoApicHlpR3=%p\n",
2465	pDevIns->pReg->szName, pDevIns->iInstance, pIoApicReg, pIoApicReg->u32Version, pIoApicReg->pfnSetIrqR3,
2466	pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqRC, pIoApicReg->pszSetIrqR0, pIoApicReg->pszSetIrqR0, ppIoApicHlpR3));
2467
2468	/*
2469	* Validate input.
2470	*/
2471	if (pIoApicReg->u32Version != PDM_IOAPICREG_VERSION)
2472	{
2473	AssertMsgFailed(("u32Version=%#x expected %#x\n", pIoApicReg->u32Version, PDM_IOAPICREG_VERSION));
2474	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2475	return VERR_INVALID_PARAMETER;
2476	}
2477	if (!pIoApicReg->pfnSetIrqR3)
2478	{
2479	Assert(pIoApicReg->pfnSetIrqR3);
2480	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (R3 callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2481	return VERR_INVALID_PARAMETER;
2482	}
2483	if ( pIoApicReg->pszSetIrqRC
2484	&& !VALID_PTR(pIoApicReg->pszSetIrqRC))
2485	{
2486	Assert(VALID_PTR(pIoApicReg->pszSetIrqRC));
2487	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2488	return VERR_INVALID_PARAMETER;
2489	}
2490	if ( pIoApicReg->pszSetIrqR0
2491	&& !VALID_PTR(pIoApicReg->pszSetIrqR0))
2492	{
2493	Assert(VALID_PTR(pIoApicReg->pszSetIrqR0));
2494	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (GC callbacks)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2495	return VERR_INVALID_PARAMETER;
2496	}
2497	if (!ppIoApicHlpR3)
2498	{
2499	Assert(ppIoApicHlpR3);
2500	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (ppApicHlp)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2501	return VERR_INVALID_PARAMETER;
2502	}
2503
2504	/*
2505	* The I/O APIC requires the APIC to be present (hacks++).
2506	* If the I/O APIC does GC stuff so must the APIC.
2507	*/
2508	PVM pVM = pDevIns->Internal.s.pVMR3;
2509	if (!pVM->pdm.s.Apic.pDevInsR3)
2510	{
2511	AssertMsgFailed(("Configuration error / Init order error! No APIC!\n"));
2512	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no APIC)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2513	return VERR_INVALID_PARAMETER;
2514	}
2515	if ( pIoApicReg->pszSetIrqRC
2516	&& !pVM->pdm.s.Apic.pDevInsRC)
2517	{
2518	AssertMsgFailed(("Configuration error! APIC doesn't do GC, I/O APIC does!\n"));
2519	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (no GC APIC)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2520	return VERR_INVALID_PARAMETER;
2521	}
2522
2523	/*
2524	* Only one I/O APIC device.
2525	*/
2526	if (pVM->pdm.s.IoApic.pDevInsR3)
2527	{
2528	AssertMsgFailed(("Only one ioapic device is supported!\n"));
2529	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc (only one)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2530	return VERR_INVALID_PARAMETER;
2531	}
2532
2533	/*
2534	* Resolve & initialize the GC bits.
2535	*/
2536	if (pIoApicReg->pszSetIrqRC)
2537	{
2538	int rc = PDMR3LdrGetSymbolRCLazy(pVM, pDevIns->pReg->szRCMod, pIoApicReg->pszSetIrqRC, &pVM->pdm.s.IoApic.pfnSetIrqRC);
2539	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szRCMod, pIoApicReg->pszSetIrqRC, rc));
2540	if (RT_FAILURE(rc))
2541	{
2542	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2543	return rc;
2544	}
2545	pVM->pdm.s.IoApic.pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
2546	}
2547	else
2548	{
2549	pVM->pdm.s.IoApic.pDevInsRC = 0;
2550	pVM->pdm.s.IoApic.pfnSetIrqRC = 0;
2551	}
2552
2553	/*
2554	* Resolve & initialize the R0 bits.
2555	*/
2556	if (pIoApicReg->pszSetIrqR0)
2557	{
2558	int rc = PDMR3LdrGetSymbolR0Lazy(pVM, pDevIns->pReg->szR0Mod, pIoApicReg->pszSetIrqR0, &pVM->pdm.s.IoApic.pfnSetIrqR0);
2559	AssertMsgRC(rc, ("%s::%s rc=%Rrc\n", pDevIns->pReg->szR0Mod, pIoApicReg->pszSetIrqR0, rc));
2560	if (RT_FAILURE(rc))
2561	{
2562	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2563	return rc;
2564	}
2565	pVM->pdm.s.IoApic.pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
2566	Assert(pVM->pdm.s.IoApic.pDevInsR0);
2567	}
2568	else
2569	{
2570	pVM->pdm.s.IoApic.pfnSetIrqR0 = 0;
2571	pVM->pdm.s.IoApic.pDevInsR0 = 0;
2572	}
2573
2574	/*
2575	* Initialize the R3 bits.
2576	*/
2577	pVM->pdm.s.IoApic.pDevInsR3 = pDevIns;
2578	pVM->pdm.s.IoApic.pfnSetIrqR3 = pIoApicReg->pfnSetIrqR3;
2579	Log(("PDM: Registered I/O APIC device '%s'/%d pDevIns=%p\n", pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
2580
2581	/* set the helper pointer and return. */
2582	*ppIoApicHlpR3 = &g_pdmR3DevIoApicHlp;
2583	LogFlow(("pdmR3DevHlp_IOAPICRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
2584	return VINF_SUCCESS;
2585	}
2586
2587
2588	/** @interface_method_impl{PDMDEVHLPR3,pfnHPETRegister} */
2589	static DECLCALLBACK(int) pdmR3DevHlp_HPETRegister(PPDMDEVINS pDevIns, PPDMHPETREG pHpetReg, PCPDMHPETHLPR3 *ppHpetHlpR3)
2590	{
2591	PDMDEV_ASSERT_DEVINS(pDevIns);
2592	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2593	LogFlow(("pdmR3DevHlp_HPETRegister: caller='%s'/%d:\n"));
2594
2595	/*
2596	* Validate input.
2597	*/
2598	if (pHpetReg->u32Version != PDM_HPETREG_VERSION)
2599	{
2600	AssertMsgFailed(("u32Version=%#x expected %#x\n", pHpetReg->u32Version, PDM_HPETREG_VERSION));
2601	LogFlow(("pdmR3DevHlp_HPETRegister: caller='%s'/%d: returns %Rrc (version)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2602	return VERR_INVALID_PARAMETER;
2603	}
2604
2605	if (!ppHpetHlpR3)
2606	{
2607	Assert(ppHpetHlpR3);
2608	LogFlow(("pdmR3DevHlp_HPETRegister: caller='%s'/%d: returns %Rrc (ppApicHlpR3)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2609	return VERR_INVALID_PARAMETER;
2610	}
2611
2612	/* set the helper pointer and return. */
2613	*ppHpetHlpR3 = &g_pdmR3DevHpetHlp;
2614	LogFlow(("pdmR3DevHlp_HPETRegister: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, VINF_SUCCESS));
2615	return VINF_SUCCESS;
2616	}
2617
2618
2619	/** @interface_method_impl{PDMDEVHLPR3,pfnDMACRegister} */
2620	static DECLCALLBACK(int) pdmR3DevHlp_DMACRegister(PPDMDEVINS pDevIns, PPDMDMACREG pDmacReg, PCPDMDMACHLP *ppDmacHlp)
2621	{
2622	PDMDEV_ASSERT_DEVINS(pDevIns);
2623	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2624	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: pDmacReg=%p:{.u32Version=%#x, .pfnRun=%p, .pfnRegister=%p, .pfnReadMemory=%p, .pfnWriteMemory=%p, .pfnSetDREQ=%p, .pfnGetChannelMode=%p} ppDmacHlp=%p\n",
2625	pDevIns->pReg->szName, pDevIns->iInstance, pDmacReg, pDmacReg->u32Version, pDmacReg->pfnRun, pDmacReg->pfnRegister,
2626	pDmacReg->pfnReadMemory, pDmacReg->pfnWriteMemory, pDmacReg->pfnSetDREQ, pDmacReg->pfnGetChannelMode, ppDmacHlp));
2627
2628	/*
2629	* Validate input.
2630	*/
2631	if (pDmacReg->u32Version != PDM_DMACREG_VERSION)
2632	{
2633	AssertMsgFailed(("u32Version=%#x expected %#x\n", pDmacReg->u32Version,
2634	PDM_DMACREG_VERSION));
2635	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (version)\n",
2636	pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2637	return VERR_INVALID_PARAMETER;
2638	}
2639	if ( !pDmacReg->pfnRun
2640	\|\| !pDmacReg->pfnRegister
2641	\|\| !pDmacReg->pfnReadMemory
2642	\|\| !pDmacReg->pfnWriteMemory
2643	\|\| !pDmacReg->pfnSetDREQ
2644	\|\| !pDmacReg->pfnGetChannelMode)
2645	{
2646	Assert(pDmacReg->pfnRun);
2647	Assert(pDmacReg->pfnRegister);
2648	Assert(pDmacReg->pfnReadMemory);
2649	Assert(pDmacReg->pfnWriteMemory);
2650	Assert(pDmacReg->pfnSetDREQ);
2651	Assert(pDmacReg->pfnGetChannelMode);
2652	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (callbacks)\n",
2653	pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2654	return VERR_INVALID_PARAMETER;
2655	}
2656
2657	if (!ppDmacHlp)
2658	{
2659	Assert(ppDmacHlp);
2660	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc (ppDmacHlp)\n",
2661	pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2662	return VERR_INVALID_PARAMETER;
2663	}
2664
2665	/*
2666	* Only one DMA device.
2667	*/
2668	PVM pVM = pDevIns->Internal.s.pVMR3;
2669	if (pVM->pdm.s.pDmac)
2670	{
2671	AssertMsgFailed(("Only one DMA device is supported!\n"));
2672	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
2673	pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
2674	return VERR_INVALID_PARAMETER;
2675	}
2676
2677	/*
2678	* Allocate and initialize pci bus structure.
2679	*/
2680	int rc = VINF_SUCCESS;
2681	PPDMDMAC pDmac = (PPDMDMAC)MMR3HeapAlloc(pDevIns->Internal.s.pVMR3, MM_TAG_PDM_DEVICE, sizeof(*pDmac));
2682	if (pDmac)
2683	{
2684	pDmac->pDevIns = pDevIns;
2685	pDmac->Reg = *pDmacReg;
2686	pVM->pdm.s.pDmac = pDmac;
2687
2688	/* set the helper pointer. */
2689	*ppDmacHlp = &g_pdmR3DevDmacHlp;
2690	Log(("PDM: Registered DMAC device '%s'/%d pDevIns=%p\n",
2691	pDevIns->pReg->szName, pDevIns->iInstance, pDevIns));
2692	}
2693	else
2694	rc = VERR_NO_MEMORY;
2695
2696	LogFlow(("pdmR3DevHlp_DMACRegister: caller='%s'/%d: returns %Rrc\n",
2697	pDevIns->pReg->szName, pDevIns->iInstance, rc));
2698	return rc;
2699	}
2700
2701
2702	/**
2703	* @copydoc PDMDEVHLPR3::pfnRegisterVMMDevHeap
2704	*/
2705	static DECLCALLBACK(int) pdmR3DevHlp_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
2706	{
2707	PDMDEV_ASSERT_DEVINS(pDevIns);
2708	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2709
2710	int rc = PDMR3RegisterVMMDevHeap(pDevIns->Internal.s.pVMR3, GCPhys, pvHeap, cbSize);
2711	return rc;
2712	}
2713
2714
2715	/**
2716	* @copydoc PDMDEVHLPR3::pfnUnregisterVMMDevHeap
2717	*/
2718	static DECLCALLBACK(int) pdmR3DevHlp_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
2719	{
2720	PDMDEV_ASSERT_DEVINS(pDevIns);
2721	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2722
2723	int rc = PDMR3UnregisterVMMDevHeap(pDevIns->Internal.s.pVMR3, GCPhys);
2724	return rc;
2725	}
2726
2727
2728	/** @interface_method_impl{PDMDEVHLPR3,pfnVMReset} */
2729	static DECLCALLBACK(int) pdmR3DevHlp_VMReset(PPDMDEVINS pDevIns)
2730	{
2731	PDMDEV_ASSERT_DEVINS(pDevIns);
2732	PVM pVM = pDevIns->Internal.s.pVMR3;
2733	VM_ASSERT_EMT(pVM);
2734	LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: VM_FF_RESET %d -> 1\n",
2735	pDevIns->pReg->szName, pDevIns->iInstance, VM_FF_ISSET(pVM, VM_FF_RESET)));
2736
2737	/*
2738	* We postpone this operation because we're likely to be inside a I/O instruction
2739	* and the EIP will be updated when we return.
2740	* We still return VINF_EM_RESET to break out of any execution loops and force FF evaluation.
2741	*/
2742	bool fHaltOnReset;
2743	int rc = CFGMR3QueryBool(CFGMR3GetChild(CFGMR3GetRoot(pVM), "PDM"), "HaltOnReset", &fHaltOnReset);
2744	if (RT_SUCCESS(rc) && fHaltOnReset)
2745	{
2746	Log(("pdmR3DevHlp_VMReset: Halt On Reset!\n"));
2747	rc = VINF_EM_HALT;
2748	}
2749	else
2750	{
2751	VM_FF_SET(pVM, VM_FF_RESET);
2752	rc = VINF_EM_RESET;
2753	}
2754
2755	LogFlow(("pdmR3DevHlp_VMReset: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2756	return rc;
2757	}
2758
2759
2760	/** @interface_method_impl{PDMDEVHLPR3,pfnVMSuspend} */
2761	static DECLCALLBACK(int) pdmR3DevHlp_VMSuspend(PPDMDEVINS pDevIns)
2762	{
2763	int rc;
2764	PDMDEV_ASSERT_DEVINS(pDevIns);
2765	PVM pVM = pDevIns->Internal.s.pVMR3;
2766	VM_ASSERT_EMT(pVM);
2767	LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d:\n",
2768	pDevIns->pReg->szName, pDevIns->iInstance));
2769
2770	if (pVM->cCpus > 1)
2771	{
2772	/* We own the IOM lock here and could cause a deadlock by waiting for a VCPU that is blocking on the IOM lock. */
2773	rc = VMR3ReqCallNoWaitU(pVM->pUVM, VMCPUID_ANY_QUEUE, (PFNRT)VMR3Suspend, 1, pVM);
2774	AssertRC(rc);
2775	rc = VINF_EM_SUSPEND;
2776	}
2777	else
2778	rc = VMR3Suspend(pVM);
2779
2780	LogFlow(("pdmR3DevHlp_VMSuspend: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2781	return rc;
2782	}
2783
2784
2785	/** @interface_method_impl{PDMDEVHLPR3,pfnVMPowerOff} */
2786	static DECLCALLBACK(int) pdmR3DevHlp_VMPowerOff(PPDMDEVINS pDevIns)
2787	{
2788	int rc;
2789	PDMDEV_ASSERT_DEVINS(pDevIns);
2790	PVM pVM = pDevIns->Internal.s.pVMR3;
2791	VM_ASSERT_EMT(pVM);
2792	LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d:\n",
2793	pDevIns->pReg->szName, pDevIns->iInstance));
2794
2795	if (pVM->cCpus > 1)
2796	{
2797	/* We own the IOM lock here and could cause a deadlock by waiting for a VCPU that is blocking on the IOM lock. */
2798	rc = VMR3ReqCallNoWaitU(pVM->pUVM, VMCPUID_ANY_QUEUE, (PFNRT)VMR3PowerOff, 1, pVM);
2799	AssertRC(rc);
2800	/* Set the VCPU state to stopped here as well to make sure no
2801	* inconsistency with the EM state occurs.
2802	*/
2803	VMCPU_SET_STATE(VMMGetCpu(pVM), VMCPUSTATE_STOPPED);
2804	rc = VINF_EM_OFF;
2805	}
2806	else
2807	rc = VMR3PowerOff(pVM);
2808
2809	LogFlow(("pdmR3DevHlp_VMPowerOff: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
2810	return rc;
2811	}
2812
2813
2814	/** @interface_method_impl{PDMDEVHLPR3,pfnA20IsEnabled} */
2815	static DECLCALLBACK(bool) pdmR3DevHlp_A20IsEnabled(PPDMDEVINS pDevIns)
2816	{
2817	PDMDEV_ASSERT_DEVINS(pDevIns);
2818	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2819
2820	bool fRc = PGMPhysIsA20Enabled(VMMGetCpu(pDevIns->Internal.s.pVMR3));
2821
2822	LogFlow(("pdmR3DevHlp_A20IsEnabled: caller='%s'/%d: returns %d\n", pDevIns->pReg->szName, pDevIns->iInstance, fRc));
2823	return fRc;
2824	}
2825
2826
2827	/** @interface_method_impl{PDMDEVHLPR3,pfnA20Set} */
2828	static DECLCALLBACK(void) pdmR3DevHlp_A20Set(PPDMDEVINS pDevIns, bool fEnable)
2829	{
2830	PDMDEV_ASSERT_DEVINS(pDevIns);
2831	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2832	LogFlow(("pdmR3DevHlp_A20Set: caller='%s'/%d: fEnable=%d\n", pDevIns->pReg->szName, pDevIns->iInstance, fEnable));
2833	PGMR3PhysSetA20(VMMGetCpu(pDevIns->Internal.s.pVMR3), fEnable);
2834	}
2835
2836
2837	/** @interface_method_impl{PDMDEVHLPR3,pfnGetCpuId} */
2838	static DECLCALLBACK(void) pdmR3DevHlp_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
2839	uint32_t pEax, uint32_t pEbx, uint32_t pEcx, uint32_t pEdx)
2840	{
2841	PDMDEV_ASSERT_DEVINS(pDevIns);
2842	VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
2843
2844	LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: iLeaf=%d pEax=%p pEbx=%p pEcx=%p pEdx=%p\n",
2845	pDevIns->pReg->szName, pDevIns->iInstance, iLeaf, pEax, pEbx, pEcx, pEdx));
2846	AssertPtr(pEax); AssertPtr(pEbx); AssertPtr(pEcx); AssertPtr(pEdx);
2847
2848	CPUMGetGuestCpuId(VMMGetCpu(pDevIns->Internal.s.pVMR3), iLeaf, pEax, pEbx, pEcx, pEdx);
2849
2850	LogFlow(("pdmR3DevHlp_GetCpuId: caller='%s'/%d: returns void - pEax=%#x pEbx=%#x pEcx=%#x pEdx=%#x\n",
2851	pDevIns->pReg->szName, pDevIns->iInstance, pEax, pEbx, pEcx, pEdx));
2852	}
2853
2854
2855	/**
2856	* The device helper structure for trusted devices.
2857	*/
2858	const PDMDEVHLPR3 g_pdmR3DevHlpTrusted =
2859	{
2860	PDM_DEVHLPR3_VERSION,
2861	pdmR3DevHlp_IOPortRegister,
2862	pdmR3DevHlp_IOPortRegisterRC,
2863	pdmR3DevHlp_IOPortRegisterR0,
2864	pdmR3DevHlp_IOPortDeregister,
2865	pdmR3DevHlp_MMIORegister,
2866	pdmR3DevHlp_MMIORegisterRC,
2867	pdmR3DevHlp_MMIORegisterR0,
2868	pdmR3DevHlp_MMIODeregister,
2869	pdmR3DevHlp_MMIO2Register,
2870	pdmR3DevHlp_MMIO2Deregister,
2871	pdmR3DevHlp_MMIO2Map,
2872	pdmR3DevHlp_MMIO2Unmap,
2873	pdmR3DevHlp_MMHyperMapMMIO2,
2874	pdmR3DevHlp_MMIO2MapKernel,
2875	pdmR3DevHlp_ROMRegister,
2876	pdmR3DevHlp_ROMProtectShadow,
2877	pdmR3DevHlp_SSMRegister,
2878	pdmR3DevHlp_TMTimerCreate,
2879	pdmR3DevHlp_TMUtcNow,
2880	pdmR3DevHlp_PhysRead,
2881	pdmR3DevHlp_PhysWrite,
2882	pdmR3DevHlp_PhysGCPhys2CCPtr,
2883	pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly,
2884	pdmR3DevHlp_PhysReleasePageMappingLock,
2885	pdmR3DevHlp_PhysReadGCVirt,
2886	pdmR3DevHlp_PhysWriteGCVirt,
2887	pdmR3DevHlp_PhysGCPtr2GCPhys,
2888	pdmR3DevHlp_MMHeapAlloc,
2889	pdmR3DevHlp_MMHeapAllocZ,
2890	pdmR3DevHlp_MMHeapFree,
2891	pdmR3DevHlp_VMState,
2892	pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet,
2893	pdmR3DevHlp_VMSetError,
2894	pdmR3DevHlp_VMSetErrorV,
2895	pdmR3DevHlp_VMSetRuntimeError,
2896	pdmR3DevHlp_VMSetRuntimeErrorV,
2897	pdmR3DevHlp_DBGFStopV,
2898	pdmR3DevHlp_DBGFInfoRegister,
2899	pdmR3DevHlp_STAMRegister,
2900	pdmR3DevHlp_STAMRegisterF,
2901	pdmR3DevHlp_STAMRegisterV,
2902	pdmR3DevHlp_PCIRegister,
2903	pdmR3DevHlp_PCIIORegionRegister,
2904	pdmR3DevHlp_PCISetConfigCallbacks,
2905	pdmR3DevHlp_PCISetIrq,
2906	pdmR3DevHlp_PCISetIrqNoWait,
2907	pdmR3DevHlp_ISASetIrq,
2908	pdmR3DevHlp_ISASetIrqNoWait,
2909	pdmR3DevHlp_DriverAttach,
2910	pdmR3DevHlp_QueueCreate,
2911	pdmR3DevHlp_CritSectInit,
2912	pdmR3DevHlp_ThreadCreate,
2913	pdmR3DevHlp_SetAsyncNotification,
2914	pdmR3DevHlp_AsyncNotificationCompleted,
2915	pdmR3DevHlp_RTCRegister,
2916	pdmR3DevHlp_PCIBusRegister,
2917	pdmR3DevHlp_PICRegister,
2918	pdmR3DevHlp_APICRegister,
2919	pdmR3DevHlp_IOAPICRegister,
2920	pdmR3DevHlp_HPETRegister,
2921	pdmR3DevHlp_DMACRegister,
2922	pdmR3DevHlp_DMARegister,
2923	pdmR3DevHlp_DMAReadMemory,
2924	pdmR3DevHlp_DMAWriteMemory,
2925	pdmR3DevHlp_DMASetDREQ,
2926	pdmR3DevHlp_DMAGetChannelMode,
2927	pdmR3DevHlp_DMASchedule,
2928	pdmR3DevHlp_CMOSWrite,
2929	pdmR3DevHlp_CMOSRead,
2930	pdmR3DevHlp_AssertEMT,
2931	pdmR3DevHlp_AssertOther,
2932	pdmR3DevHlp_LdrGetRCInterfaceSymbols,
2933	pdmR3DevHlp_LdrGetR0InterfaceSymbols,
2934	0,
2935	0,
2936	0,
2937	0,
2938	0,
2939	0,
2940	0,
2941	0,
2942	0,
2943	0,
2944	pdmR3DevHlp_GetVM,
2945	pdmR3DevHlp_GetVMCPU,
2946	pdmR3DevHlp_RegisterVMMDevHeap,
2947	pdmR3DevHlp_UnregisterVMMDevHeap,
2948	pdmR3DevHlp_VMReset,
2949	pdmR3DevHlp_VMSuspend,
2950	pdmR3DevHlp_VMPowerOff,
2951	pdmR3DevHlp_A20IsEnabled,
2952	pdmR3DevHlp_A20Set,
2953	pdmR3DevHlp_GetCpuId,
2954	PDM_DEVHLPR3_VERSION /* the end */
2955	};
2956
2957
2958
2959
2960	/** @interface_method_impl{PDMDEVHLPR3,pfnGetVM} */
2961	static DECLCALLBACK(PVM) pdmR3DevHlp_Untrusted_GetVM(PPDMDEVINS pDevIns)
2962	{
2963	PDMDEV_ASSERT_DEVINS(pDevIns);
2964	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
2965	return NULL;
2966	}
2967
2968
2969	/** @interface_method_impl{PDMDEVHLPR3,pfnGetVMCPU} */
2970	static DECLCALLBACK(PVMCPU) pdmR3DevHlp_Untrusted_GetVMCPU(PPDMDEVINS pDevIns)
2971	{
2972	PDMDEV_ASSERT_DEVINS(pDevIns);
2973	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
2974	return NULL;
2975	}
2976
2977
2978	/** @interface_method_impl{PDMDEVHLPR3,pfnRegisterVMMDevHeap} */
2979	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_RegisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTR3PTR pvHeap, unsigned cbSize)
2980	{
2981	PDMDEV_ASSERT_DEVINS(pDevIns);
2982	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
2983	return VERR_ACCESS_DENIED;
2984	}
2985
2986
2987	/** @interface_method_impl{PDMDEVHLPR3,pfnUnregisterVMMDevHeap} */
2988	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
2989	{
2990	PDMDEV_ASSERT_DEVINS(pDevIns);
2991	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
2992	return VERR_ACCESS_DENIED;
2993	}
2994
2995
2996	/** @interface_method_impl{PDMDEVHLPR3,pfnVMReset} */
2997	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMReset(PPDMDEVINS pDevIns)
2998	{
2999	PDMDEV_ASSERT_DEVINS(pDevIns);
3000	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3001	return VERR_ACCESS_DENIED;
3002	}
3003
3004
3005	/** @interface_method_impl{PDMDEVHLPR3,pfnVMSuspend} */
3006	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMSuspend(PPDMDEVINS pDevIns)
3007	{
3008	PDMDEV_ASSERT_DEVINS(pDevIns);
3009	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3010	return VERR_ACCESS_DENIED;
3011	}
3012
3013
3014	/** @interface_method_impl{PDMDEVHLPR3,pfnVMPowerOff} */
3015	static DECLCALLBACK(int) pdmR3DevHlp_Untrusted_VMPowerOff(PPDMDEVINS pDevIns)
3016	{
3017	PDMDEV_ASSERT_DEVINS(pDevIns);
3018	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3019	return VERR_ACCESS_DENIED;
3020	}
3021
3022
3023	/** @interface_method_impl{PDMDEVHLPR3,pfnA20IsEnabled} */
3024	static DECLCALLBACK(bool) pdmR3DevHlp_Untrusted_A20IsEnabled(PPDMDEVINS pDevIns)
3025	{
3026	PDMDEV_ASSERT_DEVINS(pDevIns);
3027	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3028	return false;
3029	}
3030
3031
3032	/** @interface_method_impl{PDMDEVHLPR3,pfnA20Set} */
3033	static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_A20Set(PPDMDEVINS pDevIns, bool fEnable)
3034	{
3035	PDMDEV_ASSERT_DEVINS(pDevIns);
3036	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3037	NOREF(fEnable);
3038	}
3039
3040
3041	/** @interface_method_impl{PDMDEVHLPR3,pfnGetCpuId} */
3042	static DECLCALLBACK(void) pdmR3DevHlp_Untrusted_GetCpuId(PPDMDEVINS pDevIns, uint32_t iLeaf,
3043	uint32_t pEax, uint32_t pEbx, uint32_t pEcx, uint32_t pEdx)
3044	{
3045	PDMDEV_ASSERT_DEVINS(pDevIns);
3046	AssertReleaseMsgFailed(("Untrusted device called trusted helper! '%s'/%d\n", pDevIns->pReg->szName, pDevIns->iInstance));
3047	}
3048
3049
3050	/**
3051	* The device helper structure for non-trusted devices.
3052	*/
3053	const PDMDEVHLPR3 g_pdmR3DevHlpUnTrusted =
3054	{
3055	PDM_DEVHLPR3_VERSION,
3056	pdmR3DevHlp_IOPortRegister,
3057	pdmR3DevHlp_IOPortRegisterRC,
3058	pdmR3DevHlp_IOPortRegisterR0,
3059	pdmR3DevHlp_IOPortDeregister,
3060	pdmR3DevHlp_MMIORegister,
3061	pdmR3DevHlp_MMIORegisterRC,
3062	pdmR3DevHlp_MMIORegisterR0,
3063	pdmR3DevHlp_MMIODeregister,
3064	pdmR3DevHlp_MMIO2Register,
3065	pdmR3DevHlp_MMIO2Deregister,
3066	pdmR3DevHlp_MMIO2Map,
3067	pdmR3DevHlp_MMIO2Unmap,
3068	pdmR3DevHlp_MMHyperMapMMIO2,
3069	pdmR3DevHlp_MMIO2MapKernel,
3070	pdmR3DevHlp_ROMRegister,
3071	pdmR3DevHlp_ROMProtectShadow,
3072	pdmR3DevHlp_SSMRegister,
3073	pdmR3DevHlp_TMTimerCreate,
3074	pdmR3DevHlp_TMUtcNow,
3075	pdmR3DevHlp_PhysRead,
3076	pdmR3DevHlp_PhysWrite,
3077	pdmR3DevHlp_PhysGCPhys2CCPtr,
3078	pdmR3DevHlp_PhysGCPhys2CCPtrReadOnly,
3079	pdmR3DevHlp_PhysReleasePageMappingLock,
3080	pdmR3DevHlp_PhysReadGCVirt,
3081	pdmR3DevHlp_PhysWriteGCVirt,
3082	pdmR3DevHlp_PhysGCPtr2GCPhys,
3083	pdmR3DevHlp_MMHeapAlloc,
3084	pdmR3DevHlp_MMHeapAllocZ,
3085	pdmR3DevHlp_MMHeapFree,
3086	pdmR3DevHlp_VMState,
3087	pdmR3DevHlp_VMTeleportedAndNotFullyResumedYet,
3088	pdmR3DevHlp_VMSetError,
3089	pdmR3DevHlp_VMSetErrorV,
3090	pdmR3DevHlp_VMSetRuntimeError,
3091	pdmR3DevHlp_VMSetRuntimeErrorV,
3092	pdmR3DevHlp_DBGFStopV,
3093	pdmR3DevHlp_DBGFInfoRegister,
3094	pdmR3DevHlp_STAMRegister,
3095	pdmR3DevHlp_STAMRegisterF,
3096	pdmR3DevHlp_STAMRegisterV,
3097	pdmR3DevHlp_PCIRegister,
3098	pdmR3DevHlp_PCIIORegionRegister,
3099	pdmR3DevHlp_PCISetConfigCallbacks,
3100	pdmR3DevHlp_PCISetIrq,
3101	pdmR3DevHlp_PCISetIrqNoWait,
3102	pdmR3DevHlp_ISASetIrq,
3103	pdmR3DevHlp_ISASetIrqNoWait,
3104	pdmR3DevHlp_DriverAttach,
3105	pdmR3DevHlp_QueueCreate,
3106	pdmR3DevHlp_CritSectInit,
3107	pdmR3DevHlp_ThreadCreate,
3108	pdmR3DevHlp_SetAsyncNotification,
3109	pdmR3DevHlp_AsyncNotificationCompleted,
3110	pdmR3DevHlp_RTCRegister,
3111	pdmR3DevHlp_PCIBusRegister,
3112	pdmR3DevHlp_PICRegister,
3113	pdmR3DevHlp_APICRegister,
3114	pdmR3DevHlp_IOAPICRegister,
3115	pdmR3DevHlp_HPETRegister,
3116	pdmR3DevHlp_DMACRegister,
3117	pdmR3DevHlp_DMARegister,
3118	pdmR3DevHlp_DMAReadMemory,
3119	pdmR3DevHlp_DMAWriteMemory,
3120	pdmR3DevHlp_DMASetDREQ,
3121	pdmR3DevHlp_DMAGetChannelMode,
3122	pdmR3DevHlp_DMASchedule,
3123	pdmR3DevHlp_CMOSWrite,
3124	pdmR3DevHlp_CMOSRead,
3125	pdmR3DevHlp_AssertEMT,
3126	pdmR3DevHlp_AssertOther,
3127	pdmR3DevHlp_LdrGetRCInterfaceSymbols,
3128	pdmR3DevHlp_LdrGetR0InterfaceSymbols,
3129	0,
3130	0,
3131	0,
3132	0,
3133	0,
3134	0,
3135	0,
3136	0,
3137	0,
3138	0,
3139	pdmR3DevHlp_Untrusted_GetVM,
3140	pdmR3DevHlp_Untrusted_GetVMCPU,
3141	pdmR3DevHlp_Untrusted_RegisterVMMDevHeap,
3142	pdmR3DevHlp_Untrusted_UnregisterVMMDevHeap,
3143	pdmR3DevHlp_Untrusted_VMReset,
3144	pdmR3DevHlp_Untrusted_VMSuspend,
3145	pdmR3DevHlp_Untrusted_VMPowerOff,
3146	pdmR3DevHlp_Untrusted_A20IsEnabled,
3147	pdmR3DevHlp_Untrusted_A20Set,
3148	pdmR3DevHlp_Untrusted_GetCpuId,
3149	PDM_DEVHLPR3_VERSION /* the end */
3150	};
3151
3152
3153
3154	/**
3155	* Queue consumer callback for internal component.
3156	*
3157	* @returns Success indicator.
3158	* If false the item will not be removed and the flushing will stop.
3159	* @param pVM The VM handle.
3160	* @param pItem The item to consume. Upon return this item will be freed.
3161	*/
3162	DECLCALLBACK(bool) pdmR3DevHlpQueueConsumer(PVM pVM, PPDMQUEUEITEMCORE pItem)
3163	{
3164	PPDMDEVHLPTASK pTask = (PPDMDEVHLPTASK)pItem;
3165	LogFlow(("pdmR3DevHlpQueueConsumer: enmOp=%d pDevIns=%p\n", pTask->enmOp, pTask->pDevInsR3));
3166	switch (pTask->enmOp)
3167	{
3168	case PDMDEVHLPTASKOP_ISA_SET_IRQ:
3169	PDMIsaSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel, true /* ISA source */);
3170	break;
3171
3172	case PDMDEVHLPTASKOP_PCI_SET_IRQ:
3173	pdmR3DevHlp_PCISetIrq(pTask->pDevInsR3, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3174	break;
3175
3176	case PDMDEVHLPTASKOP_IOAPIC_SET_IRQ:
3177	PDMIoApicSetIrq(pVM, pTask->u.SetIRQ.iIrq, pTask->u.SetIRQ.iLevel);
3178	break;
3179
3180	default:
3181	AssertReleaseMsgFailed(("Invalid operation %d\n", pTask->enmOp));
3182	break;
3183	}
3184	return true;
3185	}
3186
3187	/** @} */

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source: vbox/trunk/src/VBox/VMM/PDMDevHlp.cpp@ 26944

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