CSAM.cpp@ 22621

Last change on this file since 22621 was 22480, checked in by vboxsync, 15 years ago
SSM,VMM,Devices,Main,VBoxBFE: Live snapshot/migration SSM API adjustments.
Property svn:eol-style set to `native` Property svn:keywords set to `Id`
File size: 91.1 KB

Line
1	/* $Id: CSAM.cpp 22480 2009-08-26 17:14:13Z vboxsync $ */
2	/** @file
3	* CSAM - Guest OS Code Scanning and Analysis Manager
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 Sun Microsystems, Inc.
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18	* Clara, CA 95054 USA or visit http://www.sun.com if you need
19	* additional information or have any questions.
20	*/
21
22	/*******************************************************************************
23	* Header Files *
24	*******************************************************************************/
25	#define LOG_GROUP LOG_GROUP_CSAM
26	#include <VBox/cpum.h>
27	#include <VBox/stam.h>
28	#include <VBox/patm.h>
29	#include <VBox/csam.h>
30	#include <VBox/cpumdis.h>
31	#include <VBox/pgm.h>
32	#include <VBox/iom.h>
33	#include <VBox/sup.h>
34	#include <VBox/mm.h>
35	#include <VBox/em.h>
36	#include <VBox/rem.h>
37	#include <VBox/selm.h>
38	#include <VBox/trpm.h>
39	#include <VBox/cfgm.h>
40	#include <VBox/param.h>
41	#include <iprt/avl.h>
42	#include <iprt/asm.h>
43	#include <iprt/thread.h>
44	#include "CSAMInternal.h"
45	#include <VBox/vm.h>
46	#include <VBox/dbg.h>
47	#include <VBox/err.h>
48	#include <VBox/ssm.h>
49	#include <VBox/log.h>
50	#include <iprt/assert.h>
51	#include <iprt/string.h>
52	#include <VBox/dis.h>
53	#include <VBox/disopcode.h>
54	#include <stdlib.h>
55	#include <stdio.h>
56
57
58	/* Enabled by default */
59	#define CSAM_ENABLE
60
61	/* Enable to monitor code pages for self-modifying code. */
62	#define CSAM_MONITOR_CODE_PAGES
63	/* Enable to monitor all scanned pages
64	#define CSAM_MONITOR_CSAM_CODE_PAGES */
65	/* Enable to scan beyond ret instructions.
66	#define CSAM_ANALYSE_BEYOND_RET */
67
68	/*******************************************************************************
69	* Internal Functions *
70	*******************************************************************************/
71	static DECLCALLBACK(int) csamr3Save(PVM pVM, PSSMHANDLE pSSM);
72	static DECLCALLBACK(int) csamr3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPhase);
73	static DECLCALLBACK(int) CSAMCodePageWriteHandler(PVM pVM, RTGCPTR GCPtr, void pvPtr, void pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser);
74	static DECLCALLBACK(int) CSAMCodePageInvalidate(PVM pVM, RTGCPTR GCPtr);
75
76	bool csamIsCodeScanned(PVM pVM, RTRCPTR pInstr, PCSAMPAGE *pPage);
77	int csamR3CheckPageRecord(PVM pVM, RTRCPTR pInstr);
78	static PCSAMPAGE csamCreatePageRecord(PVM pVM, RTRCPTR GCPtr, CSAMTAG enmTag, bool fCode32, bool fMonitorInvalidation = false);
79	static int csamRemovePageRecord(PVM pVM, RTRCPTR GCPtr);
80	static int csamReinit(PVM pVM);
81	static void csamMarkCode(PVM pVM, PCSAMPAGE pPage, RTRCPTR pInstr, uint32_t opsize, bool fScanned);
82	static int csamAnalyseCodeStream(PVM pVM, RCPTRTYPE(uint8_t ) pInstrGC, RCPTRTYPE(uint8_t ) pCurInstrGC, bool fCode32,
83	PFN_CSAMR3ANALYSE pfnCSAMR3Analyse, void *pUserData, PCSAMP2GLOOKUPREC pCacheRec);
84
85	/** @todo Temporary for debugging. */
86	static bool fInCSAMCodePageInvalidate = false;
87
88	/*******************************************************************************
89	* Global Variables *
90	*******************************************************************************/
91	#ifdef VBOX_WITH_DEBUGGER
92	static DECLCALLBACK(int) csamr3CmdOn(PCDBGCCMD pCmd, PDBGCCMDHLP pCmdHlp, PVM pVM, PCDBGCVAR paArgs, unsigned cArgs, PDBGCVAR pResult);
93	static DECLCALLBACK(int) csamr3CmdOff(PCDBGCCMD pCmd, PDBGCCMDHLP pCmdHlp, PVM pVM, PCDBGCVAR paArgs, unsigned cArgs, PDBGCVAR pResult);
94
95	/** Command descriptors. */
96	static const DBGCCMD g_aCmds[] =
97	{
98	/* pszCmd, cArgsMin, cArgsMax, paArgDesc, cArgDescs, pResultDesc, fFlags, pfnHandler pszSyntax, ....pszDescription */
99	{ "csamon", 0, 0, NULL, 0, NULL, 0, csamr3CmdOn, "", "Enable CSAM code scanning." },
100	{ "csamoff", 0, 0, NULL, 0, NULL, 0, csamr3CmdOff, "", "Disable CSAM code scanning." },
101	};
102	#endif
103
104
105	/**
106	* Initializes the CSAM.
107	*
108	* @returns VBox status code.
109	* @param pVM The VM to operate on.
110	*/
111	VMMR3DECL(int) CSAMR3Init(PVM pVM)
112	{
113	int rc;
114
115	LogFlow(("CSAMR3Init\n"));
116
117	/* Allocate bitmap for the page directory. */
118	rc = MMR3HyperAllocOnceNoRel(pVM, CSAM_PGDIRBMP_CHUNKSsizeof(RTHCPTR), 0, MM_TAG_CSAM, (void *)&pVM->csam.s.pPDBitmapHC);
119	AssertRCReturn(rc, rc);
120	rc = MMR3HyperAllocOnceNoRel(pVM, CSAM_PGDIRBMP_CHUNKSsizeof(RTRCPTR), 0, MM_TAG_CSAM, (void *)&pVM->csam.s.pPDGCBitmapHC);
121	AssertRCReturn(rc, rc);
122	pVM->csam.s.pPDBitmapGC = MMHyperR3ToRC(pVM, pVM->csam.s.pPDGCBitmapHC);
123	pVM->csam.s.pPDHCBitmapGC = MMHyperR3ToRC(pVM, pVM->csam.s.pPDBitmapHC);
124
125	rc = csamReinit(pVM);
126	AssertRCReturn(rc, rc);
127
128	/*
129	* Register save and load state notificators.
130	*/
131	rc = SSMR3RegisterInternal(pVM, "CSAM", 0, CSAM_SSM_VERSION, sizeof(pVM->csam.s) + PAGE_SIZE*16,
132	NULL, NULL, NULL,
133	NULL, csamr3Save, NULL,
134	NULL, csamr3Load, NULL);
135	AssertRCReturn(rc, rc);
136
137	STAM_REG(pVM, &pVM->csam.s.StatNrTraps, STAMTYPE_COUNTER, "/CSAM/PageTraps", STAMUNIT_OCCURENCES, "The number of CSAM page traps.");
138	STAM_REG(pVM, &pVM->csam.s.StatDangerousWrite, STAMTYPE_COUNTER, "/CSAM/DangerousWrites", STAMUNIT_OCCURENCES, "The number of dangerous writes that cause a context switch.");
139
140	STAM_REG(pVM, &pVM->csam.s.StatNrPageNPHC, STAMTYPE_COUNTER, "/CSAM/HC/PageNotPresent", STAMUNIT_OCCURENCES, "The number of CSAM pages marked not present.");
141	STAM_REG(pVM, &pVM->csam.s.StatNrPageNPGC, STAMTYPE_COUNTER, "/CSAM/GC/PageNotPresent", STAMUNIT_OCCURENCES, "The number of CSAM pages marked not present.");
142	STAM_REG(pVM, &pVM->csam.s.StatNrPages, STAMTYPE_COUNTER, "/CSAM/PageRec/AddedRW", STAMUNIT_OCCURENCES, "The number of CSAM page records (RW monitoring).");
143	STAM_REG(pVM, &pVM->csam.s.StatNrPagesInv, STAMTYPE_COUNTER, "/CSAM/PageRec/AddedRWI", STAMUNIT_OCCURENCES, "The number of CSAM page records (RW & invalidation monitoring).");
144	STAM_REG(pVM, &pVM->csam.s.StatNrRemovedPages, STAMTYPE_COUNTER, "/CSAM/PageRec/Removed", STAMUNIT_OCCURENCES, "The number of removed CSAM page records.");
145	STAM_REG(pVM, &pVM->csam.s.StatPageRemoveREMFlush,STAMTYPE_COUNTER, "/CSAM/PageRec/Removed/REMFlush", STAMUNIT_OCCURENCES, "The number of removed CSAM page records that caused a REM flush.");
146
147	STAM_REG(pVM, &pVM->csam.s.StatNrPatchPages, STAMTYPE_COUNTER, "/CSAM/PageRec/Patch", STAMUNIT_OCCURENCES, "The number of CSAM patch page records.");
148	STAM_REG(pVM, &pVM->csam.s.StatNrUserPages, STAMTYPE_COUNTER, "/CSAM/PageRec/Ignore/User", STAMUNIT_OCCURENCES, "The number of CSAM user page records (ignored).");
149	STAM_REG(pVM, &pVM->csam.s.StatPagePATM, STAMTYPE_COUNTER, "/CSAM/PageRec/Type/PATM", STAMUNIT_OCCURENCES, "The number of PATM page records.");
150	STAM_REG(pVM, &pVM->csam.s.StatPageCSAM, STAMTYPE_COUNTER, "/CSAM/PageRec/Type/CSAM", STAMUNIT_OCCURENCES, "The number of CSAM page records.");
151	STAM_REG(pVM, &pVM->csam.s.StatPageREM, STAMTYPE_COUNTER, "/CSAM/PageRec/Type/REM", STAMUNIT_OCCURENCES, "The number of REM page records.");
152	STAM_REG(pVM, &pVM->csam.s.StatPageMonitor, STAMTYPE_COUNTER, "/CSAM/PageRec/Monitored", STAMUNIT_OCCURENCES, "The number of monitored pages.");
153
154	STAM_REG(pVM, &pVM->csam.s.StatCodePageModified, STAMTYPE_COUNTER, "/CSAM/Monitor/DirtyPage", STAMUNIT_OCCURENCES, "The number of code page modifications.");
155
156	STAM_REG(pVM, &pVM->csam.s.StatNrFlushes, STAMTYPE_COUNTER, "/CSAM/PageFlushes", STAMUNIT_OCCURENCES, "The number of CSAM page flushes.");
157	STAM_REG(pVM, &pVM->csam.s.StatNrFlushesSkipped, STAMTYPE_COUNTER, "/CSAM/PageFlushesSkipped", STAMUNIT_OCCURENCES, "The number of CSAM page flushes that were skipped.");
158	STAM_REG(pVM, &pVM->csam.s.StatNrKnownPagesHC, STAMTYPE_COUNTER, "/CSAM/HC/KnownPageRecords", STAMUNIT_OCCURENCES, "The number of known CSAM page records.");
159	STAM_REG(pVM, &pVM->csam.s.StatNrKnownPagesGC, STAMTYPE_COUNTER, "/CSAM/GC/KnownPageRecords", STAMUNIT_OCCURENCES, "The number of known CSAM page records.");
160	STAM_REG(pVM, &pVM->csam.s.StatNrInstr, STAMTYPE_COUNTER, "/CSAM/ScannedInstr", STAMUNIT_OCCURENCES, "The number of scanned instructions.");
161	STAM_REG(pVM, &pVM->csam.s.StatNrBytesRead, STAMTYPE_COUNTER, "/CSAM/BytesRead", STAMUNIT_OCCURENCES, "The number of bytes read for scanning.");
162	STAM_REG(pVM, &pVM->csam.s.StatNrOpcodeRead, STAMTYPE_COUNTER, "/CSAM/OpcodeBytesRead", STAMUNIT_OCCURENCES, "The number of opcode bytes read by the recompiler.");
163
164	STAM_REG(pVM, &pVM->csam.s.StatBitmapAlloc, STAMTYPE_COUNTER, "/CSAM/Alloc/PageBitmap", STAMUNIT_OCCURENCES, "The number of page bitmap allocations.");
165
166	STAM_REG(pVM, &pVM->csam.s.StatInstrCacheHit, STAMTYPE_COUNTER, "/CSAM/Cache/Hit", STAMUNIT_OCCURENCES, "The number of dangerous instruction cache hits.");
167	STAM_REG(pVM, &pVM->csam.s.StatInstrCacheMiss, STAMTYPE_COUNTER, "/CSAM/Cache/Miss", STAMUNIT_OCCURENCES, "The number of dangerous instruction cache misses.");
168
169	STAM_REG(pVM, &pVM->csam.s.StatScanNextFunction, STAMTYPE_COUNTER, "/CSAM/Function/Scan/Success", STAMUNIT_OCCURENCES, "The number of found functions beyond the ret border.");
170	STAM_REG(pVM, &pVM->csam.s.StatScanNextFunctionFailed, STAMTYPE_COUNTER, "/CSAM/Function/Scan/Failed", STAMUNIT_OCCURENCES, "The number of refused functions beyond the ret border.");
171
172	STAM_REG(pVM, &pVM->csam.s.StatTime, STAMTYPE_PROFILE, "/PROF/CSAM/Scan", STAMUNIT_TICKS_PER_CALL, "Scanning overhead.");
173	STAM_REG(pVM, &pVM->csam.s.StatTimeCheckAddr, STAMTYPE_PROFILE, "/PROF/CSAM/CheckAddr", STAMUNIT_TICKS_PER_CALL, "Address check overhead.");
174	STAM_REG(pVM, &pVM->csam.s.StatTimeAddrConv, STAMTYPE_PROFILE, "/PROF/CSAM/AddrConv", STAMUNIT_TICKS_PER_CALL, "Address conversion overhead.");
175	STAM_REG(pVM, &pVM->csam.s.StatTimeFlushPage, STAMTYPE_PROFILE, "/PROF/CSAM/FlushPage", STAMUNIT_TICKS_PER_CALL, "Page flushing overhead.");
176	STAM_REG(pVM, &pVM->csam.s.StatTimeDisasm, STAMTYPE_PROFILE, "/PROF/CSAM/Disasm", STAMUNIT_TICKS_PER_CALL, "Disassembly overhead.");
177	STAM_REG(pVM, &pVM->csam.s.StatFlushDirtyPages, STAMTYPE_PROFILE, "/PROF/CSAM/FlushDirtyPage", STAMUNIT_TICKS_PER_CALL, "Dirty page flushing overhead.");
178	STAM_REG(pVM, &pVM->csam.s.StatCheckGates, STAMTYPE_PROFILE, "/PROF/CSAM/CheckGates", STAMUNIT_TICKS_PER_CALL, "CSAMR3CheckGates overhead.");
179
180	/*
181	* Check CFGM option and enable/disable CSAM.
182	*/
183	bool fEnabled;
184	rc = CFGMR3QueryBool(CFGMR3GetRoot(pVM), "CSAMEnabled", &fEnabled);
185	if (RT_FAILURE(rc))
186	#ifdef CSAM_ENABLE
187	fEnabled = true;
188	#else
189	fEnabled = false;
190	#endif
191	if (fEnabled)
192	CSAMEnableScanning(pVM);
193
194	#ifdef VBOX_WITH_DEBUGGER
195	/*
196	* Debugger commands.
197	*/
198	static bool fRegisteredCmds = false;
199	if (!fRegisteredCmds)
200	{
201	int rc = DBGCRegisterCommands(&g_aCmds[0], RT_ELEMENTS(g_aCmds));
202	if (RT_SUCCESS(rc))
203	fRegisteredCmds = true;
204	}
205	#endif
206
207	return VINF_SUCCESS;
208	}
209
210	/**
211	* (Re)initializes CSAM
212	*
213	* @param pVM The VM.
214	*/
215	static int csamReinit(PVM pVM)
216	{
217	/*
218	* Assert alignment and sizes.
219	*/
220	AssertRelease(!(RT_OFFSETOF(VM, csam.s) & 31));
221	AssertRelease(sizeof(pVM->csam.s) <= sizeof(pVM->csam.padding));
222
223	/*
224	* Setup any fixed pointers and offsets.
225	*/
226	pVM->csam.s.offVM = RT_OFFSETOF(VM, patm);
227
228	pVM->csam.s.fGatesChecked = false;
229	pVM->csam.s.fScanningStarted = false;
230
231	PVMCPU pVCpu = &pVM->aCpus[0]; /* raw mode implies 1 VPCU */
232	VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_CSAM_PENDING_ACTION);
233	pVM->csam.s.cDirtyPages = 0;
234	/* not necessary */
235	memset(pVM->csam.s.pvDirtyBasePage, 0, sizeof(pVM->csam.s.pvDirtyBasePage));
236	memset(pVM->csam.s.pvDirtyFaultPage, 0, sizeof(pVM->csam.s.pvDirtyFaultPage));
237
238	memset(&pVM->csam.s.aDangerousInstr, 0, sizeof(pVM->csam.s.aDangerousInstr));
239	pVM->csam.s.cDangerousInstr = 0;
240	pVM->csam.s.iDangerousInstr = 0;
241
242	memset(pVM->csam.s.pvCallInstruction, 0, sizeof(pVM->csam.s.pvCallInstruction));
243	pVM->csam.s.iCallInstruction = 0;
244
245	/** @note never mess with the pgdir bitmap here! */
246	return VINF_SUCCESS;
247	}
248
249	/**
250	* Applies relocations to data and code managed by this
251	* component. This function will be called at init and
252	* whenever the VMM need to relocate itself inside the GC.
253	*
254	* The csam will update the addresses used by the switcher.
255	*
256	* @param pVM The VM.
257	* @param offDelta Relocation delta.
258	*/
259	VMMR3DECL(void) CSAMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
260	{
261	if (offDelta)
262	{
263	/* Adjust pgdir and page bitmap pointers. */
264	pVM->csam.s.pPDBitmapGC = MMHyperR3ToRC(pVM, pVM->csam.s.pPDGCBitmapHC);
265	pVM->csam.s.pPDHCBitmapGC = MMHyperR3ToRC(pVM, pVM->csam.s.pPDBitmapHC);
266
267	for(int i=0;i<CSAM_PGDIRBMP_CHUNKS;i++)
268	{
269	if (pVM->csam.s.pPDGCBitmapHC[i])
270	{
271	pVM->csam.s.pPDGCBitmapHC[i] += offDelta;
272	}
273	}
274	}
275	return;
276	}
277
278	/**
279	* Terminates the csam.
280	*
281	* Termination means cleaning up and freeing all resources,
282	* the VM it self is at this point powered off or suspended.
283	*
284	* @returns VBox status code.
285	* @param pVM The VM to operate on.
286	*/
287	VMMR3DECL(int) CSAMR3Term(PVM pVM)
288	{
289	int rc;
290
291	rc = CSAMR3Reset(pVM);
292	AssertRC(rc);
293
294	/* @todo triggers assertion in MMHyperFree */
295	#if 0
296	for(int i=0;i<CSAM_PAGEBMP_CHUNKS;i++)
297	{
298	if (pVM->csam.s.pPDBitmapHC[i])
299	MMHyperFree(pVM, pVM->csam.s.pPDBitmapHC[i]);
300	}
301	#endif
302
303	return VINF_SUCCESS;
304	}
305
306	/**
307	* CSAM reset callback.
308	*
309	* @returns VBox status code.
310	* @param pVM The VM which is reset.
311	*/
312	VMMR3DECL(int) CSAMR3Reset(PVM pVM)
313	{
314	/* Clear page bitmaps. */
315	for(int i=0;i<CSAM_PGDIRBMP_CHUNKS;i++)
316	{
317	if (pVM->csam.s.pPDBitmapHC[i])
318	{
319	Assert((CSAM_PAGE_BITMAP_SIZE& 3) == 0);
320	ASMMemZero32(pVM->csam.s.pPDBitmapHC[i], CSAM_PAGE_BITMAP_SIZE);
321	}
322	}
323
324	/* Remove all CSAM page records. */
325	while(true)
326	{
327	PCSAMPAGEREC pPageRec = (PCSAMPAGEREC)RTAvlPVGetBestFit(&pVM->csam.s.pPageTree, 0, true);
328	if (pPageRec)
329	{
330	csamRemovePageRecord(pVM, pPageRec->page.pPageGC);
331	}
332	else
333	break;
334	}
335	Assert(!pVM->csam.s.pPageTree);
336
337	csamReinit(pVM);
338
339	return VINF_SUCCESS;
340	}
341
342
343	/**
344	* Callback function for RTAvlPVDoWithAll
345	*
346	* Counts the number of records in the tree
347	*
348	* @returns VBox status code.
349	* @param pNode Current node
350	* @param pcPatches Pointer to patch counter
351	*/
352	static DECLCALLBACK(int) CountRecord(PAVLPVNODECORE pNode, void *pcPatches)
353	{
354	(uint32_t )pcPatches = (uint32_t )pcPatches + 1;
355	return VINF_SUCCESS;
356	}
357
358	/**
359	* Callback function for RTAvlPVDoWithAll
360	*
361	* Saves the state of the page record
362	*
363	* @returns VBox status code.
364	* @param pNode Current node
365	* @param pVM1 VM Handle
366	*/
367	static DECLCALLBACK(int) SavePageState(PAVLPVNODECORE pNode, void *pVM1)
368	{
369	PVM pVM = (PVM)pVM1;
370	PCSAMPAGEREC pPage = (PCSAMPAGEREC)pNode;
371	CSAMPAGEREC page = *pPage;
372	PSSMHANDLE pSSM = pVM->csam.s.savedstate.pSSM;
373	int rc;
374
375	/* Save the page record itself */
376	rc = SSMR3PutMem(pSSM, &page, sizeof(page));
377	AssertRCReturn(rc, rc);
378
379	if (page.page.pBitmap)
380	{
381	rc = SSMR3PutMem(pSSM, page.page.pBitmap, CSAM_PAGE_BITMAP_SIZE);
382	AssertRCReturn(rc, rc);
383	}
384
385	return VINF_SUCCESS;
386	}
387
388	/**
389	* Execute state save operation.
390	*
391	* @returns VBox status code.
392	* @param pVM VM Handle.
393	* @param pSSM SSM operation handle.
394	*/
395	static DECLCALLBACK(int) csamr3Save(PVM pVM, PSSMHANDLE pSSM)
396	{
397	CSAM csamInfo = pVM->csam.s;
398	int rc;
399
400	/*
401	* Count the number of page records in the tree (feeling lazy)
402	*/
403	csamInfo.savedstate.cPageRecords = 0;
404	RTAvlPVDoWithAll(&pVM->csam.s.pPageTree, true, CountRecord, &csamInfo.savedstate.cPageRecords);
405
406	/*
407	* Save CSAM structure
408	*/
409	pVM->csam.s.savedstate.pSSM = pSSM;
410	rc = SSMR3PutMem(pSSM, &csamInfo, sizeof(csamInfo));
411	AssertRCReturn(rc, rc);
412
413	/* Save pgdir bitmap */
414	rc = SSMR3PutMem(pSSM, csamInfo.pPDBitmapHC, CSAM_PGDIRBMP_CHUNKS*sizeof(RTHCPTR));
415	AssertRCReturn(rc, rc);
416
417	for (unsigned i=0;i<CSAM_PGDIRBMP_CHUNKS;i++)
418	{
419	if(csamInfo.pPDBitmapHC[i])
420	{
421	/* Save the page bitmap. */
422	rc = SSMR3PutMem(pSSM, csamInfo.pPDBitmapHC[i], CSAM_PAGE_BITMAP_SIZE);
423	AssertRCReturn(rc, rc);
424	}
425	}
426
427	/*
428	* Save page records
429	*/
430	rc = RTAvlPVDoWithAll(&pVM->csam.s.pPageTree, true, SavePageState, pVM);
431	AssertRCReturn(rc, rc);
432
433	/** @note we don't restore aDangerousInstr; it will be recreated automatically. */
434	return VINF_SUCCESS;
435	}
436
437	/**
438	* Execute state load operation.
439	*
440	* @returns VBox status code.
441	* @param pVM VM Handle.
442	* @param pSSM SSM operation handle.
443	* @param uVersion Data layout version.
444	* @param uPhase The data phase.
445	*/
446	static DECLCALLBACK(int) csamr3Load(PVM pVM, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPhase)
447	{
448	int rc;
449	CSAM csamInfo;
450
451	Assert(uPhase == SSM_PHASE_FINAL); NOREF(uPhase);
452	if (uVersion != CSAM_SSM_VERSION)
453	{
454	AssertMsgFailed(("csamR3Load: Invalid version uVersion=%d!\n", uVersion));
455	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
456	}
457
458	pVM->csam.s.savedstate.pSSM = pSSM;
459
460	/*
461	* Restore CSAM structure
462	*/
463	rc = SSMR3GetMem(pSSM, &csamInfo, sizeof(csamInfo));
464	AssertRCReturn(rc, rc);
465
466	pVM->csam.s.fGatesChecked = csamInfo.fGatesChecked;
467	pVM->csam.s.fScanningStarted = csamInfo.fScanningStarted;
468
469	/* Restore dirty code page info. */
470	pVM->csam.s.cDirtyPages = csamInfo.cDirtyPages;
471	memcpy(pVM->csam.s.pvDirtyBasePage, csamInfo.pvDirtyBasePage, sizeof(pVM->csam.s.pvDirtyBasePage));
472	memcpy(pVM->csam.s.pvDirtyFaultPage, csamInfo.pvDirtyFaultPage, sizeof(pVM->csam.s.pvDirtyFaultPage));
473
474	/* Restore possible code page */
475	pVM->csam.s.cPossibleCodePages = csamInfo.cPossibleCodePages;
476	memcpy(pVM->csam.s.pvPossibleCodePage, csamInfo.pvPossibleCodePage, sizeof(pVM->csam.s.pvPossibleCodePage));
477
478	/* Restore pgdir bitmap (we'll change the pointers next). */
479	rc = SSMR3GetMem(pSSM, pVM->csam.s.pPDBitmapHC, CSAM_PGDIRBMP_CHUNKS*sizeof(RTHCPTR));
480	AssertRCReturn(rc, rc);
481
482	/*
483	* Restore page bitmaps
484	*/
485	for (unsigned i=0;i<CSAM_PGDIRBMP_CHUNKS;i++)
486	{
487	if(pVM->csam.s.pPDBitmapHC[i])
488	{
489	rc = MMHyperAlloc(pVM, CSAM_PAGE_BITMAP_SIZE, 0, MM_TAG_CSAM, (void **)&pVM->csam.s.pPDBitmapHC[i]);
490	if (RT_FAILURE(rc))
491	{
492	Log(("MMHyperAlloc failed with %Rrc\n", rc));
493	return rc;
494	}
495	/* Convert to GC pointer. */
496	pVM->csam.s.pPDGCBitmapHC[i] = MMHyperR3ToRC(pVM, pVM->csam.s.pPDBitmapHC[i]);
497	Assert(pVM->csam.s.pPDGCBitmapHC[i]);
498
499	/* Restore the bitmap. */
500	rc = SSMR3GetMem(pSSM, pVM->csam.s.pPDBitmapHC[i], CSAM_PAGE_BITMAP_SIZE);
501	AssertRCReturn(rc, rc);
502	}
503	else
504	{
505	Assert(!pVM->csam.s.pPDGCBitmapHC[i]);
506	pVM->csam.s.pPDGCBitmapHC[i] = 0;
507	}
508	}
509
510	/*
511	* Restore page records
512	*/
513	for (uint32_t i=0;i<csamInfo.savedstate.cPageRecords + csamInfo.savedstate.cPatchPageRecords;i++)
514	{
515	CSAMPAGEREC page;
516	PCSAMPAGE pPage;
517
518	rc = SSMR3GetMem(pSSM, &page, sizeof(page));
519	AssertRCReturn(rc, rc);
520
521	/*
522	* Recreate the page record
523	*/
524	pPage = csamCreatePageRecord(pVM, page.page.pPageGC, page.page.enmTag, page.page.fCode32, page.page.fMonitorInvalidation);
525	AssertReturn(pPage, VERR_NO_MEMORY);
526
527	pPage->GCPhys = page.page.GCPhys;
528	pPage->fFlags = page.page.fFlags;
529	pPage->u64Hash = page.page.u64Hash;
530
531	if (page.page.pBitmap)
532	{
533	rc = SSMR3GetMem(pSSM, pPage->pBitmap, CSAM_PAGE_BITMAP_SIZE);
534	AssertRCReturn(rc, rc);
535	}
536	else
537	{
538	MMR3HeapFree(pPage->pBitmap);
539	pPage->pBitmap = 0;
540	}
541	}
542
543	/** @note we don't restore aDangerousInstr; it will be recreated automatically. */
544	memset(&pVM->csam.s.aDangerousInstr, 0, sizeof(pVM->csam.s.aDangerousInstr));
545	pVM->csam.s.cDangerousInstr = 0;
546	pVM->csam.s.iDangerousInstr = 0;
547	return VINF_SUCCESS;
548	}
549
550	/**
551	* Convert guest context address to host context pointer
552	*
553	* @returns VBox status code.
554	* @param pVM The VM to operate on.
555	* @param pCacheRec Address conversion cache record
556	* @param pGCPtr Guest context pointer
557	*
558	* @returns Host context pointer or NULL in case of an error
559	*
560	*/
561	static R3PTRTYPE(void ) CSAMGCVirtToHCVirt(PVM pVM, PCSAMP2GLOOKUPREC pCacheRec, RCPTRTYPE(uint8_t ) pGCPtr)
562	{
563	int rc;
564	R3PTRTYPE(void *) pHCPtr;
565	Assert(pVM->cCPUs == 1);
566	PVMCPU pVCpu = VMMGetCpu0(pVM);
567
568	STAM_PROFILE_START(&pVM->csam.s.StatTimeAddrConv, a);
569
570	pHCPtr = PATMR3GCPtrToHCPtr(pVM, pGCPtr);
571	if (pHCPtr) return pHCPtr;
572
573	if (pCacheRec->pPageLocStartHC)
574	{
575	uint32_t offset = pGCPtr & PAGE_OFFSET_MASK;
576	if (pCacheRec->pGuestLoc == (pGCPtr & PAGE_BASE_GC_MASK))
577	{
578	STAM_PROFILE_STOP(&pVM->csam.s.StatTimeAddrConv, a);
579	return pCacheRec->pPageLocStartHC + offset;
580	}
581	}
582
583	rc = PGMPhysGCPtr2R3Ptr(pVCpu, pGCPtr, &pHCPtr);
584	if (rc != VINF_SUCCESS)
585	{
586	//// AssertMsgRC(rc, ("MMR3PhysGCVirt2HCVirtEx failed for %RRv\n", pGCPtr));
587	STAM_PROFILE_STOP(&pVM->csam.s.StatTimeAddrConv, a);
588	return NULL;
589	}
590
591	pCacheRec->pPageLocStartHC = (R3PTRTYPE(uint8_t*))((RTHCUINTPTR)pHCPtr & PAGE_BASE_HC_MASK);
592	pCacheRec->pGuestLoc = pGCPtr & PAGE_BASE_GC_MASK;
593	STAM_PROFILE_STOP(&pVM->csam.s.StatTimeAddrConv, a);
594	return pHCPtr;
595	}
596
597	/**
598	* Read callback for disassembly function; supports reading bytes that cross a page boundary
599	*
600	* @returns VBox status code.
601	* @param pSrc GC source pointer
602	* @param pDest HC destination pointer
603	* @param size Number of bytes to read
604	* @param dwUserdata Callback specific user data (pCpu)
605	*
606	*/
607	static DECLCALLBACK(int) CSAMR3ReadBytes(RTUINTPTR pSrc, uint8_t pDest, unsigned size, void pvUserdata)
608	{
609	DISCPUSTATE pCpu = (DISCPUSTATE )pvUserdata;
610	PVM pVM = (PVM)pCpu->apvUserData[0];
611	RTHCUINTPTR pInstrHC = (RTHCUINTPTR)pCpu->apvUserData[1];
612	RTGCUINTPTR32 pInstrGC = (uintptr_t)pCpu->apvUserData[2];
613	int orgsize = size;
614	Assert(pVM->cCPUs == 1);
615	PVMCPU pVCpu = VMMGetCpu0(pVM);
616
617	/* We are not interested in patched instructions, so read the original opcode bytes. */
618	/** @note single instruction patches (int3) are checked in CSAMR3AnalyseCallback */
619	for (int i=0;i<orgsize;i++)
620	{
621	int rc = PATMR3QueryOpcode(pVM, (RTRCPTR)pSrc, pDest);
622	if (RT_SUCCESS(rc))
623	{
624	pSrc++;
625	pDest++;
626	size--;
627	}
628	else
629	break;
630	}
631	if (size == 0)
632	return VINF_SUCCESS;
633
634	if (PAGE_ADDRESS(pInstrGC) != PAGE_ADDRESS(pSrc + size - 1) && !PATMIsPatchGCAddr(pVM, pSrc))
635	{
636	return PGMPhysSimpleReadGCPtr(pVCpu, pDest, pSrc, size);
637	}
638	else
639	{
640	Assert(pInstrHC);
641
642	/* pInstrHC is the base address; adjust according to the GC pointer. */
643	pInstrHC = pInstrHC + (pSrc - pInstrGC);
644
645	memcpy(pDest, (void *)pInstrHC, size);
646	}
647
648	return VINF_SUCCESS;
649	}
650
651	inline int CSAMR3DISInstr(PVM pVM, DISCPUSTATE pCpu, RTRCPTR InstrGC, uint8_t InstrHC, uint32_t pOpsize, char pszOutput)
652	{
653	(pCpu)->pfnReadBytes = CSAMR3ReadBytes;
654	(pCpu)->apvUserData[0] = pVM;
655	(pCpu)->apvUserData[1] = InstrHC;
656	(pCpu)->apvUserData[2] = (void *)InstrGC; Assert(sizeof(InstrGC) <= sizeof(pCpu->apvUserData[0]));
657	#ifdef DEBUG
658	return DISInstrEx(pCpu, InstrGC, 0, pOpsize, pszOutput, OPTYPE_ALL);
659	#else
660	/* We are interested in everything except harmless stuff */
661	return DISInstrEx(pCpu, InstrGC, 0, pOpsize, pszOutput, ~(OPTYPE_INVALID \| OPTYPE_HARMLESS \| OPTYPE_RRM_MASK));
662	#endif
663	}
664
665	/**
666	* Analyses the instructions following the cli for compliance with our heuristics for cli
667	*
668	* @returns VBox status code.
669	* @param pVM The VM to operate on.
670	* @param pCpu CPU disassembly state
671	* @param pInstrGC Guest context pointer to privileged instruction
672	* @param pCurInstrGC Guest context pointer to the current instruction
673	* @param pCacheRec GC to HC cache record
674	* @param pUserData User pointer (callback specific)
675	*
676	*/
677	static int CSAMR3AnalyseCallback(PVM pVM, DISCPUSTATE pCpu, RCPTRTYPE(uint8_t ) pInstrGC, RCPTRTYPE(uint8_t *) pCurInstrGC,
678	PCSAMP2GLOOKUPREC pCacheRec, void *pUserData)
679	{
680	PCSAMPAGE pPage = (PCSAMPAGE)pUserData;
681	int rc;
682
683	switch(pCpu->pCurInstr->opcode)
684	{
685	case OP_INT:
686	Assert(pCpu->param1.flags & USE_IMMEDIATE8);
687	if (pCpu->param1.parval == 3)
688	{
689	//two byte int 3
690	return VINF_SUCCESS;
691	}
692	break;
693
694	case OP_ILLUD2:
695	/* This appears to be some kind of kernel panic in Linux 2.4; no point to continue. */
696	case OP_RETN:
697	case OP_INT3:
698	case OP_INVALID:
699	#if 1
700	/* removing breaks win2k guests? */
701	case OP_IRET:
702	#endif
703	return VINF_SUCCESS;
704	}
705
706	// Check for exit points
707	switch (pCpu->pCurInstr->opcode)
708	{
709	/* It's not a good idea to patch pushf instructions:
710	* - increases the chance of conflicts (code jumping to the next instruction)
711	* - better to patch the cli
712	* - code that branches before the cli will likely hit an int 3
713	* - in general doesn't offer any benefits as we don't allow nested patch blocks (IF is always 1)
714	*/
715	case OP_PUSHF:
716	case OP_POPF:
717	break;
718
719	case OP_CLI:
720	{
721	uint32_t cbInstr = 0;
722	uint32_t opsize = pCpu->opsize;
723	bool fCode32 = pPage->fCode32;
724
725	Assert(fCode32);
726
727	PATMR3AddHint(pVM, pCurInstrGC, (fCode32) ? PATMFL_CODE32 : 0);
728
729	/* Make sure the instructions that follow the cli have not been encountered before. */
730	while (true)
731	{
732	DISCPUSTATE cpu;
733	uint8_t *pCurInstrHC = 0;
734
735	if (cbInstr + opsize >= SIZEOF_NEARJUMP32)
736	break;
737
738	if (csamIsCodeScanned(pVM, pCurInstrGC + opsize, &pPage) == true)
739	{
740	/* We've scanned the next instruction(s) already. This means we've followed a branch that ended up there before -> dangerous!! */
741	PATMR3DetectConflict(pVM, pCurInstrGC, pCurInstrGC + opsize);
742	break;
743	}
744	pCurInstrGC += opsize;
745	cbInstr += opsize;
746
747	pCurInstrHC = (uint8_t *)CSAMGCVirtToHCVirt(pVM, pCacheRec, pCurInstrGC);
748	if (pCurInstrHC == NULL)
749	{
750	Log(("CSAMGCVirtToHCVirt failed for %RRv\n", pCurInstrGC));
751	break;
752	}
753	Assert(VALID_PTR(pCurInstrHC));
754
755	cpu.mode = (fCode32) ? CPUMODE_32BIT : CPUMODE_16BIT;
756	rc = CSAMR3DISInstr(pVM, &cpu, pCurInstrGC, pCurInstrHC, &opsize, NULL);
757	Assert(RT_SUCCESS(rc));
758	if (RT_FAILURE(rc))
759	break;
760	}
761	break;
762	}
763
764	case OP_PUSH:
765	if (pCpu->pCurInstr->param1 != OP_PARM_REG_CS)
766	break;
767
768	/* no break */
769	case OP_STR:
770	case OP_LSL:
771	case OP_LAR:
772	case OP_SGDT:
773	case OP_SLDT:
774	case OP_SIDT:
775	case OP_SMSW:
776	case OP_VERW:
777	case OP_VERR:
778	case OP_CPUID:
779	case OP_IRET:
780	#ifdef DEBUG
781	switch(pCpu->pCurInstr->opcode)
782	{
783	case OP_STR:
784	Log(("Privileged instruction at %RRv: str!!\n", pCurInstrGC));
785	break;
786	case OP_LSL:
787	Log(("Privileged instruction at %RRv: lsl!!\n", pCurInstrGC));
788	break;
789	case OP_LAR:
790	Log(("Privileged instruction at %RRv: lar!!\n", pCurInstrGC));
791	break;
792	case OP_SGDT:
793	Log(("Privileged instruction at %RRv: sgdt!!\n", pCurInstrGC));
794	break;
795	case OP_SLDT:
796	Log(("Privileged instruction at %RRv: sldt!!\n", pCurInstrGC));
797	break;
798	case OP_SIDT:
799	Log(("Privileged instruction at %RRv: sidt!!\n", pCurInstrGC));
800	break;
801	case OP_SMSW:
802	Log(("Privileged instruction at %RRv: smsw!!\n", pCurInstrGC));
803	break;
804	case OP_VERW:
805	Log(("Privileged instruction at %RRv: verw!!\n", pCurInstrGC));
806	break;
807	case OP_VERR:
808	Log(("Privileged instruction at %RRv: verr!!\n", pCurInstrGC));
809	break;
810	case OP_CPUID:
811	Log(("Privileged instruction at %RRv: cpuid!!\n", pCurInstrGC));
812	break;
813	case OP_PUSH:
814	Log(("Privileged instruction at %RRv: push cs!!\n", pCurInstrGC));
815	break;
816	case OP_IRET:
817	Log(("Privileged instruction at %RRv: iret!!\n", pCurInstrGC));
818	break;
819	}
820	#endif
821
822	if (PATMR3HasBeenPatched(pVM, pCurInstrGC) == false)
823	{
824	rc = PATMR3InstallPatch(pVM, pCurInstrGC, (pPage->fCode32) ? PATMFL_CODE32 : 0);
825	if (RT_FAILURE(rc))
826	{
827	Log(("PATMR3InstallPatch failed with %d\n", rc));
828	return VWRN_CONTINUE_ANALYSIS;
829	}
830	}
831	if (pCpu->pCurInstr->opcode == OP_IRET)
832	return VINF_SUCCESS; /* Look no further in this branch. */
833
834	return VWRN_CONTINUE_ANALYSIS;
835
836	case OP_JMP:
837	case OP_CALL:
838	{
839	// return or jump/call through a jump table
840	if (OP_PARM_VTYPE(pCpu->pCurInstr->param1) != OP_PARM_J)
841	{
842	#ifdef DEBUG
843	switch(pCpu->pCurInstr->opcode)
844	{
845	case OP_JMP:
846	Log(("Control Flow instruction at %RRv: jmp!!\n", pCurInstrGC));
847	break;
848	case OP_CALL:
849	Log(("Control Flow instruction at %RRv: call!!\n", pCurInstrGC));
850	break;
851	}
852	#endif
853	return VWRN_CONTINUE_ANALYSIS;
854	}
855	return VWRN_CONTINUE_ANALYSIS;
856	}
857
858	}
859
860	return VWRN_CONTINUE_ANALYSIS;
861	}
862
863	#ifdef CSAM_ANALYSE_BEYOND_RET
864	/**
865	* Wrapper for csamAnalyseCodeStream for call instructions.
866	*
867	* @returns VBox status code.
868	* @param pVM The VM to operate on.
869	* @param pInstrGC Guest context pointer to privileged instruction
870	* @param pCurInstrGC Guest context pointer to the current instruction
871	* @param fCode32 16 or 32 bits code
872	* @param pfnCSAMR3Analyse Callback for testing the disassembled instruction
873	* @param pUserData User pointer (callback specific)
874	*
875	*/
876	static int csamAnalyseCallCodeStream(PVM pVM, RCPTRTYPE(uint8_t ) pInstrGC, RCPTRTYPE(uint8_t ) pCurInstrGC, bool fCode32,
877	PFN_CSAMR3ANALYSE pfnCSAMR3Analyse, void *pUserData, PCSAMP2GLOOKUPREC pCacheRec)
878	{
879	int rc;
880	CSAMCALLEXITREC CallExitRec;
881	PCSAMCALLEXITREC pOldCallRec;
882	PCSAMPAGE pPage = 0;
883	uint32_t i;
884
885	CallExitRec.cInstrAfterRet = 0;
886
887	pOldCallRec = pCacheRec->pCallExitRec;
888	pCacheRec->pCallExitRec = &CallExitRec;
889
890	rc = csamAnalyseCodeStream(pVM, pInstrGC, pCurInstrGC, fCode32, pfnCSAMR3Analyse, pUserData, pCacheRec);
891
892	for (i=0;i<CallExitRec.cInstrAfterRet;i++)
893	{
894	PCSAMPAGE pPage = 0;
895
896	pCurInstrGC = CallExitRec.pInstrAfterRetGC[i];
897
898	/* Check if we've previously encountered the instruction after the ret. */
899	if (csamIsCodeScanned(pVM, pCurInstrGC, &pPage) == false)
900	{
901	DISCPUSTATE cpu;
902	uint32_t opsize;
903	uint8_t *pCurInstrHC = 0;
904	int rc2;
905	#ifdef DEBUG
906	char szOutput[256];
907	#endif
908	if (pPage == NULL)
909	{
910	/* New address; let's take a look at it. */
911	pPage = csamCreatePageRecord(pVM, pCurInstrGC, CSAM_TAG_CSAM, fCode32);
912	if (pPage == NULL)
913	{
914	rc = VERR_NO_MEMORY;
915	goto done;
916	}
917	}
918
919	/**
920	* Some generic requirements for recognizing an adjacent function:
921	* - alignment fillers that consist of:
922	* - nop
923	* - lea genregX, [genregX (+ 0)]
924	* - push ebp after the filler (can extend this later); aligned at at least a 4 byte boundary
925	*/
926	for (int j=0;j<16;j++)
927	{
928	pCurInstrHC = (uint8_t *)CSAMGCVirtToHCVirt(pVM, pCacheRec, pCurInstrGC);
929	if (pCurInstrHC == NULL)
930	{
931	Log(("CSAMGCVirtToHCVirt failed for %RRv\n", pCurInstrGC));
932	goto done;
933	}
934	Assert(VALID_PTR(pCurInstrHC));
935
936	cpu.mode = (fCode32) ? CPUMODE_32BIT : CPUMODE_16BIT;
937	STAM_PROFILE_START(&pVM->csam.s.StatTimeDisasm, a);
938	#ifdef DEBUG
939	rc2 = CSAMR3DISInstr(pVM, &cpu, pCurInstrGC, pCurInstrHC, &opsize, szOutput);
940	if (RT_SUCCESS(rc2)) Log(("CSAM Call Analysis: %s", szOutput));
941	#else
942	rc2 = CSAMR3DISInstr(pVM, &cpu, pCurInstrGC, pCurInstrHC, &opsize, NULL);
943	#endif
944	STAM_PROFILE_STOP(&pVM->csam.s.StatTimeDisasm, a);
945	if (RT_FAILURE(rc2))
946	{
947	Log(("Disassembly failed at %RRv with %Rrc (probably page not present) -> return to caller\n", pCurInstrGC, rc2));
948	goto done;
949	}
950
951	STAM_COUNTER_ADD(&pVM->csam.s.StatNrBytesRead, opsize);
952
953	RCPTRTYPE(uint8_t *) addr = 0;
954	PCSAMPAGE pJmpPage = NULL;
955
956	if (PAGE_ADDRESS(pCurInstrGC) != PAGE_ADDRESS(pCurInstrGC + opsize - 1))
957	{
958	if (!PGMGstIsPagePresent(pVM, pCurInstrGC + opsize - 1))
959	{
960	/// @todo fault in the page
961	Log(("Page for current instruction %RRv is not present!!\n", pCurInstrGC));
962	goto done;
963	}
964	//all is fine, let's continue
965	csamR3CheckPageRecord(pVM, pCurInstrGC + opsize - 1);
966	}
967
968	switch (cpu.pCurInstr->opcode)
969	{
970	case OP_NOP:
971	case OP_INT3:
972	break; /* acceptable */
973
974	case OP_LEA:
975	/* Must be similar to:
976	*
977	* lea esi, [esi]
978	* lea esi, [esi+0]
979	* Any register is allowed as long as source and destination are identical.
980	*/
981	if ( cpu.param1.flags != USE_REG_GEN32
982	\|\| ( cpu.param2.flags != USE_REG_GEN32
983	&& ( !(cpu.param2.flags & USE_REG_GEN32)
984	\|\| !(cpu.param2.flags & (USE_DISPLACEMENT8\|USE_DISPLACEMENT16\|USE_DISPLACEMENT32))
985	\|\| cpu.param2.parval != 0
986	)
987	)
988	\|\| cpu.param1.base.reg_gen32 != cpu.param2.base.reg_gen32
989	)
990	{
991	STAM_COUNTER_INC(&pVM->csam.s.StatScanNextFunctionFailed);
992	goto next_function;
993	}
994	break;
995
996	case OP_PUSH:
997	{
998	if ( (pCurInstrGC & 0x3) != 0
999	\|\| cpu.param1.flags != USE_REG_GEN32
1000	\|\| cpu.param1.base.reg_gen32 != USE_REG_EBP
1001	)
1002	{
1003	STAM_COUNTER_INC(&pVM->csam.s.StatScanNextFunctionFailed);
1004	goto next_function;
1005	}
1006
1007	if (csamIsCodeScanned(pVM, pCurInstrGC, &pPage) == false)
1008	{
1009	CSAMCALLEXITREC CallExitRec2;
1010	CallExitRec2.cInstrAfterRet = 0;
1011
1012	pCacheRec->pCallExitRec = &CallExitRec2;
1013
1014	/* Analyse the function. */
1015	Log(("Found new function at %RRv\n", pCurInstrGC));
1016	STAM_COUNTER_INC(&pVM->csam.s.StatScanNextFunction);
1017	csamAnalyseCallCodeStream(pVM, pInstrGC, pCurInstrGC, fCode32, pfnCSAMR3Analyse, pUserData, pCacheRec);
1018	}
1019	goto next_function;
1020	}
1021
1022	case OP_SUB:
1023	{
1024	if ( (pCurInstrGC & 0x3) != 0
1025	\|\| cpu.param1.flags != USE_REG_GEN32
1026	\|\| cpu.param1.base.reg_gen32 != USE_REG_ESP
1027	)
1028	{
1029	STAM_COUNTER_INC(&pVM->csam.s.StatScanNextFunctionFailed);
1030	goto next_function;
1031	}
1032
1033	if (csamIsCodeScanned(pVM, pCurInstrGC, &pPage) == false)
1034	{
1035	CSAMCALLEXITREC CallExitRec2;
1036	CallExitRec2.cInstrAfterRet = 0;
1037
1038	pCacheRec->pCallExitRec = &CallExitRec2;
1039
1040	/* Analyse the function. */
1041	Log(("Found new function at %RRv\n", pCurInstrGC));
1042	STAM_COUNTER_INC(&pVM->csam.s.StatScanNextFunction);
1043	csamAnalyseCallCodeStream(pVM, pInstrGC, pCurInstrGC, fCode32, pfnCSAMR3Analyse, pUserData, pCacheRec);
1044	}
1045	goto next_function;
1046	}
1047
1048	default:
1049	STAM_COUNTER_INC(&pVM->csam.s.StatScanNextFunctionFailed);
1050	goto next_function;
1051	}
1052	/* Mark it as scanned. */
1053	csamMarkCode(pVM, pPage, pCurInstrGC, opsize, true);
1054	pCurInstrGC += opsize;
1055	} /* for at most 16 instructions */
1056	next_function:
1057	; /* MSVC complains otherwise */
1058	}
1059	}
1060	done:
1061	pCacheRec->pCallExitRec = pOldCallRec;
1062	return rc;
1063	}
1064	#else
1065	#define csamAnalyseCallCodeStream csamAnalyseCodeStream
1066	#endif
1067
1068	/**
1069	* Disassembles the code stream until the callback function detects a failure or decides everything is acceptable
1070	*
1071	* @returns VBox status code.
1072	* @param pVM The VM to operate on.
1073	* @param pInstrGC Guest context pointer to privileged instruction
1074	* @param pCurInstrGC Guest context pointer to the current instruction
1075	* @param fCode32 16 or 32 bits code
1076	* @param pfnCSAMR3Analyse Callback for testing the disassembled instruction
1077	* @param pUserData User pointer (callback specific)
1078	*
1079	*/
1080	static int csamAnalyseCodeStream(PVM pVM, RCPTRTYPE(uint8_t ) pInstrGC, RCPTRTYPE(uint8_t ) pCurInstrGC, bool fCode32,
1081	PFN_CSAMR3ANALYSE pfnCSAMR3Analyse, void *pUserData, PCSAMP2GLOOKUPREC pCacheRec)
1082	{
1083	DISCPUSTATE cpu;
1084	PCSAMPAGE pPage = (PCSAMPAGE)pUserData;
1085	int rc = VWRN_CONTINUE_ANALYSIS;
1086	uint32_t opsize;
1087	R3PTRTYPE(uint8_t *) pCurInstrHC = 0;
1088	int rc2;
1089	Assert(pVM->cCPUs == 1);
1090	PVMCPU pVCpu = VMMGetCpu0(pVM);
1091
1092	#ifdef DEBUG
1093	char szOutput[256];
1094	#endif
1095
1096	LogFlow(("csamAnalyseCodeStream: code at %RRv depth=%d\n", pCurInstrGC, pCacheRec->depth));
1097
1098	pVM->csam.s.fScanningStarted = true;
1099
1100	pCacheRec->depth++;
1101	/*
1102	* Limit the call depth. (rather arbitrary upper limit; too low and we won't detect certain
1103	* cpuid instructions in Linux kernels; too high and we waste too much time scanning code)
1104	* (512 is necessary to detect cpuid instructions in Red Hat EL4; see defect 1355)
1105	* @note we are using a lot of stack here. couple of 100k when we go to the full depth (!)
1106	*/
1107	if (pCacheRec->depth > 512)
1108	{
1109	LogFlow(("CSAM: maximum calldepth reached for %RRv\n", pCurInstrGC));
1110	pCacheRec->depth--;
1111	return VINF_SUCCESS; //let's not go on forever
1112	}
1113
1114	Assert(!PATMIsPatchGCAddr(pVM, pCurInstrGC));
1115	csamR3CheckPageRecord(pVM, pCurInstrGC);
1116
1117	while(rc == VWRN_CONTINUE_ANALYSIS)
1118	{
1119	if (csamIsCodeScanned(pVM, pCurInstrGC, &pPage) == false)
1120	{
1121	if (pPage == NULL)
1122	{
1123	/* New address; let's take a look at it. */
1124	pPage = csamCreatePageRecord(pVM, pCurInstrGC, CSAM_TAG_CSAM, fCode32);
1125	if (pPage == NULL)
1126	{
1127	rc = VERR_NO_MEMORY;
1128	goto done;
1129	}
1130	}
1131	}
1132	else
1133	{
1134	LogFlow(("Code at %RRv has been scanned before\n", pCurInstrGC));
1135	rc = VINF_SUCCESS;
1136	goto done;
1137	}
1138
1139	pCurInstrHC = (uint8_t *)CSAMGCVirtToHCVirt(pVM, pCacheRec, pCurInstrGC);
1140	if (pCurInstrHC == NULL)
1141	{
1142	Log(("CSAMGCVirtToHCVirt failed for %RRv\n", pCurInstrGC));
1143	rc = VERR_PATCHING_REFUSED;
1144	goto done;
1145	}
1146	Assert(VALID_PTR(pCurInstrHC));
1147
1148	cpu.mode = (fCode32) ? CPUMODE_32BIT : CPUMODE_16BIT;
1149	STAM_PROFILE_START(&pVM->csam.s.StatTimeDisasm, a);
1150	#ifdef DEBUG
1151	rc2 = CSAMR3DISInstr(pVM, &cpu, pCurInstrGC, pCurInstrHC, &opsize, szOutput);
1152	if (RT_SUCCESS(rc2)) Log(("CSAM Analysis: %s", szOutput));
1153	#else
1154	rc2 = CSAMR3DISInstr(pVM, &cpu, pCurInstrGC, pCurInstrHC, &opsize, NULL);
1155	#endif
1156	STAM_PROFILE_STOP(&pVM->csam.s.StatTimeDisasm, a);
1157	if (RT_FAILURE(rc2))
1158	{
1159	Log(("Disassembly failed at %RRv with %Rrc (probably page not present) -> return to caller\n", pCurInstrGC, rc2));
1160	rc = VINF_SUCCESS;
1161	goto done;
1162	}
1163
1164	STAM_COUNTER_ADD(&pVM->csam.s.StatNrBytesRead, opsize);
1165
1166	csamMarkCode(pVM, pPage, pCurInstrGC, opsize, true);
1167
1168	RCPTRTYPE(uint8_t *) addr = 0;
1169	PCSAMPAGE pJmpPage = NULL;
1170
1171	if (PAGE_ADDRESS(pCurInstrGC) != PAGE_ADDRESS(pCurInstrGC + opsize - 1))
1172	{
1173	if (!PGMGstIsPagePresent(pVCpu, pCurInstrGC + opsize - 1))
1174	{
1175	/// @todo fault in the page
1176	Log(("Page for current instruction %RRv is not present!!\n", pCurInstrGC));
1177	rc = VWRN_CONTINUE_ANALYSIS;
1178	goto next_please;
1179	}
1180	//all is fine, let's continue
1181	csamR3CheckPageRecord(pVM, pCurInstrGC + opsize - 1);
1182	}
1183	/*
1184	* If it's harmless, then don't bother checking it (the disasm tables had better be accurate!)
1185	*/
1186	if ((cpu.pCurInstr->optype & ~OPTYPE_RRM_MASK) == OPTYPE_HARMLESS)
1187	{
1188	AssertMsg(pfnCSAMR3Analyse(pVM, &cpu, pInstrGC, pCurInstrGC, pCacheRec, (void *)pPage) == VWRN_CONTINUE_ANALYSIS, ("Instruction incorrectly marked harmless?!?!?\n"));
1189	rc = VWRN_CONTINUE_ANALYSIS;
1190	goto next_please;
1191	}
1192
1193	#ifdef CSAM_ANALYSE_BEYOND_RET
1194	/* Remember the address of the instruction following the ret in case the parent instruction was a call. */
1195	if ( pCacheRec->pCallExitRec
1196	&& cpu.pCurInstr->opcode == OP_RETN
1197	&& pCacheRec->pCallExitRec->cInstrAfterRet < CSAM_MAX_CALLEXIT_RET)
1198	{
1199	pCacheRec->pCallExitRec->pInstrAfterRetGC[pCacheRec->pCallExitRec->cInstrAfterRet] = pCurInstrGC + opsize;
1200	pCacheRec->pCallExitRec->cInstrAfterRet++;
1201	}
1202	#endif
1203
1204	rc = pfnCSAMR3Analyse(pVM, &cpu, pInstrGC, pCurInstrGC, pCacheRec, (void *)pPage);
1205	if (rc == VINF_SUCCESS)
1206	goto done;
1207
1208	// For our first attempt, we'll handle only simple relative jumps and calls (immediate offset coded in instruction)
1209	if ( ((cpu.pCurInstr->optype & OPTYPE_CONTROLFLOW) && (OP_PARM_VTYPE(cpu.pCurInstr->param1) == OP_PARM_J))
1210	\|\| (cpu.pCurInstr->opcode == OP_CALL && cpu.param1.flags == USE_DISPLACEMENT32)) /* simple indirect call (call dword ptr [address]) */
1211	{
1212	/* We need to parse 'call dword ptr [address]' type of calls to catch cpuid instructions in some recent Linux distributions (e.g. OpenSuse 10.3) */
1213	if ( cpu.pCurInstr->opcode == OP_CALL
1214	&& cpu.param1.flags == USE_DISPLACEMENT32)
1215	{
1216	addr = 0;
1217	PGMPhysSimpleReadGCPtr(pVCpu, &addr, (RTRCUINTPTR)cpu.param1.disp32, sizeof(addr));
1218	}
1219	else
1220	addr = CSAMResolveBranch(&cpu, pCurInstrGC);
1221
1222	if (addr == 0)
1223	{
1224	Log(("We don't support far jumps here!! (%08X)\n", cpu.param1.flags));
1225	rc = VINF_SUCCESS;
1226	break;
1227	}
1228	Assert(!PATMIsPatchGCAddr(pVM, addr));
1229
1230	/* If the target address lies in a patch generated jump, then special action needs to be taken. */
1231	PATMR3DetectConflict(pVM, pCurInstrGC, addr);
1232
1233	/* Same page? */
1234	if (PAGE_ADDRESS(addr) != PAGE_ADDRESS(pCurInstrGC ))
1235	{
1236	if (!PGMGstIsPagePresent(pVCpu, addr))
1237	{
1238	Log(("Page for current instruction %RRv is not present!!\n", addr));
1239	rc = VWRN_CONTINUE_ANALYSIS;
1240	goto next_please;
1241	}
1242
1243	/* All is fine, let's continue. */
1244	csamR3CheckPageRecord(pVM, addr);
1245	}
1246
1247	pJmpPage = NULL;
1248	if (csamIsCodeScanned(pVM, addr, &pJmpPage) == false)
1249	{
1250	if (pJmpPage == NULL)
1251	{
1252	/* New branch target; let's take a look at it. */
1253	pJmpPage = csamCreatePageRecord(pVM, addr, CSAM_TAG_CSAM, fCode32);
1254	if (pJmpPage == NULL)
1255	{
1256	rc = VERR_NO_MEMORY;
1257	goto done;
1258	}
1259	Assert(pPage);
1260	}
1261	if (cpu.pCurInstr->opcode == OP_CALL)
1262	rc = csamAnalyseCallCodeStream(pVM, pInstrGC, addr, fCode32, pfnCSAMR3Analyse, (void *)pJmpPage, pCacheRec);
1263	else
1264	rc = csamAnalyseCodeStream(pVM, pInstrGC, addr, fCode32, pfnCSAMR3Analyse, (void *)pJmpPage, pCacheRec);
1265
1266	if (rc != VINF_SUCCESS) {
1267	goto done;
1268	}
1269	}
1270	if (cpu.pCurInstr->opcode == OP_JMP)
1271	{//unconditional jump; return to caller
1272	rc = VINF_SUCCESS;
1273	goto done;
1274	}
1275
1276	rc = VWRN_CONTINUE_ANALYSIS;
1277	} //if ((cpu.pCurInstr->optype & OPTYPE_CONTROLFLOW) && (OP_PARM_VTYPE(cpu.pCurInstr->param1) == OP_PARM_J))
1278	#ifdef CSAM_SCAN_JUMP_TABLE
1279	else
1280	if ( cpu.pCurInstr->opcode == OP_JMP
1281	&& (cpu.param1.flags & (USE_DISPLACEMENT32\|USE_INDEX\|USE_SCALE)) == (USE_DISPLACEMENT32\|USE_INDEX\|USE_SCALE)
1282	)
1283	{
1284	RTRCPTR pJumpTableGC = (RTRCPTR)cpu.param1.disp32;
1285	uint8_t *pJumpTableHC;
1286	int rc2;
1287
1288	Log(("Jump through jump table\n"));
1289
1290	rc2 = PGMPhysGCPtr2R3Ptr(pVCpu, pJumpTableGC, (PRTHCPTR)&pJumpTableHC);
1291	if (rc2 == VINF_SUCCESS)
1292	{
1293	for (uint32_t i=0;i<2;i++)
1294	{
1295	uint64_t fFlags;
1296
1297	addr = pJumpTableGC + cpu.param1.scale * i;
1298	/* Same page? */
1299	if (PAGE_ADDRESS(addr) != PAGE_ADDRESS(pJumpTableGC))
1300	break;
1301
1302	addr = (RTRCPTR )(pJumpTableHC + cpu.param1.scale * i);
1303
1304	rc2 = PGMGstGetPage(pVCpu, addr, &fFlags, NULL);
1305	if ( rc2 != VINF_SUCCESS
1306	\|\| (fFlags & X86_PTE_US)
1307	\|\| !(fFlags & X86_PTE_P)
1308	)
1309	break;
1310
1311	Log(("Jump to %RRv\n", addr));
1312
1313	pJmpPage = NULL;
1314	if (csamIsCodeScanned(pVM, addr, &pJmpPage) == false)
1315	{
1316	if (pJmpPage == NULL)
1317	{
1318	/* New branch target; let's take a look at it. */
1319	pJmpPage = csamCreatePageRecord(pVM, addr, CSAM_TAG_CSAM, fCode32);
1320	if (pJmpPage == NULL)
1321	{
1322	rc = VERR_NO_MEMORY;
1323	goto done;
1324	}
1325	Assert(pPage);
1326	}
1327	rc = csamAnalyseCodeStream(pVM, pInstrGC, addr, fCode32, pfnCSAMR3Analyse, (void *)pJmpPage, pCacheRec);
1328	if (rc != VINF_SUCCESS) {
1329	goto done;
1330	}
1331	}
1332	}
1333	}
1334	}
1335	#endif
1336	if (rc != VWRN_CONTINUE_ANALYSIS) {
1337	break; //done!
1338	}
1339	next_please:
1340	if (cpu.pCurInstr->opcode == OP_JMP)
1341	{
1342	rc = VINF_SUCCESS;
1343	goto done;
1344	}
1345	pCurInstrGC += opsize;
1346	}
1347	done:
1348	pCacheRec->depth--;
1349	return rc;
1350	}
1351
1352
1353	/**
1354	* Calculates the 64 bits hash value for the current page
1355	*
1356	* @returns hash value
1357	* @param pVM The VM to operate on.
1358	* @param pInstr Page address
1359	*/
1360	uint64_t csamR3CalcPageHash(PVM pVM, RTRCPTR pInstr)
1361	{
1362	uint64_t hash = 0;
1363	uint32_t val[5];
1364	int rc;
1365	Assert(pVM->cCPUs == 1);
1366	PVMCPU pVCpu = VMMGetCpu0(pVM);
1367
1368	Assert((pInstr & PAGE_OFFSET_MASK) == 0);
1369
1370	rc = PGMPhysSimpleReadGCPtr(pVCpu, &val[0], pInstr, sizeof(val[0]));
1371	AssertMsg(RT_SUCCESS(rc) \|\| rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT, ("rc = %Rrc\n", rc));
1372	if (rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT)
1373	{
1374	Log(("csamR3CalcPageHash: page %RRv not present!!\n", pInstr));
1375	return ~0ULL;
1376	}
1377
1378	rc = PGMPhysSimpleReadGCPtr(pVCpu, &val[1], pInstr+1024, sizeof(val[0]));
1379	AssertMsg(RT_SUCCESS(rc) \|\| rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT, ("rc = %Rrc\n", rc));
1380	if (rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT)
1381	{
1382	Log(("csamR3CalcPageHash: page %RRv not present!!\n", pInstr));
1383	return ~0ULL;
1384	}
1385
1386	rc = PGMPhysSimpleReadGCPtr(pVCpu, &val[2], pInstr+2048, sizeof(val[0]));
1387	AssertMsg(RT_SUCCESS(rc) \|\| rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT, ("rc = %Rrc\n", rc));
1388	if (rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT)
1389	{
1390	Log(("csamR3CalcPageHash: page %RRv not present!!\n", pInstr));
1391	return ~0ULL;
1392	}
1393
1394	rc = PGMPhysSimpleReadGCPtr(pVCpu, &val[3], pInstr+3072, sizeof(val[0]));
1395	AssertMsg(RT_SUCCESS(rc) \|\| rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT, ("rc = %Rrc\n", rc));
1396	if (rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT)
1397	{
1398	Log(("csamR3CalcPageHash: page %RRv not present!!\n", pInstr));
1399	return ~0ULL;
1400	}
1401
1402	rc = PGMPhysSimpleReadGCPtr(pVCpu, &val[4], pInstr+4092, sizeof(val[0]));
1403	AssertMsg(RT_SUCCESS(rc) \|\| rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT, ("rc = %Rrc\n", rc));
1404	if (rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT)
1405	{
1406	Log(("csamR3CalcPageHash: page %RRv not present!!\n", pInstr));
1407	return ~0ULL;
1408	}
1409
1410	// don't want to get division by zero traps
1411	val[2] \|= 1;
1412	val[4] \|= 1;
1413
1414	hash = (uint64_t)val[0] * (uint64_t)val[1] / (uint64_t)val[2] + (val[3]%val[4]);
1415	return (hash == ~0ULL) ? hash - 1 : hash;
1416	}
1417
1418
1419	/**
1420	* Notify CSAM of a page flush
1421	*
1422	* @returns VBox status code
1423	* @param pVM The VM to operate on.
1424	* @param addr GC address of the page to flush
1425	* @param fRemovePage Page removal flag
1426	*/
1427	static int csamFlushPage(PVM pVM, RTRCPTR addr, bool fRemovePage)
1428	{
1429	PCSAMPAGEREC pPageRec;
1430	int rc;
1431	RTGCPHYS GCPhys = 0;
1432	uint64_t fFlags = 0;
1433	Assert(pVM->cCPUs == 1 \|\| !CSAMIsEnabled(pVM));
1434
1435	if (!CSAMIsEnabled(pVM))
1436	return VINF_SUCCESS;
1437
1438	PVMCPU pVCpu = VMMGetCpu0(pVM);
1439
1440	STAM_PROFILE_START(&pVM->csam.s.StatTimeFlushPage, a);
1441
1442	addr = addr & PAGE_BASE_GC_MASK;
1443
1444	/*
1445	* Note: searching for the page in our tree first is more expensive (skipped flushes are two orders of magnitude more common)
1446	*/
1447	if (pVM->csam.s.pPageTree == NULL)
1448	{
1449	STAM_PROFILE_STOP(&pVM->csam.s.StatTimeFlushPage, a);
1450	return VWRN_CSAM_PAGE_NOT_FOUND;
1451	}
1452
1453	rc = PGMGstGetPage(pVCpu, addr, &fFlags, &GCPhys);
1454	/* Returned at a very early stage (no paging yet presumably). */
1455	if (rc == VERR_NOT_SUPPORTED)
1456	{
1457	STAM_PROFILE_STOP(&pVM->csam.s.StatTimeFlushPage, a);
1458	return rc;
1459	}
1460
1461	if (RT_SUCCESS(rc))
1462	{
1463	if ( (fFlags & X86_PTE_US)
1464	\|\| rc == VERR_PGM_PHYS_PAGE_RESERVED
1465	)
1466	{
1467	/* User page -> not relevant for us. */
1468	STAM_COUNTER_ADD(&pVM->csam.s.StatNrFlushesSkipped, 1);
1469	STAM_PROFILE_STOP(&pVM->csam.s.StatTimeFlushPage, a);
1470	return VINF_SUCCESS;
1471	}
1472	}
1473	else
1474	if (rc != VERR_PAGE_NOT_PRESENT && rc != VERR_PAGE_TABLE_NOT_PRESENT)
1475	AssertMsgFailed(("PGMR3GetPage %RRv failed with %Rrc\n", addr, rc));
1476
1477	pPageRec = (PCSAMPAGEREC)RTAvlPVGet(&pVM->csam.s.pPageTree, (AVLPVKEY)addr);
1478	if (pPageRec)
1479	{
1480	if ( GCPhys == pPageRec->page.GCPhys
1481	&& (fFlags & X86_PTE_P))
1482	{
1483	STAM_COUNTER_ADD(&pVM->csam.s.StatNrFlushesSkipped, 1);
1484	STAM_PROFILE_STOP(&pVM->csam.s.StatTimeFlushPage, a);
1485	return VINF_SUCCESS;
1486	}
1487
1488	Log(("CSAMR3FlushPage: page %RRv has changed -> FLUSH (rc=%Rrc) (Phys: %RGp vs %RGp)\n", addr, rc, GCPhys, pPageRec->page.GCPhys));
1489
1490	STAM_COUNTER_ADD(&pVM->csam.s.StatNrFlushes, 1);
1491
1492	if (fRemovePage)
1493	csamRemovePageRecord(pVM, addr);
1494	else
1495	{
1496	CSAMMarkPage(pVM, addr, false);
1497	pPageRec->page.GCPhys = 0;
1498	pPageRec->page.fFlags = 0;
1499	rc = PGMGstGetPage(pVCpu, addr, &pPageRec->page.fFlags, &pPageRec->page.GCPhys);
1500	if (rc == VINF_SUCCESS)
1501	pPageRec->page.u64Hash = csamR3CalcPageHash(pVM, addr);
1502
1503	if (pPageRec->page.pBitmap == NULL)
1504	{
1505	pPageRec->page.pBitmap = (uint8_t *)MMR3HeapAllocZ(pVM, MM_TAG_CSAM_PATCH, CSAM_PAGE_BITMAP_SIZE);
1506	Assert(pPageRec->page.pBitmap);
1507	if (pPageRec->page.pBitmap == NULL)
1508	return VERR_NO_MEMORY;
1509	}
1510	else
1511	memset(pPageRec->page.pBitmap, 0, CSAM_PAGE_BITMAP_SIZE);
1512	}
1513
1514
1515	/*
1516	* Inform patch manager about the flush; no need to repeat the above check twice.
1517	*/
1518	PATMR3FlushPage(pVM, addr);
1519
1520	STAM_PROFILE_STOP(&pVM->csam.s.StatTimeFlushPage, a);
1521	return VINF_SUCCESS;
1522	}
1523	else
1524	{
1525	STAM_PROFILE_STOP(&pVM->csam.s.StatTimeFlushPage, a);
1526	return VWRN_CSAM_PAGE_NOT_FOUND;
1527	}
1528	}
1529
1530	/**
1531	* Notify CSAM of a page flush
1532	*
1533	* @returns VBox status code
1534	* @param pVM The VM to operate on.
1535	* @param addr GC address of the page to flush
1536	*/
1537	VMMR3DECL(int) CSAMR3FlushPage(PVM pVM, RTRCPTR addr)
1538	{
1539	return csamFlushPage(pVM, addr, true /* remove page record */);
1540	}
1541
1542	/**
1543	* Remove a CSAM monitored page. Use with care!
1544	*
1545	* @returns VBox status code
1546	* @param pVM The VM to operate on.
1547	* @param addr GC address of the page to flush
1548	*/
1549	VMMR3DECL(int) CSAMR3RemovePage(PVM pVM, RTRCPTR addr)
1550	{
1551	PCSAMPAGEREC pPageRec;
1552	int rc;
1553
1554	addr = addr & PAGE_BASE_GC_MASK;
1555
1556	pPageRec = (PCSAMPAGEREC)RTAvlPVGet(&pVM->csam.s.pPageTree, (AVLPVKEY)addr);
1557	if (pPageRec)
1558	{
1559	rc = csamRemovePageRecord(pVM, addr);
1560	if (RT_SUCCESS(rc))
1561	PATMR3FlushPage(pVM, addr);
1562	return VINF_SUCCESS;
1563	}
1564	return VWRN_CSAM_PAGE_NOT_FOUND;
1565	}
1566
1567	/**
1568	* Check a page record in case a page has been changed
1569	*
1570	* @returns VBox status code. (trap handled or not)
1571	* @param pVM The VM to operate on.
1572	* @param pInstrGC GC instruction pointer
1573	*/
1574	int csamR3CheckPageRecord(PVM pVM, RTRCPTR pInstrGC)
1575	{
1576	PCSAMPAGEREC pPageRec;
1577	uint64_t u64hash;
1578
1579	pInstrGC = pInstrGC & PAGE_BASE_GC_MASK;
1580
1581	pPageRec = (PCSAMPAGEREC)RTAvlPVGet(&pVM->csam.s.pPageTree, (AVLPVKEY)pInstrGC);
1582	if (pPageRec)
1583	{
1584	u64hash = csamR3CalcPageHash(pVM, pInstrGC);
1585	if (u64hash != pPageRec->page.u64Hash)
1586	csamFlushPage(pVM, pInstrGC, false /* don't remove page record */);
1587	}
1588	else
1589	return VWRN_CSAM_PAGE_NOT_FOUND;
1590
1591	return VINF_SUCCESS;
1592	}
1593
1594	/**
1595	* Returns monitor description based on CSAM tag
1596	*
1597	* @return description string
1598	* @param enmTag Owner tag
1599	*/
1600	const char *csamGetMonitorDescription(CSAMTAG enmTag)
1601	{
1602	if (enmTag == CSAM_TAG_PATM)
1603	return "CSAM-PATM self-modifying code monitor handler";
1604	else
1605	if (enmTag == CSAM_TAG_REM)
1606	return "CSAM-REM self-modifying code monitor handler";
1607	Assert(enmTag == CSAM_TAG_CSAM);
1608	return "CSAM self-modifying code monitor handler";
1609	}
1610
1611	/**
1612	* Adds page record to our lookup tree
1613	*
1614	* @returns CSAMPAGE ptr or NULL if failure
1615	* @param pVM The VM to operate on.
1616	* @param GCPtr Page address
1617	* @param enmTag Owner tag
1618	* @param fCode32 16 or 32 bits code
1619	* @param fMonitorInvalidation Monitor page invalidation flag
1620	*/
1621	static PCSAMPAGE csamCreatePageRecord(PVM pVM, RTRCPTR GCPtr, CSAMTAG enmTag, bool fCode32, bool fMonitorInvalidation)
1622	{
1623	PCSAMPAGEREC pPage;
1624	int rc;
1625	bool ret;
1626	Assert(pVM->cCPUs == 1);
1627	PVMCPU pVCpu = VMMGetCpu0(pVM);
1628
1629	Log(("New page record for %RRv\n", GCPtr & PAGE_BASE_GC_MASK));
1630
1631	pPage = (PCSAMPAGEREC)MMR3HeapAllocZ(pVM, MM_TAG_CSAM_PATCH, sizeof(CSAMPAGEREC));
1632	if (pPage == NULL)
1633	{
1634	AssertMsgFailed(("csamCreatePageRecord: Out of memory!!!!\n"));
1635	return NULL;
1636	}
1637	/* Round down to page boundary. */
1638	GCPtr = (GCPtr & PAGE_BASE_GC_MASK);
1639	pPage->Core.Key = (AVLPVKEY)GCPtr;
1640	pPage->page.pPageGC = GCPtr;
1641	pPage->page.fCode32 = fCode32;
1642	pPage->page.fMonitorInvalidation = fMonitorInvalidation;
1643	pPage->page.enmTag = enmTag;
1644	pPage->page.fMonitorActive = false;
1645	pPage->page.pBitmap = (uint8_t *)MMR3HeapAllocZ(pVM, MM_TAG_CSAM_PATCH, PAGE_SIZE/sizeof(uint8_t));
1646	rc = PGMGstGetPage(pVCpu, GCPtr, &pPage->page.fFlags, &pPage->page.GCPhys);
1647	AssertMsg(RT_SUCCESS(rc) \|\| rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT, ("rc = %Rrc\n", rc));
1648
1649	pPage->page.u64Hash = csamR3CalcPageHash(pVM, GCPtr);
1650	ret = RTAvlPVInsert(&pVM->csam.s.pPageTree, &pPage->Core);
1651	Assert(ret);
1652
1653	#ifdef CSAM_MONITOR_CODE_PAGES
1654	AssertRelease(!fInCSAMCodePageInvalidate);
1655
1656	switch (enmTag)
1657	{
1658	case CSAM_TAG_PATM:
1659	case CSAM_TAG_REM:
1660	#ifdef CSAM_MONITOR_CSAM_CODE_PAGES
1661	case CSAM_TAG_CSAM:
1662	#endif
1663	{
1664	int rc = PGMR3HandlerVirtualRegister(pVM, PGMVIRTHANDLERTYPE_WRITE, GCPtr, GCPtr + (PAGE_SIZE - 1) /* inclusive! */,
1665	(fMonitorInvalidation) ? CSAMCodePageInvalidate : 0, CSAMCodePageWriteHandler, "CSAMGCCodePageWriteHandler", 0,
1666	csamGetMonitorDescription(enmTag));
1667	AssertMsg(RT_SUCCESS(rc) \|\| rc == VERR_PGM_HANDLER_VIRTUAL_CONFLICT, ("PGMR3HandlerVirtualRegisterEx %RRv failed with %Rrc\n", GCPtr, rc));
1668	if (RT_FAILURE(rc))
1669	Log(("PGMR3HandlerVirtualRegisterEx for %RRv failed with %Rrc\n", GCPtr, rc));
1670
1671	/* Could fail, because it's already monitored. Don't treat that condition as fatal. */
1672
1673	/* Prefetch it in case it's not there yet. */
1674	rc = PGMPrefetchPage(pVCpu, GCPtr);
1675	AssertRC(rc);
1676
1677	rc = PGMShwModifyPage(pVCpu, GCPtr, 1, 0, ~(uint64_t)X86_PTE_RW);
1678	Assert(rc == VINF_SUCCESS \|\| rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT);
1679
1680	pPage->page.fMonitorActive = true;
1681	STAM_COUNTER_INC(&pVM->csam.s.StatPageMonitor);
1682	break;
1683	}
1684	default:
1685	break; /* to shut up GCC */
1686	}
1687
1688	Log(("csamCreatePageRecord %RRv GCPhys=%RGp\n", GCPtr, pPage->page.GCPhys));
1689
1690	#ifdef VBOX_WITH_STATISTICS
1691	switch (enmTag)
1692	{
1693	case CSAM_TAG_CSAM:
1694	STAM_COUNTER_INC(&pVM->csam.s.StatPageCSAM);
1695	break;
1696	case CSAM_TAG_PATM:
1697	STAM_COUNTER_INC(&pVM->csam.s.StatPagePATM);
1698	break;
1699	case CSAM_TAG_REM:
1700	STAM_COUNTER_INC(&pVM->csam.s.StatPageREM);
1701	break;
1702	default:
1703	break; /* to shut up GCC */
1704	}
1705	#endif
1706
1707	#endif
1708
1709	STAM_COUNTER_INC(&pVM->csam.s.StatNrPages);
1710	if (fMonitorInvalidation)
1711	STAM_COUNTER_INC(&pVM->csam.s.StatNrPagesInv);
1712
1713	return &pPage->page;
1714	}
1715
1716	/**
1717	* Monitors a code page (if not already monitored)
1718	*
1719	* @returns VBox status code
1720	* @param pVM The VM to operate on.
1721	* @param pPageAddrGC The page to monitor
1722	* @param enmTag Monitor tag
1723	*/
1724	VMMR3DECL(int) CSAMR3MonitorPage(PVM pVM, RTRCPTR pPageAddrGC, CSAMTAG enmTag)
1725	{
1726	PCSAMPAGEREC pPageRec = NULL;
1727	int rc;
1728	bool fMonitorInvalidation;
1729	Assert(pVM->cCPUs == 1);
1730	PVMCPU pVCpu = VMMGetCpu0(pVM);
1731
1732	/* Dirty pages must be handled before calling this function!. */
1733	Assert(!pVM->csam.s.cDirtyPages);
1734
1735	if (pVM->csam.s.fScanningStarted == false)
1736	return VINF_SUCCESS; /* too early */
1737
1738	pPageAddrGC &= PAGE_BASE_GC_MASK;
1739
1740	Log(("CSAMR3MonitorPage %RRv %d\n", pPageAddrGC, enmTag));
1741
1742	/** @todo implicit assumption */
1743	fMonitorInvalidation = (enmTag == CSAM_TAG_PATM);
1744
1745	pPageRec = (PCSAMPAGEREC)RTAvlPVGet(&pVM->csam.s.pPageTree, (AVLPVKEY)pPageAddrGC);
1746	if (pPageRec == NULL)
1747	{
1748	uint64_t fFlags;
1749
1750	rc = PGMGstGetPage(pVCpu, pPageAddrGC, &fFlags, NULL);
1751	AssertMsg(RT_SUCCESS(rc) \|\| rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT, ("rc = %Rrc\n", rc));
1752	if ( rc == VINF_SUCCESS
1753	&& (fFlags & X86_PTE_US))
1754	{
1755	/* We don't care about user pages. */
1756	STAM_COUNTER_INC(&pVM->csam.s.StatNrUserPages);
1757	return VINF_SUCCESS;
1758	}
1759
1760	csamCreatePageRecord(pVM, pPageAddrGC, enmTag, true /* 32 bits code */, fMonitorInvalidation);
1761
1762	pPageRec = (PCSAMPAGEREC)RTAvlPVGet(&pVM->csam.s.pPageTree, (AVLPVKEY)pPageAddrGC);
1763	Assert(pPageRec);
1764	}
1765	/** @todo reference count */
1766
1767	#ifdef CSAM_MONITOR_CSAM_CODE_PAGES
1768	Assert(pPageRec->page.fMonitorActive);
1769	#endif
1770
1771	#ifdef CSAM_MONITOR_CODE_PAGES
1772	if (!pPageRec->page.fMonitorActive)
1773	{
1774	Log(("CSAMR3MonitorPage: activate monitoring for %RRv\n", pPageAddrGC));
1775
1776	rc = PGMR3HandlerVirtualRegister(pVM, PGMVIRTHANDLERTYPE_WRITE, pPageAddrGC, pPageAddrGC + (PAGE_SIZE - 1) /* inclusive! */,
1777	(fMonitorInvalidation) ? CSAMCodePageInvalidate : 0, CSAMCodePageWriteHandler, "CSAMGCCodePageWriteHandler", 0,
1778	csamGetMonitorDescription(enmTag));
1779	AssertMsg(RT_SUCCESS(rc) \|\| rc == VERR_PGM_HANDLER_VIRTUAL_CONFLICT, ("PGMR3HandlerVirtualRegisterEx %RRv failed with %Rrc\n", pPageAddrGC, rc));
1780	if (RT_FAILURE(rc))
1781	Log(("PGMR3HandlerVirtualRegisterEx for %RRv failed with %Rrc\n", pPageAddrGC, rc));
1782
1783	/* Could fail, because it's already monitored. Don't treat that condition as fatal. */
1784
1785	/* Prefetch it in case it's not there yet. */
1786	rc = PGMPrefetchPage(pVCpu, pPageAddrGC);
1787	AssertRC(rc);
1788
1789	rc = PGMShwModifyPage(pVCpu, pPageAddrGC, 1, 0, ~(uint64_t)X86_PTE_RW);
1790	Assert(rc == VINF_SUCCESS \|\| rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT);
1791
1792	STAM_COUNTER_INC(&pVM->csam.s.StatPageMonitor);
1793
1794	pPageRec->page.fMonitorActive = true;
1795	pPageRec->page.fMonitorInvalidation = fMonitorInvalidation;
1796	}
1797	else
1798	if ( !pPageRec->page.fMonitorInvalidation
1799	&& fMonitorInvalidation)
1800	{
1801	Assert(pPageRec->page.fMonitorActive);
1802	PGMHandlerVirtualChangeInvalidateCallback(pVM, pPageRec->page.pPageGC, CSAMCodePageInvalidate);
1803	pPageRec->page.fMonitorInvalidation = true;
1804	STAM_COUNTER_INC(&pVM->csam.s.StatNrPagesInv);
1805
1806	/* Prefetch it in case it's not there yet. */
1807	rc = PGMPrefetchPage(pVCpu, pPageAddrGC);
1808	AssertRC(rc);
1809
1810	/* Make sure it's readonly. Page invalidation may have modified the attributes. */
1811	rc = PGMShwModifyPage(pVCpu, pPageAddrGC, 1, 0, ~(uint64_t)X86_PTE_RW);
1812	Assert(rc == VINF_SUCCESS \|\| rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT);
1813	}
1814
1815	#if 0 /* def VBOX_STRICT -> very annoying) */
1816	if (pPageRec->page.fMonitorActive)
1817	{
1818	uint64_t fPageShw;
1819	RTHCPHYS GCPhys;
1820	rc = PGMShwGetPage(pVCpu, pPageAddrGC, &fPageShw, &GCPhys);
1821	// AssertMsg( (rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT)
1822	// \|\| !(fPageShw & X86_PTE_RW)
1823	// \|\| (pPageRec->page.GCPhys == 0), ("Shadow page flags for %RRv (%RHp) aren't readonly (%RX64)!!\n", pPageAddrGC, GCPhys, fPageShw));
1824	}
1825	#endif
1826
1827	if (pPageRec->page.GCPhys == 0)
1828	{
1829	/* Prefetch it in case it's not there yet. */
1830	rc = PGMPrefetchPage(pVCpu, pPageAddrGC);
1831	AssertRC(rc);
1832	/* The page was changed behind our back. It won't be made read-only until the next SyncCR3, so force it here. */
1833	rc = PGMShwModifyPage(pVCpu, pPageAddrGC, 1, 0, ~(uint64_t)X86_PTE_RW);
1834	Assert(rc == VINF_SUCCESS \|\| rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT);
1835	}
1836	#endif /* CSAM_MONITOR_CODE_PAGES */
1837	return VINF_SUCCESS;
1838	}
1839
1840	/**
1841	* Unmonitors a code page
1842	*
1843	* @returns VBox status code
1844	* @param pVM The VM to operate on.
1845	* @param pPageAddrGC The page to monitor
1846	* @param enmTag Monitor tag
1847	*/
1848	VMMR3DECL(int) CSAMR3UnmonitorPage(PVM pVM, RTRCPTR pPageAddrGC, CSAMTAG enmTag)
1849	{
1850	pPageAddrGC &= PAGE_BASE_GC_MASK;
1851
1852	Log(("CSAMR3UnmonitorPage %RRv %d\n", pPageAddrGC, enmTag));
1853
1854	Assert(enmTag == CSAM_TAG_REM);
1855
1856	#ifdef VBOX_STRICT
1857	PCSAMPAGEREC pPageRec;
1858
1859	pPageRec = (PCSAMPAGEREC)RTAvlPVGet(&pVM->csam.s.pPageTree, (AVLPVKEY)pPageAddrGC);
1860	Assert(pPageRec && pPageRec->page.enmTag == enmTag);
1861	#endif
1862	return CSAMR3RemovePage(pVM, pPageAddrGC);
1863	}
1864
1865	/**
1866	* Removes a page record from our lookup tree
1867	*
1868	* @returns VBox status code
1869	* @param pVM The VM to operate on.
1870	* @param GCPtr Page address
1871	*/
1872	static int csamRemovePageRecord(PVM pVM, RTRCPTR GCPtr)
1873	{
1874	PCSAMPAGEREC pPageRec;
1875	Assert(pVM->cCPUs == 1);
1876	PVMCPU pVCpu = VMMGetCpu0(pVM);
1877
1878	Log(("csamRemovePageRecord %RRv\n", GCPtr));
1879	pPageRec = (PCSAMPAGEREC)RTAvlPVRemove(&pVM->csam.s.pPageTree, (AVLPVKEY)GCPtr);
1880
1881	if (pPageRec)
1882	{
1883	STAM_COUNTER_INC(&pVM->csam.s.StatNrRemovedPages);
1884
1885	#ifdef CSAM_MONITOR_CODE_PAGES
1886	if (pPageRec->page.fMonitorActive)
1887	{
1888	/* @todo -> this is expensive (cr3 reload)!!!
1889	* if this happens often, then reuse it instead!!!
1890	*/
1891	Assert(!fInCSAMCodePageInvalidate);
1892	STAM_COUNTER_DEC(&pVM->csam.s.StatPageMonitor);
1893	PGMHandlerVirtualDeregister(pVM, GCPtr);
1894	}
1895	if (pPageRec->page.enmTag == CSAM_TAG_PATM)
1896	{
1897	/* Make sure the recompiler flushes its cache as this page is no longer monitored. */
1898	STAM_COUNTER_INC(&pVM->csam.s.StatPageRemoveREMFlush);
1899	CPUMSetChangedFlags(pVCpu, CPUM_CHANGED_GLOBAL_TLB_FLUSH);
1900	}
1901	#endif
1902
1903	#ifdef VBOX_WITH_STATISTICS
1904	switch (pPageRec->page.enmTag)
1905	{
1906	case CSAM_TAG_CSAM:
1907	STAM_COUNTER_DEC(&pVM->csam.s.StatPageCSAM);
1908	break;
1909	case CSAM_TAG_PATM:
1910	STAM_COUNTER_DEC(&pVM->csam.s.StatPagePATM);
1911	break;
1912	case CSAM_TAG_REM:
1913	STAM_COUNTER_DEC(&pVM->csam.s.StatPageREM);
1914	break;
1915	default:
1916	break; /* to shut up GCC */
1917	}
1918	#endif
1919
1920	if (pPageRec->page.pBitmap) MMR3HeapFree(pPageRec->page.pBitmap);
1921	MMR3HeapFree(pPageRec);
1922	}
1923	else
1924	AssertFailed();
1925
1926	return VINF_SUCCESS;
1927	}
1928
1929	/**
1930	* Callback for delayed writes from non-EMT threads
1931	*
1932	* @param pVM VM Handle.
1933	* @param GCPtr The virtual address the guest is writing to. (not correct if it's an alias!)
1934	* @param cbBuf How much it's reading/writing.
1935	*/
1936	static DECLCALLBACK(void) CSAMDelayedWriteHandler(PVM pVM, RTRCPTR GCPtr, size_t cbBuf)
1937	{
1938	int rc = PATMR3PatchWrite(pVM, GCPtr, (uint32_t)cbBuf);
1939	AssertRC(rc);
1940	}
1941
1942	/**
1943	* #PF Handler callback for virtual access handler ranges.
1944	*
1945	* Important to realize that a physical page in a range can have aliases, and
1946	* for ALL and WRITE handlers these will also trigger.
1947	*
1948	* @returns VINF_SUCCESS if the handler have carried out the operation.
1949	* @returns VINF_PGM_HANDLER_DO_DEFAULT if the caller should carry out the access operation.
1950	* @param pVM VM Handle.
1951	* @param GCPtr The virtual address the guest is writing to. (not correct if it's an alias!)
1952	* @param pvPtr The HC mapping of that address.
1953	* @param pvBuf What the guest is reading/writing.
1954	* @param cbBuf How much it's reading/writing.
1955	* @param enmAccessType The access type.
1956	* @param pvUser User argument.
1957	*/
1958	static DECLCALLBACK(int) CSAMCodePageWriteHandler(PVM pVM, RTGCPTR GCPtr, void pvPtr, void pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType, void *pvUser)
1959	{
1960	int rc;
1961
1962	Assert(enmAccessType == PGMACCESSTYPE_WRITE);
1963	Log(("CSAMCodePageWriteHandler: write to %RGv size=%zu\n", GCPtr, cbBuf));
1964
1965	if ( PAGE_ADDRESS(pvPtr) == PAGE_ADDRESS((uintptr_t)pvPtr + cbBuf - 1)
1966	&& !memcmp(pvPtr, pvBuf, cbBuf))
1967	{
1968	Log(("CSAMCodePageWriteHandler: dummy write -> ignore\n"));
1969	return VINF_PGM_HANDLER_DO_DEFAULT;
1970	}
1971
1972	if (VM_IS_EMT(pVM))
1973	{
1974	rc = PATMR3PatchWrite(pVM, GCPtr, (uint32_t)cbBuf);
1975	}
1976	else
1977	{
1978	/* Queue the write instead otherwise we'll get concurrency issues. */
1979	/** @note in theory not correct to let it write the data first before disabling a patch!
1980	* (if it writes the same data as the patch jump and we replace it with obsolete opcodes)
1981	*/
1982	Log(("CSAMCodePageWriteHandler: delayed write!\n"));
1983	AssertCompileSize(RTRCPTR, 4);
1984	rc = VMR3ReqCallEx(pVM, VMCPUID_ANY, NULL, 0, VMREQFLAGS_NO_WAIT \| VMREQFLAGS_VOID,
1985	(PFNRT)CSAMDelayedWriteHandler, 3, pVM, (RTRCPTR)GCPtr, cbBuf);
1986	}
1987	AssertRC(rc);
1988
1989	return VINF_PGM_HANDLER_DO_DEFAULT;
1990	}
1991
1992	/**
1993	* #PF Handler callback for invalidation of virtual access handler ranges.
1994	*
1995	* @param pVM VM Handle.
1996	* @param GCPtr The virtual address the guest has changed.
1997	*/
1998	static DECLCALLBACK(int) CSAMCodePageInvalidate(PVM pVM, RTGCPTR GCPtr)
1999	{
2000	fInCSAMCodePageInvalidate = true;
2001	LogFlow(("CSAMCodePageInvalidate %RGv\n", GCPtr));
2002	/** @todo We can't remove the page (which unregisters the virtual handler) as we are called from a DoWithAll on the virtual handler tree. Argh. */
2003	csamFlushPage(pVM, GCPtr, false /* don't remove page! */);
2004	fInCSAMCodePageInvalidate = false;
2005	return VINF_SUCCESS;
2006	}
2007
2008	/**
2009	* Check if the current instruction has already been checked before
2010	*
2011	* @returns VBox status code. (trap handled or not)
2012	* @param pVM The VM to operate on.
2013	* @param pInstr Instruction pointer
2014	* @param pPage CSAM patch structure pointer
2015	*/
2016	bool csamIsCodeScanned(PVM pVM, RTRCPTR pInstr, PCSAMPAGE *pPage)
2017	{
2018	PCSAMPAGEREC pPageRec;
2019	uint32_t offset;
2020
2021	STAM_PROFILE_START(&pVM->csam.s.StatTimeCheckAddr, a);
2022
2023	offset = pInstr & PAGE_OFFSET_MASK;
2024	pInstr = pInstr & PAGE_BASE_GC_MASK;
2025
2026	Assert(pPage);
2027
2028	if (pPage && (pPage)->pPageGC == pInstr)
2029	{
2030	if ((pPage)->pBitmap == NULL \|\| ASMBitTest((pPage)->pBitmap, offset))
2031	{
2032	STAM_COUNTER_ADD(&pVM->csam.s.StatNrKnownPagesHC, 1);
2033	STAM_PROFILE_STOP(&pVM->csam.s.StatTimeCheckAddr, a);
2034	return true;
2035	}
2036	STAM_PROFILE_STOP(&pVM->csam.s.StatTimeCheckAddr, a);
2037	return false;
2038	}
2039
2040	pPageRec = (PCSAMPAGEREC)RTAvlPVGet(&pVM->csam.s.pPageTree, (AVLPVKEY)pInstr);
2041	if (pPageRec)
2042	{
2043	if (pPage) *pPage= &pPageRec->page;
2044	if (pPageRec->page.pBitmap == NULL \|\| ASMBitTest(pPageRec->page.pBitmap, offset))
2045	{
2046	STAM_COUNTER_ADD(&pVM->csam.s.StatNrKnownPagesHC, 1);
2047	STAM_PROFILE_STOP(&pVM->csam.s.StatTimeCheckAddr, a);
2048	return true;
2049	}
2050	}
2051	else
2052	{
2053	if (pPage) *pPage = NULL;
2054	}
2055	STAM_PROFILE_STOP(&pVM->csam.s.StatTimeCheckAddr, a);
2056	return false;
2057	}
2058
2059	/**
2060	* Mark an instruction in a page as scanned/not scanned
2061	*
2062	* @param pVM The VM to operate on.
2063	* @param pPage Patch structure pointer
2064	* @param pInstr Instruction pointer
2065	* @param opsize Instruction size
2066	* @param fScanned Mark as scanned or not
2067	*/
2068	static void csamMarkCode(PVM pVM, PCSAMPAGE pPage, RTRCPTR pInstr, uint32_t opsize, bool fScanned)
2069	{
2070	LogFlow(("csamMarkCodeAsScanned %RRv opsize=%d\n", pInstr, opsize));
2071	CSAMMarkPage(pVM, pInstr, fScanned);
2072
2073	/** @todo should recreate empty bitmap if !fScanned */
2074	if (pPage->pBitmap == NULL)
2075	return;
2076
2077	if (fScanned)
2078	{
2079	// retn instructions can be scanned more than once
2080	if (ASMBitTest(pPage->pBitmap, pInstr & PAGE_OFFSET_MASK) == 0)
2081	{
2082	pPage->uSize += opsize;
2083	STAM_COUNTER_ADD(&pVM->csam.s.StatNrInstr, 1);
2084	}
2085	if (pPage->uSize >= PAGE_SIZE)
2086	{
2087	Log(("Scanned full page (%RRv) -> free bitmap\n", pInstr & PAGE_BASE_GC_MASK));
2088	MMR3HeapFree(pPage->pBitmap);
2089	pPage->pBitmap = NULL;
2090	}
2091	else
2092	ASMBitSet(pPage->pBitmap, pInstr & PAGE_OFFSET_MASK);
2093	}
2094	else
2095	ASMBitClear(pPage->pBitmap, pInstr & PAGE_OFFSET_MASK);
2096	}
2097
2098	/**
2099	* Mark an instruction in a page as scanned/not scanned
2100	*
2101	* @returns VBox status code.
2102	* @param pVM The VM to operate on.
2103	* @param pInstr Instruction pointer
2104	* @param opsize Instruction size
2105	* @param fScanned Mark as scanned or not
2106	*/
2107	VMMR3DECL(int) CSAMR3MarkCode(PVM pVM, RTRCPTR pInstr, uint32_t opsize, bool fScanned)
2108	{
2109	PCSAMPAGE pPage = 0;
2110
2111	Assert(!fScanned); /* other case not implemented. */
2112	Assert(!PATMIsPatchGCAddr(pVM, pInstr));
2113
2114	if (csamIsCodeScanned(pVM, pInstr, &pPage) == false)
2115	{
2116	Assert(fScanned == true); /* other case should not be possible */
2117	return VINF_SUCCESS;
2118	}
2119
2120	Log(("CSAMR3MarkCode: %RRv size=%d fScanned=%d\n", pInstr, opsize, fScanned));
2121	csamMarkCode(pVM, pPage, pInstr, opsize, fScanned);
2122	return VINF_SUCCESS;
2123	}
2124
2125
2126	/**
2127	* Scan and analyse code
2128	*
2129	* @returns VBox status code.
2130	* @param pVM The VM to operate on.
2131	* @param pCtxCore CPU context
2132	* @param pInstrGC Instruction pointer
2133	*/
2134	VMMR3DECL(int) CSAMR3CheckCodeEx(PVM pVM, PCPUMCTXCORE pCtxCore, RTRCPTR pInstrGC)
2135	{
2136	if (EMIsRawRing0Enabled(pVM) == false \|\| PATMIsPatchGCAddr(pVM, pInstrGC) == true)
2137	{
2138	// No use
2139	return VINF_SUCCESS;
2140	}
2141
2142	if (CSAMIsEnabled(pVM))
2143	{
2144	/* Assuming 32 bits code for now. */
2145	Assert(SELMGetCpuModeFromSelector(pVM, pCtxCore->eflags, pCtxCore->cs, &pCtxCore->csHid) == CPUMODE_32BIT);
2146
2147	pInstrGC = SELMToFlat(pVM, DIS_SELREG_CS, pCtxCore, pInstrGC);
2148	return CSAMR3CheckCode(pVM, pInstrGC);
2149	}
2150	return VINF_SUCCESS;
2151	}
2152
2153	/**
2154	* Scan and analyse code
2155	*
2156	* @returns VBox status code.
2157	* @param pVM The VM to operate on.
2158	* @param pInstrGC Instruction pointer (0:32 virtual address)
2159	*/
2160	VMMR3DECL(int) CSAMR3CheckCode(PVM pVM, RTRCPTR pInstrGC)
2161	{
2162	int rc;
2163	PCSAMPAGE pPage = NULL;
2164
2165	if (EMIsRawRing0Enabled(pVM) == false \|\| PATMIsPatchGCAddr(pVM, pInstrGC) == true)
2166	{
2167	// No use
2168	return VINF_SUCCESS;
2169	}
2170
2171	if (CSAMIsEnabled(pVM))
2172	{
2173	// Cache record for PATMGCVirtToHCVirt
2174	CSAMP2GLOOKUPREC cacheRec = {0};
2175
2176	STAM_PROFILE_START(&pVM->csam.s.StatTime, a);
2177	rc = csamAnalyseCallCodeStream(pVM, pInstrGC, pInstrGC, true /* 32 bits code */, CSAMR3AnalyseCallback, pPage, &cacheRec);
2178	STAM_PROFILE_STOP(&pVM->csam.s.StatTime, a);
2179	if (rc != VINF_SUCCESS)
2180	{
2181	Log(("csamAnalyseCodeStream failed with %d\n", rc));
2182	return rc;
2183	}
2184	}
2185	return VINF_SUCCESS;
2186	}
2187
2188	/**
2189	* Flush dirty code pages
2190	*
2191	* @returns VBox status code.
2192	* @param pVM The VM to operate on.
2193	*/
2194	static int csamR3FlushDirtyPages(PVM pVM)
2195	{
2196	Assert(pVM->cCPUs == 1);
2197	PVMCPU pVCpu = VMMGetCpu0(pVM);
2198
2199	STAM_PROFILE_START(&pVM->csam.s.StatFlushDirtyPages, a);
2200
2201	for (uint32_t i=0;i<pVM->csam.s.cDirtyPages;i++)
2202	{
2203	int rc;
2204	PCSAMPAGEREC pPageRec;
2205	RTRCPTR GCPtr = pVM->csam.s.pvDirtyBasePage[i];
2206
2207	GCPtr = GCPtr & PAGE_BASE_GC_MASK;
2208
2209	/* Notify the recompiler that this page has been changed. */
2210	REMR3NotifyCodePageChanged(pVM, pVCpu, GCPtr);
2211
2212	/* Enable write protection again. (use the fault address as it might be an alias) */
2213	rc = PGMShwModifyPage(pVCpu, pVM->csam.s.pvDirtyFaultPage[i], 1, 0, ~(uint64_t)X86_PTE_RW);
2214	Assert(rc == VINF_SUCCESS \|\| rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT);
2215
2216	Log(("CSAMR3FlushDirtyPages: flush %RRv (modifypage rc=%Rrc)\n", pVM->csam.s.pvDirtyBasePage[i], rc));
2217
2218	pPageRec = (PCSAMPAGEREC)RTAvlPVGet(&pVM->csam.s.pPageTree, (AVLPVKEY)GCPtr);
2219	if (pPageRec && pPageRec->page.enmTag == CSAM_TAG_REM)
2220	{
2221	uint64_t fFlags;
2222
2223	rc = PGMGstGetPage(pVCpu, GCPtr, &fFlags, NULL);
2224	AssertMsg(RT_SUCCESS(rc) \|\| rc == VERR_PAGE_NOT_PRESENT \|\| rc == VERR_PAGE_TABLE_NOT_PRESENT, ("rc = %Rrc\n", rc));
2225	if ( rc == VINF_SUCCESS
2226	&& (fFlags & X86_PTE_US))
2227	{
2228	/* We don't care about user pages. */
2229	csamRemovePageRecord(pVM, GCPtr);
2230	STAM_COUNTER_INC(&pVM->csam.s.StatNrUserPages);
2231	}
2232	}
2233	}
2234	pVM->csam.s.cDirtyPages = 0;
2235	STAM_PROFILE_STOP(&pVM->csam.s.StatFlushDirtyPages, a);
2236	return VINF_SUCCESS;
2237	}
2238
2239	/**
2240	* Flush potential new code pages
2241	*
2242	* @returns VBox status code.
2243	* @param pVM The VM to operate on.
2244	*/
2245	static int csamR3FlushCodePages(PVM pVM)
2246	{
2247	Assert(pVM->cCPUs == 1);
2248	PVMCPU pVCpu = VMMGetCpu0(pVM);
2249
2250	for (uint32_t i=0;i<pVM->csam.s.cPossibleCodePages;i++)
2251	{
2252	RTRCPTR GCPtr = pVM->csam.s.pvPossibleCodePage[i];
2253
2254	GCPtr = GCPtr & PAGE_BASE_GC_MASK;
2255
2256	Log(("csamR3FlushCodePages: %RRv\n", GCPtr));
2257	PGMShwSetPage(pVCpu, GCPtr, 1, 0);
2258	/* Resync the page to make sure instruction fetch will fault */
2259	CSAMMarkPage(pVM, GCPtr, false);
2260	}
2261	pVM->csam.s.cPossibleCodePages = 0;
2262	return VINF_SUCCESS;
2263	}
2264
2265	/**
2266	* Perform any pending actions
2267	*
2268	* @returns VBox status code.
2269	* @param pVM The VM to operate on.
2270	* @param pVCpu The VMCPU to operate on.
2271	*/
2272	VMMR3DECL(int) CSAMR3DoPendingAction(PVM pVM, PVMCPU pVCpu)
2273	{
2274	csamR3FlushDirtyPages(pVM);
2275	csamR3FlushCodePages(pVM);
2276
2277	VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_CSAM_PENDING_ACTION);
2278	return VINF_SUCCESS;
2279	}
2280
2281	/**
2282	* Analyse interrupt and trap gates
2283	*
2284	* @returns VBox status code.
2285	* @param pVM The VM to operate on.
2286	* @param iGate Start gate
2287	* @param cGates Number of gates to check
2288	*/
2289	VMMR3DECL(int) CSAMR3CheckGates(PVM pVM, uint32_t iGate, uint32_t cGates)
2290	{
2291	Assert(pVM->cCPUs == 1);
2292	PVMCPU pVCpu = VMMGetCpu0(pVM);
2293	uint16_t cbIDT;
2294	RTRCPTR GCPtrIDT = CPUMGetGuestIDTR(pVCpu, &cbIDT);
2295	uint32_t iGateEnd;
2296	uint32_t maxGates;
2297	VBOXIDTE aIDT[256];
2298	PVBOXIDTE pGuestIdte;
2299	int rc;
2300
2301	if (EMIsRawRing0Enabled(pVM) == false)
2302	{
2303	/* Enabling interrupt gates only works when raw ring 0 is enabled. */
2304	//AssertFailed();
2305	return VINF_SUCCESS;
2306	}
2307
2308	/* We only check all gates once during a session */
2309	if ( !pVM->csam.s.fGatesChecked
2310	&& cGates != 256)
2311	return VINF_SUCCESS; /* too early */
2312
2313	/* We only check all gates once during a session */
2314	if ( pVM->csam.s.fGatesChecked
2315	&& cGates != 1)
2316	return VINF_SUCCESS; /* ignored */
2317
2318	Assert(cGates <= 256);
2319	if (!GCPtrIDT \|\| cGates > 256)
2320	return VERR_INVALID_PARAMETER;
2321
2322	if (cGates != 1)
2323	{
2324	pVM->csam.s.fGatesChecked = true;
2325	for (unsigned i=0;i<RT_ELEMENTS(pVM->csam.s.pvCallInstruction);i++)
2326	{
2327	RTRCPTR pHandler = pVM->csam.s.pvCallInstruction[i];
2328
2329	if (pHandler)
2330	{
2331	CSAMP2GLOOKUPREC cacheRec = {0}; /* Cache record for PATMGCVirtToHCVirt. */
2332	PCSAMPAGE pPage = NULL;
2333
2334	Log(("CSAMCheckGates: checking previous call instruction %RRv\n", pHandler));
2335	STAM_PROFILE_START(&pVM->csam.s.StatTime, a);
2336	rc = csamAnalyseCodeStream(pVM, pHandler, pHandler, true, CSAMR3AnalyseCallback, pPage, &cacheRec);
2337	STAM_PROFILE_STOP(&pVM->csam.s.StatTime, a);
2338	if (rc != VINF_SUCCESS)
2339	{
2340	Log(("CSAMCheckGates: csamAnalyseCodeStream failed with %d\n", rc));
2341	continue;
2342	}
2343	}
2344	}
2345	}
2346
2347	/* Determine valid upper boundary. */
2348	maxGates = (cbIDT+1) / sizeof(VBOXIDTE);
2349	Assert(iGate < maxGates);
2350	if (iGate > maxGates)
2351	return VERR_INVALID_PARAMETER;
2352
2353	if (iGate + cGates > maxGates)
2354	cGates = maxGates - iGate;
2355
2356	GCPtrIDT = GCPtrIDT + iGate * sizeof(VBOXIDTE);
2357	iGateEnd = iGate + cGates;
2358
2359	STAM_PROFILE_START(&pVM->csam.s.StatCheckGates, a);
2360
2361	/*
2362	* Get IDT entries.
2363	*/
2364	if (PAGE_ADDRESS(GCPtrIDT) == PAGE_ADDRESS(GCPtrIDT+cGates*sizeof(VBOXIDTE)))
2365	{
2366	/* Just convert the IDT address to a R3 pointer. The whole IDT fits in one page. */
2367	rc = PGMPhysGCPtr2R3Ptr(pVCpu, GCPtrIDT, (PRTR3PTR)&pGuestIdte);
2368	if (RT_FAILURE(rc))
2369	{
2370	AssertMsgRC(rc, ("Failed to read IDTE! rc=%Rrc\n", rc));
2371	STAM_PROFILE_STOP(&pVM->csam.s.StatCheckGates, a);
2372	return rc;
2373	}
2374	}
2375	else
2376	{
2377	/* Slow method when it crosses a page boundary. */
2378	rc = PGMPhysSimpleReadGCPtr(pVCpu, aIDT, GCPtrIDT, cGates*sizeof(VBOXIDTE));
2379	if (RT_FAILURE(rc))
2380	{
2381	AssertMsgRC(rc, ("Failed to read IDTE! rc=%Rrc\n", rc));
2382	STAM_PROFILE_STOP(&pVM->csam.s.StatCheckGates, a);
2383	return rc;
2384	}
2385	pGuestIdte = &aIDT[0];
2386	}
2387
2388	for (/iGate/; iGate<iGateEnd; iGate++, pGuestIdte++)
2389	{
2390	Assert(TRPMR3GetGuestTrapHandler(pVM, iGate) == TRPM_INVALID_HANDLER);
2391
2392	if ( pGuestIdte->Gen.u1Present
2393	&& (pGuestIdte->Gen.u5Type2 == VBOX_IDTE_TYPE2_TRAP_32 \|\| pGuestIdte->Gen.u5Type2 == VBOX_IDTE_TYPE2_INT_32)
2394	&& (pGuestIdte->Gen.u2DPL == 3 \|\| pGuestIdte->Gen.u2DPL == 0)
2395	)
2396	{
2397	RTRCPTR pHandler;
2398	CSAMP2GLOOKUPREC cacheRec = {0}; /* Cache record for PATMGCVirtToHCVirt. */
2399	PCSAMPAGE pPage = NULL;
2400	DBGFSELINFO selInfo;
2401
2402	pHandler = VBOXIDTE_OFFSET(*pGuestIdte);
2403	pHandler = SELMToFlatBySel(pVM, pGuestIdte->Gen.u16SegSel, pHandler);
2404
2405	rc = SELMR3GetSelectorInfo(pVM, pVCpu, pGuestIdte->Gen.u16SegSel, &selInfo);
2406	if ( RT_FAILURE(rc)
2407	\|\| (selInfo.fFlags & (DBGFSELINFO_FLAGS_NOT_PRESENT \| DBGFSELINFO_FLAGS_INVALID))
2408	\|\| selInfo.GCPtrBase != 0
2409	\|\| selInfo.cbLimit != ~0U
2410	)
2411	{
2412	/* Refuse to patch a handler whose idt cs selector isn't wide open. */
2413	Log(("CSAMCheckGates: check gate %d failed due to rc %Rrc GCPtrBase=%RRv limit=%x\n", iGate, rc, selInfo.GCPtrBase, selInfo.cbLimit));
2414	continue;
2415	}
2416
2417
2418	if (pGuestIdte->Gen.u5Type2 == VBOX_IDTE_TYPE2_TRAP_32)
2419	{
2420	Log(("CSAMCheckGates: check trap gate %d at %04X:%08X (flat %RRv)\n", iGate, pGuestIdte->Gen.u16SegSel, VBOXIDTE_OFFSET(*pGuestIdte), pHandler));
2421	}
2422	else
2423	{
2424	Log(("CSAMCheckGates: check interrupt gate %d at %04X:%08X (flat %RRv)\n", iGate, pGuestIdte->Gen.u16SegSel, VBOXIDTE_OFFSET(*pGuestIdte), pHandler));
2425	}
2426
2427	STAM_PROFILE_START(&pVM->csam.s.StatTime, a);
2428	rc = csamAnalyseCodeStream(pVM, pHandler, pHandler, true, CSAMR3AnalyseCallback, pPage, &cacheRec);
2429	STAM_PROFILE_STOP(&pVM->csam.s.StatTime, a);
2430	if (rc != VINF_SUCCESS)
2431	{
2432	Log(("CSAMCheckGates: csamAnalyseCodeStream failed with %d\n", rc));
2433	continue;
2434	}
2435	/* OpenBSD guest specific patch test. */
2436	if (iGate >= 0x20)
2437	{
2438	PCPUMCTX pCtx;
2439	DISCPUSTATE cpu;
2440	RTGCUINTPTR32 aOpenBsdPushCSOffset[3] = {0x03, /* OpenBSD 3.7 & 3.8 */
2441	0x2B, /* OpenBSD 4.0 installation ISO */
2442	0x2F}; /* OpenBSD 4.0 after install */
2443
2444	pCtx = CPUMQueryGuestCtxPtr(pVCpu);
2445
2446	for (unsigned i=0;i<RT_ELEMENTS(aOpenBsdPushCSOffset);i++)
2447	{
2448	rc = CPUMR3DisasmInstrCPU(pVM, pVCpu, pCtx, pHandler - aOpenBsdPushCSOffset[i], &cpu, NULL);
2449	if ( rc == VINF_SUCCESS
2450	&& cpu.pCurInstr->opcode == OP_PUSH
2451	&& cpu.pCurInstr->param1 == OP_PARM_REG_CS)
2452	{
2453	rc = PATMR3InstallPatch(pVM, pHandler - aOpenBsdPushCSOffset[i], PATMFL_CODE32 \| PATMFL_GUEST_SPECIFIC);
2454	if (RT_SUCCESS(rc))
2455	Log(("Installed OpenBSD interrupt handler prefix instruction (push cs) patch\n"));
2456	}
2457	}
2458	}
2459
2460	/* Trap gates and certain interrupt gates. */
2461	uint32_t fPatchFlags = PATMFL_CODE32 \| PATMFL_IDTHANDLER;
2462
2463	if (pGuestIdte->Gen.u5Type2 == VBOX_IDTE_TYPE2_TRAP_32)
2464	fPatchFlags \|= PATMFL_TRAPHANDLER;
2465	else
2466	fPatchFlags \|= PATMFL_INTHANDLER;
2467
2468	switch (iGate) {
2469	case 8:
2470	case 10:
2471	case 11:
2472	case 12:
2473	case 13:
2474	case 14:
2475	case 17:
2476	fPatchFlags \|= PATMFL_TRAPHANDLER_WITH_ERRORCODE;
2477	break;
2478	default:
2479	/* No error code. */
2480	break;
2481	}
2482
2483	Log(("Installing %s gate handler for 0x%X at %RRv\n", (pGuestIdte->Gen.u5Type2 == VBOX_IDTE_TYPE2_TRAP_32) ? "trap" : "intr", iGate, pHandler));
2484
2485	rc = PATMR3InstallPatch(pVM, pHandler, fPatchFlags);
2486	if (RT_SUCCESS(rc) \|\| rc == VERR_PATM_ALREADY_PATCHED)
2487	{
2488	Log(("Gate handler 0x%X is SAFE!\n", iGate));
2489
2490	RTRCPTR pNewHandlerGC = PATMR3QueryPatchGCPtr(pVM, pHandler);
2491	if (pNewHandlerGC)
2492	{
2493	rc = TRPMR3SetGuestTrapHandler(pVM, iGate, pNewHandlerGC);
2494	if (RT_FAILURE(rc))
2495	Log(("TRPMR3SetGuestTrapHandler %d failed with %Rrc\n", iGate, rc));
2496	}
2497	}
2498	}
2499	} /* for */
2500	STAM_PROFILE_STOP(&pVM->csam.s.StatCheckGates, a);
2501	return VINF_SUCCESS;
2502	}
2503
2504	/**
2505	* Record previous call instruction addresses
2506	*
2507	* @returns VBox status code.
2508	* @param pVM The VM to operate on.
2509	* @param GCPtrCall Call address
2510	*/
2511	VMMR3DECL(int) CSAMR3RecordCallAddress(PVM pVM, RTRCPTR GCPtrCall)
2512	{
2513	for (unsigned i=0;i<RT_ELEMENTS(pVM->csam.s.pvCallInstruction);i++)
2514	{
2515	if (pVM->csam.s.pvCallInstruction[i] == GCPtrCall)
2516	return VINF_SUCCESS;
2517	}
2518
2519	Log(("CSAMR3RecordCallAddress %RRv\n", GCPtrCall));
2520
2521	pVM->csam.s.pvCallInstruction[pVM->csam.s.iCallInstruction++] = GCPtrCall;
2522	if (pVM->csam.s.iCallInstruction >= RT_ELEMENTS(pVM->csam.s.pvCallInstruction))
2523	pVM->csam.s.iCallInstruction = 0;
2524
2525	return VINF_SUCCESS;
2526	}
2527
2528
2529	/**
2530	* Query CSAM state (enabled/disabled)
2531	*
2532	* @returns 0 - disabled, 1 - enabled
2533	* @param pVM The VM to operate on.
2534	*/
2535	VMMR3DECL(int) CSAMR3IsEnabled(PVM pVM)
2536	{
2537	return pVM->fCSAMEnabled;
2538	}
2539
2540	#ifdef VBOX_WITH_DEBUGGER
2541	/**
2542	* The '.csamoff' command.
2543	*
2544	* @returns VBox status.
2545	* @param pCmd Pointer to the command descriptor (as registered).
2546	* @param pCmdHlp Pointer to command helper functions.
2547	* @param pVM Pointer to the current VM (if any).
2548	* @param paArgs Pointer to (readonly) array of arguments.
2549	* @param cArgs Number of arguments in the array.
2550	*/
2551	static DECLCALLBACK(int) csamr3CmdOff(PCDBGCCMD pCmd, PDBGCCMDHLP pCmdHlp, PVM pVM, PCDBGCVAR paArgs, unsigned cArgs, PDBGCVAR pResult)
2552	{
2553	/*
2554	* Validate input.
2555	*/
2556	if (!pVM)
2557	return pCmdHlp->pfnPrintf(pCmdHlp, NULL, "error: The command requires VM to be selected.\n");
2558
2559	CSAMDisableScanning(pVM);
2560	return pCmdHlp->pfnPrintf(pCmdHlp, NULL, "CSAM Scanning disabled\n");
2561	}
2562
2563	/**
2564	* The '.csamon' command.
2565	*
2566	* @returns VBox status.
2567	* @param pCmd Pointer to the command descriptor (as registered).
2568	* @param pCmdHlp Pointer to command helper functions.
2569	* @param pVM Pointer to the current VM (if any).
2570	* @param paArgs Pointer to (readonly) array of arguments.
2571	* @param cArgs Number of arguments in the array.
2572	*/
2573	static DECLCALLBACK(int) csamr3CmdOn(PCDBGCCMD pCmd, PDBGCCMDHLP pCmdHlp, PVM pVM, PCDBGCVAR paArgs, unsigned cArgs, PDBGCVAR pResult)
2574	{
2575	/*
2576	* Validate input.
2577	*/
2578	if (!pVM)
2579	return pCmdHlp->pfnPrintf(pCmdHlp, NULL, "error: The command requires VM to be selected.\n");
2580
2581	CSAMEnableScanning(pVM);
2582	return pCmdHlp->pfnPrintf(pCmdHlp, NULL, "CSAM Scanning enabled\n");
2583	}
2584	#endif

Note: See TracBrowser for help on using the repository browser.

source: vbox/trunk/src/VBox/VMM/PATM/CSAM.cpp@ 22621

Download in other formats: