MMPhys.cpp@ 8564

Last change on this file since 8564 was 8155, checked in by vboxsync, 17 years ago
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1	/* $Id: MMPhys.cpp 8155 2008-04-18 15:16:47Z vboxsync $ */
2	/** @file
3	* MM - Memory Monitor(/Manager) - Physical Memory.
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 Sun Microsystems, Inc.
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18	* Clara, CA 95054 USA or visit http://www.sun.com if you need
19	* additional information or have any questions.
20	*/
21
22
23	/*******************************************************************************
24	* Header Files *
25	*******************************************************************************/
26	#define LOG_GROUP LOG_GROUP_MM_PHYS
27	#include <VBox/mm.h>
28	#include <VBox/pgm.h>
29	#include <VBox/rem.h>
30	#include "MMInternal.h"
31	#include <VBox/vm.h>
32
33	#include <VBox/log.h>
34	#include <VBox/param.h>
35	#include <VBox/err.h>
36	#include <iprt/alloc.h>
37	#include <iprt/assert.h>
38	#include <iprt/string.h>
39
40
41	/**
42	* Register externally allocated RAM for the virtual machine.
43	*
44	* The memory registered with the VM thru this interface must not be freed
45	* before the virtual machine has been destroyed. Bad things may happen... :-)
46	*
47	* @return VBox status code.
48	* @param pVM VM handle.
49	* @param pvRam Virtual address of the guest's physical memory range Must be page aligned.
50	* @param GCPhys The physical address the ram shall be registered at.
51	* @param cb Size of the memory. Must be page aligend.
52	* @param fFlags Flags of the MM_RAM_FLAGS_* defines.
53	* @param pszDesc Description of the memory.
54	*/
55	MMR3DECL(int) MMR3PhysRegister(PVM pVM, void pvRam, RTGCPHYS GCPhys, unsigned cb, unsigned fFlags, const char pszDesc)
56	{
57	return MMR3PhysRegisterEx(pVM, pvRam, GCPhys, cb, fFlags, MM_PHYS_TYPE_NORMAL, pszDesc);
58	}
59
60
61	/**
62	* Register externally allocated RAM for the virtual machine.
63	*
64	* The memory registered with the VM thru this interface must not be freed
65	* before the virtual machine has been destroyed. Bad things may happen... :-)
66	*
67	* @return VBox status code.
68	* @param pVM VM handle.
69	* @param pvRam Virtual address of the guest's physical memory range Must be page aligned.
70	* @param GCPhys The physical address the ram shall be registered at.
71	* @param cb Size of the memory. Must be page aligend.
72	* @param fFlags Flags of the MM_RAM_FLAGS_* defines.
73	* @param enmType Physical range type (MM_PHYS_TYPE_*)
74	* @param pszDesc Description of the memory.
75	* @thread The Emulation Thread.
76	*
77	* @deprecated For the old dynamic allocation code only. Will be removed with VBOX_WITH_NEW_PHYS_CODE.
78	*/
79	/** @todo this function description is not longer up-to-date */
80	MMR3DECL(int) MMR3PhysRegisterEx(PVM pVM, void pvRam, RTGCPHYS GCPhys, unsigned cb, unsigned fFlags, MMPHYSREG enmType, const char pszDesc)
81	{
82	int rc = VINF_SUCCESS;
83
84	Log(("MMR3PhysRegister: pvRam=%p GCPhys=%VGp cb=%#x fFlags=%#x\n", pvRam, GCPhys, cb, fFlags));
85
86	/*
87	* Validate input.
88	*/
89	AssertMsg(pVM, ("Invalid VM pointer\n"));
90	if (pvRam)
91	AssertReturn(RT_ALIGN_P(pvRam, PAGE_SIZE) == pvRam, VERR_INVALID_PARAMETER);
92	else
93	AssertReturn(fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC, VERR_INVALID_PARAMETER);
94	AssertReturn(RT_ALIGN_T(GCPhys, PAGE_SIZE, RTGCPHYS) == GCPhys, VERR_INVALID_PARAMETER);
95	AssertReturn(RT_ALIGN_Z(cb, PAGE_SIZE) == cb, VERR_INVALID_PARAMETER);
96	AssertReturn(enmType == MM_PHYS_TYPE_NORMAL \|\| enmType == MM_PHYS_TYPE_DYNALLOC_CHUNK, VERR_INVALID_PARAMETER);
97	RTGCPHYS GCPhysLast = GCPhys + (cb - 1);
98	AssertReturn(GCPhysLast > GCPhys, VERR_INVALID_PARAMETER);
99
100
101	/*
102	* Check for conflicts.
103	*
104	* We do not support overlapping physical memory regions yet,
105	* even if that's what the MM_RAM_FLAGS_MMIO2 flags is trying to
106	* tell us to do. Provided that all MMIO2 addresses are very high
107	* there is no real danger we'll be able to assign so much memory
108	* for a guest that it'll ever be a problem.
109	*/
110	AssertMsg(!(fFlags & MM_RAM_FLAGS_MMIO2) \|\| GCPhys > 0xc0000000,
111	("MMIO2 addresses should be above 3GB for avoiding conflicts with real RAM.\n"));
112	PMMLOCKEDMEM pCur = pVM->mm.s.pLockedMem;
113	while (pCur)
114	{
115	if ( pCur->eType == MM_LOCKED_TYPE_PHYS
116	&& ( GCPhys - pCur->u.phys.GCPhys < pCur->cb
117	\|\| pCur->u.phys.GCPhys - GCPhys < cb)
118	)
119	{
120	AssertMsgFailed(("Conflicting RAM range. Existing %#x LB%#x, Req %#x LB%#x\n",
121	pCur->u.phys.GCPhys, pCur->cb, GCPhys, cb));
122	return VERR_MM_RAM_CONFLICT;
123	}
124
125	/* next */
126	pCur = pCur->pNext;
127	}
128
129
130	/* Dynamic/on-demand allocation of backing memory? */
131	if (fFlags & MM_RAM_FLAGS_DYNAMIC_ALLOC)
132	{
133	/*
134	* Register the ram with PGM.
135	*/
136	rc = PGMR3PhysRegister(pVM, pvRam, GCPhys, cb, fFlags, NULL, pszDesc);
137	if (VBOX_SUCCESS(rc))
138	{
139	if (fFlags == MM_RAM_FLAGS_DYNAMIC_ALLOC)
140	pVM->mm.s.cBasePages += cb >> PAGE_SHIFT;
141
142	REMR3NotifyPhysRamRegister(pVM, GCPhys, cb, fFlags);
143	return rc;
144	}
145	}
146	else
147	{
148	/*
149	* Lock the memory. (fully allocated by caller)
150	*/
151	PMMLOCKEDMEM pLockedMem;
152	rc = mmR3LockMem(pVM, pvRam, cb, MM_LOCKED_TYPE_PHYS, &pLockedMem, enmType == MM_PHYS_TYPE_DYNALLOC_CHUNK /* fSilentFailure */);
153	if (VBOX_SUCCESS(rc))
154	{
155	pLockedMem->u.phys.GCPhys = GCPhys;
156
157	/*
158	* We set any page flags specified.
159	*/
160	if (fFlags)
161	for (unsigned i = 0; i < cb >> PAGE_SHIFT; i++)
162	pLockedMem->aPhysPages[i].Phys \|= fFlags;
163
164	/*
165	* Register the ram with PGM.
166	*/
167	if (enmType == MM_PHYS_TYPE_NORMAL)
168	{
169	rc = PGMR3PhysRegister(pVM, pvRam, pLockedMem->u.phys.GCPhys, cb, fFlags, &pLockedMem->aPhysPages[0], pszDesc);
170	if (VBOX_SUCCESS(rc))
171	{
172	if (!fFlags)
173	pVM->mm.s.cBasePages += cb >> PAGE_SHIFT;
174
175	REMR3NotifyPhysRamRegister(pVM, GCPhys, cb, fFlags);
176	return rc;
177	}
178	}
179	else
180	{
181	Assert(enmType == MM_PHYS_TYPE_DYNALLOC_CHUNK);
182	return PGMR3PhysRegisterChunk(pVM, pvRam, pLockedMem->u.phys.GCPhys, cb, fFlags, &pLockedMem->aPhysPages[0], pszDesc);
183	}
184	}
185	/* Cleanup is done in VM destruction to which failure of this function will lead. */
186	/* Not true in case of MM_PHYS_TYPE_DYNALLOC_CHUNK */
187	}
188
189	return rc;
190	}
191
192
193	/**
194	* Register a ROM (BIOS) region.
195	*
196	* It goes without saying that this is read-only memory. The memory region must be
197	* in unassigned memory. I.e. from the top of the address space or on the PC in
198	* the 0xa0000-0xfffff range.
199	*
200	* @returns VBox status.
201	* @param pVM VM Handle.
202	* @param pDevIns The device instance owning the ROM region.
203	* @param GCPhys First physical address in the range.
204	* Must be page aligned!
205	* @param cbRange The size of the range (in bytes).
206	* Must be page aligned!
207	* @param pvBinary Pointer to the binary data backing the ROM image.
208	* This must be cbRange bytes big.
209	* It will be copied and doesn't have to stick around.
210	* It will be copied and doesn't have to stick around if fShadow is clear.
211	* @param fShadow Whether to emulate ROM shadowing. This involves leaving
212	* the ROM writable for a while during the POST and refreshing
213	* it at reset. When this flag is set, the memory pointed to by
214	* pvBinary has to stick around for the lifespan of the VM.
215	* @param pszDesc Pointer to description string. This must not be freed.
216	* @remark There is no way to remove the rom, automatically on device cleanup or
217	* manually from the device yet. At present I doubt we need such features...
218	*/
219	MMR3DECL(int) MMR3PhysRomRegister(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTUINT cbRange, const void *pvBinary,
220	bool fShadow, const char *pszDesc)
221	{
222	/*
223	* Validate input.
224	*/
225	AssertPtrReturn(pDevIns, VERR_INVALID_PARAMETER);
226	AssertReturn(RT_ALIGN_T(GCPhys, PAGE_SIZE, RTGCPHYS) == GCPhys, VERR_INVALID_PARAMETER);
227	AssertReturn(RT_ALIGN(cbRange, PAGE_SIZE) == cbRange, VERR_INVALID_PARAMETER);
228	RTGCPHYS GCPhysLast = GCPhys + (cbRange - 1);
229	AssertReturn(GCPhysLast > GCPhys, VERR_INVALID_PARAMETER);
230	AssertPtrReturn(pvBinary, VERR_INVALID_PARAMETER);
231
232
233	/*
234	* Check if this can fit in an existing range.
235	*
236	* We do not handle the case where a new chunk of locked memory is
237	* required to accommodate the ROM since we assume MMR3PhysReserve()
238	* have been called to reserve the memory first.
239	*
240	* To make things even simpler, the pages in question must be
241	* marked as reserved.
242	*/
243	PMMLOCKEDMEM pCur = pVM->mm.s.pLockedMem;
244	for ( ; pCur; pCur = pCur->pNext)
245	if ( pCur->eType == MM_LOCKED_TYPE_PHYS
246	&& GCPhys - pCur->u.phys.GCPhys < pCur->cb)
247	break;
248	if (!pCur)
249	{
250	AssertMsgFailed(("No physical range was found matching the ROM location (%#VGp LB%#x)\n", GCPhys, cbRange));
251	return VERR_INVALID_PARAMETER;
252	}
253	if (GCPhysLast - pCur->u.phys.GCPhys >= pCur->cb)
254	{
255	AssertMsgFailed(("The ROM range (%#VGp LB%#x) was crossing the end of the physical range (%#VGp LB%#x)\n",
256	GCPhys, cbRange, pCur->u.phys.GCPhys, pCur->cb));
257	return VERR_INVALID_PARAMETER;
258	}
259
260	/* flags must be all reserved. */
261	unsigned iPage = (GCPhys - pCur->u.phys.GCPhys) >> PAGE_SHIFT;
262	unsigned iPageEnd = cbRange >> PAGE_SHIFT;
263	for (; iPage < iPageEnd; iPage++)
264	if ( (pCur->aPhysPages[iPage].Phys & (MM_RAM_FLAGS_RESERVED \| MM_RAM_FLAGS_ROM \| MM_RAM_FLAGS_MMIO \| MM_RAM_FLAGS_MMIO2))
265	!= MM_RAM_FLAGS_RESERVED)
266	{
267	AssertMsgFailed(("Flags conflict at %VGp, HCPhys=%VHp.\n", pCur->u.phys.GCPhys + (iPage << PAGE_SHIFT), pCur->aPhysPages[iPage].Phys));
268	return VERR_INVALID_PARAMETER;
269	}
270
271	/*
272	* Copy the ram and update the flags.
273	*/
274	iPage = (GCPhys - pCur->u.phys.GCPhys) >> PAGE_SHIFT;
275	void pvCopy = (char )pCur->pv + (iPage << PAGE_SHIFT);
276	memcpy(pvCopy, pvBinary, cbRange);
277
278	const unsigned fSet = fShadow ? MM_RAM_FLAGS_ROM \| MM_RAM_FLAGS_MMIO2 : MM_RAM_FLAGS_ROM;
279	for (; iPage < iPageEnd; iPage++)
280	{
281	pCur->aPhysPages[iPage].Phys &= ~MM_RAM_FLAGS_RESERVED;
282	pCur->aPhysPages[iPage].Phys \|= fSet;
283	}
284	int rc = PGMR3PhysSetFlags(pVM, GCPhys, cbRange, fSet, ~MM_RAM_FLAGS_RESERVED);
285	AssertRC(rc);
286	if (VBOX_SUCCESS(rc))
287	{
288	/*
289	* To prevent the shadow page table mappings from being RW in raw-mode, we
290	* must currently employ a little hack. We register an write access handler
291	* and thereby ensures a RO mapping of the pages. This is NOT very nice,
292	* and wasn't really my intention when writing the code, consider it a PGM bug.
293	*
294	* ASSUMES that REMR3NotifyPhysRomRegister doesn't call cpu_register_physical_memory
295	* when there is no HC handler. The result would probably be immediate boot failure.
296	*/
297	rc = PGMR3HandlerPhysicalRegister(pVM, PGMPHYSHANDLERTYPE_PHYSICAL_WRITE, GCPhys, GCPhys + cbRange - 1,
298	NULL, NULL,
299	NULL, "pgmPhysRomWriteHandler", 0,
300	NULL, "pgmPhysRomWriteHandler", 0, pszDesc);
301	AssertRC(rc);
302	}
303
304	/*
305	* Create a ROM range it so we can make a 'info rom' thingy and more importantly
306	* reload and protect/unprotect shadow ROM correctly.
307	*/
308	if (VBOX_SUCCESS(rc))
309	{
310	PMMROMRANGE pRomRange = (PMMROMRANGE)MMR3HeapAlloc(pVM, MM_TAG_MM, sizeof(*pRomRange));
311	AssertReturn(pRomRange, VERR_NO_MEMORY);
312	pRomRange->GCPhys = GCPhys;
313	pRomRange->cbRange = cbRange;
314	pRomRange->pszDesc = pszDesc;
315	pRomRange->fShadow = fShadow;
316	pRomRange->fWritable = fShadow;
317	pRomRange->pvBinary = fShadow ? pvBinary : NULL;
318	pRomRange->pvCopy = pvCopy;
319
320	/* sort it for 'info rom' readability. */
321	PMMROMRANGE pPrev = NULL;
322	PMMROMRANGE pCur = pVM->mm.s.pRomHead;
323	while (pCur && pCur->GCPhys < GCPhys)
324	{
325	pPrev = pCur;
326	pCur = pCur->pNext;
327	}
328	pRomRange->pNext = pCur;
329	if (pPrev)
330	pPrev->pNext = pRomRange;
331	else
332	pVM->mm.s.pRomHead = pRomRange;
333	}
334
335	REMR3NotifyPhysRomRegister(pVM, GCPhys, cbRange, pvCopy, fShadow);
336	return rc; /* we're sloppy with error cleanup here, but we're toast anyway if this fails. */
337	}
338
339
340	/**
341	* Reserve physical address space for ROM and MMIO ranges.
342	*
343	* @returns VBox status code.
344	* @param pVM VM Handle.
345	* @param GCPhys Start physical address.
346	* @param cbRange The size of the range.
347	* @param pszDesc Description string.
348	*/
349	MMR3DECL(int) MMR3PhysReserve(PVM pVM, RTGCPHYS GCPhys, RTUINT cbRange, const char *pszDesc)
350	{
351	/*
352	* Validate input.
353	*/
354	AssertReturn(RT_ALIGN_T(GCPhys, PAGE_SIZE, RTGCPHYS) == GCPhys, VERR_INVALID_PARAMETER);
355	AssertReturn(RT_ALIGN(cbRange, PAGE_SIZE) == cbRange, VERR_INVALID_PARAMETER);
356	RTGCPHYS GCPhysLast = GCPhys + (cbRange - 1);
357	AssertReturn(GCPhysLast > GCPhys, VERR_INVALID_PARAMETER);
358
359	/*
360	* Do we have an existing physical address range for the request?
361	*/
362	PMMLOCKEDMEM pCur = pVM->mm.s.pLockedMem;
363	for ( ; pCur; pCur = pCur->pNext)
364	if ( pCur->eType == MM_LOCKED_TYPE_PHYS
365	&& GCPhys - pCur->u.phys.GCPhys < pCur->cb)
366	break;
367	if (!pCur)
368	{
369	/*
370	* No range, we'll just allocate backing pages and register
371	* them as reserved using the Ram interface.
372	*/
373	void *pvPages;
374	int rc = SUPPageAlloc(cbRange >> PAGE_SHIFT, &pvPages);
375	if (VBOX_SUCCESS(rc))
376	{
377	rc = MMR3PhysRegister(pVM, pvPages, GCPhys, cbRange, MM_RAM_FLAGS_RESERVED, pszDesc);
378	if (VBOX_FAILURE(rc))
379	SUPPageFree(pvPages, cbRange >> PAGE_SHIFT);
380	}
381	return rc;
382	}
383	if (GCPhysLast - pCur->u.phys.GCPhys >= pCur->cb)
384	{
385	AssertMsgFailed(("The reserved range (%#VGp LB%#x) was crossing the end of the physical range (%#VGp LB%#x)\n",
386	GCPhys, cbRange, pCur->u.phys.GCPhys, pCur->cb));
387	return VERR_INVALID_PARAMETER;
388	}
389
390	/*
391	* Update the flags.
392	*/
393	unsigned iPage = (GCPhys - pCur->u.phys.GCPhys) >> PAGE_SHIFT;
394	unsigned iPageEnd = cbRange >> PAGE_SHIFT;
395	for (; iPage < iPageEnd; iPage++)
396	pCur->aPhysPages[iPage].Phys \|= MM_RAM_FLAGS_RESERVED;
397	int rc = PGMR3PhysSetFlags(pVM, GCPhys, cbRange, MM_RAM_FLAGS_RESERVED, ~0);
398	AssertRC(rc);
399
400	REMR3NotifyPhysReserve(pVM, GCPhys, cbRange);
401	return rc;
402	}
403
404
405	/**
406	* Get the size of the base RAM.
407	* This usually means the size of the first contigous block of physical memory.
408	*
409	* @returns The guest base RAM size.
410	* @param pVM The VM handle.
411	* @thread Any.
412	*/
413	MMR3DECL(uint64_t) MMR3PhysGetRamSize(PVM pVM)
414	{
415	return pVM->mm.s.cbRamBase;
416	}
417
418
419	/**
420	* Called by MMR3Reset to reset the shadow ROM.
421	*
422	* Resetting involves reloading the ROM into RAM and make it
423	* wriable again (as it was made read only at the end of the POST).
424	*
425	* @param pVM The VM handle.
426	*/
427	void mmR3PhysRomReset(PVM pVM)
428	{
429	for (PMMROMRANGE pCur = pVM->mm.s.pRomHead; pCur; pCur = pCur->pNext)
430	if (pCur->fShadow)
431	{
432	memcpy(pCur->pvCopy, pCur->pvBinary, pCur->cbRange);
433	if (!pCur->fWritable)
434	{
435	int rc = PGMHandlerPhysicalDeregister(pVM, pCur->GCPhys);
436	AssertRC(rc);
437	pCur->fWritable = true;
438
439	rc = PGMR3PhysSetFlags(pVM, pCur->GCPhys, pCur->cbRange, MM_RAM_FLAGS_MMIO2, ~0); /* ROM -> ROM + MMIO2 */
440	AssertRC(rc);
441
442	REMR3NotifyPhysRomRegister(pVM, pCur->GCPhys, pCur->cbRange, pCur->pvCopy, true /* read-write now */);
443	}
444	}
445	}
446
447
448	/**
449	* Write-protects a shadow ROM range.
450	*
451	* This is called late in the POST for shadow ROM ranges.
452	*
453	* @returns VBox status code.
454	* @param pVM The VM handle.
455	* @param GCPhys Start of the registered shadow ROM range
456	* @param cbRange The length of the registered shadow ROM range.
457	* This can be NULL (not sure about the BIOS interface yet).
458	*/
459	MMR3DECL(int) MMR3PhysRomProtect(PVM pVM, RTGCPHYS GCPhys, RTUINT cbRange)
460	{
461	for (PMMROMRANGE pCur = pVM->mm.s.pRomHead; pCur; pCur = pCur->pNext)
462	if ( pCur->GCPhys == GCPhys
463	&& ( pCur->cbRange == cbRange
464	\|\| !cbRange))
465	{
466	if (pCur->fWritable)
467	{
468	cbRange = pCur->cbRange;
469	int rc = PGMR3HandlerPhysicalRegister(pVM, PGMPHYSHANDLERTYPE_PHYSICAL_WRITE, GCPhys, GCPhys + cbRange - 1,
470	NULL, NULL,
471	NULL, "pgmPhysRomWriteHandler", 0,
472	NULL, "pgmPhysRomWriteHandler", 0, pCur->pszDesc);
473	AssertRCReturn(rc, rc);
474	pCur->fWritable = false;
475
476	rc = PGMR3PhysSetFlags(pVM, GCPhys, cbRange, 0, ~MM_RAM_FLAGS_MMIO2); /* ROM + MMIO2 -> ROM */
477	AssertRCReturn(rc, rc);
478	/* Don't bother with the MM page flags here because I don't think they are
479	really used beyond conflict checking at ROM, RAM, Reservation, etc. */
480
481	REMR3NotifyPhysRomRegister(pVM, GCPhys, cbRange, pCur->pvCopy, false /* read-only now */);
482	}
483	return VINF_SUCCESS;
484	}
485	AssertMsgFailed(("GCPhys=%VGp cbRange=%#x\n", GCPhys, cbRange));
486	return VERR_INVALID_PARAMETER;
487	}
488

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source: vbox/trunk/src/VBox/VMM/MMPhys.cpp@ 8564

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