VirtualBox

source: vbox/trunk/src/VBox/VMM/IOM.cpp@ 7600

Last change on this file since 7600 was 7600, checked in by vboxsync, 17 years ago

Use %VGp for guest physical addresses
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1/* $Id: IOM.cpp 7600 2008-03-27 16:57:17Z vboxsync $ */
2/** @file
3 * IOM - Input / Output Monitor.
4 */
5
6/*
7 * Copyright (C) 2006-2007 innotek GmbH
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/** @page pg_iom IOM - The Input/Output Monitor
20 *
21 * The input/output monitor will handle I/O exceptions routing them to the
22 * appropriate device. It implements an API to register and deregister
23 * virtual port I/O handler and memory mapped I/O handlers. A handler is
24 * PDM devices and a set of callback functions.
25 *
26 * Port I/O (PIO) is easily trapped by ensuring IOPL is 0, thus causing \#GP(0) on
27 * any access to I/O ports. Using the dissassembler (DIS) the faulting
28 * instruction will be interpreted determing the port and if there is a handler
29 * for it. If a handler exists it will be called, else default action will be
30 * performed.
31 *
32 * Memory Mapped I/O (MMIO) is gonna be worse since there are numerous instructions
33 * which can access memory. I'm afraid we might have to emulate each
34 * instruction which faults. The Execution Monitor (EM) will provide facilities
35 * for doing this using DIS.
36 *
37 * Emulating I/O port access is less complex and sligtly faster than emulating MMIO,
38 * so in most cases we should encourage the OS to use PIO. Devices which are freqently
39 * accessed should register GC handlers to speed up execution.
40 *
41 */
42
43
44/*******************************************************************************
45* Header Files *
46*******************************************************************************/
47#define LOG_GROUP LOG_GROUP_IOM
48#include <VBox/iom.h>
49#include <VBox/cpum.h>
50#include <VBox/pgm.h>
51#include <VBox/sup.h>
52#include <VBox/mm.h>
53#include <VBox/stam.h>
54#include <VBox/dbgf.h>
55#include "IOMInternal.h"
56#include <VBox/vm.h>
57
58#include <VBox/param.h>
59#include <iprt/assert.h>
60#include <iprt/alloc.h>
61#include <iprt/string.h>
62#include <VBox/log.h>
63#include <VBox/err.h>
64
65
66/*******************************************************************************
67* Internal Functions *
68*******************************************************************************/
69static DECLCALLBACK(int) iomr3RelocateIOPortCallback(PAVLROIOPORTNODECORE pNode, void *pvUser);
70static DECLCALLBACK(int) iomr3RelocateMMIOCallback(PAVLROGCPHYSNODECORE pNode, void *pvUser);
71static DECLCALLBACK(void) iomR3IOPortInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
72static DECLCALLBACK(void) iomR3MMIOInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
73static DECLCALLBACK(int) iomR3IOPortDummyIn(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb);
74static DECLCALLBACK(int) iomR3IOPortDummyOut(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb);
75static DECLCALLBACK(int) iomR3IOPortDummyInStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrDst, unsigned *pcTransfer, unsigned cb);
76static DECLCALLBACK(int) iomR3IOPortDummyOutStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrSrc, unsigned *pcTransfer, unsigned cb);
77
78#ifdef VBOX_WITH_STATISTICS
79static const char *iomr3IOPortGetStandardName(RTIOPORT Port);
80#endif
81
82
83/**
84 * Initializes the IOM.
85 *
86 * @returns VBox status code.
87 * @param pVM The VM to operate on.
88 */
89IOMR3DECL(int) IOMR3Init(PVM pVM)
90{
91 LogFlow(("IOMR3Init:\n"));
92
93 /*
94 * Assert alignment and sizes.
95 */
96 AssertRelease(!(RT_OFFSETOF(VM, iom.s) & 31));
97 AssertRelease(sizeof(pVM->iom.s) <= sizeof(pVM->iom.padding));
98
99 /*
100 * Setup any fixed pointers and offsets.
101 */
102 pVM->iom.s.offVM = RT_OFFSETOF(VM, iom);
103
104 /*
105 * Allocate the trees structure.
106 */
107 int rc = MMHyperAlloc(pVM, sizeof(*pVM->iom.s.pTreesHC), 0, MM_TAG_IOM, (void **)&pVM->iom.s.pTreesHC);
108 if (VBOX_SUCCESS(rc))
109 {
110 pVM->iom.s.pTreesGC = MMHyperHC2GC(pVM, pVM->iom.s.pTreesHC);
111
112 /*
113 * Info.
114 */
115 DBGFR3InfoRegisterInternal(pVM, "ioport", "Dumps all IOPort ranges. No arguments.", &iomR3IOPortInfo);
116 DBGFR3InfoRegisterInternal(pVM, "mmio", "Dumps all MMIO ranges. No arguments.", &iomR3MMIOInfo);
117
118 /*
119 * Statistics.
120 */
121 STAM_REG(pVM, &pVM->iom.s.StatGCMMIOHandler, STAMTYPE_PROFILE, "/IOM/GC/MMIOHandler", STAMUNIT_TICKS_PER_CALL, "Profiling of the IOMGCMMIOHandler() body, only success calls.");
122 STAM_REG(pVM, &pVM->iom.s.StatGCMMIOFailures, STAMTYPE_COUNTER, "/IOM/GC/MMIOFailures", STAMUNIT_OCCURENCES, "Number of times IOMGCMMIOHandler() didn't service the request.");
123 STAM_REG(pVM, &pVM->iom.s.StatGCInstMov, STAMTYPE_PROFILE, "/IOM/GC/Inst/MOV", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOV instruction emulation.");
124 STAM_REG(pVM, &pVM->iom.s.StatGCInstCmp, STAMTYPE_PROFILE, "/IOM/GC/Inst/CMP", STAMUNIT_TICKS_PER_CALL, "Profiling of the CMP instruction emulation.");
125 STAM_REG(pVM, &pVM->iom.s.StatGCInstAnd, STAMTYPE_PROFILE, "/IOM/GC/Inst/AND", STAMUNIT_TICKS_PER_CALL, "Profiling of the AND instruction emulation.");
126 STAM_REG(pVM, &pVM->iom.s.StatGCInstTest, STAMTYPE_PROFILE, "/IOM/GC/Inst/TEST", STAMUNIT_TICKS_PER_CALL, "Profiling of the TEST instruction emulation.");
127 STAM_REG(pVM, &pVM->iom.s.StatGCInstXchg, STAMTYPE_PROFILE, "/IOM/GC/Inst/XCHG", STAMUNIT_TICKS_PER_CALL, "Profiling of the XCHG instruction emulation.");
128 STAM_REG(pVM, &pVM->iom.s.StatGCInstStos, STAMTYPE_PROFILE, "/IOM/GC/Inst/STOS", STAMUNIT_TICKS_PER_CALL, "Profiling of the STOS instruction emulation.");
129 STAM_REG(pVM, &pVM->iom.s.StatGCInstLods, STAMTYPE_PROFILE, "/IOM/GC/Inst/LODS", STAMUNIT_TICKS_PER_CALL, "Profiling of the LODS instruction emulation.");
130 STAM_REG(pVM, &pVM->iom.s.StatGCInstMovs, STAMTYPE_PROFILE, "/IOM/GC/Inst/MOVS", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation.");
131 STAM_REG(pVM, &pVM->iom.s.StatGCInstMovsToMMIO, STAMTYPE_PROFILE, "/IOM/GC/Inst/MOVS/ToMMIO", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation - Mem2MMIO.");
132 STAM_REG(pVM, &pVM->iom.s.StatGCInstMovsFromMMIO, STAMTYPE_PROFILE, "/IOM/GC/Inst/MOVS/FromMMIO", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation - MMIO2Mem.");
133 STAM_REG(pVM, &pVM->iom.s.StatGCInstMovsMMIO, STAMTYPE_PROFILE, "/IOM/GC/Inst/MOVS/MMIO2MMIO", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation - MMIO2MMIO.");
134 STAM_REG(pVM, &pVM->iom.s.StatGCInstOther, STAMTYPE_COUNTER, "/IOM/GC/Inst/Other", STAMUNIT_OCCURENCES, "Other instructions counter.");
135 STAM_REG(pVM, &pVM->iom.s.StatGCMMIO1Byte, STAMTYPE_COUNTER, "/IOM/GC/MMIO/Access1", STAMUNIT_OCCURENCES, "MMIO access by 1 byte counter.");
136 STAM_REG(pVM, &pVM->iom.s.StatGCMMIO2Bytes, STAMTYPE_COUNTER, "/IOM/GC/MMIO/Access2", STAMUNIT_OCCURENCES, "MMIO access by 2 bytes counter.");
137 STAM_REG(pVM, &pVM->iom.s.StatGCMMIO4Bytes, STAMTYPE_COUNTER, "/IOM/GC/MMIO/Access4", STAMUNIT_OCCURENCES, "MMIO access by 4 bytes counter.");
138 STAM_REG(pVM, &pVM->iom.s.StatGCIOPortHandler, STAMTYPE_PROFILE, "/IOM/GC/PortIOHandler", STAMUNIT_TICKS_PER_CALL, "Profiling of the IOMGCPortIOHandler() body, only success calls.");
139 STAM_REG(pVM, &pVM->iom.s.StatGCInstIn, STAMTYPE_COUNTER, "/IOM/GC/Inst/In", STAMUNIT_OCCURENCES, "Counter of any IN instructions.");
140 STAM_REG(pVM, &pVM->iom.s.StatGCInstOut, STAMTYPE_COUNTER, "/IOM/GC/Inst/Out", STAMUNIT_OCCURENCES, "Counter of any OUT instructions.");
141 STAM_REG(pVM, &pVM->iom.s.StatGCInstIns, STAMTYPE_COUNTER, "/IOM/GC/Inst/Ins", STAMUNIT_OCCURENCES, "Counter of any INS instructions.");
142 STAM_REG(pVM, &pVM->iom.s.StatGCInstOuts, STAMTYPE_COUNTER, "/IOM/GC/Inst/Outs", STAMUNIT_OCCURENCES, "Counter of any OUTS instructions.");
143 }
144
145 /* Redundant, but just in case we change something in the future */
146 IOMFlushCache(pVM);
147
148 LogFlow(("IOMR3Init: returns %Vrc\n", rc));
149 return rc;
150}
151
152
153/**
154 * The VM is being reset.
155 *
156 * @param pVM VM handle.
157 */
158IOMR3DECL(void) IOMR3Reset(PVM pVM)
159{
160 IOMFlushCache(pVM);
161}
162
163
164/**
165 * Applies relocations to data and code managed by this
166 * component. This function will be called at init and
167 * whenever the VMM need to relocate it self inside the GC.
168 *
169 * The IOM will update the addresses used by the switcher.
170 *
171 * @param pVM The VM.
172 * @param offDelta Relocation delta relative to old location.
173 */
174IOMR3DECL(void) IOMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
175{
176 LogFlow(("IOMR3Relocate: offDelta=%d\n", offDelta));
177
178 /*
179 * Apply relocations to the GC callbacks.
180 */
181 pVM->iom.s.pTreesGC = MMHyperHC2GC(pVM, pVM->iom.s.pTreesHC);
182 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesHC->IOPortTreeGC, true, iomr3RelocateIOPortCallback, &offDelta);
183 RTAvlroGCPhysDoWithAll(&pVM->iom.s.pTreesHC->MMIOTreeGC, true, iomr3RelocateMMIOCallback, &offDelta);
184
185 /*
186 * Apply relocations to the cached GC handlers
187 */
188 if (pVM->iom.s.pRangeLastReadGC)
189 pVM->iom.s.pRangeLastReadGC += offDelta;
190 if (pVM->iom.s.pRangeLastWriteGC)
191 pVM->iom.s.pRangeLastWriteGC += offDelta;
192 if (pVM->iom.s.pStatsLastReadGC)
193 pVM->iom.s.pStatsLastReadGC += offDelta;
194 if (pVM->iom.s.pStatsLastWriteGC)
195 pVM->iom.s.pStatsLastWriteGC += offDelta;
196}
197
198
199/**
200 * Callback function for relocating a I/O port range.
201 *
202 * @returns 0 (continue enum)
203 * @param pNode Pointer to a IOMIOPORTRANGEGC node.
204 * @param pvUser Pointer to the offDelta. This is a pointer to the delta since we're
205 * not certain the delta will fit in a void pointer for all possible configs.
206 */
207static DECLCALLBACK(int) iomr3RelocateIOPortCallback(PAVLROIOPORTNODECORE pNode, void *pvUser)
208{
209 PIOMIOPORTRANGEGC pRange = (PIOMIOPORTRANGEGC)pNode;
210 RTGCINTPTR offDelta = *(PRTGCINTPTR)pvUser;
211
212 Assert(pRange->pDevIns);
213 pRange->pDevIns += offDelta;
214 if (pRange->pfnOutCallback)
215 pRange->pfnOutCallback += offDelta;
216 if (pRange->pfnInCallback)
217 pRange->pfnInCallback += offDelta;
218 if (pRange->pfnOutStrCallback)
219 pRange->pfnOutStrCallback += offDelta;
220 if (pRange->pfnInStrCallback)
221 pRange->pfnInStrCallback += offDelta;
222 /** @todo IOMIOPORTRANGEGC::pvUser hack - relocate if 64KB or higher. This hack should be removed! */
223 if (pRange->pvUser > _64K)
224 pRange->pvUser += offDelta;
225 return 0;
226}
227
228
229/**
230 * Callback function for relocating a MMIO range.
231 *
232 * @returns 0 (continue enum)
233 * @param pNode Pointer to a IOMMMIORANGEGC node.
234 * @param pvUser Pointer to the offDelta. This is a pointer to the delta since we're
235 * not certain the delta will fit in a void pointer for all possible configs.
236 */
237static DECLCALLBACK(int) iomr3RelocateMMIOCallback(PAVLROGCPHYSNODECORE pNode, void *pvUser)
238{
239 PIOMMMIORANGEGC pRange = (PIOMMMIORANGEGC)pNode;
240 RTGCINTPTR offDelta = *(PRTGCINTPTR)pvUser;
241
242 Assert(pRange->pDevIns);
243 pRange->pDevIns += offDelta;
244
245 if (pRange->pfnWriteCallback)
246 pRange->pfnWriteCallback += offDelta;
247 if (pRange->pfnReadCallback)
248 pRange->pfnReadCallback += offDelta;
249 if (pRange->pfnFillCallback)
250 pRange->pfnFillCallback += offDelta;
251 /** @todo IOMMMIORANGEGC::pvUser hack - relocate if 64KB or higher. This hack should be removed! */
252 if (pRange->pvUser > _64K)
253 pRange->pvUser += offDelta;
254 return 0;
255}
256
257
258/**
259 * Terminates the IOM.
260 *
261 * Termination means cleaning up and freeing all resources,
262 * the VM it self is at this point powered off or suspended.
263 *
264 * @returns VBox status code.
265 * @param pVM The VM to operate on.
266 */
267IOMR3DECL(int) IOMR3Term(PVM pVM)
268{
269 /*
270 * IOM is not owning anything but automatically freed resources,
271 * so there's nothing to do here.
272 */
273 return VINF_SUCCESS;
274}
275
276
277#ifdef VBOX_WITH_STATISTICS
278/**
279 * Create the statistics node for an I/O port.
280 *
281 * @returns Pointer to new stats node.
282 *
283 * @param pVM VM handle.
284 * @param Port Port.
285 * @param pszDesc Description.
286 */
287PIOMIOPORTSTATS iomr3IOPortStatsCreate(PVM pVM, RTIOPORT Port, const char *pszDesc)
288{
289 /* check if it already exists. */
290 PIOMIOPORTSTATS pPort = (PIOMIOPORTSTATS)RTAvloIOPortGet(&pVM->iom.s.pTreesHC->IOPortStatTree, Port);
291 if (pPort)
292 return pPort;
293
294 /* allocate stats node. */
295 int rc = MMHyperAlloc(pVM, sizeof(*pPort), 0, MM_TAG_IOM_STATS, (void **)&pPort);
296 AssertRC(rc);
297 if (VBOX_SUCCESS(rc))
298 {
299 /* insert into the tree. */
300 pPort->Core.Key = Port;
301 if (RTAvloIOPortInsert(&pVM->iom.s.pTreesHC->IOPortStatTree, &pPort->Core))
302 {
303 /* put a name on common ports. */
304 if (!pszDesc)
305 pszDesc = iomr3IOPortGetStandardName(Port);
306
307 /* register the statistics counters. */
308 char szName[64];
309 RTStrPrintf(szName, sizeof(szName), "/IOM/Ports/%04x-In-R3", Port);
310 rc = STAMR3Register(pVM, &pPort->InR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszDesc);
311 AssertRC(rc);
312
313 RTStrPrintf(szName, sizeof(szName), "/IOM/Ports/%04x-Out-R3", Port);
314 rc = STAMR3Register(pVM, &pPort->OutR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszDesc);
315 AssertRC(rc);
316
317 RTStrPrintf(szName, sizeof(szName), "/IOM/Ports/%04x-In-GC", Port);
318 rc = STAMR3Register(pVM, &pPort->InGC, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszDesc);
319 AssertRC(rc);
320
321 RTStrPrintf(szName, sizeof(szName), "/IOM/Ports/%04x-Out-GC", Port);
322 rc = STAMR3Register(pVM, &pPort->OutGC, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszDesc);
323 AssertRC(rc);
324
325 RTStrPrintf(szName, sizeof(szName), "/IOM/Ports/%04x-In-GC-2-R3", Port);
326 rc = STAMR3Register(pVM, &pPort->InGCToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszDesc);
327 AssertRC(rc);
328
329 RTStrPrintf(szName, sizeof(szName), "/IOM/Ports/%04x-Out-GC-2-R3", Port);
330 rc = STAMR3Register(pVM, &pPort->OutGCToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszDesc);
331 AssertRC(rc);
332
333 RTStrPrintf(szName, sizeof(szName), "/IOM/Ports/%04x-In-R0", Port);
334 rc = STAMR3Register(pVM, &pPort->InR0, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszDesc);
335 AssertRC(rc);
336
337 RTStrPrintf(szName, sizeof(szName), "/IOM/Ports/%04x-Out-R0", Port);
338 rc = STAMR3Register(pVM, &pPort->OutR0, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszDesc);
339 AssertRC(rc);
340
341 RTStrPrintf(szName, sizeof(szName), "/IOM/Ports/%04x-In-R0-2-R3", Port);
342 rc = STAMR3Register(pVM, &pPort->InR0ToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszDesc);
343 AssertRC(rc);
344
345 RTStrPrintf(szName, sizeof(szName), "/IOM/Ports/%04x-Out-R0-2-R3", Port);
346 rc = STAMR3Register(pVM, &pPort->OutR0ToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszDesc);
347 AssertRC(rc);
348
349 /* Profiling */
350 RTStrPrintf(szName, sizeof(szName), "/IOM/Ports/%04x-In-R3/Prof", Port);
351 rc = STAMR3Register(pVM, &pPort->ProfInR3, STAMTYPE_PROFILE, STAMVISIBILITY_USED, szName, STAMUNIT_TICKS_PER_CALL, pszDesc);
352 AssertRC(rc);
353
354 RTStrPrintf(szName, sizeof(szName), "/IOM/Ports/%04x-Out-R3/Prof", Port);
355 rc = STAMR3Register(pVM, &pPort->ProfOutR3, STAMTYPE_PROFILE, STAMVISIBILITY_USED, szName, STAMUNIT_TICKS_PER_CALL, pszDesc);
356 AssertRC(rc);
357
358 RTStrPrintf(szName, sizeof(szName), "/IOM/Ports/%04x-In-GC/Prof", Port);
359 rc = STAMR3Register(pVM, &pPort->ProfInGC, STAMTYPE_PROFILE, STAMVISIBILITY_USED, szName, STAMUNIT_TICKS_PER_CALL, pszDesc);
360 AssertRC(rc);
361
362 RTStrPrintf(szName, sizeof(szName), "/IOM/Ports/%04x-Out-GC/Prof", Port);
363 rc = STAMR3Register(pVM, &pPort->ProfOutGC, STAMTYPE_PROFILE, STAMVISIBILITY_USED, szName, STAMUNIT_TICKS_PER_CALL, pszDesc);
364 AssertRC(rc);
365
366 RTStrPrintf(szName, sizeof(szName), "/IOM/Ports/%04x-In-R0/Prof", Port);
367 rc = STAMR3Register(pVM, &pPort->ProfInR0, STAMTYPE_PROFILE, STAMVISIBILITY_USED, szName, STAMUNIT_TICKS_PER_CALL, pszDesc);
368 AssertRC(rc);
369
370 RTStrPrintf(szName, sizeof(szName), "/IOM/Ports/%04x-Out-R0/Prof", Port);
371 rc = STAMR3Register(pVM, &pPort->ProfOutR0, STAMTYPE_PROFILE, STAMVISIBILITY_USED, szName, STAMUNIT_TICKS_PER_CALL, pszDesc);
372 AssertRC(rc);
373
374 return pPort;
375 }
376 AssertMsgFailed(("what! Port=%d\n", Port));
377 MMHyperFree(pVM, pPort);
378 }
379 return NULL;
380}
381
382
383/**
384 * Create the statistics node for an MMIO address.
385 *
386 * @returns Pointer to new stats node.
387 *
388 * @param pVM VM handle.
389 * @param GCPhys The address.
390 * @param pszDesc Description.
391 */
392PIOMMMIOSTATS iomR3MMIOStatsCreate(PVM pVM, RTGCPHYS GCPhys, const char *pszDesc)
393{
394 AssertGCPhys32(GCPhys);
395 /* check if it already exists. */
396 PIOMMMIOSTATS pStats = (PIOMMMIOSTATS)RTAvloGCPhysGet(&pVM->iom.s.pTreesHC->MMIOStatTree, GCPhys);
397 if (pStats)
398 return pStats;
399#if 1
400 /* allocate stats node. */
401 int rc = MMHyperAlloc(pVM, sizeof(*pStats), 0, MM_TAG_IOM_STATS, (void **)&pStats);
402 AssertRC(rc);
403 if (VBOX_SUCCESS(rc))
404 {
405 /* insert into the tree. */
406 pStats->Core.Key = GCPhys;
407 if (RTAvloGCPhysInsert(&pVM->iom.s.pTreesHC->MMIOStatTree, &pStats->Core))
408 {
409 /* register the statistics counters. */
410 char szName[64];
411 RTStrPrintf(szName, sizeof(szName), "/IOM/MMIO/%RGp-Read-R3", GCPhys);
412 rc = STAMR3Register(pVM, &pStats->ReadR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszDesc);
413 AssertRC(rc);
414
415 RTStrPrintf(szName, sizeof(szName), "/IOM/MMIO/%RGp-Write-R3", GCPhys);
416 rc = STAMR3Register(pVM, &pStats->WriteR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszDesc);
417 AssertRC(rc);
418
419 RTStrPrintf(szName, sizeof(szName), "/IOM/MMIO/%RGp-Read-GC", GCPhys);
420 rc = STAMR3Register(pVM, &pStats->ReadGC, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszDesc);
421 AssertRC(rc);
422
423 RTStrPrintf(szName, sizeof(szName), "/IOM/MMIO/%RGp-Write-GC", GCPhys);
424 rc = STAMR3Register(pVM, &pStats->WriteGC, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszDesc);
425 AssertRC(rc);
426
427 RTStrPrintf(szName, sizeof(szName), "/IOM/MMIO/%RGp-Read-GC-2-R3", GCPhys);
428 rc = STAMR3Register(pVM, &pStats->ReadGCToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszDesc);
429 AssertRC(rc);
430
431 RTStrPrintf(szName, sizeof(szName), "/IOM/MMIO/%RGp-Write-GC-2-R3", GCPhys);
432 rc = STAMR3Register(pVM, &pStats->WriteGCToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszDesc);
433 AssertRC(rc);
434
435 RTStrPrintf(szName, sizeof(szName), "/IOM/MMIO/%RGp-Read-R0", GCPhys);
436 rc = STAMR3Register(pVM, &pStats->ReadR0, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszDesc);
437 AssertRC(rc);
438
439 RTStrPrintf(szName, sizeof(szName), "/IOM/MMIO/%RGp-Write-R0", GCPhys);
440 rc = STAMR3Register(pVM, &pStats->WriteR0, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszDesc);
441 AssertRC(rc);
442
443 RTStrPrintf(szName, sizeof(szName), "/IOM/MMIO/%RGp-Read-R0-2-R3", GCPhys);
444 rc = STAMR3Register(pVM, &pStats->ReadR0ToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszDesc);
445 AssertRC(rc);
446
447 RTStrPrintf(szName, sizeof(szName), "/IOM/MMIO/%RGp-Write-R0-2-R3", GCPhys);
448 rc = STAMR3Register(pVM, &pStats->WriteR0ToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, szName, STAMUNIT_OCCURENCES, pszDesc);
449 AssertRC(rc);
450
451 /* Profiling */
452 RTStrPrintf(szName, sizeof(szName), "/IOM/MMIO/%RGp-Read-R3/Prof", GCPhys);
453 rc = STAMR3Register(pVM, &pStats->ProfReadR3, STAMTYPE_PROFILE, STAMVISIBILITY_USED, szName, STAMUNIT_TICKS_PER_CALL, pszDesc);
454 AssertRC(rc);
455
456 RTStrPrintf(szName, sizeof(szName), "/IOM/MMIO/%RGp-Write-R3/Prof", GCPhys);
457 rc = STAMR3Register(pVM, &pStats->ProfWriteR3, STAMTYPE_PROFILE, STAMVISIBILITY_USED, szName, STAMUNIT_TICKS_PER_CALL, pszDesc);
458 AssertRC(rc);
459
460 RTStrPrintf(szName, sizeof(szName), "/IOM/MMIO/%RGp-Read-GC/Prof", GCPhys);
461 rc = STAMR3Register(pVM, &pStats->ProfReadGC, STAMTYPE_PROFILE, STAMVISIBILITY_USED, szName, STAMUNIT_TICKS_PER_CALL, pszDesc);
462 AssertRC(rc);
463
464 RTStrPrintf(szName, sizeof(szName), "/IOM/MMIO/%RGp-Write-GC/Prof", GCPhys);
465 rc = STAMR3Register(pVM, &pStats->ProfWriteGC, STAMTYPE_PROFILE, STAMVISIBILITY_USED, szName, STAMUNIT_TICKS_PER_CALL, pszDesc);
466 AssertRC(rc);
467
468 RTStrPrintf(szName, sizeof(szName), "/IOM/MMIO/%RGp-Read-R0/Prof", GCPhys);
469 rc = STAMR3Register(pVM, &pStats->ProfReadR0, STAMTYPE_PROFILE, STAMVISIBILITY_USED, szName, STAMUNIT_TICKS_PER_CALL, pszDesc);
470 AssertRC(rc);
471
472 RTStrPrintf(szName, sizeof(szName), "/IOM/MMIO/%RGp-Write-R0/Prof", GCPhys);
473 rc = STAMR3Register(pVM, &pStats->ProfWriteR0, STAMTYPE_PROFILE, STAMVISIBILITY_USED, szName, STAMUNIT_TICKS_PER_CALL, pszDesc);
474 AssertRC(rc);
475
476 return pStats;
477 }
478 AssertMsgFailed(("what! GCPhys=%RGp\n", GCPhys));
479 MMHyperFree(pVM, pStats);
480 }
481#endif
482 return NULL;
483}
484#endif /* VBOX_WITH_STATISTICS */
485
486
487/**
488 * Registers a I/O port ring-3 handler.
489 *
490 * This API is called by PDM on behalf of a device. Devices must first register
491 * ring-3 ranges before any GC and R0 ranges can be registerd using IOMIOPortRegisterGC()
492 * and IOMIOPortRegisterR0().
493 *
494 *
495 * @returns VBox status code.
496 *
497 * @param pVM VM handle.
498 * @param pDevIns PDM device instance owning the port range.
499 * @param PortStart First port number in the range.
500 * @param cPorts Number of ports to register.
501 * @param pvUser User argument for the callbacks.
502 * @param pfnOutCallback Pointer to function which is gonna handle OUT operations in R3.
503 * @param pfnInCallback Pointer to function which is gonna handle IN operations in R3.
504 * @param pfnOutStrCallback Pointer to function which is gonna handle string OUT operations in R3.
505 * @param pfnInStrCallback Pointer to function which is gonna handle string IN operations in R3.
506 * @param pszDesc Pointer to description string. This must not be freed.
507 */
508IOMR3DECL(int) IOMR3IOPortRegisterR3(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTHCPTR pvUser,
509 R3PTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, R3PTRTYPE(PFNIOMIOPORTIN) pfnInCallback,
510 R3PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, R3PTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback, const char *pszDesc)
511{
512 LogFlow(("IOMR3IOPortRegisterR3: pDevIns=%p PortStart=%#x cPorts=%#x pvUser=%VHv pfnOutCallback=%#x pfnInCallback=%#x pfnOutStrCallback=%#x pfnInStrCallback=%#x pszDesc=%s\n",
513 pDevIns, PortStart, cPorts, pvUser, pfnOutCallback, pfnInCallback, pszDesc, pfnOutStrCallback, pfnInStrCallback));
514
515 /*
516 * Validate input.
517 */
518 if ( (RTUINT)PortStart + cPorts <= (RTUINT)PortStart
519 || (RTUINT)PortStart + cPorts > 0x10000)
520 {
521 AssertMsgFailed(("Invalid port range %#x-%#x (inclusive)! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
522 return VERR_IOM_INVALID_IOPORT_RANGE;
523 }
524 if (!pfnOutCallback && !pfnInCallback)
525 {
526 AssertMsgFailed(("no handlers specfied for %#x-%#x (inclusive)! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
527 return VERR_INVALID_PARAMETER;
528 }
529 if (!pfnOutCallback)
530 pfnOutCallback = iomR3IOPortDummyOut;
531 if (!pfnInCallback)
532 pfnInCallback = iomR3IOPortDummyIn;
533 if (!pfnOutStrCallback)
534 pfnOutStrCallback = iomR3IOPortDummyOutStr;
535 if (!pfnInStrCallback)
536 pfnInStrCallback = iomR3IOPortDummyInStr;
537
538 /* Flush the IO port lookup cache */
539 IOMFlushCache(pVM);
540
541 /*
542 * Allocate new range record and initialize it.
543 */
544 PIOMIOPORTRANGER3 pRange;
545 int rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
546 if (VBOX_SUCCESS(rc))
547 {
548 pRange->Core.Key = PortStart;
549 pRange->Core.KeyLast = PortStart + (cPorts - 1);
550 pRange->Port = PortStart;
551 pRange->cPorts = cPorts;
552 pRange->pvUser = pvUser;
553 pRange->pDevIns = pDevIns;
554 pRange->pfnOutCallback = pfnOutCallback;
555 pRange->pfnInCallback = pfnInCallback;
556 pRange->pfnOutStrCallback = pfnOutStrCallback;
557 pRange->pfnInStrCallback = pfnInStrCallback;
558 pRange->pszDesc = pszDesc;
559
560 /*
561 * Try Insert it.
562 */
563 if (RTAvlroIOPortInsert(&pVM->iom.s.pTreesHC->IOPortTreeR3, &pRange->Core))
564 {
565 #ifdef VBOX_WITH_STATISTICS
566 for (unsigned iPort = 0; iPort < cPorts; iPort++)
567 iomr3IOPortStatsCreate(pVM, PortStart + iPort, pszDesc);
568 #endif
569 return VINF_SUCCESS;
570 }
571
572 /* conflict. */
573 DBGFR3Info(pVM, "ioport", NULL, NULL);
574 AssertMsgFailed(("Port range %#x-%#x (%s) conflicts with existing range(s)!\n", PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
575 MMHyperFree(pVM, pRange);
576 rc = VERR_IOM_IOPORT_RANGE_CONFLICT;
577 }
578
579 return rc;
580}
581
582
583/**
584 * Deregisters a I/O Port range.
585 *
586 * The specified range must be registered using IOMR3IOPortRegister previous to
587 * this call. The range does can be a smaller part of the range specified to
588 * IOMR3IOPortRegister, but it can never be larger.
589 *
590 * This function will remove GC, R0 and R3 context port handlers for this range.
591 *
592 * @returns VBox status code.
593 *
594 * @param pVM The virtual machine.
595 * @param pDevIns The device instance associated with the range.
596 * @param PortStart First port number in the range.
597 * @param cPorts Number of ports to remove starting at PortStart.
598 *
599 * @remark This function mainly for PCI PnP Config and will not do
600 * all the checks you might expect it to do.
601 */
602IOMR3DECL(int) IOMR3IOPortDeregister(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts)
603{
604 LogFlow(("IOMR3IOPortDeregister: pDevIns=%p PortStart=%#x cPorts=%#x\n", pDevIns, PortStart, cPorts));
605
606 /*
607 * Validate input.
608 */
609 if ( (RTUINT)PortStart + cPorts < (RTUINT)PortStart
610 || (RTUINT)PortStart + cPorts > 0x10000)
611 {
612 AssertMsgFailed(("Invalid port range %#x-%#x!\n", PortStart, (unsigned)PortStart + cPorts - 1));
613 return VERR_IOM_INVALID_IOPORT_RANGE;
614 }
615
616 /* Flush the IO port lookup cache */
617 IOMFlushCache(pVM);
618
619 /*
620 * Check ownership.
621 */
622 RTIOPORT PortLast = PortStart + (cPorts - 1);
623 RTIOPORT Port = PortStart;
624 while (Port <= PortLast && Port >= PortStart)
625 {
626 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesHC->IOPortTreeR3, Port);
627 if (pRange)
628 {
629 Assert(Port <= pRange->Core.KeyLast);
630#ifndef IOM_NO_PDMINS_CHECKS
631 if (pRange->pDevIns != pDevIns)
632 {
633 AssertMsgFailed(("Removal of ports in range %#x-%#x rejected because not owner of %#x-%#x (%s)\n",
634 PortStart, PortLast, pRange->Core.Key, pRange->Core.KeyLast, pRange->pszDesc));
635 return VERR_IOM_NOT_IOPORT_RANGE_OWNER;
636 }
637#endif /* !IOM_NO_PDMINS_CHECKS */
638 Port = pRange->Core.KeyLast;
639 }
640 Port++;
641 }
642
643 /*
644 * Remove any GC ranges first.
645 */
646 int rc = VINF_SUCCESS;
647 Port = PortStart;
648 while (Port <= PortLast && Port >= PortStart)
649 {
650 /*
651 * Try find range.
652 */
653 PIOMIOPORTRANGEGC pRange = (PIOMIOPORTRANGEGC)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesHC->IOPortTreeGC, Port);
654 if (pRange)
655 {
656 if ( pRange->Core.Key == Port
657 && pRange->Core.KeyLast <= PortLast)
658 {
659 /*
660 * Kick out the entire range.
661 */
662 void *pv = RTAvlroIOPortRemove(&pVM->iom.s.pTreesHC->IOPortTreeGC, Port);
663 Assert(pv == (void *)pRange); NOREF(pv);
664 Port += pRange->cPorts;
665 MMHyperFree(pVM, pRange);
666 }
667 else if (pRange->Core.Key == Port)
668 {
669 /*
670 * Cut of the head of the range, done.
671 */
672 pRange->cPorts -= Port - pRange->Port;
673 pRange->Core.Key = Port;
674 pRange->Port = Port;
675 break;
676 }
677 else if (pRange->Core.KeyLast <= PortLast)
678 {
679 /*
680 * Just cut of the tail.
681 */
682 unsigned c = pRange->Core.KeyLast - Port + 1;
683 pRange->Core.KeyLast -= c;
684 pRange->cPorts -= c;
685 Port += c;
686 }
687 else
688 {
689 /*
690 * Split the range, done.
691 */
692 Assert(pRange->Core.KeyLast > PortLast && pRange->Core.Key < Port);
693 /* create tail. */
694 PIOMIOPORTRANGEGC pRangeNew;
695 int rc = MMHyperAlloc(pVM, sizeof(*pRangeNew), 0, MM_TAG_IOM, (void **)&pRangeNew);
696 if (VBOX_FAILURE(rc))
697 return rc;
698
699 *pRangeNew = *pRange;
700 pRangeNew->Core.Key = PortLast;
701 pRangeNew->Port = PortLast;
702 pRangeNew->cPorts = pRangeNew->Core.KeyLast - PortLast + 1;
703
704 /* adjust head */
705 pRange->Core.KeyLast = Port - 1;
706 pRange->cPorts = Port - pRange->Port;
707
708 /* insert */
709 if (!RTAvlroIOPortInsert(&pVM->iom.s.pTreesHC->IOPortTreeGC, &pRangeNew->Core))
710 {
711 AssertMsgFailed(("This cannot happen!\n"));
712 MMHyperFree(pVM, pRangeNew);
713 rc = VERR_INTERNAL_ERROR;
714 }
715 break;
716 }
717 }
718 else /* next port */
719 Port++;
720 } /* for all ports - GC. */
721
722
723 /*
724 * Remove any R0 ranges first.
725 */
726 rc = VINF_SUCCESS;
727 Port = PortStart;
728 while (Port <= PortLast && Port >= PortStart)
729 {
730 /*
731 * Try find range.
732 */
733 PIOMIOPORTRANGER0 pRange = (PIOMIOPORTRANGER0)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesHC->IOPortTreeR0, Port);
734 if (pRange)
735 {
736 if ( pRange->Core.Key == Port
737 && pRange->Core.KeyLast <= PortLast)
738 {
739 /*
740 * Kick out the entire range.
741 */
742 void *pv = RTAvlroIOPortRemove(&pVM->iom.s.pTreesHC->IOPortTreeR0, Port);
743 Assert(pv == (void *)pRange); NOREF(pv);
744 Port += pRange->cPorts;
745 MMHyperFree(pVM, pRange);
746 }
747 else if (pRange->Core.Key == Port)
748 {
749 /*
750 * Cut of the head of the range, done.
751 */
752 pRange->cPorts -= Port - pRange->Port;
753 pRange->Core.Key = Port;
754 pRange->Port = Port;
755 break;
756 }
757 else if (pRange->Core.KeyLast <= PortLast)
758 {
759 /*
760 * Just cut of the tail.
761 */
762 unsigned c = pRange->Core.KeyLast - Port + 1;
763 pRange->Core.KeyLast -= c;
764 pRange->cPorts -= c;
765 Port += c;
766 }
767 else
768 {
769 /*
770 * Split the range, done.
771 */
772 Assert(pRange->Core.KeyLast > PortLast && pRange->Core.Key < Port);
773 /* create tail. */
774 PIOMIOPORTRANGER0 pRangeNew;
775 int rc = MMHyperAlloc(pVM, sizeof(*pRangeNew), 0, MM_TAG_IOM, (void **)&pRangeNew);
776 if (VBOX_FAILURE(rc))
777 return rc;
778
779 *pRangeNew = *pRange;
780 pRangeNew->Core.Key = PortLast;
781 pRangeNew->Port = PortLast;
782 pRangeNew->cPorts = pRangeNew->Core.KeyLast - PortLast + 1;
783
784 /* adjust head */
785 pRange->Core.KeyLast = Port - 1;
786 pRange->cPorts = Port - pRange->Port;
787
788 /* insert */
789 if (!RTAvlroIOPortInsert(&pVM->iom.s.pTreesHC->IOPortTreeR0, &pRangeNew->Core))
790 {
791 AssertMsgFailed(("This cannot happen!\n"));
792 MMHyperFree(pVM, pRangeNew);
793 rc = VERR_INTERNAL_ERROR;
794 }
795 break;
796 }
797 }
798 else /* next port */
799 Port++;
800 } /* for all ports - R0. */
801
802 /*
803 * And the same procedure for ring-3 ranges.
804 */
805 Port = PortStart;
806 while (Port <= PortLast && Port >= PortStart)
807 {
808 /*
809 * Try find range.
810 */
811 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesHC->IOPortTreeR3, Port);
812 if (pRange)
813 {
814 if ( pRange->Core.Key == Port
815 && pRange->Core.KeyLast <= PortLast)
816 {
817 /*
818 * Kick out the entire range.
819 */
820 void *pv = RTAvlroIOPortRemove(&pVM->iom.s.pTreesHC->IOPortTreeR3, Port);
821 Assert(pv == (void *)pRange); NOREF(pv);
822 Port += pRange->cPorts;
823 MMHyperFree(pVM, pRange);
824 }
825 else if (pRange->Core.Key == Port)
826 {
827 /*
828 * Cut of the head of the range, done.
829 */
830 pRange->cPorts -= Port - pRange->Port;
831 pRange->Core.Key = Port;
832 pRange->Port = Port;
833 break;
834 }
835 else if (pRange->Core.KeyLast <= PortLast)
836 {
837 /*
838 * Just cut of the tail.
839 */
840 unsigned c = pRange->Core.KeyLast - Port + 1;
841 pRange->Core.KeyLast -= c;
842 pRange->cPorts -= c;
843 Port += c;
844 }
845 else
846 {
847 /*
848 * Split the range, done.
849 */
850 Assert(pRange->Core.KeyLast > PortLast && pRange->Core.Key < Port);
851 /* create tail. */
852 PIOMIOPORTRANGER3 pRangeNew;
853 int rc = MMHyperAlloc(pVM, sizeof(*pRangeNew), 0, MM_TAG_IOM, (void **)&pRangeNew);
854 if (VBOX_FAILURE(rc))
855 return rc;
856
857 *pRangeNew = *pRange;
858 pRangeNew->Core.Key = PortLast;
859 pRangeNew->Port = PortLast;
860 pRangeNew->cPorts = pRangeNew->Core.KeyLast - PortLast + 1;
861
862 /* adjust head */
863 pRange->Core.KeyLast = Port - 1;
864 pRange->cPorts = Port - pRange->Port;
865
866 /* insert */
867 if (!RTAvlroIOPortInsert(&pVM->iom.s.pTreesHC->IOPortTreeR3, &pRangeNew->Core))
868 {
869 AssertMsgFailed(("This cannot happen!\n"));
870 MMHyperFree(pVM, pRangeNew);
871 rc = VERR_INTERNAL_ERROR;
872 }
873 break;
874 }
875 }
876 else /* next port */
877 Port++;
878 } /* for all ports - ring-3. */
879
880 /* done */
881 return rc;
882}
883
884
885/**
886 * Dummy Port I/O Handler for IN operations.
887 *
888 * @returns VBox status code.
889 *
890 * @param pDevIns The device instance.
891 * @param pvUser User argument.
892 * @param Port Port number used for the IN operation.
893 * @param pu32 Where to store the result.
894 * @param cb Number of bytes read.
895 */
896static DECLCALLBACK(int) iomR3IOPortDummyIn(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)
897{
898 switch (cb)
899 {
900 case 1: *pu32 = 0xff; break;
901 case 2: *pu32 = 0xffff; break;
902 case 4: *pu32 = 0xffffffff; break;
903 default:
904 AssertReleaseMsgFailed(("cb=%d\n", cb));
905 return VERR_INTERNAL_ERROR;
906 }
907 return VINF_SUCCESS;
908}
909
910
911/**
912 * Dummy Port I/O Handler for string IN operations.
913 *
914 * @returns VBox status code.
915 *
916 * @param pDevIns The device instance.
917 * @param pvUser User argument.
918 * @param Port Port number used for the string IN operation.
919 * @param pGCPtrDst Pointer to the destination buffer (GC, incremented appropriately).
920 * @param pcTransfer Pointer to the number of transfer units to read, on return remaining transfer units.
921 * @param cb Size of the transfer unit (1, 2 or 4 bytes).
922 */
923static DECLCALLBACK(int) iomR3IOPortDummyInStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrDst, unsigned *pcTransfer, unsigned cb)
924{
925 return VINF_SUCCESS;
926}
927
928
929/**
930 * Dummy Port I/O Handler for OUT operations.
931 *
932 * @returns VBox status code.
933 *
934 * @param pDevIns The device instance.
935 * @param pvUser User argument.
936 * @param Port Port number used for the OUT operation.
937 * @param u32 The value to output.
938 * @param cb The value size in bytes.
939 */
940static DECLCALLBACK(int) iomR3IOPortDummyOut(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
941{
942 return VINF_SUCCESS;
943}
944
945
946/**
947 * Dummy Port I/O Handler for string OUT operations.
948 *
949 * @returns VBox status code.
950 *
951 * @param pDevIns The device instance.
952 * @param pvUser User argument.
953 * @param Port Port number used for the string OUT operation.
954 * @param pGCPtrSrc Pointer to the source buffer (GC, incremented appropriately).
955 * @param pcTransfer Pointer to the number of transfer units to write, on return remaining transfer units.
956 * @param cb Size of the transfer unit (1, 2 or 4 bytes).
957 */
958static DECLCALLBACK(int) iomR3IOPortDummyOutStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrSrc, unsigned *pcTransfer, unsigned cb)
959{
960 return VINF_SUCCESS;
961}
962
963
964/**
965 * Display a single I/O port ring-3 range.
966 *
967 * @returns 0
968 * @param pNode Pointer to I/O port HC range.
969 * @param pvUser Pointer to info output callback structure.
970 */
971static DECLCALLBACK(int) iomR3IOPortInfoOneR3(PAVLROIOPORTNODECORE pNode, void *pvUser)
972{
973 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)pNode;
974 PCDBGFINFOHLP pHlp = (PCDBGFINFOHLP)pvUser;
975 pHlp->pfnPrintf(pHlp,
976 "%04x-%04x %VHv %VHv %VHv %VHv %s\n",
977 pRange->Core.Key,
978 pRange->Core.KeyLast,
979 pRange->pDevIns,
980 pRange->pfnInCallback,
981 pRange->pfnOutCallback,
982 pRange->pvUser,
983 pRange->pszDesc);
984 return 0;
985}
986
987
988/**
989 * Display a single I/O port GC range.
990 *
991 * @returns 0
992 * @param pNode Pointer to IOPORT GC range.
993 * @param pvUser Pointer to info output callback structure.
994 */
995static DECLCALLBACK(int) iomR3IOPortInfoOneGC(PAVLROIOPORTNODECORE pNode, void *pvUser)
996{
997 PIOMIOPORTRANGEGC pRange = (PIOMIOPORTRANGEGC)pNode;
998 PCDBGFINFOHLP pHlp = (PCDBGFINFOHLP)pvUser;
999 pHlp->pfnPrintf(pHlp,
1000 "%04x-%04x %VGv %VGv %VGv %VGv %s\n",
1001 pRange->Core.Key,
1002 pRange->Core.KeyLast,
1003 pRange->pDevIns,
1004 pRange->pfnInCallback,
1005 pRange->pfnOutCallback,
1006 pRange->pvUser,
1007 pRange->pszDesc);
1008 return 0;
1009}
1010
1011
1012/**
1013 * Display all registered I/O port ranges.
1014 *
1015 * @param pVM VM Handle.
1016 * @param pHlp The info helpers.
1017 * @param pszArgs Arguments, ignored.
1018 */
1019static DECLCALLBACK(void) iomR3IOPortInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
1020{
1021 NOREF(pszArgs);
1022 pHlp->pfnPrintf(pHlp,
1023 "I/O Port R3 ranges (pVM=%p)\n"
1024 "Range %.*s %.*s %.*s %.*s Description\n",
1025 pVM,
1026 sizeof(RTHCPTR) * 2, "pDevIns ",
1027 sizeof(RTHCPTR) * 2, "In ",
1028 sizeof(RTHCPTR) * 2, "Out ",
1029 sizeof(RTHCPTR) * 2, "pvUser ");
1030 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesHC->IOPortTreeR3, true, iomR3IOPortInfoOneR3, (void *)pHlp);
1031
1032 pHlp->pfnPrintf(pHlp,
1033 "I/O Port R0 ranges (pVM=%p)\n"
1034 "Range %.*s %.*s %.*s %.*s Description\n",
1035 pVM,
1036 sizeof(RTHCPTR) * 2, "pDevIns ",
1037 sizeof(RTHCPTR) * 2, "In ",
1038 sizeof(RTHCPTR) * 2, "Out ",
1039 sizeof(RTHCPTR) * 2, "pvUser ");
1040 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesHC->IOPortTreeR0, true, iomR3IOPortInfoOneR3, (void *)pHlp);
1041
1042 pHlp->pfnPrintf(pHlp,
1043 "I/O Port GC ranges (pVM=%p)\n"
1044 "Range %.*s %.*s %.*s %.*s Description\n",
1045 pVM,
1046 sizeof(RTGCPTR) * 2, "pDevIns ",
1047 sizeof(RTGCPTR) * 2, "In ",
1048 sizeof(RTGCPTR) * 2, "Out ",
1049 sizeof(RTGCPTR) * 2, "pvUser ");
1050 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesHC->IOPortTreeGC, true, iomR3IOPortInfoOneGC, (void *)pHlp);
1051
1052 if (pVM->iom.s.pRangeLastReadGC)
1053 {
1054 PIOMIOPORTRANGEGC pRange = (PIOMIOPORTRANGEGC)MMHyperGC2HC(pVM, pVM->iom.s.pRangeLastReadGC);
1055 pHlp->pfnPrintf(pHlp, "GC Read Ports: %#04x-%#04x %VGv %s\n",
1056 pRange->Port, pRange->Port + pRange->cPorts, pVM->iom.s.pRangeLastReadGC, pRange->pszDesc);
1057 }
1058 if (pVM->iom.s.pStatsLastReadGC)
1059 {
1060 PIOMIOPORTSTATS pRange = (PIOMIOPORTSTATS)MMHyperGC2HC(pVM, pVM->iom.s.pStatsLastReadGC);
1061 pHlp->pfnPrintf(pHlp, "GC Read Stats: %#04x %VGv\n",
1062 pRange->Core.Key, pVM->iom.s.pStatsLastReadGC);
1063 }
1064
1065 if (pVM->iom.s.pRangeLastWriteGC)
1066 {
1067 PIOMIOPORTRANGEGC pRange = (PIOMIOPORTRANGEGC)MMHyperGC2HC(pVM, pVM->iom.s.pRangeLastWriteGC);
1068 pHlp->pfnPrintf(pHlp, "GC Write Ports: %#04x-%#04x %VGv %s\n",
1069 pRange->Port, pRange->Port + pRange->cPorts, pVM->iom.s.pRangeLastWriteGC, pRange->pszDesc);
1070 }
1071 if (pVM->iom.s.pStatsLastWriteGC)
1072 {
1073 PIOMIOPORTSTATS pRange = (PIOMIOPORTSTATS)MMHyperGC2HC(pVM, pVM->iom.s.pStatsLastWriteGC);
1074 pHlp->pfnPrintf(pHlp, "GC Write Stats: %#04x %VGv\n",
1075 pRange->Core.Key, pVM->iom.s.pStatsLastWriteGC);
1076 }
1077
1078 if (pVM->iom.s.pRangeLastReadR3)
1079 {
1080 PIOMIOPORTRANGER3 pRange = pVM->iom.s.pRangeLastReadR3;
1081 pHlp->pfnPrintf(pHlp, "HC Read Ports: %#04x-%#04x %VGv %s\n",
1082 pRange->Port, pRange->Port + pRange->cPorts, pRange, pRange->pszDesc);
1083 }
1084 if (pVM->iom.s.pStatsLastReadR3)
1085 {
1086 PIOMIOPORTSTATS pRange = pVM->iom.s.pStatsLastReadR3;
1087 pHlp->pfnPrintf(pHlp, "HC Read Stats: %#04x %VGv\n",
1088 pRange->Core.Key, pRange);
1089 }
1090
1091 if (pVM->iom.s.pRangeLastWriteR3)
1092 {
1093 PIOMIOPORTRANGER3 pRange = pVM->iom.s.pRangeLastWriteR3;
1094 pHlp->pfnPrintf(pHlp, "HC Write Ports: %#04x-%#04x %VGv %s\n",
1095 pRange->Port, pRange->Port + pRange->cPorts, pRange, pRange->pszDesc);
1096 }
1097 if (pVM->iom.s.pStatsLastWriteR3)
1098 {
1099 PIOMIOPORTSTATS pRange = pVM->iom.s.pStatsLastWriteR3;
1100 pHlp->pfnPrintf(pHlp, "HC Write Stats: %#04x %VGv\n",
1101 pRange->Core.Key, pRange);
1102 }
1103
1104 if (pVM->iom.s.pRangeLastReadR0)
1105 {
1106 PIOMIOPORTRANGER0 pRange = pVM->iom.s.pRangeLastReadR0;
1107 pHlp->pfnPrintf(pHlp, "R0 Read Ports: %#04x-%#04x %VGv %s\n",
1108 pRange->Port, pRange->Port + pRange->cPorts, pRange, pRange->pszDesc);
1109 }
1110 if (pVM->iom.s.pStatsLastReadR0)
1111 {
1112 PIOMIOPORTSTATS pRange = pVM->iom.s.pStatsLastReadR0;
1113 pHlp->pfnPrintf(pHlp, "R0 Read Stats: %#04x %VGv\n",
1114 pRange->Core.Key, pRange);
1115 }
1116
1117 if (pVM->iom.s.pRangeLastWriteR0)
1118 {
1119 PIOMIOPORTRANGER0 pRange = pVM->iom.s.pRangeLastWriteR0;
1120 pHlp->pfnPrintf(pHlp, "R0 Write Ports: %#04x-%#04x %VGv %s\n",
1121 pRange->Port, pRange->Port + pRange->cPorts, pRange, pRange->pszDesc);
1122 }
1123 if (pVM->iom.s.pStatsLastWriteR0)
1124 {
1125 PIOMIOPORTSTATS pRange = pVM->iom.s.pStatsLastWriteR0;
1126 pHlp->pfnPrintf(pHlp, "R0 Write Stats: %#04x %VGv\n",
1127 pRange->Core.Key, pRange);
1128 }
1129}
1130
1131
1132/**
1133 * Registers a Memory Mapped I/O R3 handler.
1134 *
1135 * This API is called by PDM on behalf of a device. Devices must register ring-3 ranges
1136 * before any GC and R0 ranges can be registered using IOMMMIORegisterGC() and IOMMMIORegisterR0().
1137 *
1138 * @returns VBox status code.
1139 *
1140 * @param pVM VM handle.
1141 * @param pDevIns PDM device instance owning the MMIO range.
1142 * @param GCPhysStart First physical address in the range.
1143 * @param cbRange The size of the range (in bytes).
1144 * @param pvUser User argument for the callbacks.
1145 * @param pfnWriteCallback Pointer to function which is gonna handle Write operations.
1146 * @param pfnReadCallback Pointer to function which is gonna handle Read operations.
1147 * @param pfnFillCallback Pointer to function which is gonna handle Fill/memset operations.
1148 * @param pszDesc Pointer to description string. This must not be freed.
1149 */
1150IOMR3DECL(int) IOMR3MMIORegisterR3(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
1151 R3PTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback, R3PTRTYPE(PFNIOMMMIOREAD) pfnReadCallback,
1152 R3PTRTYPE(PFNIOMMMIOFILL) pfnFillCallback, const char *pszDesc)
1153{
1154 LogFlow(("IOMR3MMIORegisterR3: pDevIns=%p GCPhysStart=%VGp cbRange=%#x pvUser=%VHv pfnWriteCallback=%#x pfnReadCallback=%#x pfnFillCallback=%#x pszDesc=%s\n",
1155 pDevIns, GCPhysStart, cbRange, pvUser, pfnWriteCallback, pfnReadCallback, pfnFillCallback, pszDesc));
1156
1157 /*
1158 * Validate input.
1159 */
1160 if (GCPhysStart + (cbRange - 1) < GCPhysStart)
1161 {
1162 AssertMsgFailed(("Wrapped! %VGp %#x bytes\n", GCPhysStart, cbRange));
1163 return VERR_IOM_INVALID_MMIO_RANGE;
1164 }
1165
1166 /*
1167 * Allocate new range record and initialize it.
1168 */
1169 PIOMMMIORANGER3 pRange;
1170 int rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
1171 if (VBOX_SUCCESS(rc))
1172 {
1173 pRange->Core.Key = GCPhysStart;
1174 pRange->Core.KeyLast = GCPhysStart + (cbRange - 1);
1175 pRange->GCPhys = GCPhysStart;
1176 pRange->cbSize = cbRange;
1177 pRange->pvUser = pvUser;
1178 pRange->pDevIns = pDevIns;
1179 pRange->pfnReadCallback = pfnReadCallback;
1180 pRange->pfnWriteCallback= pfnWriteCallback;
1181 pRange->pfnFillCallback = pfnFillCallback;
1182 pRange->pszDesc = pszDesc;
1183
1184 /*
1185 * Try register it with PGM and then insert it.
1186 */
1187 int rc = PGMR3HandlerPhysicalRegister(pVM, PGMPHYSHANDLERTYPE_MMIO, GCPhysStart, GCPhysStart + (cbRange - 1),
1188 /*IOMR3MMIOHandler*/ NULL, pRange,
1189 NULL, "IOMMMIOHandler", MMHyperR3ToR0(pVM, pRange),
1190 NULL, "IOMMMIOHandler", MMHyperR3ToGC(pVM, pRange), pszDesc);
1191 if (VBOX_SUCCESS(rc))
1192 {
1193 if (RTAvlroGCPhysInsert(&pVM->iom.s.pTreesHC->MMIOTreeR3, &pRange->Core))
1194 return VINF_SUCCESS;
1195
1196 DBGFR3Info(pVM, "mmio", NULL, NULL);
1197 AssertMsgFailed(("This cannot happen!\n"));
1198 rc = VERR_INTERNAL_ERROR;
1199 }
1200 MMHyperFree(pVM, pRange);
1201 }
1202
1203 return rc;
1204}
1205
1206
1207/**
1208 * Deregisters a Memory Mapped I/O handler range.
1209 *
1210 * Registered GC, R0, and R3 ranges are affected.
1211 *
1212 * @returns VBox status code.
1213 *
1214 * @param pVM The virtual machine.
1215 * @param pDevIns Device instance which the MMIO region is registered.
1216 * @param GCPhysStart First physical address (GC) in the range.
1217 * @param cbRange Number of bytes to deregister.
1218 *
1219 * @remark This function mainly for PCI PnP Config and will not do
1220 * all the checks you might expect it to do.
1221 */
1222IOMR3DECL(int) IOMR3MMIODeregister(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
1223{
1224 LogFlow(("IOMR3MMIODeregister: pDevIns=%p GCPhysStart=%VGp cbRange=%#x\n", pDevIns, GCPhysStart, cbRange));
1225
1226 /*
1227 * Validate input.
1228 */
1229 RTGCPHYS GCPhysLast = GCPhysStart + (cbRange - 1);
1230 if (GCPhysLast < GCPhysStart)
1231 {
1232 AssertMsgFailed(("Wrapped! %#x LB%#x\n", GCPhysStart, cbRange));
1233 return VERR_IOM_INVALID_MMIO_RANGE;
1234 }
1235
1236 /*
1237 * Check ownership and such.
1238 */
1239 RTGCPHYS GCPhys = GCPhysStart;
1240 while (GCPhys <= GCPhysLast && GCPhys >= GCPhysStart)
1241 {
1242 PIOMMMIORANGER3 pRange = (PIOMMMIORANGER3)RTAvlroGCPhysGet(&pVM->iom.s.pTreesHC->MMIOTreeR3, GCPhys);
1243 if (!pRange)
1244 return VERR_IOM_MMIO_RANGE_NOT_FOUND;
1245#ifndef IOM_NO_PDMINS_CHECKS
1246 if (pRange->pDevIns != pDevIns)
1247 {
1248 AssertMsgFailed(("Not owner! GCPhys=%VGp %VGp LB%#x %s\n", GCPhys, GCPhysStart, cbRange, pRange->pszDesc));
1249 return VERR_IOM_NOT_MMIO_RANGE_OWNER;
1250 }
1251#endif /* !IOM_NO_PDMINS_CHECKS */
1252 if (pRange->Core.KeyLast > GCPhysLast)
1253 {
1254 AssertMsgFailed(("Incomplete R3 range! GCPhys=%VGp %VGp LB%#x %s\n", GCPhys, GCPhysStart, cbRange, pRange->pszDesc));
1255 return VERR_IOM_INCOMPLETE_MMIO_RANGE;
1256 }
1257 /* next */
1258 Assert(GCPhys <= pRange->Core.KeyLast);
1259 GCPhys = pRange->Core.KeyLast + 1;
1260 }
1261
1262 /*
1263 * Remove GC ranges.
1264 */
1265 GCPhys = GCPhysStart;
1266 while (GCPhys <= GCPhysLast && GCPhys >= GCPhysStart)
1267 {
1268 PIOMMMIORANGEGC pRange = (PIOMMMIORANGEGC)RTAvlroGCPhysRemove(&pVM->iom.s.pTreesHC->MMIOTreeGC, GCPhys);
1269 if (pRange)
1270 {
1271 Assert(pRange->Core.Key == GCPhys && pRange->Core.KeyLast <= GCPhysLast);
1272
1273 /* next and delete. */
1274 GCPhys = pRange->Core.KeyLast + 1;
1275 MMHyperFree(pVM, pRange);
1276 }
1277 else /* next - this'll be damned slow! */
1278 GCPhys++;
1279 }
1280
1281 /*
1282 * Remove R0 ranges.
1283 */
1284 GCPhys = GCPhysStart;
1285 while (GCPhys <= GCPhysLast && GCPhys >= GCPhysStart)
1286 {
1287 PIOMMMIORANGER0 pRange = (PIOMMMIORANGER0)RTAvlroGCPhysRemove(&pVM->iom.s.pTreesHC->MMIOTreeR0, GCPhys);
1288 if (pRange)
1289 {
1290 Assert(pRange->Core.Key == GCPhys && pRange->Core.KeyLast <= GCPhysLast);
1291
1292 /* next and delete. */
1293 GCPhys = pRange->Core.KeyLast + 1;
1294 MMHyperFree(pVM, pRange);
1295 }
1296 else /* next - this'll be damned slow! */
1297 GCPhys++;
1298 }
1299
1300 /*
1301 * Remove R3 ranges.
1302 */
1303 GCPhys = GCPhysStart;
1304 while (GCPhys <= GCPhysLast && GCPhys >= GCPhysStart)
1305 {
1306 PIOMMMIORANGER3 pRange = (PIOMMMIORANGER3)RTAvlroGCPhysRemove(&pVM->iom.s.pTreesHC->MMIOTreeR3, GCPhys);
1307 Assert(pRange);
1308 Assert(pRange->Core.Key == GCPhys && pRange->Core.KeyLast <= GCPhysLast);
1309
1310 /* remove it from PGM */
1311 int rc = PGMHandlerPhysicalDeregister(pVM, GCPhys);
1312 AssertRC(rc);
1313
1314 /* next and delete. */
1315 GCPhys = pRange->Core.KeyLast + 1;
1316 MMHyperFree(pVM, pRange);
1317 }
1318
1319 return VINF_SUCCESS;
1320}
1321
1322
1323/**
1324 * Display a single MMIO R3 range.
1325 *
1326 * @returns 0
1327 * @param pNode Pointer to MMIO R3 range.
1328 * @param pvUser Pointer to info output callback structure.
1329 */
1330static DECLCALLBACK(int) iomR3MMIOInfoOneR3(PAVLROGCPHYSNODECORE pNode, void *pvUser)
1331{
1332 PIOMMMIORANGER3 pRange = (PIOMMMIORANGER3)pNode;
1333 PCDBGFINFOHLP pHlp = (PCDBGFINFOHLP)pvUser;
1334 pHlp->pfnPrintf(pHlp,
1335 "%VGp-%VGp %VHv %VHv %VHv %VHv %VHv %s\n",
1336 pRange->Core.Key,
1337 pRange->Core.KeyLast,
1338 pRange->pDevIns,
1339 pRange->pfnReadCallback,
1340 pRange->pfnWriteCallback,
1341 pRange->pfnFillCallback,
1342 pRange->pvUser,
1343 pRange->pszDesc);
1344 return 0;
1345}
1346
1347
1348/**
1349 * Display a single MMIO GC range.
1350 *
1351 * @returns 0
1352 * @param pNode Pointer to MMIO GC range.
1353 * @param pvUser Pointer to info output callback structure.
1354 */
1355static DECLCALLBACK(int) iomR3MMIOInfoOneGC(PAVLROGCPHYSNODECORE pNode, void *pvUser)
1356{
1357 PIOMMMIORANGEGC pRange = (PIOMMMIORANGEGC)pNode;
1358 PCDBGFINFOHLP pHlp = (PCDBGFINFOHLP)pvUser;
1359 pHlp->pfnPrintf(pHlp,
1360 "%VGp-%VGp %VGv %VGv %VGv %VGv %VGv %s\n",
1361 pRange->Core.Key,
1362 pRange->Core.KeyLast,
1363 pRange->pDevIns,
1364 pRange->pfnReadCallback,
1365 pRange->pfnWriteCallback,
1366 pRange->pfnFillCallback,
1367 pRange->pvUser,
1368 pRange->pszDesc);
1369 return 0;
1370}
1371
1372
1373/**
1374 * Display registered MMIO ranges to the log.
1375 *
1376 * @param pVM VM Handle.
1377 * @param pHlp The info helpers.
1378 * @param pszArgs Arguments, ignored.
1379 */
1380static DECLCALLBACK(void) iomR3MMIOInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
1381{
1382 NOREF(pszArgs);
1383 pHlp->pfnPrintf(pHlp,
1384 "MMIO R3 ranges (pVM=%p)\n"
1385 "%.*s %.*s %.*s %.*s %.*s %.*s %s\n",
1386 pVM,
1387 sizeof(RTGCPHYS) * 4 + 1, "GC Phys Range ",
1388 sizeof(RTHCPTR) * 2, "pDevIns ",
1389 sizeof(RTHCPTR) * 2, "Read ",
1390 sizeof(RTHCPTR) * 2, "Write ",
1391 sizeof(RTHCPTR) * 2, "Fill ",
1392 sizeof(RTHCPTR) * 2, "pvUser ",
1393 "Description");
1394 RTAvlroGCPhysDoWithAll(&pVM->iom.s.pTreesHC->MMIOTreeR3, true, iomR3MMIOInfoOneR3, (void *)pHlp);
1395
1396 pHlp->pfnPrintf(pHlp,
1397 "MMIO R0 ranges (pVM=%p)\n"
1398 "%.*s %.*s %.*s %.*s %.*s %.*s %s\n",
1399 pVM,
1400 sizeof(RTGCPHYS) * 4 + 1, "GC Phys Range ",
1401 sizeof(RTGCPTR) * 2, "pDevIns ",
1402 sizeof(RTGCPTR) * 2, "Read ",
1403 sizeof(RTGCPTR) * 2, "Write ",
1404 sizeof(RTGCPTR) * 2, "Fill ",
1405 sizeof(RTGCPTR) * 2, "pvUser ",
1406 "Description");
1407 RTAvlroGCPhysDoWithAll(&pVM->iom.s.pTreesHC->MMIOTreeR0, true, iomR3MMIOInfoOneR3, (void *)pHlp);
1408
1409 pHlp->pfnPrintf(pHlp,
1410 "MMIO GC ranges (pVM=%p)\n"
1411 "%.*s %.*s %.*s %.*s %.*s %.*s %s\n",
1412 pVM,
1413 sizeof(RTGCPHYS) * 4 + 1, "GC Phys Range ",
1414 sizeof(RTGCPTR) * 2, "pDevIns ",
1415 sizeof(RTGCPTR) * 2, "Read ",
1416 sizeof(RTGCPTR) * 2, "Write ",
1417 sizeof(RTGCPTR) * 2, "Fill ",
1418 sizeof(RTGCPTR) * 2, "pvUser ",
1419 "Description");
1420 RTAvlroGCPhysDoWithAll(&pVM->iom.s.pTreesHC->MMIOTreeGC, true, iomR3MMIOInfoOneGC, (void *)pHlp);
1421}
1422
1423
1424#ifdef VBOX_WITH_STATISTICS
1425/**
1426 * Tries to come up with the standard name for a port.
1427 *
1428 * @returns Pointer to readonly string if known.
1429 * @returns NULL if unknown port number.
1430 *
1431 * @param Port The port to name.
1432 */
1433static const char *iomr3IOPortGetStandardName(RTIOPORT Port)
1434{
1435 switch (Port)
1436 {
1437 case 0x00: case 0x10: case 0x20: case 0x30: case 0x40: case 0x50: case 0x70:
1438 case 0x01: case 0x11: case 0x21: case 0x31: case 0x41: case 0x51: case 0x61: case 0x71:
1439 case 0x02: case 0x12: case 0x22: case 0x32: case 0x42: case 0x52: case 0x62: case 0x72:
1440 case 0x03: case 0x13: case 0x23: case 0x33: case 0x43: case 0x53: case 0x63: case 0x73:
1441 case 0x04: case 0x14: case 0x24: case 0x34: case 0x44: case 0x54: case 0x74:
1442 case 0x05: case 0x15: case 0x25: case 0x35: case 0x45: case 0x55: case 0x65: case 0x75:
1443 case 0x06: case 0x16: case 0x26: case 0x36: case 0x46: case 0x56: case 0x66: case 0x76:
1444 case 0x07: case 0x17: case 0x27: case 0x37: case 0x47: case 0x57: case 0x67: case 0x77:
1445 case 0x08: case 0x18: case 0x28: case 0x38: case 0x48: case 0x58: case 0x68: case 0x78:
1446 case 0x09: case 0x19: case 0x29: case 0x39: case 0x49: case 0x59: case 0x69: case 0x79:
1447 case 0x0a: case 0x1a: case 0x2a: case 0x3a: case 0x4a: case 0x5a: case 0x6a: case 0x7a:
1448 case 0x0b: case 0x1b: case 0x2b: case 0x3b: case 0x4b: case 0x5b: case 0x6b: case 0x7b:
1449 case 0x0c: case 0x1c: case 0x2c: case 0x3c: case 0x4c: case 0x5c: case 0x6c: case 0x7c:
1450 case 0x0d: case 0x1d: case 0x2d: case 0x3d: case 0x4d: case 0x5d: case 0x6d: case 0x7d:
1451 case 0x0e: case 0x1e: case 0x2e: case 0x3e: case 0x4e: case 0x5e: case 0x6e: case 0x7e:
1452 case 0x0f: case 0x1f: case 0x2f: case 0x3f: case 0x4f: case 0x5f: case 0x6f: case 0x7f:
1453
1454 case 0x80: case 0x90: case 0xa0: case 0xb0: case 0xc0: case 0xd0: case 0xe0: case 0xf0:
1455 case 0x81: case 0x91: case 0xa1: case 0xb1: case 0xc1: case 0xd1: case 0xe1: case 0xf1:
1456 case 0x82: case 0x92: case 0xa2: case 0xb2: case 0xc2: case 0xd2: case 0xe2: case 0xf2:
1457 case 0x83: case 0x93: case 0xa3: case 0xb3: case 0xc3: case 0xd3: case 0xe3: case 0xf3:
1458 case 0x84: case 0x94: case 0xa4: case 0xb4: case 0xc4: case 0xd4: case 0xe4: case 0xf4:
1459 case 0x85: case 0x95: case 0xa5: case 0xb5: case 0xc5: case 0xd5: case 0xe5: case 0xf5:
1460 case 0x86: case 0x96: case 0xa6: case 0xb6: case 0xc6: case 0xd6: case 0xe6: case 0xf6:
1461 case 0x87: case 0x97: case 0xa7: case 0xb7: case 0xc7: case 0xd7: case 0xe7: case 0xf7:
1462 case 0x88: case 0x98: case 0xa8: case 0xb8: case 0xc8: case 0xd8: case 0xe8: case 0xf8:
1463 case 0x89: case 0x99: case 0xa9: case 0xb9: case 0xc9: case 0xd9: case 0xe9: case 0xf9:
1464 case 0x8a: case 0x9a: case 0xaa: case 0xba: case 0xca: case 0xda: case 0xea: case 0xfa:
1465 case 0x8b: case 0x9b: case 0xab: case 0xbb: case 0xcb: case 0xdb: case 0xeb: case 0xfb:
1466 case 0x8c: case 0x9c: case 0xac: case 0xbc: case 0xcc: case 0xdc: case 0xec: case 0xfc:
1467 case 0x8d: case 0x9d: case 0xad: case 0xbd: case 0xcd: case 0xdd: case 0xed: case 0xfd:
1468 case 0x8e: case 0x9e: case 0xae: case 0xbe: case 0xce: case 0xde: case 0xee: case 0xfe:
1469 case 0x8f: case 0x9f: case 0xaf: case 0xbf: case 0xcf: case 0xdf: case 0xef: case 0xff:
1470 return "System Reserved";
1471
1472 case 0x60:
1473 case 0x64:
1474 return "Keyboard & Mouse";
1475
1476 case 0x378:
1477 case 0x379:
1478 case 0x37a:
1479 case 0x37b:
1480 case 0x37c:
1481 case 0x37d:
1482 case 0x37e:
1483 case 0x37f:
1484 case 0x3bc:
1485 case 0x3bd:
1486 case 0x3be:
1487 case 0x3bf:
1488 case 0x278:
1489 case 0x279:
1490 case 0x27a:
1491 case 0x27b:
1492 case 0x27c:
1493 case 0x27d:
1494 case 0x27e:
1495 case 0x27f:
1496 return "LPT1/2/3";
1497
1498 case 0x3f8:
1499 case 0x3f9:
1500 case 0x3fa:
1501 case 0x3fb:
1502 case 0x3fc:
1503 case 0x3fd:
1504 case 0x3fe:
1505 case 0x3ff:
1506 return "COM1";
1507
1508 case 0x2f8:
1509 case 0x2f9:
1510 case 0x2fa:
1511 case 0x2fb:
1512 case 0x2fc:
1513 case 0x2fd:
1514 case 0x2fe:
1515 case 0x2ff:
1516 return "COM2";
1517
1518 case 0x3e8:
1519 case 0x3e9:
1520 case 0x3ea:
1521 case 0x3eb:
1522 case 0x3ec:
1523 case 0x3ed:
1524 case 0x3ee:
1525 case 0x3ef:
1526 return "COM3";
1527
1528 case 0x2e8:
1529 case 0x2e9:
1530 case 0x2ea:
1531 case 0x2eb:
1532 case 0x2ec:
1533 case 0x2ed:
1534 case 0x2ee:
1535 case 0x2ef:
1536 return "COM4";
1537
1538 case 0x200:
1539 case 0x201:
1540 case 0x202:
1541 case 0x203:
1542 case 0x204:
1543 case 0x205:
1544 case 0x206:
1545 case 0x207:
1546 return "Joystick";
1547
1548 case 0x3f0:
1549 case 0x3f1:
1550 case 0x3f2:
1551 case 0x3f3:
1552 case 0x3f4:
1553 case 0x3f5:
1554 case 0x3f6:
1555 case 0x3f7:
1556 return "Floppy";
1557
1558 case 0x1f0:
1559 case 0x1f1:
1560 case 0x1f2:
1561 case 0x1f3:
1562 case 0x1f4:
1563 case 0x1f5:
1564 case 0x1f6:
1565 case 0x1f7:
1566 //case 0x3f6:
1567 //case 0x3f7:
1568 return "IDE 1st";
1569
1570 case 0x170:
1571 case 0x171:
1572 case 0x172:
1573 case 0x173:
1574 case 0x174:
1575 case 0x175:
1576 case 0x176:
1577 case 0x177:
1578 case 0x376:
1579 case 0x377:
1580 return "IDE 2nd";
1581
1582 case 0x1e0:
1583 case 0x1e1:
1584 case 0x1e2:
1585 case 0x1e3:
1586 case 0x1e4:
1587 case 0x1e5:
1588 case 0x1e6:
1589 case 0x1e7:
1590 case 0x3e6:
1591 case 0x3e7:
1592 return "IDE 3rd";
1593
1594 case 0x160:
1595 case 0x161:
1596 case 0x162:
1597 case 0x163:
1598 case 0x164:
1599 case 0x165:
1600 case 0x166:
1601 case 0x167:
1602 case 0x366:
1603 case 0x367:
1604 return "IDE 4th";
1605
1606 case 0x130: case 0x140: case 0x150:
1607 case 0x131: case 0x141: case 0x151:
1608 case 0x132: case 0x142: case 0x152:
1609 case 0x133: case 0x143: case 0x153:
1610 case 0x134: case 0x144: case 0x154:
1611 case 0x135: case 0x145: case 0x155:
1612 case 0x136: case 0x146: case 0x156:
1613 case 0x137: case 0x147: case 0x157:
1614 case 0x138: case 0x148: case 0x158:
1615 case 0x139: case 0x149: case 0x159:
1616 case 0x13a: case 0x14a: case 0x15a:
1617 case 0x13b: case 0x14b: case 0x15b:
1618 case 0x13c: case 0x14c: case 0x15c:
1619 case 0x13d: case 0x14d: case 0x15d:
1620 case 0x13e: case 0x14e: case 0x15e:
1621 case 0x13f: case 0x14f: case 0x15f:
1622 case 0x220: case 0x230:
1623 case 0x221: case 0x231:
1624 case 0x222: case 0x232:
1625 case 0x223: case 0x233:
1626 case 0x224: case 0x234:
1627 case 0x225: case 0x235:
1628 case 0x226: case 0x236:
1629 case 0x227: case 0x237:
1630 case 0x228: case 0x238:
1631 case 0x229: case 0x239:
1632 case 0x22a: case 0x23a:
1633 case 0x22b: case 0x23b:
1634 case 0x22c: case 0x23c:
1635 case 0x22d: case 0x23d:
1636 case 0x22e: case 0x23e:
1637 case 0x22f: case 0x23f:
1638 case 0x330: case 0x340: case 0x350:
1639 case 0x331: case 0x341: case 0x351:
1640 case 0x332: case 0x342: case 0x352:
1641 case 0x333: case 0x343: case 0x353:
1642 case 0x334: case 0x344: case 0x354:
1643 case 0x335: case 0x345: case 0x355:
1644 case 0x336: case 0x346: case 0x356:
1645 case 0x337: case 0x347: case 0x357:
1646 case 0x338: case 0x348: case 0x358:
1647 case 0x339: case 0x349: case 0x359:
1648 case 0x33a: case 0x34a: case 0x35a:
1649 case 0x33b: case 0x34b: case 0x35b:
1650 case 0x33c: case 0x34c: case 0x35c:
1651 case 0x33d: case 0x34d: case 0x35d:
1652 case 0x33e: case 0x34e: case 0x35e:
1653 case 0x33f: case 0x34f: case 0x35f:
1654 return "SCSI (typically)";
1655
1656 case 0x320:
1657 case 0x321:
1658 case 0x322:
1659 case 0x323:
1660 case 0x324:
1661 case 0x325:
1662 case 0x326:
1663 case 0x327:
1664 return "XT HD";
1665
1666 case 0x3b0:
1667 case 0x3b1:
1668 case 0x3b2:
1669 case 0x3b3:
1670 case 0x3b4:
1671 case 0x3b5:
1672 case 0x3b6:
1673 case 0x3b7:
1674 case 0x3b8:
1675 case 0x3b9:
1676 case 0x3ba:
1677 case 0x3bb:
1678 return "VGA";
1679
1680 case 0x3c0: case 0x3d0:
1681 case 0x3c1: case 0x3d1:
1682 case 0x3c2: case 0x3d2:
1683 case 0x3c3: case 0x3d3:
1684 case 0x3c4: case 0x3d4:
1685 case 0x3c5: case 0x3d5:
1686 case 0x3c6: case 0x3d6:
1687 case 0x3c7: case 0x3d7:
1688 case 0x3c8: case 0x3d8:
1689 case 0x3c9: case 0x3d9:
1690 case 0x3ca: case 0x3da:
1691 case 0x3cb: case 0x3db:
1692 case 0x3cc: case 0x3dc:
1693 case 0x3cd: case 0x3dd:
1694 case 0x3ce: case 0x3de:
1695 case 0x3cf: case 0x3df:
1696 return "VGA/EGA";
1697
1698 case 0x240: case 0x260: case 0x280:
1699 case 0x241: case 0x261: case 0x281:
1700 case 0x242: case 0x262: case 0x282:
1701 case 0x243: case 0x263: case 0x283:
1702 case 0x244: case 0x264: case 0x284:
1703 case 0x245: case 0x265: case 0x285:
1704 case 0x246: case 0x266: case 0x286:
1705 case 0x247: case 0x267: case 0x287:
1706 case 0x248: case 0x268: case 0x288:
1707 case 0x249: case 0x269: case 0x289:
1708 case 0x24a: case 0x26a: case 0x28a:
1709 case 0x24b: case 0x26b: case 0x28b:
1710 case 0x24c: case 0x26c: case 0x28c:
1711 case 0x24d: case 0x26d: case 0x28d:
1712 case 0x24e: case 0x26e: case 0x28e:
1713 case 0x24f: case 0x26f: case 0x28f:
1714 case 0x300:
1715 case 0x301:
1716 case 0x388:
1717 case 0x389:
1718 case 0x38a:
1719 case 0x38b:
1720 return "Sound Card (typically)";
1721
1722 default:
1723 return NULL;
1724 }
1725}
1726#endif /* VBOX_WITH_STATISTICS */
1727
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