VirtualBox

source: vbox/trunk/src/VBox/VMM/IOM.cpp@ 12932

Last change on this file since 12932 was 12818, checked in by vboxsync, 16 years ago

STAM,IOM: force sort order compatability with file system hierarchy to fix some assumptions in the qt4 stats viewer.
  • Property svn:eol-style set to native
  • Property svn:keywords set to Id
File size: 79.1 KB
Line 
1/* $Id: IOM.cpp 12818 2008-09-30 01:33:38Z vboxsync $ */
2/** @file
3 * IOM - Input / Output Monitor.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22
23/** @page pg_iom IOM - The Input / Output Monitor
24 *
25 * The input/output monitor will handle I/O exceptions routing them to the
26 * appropriate device. It implements an API to register and deregister virtual
27 * I/0 port handlers and memory mapped I/O handlers. A handler is PDM devices
28 * and a set of callback functions.
29 *
30 *
31 * @section sec_iom_rawmode Raw-Mode
32 *
33 * In raw-mode I/O port access is trapped (\#GP(0)) by ensuring that the actual
34 * IOPL is 0 regardless of what the guest IOPL is. The \#GP handler use the
35 * dissassembler (DIS) to figure which instruction caused it (there are a number
36 * of instructions in addition to the I/O ones) and if it's an I/O port access
37 * it will hand it to IOMGCIOPortHandler (via EMInterpretPortIO).
38 * IOMGCIOPortHandler will lookup the port in the AVL tree of registered
39 * handlers. If found, the handler will be called otherwise default action is
40 * taken. (Default action is to write into the void and read all set bits.)
41 *
42 * Memory Mapped I/O (MMIO) is implemented as a sligtly special case of PGM
43 * access handlers. An MMIO range is registered with IOM which then registers it
44 * with the PGM access handler sub-system. The access handler catches all
45 * access and will be called in the context of a \#PF handler. In RC and R0 this
46 * handler is IOMMMIOHandler while in ring-3 it's IOMR3MMIOHandler (althought in
47 * ring-3 there can be alternative ways). IOMMMIOHandler will attempt to emulate
48 * the instruction that is doing the access and pass the corresponding reads /
49 * writes to the device.
50 *
51 * Emulating I/O port access is less complex and should be sligtly faster than
52 * emulating MMIO, so in most cases we should encourage the OS to use port I/O.
53 * Devices which are freqently accessed should register GC handlers to speed up
54 * execution.
55 *
56 *
57 * @section sec_iom_hwaccm Hardware Assisted Virtualization Mode
58 *
59 * When running in hardware assisted virtualization mode we'll be doing much the
60 * same things as in raw-mode. The main difference is that we're running in the
61 * host ring-0 context and that we don't get faults (\#GP(0) and \#PG) but
62 * exits.
63 *
64 *
65 * @section sec_iom_rem Recompiled Execution Mode
66 *
67 * When running in the recompiler things are different. I/O port access is
68 * handled by calling IOMIOPortRead and IOMIOPortWrite directly. While MMIO can
69 * be handled in one of two ways. The normal way is that we have a registered a
70 * special RAM range with the recompiler and in the three callbacks (for byte,
71 * word and dword access) we call IOMMMIORead and IOMMMIOWrite directly. The
72 * alternative ways that the physical memory access which goes via PGM will take
73 * care of it by calling IOMR3MMIOHandler via the PGM access handler machinery
74 * - this shouldn't happen but it is an alternative...
75 *
76 *
77 * @section sec_iom_other Other Accesses
78 *
79 * I/O ports aren't really exposed in any other way, unless you count the
80 * instruction interpreter in EM, but that's just what we're doing in the
81 * raw-mode \#GP(0) case really. Now it's possible to call IOMIOPortRead and
82 * IOMIOPortWrite directly to talk to a device, but this is really bad behavior
83 * and should only be done as temporary hacks (the PC BIOS device used to
84 * setup the CMOS this way back in the dark ages).
85 *
86 * MMIO has similar direct routes as the I/O ports and these shouldn't be used
87 * for the same reasons and with the same restrictions. OTOH since MMIO is
88 * mapped into the physical memory address space, it can be accessed in a number
89 * of ways thru PGM.
90 *
91 */
92
93
94/*******************************************************************************
95* Header Files *
96*******************************************************************************/
97#define LOG_GROUP LOG_GROUP_IOM
98#include <VBox/iom.h>
99#include <VBox/cpum.h>
100#include <VBox/pgm.h>
101#include <VBox/sup.h>
102#include <VBox/mm.h>
103#include <VBox/stam.h>
104#include <VBox/dbgf.h>
105#include <VBox/pdm.h>
106#include "IOMInternal.h"
107#include <VBox/vm.h>
108
109#include <VBox/param.h>
110#include <iprt/assert.h>
111#include <iprt/alloc.h>
112#include <iprt/string.h>
113#include <VBox/log.h>
114#include <VBox/err.h>
115
116
117/*******************************************************************************
118* Internal Functions *
119*******************************************************************************/
120static void iomR3FlushCache(PVM pVM);
121static DECLCALLBACK(int) iomR3RelocateIOPortCallback(PAVLROIOPORTNODECORE pNode, void *pvUser);
122static DECLCALLBACK(int) iomR3RelocateMMIOCallback(PAVLROGCPHYSNODECORE pNode, void *pvUser);
123static DECLCALLBACK(void) iomR3IOPortInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
124static DECLCALLBACK(void) iomR3MMIOInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs);
125static DECLCALLBACK(int) iomR3IOPortDummyIn(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb);
126static DECLCALLBACK(int) iomR3IOPortDummyOut(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb);
127static DECLCALLBACK(int) iomR3IOPortDummyInStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrDst, PRTGCUINTREG pcTransfer, unsigned cb);
128static DECLCALLBACK(int) iomR3IOPortDummyOutStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrSrc, PRTGCUINTREG pcTransfer, unsigned cb);
129
130#ifdef VBOX_WITH_STATISTICS
131static const char *iomR3IOPortGetStandardName(RTIOPORT Port);
132#endif
133
134
135/**
136 * Initializes the IOM.
137 *
138 * @returns VBox status code.
139 * @param pVM The VM to operate on.
140 */
141IOMR3DECL(int) IOMR3Init(PVM pVM)
142{
143 LogFlow(("IOMR3Init:\n"));
144
145 /*
146 * Assert alignment and sizes.
147 */
148 AssertRelease(!(RT_OFFSETOF(VM, iom.s) & 31));
149 AssertRelease(sizeof(pVM->iom.s) <= sizeof(pVM->iom.padding));
150
151 /*
152 * Setup any fixed pointers and offsets.
153 */
154 pVM->iom.s.offVM = RT_OFFSETOF(VM, iom);
155
156 /*
157 * Allocate the trees structure.
158 */
159 int rc = MMHyperAlloc(pVM, sizeof(*pVM->iom.s.pTreesR3), 0, MM_TAG_IOM, (void **)&pVM->iom.s.pTreesR3);
160 if (RT_SUCCESS(rc))
161 {
162 pVM->iom.s.pTreesRC = MMHyperR3ToRC(pVM, pVM->iom.s.pTreesR3);
163 pVM->iom.s.pTreesR0 = MMHyperR3ToR0(pVM, pVM->iom.s.pTreesR3);
164 pVM->iom.s.pfnMMIOHandlerRC = NIL_RTGCPTR;
165 pVM->iom.s.pfnMMIOHandlerR0 = NIL_RTR0PTR;
166
167 /*
168 * Info.
169 */
170 DBGFR3InfoRegisterInternal(pVM, "ioport", "Dumps all IOPort ranges. No arguments.", &iomR3IOPortInfo);
171 DBGFR3InfoRegisterInternal(pVM, "mmio", "Dumps all MMIO ranges. No arguments.", &iomR3MMIOInfo);
172
173 /*
174 * Statistics.
175 */
176 STAM_REG(pVM, &pVM->iom.s.StatRZMMIOHandler, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler", STAMUNIT_TICKS_PER_CALL, "Profiling of the IOMMMIOHandler() body, only success calls.");
177 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO1Byte, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access1", STAMUNIT_OCCURENCES, "MMIO access by 1 byte counter.");
178 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO2Bytes, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access2", STAMUNIT_OCCURENCES, "MMIO access by 2 bytes counter.");
179 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO4Bytes, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access4", STAMUNIT_OCCURENCES, "MMIO access by 4 bytes counter.");
180 STAM_REG(pVM, &pVM->iom.s.StatRZMMIO8Bytes, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access8", STAMUNIT_OCCURENCES, "MMIO access by 8 bytes counter.");
181 STAM_REG(pVM, &pVM->iom.s.StatRZMMIOFailures, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/MMIOFailures", STAMUNIT_OCCURENCES, "Number of times IOMMMIOHandler() didn't service the request.");
182 STAM_REG(pVM, &pVM->iom.s.StatRZInstMov, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOV", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOV instruction emulation.");
183 STAM_REG(pVM, &pVM->iom.s.StatRZInstCmp, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/CMP", STAMUNIT_TICKS_PER_CALL, "Profiling of the CMP instruction emulation.");
184 STAM_REG(pVM, &pVM->iom.s.StatRZInstAnd, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/AND", STAMUNIT_TICKS_PER_CALL, "Profiling of the AND instruction emulation.");
185 STAM_REG(pVM, &pVM->iom.s.StatRZInstOr, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/OR", STAMUNIT_TICKS_PER_CALL, "Profiling of the OR instruction emulation.");
186 STAM_REG(pVM, &pVM->iom.s.StatRZInstXor, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/XOR", STAMUNIT_TICKS_PER_CALL, "Profiling of the XOR instruction emulation.");
187 STAM_REG(pVM, &pVM->iom.s.StatRZInstBt, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/BT", STAMUNIT_TICKS_PER_CALL, "Profiling of the BT instruction emulation.");
188 STAM_REG(pVM, &pVM->iom.s.StatRZInstTest, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/TEST", STAMUNIT_TICKS_PER_CALL, "Profiling of the TEST instruction emulation.");
189 STAM_REG(pVM, &pVM->iom.s.StatRZInstXchg, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/XCHG", STAMUNIT_TICKS_PER_CALL, "Profiling of the XCHG instruction emulation.");
190 STAM_REG(pVM, &pVM->iom.s.StatRZInstStos, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/STOS", STAMUNIT_TICKS_PER_CALL, "Profiling of the STOS instruction emulation.");
191 STAM_REG(pVM, &pVM->iom.s.StatRZInstLods, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/LODS", STAMUNIT_TICKS_PER_CALL, "Profiling of the LODS instruction emulation.");
192#ifdef IOM_WITH_MOVS_SUPPORT
193 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovs, STAMTYPE_PROFILE_ADV, "/IOM/RZ-MMIOHandler/Inst/MOVS", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation.");
194 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovsToMMIO, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOVS/ToMMIO", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation - Mem2MMIO.");
195 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovsFromMMIO, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOVS/FromMMIO", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation - MMIO2Mem.");
196 STAM_REG(pVM, &pVM->iom.s.StatRZInstMovsMMIO, STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler/Inst/MOVS/MMIO2MMIO", STAMUNIT_TICKS_PER_CALL, "Profiling of the MOVS instruction emulation - MMIO2MMIO.");
197#endif
198 STAM_REG(pVM, &pVM->iom.s.StatRZInstOther, STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Inst/Other", STAMUNIT_OCCURENCES, "Other instructions counter.");
199 STAM_REG(pVM, &pVM->iom.s.StatR3MMIOHandler, STAMTYPE_COUNTER, "/IOM/R3-MMIOHandler", STAMUNIT_OCCURENCES, "Number of calls to IOMR3MMIOHandler.");
200 STAM_REG(pVM, &pVM->iom.s.StatInstIn, STAMTYPE_COUNTER, "/IOM/IOWork/In", STAMUNIT_OCCURENCES, "Counter of any IN instructions.");
201 STAM_REG(pVM, &pVM->iom.s.StatInstOut, STAMTYPE_COUNTER, "/IOM/IOWork/Out", STAMUNIT_OCCURENCES, "Counter of any OUT instructions.");
202 STAM_REG(pVM, &pVM->iom.s.StatInstIns, STAMTYPE_COUNTER, "/IOM/IOWork/Ins", STAMUNIT_OCCURENCES, "Counter of any INS instructions.");
203 STAM_REG(pVM, &pVM->iom.s.StatInstOuts, STAMTYPE_COUNTER, "/IOM/IOWork/Outs", STAMUNIT_OCCURENCES, "Counter of any OUTS instructions.");
204 }
205
206 /* Redundant, but just in case we change something in the future */
207 iomR3FlushCache(pVM);
208
209 LogFlow(("IOMR3Init: returns %Vrc\n", rc));
210 return rc;
211}
212
213
214/**
215 * Flushes the IOM port & statistics lookup cache
216 *
217 * @param pVM The VM.
218 */
219static void iomR3FlushCache(PVM pVM)
220{
221 /*
222 * Caching of port and statistics (saves some time in rep outs/ins instruction emulation)
223 */
224 pVM->iom.s.pRangeLastReadR0 = NIL_RTR0PTR;
225 pVM->iom.s.pRangeLastWriteR0 = NIL_RTR0PTR;
226 pVM->iom.s.pStatsLastReadR0 = NIL_RTR0PTR;
227 pVM->iom.s.pStatsLastWriteR0 = NIL_RTR0PTR;
228 pVM->iom.s.pMMIORangeLastR0 = NIL_RTR0PTR;
229 pVM->iom.s.pMMIOStatsLastR0 = NIL_RTR0PTR;
230
231 pVM->iom.s.pRangeLastReadR3 = NULL;
232 pVM->iom.s.pRangeLastWriteR3 = NULL;
233 pVM->iom.s.pStatsLastReadR3 = NULL;
234 pVM->iom.s.pStatsLastWriteR3 = NULL;
235 pVM->iom.s.pMMIORangeLastR3 = NULL;
236 pVM->iom.s.pMMIOStatsLastR3 = NULL;
237
238 pVM->iom.s.pRangeLastReadRC = NIL_RTRCPTR;
239 pVM->iom.s.pRangeLastWriteRC = NIL_RTRCPTR;
240 pVM->iom.s.pStatsLastReadRC = NIL_RTRCPTR;
241 pVM->iom.s.pStatsLastWriteRC = NIL_RTRCPTR;
242 pVM->iom.s.pMMIORangeLastRC = NIL_RTRCPTR;
243 pVM->iom.s.pMMIOStatsLastRC = NIL_RTRCPTR;
244}
245
246
247/**
248 * The VM is being reset.
249 *
250 * @param pVM VM handle.
251 */
252IOMR3DECL(void) IOMR3Reset(PVM pVM)
253{
254 iomR3FlushCache(pVM);
255}
256
257
258/**
259 * Applies relocations to data and code managed by this
260 * component. This function will be called at init and
261 * whenever the VMM need to relocate it self inside the GC.
262 *
263 * The IOM will update the addresses used by the switcher.
264 *
265 * @param pVM The VM.
266 * @param offDelta Relocation delta relative to old location.
267 */
268IOMR3DECL(void) IOMR3Relocate(PVM pVM, RTGCINTPTR offDelta)
269{
270 LogFlow(("IOMR3Relocate: offDelta=%d\n", offDelta));
271
272 /*
273 * Apply relocations to the GC callbacks.
274 */
275 pVM->iom.s.pTreesRC = MMHyperR3ToRC(pVM, pVM->iom.s.pTreesR3);
276 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeRC, true, iomR3RelocateIOPortCallback, &offDelta);
277 RTAvlroGCPhysDoWithAll(&pVM->iom.s.pTreesR3->MMIOTree, true, iomR3RelocateMMIOCallback, &offDelta);
278
279 if (pVM->iom.s.pfnMMIOHandlerRC)
280 pVM->iom.s.pfnMMIOHandlerRC += offDelta;
281
282 /*
283 * Apply relocations to the cached GC handlers
284 */
285 if (pVM->iom.s.pRangeLastReadRC)
286 pVM->iom.s.pRangeLastReadRC += offDelta;
287 if (pVM->iom.s.pRangeLastWriteRC)
288 pVM->iom.s.pRangeLastWriteRC += offDelta;
289 if (pVM->iom.s.pStatsLastReadRC)
290 pVM->iom.s.pStatsLastReadRC += offDelta;
291 if (pVM->iom.s.pStatsLastWriteRC)
292 pVM->iom.s.pStatsLastWriteRC += offDelta;
293 if (pVM->iom.s.pMMIORangeLastRC)
294 pVM->iom.s.pMMIORangeLastRC += offDelta;
295 if (pVM->iom.s.pMMIOStatsLastRC)
296 pVM->iom.s.pMMIOStatsLastRC += offDelta;
297}
298
299
300/**
301 * Callback function for relocating a I/O port range.
302 *
303 * @returns 0 (continue enum)
304 * @param pNode Pointer to a IOMIOPORTRANGERC node.
305 * @param pvUser Pointer to the offDelta. This is a pointer to the delta since we're
306 * not certain the delta will fit in a void pointer for all possible configs.
307 */
308static DECLCALLBACK(int) iomR3RelocateIOPortCallback(PAVLROIOPORTNODECORE pNode, void *pvUser)
309{
310 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)pNode;
311 RTGCINTPTR offDelta = *(PRTGCINTPTR)pvUser;
312
313 Assert(pRange->pDevIns);
314 pRange->pDevIns += offDelta;
315 if (pRange->pfnOutCallback)
316 pRange->pfnOutCallback += offDelta;
317 if (pRange->pfnInCallback)
318 pRange->pfnInCallback += offDelta;
319 if (pRange->pfnOutStrCallback)
320 pRange->pfnOutStrCallback += offDelta;
321 if (pRange->pfnInStrCallback)
322 pRange->pfnInStrCallback += offDelta;
323 if (pRange->pvUser > _64K)
324 pRange->pvUser += offDelta;
325 return 0;
326}
327
328
329/**
330 * Callback function for relocating a MMIO range.
331 *
332 * @returns 0 (continue enum)
333 * @param pNode Pointer to a IOMMMIORANGE node.
334 * @param pvUser Pointer to the offDelta. This is a pointer to the delta since we're
335 * not certain the delta will fit in a void pointer for all possible configs.
336 */
337static DECLCALLBACK(int) iomR3RelocateMMIOCallback(PAVLROGCPHYSNODECORE pNode, void *pvUser)
338{
339 PIOMMMIORANGE pRange = (PIOMMMIORANGE)pNode;
340 RTGCINTPTR offDelta = *(PRTGCINTPTR)pvUser;
341
342 if (pRange->pDevInsRC)
343 pRange->pDevInsRC += offDelta;
344 if (pRange->pfnWriteCallbackRC)
345 pRange->pfnWriteCallbackRC += offDelta;
346 if (pRange->pfnReadCallbackRC)
347 pRange->pfnReadCallbackRC += offDelta;
348 if (pRange->pfnFillCallbackRC)
349 pRange->pfnFillCallbackRC += offDelta;
350 if (pRange->pvUserRC > _64K)
351 pRange->pvUserRC += offDelta;
352
353 return 0;
354}
355
356
357/**
358 * Terminates the IOM.
359 *
360 * Termination means cleaning up and freeing all resources,
361 * the VM it self is at this point powered off or suspended.
362 *
363 * @returns VBox status code.
364 * @param pVM The VM to operate on.
365 */
366IOMR3DECL(int) IOMR3Term(PVM pVM)
367{
368 /*
369 * IOM is not owning anything but automatically freed resources,
370 * so there's nothing to do here.
371 */
372 return VINF_SUCCESS;
373}
374
375#ifdef VBOX_WITH_STATISTICS
376
377/**
378 * Create the statistics node for an I/O port.
379 *
380 * @returns Pointer to new stats node.
381 *
382 * @param pVM VM handle.
383 * @param Port Port.
384 * @param pszDesc Description.
385 */
386PIOMIOPORTSTATS iomR3IOPortStatsCreate(PVM pVM, RTIOPORT Port, const char *pszDesc)
387{
388 /* check if it already exists. */
389 PIOMIOPORTSTATS pPort = (PIOMIOPORTSTATS)RTAvloIOPortGet(&pVM->iom.s.pTreesR3->IOPortStatTree, Port);
390 if (pPort)
391 return pPort;
392
393 /* allocate stats node. */
394 int rc = MMHyperAlloc(pVM, sizeof(*pPort), 0, MM_TAG_IOM_STATS, (void **)&pPort);
395 AssertRC(rc);
396 if (RT_SUCCESS(rc))
397 {
398 /* insert into the tree. */
399 pPort->Core.Key = Port;
400 if (RTAvloIOPortInsert(&pVM->iom.s.pTreesR3->IOPortStatTree, &pPort->Core))
401 {
402 /* put a name on common ports. */
403 if (!pszDesc)
404 pszDesc = iomR3IOPortGetStandardName(Port);
405
406 /* register the statistics counters. */
407 rc = STAMR3RegisterF(pVM, &pPort->InR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-In-R3", Port); AssertRC(rc);
408 rc = STAMR3RegisterF(pVM, &pPort->OutR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-Out-R3", Port); AssertRC(rc);
409 rc = STAMR3RegisterF(pVM, &pPort->InRZ, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-In-RZ", Port); AssertRC(rc);
410 rc = STAMR3RegisterF(pVM, &pPort->OutRZ, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-Out-RZ", Port); AssertRC(rc);
411 rc = STAMR3RegisterF(pVM, &pPort->InRZToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-In-RZtoR3", Port); AssertRC(rc);
412 rc = STAMR3RegisterF(pVM, &pPort->OutRZToR3,STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/Ports/%04x-Out-RZtoR3", Port); AssertRC(rc);
413
414 /* Profiling */
415 rc = STAMR3RegisterF(pVM, &pPort->ProfInR3, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc,"/IOM/Ports/%04x-In-R3/Prof", Port); AssertRC(rc);
416 rc = STAMR3RegisterF(pVM, &pPort->ProfOutR3,STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc,"/IOM/Ports/%04x-Out-R3/Prof", Port); AssertRC(rc);
417 rc = STAMR3RegisterF(pVM, &pPort->ProfInRZ, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc,"/IOM/Ports/%04x-In-RZ/Prof", Port); AssertRC(rc);
418 rc = STAMR3RegisterF(pVM, &pPort->ProfOutRZ,STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc,"/IOM/Ports/%04x-Out-RZ/Prof", Port); AssertRC(rc);
419
420 return pPort;
421 }
422 AssertMsgFailed(("what! Port=%d\n", Port));
423 MMHyperFree(pVM, pPort);
424 }
425 return NULL;
426}
427
428
429/**
430 * Create the statistics node for an MMIO address.
431 *
432 * @returns Pointer to new stats node.
433 *
434 * @param pVM VM handle.
435 * @param GCPhys The address.
436 * @param pszDesc Description.
437 */
438PIOMMMIOSTATS iomR3MMIOStatsCreate(PVM pVM, RTGCPHYS GCPhys, const char *pszDesc)
439{
440#ifdef DEBUG_sandervl
441 AssertGCPhys32(GCPhys);
442#endif
443 /* check if it already exists. */
444 PIOMMMIOSTATS pStats = (PIOMMMIOSTATS)RTAvloGCPhysGet(&pVM->iom.s.pTreesR3->MMIOStatTree, GCPhys);
445 if (pStats)
446 return pStats;
447
448 /* allocate stats node. */
449 int rc = MMHyperAlloc(pVM, sizeof(*pStats), 0, MM_TAG_IOM_STATS, (void **)&pStats);
450 AssertRC(rc);
451 if (RT_SUCCESS(rc))
452 {
453 /* insert into the tree. */
454 pStats->Core.Key = GCPhys;
455 if (RTAvloGCPhysInsert(&pVM->iom.s.pTreesR3->MMIOStatTree, &pStats->Core))
456 {
457 /* register the statistics counters. */
458 rc = STAMR3RegisterF(pVM, &pStats->ReadR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/MMIO/%RGp-Read-R3", GCPhys); AssertRC(rc);
459 rc = STAMR3RegisterF(pVM, &pStats->WriteR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/MMIO/%RGp-Write-R3", GCPhys); AssertRC(rc);
460 rc = STAMR3RegisterF(pVM, &pStats->ReadRZ, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/MMIO/%RGp-Read-RZ", GCPhys); AssertRC(rc);
461 rc = STAMR3RegisterF(pVM, &pStats->WriteRZ, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/MMIO/%RGp-Write-RZ", GCPhys); AssertRC(rc);
462 rc = STAMR3RegisterF(pVM, &pStats->ReadRZToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/MMIO/%RGp-Read-RZtoR3", GCPhys); AssertRC(rc);
463 rc = STAMR3RegisterF(pVM, &pStats->WriteRZToR3, STAMTYPE_COUNTER, STAMVISIBILITY_USED, STAMUNIT_OCCURENCES, pszDesc, "/IOM/MMIO/%RGp-Write-RZtoR3", GCPhys); AssertRC(rc);
464
465 /* Profiling */
466 rc = STAMR3RegisterF(pVM, &pStats->ProfReadR3, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc, "/IOM/MMIO/%RGp-Read-R3/Prof", GCPhys); AssertRC(rc);
467 rc = STAMR3RegisterF(pVM, &pStats->ProfWriteR3, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc, "/IOM/MMIO/%RGp-Write-R3/Prof", GCPhys); AssertRC(rc);
468 rc = STAMR3RegisterF(pVM, &pStats->ProfReadRZ, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc, "/IOM/MMIO/%RGp-Read-RZ/Prof", GCPhys); AssertRC(rc);
469 rc = STAMR3RegisterF(pVM, &pStats->ProfWriteRZ, STAMTYPE_PROFILE, STAMVISIBILITY_USED, STAMUNIT_TICKS_PER_CALL, pszDesc, "/IOM/MMIO/%RGp-Write-RZ/Prof", GCPhys); AssertRC(rc);
470
471 return pStats;
472 }
473 AssertMsgFailed(("what! GCPhys=%RGp\n", GCPhys));
474 MMHyperFree(pVM, pStats);
475 }
476 return NULL;
477}
478
479#endif /* VBOX_WITH_STATISTICS */
480
481/**
482 * Registers a I/O port ring-3 handler.
483 *
484 * This API is called by PDM on behalf of a device. Devices must first register
485 * ring-3 ranges before any GC and R0 ranges can be registerd using IOMR3IOPortRegisterRC()
486 * and IOMR3IOPortRegisterR0().
487 *
488 *
489 * @returns VBox status code.
490 *
491 * @param pVM VM handle.
492 * @param pDevIns PDM device instance owning the port range.
493 * @param PortStart First port number in the range.
494 * @param cPorts Number of ports to register.
495 * @param pvUser User argument for the callbacks.
496 * @param pfnOutCallback Pointer to function which is gonna handle OUT operations in R3.
497 * @param pfnInCallback Pointer to function which is gonna handle IN operations in R3.
498 * @param pfnOutStrCallback Pointer to function which is gonna handle string OUT operations in R3.
499 * @param pfnInStrCallback Pointer to function which is gonna handle string IN operations in R3.
500 * @param pszDesc Pointer to description string. This must not be freed.
501 */
502IOMR3DECL(int) IOMR3IOPortRegisterR3(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTHCPTR pvUser,
503 R3PTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, R3PTRTYPE(PFNIOMIOPORTIN) pfnInCallback,
504 R3PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, R3PTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback, const char *pszDesc)
505{
506 LogFlow(("IOMR3IOPortRegisterR3: pDevIns=%p PortStart=%#x cPorts=%#x pvUser=%VHv pfnOutCallback=%#x pfnInCallback=%#x pfnOutStrCallback=%#x pfnInStrCallback=%#x pszDesc=%s\n",
507 pDevIns, PortStart, cPorts, pvUser, pfnOutCallback, pfnInCallback, pszDesc, pfnOutStrCallback, pfnInStrCallback));
508
509 /*
510 * Validate input.
511 */
512 if ( (RTUINT)PortStart + cPorts <= (RTUINT)PortStart
513 || (RTUINT)PortStart + cPorts > 0x10000)
514 {
515 AssertMsgFailed(("Invalid port range %#x-%#x (inclusive)! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
516 return VERR_IOM_INVALID_IOPORT_RANGE;
517 }
518 if (!pfnOutCallback && !pfnInCallback)
519 {
520 AssertMsgFailed(("no handlers specfied for %#x-%#x (inclusive)! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
521 return VERR_INVALID_PARAMETER;
522 }
523 if (!pfnOutCallback)
524 pfnOutCallback = iomR3IOPortDummyOut;
525 if (!pfnInCallback)
526 pfnInCallback = iomR3IOPortDummyIn;
527 if (!pfnOutStrCallback)
528 pfnOutStrCallback = iomR3IOPortDummyOutStr;
529 if (!pfnInStrCallback)
530 pfnInStrCallback = iomR3IOPortDummyInStr;
531
532 /* Flush the IO port lookup cache */
533 iomR3FlushCache(pVM);
534
535 /*
536 * Allocate new range record and initialize it.
537 */
538 PIOMIOPORTRANGER3 pRange;
539 int rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
540 if (RT_SUCCESS(rc))
541 {
542 pRange->Core.Key = PortStart;
543 pRange->Core.KeyLast = PortStart + (cPorts - 1);
544 pRange->Port = PortStart;
545 pRange->cPorts = cPorts;
546 pRange->pvUser = pvUser;
547 pRange->pDevIns = pDevIns;
548 pRange->pfnOutCallback = pfnOutCallback;
549 pRange->pfnInCallback = pfnInCallback;
550 pRange->pfnOutStrCallback = pfnOutStrCallback;
551 pRange->pfnInStrCallback = pfnInStrCallback;
552 pRange->pszDesc = pszDesc;
553
554 /*
555 * Try Insert it.
556 */
557 if (RTAvlroIOPortInsert(&pVM->iom.s.pTreesR3->IOPortTreeR3, &pRange->Core))
558 {
559 #ifdef VBOX_WITH_STATISTICS
560 for (unsigned iPort = 0; iPort < cPorts; iPort++)
561 iomR3IOPortStatsCreate(pVM, PortStart + iPort, pszDesc);
562 #endif
563 return VINF_SUCCESS;
564 }
565
566 /* conflict. */
567 DBGFR3Info(pVM, "ioport", NULL, NULL);
568 AssertMsgFailed(("Port range %#x-%#x (%s) conflicts with existing range(s)!\n", PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
569 MMHyperFree(pVM, pRange);
570 rc = VERR_IOM_IOPORT_RANGE_CONFLICT;
571 }
572
573 return rc;
574}
575
576
577/**
578 * Registers a I/O port RC handler.
579 *
580 * This API is called by PDM on behalf of a device. Devices must first register ring-3 ranges
581 * using IOMIOPortRegisterR3() before calling this function.
582 *
583 *
584 * @returns VBox status code.
585 *
586 * @param pVM VM handle.
587 * @param pDevIns PDM device instance owning the port range.
588 * @param PortStart First port number in the range.
589 * @param cPorts Number of ports to register.
590 * @param pvUser User argument for the callbacks.
591 * @param pfnOutCallback Pointer to function which is gonna handle OUT operations in GC.
592 * @param pfnInCallback Pointer to function which is gonna handle IN operations in GC.
593 * @param pfnOutStrCallback Pointer to function which is gonna handle string OUT operations in GC.
594 * @param pfnInStrCallback Pointer to function which is gonna handle string IN operations in GC.
595 * @param pszDesc Pointer to description string. This must not be freed.
596 */
597IOMR3DECL(int) IOMR3IOPortRegisterRC(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTRCPTR pvUser,
598 RCPTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, RCPTRTYPE(PFNIOMIOPORTIN) pfnInCallback,
599 RCPTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, RCPTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback, const char *pszDesc)
600{
601 LogFlow(("IOMR3IOPortRegisterRC: pDevIns=%p PortStart=%#x cPorts=%#x pvUser=%VRv pfnOutCallback=%VGv pfnInCallback=%VRv pfnOutStrCallback=%VRv pfnInStrCallback=%VRv pszDesc=%s\n",
602 pDevIns, PortStart, cPorts, pvUser, pfnOutCallback, pfnInCallback, pfnOutStrCallback, pfnInStrCallback, pszDesc));
603
604 /*
605 * Validate input.
606 */
607 if ( (RTUINT)PortStart + cPorts <= (RTUINT)PortStart
608 || (RTUINT)PortStart + cPorts > 0x10000)
609 {
610 AssertMsgFailed(("Invalid port range %#x-%#x! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
611 return VERR_IOM_INVALID_IOPORT_RANGE;
612 }
613 RTIOPORT PortLast = PortStart + (cPorts - 1);
614 if (!pfnOutCallback && !pfnInCallback)
615 {
616 AssertMsgFailed(("Invalid port range %#x-%#x! No callbacks! (%s)\n", PortStart, PortLast, pszDesc));
617 return VERR_INVALID_PARAMETER;
618 }
619
620 /*
621 * Validate that there are ring-3 ranges for the ports.
622 */
623 RTIOPORT Port = PortStart;
624 while (Port <= PortLast && Port >= PortStart)
625 {
626 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortTreeR3, Port);
627 if (!pRange)
628 {
629 AssertMsgFailed(("No R3! Port=#x %#x-%#x! (%s)\n", Port, PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
630 return VERR_IOM_NO_HC_IOPORT_RANGE;
631 }
632#ifndef IOM_NO_PDMINS_CHECKS
633# ifndef IN_GC
634 if (pRange->pDevIns != pDevIns)
635# else
636 if (pRange->pDevIns != MMHyperRCToCC(pVM, pDevIns))
637# endif
638 {
639 AssertMsgFailed(("Not owner! Port=%#x %#x-%#x! (%s)\n", Port, PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
640 return VERR_IOM_NOT_IOPORT_RANGE_OWNER;
641 }
642#endif
643 Port = pRange->Core.KeyLast + 1;
644 }
645
646 /* Flush the IO port lookup cache */
647 iomR3FlushCache(pVM);
648
649 /*
650 * Allocate new range record and initialize it.
651 */
652 PIOMIOPORTRANGERC pRange;
653 int rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
654 if (RT_SUCCESS(rc))
655 {
656 pRange->Core.Key = PortStart;
657 pRange->Core.KeyLast = PortLast;
658 pRange->Port = PortStart;
659 pRange->cPorts = cPorts;
660 pRange->pvUser = pvUser;
661 pRange->pfnOutCallback = pfnOutCallback;
662 pRange->pfnInCallback = pfnInCallback;
663 pRange->pfnOutStrCallback = pfnOutStrCallback;
664 pRange->pfnInStrCallback = pfnInStrCallback;
665 pRange->pDevIns = MMHyperCCToRC(pVM, pDevIns);
666 pRange->pszDesc = pszDesc;
667
668 /*
669 * Insert it.
670 */
671 if (RTAvlroIOPortInsert(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortTreeRC, &pRange->Core))
672 return VINF_SUCCESS;
673
674 /* conflict. */
675 AssertMsgFailed(("Port range %#x-%#x (%s) conflicts with existing range(s)!\n", PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
676 MMHyperFree(pVM, pRange);
677 rc = VERR_IOM_IOPORT_RANGE_CONFLICT;
678 }
679
680 return rc;
681}
682
683
684/**
685 * Registers a Port IO R0 handler.
686 *
687 * This API is called by PDM on behalf of a device. Devices must first register ring-3 ranges
688 * using IOMR3IOPortRegisterR3() before calling this function.
689 *
690 *
691 * @returns VBox status code.
692 *
693 * @param pVM VM handle.
694 * @param pDevIns PDM device instance owning the port range.
695 * @param PortStart First port number in the range.
696 * @param cPorts Number of ports to register.
697 * @param pvUser User argument for the callbacks.
698 * @param pfnOutCallback Pointer to function which is gonna handle OUT operations in GC.
699 * @param pfnInCallback Pointer to function which is gonna handle IN operations in GC.
700 * @param pfnOutStrCallback Pointer to function which is gonna handle OUT operations in GC.
701 * @param pfnInStrCallback Pointer to function which is gonna handle IN operations in GC.
702 * @param pszDesc Pointer to description string. This must not be freed.
703 */
704IOMR3DECL(int) IOMR3IOPortRegisterR0(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts, RTR0PTR pvUser,
705 R0PTRTYPE(PFNIOMIOPORTOUT) pfnOutCallback, R0PTRTYPE(PFNIOMIOPORTIN) pfnInCallback,
706 R0PTRTYPE(PFNIOMIOPORTOUTSTRING) pfnOutStrCallback, R0PTRTYPE(PFNIOMIOPORTINSTRING) pfnInStrCallback,
707 const char *pszDesc)
708{
709 LogFlow(("IOMR3IOPortRegisterR0: pDevIns=%p PortStart=%#x cPorts=%#x pvUser=%VHv pfnOutCallback=%VHv pfnInCallback=%VHv pfnOutStrCallback=%VHv pfnInStrCallback=%VHv pszDesc=%s\n",
710 pDevIns, PortStart, cPorts, pvUser, pfnOutCallback, pfnInCallback, pfnOutStrCallback, pfnInStrCallback, pszDesc));
711
712 /*
713 * Validate input.
714 */
715 if ( (RTUINT)PortStart + cPorts <= (RTUINT)PortStart
716 || (RTUINT)PortStart + cPorts > 0x10000)
717 {
718 AssertMsgFailed(("Invalid port range %#x-%#x! (%s)\n", PortStart, (RTUINT)PortStart + (cPorts - 1), pszDesc));
719 return VERR_IOM_INVALID_IOPORT_RANGE;
720 }
721 RTIOPORT PortLast = PortStart + (cPorts - 1);
722 if (!pfnOutCallback && !pfnInCallback)
723 {
724 AssertMsgFailed(("Invalid port range %#x-%#x! No callbacks! (%s)\n", PortStart, PortLast, pszDesc));
725 return VERR_INVALID_PARAMETER;
726 }
727
728 /*
729 * Validate that there are ring-3 ranges for the ports.
730 */
731 RTIOPORT Port = PortStart;
732 while (Port <= PortLast && Port >= PortStart)
733 {
734 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortTreeR3, Port);
735 if (!pRange)
736 {
737 AssertMsgFailed(("No R3! Port=#x %#x-%#x! (%s)\n", Port, PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
738 return VERR_IOM_NO_HC_IOPORT_RANGE;
739 }
740#ifndef IOM_NO_PDMINS_CHECKS
741# ifndef IN_GC
742 if (pRange->pDevIns != pDevIns)
743# else
744 if (pRange->pDevIns != MMHyperRCToCC(pVM, pDevIns))
745# endif
746 {
747 AssertMsgFailed(("Not owner! Port=%#x %#x-%#x! (%s)\n", Port, PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
748 return VERR_IOM_NOT_IOPORT_RANGE_OWNER;
749 }
750#endif
751 Port = pRange->Core.KeyLast + 1;
752 }
753
754 /* Flush the IO port lookup cache */
755 iomR3FlushCache(pVM);
756
757 /*
758 * Allocate new range record and initialize it.
759 */
760 PIOMIOPORTRANGER0 pRange;
761 int rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
762 if (RT_SUCCESS(rc))
763 {
764 pRange->Core.Key = PortStart;
765 pRange->Core.KeyLast = PortLast;
766 pRange->Port = PortStart;
767 pRange->cPorts = cPorts;
768 pRange->pvUser = pvUser;
769 pRange->pfnOutCallback = pfnOutCallback;
770 pRange->pfnInCallback = pfnInCallback;
771 pRange->pfnOutStrCallback = pfnOutStrCallback;
772 pRange->pfnInStrCallback = pfnInStrCallback;
773 pRange->pDevIns = MMHyperR3ToR0(pVM, pDevIns);
774 pRange->pszDesc = pszDesc;
775
776 /*
777 * Insert it.
778 */
779 if (RTAvlroIOPortInsert(&pVM->iom.s.CTX_SUFF(pTrees)->IOPortTreeR0, &pRange->Core))
780 return VINF_SUCCESS;
781
782 /* conflict. */
783 AssertMsgFailed(("Port range %#x-%#x (%s) conflicts with existing range(s)!\n", PortStart, (unsigned)PortStart + cPorts - 1, pszDesc));
784 MMHyperFree(pVM, pRange);
785 rc = VERR_IOM_IOPORT_RANGE_CONFLICT;
786 }
787
788 return rc;
789}
790
791
792/**
793 * Deregisters a I/O Port range.
794 *
795 * The specified range must be registered using IOMR3IOPortRegister previous to
796 * this call. The range does can be a smaller part of the range specified to
797 * IOMR3IOPortRegister, but it can never be larger.
798 *
799 * This function will remove GC, R0 and R3 context port handlers for this range.
800 *
801 * @returns VBox status code.
802 *
803 * @param pVM The virtual machine.
804 * @param pDevIns The device instance associated with the range.
805 * @param PortStart First port number in the range.
806 * @param cPorts Number of ports to remove starting at PortStart.
807 *
808 * @remark This function mainly for PCI PnP Config and will not do
809 * all the checks you might expect it to do.
810 */
811IOMR3DECL(int) IOMR3IOPortDeregister(PVM pVM, PPDMDEVINS pDevIns, RTIOPORT PortStart, RTUINT cPorts)
812{
813 LogFlow(("IOMR3IOPortDeregister: pDevIns=%p PortStart=%#x cPorts=%#x\n", pDevIns, PortStart, cPorts));
814
815 /*
816 * Validate input.
817 */
818 if ( (RTUINT)PortStart + cPorts < (RTUINT)PortStart
819 || (RTUINT)PortStart + cPorts > 0x10000)
820 {
821 AssertMsgFailed(("Invalid port range %#x-%#x!\n", PortStart, (unsigned)PortStart + cPorts - 1));
822 return VERR_IOM_INVALID_IOPORT_RANGE;
823 }
824
825 /* Flush the IO port lookup cache */
826 iomR3FlushCache(pVM);
827
828 /*
829 * Check ownership.
830 */
831 RTIOPORT PortLast = PortStart + (cPorts - 1);
832 RTIOPORT Port = PortStart;
833 while (Port <= PortLast && Port >= PortStart)
834 {
835 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesR3->IOPortTreeR3, Port);
836 if (pRange)
837 {
838 Assert(Port <= pRange->Core.KeyLast);
839#ifndef IOM_NO_PDMINS_CHECKS
840 if (pRange->pDevIns != pDevIns)
841 {
842 AssertMsgFailed(("Removal of ports in range %#x-%#x rejected because not owner of %#x-%#x (%s)\n",
843 PortStart, PortLast, pRange->Core.Key, pRange->Core.KeyLast, pRange->pszDesc));
844 return VERR_IOM_NOT_IOPORT_RANGE_OWNER;
845 }
846#endif /* !IOM_NO_PDMINS_CHECKS */
847 Port = pRange->Core.KeyLast;
848 }
849 Port++;
850 }
851
852 /*
853 * Remove any RC ranges first.
854 */
855 int rc = VINF_SUCCESS;
856 Port = PortStart;
857 while (Port <= PortLast && Port >= PortStart)
858 {
859 /*
860 * Try find range.
861 */
862 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesR3->IOPortTreeRC, Port);
863 if (pRange)
864 {
865 if ( pRange->Core.Key == Port
866 && pRange->Core.KeyLast <= PortLast)
867 {
868 /*
869 * Kick out the entire range.
870 */
871 void *pv = RTAvlroIOPortRemove(&pVM->iom.s.pTreesR3->IOPortTreeRC, Port);
872 Assert(pv == (void *)pRange); NOREF(pv);
873 Port += pRange->cPorts;
874 MMHyperFree(pVM, pRange);
875 }
876 else if (pRange->Core.Key == Port)
877 {
878 /*
879 * Cut of the head of the range, done.
880 */
881 pRange->cPorts -= Port - pRange->Port;
882 pRange->Core.Key = Port;
883 pRange->Port = Port;
884 break;
885 }
886 else if (pRange->Core.KeyLast <= PortLast)
887 {
888 /*
889 * Just cut of the tail.
890 */
891 unsigned c = pRange->Core.KeyLast - Port + 1;
892 pRange->Core.KeyLast -= c;
893 pRange->cPorts -= c;
894 Port += c;
895 }
896 else
897 {
898 /*
899 * Split the range, done.
900 */
901 Assert(pRange->Core.KeyLast > PortLast && pRange->Core.Key < Port);
902 /* create tail. */
903 PIOMIOPORTRANGERC pRangeNew;
904 int rc = MMHyperAlloc(pVM, sizeof(*pRangeNew), 0, MM_TAG_IOM, (void **)&pRangeNew);
905 if (RT_FAILURE(rc))
906 return rc;
907
908 *pRangeNew = *pRange;
909 pRangeNew->Core.Key = PortLast;
910 pRangeNew->Port = PortLast;
911 pRangeNew->cPorts = pRangeNew->Core.KeyLast - PortLast + 1;
912
913 /* adjust head */
914 pRange->Core.KeyLast = Port - 1;
915 pRange->cPorts = Port - pRange->Port;
916
917 /* insert */
918 if (!RTAvlroIOPortInsert(&pVM->iom.s.pTreesR3->IOPortTreeRC, &pRangeNew->Core))
919 {
920 AssertMsgFailed(("This cannot happen!\n"));
921 MMHyperFree(pVM, pRangeNew);
922 rc = VERR_INTERNAL_ERROR;
923 }
924 break;
925 }
926 }
927 else /* next port */
928 Port++;
929 } /* for all ports - RC. */
930
931
932 /*
933 * Remove any R0 ranges first.
934 */
935 rc = VINF_SUCCESS;
936 Port = PortStart;
937 while (Port <= PortLast && Port >= PortStart)
938 {
939 /*
940 * Try find range.
941 */
942 PIOMIOPORTRANGER0 pRange = (PIOMIOPORTRANGER0)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesR3->IOPortTreeR0, Port);
943 if (pRange)
944 {
945 if ( pRange->Core.Key == Port
946 && pRange->Core.KeyLast <= PortLast)
947 {
948 /*
949 * Kick out the entire range.
950 */
951 void *pv = RTAvlroIOPortRemove(&pVM->iom.s.pTreesR3->IOPortTreeR0, Port);
952 Assert(pv == (void *)pRange); NOREF(pv);
953 Port += pRange->cPorts;
954 MMHyperFree(pVM, pRange);
955 }
956 else if (pRange->Core.Key == Port)
957 {
958 /*
959 * Cut of the head of the range, done.
960 */
961 pRange->cPorts -= Port - pRange->Port;
962 pRange->Core.Key = Port;
963 pRange->Port = Port;
964 break;
965 }
966 else if (pRange->Core.KeyLast <= PortLast)
967 {
968 /*
969 * Just cut of the tail.
970 */
971 unsigned c = pRange->Core.KeyLast - Port + 1;
972 pRange->Core.KeyLast -= c;
973 pRange->cPorts -= c;
974 Port += c;
975 }
976 else
977 {
978 /*
979 * Split the range, done.
980 */
981 Assert(pRange->Core.KeyLast > PortLast && pRange->Core.Key < Port);
982 /* create tail. */
983 PIOMIOPORTRANGER0 pRangeNew;
984 int rc = MMHyperAlloc(pVM, sizeof(*pRangeNew), 0, MM_TAG_IOM, (void **)&pRangeNew);
985 if (RT_FAILURE(rc))
986 return rc;
987
988 *pRangeNew = *pRange;
989 pRangeNew->Core.Key = PortLast;
990 pRangeNew->Port = PortLast;
991 pRangeNew->cPorts = pRangeNew->Core.KeyLast - PortLast + 1;
992
993 /* adjust head */
994 pRange->Core.KeyLast = Port - 1;
995 pRange->cPorts = Port - pRange->Port;
996
997 /* insert */
998 if (!RTAvlroIOPortInsert(&pVM->iom.s.pTreesR3->IOPortTreeR0, &pRangeNew->Core))
999 {
1000 AssertMsgFailed(("This cannot happen!\n"));
1001 MMHyperFree(pVM, pRangeNew);
1002 rc = VERR_INTERNAL_ERROR;
1003 }
1004 break;
1005 }
1006 }
1007 else /* next port */
1008 Port++;
1009 } /* for all ports - R0. */
1010
1011 /*
1012 * And the same procedure for ring-3 ranges.
1013 */
1014 Port = PortStart;
1015 while (Port <= PortLast && Port >= PortStart)
1016 {
1017 /*
1018 * Try find range.
1019 */
1020 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)RTAvlroIOPortRangeGet(&pVM->iom.s.pTreesR3->IOPortTreeR3, Port);
1021 if (pRange)
1022 {
1023 if ( pRange->Core.Key == Port
1024 && pRange->Core.KeyLast <= PortLast)
1025 {
1026 /*
1027 * Kick out the entire range.
1028 */
1029 void *pv = RTAvlroIOPortRemove(&pVM->iom.s.pTreesR3->IOPortTreeR3, Port);
1030 Assert(pv == (void *)pRange); NOREF(pv);
1031 Port += pRange->cPorts;
1032 MMHyperFree(pVM, pRange);
1033 }
1034 else if (pRange->Core.Key == Port)
1035 {
1036 /*
1037 * Cut of the head of the range, done.
1038 */
1039 pRange->cPorts -= Port - pRange->Port;
1040 pRange->Core.Key = Port;
1041 pRange->Port = Port;
1042 break;
1043 }
1044 else if (pRange->Core.KeyLast <= PortLast)
1045 {
1046 /*
1047 * Just cut of the tail.
1048 */
1049 unsigned c = pRange->Core.KeyLast - Port + 1;
1050 pRange->Core.KeyLast -= c;
1051 pRange->cPorts -= c;
1052 Port += c;
1053 }
1054 else
1055 {
1056 /*
1057 * Split the range, done.
1058 */
1059 Assert(pRange->Core.KeyLast > PortLast && pRange->Core.Key < Port);
1060 /* create tail. */
1061 PIOMIOPORTRANGER3 pRangeNew;
1062 int rc = MMHyperAlloc(pVM, sizeof(*pRangeNew), 0, MM_TAG_IOM, (void **)&pRangeNew);
1063 if (RT_FAILURE(rc))
1064 return rc;
1065
1066 *pRangeNew = *pRange;
1067 pRangeNew->Core.Key = PortLast;
1068 pRangeNew->Port = PortLast;
1069 pRangeNew->cPorts = pRangeNew->Core.KeyLast - PortLast + 1;
1070
1071 /* adjust head */
1072 pRange->Core.KeyLast = Port - 1;
1073 pRange->cPorts = Port - pRange->Port;
1074
1075 /* insert */
1076 if (!RTAvlroIOPortInsert(&pVM->iom.s.pTreesR3->IOPortTreeR3, &pRangeNew->Core))
1077 {
1078 AssertMsgFailed(("This cannot happen!\n"));
1079 MMHyperFree(pVM, pRangeNew);
1080 rc = VERR_INTERNAL_ERROR;
1081 }
1082 break;
1083 }
1084 }
1085 else /* next port */
1086 Port++;
1087 } /* for all ports - ring-3. */
1088
1089 /* done */
1090 return rc;
1091}
1092
1093
1094/**
1095 * Dummy Port I/O Handler for IN operations.
1096 *
1097 * @returns VBox status code.
1098 *
1099 * @param pDevIns The device instance.
1100 * @param pvUser User argument.
1101 * @param Port Port number used for the IN operation.
1102 * @param pu32 Where to store the result.
1103 * @param cb Number of bytes read.
1104 */
1105static DECLCALLBACK(int) iomR3IOPortDummyIn(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)
1106{
1107 switch (cb)
1108 {
1109 case 1: *pu32 = 0xff; break;
1110 case 2: *pu32 = 0xffff; break;
1111 case 4: *pu32 = UINT32_C(0xffffffff); break;
1112 default:
1113 AssertReleaseMsgFailed(("cb=%d\n", cb));
1114 return VERR_INTERNAL_ERROR;
1115 }
1116 return VINF_SUCCESS;
1117}
1118
1119
1120/**
1121 * Dummy Port I/O Handler for string IN operations.
1122 *
1123 * @returns VBox status code.
1124 *
1125 * @param pDevIns The device instance.
1126 * @param pvUser User argument.
1127 * @param Port Port number used for the string IN operation.
1128 * @param pGCPtrDst Pointer to the destination buffer (GC, incremented appropriately).
1129 * @param pcTransfer Pointer to the number of transfer units to read, on return remaining transfer units.
1130 * @param cb Size of the transfer unit (1, 2 or 4 bytes).
1131 */
1132static DECLCALLBACK(int) iomR3IOPortDummyInStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrDst, PRTGCUINTREG pcTransfer, unsigned cb)
1133{
1134 return VINF_SUCCESS;
1135}
1136
1137
1138/**
1139 * Dummy Port I/O Handler for OUT operations.
1140 *
1141 * @returns VBox status code.
1142 *
1143 * @param pDevIns The device instance.
1144 * @param pvUser User argument.
1145 * @param Port Port number used for the OUT operation.
1146 * @param u32 The value to output.
1147 * @param cb The value size in bytes.
1148 */
1149static DECLCALLBACK(int) iomR3IOPortDummyOut(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
1150{
1151 return VINF_SUCCESS;
1152}
1153
1154
1155/**
1156 * Dummy Port I/O Handler for string OUT operations.
1157 *
1158 * @returns VBox status code.
1159 *
1160 * @param pDevIns The device instance.
1161 * @param pvUser User argument.
1162 * @param Port Port number used for the string OUT operation.
1163 * @param pGCPtrSrc Pointer to the source buffer (GC, incremented appropriately).
1164 * @param pcTransfer Pointer to the number of transfer units to write, on return remaining transfer units.
1165 * @param cb Size of the transfer unit (1, 2 or 4 bytes).
1166 */
1167static DECLCALLBACK(int) iomR3IOPortDummyOutStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, RTGCPTR *pGCPtrSrc, PRTGCUINTREG pcTransfer, unsigned cb)
1168{
1169 return VINF_SUCCESS;
1170}
1171
1172
1173/**
1174 * Display a single I/O port ring-3 range.
1175 *
1176 * @returns 0
1177 * @param pNode Pointer to I/O port HC range.
1178 * @param pvUser Pointer to info output callback structure.
1179 */
1180static DECLCALLBACK(int) iomR3IOPortInfoOneR3(PAVLROIOPORTNODECORE pNode, void *pvUser)
1181{
1182 PIOMIOPORTRANGER3 pRange = (PIOMIOPORTRANGER3)pNode;
1183 PCDBGFINFOHLP pHlp = (PCDBGFINFOHLP)pvUser;
1184 pHlp->pfnPrintf(pHlp,
1185 "%04x-%04x %VHv %VHv %VHv %VHv %s\n",
1186 pRange->Core.Key,
1187 pRange->Core.KeyLast,
1188 pRange->pDevIns,
1189 pRange->pfnInCallback,
1190 pRange->pfnOutCallback,
1191 pRange->pvUser,
1192 pRange->pszDesc);
1193 return 0;
1194}
1195
1196
1197/**
1198 * Display a single I/O port GC range.
1199 *
1200 * @returns 0
1201 * @param pNode Pointer to IOPORT GC range.
1202 * @param pvUser Pointer to info output callback structure.
1203 */
1204static DECLCALLBACK(int) iomR3IOPortInfoOneRC(PAVLROIOPORTNODECORE pNode, void *pvUser)
1205{
1206 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)pNode;
1207 PCDBGFINFOHLP pHlp = (PCDBGFINFOHLP)pvUser;
1208 pHlp->pfnPrintf(pHlp,
1209 "%04x-%04x %VRv %VRv %VRv %VRv %s\n",
1210 pRange->Core.Key,
1211 pRange->Core.KeyLast,
1212 pRange->pDevIns,
1213 pRange->pfnInCallback,
1214 pRange->pfnOutCallback,
1215 pRange->pvUser,
1216 pRange->pszDesc);
1217 return 0;
1218}
1219
1220
1221/**
1222 * Display all registered I/O port ranges.
1223 *
1224 * @param pVM VM Handle.
1225 * @param pHlp The info helpers.
1226 * @param pszArgs Arguments, ignored.
1227 */
1228static DECLCALLBACK(void) iomR3IOPortInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
1229{
1230 NOREF(pszArgs);
1231 pHlp->pfnPrintf(pHlp,
1232 "I/O Port R3 ranges (pVM=%p)\n"
1233 "Range %.*s %.*s %.*s %.*s Description\n",
1234 pVM,
1235 sizeof(RTHCPTR) * 2, "pDevIns ",
1236 sizeof(RTHCPTR) * 2, "In ",
1237 sizeof(RTHCPTR) * 2, "Out ",
1238 sizeof(RTHCPTR) * 2, "pvUser ");
1239 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeR3, true, iomR3IOPortInfoOneR3, (void *)pHlp);
1240
1241 pHlp->pfnPrintf(pHlp,
1242 "I/O Port R0 ranges (pVM=%p)\n"
1243 "Range %.*s %.*s %.*s %.*s Description\n",
1244 pVM,
1245 sizeof(RTHCPTR) * 2, "pDevIns ",
1246 sizeof(RTHCPTR) * 2, "In ",
1247 sizeof(RTHCPTR) * 2, "Out ",
1248 sizeof(RTHCPTR) * 2, "pvUser ");
1249 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeR0, true, iomR3IOPortInfoOneR3, (void *)pHlp);
1250
1251 pHlp->pfnPrintf(pHlp,
1252 "I/O Port GC ranges (pVM=%p)\n"
1253 "Range %.*s %.*s %.*s %.*s Description\n",
1254 pVM,
1255 sizeof(RTRCPTR) * 2, "pDevIns ",
1256 sizeof(RTRCPTR) * 2, "In ",
1257 sizeof(RTRCPTR) * 2, "Out ",
1258 sizeof(RTRCPTR) * 2, "pvUser ");
1259 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeRC, true, iomR3IOPortInfoOneRC, (void *)pHlp);
1260
1261 if (pVM->iom.s.pRangeLastReadRC)
1262 {
1263 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)MMHyperRCToCC(pVM, pVM->iom.s.pRangeLastReadRC);
1264 pHlp->pfnPrintf(pHlp, "RC Read Ports: %#04x-%#04x %VRv %s\n",
1265 pRange->Port, pRange->Port + pRange->cPorts, pVM->iom.s.pRangeLastReadRC, pRange->pszDesc);
1266 }
1267 if (pVM->iom.s.pStatsLastReadRC)
1268 {
1269 PIOMIOPORTSTATS pRange = (PIOMIOPORTSTATS)MMHyperRCToCC(pVM, pVM->iom.s.pStatsLastReadRC);
1270 pHlp->pfnPrintf(pHlp, "RC Read Stats: %#04x %VRv\n",
1271 pRange->Core.Key, pVM->iom.s.pStatsLastReadRC);
1272 }
1273
1274 if (pVM->iom.s.pRangeLastWriteRC)
1275 {
1276 PIOMIOPORTRANGERC pRange = (PIOMIOPORTRANGERC)MMHyperRCToCC(pVM, pVM->iom.s.pRangeLastWriteRC);
1277 pHlp->pfnPrintf(pHlp, "RC Write Ports: %#04x-%#04x %VRv %s\n",
1278 pRange->Port, pRange->Port + pRange->cPorts, pVM->iom.s.pRangeLastWriteRC, pRange->pszDesc);
1279 }
1280 if (pVM->iom.s.pStatsLastWriteRC)
1281 {
1282 PIOMIOPORTSTATS pRange = (PIOMIOPORTSTATS)MMHyperRCToCC(pVM, pVM->iom.s.pStatsLastWriteRC);
1283 pHlp->pfnPrintf(pHlp, "RC Write Stats: %#04x %VRv\n",
1284 pRange->Core.Key, pVM->iom.s.pStatsLastWriteRC);
1285 }
1286
1287 if (pVM->iom.s.pRangeLastReadR3)
1288 {
1289 PIOMIOPORTRANGER3 pRange = pVM->iom.s.pRangeLastReadR3;
1290 pHlp->pfnPrintf(pHlp, "R3 Read Ports: %#04x-%#04x %VHv %s\n",
1291 pRange->Port, pRange->Port + pRange->cPorts, pRange, pRange->pszDesc);
1292 }
1293 if (pVM->iom.s.pStatsLastReadR3)
1294 {
1295 PIOMIOPORTSTATS pRange = pVM->iom.s.pStatsLastReadR3;
1296 pHlp->pfnPrintf(pHlp, "R3 Read Stats: %#04x %VHv\n",
1297 pRange->Core.Key, pRange);
1298 }
1299
1300 if (pVM->iom.s.pRangeLastWriteR3)
1301 {
1302 PIOMIOPORTRANGER3 pRange = pVM->iom.s.pRangeLastWriteR3;
1303 pHlp->pfnPrintf(pHlp, "R3 Write Ports: %#04x-%#04x %VHv %s\n",
1304 pRange->Port, pRange->Port + pRange->cPorts, pRange, pRange->pszDesc);
1305 }
1306 if (pVM->iom.s.pStatsLastWriteR3)
1307 {
1308 PIOMIOPORTSTATS pRange = pVM->iom.s.pStatsLastWriteR3;
1309 pHlp->pfnPrintf(pHlp, "R3 Write Stats: %#04x %VHv\n",
1310 pRange->Core.Key, pRange);
1311 }
1312
1313 if (pVM->iom.s.pRangeLastReadR0)
1314 {
1315 PIOMIOPORTRANGER0 pRange = (PIOMIOPORTRANGER0)MMHyperR0ToCC(pVM, pVM->iom.s.pRangeLastReadR0);
1316 pHlp->pfnPrintf(pHlp, "R0 Read Ports: %#04x-%#04x %VHv %s\n",
1317 pRange->Port, pRange->Port + pRange->cPorts, pRange, pRange->pszDesc);
1318 }
1319 if (pVM->iom.s.pStatsLastReadR0)
1320 {
1321 PIOMIOPORTSTATS pRange = (PIOMIOPORTSTATS)MMHyperR0ToCC(pVM, pVM->iom.s.pStatsLastReadR0);
1322 pHlp->pfnPrintf(pHlp, "R0 Read Stats: %#04x %VHv\n",
1323 pRange->Core.Key, pRange);
1324 }
1325
1326 if (pVM->iom.s.pRangeLastWriteR0)
1327 {
1328 PIOMIOPORTRANGER0 pRange = (PIOMIOPORTRANGER0)MMHyperR0ToCC(pVM, pVM->iom.s.pRangeLastWriteR0);
1329 pHlp->pfnPrintf(pHlp, "R0 Write Ports: %#04x-%#04x %VGv %s\n",
1330 pRange->Port, pRange->Port + pRange->cPorts, pRange, pRange->pszDesc);
1331 }
1332 if (pVM->iom.s.pStatsLastWriteR0)
1333 {
1334 PIOMIOPORTSTATS pRange = (PIOMIOPORTSTATS)MMHyperR0ToCC(pVM, pVM->iom.s.pStatsLastWriteR0);
1335 pHlp->pfnPrintf(pHlp, "R0 Write Stats: %#04x %VHv\n",
1336 pRange->Core.Key, pRange);
1337 }
1338}
1339
1340
1341/**
1342 * Registers a Memory Mapped I/O R3 handler.
1343 *
1344 * This API is called by PDM on behalf of a device. Devices must register ring-3 ranges
1345 * before any GC and R0 ranges can be registered using IOMR3MMIORegisterRC() and IOMR3MMIORegisterR0().
1346 *
1347 * @returns VBox status code.
1348 *
1349 * @param pVM VM handle.
1350 * @param pDevIns PDM device instance owning the MMIO range.
1351 * @param GCPhysStart First physical address in the range.
1352 * @param cbRange The size of the range (in bytes).
1353 * @param pvUser User argument for the callbacks.
1354 * @param pfnWriteCallback Pointer to function which is gonna handle Write operations.
1355 * @param pfnReadCallback Pointer to function which is gonna handle Read operations.
1356 * @param pfnFillCallback Pointer to function which is gonna handle Fill/memset operations.
1357 * @param pszDesc Pointer to description string. This must not be freed.
1358 */
1359IOMR3DECL(int) IOMR3MMIORegisterR3(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTHCPTR pvUser,
1360 R3PTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback, R3PTRTYPE(PFNIOMMMIOREAD) pfnReadCallback,
1361 R3PTRTYPE(PFNIOMMMIOFILL) pfnFillCallback, const char *pszDesc)
1362{
1363 LogFlow(("IOMR3MMIORegisterR3: pDevIns=%p GCPhysStart=%VGp cbRange=%#x pvUser=%VHv pfnWriteCallback=%#x pfnReadCallback=%#x pfnFillCallback=%#x pszDesc=%s\n",
1364 pDevIns, GCPhysStart, cbRange, pvUser, pfnWriteCallback, pfnReadCallback, pfnFillCallback, pszDesc));
1365 int rc;
1366
1367 /*
1368 * Validate input.
1369 */
1370 if (GCPhysStart + (cbRange - 1) < GCPhysStart)
1371 {
1372 AssertMsgFailed(("Wrapped! %VGp %#x bytes\n", GCPhysStart, cbRange));
1373 return VERR_IOM_INVALID_MMIO_RANGE;
1374 }
1375
1376 /*
1377 * Resolve the GC/R0 handler addresses lazily because of init order.
1378 */
1379 if (pVM->iom.s.pfnMMIOHandlerR0 == NIL_RTR0PTR)
1380 {
1381 rc = PDMR3GetSymbolGCLazy(pVM, NULL, "IOMMMIOHandler", &pVM->iom.s.pfnMMIOHandlerRC);
1382 AssertLogRelRCReturn(rc, rc);
1383 rc = PDMR3GetSymbolR0Lazy(pVM, NULL, "IOMMMIOHandler", &pVM->iom.s.pfnMMIOHandlerR0);
1384 AssertLogRelRCReturn(rc, rc);
1385 }
1386
1387 /*
1388 * Allocate new range record and initialize it.
1389 */
1390 PIOMMMIORANGE pRange;
1391 rc = MMHyperAlloc(pVM, sizeof(*pRange), 0, MM_TAG_IOM, (void **)&pRange);
1392 if (RT_SUCCESS(rc))
1393 {
1394 pRange->Core.Key = GCPhysStart;
1395 pRange->Core.KeyLast = GCPhysStart + (cbRange - 1);
1396 pRange->GCPhys = GCPhysStart;
1397 pRange->cb = cbRange;
1398 pRange->pszDesc = pszDesc;
1399
1400 pRange->pvUserR3 = pvUser;
1401 pRange->pDevInsR3 = pDevIns;
1402 pRange->pfnReadCallbackR3 = pfnReadCallback;
1403 pRange->pfnWriteCallbackR3 = pfnWriteCallback;
1404 pRange->pfnFillCallbackR3 = pfnFillCallback;
1405
1406 //pRange->pvUserR0 = NIL_RTR0PTR;
1407 //pRange->pDevInsR0 = NIL_RTR0PTR;
1408 //pRange->pfnReadCallbackR0 = NIL_RTR0PTR;
1409 //pRange->pfnWriteCallbackR0 = NIL_RTR0PTR;
1410 //pRange->pfnFillCallbackR0 = NIL_RTR0PTR;
1411
1412 //pRange->pvUserRC = NIL_RTRCPTR;
1413 //pRange->pDevInsRC = NIL_RTRCPTR;
1414 //pRange->pfnReadCallbackRC = NIL_RTRCPTR;
1415 //pRange->pfnWriteCallbackRC = NIL_RTRCPTR;
1416 //pRange->pfnFillCallbackRC = NIL_RTRCPTR;
1417
1418 /*
1419 * Try register it with PGM and then insert it into the tree.
1420 */
1421 rc = PGMR3PhysMMIORegister(pVM, GCPhysStart, cbRange,
1422 IOMR3MMIOHandler, pRange,
1423 pVM->iom.s.pfnMMIOHandlerR0, MMHyperR3ToR0(pVM, pRange),
1424 pVM->iom.s.pfnMMIOHandlerRC, MMHyperR3ToRC(pVM, pRange), pszDesc);
1425 if (RT_SUCCESS(rc))
1426 {
1427 if (RTAvlroGCPhysInsert(&pVM->iom.s.pTreesR3->MMIOTree, &pRange->Core))
1428 return VINF_SUCCESS;
1429
1430 DBGFR3Info(pVM, "mmio", NULL, NULL);
1431 AssertMsgFailed(("This cannot happen!\n"));
1432 rc = VERR_INTERNAL_ERROR;
1433 }
1434 MMHyperFree(pVM, pRange);
1435 }
1436
1437 return rc;
1438}
1439
1440
1441/**
1442 * Registers a Memory Mapped I/O RC handler range.
1443 *
1444 * This API is called by PDM on behalf of a device. Devices must first register ring-3 ranges
1445 * using IOMMMIORegisterR3() before calling this function.
1446 *
1447 *
1448 * @returns VBox status code.
1449 *
1450 * @param pVM VM handle.
1451 * @param pDevIns PDM device instance owning the MMIO range.
1452 * @param GCPhysStart First physical address in the range.
1453 * @param cbRange The size of the range (in bytes).
1454 * @param pvUser User argument for the callbacks.
1455 * @param pfnWriteCallback Pointer to function which is gonna handle Write operations.
1456 * @param pfnReadCallback Pointer to function which is gonna handle Read operations.
1457 * @param pfnFillCallback Pointer to function which is gonna handle Fill/memset operations.
1458 */
1459IOMR3DECL(int) IOMR3MMIORegisterRC(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTGCPTR pvUser,
1460 RCPTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback, RCPTRTYPE(PFNIOMMMIOREAD) pfnReadCallback,
1461 RCPTRTYPE(PFNIOMMMIOFILL) pfnFillCallback)
1462{
1463 LogFlow(("IOMR3MMIORegisterRC: pDevIns=%p GCPhysStart=%VGp cbRange=%#x pvUser=%VGv pfnWriteCallback=%#x pfnReadCallback=%#x pfnFillCallback=%#x\n",
1464 pDevIns, GCPhysStart, cbRange, pvUser, pfnWriteCallback, pfnReadCallback, pfnFillCallback));
1465
1466 /*
1467 * Validate input.
1468 */
1469 if (!pfnWriteCallback && !pfnReadCallback)
1470 {
1471 AssertMsgFailed(("No callbacks! %VGp LB%#x %s\n", GCPhysStart, cbRange));
1472 return VERR_INVALID_PARAMETER;
1473 }
1474
1475 /*
1476 * Find the MMIO range and check that the input matches.
1477 */
1478 PIOMMMIORANGE pRange = iomMMIOGetRange(&pVM->iom.s, GCPhysStart);
1479 AssertReturn(pRange, VERR_IOM_MMIO_RANGE_NOT_FOUND);
1480 AssertReturn(pRange->pDevInsR3 == pDevIns, VERR_IOM_NOT_MMIO_RANGE_OWNER);
1481 AssertReturn(pRange->GCPhys == GCPhysStart, VERR_IOM_INVALID_MMIO_RANGE);
1482 AssertReturn(pRange->cb == cbRange, VERR_IOM_INVALID_MMIO_RANGE);
1483
1484 pRange->pvUserRC = pvUser;
1485 pRange->pfnReadCallbackRC = pfnReadCallback;
1486 pRange->pfnWriteCallbackRC= pfnWriteCallback;
1487 pRange->pfnFillCallbackRC = pfnFillCallback;
1488 pRange->pDevInsRC = MMHyperCCToRC(pVM, pDevIns);
1489
1490 return VINF_SUCCESS;
1491}
1492
1493
1494/**
1495 * Registers a Memory Mapped I/O R0 handler range.
1496 *
1497 * This API is called by PDM on behalf of a device. Devices must first register ring-3 ranges
1498 * using IOMMR3MIORegisterHC() before calling this function.
1499 *
1500 *
1501 * @returns VBox status code.
1502 *
1503 * @param pVM VM handle.
1504 * @param pDevIns PDM device instance owning the MMIO range.
1505 * @param GCPhysStart First physical address in the range.
1506 * @param cbRange The size of the range (in bytes).
1507 * @param pvUser User argument for the callbacks.
1508 * @param pfnWriteCallback Pointer to function which is gonna handle Write operations.
1509 * @param pfnReadCallback Pointer to function which is gonna handle Read operations.
1510 * @param pfnFillCallback Pointer to function which is gonna handle Fill/memset operations.
1511 */
1512IOMR3DECL(int) IOMR3MMIORegisterR0(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange, RTR0PTR pvUser,
1513 R0PTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallback,
1514 R0PTRTYPE(PFNIOMMMIOREAD) pfnReadCallback,
1515 R0PTRTYPE(PFNIOMMMIOFILL) pfnFillCallback)
1516{
1517 LogFlow(("IOMR3MMIORegisterR0: pDevIns=%p GCPhysStart=%VGp cbRange=%#x pvUser=%VHv pfnWriteCallback=%#x pfnReadCallback=%#x pfnFillCallback=%#x\n",
1518 pDevIns, GCPhysStart, cbRange, pvUser, pfnWriteCallback, pfnReadCallback, pfnFillCallback));
1519
1520 /*
1521 * Validate input.
1522 */
1523 if (!pfnWriteCallback && !pfnReadCallback)
1524 {
1525 AssertMsgFailed(("No callbacks! %VGp LB%#x %s\n", GCPhysStart, cbRange));
1526 return VERR_INVALID_PARAMETER;
1527 }
1528
1529 /*
1530 * Find the MMIO range and check that the input matches.
1531 */
1532 PIOMMMIORANGE pRange = iomMMIOGetRange(&pVM->iom.s, GCPhysStart);
1533 AssertReturn(pRange, VERR_IOM_MMIO_RANGE_NOT_FOUND);
1534 AssertReturn(pRange->pDevInsR3 == pDevIns, VERR_IOM_NOT_MMIO_RANGE_OWNER);
1535 AssertReturn(pRange->GCPhys == GCPhysStart, VERR_IOM_INVALID_MMIO_RANGE);
1536 AssertReturn(pRange->cb == cbRange, VERR_IOM_INVALID_MMIO_RANGE);
1537
1538 pRange->pvUserR0 = pvUser;
1539 pRange->pfnReadCallbackR0 = pfnReadCallback;
1540 pRange->pfnWriteCallbackR0= pfnWriteCallback;
1541 pRange->pfnFillCallbackR0 = pfnFillCallback;
1542 pRange->pDevInsR0 = MMHyperCCToR0(pVM, pDevIns);
1543
1544 return VINF_SUCCESS;
1545}
1546
1547
1548/**
1549 * Deregisters a Memory Mapped I/O handler range.
1550 *
1551 * Registered GC, R0, and R3 ranges are affected.
1552 *
1553 * @returns VBox status code.
1554 *
1555 * @param pVM The virtual machine.
1556 * @param pDevIns Device instance which the MMIO region is registered.
1557 * @param GCPhysStart First physical address (GC) in the range.
1558 * @param cbRange Number of bytes to deregister.
1559 *
1560 * @remark This function mainly for PCI PnP Config and will not do
1561 * all the checks you might expect it to do.
1562 */
1563IOMR3DECL(int) IOMR3MMIODeregister(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTUINT cbRange)
1564{
1565 LogFlow(("IOMR3MMIODeregister: pDevIns=%p GCPhysStart=%VGp cbRange=%#x\n", pDevIns, GCPhysStart, cbRange));
1566
1567 /*
1568 * Validate input.
1569 */
1570 RTGCPHYS GCPhysLast = GCPhysStart + (cbRange - 1);
1571 if (GCPhysLast < GCPhysStart)
1572 {
1573 AssertMsgFailed(("Wrapped! %#x LB%#x\n", GCPhysStart, cbRange));
1574 return VERR_IOM_INVALID_MMIO_RANGE;
1575 }
1576
1577 /*
1578 * Check ownership and such for the entire area.
1579 */
1580 RTGCPHYS GCPhys = GCPhysStart;
1581 while (GCPhys <= GCPhysLast && GCPhys >= GCPhysStart)
1582 {
1583 PIOMMMIORANGE pRange = iomMMIOGetRange(&pVM->iom.s, GCPhys);
1584 if (!pRange)
1585 return VERR_IOM_MMIO_RANGE_NOT_FOUND;
1586 AssertMsgReturn(pRange->pDevInsR3 == pDevIns,
1587 ("Not owner! GCPhys=%VGp %VGp LB%#x %s\n", GCPhys, GCPhysStart, cbRange, pRange->pszDesc),
1588 VERR_IOM_NOT_MMIO_RANGE_OWNER);
1589 AssertMsgReturn(pRange->Core.KeyLast <= GCPhysLast,
1590 ("Incomplete R3 range! GCPhys=%VGp %VGp LB%#x %s\n", GCPhys, GCPhysStart, cbRange, pRange->pszDesc),
1591 VERR_IOM_INCOMPLETE_MMIO_RANGE);
1592
1593 /* next */
1594 Assert(GCPhys <= pRange->Core.KeyLast);
1595 GCPhys = pRange->Core.KeyLast + 1;
1596 }
1597
1598 /*
1599 * Do the actual removing of the MMIO ranges.
1600 */
1601 GCPhys = GCPhysStart;
1602 while (GCPhys <= GCPhysLast && GCPhys >= GCPhysStart)
1603 {
1604 PIOMMMIORANGE pRange = (PIOMMMIORANGE)RTAvlroGCPhysRemove(&pVM->iom.s.pTreesR3->MMIOTree, GCPhys);
1605 Assert(pRange);
1606 Assert(pRange->Core.Key == GCPhys && pRange->Core.KeyLast <= GCPhysLast);
1607
1608 /* remove it from PGM */
1609 int rc = PGMR3PhysMMIODeregister(pVM, GCPhys, pRange->cb);
1610 AssertRC(rc);
1611
1612 /* advance and free. */
1613 GCPhys = pRange->Core.KeyLast + 1;
1614 MMHyperFree(pVM, pRange);
1615 }
1616
1617 iomR3FlushCache(pVM);
1618 return VINF_SUCCESS;
1619}
1620
1621
1622/**
1623 * Display a single MMIO range.
1624 *
1625 * @returns 0
1626 * @param pNode Pointer to MMIO R3 range.
1627 * @param pvUser Pointer to info output callback structure.
1628 */
1629static DECLCALLBACK(int) iomR3MMIOInfoOne(PAVLROGCPHYSNODECORE pNode, void *pvUser)
1630{
1631 PIOMMMIORANGE pRange = (PIOMMMIORANGE)pNode;
1632 PCDBGFINFOHLP pHlp = (PCDBGFINFOHLP)pvUser;
1633 pHlp->pfnPrintf(pHlp,
1634 "%RGp-%RGp %RHv %RHv %RHv %RHv %RHv %s\n",
1635 pRange->Core.Key,
1636 pRange->Core.KeyLast,
1637 pRange->pDevInsR3,
1638 pRange->pfnReadCallbackR3,
1639 pRange->pfnWriteCallbackR3,
1640 pRange->pfnFillCallbackR3,
1641 pRange->pvUserR3,
1642 pRange->pszDesc);
1643 pHlp->pfnPrintf(pHlp,
1644 "%*s %RHv %RHv %RHv %RHv %RHv\n",
1645 sizeof(RTGCPHYS) * 2 * 2 + 1, "R0",
1646 pRange->pDevInsR0,
1647 pRange->pfnReadCallbackR0,
1648 pRange->pfnWriteCallbackR0,
1649 pRange->pfnFillCallbackR0,
1650 pRange->pvUserR0);
1651 pHlp->pfnPrintf(pHlp,
1652 "%*s %RRv %RRv %RRv %RRv %RRv\n",
1653 sizeof(RTGCPHYS) * 2 * 2 + 1, "RC",
1654 pRange->pDevInsRC,
1655 pRange->pfnReadCallbackRC,
1656 pRange->pfnWriteCallbackRC,
1657 pRange->pfnFillCallbackRC,
1658 pRange->pvUserRC);
1659 return 0;
1660}
1661
1662
1663/**
1664 * Display registered MMIO ranges to the log.
1665 *
1666 * @param pVM VM Handle.
1667 * @param pHlp The info helpers.
1668 * @param pszArgs Arguments, ignored.
1669 */
1670static DECLCALLBACK(void) iomR3MMIOInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs)
1671{
1672 NOREF(pszArgs);
1673 pHlp->pfnPrintf(pHlp,
1674 "MMIO ranges (pVM=%p)\n"
1675 "%.*s %.*s %.*s %.*s %.*s %.*s %s\n",
1676 pVM,
1677 sizeof(RTGCPHYS) * 4 + 1, "GC Phys Range ",
1678 sizeof(RTHCPTR) * 2, "pDevIns ",
1679 sizeof(RTHCPTR) * 2, "Read ",
1680 sizeof(RTHCPTR) * 2, "Write ",
1681 sizeof(RTHCPTR) * 2, "Fill ",
1682 sizeof(RTHCPTR) * 2, "pvUser ",
1683 "Description");
1684 RTAvlroGCPhysDoWithAll(&pVM->iom.s.pTreesR3->MMIOTree, true, iomR3MMIOInfoOne, (void *)pHlp);
1685}
1686
1687
1688#ifdef VBOX_WITH_STATISTICS
1689/**
1690 * Tries to come up with the standard name for a port.
1691 *
1692 * @returns Pointer to readonly string if known.
1693 * @returns NULL if unknown port number.
1694 *
1695 * @param Port The port to name.
1696 */
1697static const char *iomR3IOPortGetStandardName(RTIOPORT Port)
1698{
1699 switch (Port)
1700 {
1701 case 0x00: case 0x10: case 0x20: case 0x30: case 0x40: case 0x50: case 0x70:
1702 case 0x01: case 0x11: case 0x21: case 0x31: case 0x41: case 0x51: case 0x61: case 0x71:
1703 case 0x02: case 0x12: case 0x22: case 0x32: case 0x42: case 0x52: case 0x62: case 0x72:
1704 case 0x03: case 0x13: case 0x23: case 0x33: case 0x43: case 0x53: case 0x63: case 0x73:
1705 case 0x04: case 0x14: case 0x24: case 0x34: case 0x44: case 0x54: case 0x74:
1706 case 0x05: case 0x15: case 0x25: case 0x35: case 0x45: case 0x55: case 0x65: case 0x75:
1707 case 0x06: case 0x16: case 0x26: case 0x36: case 0x46: case 0x56: case 0x66: case 0x76:
1708 case 0x07: case 0x17: case 0x27: case 0x37: case 0x47: case 0x57: case 0x67: case 0x77:
1709 case 0x08: case 0x18: case 0x28: case 0x38: case 0x48: case 0x58: case 0x68: case 0x78:
1710 case 0x09: case 0x19: case 0x29: case 0x39: case 0x49: case 0x59: case 0x69: case 0x79:
1711 case 0x0a: case 0x1a: case 0x2a: case 0x3a: case 0x4a: case 0x5a: case 0x6a: case 0x7a:
1712 case 0x0b: case 0x1b: case 0x2b: case 0x3b: case 0x4b: case 0x5b: case 0x6b: case 0x7b:
1713 case 0x0c: case 0x1c: case 0x2c: case 0x3c: case 0x4c: case 0x5c: case 0x6c: case 0x7c:
1714 case 0x0d: case 0x1d: case 0x2d: case 0x3d: case 0x4d: case 0x5d: case 0x6d: case 0x7d:
1715 case 0x0e: case 0x1e: case 0x2e: case 0x3e: case 0x4e: case 0x5e: case 0x6e: case 0x7e:
1716 case 0x0f: case 0x1f: case 0x2f: case 0x3f: case 0x4f: case 0x5f: case 0x6f: case 0x7f:
1717
1718 case 0x80: case 0x90: case 0xa0: case 0xb0: case 0xc0: case 0xd0: case 0xe0: case 0xf0:
1719 case 0x81: case 0x91: case 0xa1: case 0xb1: case 0xc1: case 0xd1: case 0xe1: case 0xf1:
1720 case 0x82: case 0x92: case 0xa2: case 0xb2: case 0xc2: case 0xd2: case 0xe2: case 0xf2:
1721 case 0x83: case 0x93: case 0xa3: case 0xb3: case 0xc3: case 0xd3: case 0xe3: case 0xf3:
1722 case 0x84: case 0x94: case 0xa4: case 0xb4: case 0xc4: case 0xd4: case 0xe4: case 0xf4:
1723 case 0x85: case 0x95: case 0xa5: case 0xb5: case 0xc5: case 0xd5: case 0xe5: case 0xf5:
1724 case 0x86: case 0x96: case 0xa6: case 0xb6: case 0xc6: case 0xd6: case 0xe6: case 0xf6:
1725 case 0x87: case 0x97: case 0xa7: case 0xb7: case 0xc7: case 0xd7: case 0xe7: case 0xf7:
1726 case 0x88: case 0x98: case 0xa8: case 0xb8: case 0xc8: case 0xd8: case 0xe8: case 0xf8:
1727 case 0x89: case 0x99: case 0xa9: case 0xb9: case 0xc9: case 0xd9: case 0xe9: case 0xf9:
1728 case 0x8a: case 0x9a: case 0xaa: case 0xba: case 0xca: case 0xda: case 0xea: case 0xfa:
1729 case 0x8b: case 0x9b: case 0xab: case 0xbb: case 0xcb: case 0xdb: case 0xeb: case 0xfb:
1730 case 0x8c: case 0x9c: case 0xac: case 0xbc: case 0xcc: case 0xdc: case 0xec: case 0xfc:
1731 case 0x8d: case 0x9d: case 0xad: case 0xbd: case 0xcd: case 0xdd: case 0xed: case 0xfd:
1732 case 0x8e: case 0x9e: case 0xae: case 0xbe: case 0xce: case 0xde: case 0xee: case 0xfe:
1733 case 0x8f: case 0x9f: case 0xaf: case 0xbf: case 0xcf: case 0xdf: case 0xef: case 0xff:
1734 return "System Reserved";
1735
1736 case 0x60:
1737 case 0x64:
1738 return "Keyboard & Mouse";
1739
1740 case 0x378:
1741 case 0x379:
1742 case 0x37a:
1743 case 0x37b:
1744 case 0x37c:
1745 case 0x37d:
1746 case 0x37e:
1747 case 0x37f:
1748 case 0x3bc:
1749 case 0x3bd:
1750 case 0x3be:
1751 case 0x3bf:
1752 case 0x278:
1753 case 0x279:
1754 case 0x27a:
1755 case 0x27b:
1756 case 0x27c:
1757 case 0x27d:
1758 case 0x27e:
1759 case 0x27f:
1760 return "LPT1/2/3";
1761
1762 case 0x3f8:
1763 case 0x3f9:
1764 case 0x3fa:
1765 case 0x3fb:
1766 case 0x3fc:
1767 case 0x3fd:
1768 case 0x3fe:
1769 case 0x3ff:
1770 return "COM1";
1771
1772 case 0x2f8:
1773 case 0x2f9:
1774 case 0x2fa:
1775 case 0x2fb:
1776 case 0x2fc:
1777 case 0x2fd:
1778 case 0x2fe:
1779 case 0x2ff:
1780 return "COM2";
1781
1782 case 0x3e8:
1783 case 0x3e9:
1784 case 0x3ea:
1785 case 0x3eb:
1786 case 0x3ec:
1787 case 0x3ed:
1788 case 0x3ee:
1789 case 0x3ef:
1790 return "COM3";
1791
1792 case 0x2e8:
1793 case 0x2e9:
1794 case 0x2ea:
1795 case 0x2eb:
1796 case 0x2ec:
1797 case 0x2ed:
1798 case 0x2ee:
1799 case 0x2ef:
1800 return "COM4";
1801
1802 case 0x200:
1803 case 0x201:
1804 case 0x202:
1805 case 0x203:
1806 case 0x204:
1807 case 0x205:
1808 case 0x206:
1809 case 0x207:
1810 return "Joystick";
1811
1812 case 0x3f0:
1813 case 0x3f1:
1814 case 0x3f2:
1815 case 0x3f3:
1816 case 0x3f4:
1817 case 0x3f5:
1818 case 0x3f6:
1819 case 0x3f7:
1820 return "Floppy";
1821
1822 case 0x1f0:
1823 case 0x1f1:
1824 case 0x1f2:
1825 case 0x1f3:
1826 case 0x1f4:
1827 case 0x1f5:
1828 case 0x1f6:
1829 case 0x1f7:
1830 //case 0x3f6:
1831 //case 0x3f7:
1832 return "IDE 1st";
1833
1834 case 0x170:
1835 case 0x171:
1836 case 0x172:
1837 case 0x173:
1838 case 0x174:
1839 case 0x175:
1840 case 0x176:
1841 case 0x177:
1842 case 0x376:
1843 case 0x377:
1844 return "IDE 2nd";
1845
1846 case 0x1e0:
1847 case 0x1e1:
1848 case 0x1e2:
1849 case 0x1e3:
1850 case 0x1e4:
1851 case 0x1e5:
1852 case 0x1e6:
1853 case 0x1e7:
1854 case 0x3e6:
1855 case 0x3e7:
1856 return "IDE 3rd";
1857
1858 case 0x160:
1859 case 0x161:
1860 case 0x162:
1861 case 0x163:
1862 case 0x164:
1863 case 0x165:
1864 case 0x166:
1865 case 0x167:
1866 case 0x366:
1867 case 0x367:
1868 return "IDE 4th";
1869
1870 case 0x130: case 0x140: case 0x150:
1871 case 0x131: case 0x141: case 0x151:
1872 case 0x132: case 0x142: case 0x152:
1873 case 0x133: case 0x143: case 0x153:
1874 case 0x134: case 0x144: case 0x154:
1875 case 0x135: case 0x145: case 0x155:
1876 case 0x136: case 0x146: case 0x156:
1877 case 0x137: case 0x147: case 0x157:
1878 case 0x138: case 0x148: case 0x158:
1879 case 0x139: case 0x149: case 0x159:
1880 case 0x13a: case 0x14a: case 0x15a:
1881 case 0x13b: case 0x14b: case 0x15b:
1882 case 0x13c: case 0x14c: case 0x15c:
1883 case 0x13d: case 0x14d: case 0x15d:
1884 case 0x13e: case 0x14e: case 0x15e:
1885 case 0x13f: case 0x14f: case 0x15f:
1886 case 0x220: case 0x230:
1887 case 0x221: case 0x231:
1888 case 0x222: case 0x232:
1889 case 0x223: case 0x233:
1890 case 0x224: case 0x234:
1891 case 0x225: case 0x235:
1892 case 0x226: case 0x236:
1893 case 0x227: case 0x237:
1894 case 0x228: case 0x238:
1895 case 0x229: case 0x239:
1896 case 0x22a: case 0x23a:
1897 case 0x22b: case 0x23b:
1898 case 0x22c: case 0x23c:
1899 case 0x22d: case 0x23d:
1900 case 0x22e: case 0x23e:
1901 case 0x22f: case 0x23f:
1902 case 0x330: case 0x340: case 0x350:
1903 case 0x331: case 0x341: case 0x351:
1904 case 0x332: case 0x342: case 0x352:
1905 case 0x333: case 0x343: case 0x353:
1906 case 0x334: case 0x344: case 0x354:
1907 case 0x335: case 0x345: case 0x355:
1908 case 0x336: case 0x346: case 0x356:
1909 case 0x337: case 0x347: case 0x357:
1910 case 0x338: case 0x348: case 0x358:
1911 case 0x339: case 0x349: case 0x359:
1912 case 0x33a: case 0x34a: case 0x35a:
1913 case 0x33b: case 0x34b: case 0x35b:
1914 case 0x33c: case 0x34c: case 0x35c:
1915 case 0x33d: case 0x34d: case 0x35d:
1916 case 0x33e: case 0x34e: case 0x35e:
1917 case 0x33f: case 0x34f: case 0x35f:
1918 return "SCSI (typically)";
1919
1920 case 0x320:
1921 case 0x321:
1922 case 0x322:
1923 case 0x323:
1924 case 0x324:
1925 case 0x325:
1926 case 0x326:
1927 case 0x327:
1928 return "XT HD";
1929
1930 case 0x3b0:
1931 case 0x3b1:
1932 case 0x3b2:
1933 case 0x3b3:
1934 case 0x3b4:
1935 case 0x3b5:
1936 case 0x3b6:
1937 case 0x3b7:
1938 case 0x3b8:
1939 case 0x3b9:
1940 case 0x3ba:
1941 case 0x3bb:
1942 return "VGA";
1943
1944 case 0x3c0: case 0x3d0:
1945 case 0x3c1: case 0x3d1:
1946 case 0x3c2: case 0x3d2:
1947 case 0x3c3: case 0x3d3:
1948 case 0x3c4: case 0x3d4:
1949 case 0x3c5: case 0x3d5:
1950 case 0x3c6: case 0x3d6:
1951 case 0x3c7: case 0x3d7:
1952 case 0x3c8: case 0x3d8:
1953 case 0x3c9: case 0x3d9:
1954 case 0x3ca: case 0x3da:
1955 case 0x3cb: case 0x3db:
1956 case 0x3cc: case 0x3dc:
1957 case 0x3cd: case 0x3dd:
1958 case 0x3ce: case 0x3de:
1959 case 0x3cf: case 0x3df:
1960 return "VGA/EGA";
1961
1962 case 0x240: case 0x260: case 0x280:
1963 case 0x241: case 0x261: case 0x281:
1964 case 0x242: case 0x262: case 0x282:
1965 case 0x243: case 0x263: case 0x283:
1966 case 0x244: case 0x264: case 0x284:
1967 case 0x245: case 0x265: case 0x285:
1968 case 0x246: case 0x266: case 0x286:
1969 case 0x247: case 0x267: case 0x287:
1970 case 0x248: case 0x268: case 0x288:
1971 case 0x249: case 0x269: case 0x289:
1972 case 0x24a: case 0x26a: case 0x28a:
1973 case 0x24b: case 0x26b: case 0x28b:
1974 case 0x24c: case 0x26c: case 0x28c:
1975 case 0x24d: case 0x26d: case 0x28d:
1976 case 0x24e: case 0x26e: case 0x28e:
1977 case 0x24f: case 0x26f: case 0x28f:
1978 case 0x300:
1979 case 0x301:
1980 case 0x388:
1981 case 0x389:
1982 case 0x38a:
1983 case 0x38b:
1984 return "Sound Card (typically)";
1985
1986 default:
1987 return NULL;
1988 }
1989}
1990#endif /* VBOX_WITH_STATISTICS */
1991
Note: See TracBrowser for help on using the repository browser.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette