VirtualBox

source: vbox/trunk/src/VBox/VMM/HWACCMInternal.h@ 4071

Last change on this file since 4071 was 4071, checked in by vboxsync, 17 years ago

Biggest check-in ever. New source code headers for all (C) innotek files.
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1/* $Id: HWACCMInternal.h 4071 2007-08-07 17:07:59Z vboxsync $ */
2/** @file
3 * HWACCM - Internal header file.
4 */
5
6/*
7 * Copyright (C) 2006-2007 innotek GmbH
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License as published by the Free Software Foundation,
13 * in version 2 as it comes in the "COPYING" file of the VirtualBox OSE
14 * distribution. VirtualBox OSE is distributed in the hope that it will
15 * be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18#ifndef ___HWACCMInternal_h
19#define ___HWACCMInternal_h
20
21#include <VBox/cdefs.h>
22#include <VBox/types.h>
23#include <VBox/em.h>
24#include <VBox/stam.h>
25#include <VBox/dis.h>
26#include <VBox/hwaccm.h>
27#include <VBox/pgm.h>
28
29__BEGIN_DECLS
30
31
32/** @defgroup grp_hwaccm_int Internal
33 * @ingroup grp_hwaccm
34 * @internal
35 * @{
36 */
37
38
39/**
40 * Converts a HWACCM pointer into a VM pointer.
41 * @returns Pointer to the VM structure the EM is part of.
42 * @param pHWACCM Pointer to HWACCM instance data.
43 */
44#define HWACCM2VM(pHWACCM) ( (PVM)((char*)pHWACCM - pHWACCM->offVM) )
45
46/** Maximum number of exit reason statistics counters. */
47#define MAX_EXITREASON_STAT 0x100
48#define MASK_EXITREASON_STAT 0xff
49
50/** @name Changed flags
51 * These flags are used to keep track of which important registers that
52 * have been changed since last they were reset.
53 * @{
54 */
55#define HWACCM_CHANGED_GUEST_FPU BIT(0)
56#define HWACCM_CHANGED_GUEST_CR0 BIT(1)
57#define HWACCM_CHANGED_GUEST_CR3 BIT(2)
58#define HWACCM_CHANGED_GUEST_CR4 BIT(3)
59#define HWACCM_CHANGED_GUEST_GDTR BIT(4)
60#define HWACCM_CHANGED_GUEST_IDTR BIT(5)
61#define HWACCM_CHANGED_GUEST_LDTR BIT(6)
62#define HWACCM_CHANGED_GUEST_TR BIT(7)
63#define HWACCM_CHANGED_GUEST_SYSENTER_MSR BIT(8)
64#define HWACCM_CHANGED_GUEST_SEGMENT_REGS BIT(9)
65#define HWACCM_CHANGED_GUEST_DEBUG BIT(10)
66#define HWACCM_CHANGED_HOST_CONTEXT BIT(11)
67
68#define HWACCM_CHANGED_ALL ( HWACCM_CHANGED_GUEST_SEGMENT_REGS \
69 | HWACCM_CHANGED_GUEST_CR0 \
70 | HWACCM_CHANGED_GUEST_CR3 \
71 | HWACCM_CHANGED_GUEST_CR4 \
72 | HWACCM_CHANGED_GUEST_GDTR \
73 | HWACCM_CHANGED_GUEST_IDTR \
74 | HWACCM_CHANGED_GUEST_LDTR \
75 | HWACCM_CHANGED_GUEST_TR \
76 | HWACCM_CHANGED_GUEST_SYSENTER_MSR \
77 | HWACCM_CHANGED_GUEST_FPU \
78 | HWACCM_CHANGED_GUEST_DEBUG \
79 | HWACCM_CHANGED_HOST_CONTEXT)
80
81#define HWACCM_CHANGED_ALL_GUEST ( HWACCM_CHANGED_GUEST_SEGMENT_REGS \
82 | HWACCM_CHANGED_GUEST_CR0 \
83 | HWACCM_CHANGED_GUEST_CR3 \
84 | HWACCM_CHANGED_GUEST_CR4 \
85 | HWACCM_CHANGED_GUEST_GDTR \
86 | HWACCM_CHANGED_GUEST_IDTR \
87 | HWACCM_CHANGED_GUEST_LDTR \
88 | HWACCM_CHANGED_GUEST_TR \
89 | HWACCM_CHANGED_GUEST_SYSENTER_MSR \
90 | HWACCM_CHANGED_GUEST_DEBUG \
91 | HWACCM_CHANGED_GUEST_FPU)
92
93/** @} */
94
95/** @name Intercepted traps
96 * Traps that need to be intercepted so we can correctly dispatch them to the guest if required.
97 * Currently #NM and #PF only
98 */
99#ifdef VBOX_STRICT
100#define HWACCM_VMX_TRAP_MASK BIT(0) | BIT(7) | BIT(14) | BIT(6) | BIT(11) | BIT(12) | BIT(13) | BIT(16)
101#define HWACCM_SVM_TRAP_MASK HWACCM_VMX_TRAP_MASK
102#else
103#define HWACCM_VMX_TRAP_MASK BIT(7) | BIT(14)
104#define HWACCM_SVM_TRAP_MASK HWACCM_VMX_TRAP_MASK
105#endif
106/** @} */
107
108
109/** @name HWACCM SSM version
110 */
111#define HWACCM_SSM_VERSION 3
112
113/**
114 * HWACCM VM Instance data.
115 * Changes to this must checked against the padding of the cfgm union in VM!
116 */
117typedef struct HWACCM
118{
119 /** Offset to the VM structure.
120 * See HWACCM2VM(). */
121 RTUINT offVM;
122
123 /** Set when we've initialized VMX or SVM. */
124 bool fInitialized;
125 /** Set when we're using VMX/SVN at that moment. */
126 bool fActive;
127
128 /** Set when hardware acceleration is allowed. */
129 bool fAllowed;
130
131 /** HWACCM_CHANGED_* flags. */
132 uint32_t fContextUseFlags;
133
134 /** Old style FPU reporting trap mask override performed (optimization) */
135 uint32_t fFPUOldStyleOverride;
136
137 struct
138 {
139 /** Set by the ring-0 driver to indicate VMX is supported by the CPU. */
140 bool fSupported;
141
142 /** Set when we've enabled VMX. */
143 bool fEnabled;
144
145 /** Set if we can use VMXResume to execute guest code. */
146 bool fResumeVM;
147
148 /** Physical address of the VM control structure (VMCS). */
149 RTHCPHYS pVMCSPhys;
150 /** Virtual address of the VM control structure (VMCS). */
151 void *pVMCS;
152
153 /** Physical address of the VMXON page. */
154 RTHCPHYS pVMXONPhys;
155 /** Virtual address of the VMXON page. */
156 void *pVMXON;
157
158 /** Physical address of the TSS page used for real mode emulation. */
159 RTHCPHYS pRealModeTSSPhys;
160 /** Virtual address of the TSS page used for real mode emulation. */
161 PVBOXTSS pRealModeTSS;
162
163 /** Host CR4 value (set by ring-0 VMX init) */
164 uint32_t hostCR4;
165
166 /** Current VMX_VMCS_CTRL_PROC_EXEC_CONTROLS. */
167 uint64_t proc_ctls;
168
169 /** Current CR0 mask. */
170 uint64_t cr0_mask;
171 /** Current CR4 mask. */
172 uint64_t cr4_mask;
173
174 /** VMX MSR values */
175 struct
176 {
177 uint64_t feature_ctrl;
178 uint64_t vmx_basic_info;
179 uint64_t vmx_pin_ctls;
180 uint64_t vmx_proc_ctls;
181 uint64_t vmx_exit;
182 uint64_t vmx_entry;
183 uint64_t vmx_misc;
184 uint64_t vmx_cr0_fixed0;
185 uint64_t vmx_cr0_fixed1;
186 uint64_t vmx_cr4_fixed0;
187 uint64_t vmx_cr4_fixed1;
188 uint64_t vmx_vmcs_enum;
189 } msr;
190
191 /* Last instruction error */
192 uint32_t ulLastInstrError;
193 } vmx;
194
195 struct
196 {
197 /** Set by the ring-0 driver to indicate SVM is supported by the CPU. */
198 bool fSupported;
199
200 /** Set when we've enabled SVM. */
201 bool fEnabled;
202
203 /** Set if we don't have to flush the TLB on VM entry. */
204 bool fResumeVM;
205
206 /** Physical address of the VM control block (VMCB). */
207 RTHCPHYS pVMCBPhys;
208 /** Virtual address of the VM control block (VMCB). */
209 void *pVMCB;
210
211 /** Physical address of the host VM control block (VMCB). */
212 RTHCPHYS pVMCBHostPhys;
213 /** Virtual address of the host VM control block (VMCB). */
214 void *pVMCBHost;
215
216 /** Physical address of the Host State page. */
217 RTHCPHYS pHStatePhys;
218 /** Virtual address of the Host State page. */
219 void *pHState;
220
221 /** Physical address of the IO bitmap (12kb). */
222 RTHCPHYS pIOBitmapPhys;
223 /** Virtual address of the IO bitmap. */
224 void *pIOBitmap;
225
226 /** Physical address of the MSR bitmap (8kb). */
227 RTHCPHYS pMSRBitmapPhys;
228 /** Virtual address of the MSR bitmap. */
229 void *pMSRBitmap;
230
231 /** SVM revision. */
232 uint32_t u32Rev;
233
234 /** Maximum ASID allowed. */
235 uint32_t u32MaxASID;
236 } svm;
237
238 struct
239 {
240 uint32_t u32AMDFeatureECX;
241 uint32_t u32AMDFeatureEDX;
242 } cpuid;
243
244 /* Event injection state. */
245 struct
246 {
247 uint32_t fPending;
248 uint32_t errCode;
249 uint64_t intInfo;
250 } Event;
251
252 /** Saved error from detection */
253 int32_t lLastError;
254
255 /** HWACCMR0Init was run */
256 bool fHWACCMR0Init;
257
258 /** Currenty shadow paging mode. */
259 PGMMODE enmShadowMode;
260
261 STAMPROFILEADV StatEntry;
262 STAMPROFILEADV StatExit;
263 STAMPROFILEADV StatInGC;
264
265 STAMCOUNTER StatIntInject;
266
267 STAMCOUNTER StatExitShadowNM;
268 STAMCOUNTER StatExitGuestNM;
269 STAMCOUNTER StatExitShadowPF;
270 STAMCOUNTER StatExitGuestPF;
271 STAMCOUNTER StatExitGuestUD;
272 STAMCOUNTER StatExitGuestSS;
273 STAMCOUNTER StatExitGuestNP;
274 STAMCOUNTER StatExitGuestGP;
275 STAMCOUNTER StatExitGuestDE;
276 STAMCOUNTER StatExitGuestMF;
277 STAMCOUNTER StatExitInvpg;
278 STAMCOUNTER StatExitInvd;
279 STAMCOUNTER StatExitCpuid;
280 STAMCOUNTER StatExitRdtsc;
281 STAMCOUNTER StatExitCRxWrite;
282 STAMCOUNTER StatExitCRxRead;
283 STAMCOUNTER StatExitDRxWrite;
284 STAMCOUNTER StatExitDRxRead;
285 STAMCOUNTER StatExitCLTS;
286 STAMCOUNTER StatExitLMSW;
287 STAMCOUNTER StatExitIOWrite;
288 STAMCOUNTER StatExitIORead;
289 STAMCOUNTER StatExitIOStringWrite;
290 STAMCOUNTER StatExitIOStringRead;
291 STAMCOUNTER StatExitIrqWindow;
292 STAMCOUNTER StatIntReinject;
293 STAMCOUNTER StatPendingHostIrq;
294
295 STAMCOUNTER StatSwitchGuestIrq;
296 STAMCOUNTER StatSwitchToR3;
297
298 R3PTRTYPE(PSTAMCOUNTER) pStatExitReason;
299 R0PTRTYPE(PSTAMCOUNTER) pStatExitReasonR0;
300} HWACCM;
301/** Pointer to HWACCM VM instance data. */
302typedef HWACCM *PHWACCM;
303
304
305#ifdef IN_RING0
306
307#ifdef VBOX_STRICT
308HWACCMR0DECL(void) HWACCMDumpRegs(PCPUMCTX pCtx);
309HWACCMR0DECL(void) HWACCMR0DumpDescriptor(PX86DESCHC Desc, RTSEL Sel, const char *pszMsg);
310#else
311#define HWACCMDumpRegs(a) do { } while (0)
312#define HWACCMR0DumpDescriptor(a, b, c) do { } while (0)
313#endif
314
315#endif
316
317/** @} */
318
319__END_DECLS
320
321#endif
322
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