DBGFDisas.cpp@ 7136

Last change on this file since 7136 was 7136, checked in by vboxsync, 17 years ago
include cpum.h.
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1	/* $Id: DBGFDisas.cpp 7136 2008-02-25 18:31:48Z vboxsync $ */
2	/** @file
3	* VMM DBGF - Debugger Facility, Disassembler.
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 innotek GmbH
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18
19	/*******************************************************************************
20	* Header Files *
21	*******************************************************************************/
22	#define LOG_GROUP LOG_GROUP_DBGF
23	#include <VBox/dbgf.h>
24	#include <VBox/selm.h>
25	#include <VBox/mm.h>
26	#include <VBox/pgm.h>
27	#include <VBox/cpum.h>
28	#include "DBGFInternal.h"
29	#include <VBox/dis.h>
30	#include <VBox/err.h>
31	#include <VBox/param.h>
32
33	#include <VBox/log.h>
34	#include <iprt/assert.h>
35	#include <iprt/string.h>
36	#include <iprt/alloca.h>
37	#include <iprt/ctype.h>
38
39
40	/*******************************************************************************
41	* Internal Functions *
42	*******************************************************************************/
43	static DECLCALLBACK(int) dbgfR3DisasInstrRead(RTHCUINTPTR pSrc, uint8_t pDest, uint32_t size, void pvUserdata);
44
45
46	/**
47	* Structure used when disassembling and instructions in DBGF.
48	* This is used so the reader function can get the stuff it needs.
49	*/
50	typedef struct
51	{
52	/** The core structure. */
53	DISCPUSTATE Cpu;
54	/** The VM handle. */
55	PVM pVM;
56	/** Pointer to the first byte in the segemnt. */
57	RTGCUINTPTR GCPtrSegBase;
58	/** Pointer to the byte after the end of the segment. (might have wrapped!) */
59	RTGCUINTPTR GCPtrSegEnd;
60	/** The size of the segment minus 1. */
61	RTGCUINTPTR cbSegLimit;
62	/** The guest paging mode. */
63	PGMMODE enmMode;
64	/** Pointer to the current page - HC Ptr. */
65	void const *pvPageHC;
66	/** Pointer to the current page - GC Ptr. */
67	RTGCPTR pvPageGC;
68	/** Pointer to the next instruction (relative to GCPtrSegBase). */
69	RTGCUINTPTR GCPtrNext;
70	/** The lock information that PGMPhysReleasePageMappingLock needs. */
71	PGMPAGEMAPLOCK PageMapLock;
72	/** Whether the PageMapLock is valid or not. */
73	bool fLocked;
74	} DBGFDISASSTATE, *PDBGFDISASSTATE;
75
76
77
78	/**
79	* Calls the dissassembler with the proper reader functions and such for disa
80	*
81	* @returns VBox status code.
82	* @param pVM VM handle
83	* @param pSelInfo The selector info.
84	* @param enmMode The guest paging mode.
85	* @param GCPtr The GC pointer (selector offset).
86	* @param pState The disas CPU state.
87	*/
88	static int dbgfR3DisasInstrFirst(PVM pVM, PSELMSELINFO pSelInfo, PGMMODE enmMode, RTGCPTR GCPtr, PDBGFDISASSTATE pState)
89	{
90	pState->Cpu.mode = pSelInfo->Raw.Gen.u1DefBig ? CPUMODE_32BIT : CPUMODE_16BIT;
91	pState->Cpu.pfnReadBytes = dbgfR3DisasInstrRead;
92	pState->GCPtrSegBase = pSelInfo->GCPtrBase;
93	pState->GCPtrSegEnd = pSelInfo->cbLimit + 1 + (RTGCUINTPTR)pSelInfo->GCPtrBase;
94	pState->cbSegLimit = pSelInfo->cbLimit;
95	pState->enmMode = enmMode;
96	pState->pvPageGC = 0;
97	pState->pvPageHC = NULL;
98	pState->pVM = pVM;
99	pState->fLocked = false;
100	Assert((uintptr_t)GCPtr == GCPtr);
101	uint32_t cbInstr;
102	int rc = DISInstr(&pState->Cpu, GCPtr, 0, &cbInstr, NULL);
103	if (VBOX_SUCCESS(rc))
104	{
105	pState->GCPtrNext = GCPtr + cbInstr;
106	return VINF_SUCCESS;
107	}
108
109	/* cleanup */
110	if (pState->fLocked)
111	{
112	PGMPhysReleasePageMappingLock(pVM, &pState->PageMapLock);
113	pState->fLocked = false;
114	}
115	return rc;
116	}
117
118
119	#if 0
120	/**
121	* Calls the dissassembler for disassembling the next instruction.
122	*
123	* @returns VBox status code.
124	* @param pState The disas CPU state.
125	*/
126	static int dbgfR3DisasInstrNext(PDBGFDISASSTATE pState)
127	{
128	uint32_t cbInstr;
129	int rc = DISInstr(&pState->Cpu, (void *)pState->GCPtrNext, 0, &cbInstr, NULL);
130	if (VBOX_SUCCESS(rc))
131	{
132	pState->GCPtrNext = GCPtr + cbInstr;
133	return VINF_SUCCESS;
134	}
135	return rc;
136	}
137	#endif
138
139
140	/**
141	* Done with the dissassembler state, free associated resources.
142	*
143	* @param pState The disas CPU state ++.
144	*/
145	static void dbgfR3DisasInstrDone(PDBGFDISASSTATE pState)
146	{
147	if (pState->fLocked)
148	{
149	PGMPhysReleasePageMappingLock(pState->pVM, &pState->PageMapLock);
150	pState->fLocked = false;
151	}
152	}
153
154
155	/**
156	* Instruction reader.
157	*
158	* @returns VBox status code. (Why this is a int32_t and not just an int is also beyond me.)
159	* @param PtrSrc Address to read from.
160	* In our case this is relative to the selector pointed to by the 2nd user argument of uDisCpu.
161	* @param pu8Dst Where to store the bytes.
162	* @param cbRead Number of bytes to read.
163	* @param uDisCpu Pointer to the disassembler cpu state. (Why this is a VBOXHUINTPTR is beyond me...)
164	* In this context it's always pointer to the Core of a DBGFDISASSTATE.
165	*/
166	static DECLCALLBACK(int) dbgfR3DisasInstrRead(RTHCUINTPTR PtrSrc, uint8_t pu8Dst, uint32_t cbRead, void pvDisCpu)
167	{
168	PDBGFDISASSTATE pState = (PDBGFDISASSTATE)pvDisCpu;
169	Assert(cbRead > 0);
170	for (;;)
171	{
172	RTGCUINTPTR GCPtr = PtrSrc + pState->GCPtrSegBase;
173
174	/* Need to update the page translation? */
175	if ( !pState->pvPageHC
176	\|\| (GCPtr >> PAGE_SHIFT) != (pState->pvPageGC >> PAGE_SHIFT))
177	{
178	int rc = VINF_SUCCESS;
179
180	/* translate the address */
181	pState->pvPageGC = GCPtr & PAGE_BASE_GC_MASK;
182	if (MMHyperIsInsideArea(pState->pVM, pState->pvPageGC))
183	{
184	pState->pvPageHC = MMHyperGC2HC(pState->pVM, pState->pvPageGC);
185	if (!pState->pvPageHC)
186	rc = VERR_INVALID_POINTER;
187	}
188	else
189	{
190	if (pState->fLocked)
191	PGMPhysReleasePageMappingLock(pState->pVM, &pState->PageMapLock);
192
193	if (pState->enmMode <= PGMMODE_PROTECTED)
194	rc = PGMPhysGCPhys2CCPtrReadOnly(pState->pVM, pState->pvPageGC, &pState->pvPageHC, &pState->PageMapLock);
195	else
196	rc = PGMPhysGCPtr2CCPtrReadOnly(pState->pVM, pState->pvPageGC, &pState->pvPageHC, &pState->PageMapLock);
197	pState->fLocked = RT_SUCCESS_NP(rc);
198	}
199	if (VBOX_FAILURE(rc))
200	{
201	pState->pvPageHC = NULL;
202	return rc;
203	}
204	}
205
206	/* check the segemnt limit */
207	if (PtrSrc > pState->cbSegLimit)
208	return VERR_OUT_OF_SELECTOR_BOUNDS;
209
210	/* calc how much we can read */
211	uint32_t cb = PAGE_SIZE - (GCPtr & PAGE_OFFSET_MASK);
212	RTGCUINTPTR cbSeg = pState->GCPtrSegEnd - GCPtr;
213	if (cb > cbSeg && cbSeg)
214	cb = cbSeg;
215	if (cb > cbRead)
216	cb = cbRead;
217
218	/* read and advance */
219	memcpy(pu8Dst, (char *)pState->pvPageHC + (GCPtr & PAGE_OFFSET_MASK), cb);
220	cbRead -= cb;
221	if (!cbRead)
222	return VINF_SUCCESS;
223	pu8Dst += cb;
224	PtrSrc += cb;
225	}
226	}
227
228
229	/**
230	* Copy a string and return pointer to the terminator char in the copy.
231	*/
232	inline char mystrpcpy(char pszDst, const char *pszSrc)
233	{
234	size_t cch = strlen(pszSrc);
235	memcpy(pszDst, pszSrc, cch + 1);
236	return pszDst + cch;
237	}
238
239
240	/**
241	* Disassembles the one instruction according to the specified flags and address.
242	*
243	* @returns VBox status code.
244	* @param pVM VM handle.
245	* @param Sel The code selector. This used to determin the 32/16 bit ness and
246	* calculation of the actual instruction address.
247	* @param GCPtr The code address relative to the base of Sel.
248	* @param fFlags Flags controlling where to start and how to format.
249	* A combination of the DBGF_DISAS_FLAGS_* \#defines.
250	* @param pszOutput Output buffer.
251	* @param cchOutput Size of the output buffer.
252	* @param pcbInstr Where to return the size of the instruction.
253	*/
254	DBGFR3DECL(int) DBGFR3DisasInstrEx(PVM pVM, RTSEL Sel, RTGCPTR GCPtr, unsigned fFlags, char pszOutput, uint32_t cchOutput, uint32_t pcbInstr)
255	{
256	/*
257	* Get the Sel and GCPtr if fFlags requests that.
258	*/
259	PCCPUMCTXCORE pCtxCore = NULL;
260	CPUMSELREGHID *pHiddenSel = NULL;
261	int rc;
262	if (fFlags & (DBGF_DISAS_FLAGS_CURRENT_GUEST \| DBGF_DISAS_FLAGS_CURRENT_HYPER))
263	{
264	if (fFlags & DBGF_DISAS_FLAGS_CURRENT_GUEST)
265	pCtxCore = CPUMGetGuestCtxCore(pVM);
266	else
267	pCtxCore = CPUMGetHyperCtxCore(pVM);
268	Sel = pCtxCore->cs;
269	pHiddenSel = (CPUMSELREGHID *)&pCtxCore->csHid;
270	GCPtr = pCtxCore->eip;
271	}
272
273	/*
274	* Read the selector info - assume no stale selectors and nasty stuff like that.
275	* Since the selector flags in the CPUMCTX structures aren't up to date unless
276	* we recently visited REM, we'll not search for the selector there.
277	*/
278	SELMSELINFO SelInfo;
279	const PGMMODE enmMode = PGMGetGuestMode(pVM);
280	bool fRealModeAddress = false;
281
282	if ( pHiddenSel
283	&& CPUMAreHiddenSelRegsValid(pVM))
284	{
285	SelInfo.GCPtrBase = pHiddenSel->u32Base;
286	SelInfo.cbLimit = pHiddenSel->u32Limit;
287	SelInfo.fHyper = false;
288	SelInfo.fRealMode = !!((pCtxCore && pCtxCore->eflags.Bits.u1VM) \|\| enmMode == PGMMODE_REAL);
289	SelInfo.Raw.au32[0] = 0;
290	SelInfo.Raw.au32[1] = 0;
291	SelInfo.Raw.Gen.u16LimitLow = ~0;
292	SelInfo.Raw.Gen.u4LimitHigh = ~0;
293	SelInfo.Raw.Gen.u1Present = pHiddenSel->Attr.n.u1Present;
294	SelInfo.Raw.Gen.u1Granularity = pHiddenSel->Attr.n.u1Granularity;;
295	SelInfo.Raw.Gen.u1DefBig = pHiddenSel->Attr.n.u1DefBig;
296	SelInfo.Raw.Gen.u1DescType = pHiddenSel->Attr.n.u1DescType;
297	SelInfo.Raw.Gen.u4Type = pHiddenSel->Attr.n.u4Type;
298	fRealModeAddress = SelInfo.fRealMode;
299	}
300	else if (Sel == DBGF_SEL_FLAT)
301	{
302	SelInfo.GCPtrBase = 0;
303	SelInfo.cbLimit = ~0;
304	SelInfo.fHyper = false;
305	SelInfo.fRealMode = false;
306	SelInfo.Raw.au32[0] = 0;
307	SelInfo.Raw.au32[1] = 0;
308	SelInfo.Raw.Gen.u16LimitLow = ~0;
309	SelInfo.Raw.Gen.u4LimitHigh = ~0;
310	SelInfo.Raw.Gen.u1Present = 1;
311	SelInfo.Raw.Gen.u1Granularity = 1;
312	SelInfo.Raw.Gen.u1DefBig = 1;
313	SelInfo.Raw.Gen.u1DescType = 1;
314	SelInfo.Raw.Gen.u4Type = X86_SEL_TYPE_EO;
315	}
316	else if ( !(fFlags & DBGF_DISAS_FLAGS_CURRENT_HYPER)
317	&& ( (pCtxCore && pCtxCore->eflags.Bits.u1VM)
318	\|\| enmMode == PGMMODE_REAL) )
319	{ /* V86 mode or real mode - real mode addressing */
320	SelInfo.GCPtrBase = Sel * 16;
321	SelInfo.cbLimit = ~0;
322	SelInfo.fHyper = false;
323	SelInfo.fRealMode = true;
324	SelInfo.Raw.au32[0] = 0;
325	SelInfo.Raw.au32[1] = 0;
326	SelInfo.Raw.Gen.u16LimitLow = ~0;
327	SelInfo.Raw.Gen.u4LimitHigh = ~0;
328	SelInfo.Raw.Gen.u1Present = 1;
329	SelInfo.Raw.Gen.u1Granularity = 1;
330	SelInfo.Raw.Gen.u1DefBig = 0; /* 16 bits */
331	SelInfo.Raw.Gen.u1DescType = 1;
332	SelInfo.Raw.Gen.u4Type = X86_SEL_TYPE_EO;
333	fRealModeAddress = true;
334	}
335	else
336	{
337	rc = SELMR3GetSelectorInfo(pVM, Sel, &SelInfo);
338	if (VBOX_FAILURE(rc))
339	{
340	RTStrPrintf(pszOutput, cchOutput, "Sel=%04x -> %Vrc\n", Sel, rc);
341	return rc;
342	}
343	}
344
345	/*
346	* Disassemble it.
347	*/
348	DBGFDISASSTATE State;
349	rc = dbgfR3DisasInstrFirst(pVM, &SelInfo, enmMode, GCPtr, &State);
350	if (VBOX_FAILURE(rc))
351	{
352	RTStrPrintf(pszOutput, cchOutput, "Disas -> %Vrc\n", rc);
353	return rc;
354	}
355
356	/*
357	* Format it.
358	*/
359	char szBuf[512];
360	char *psz = &szBuf[0];
361
362	/* prefix */
363	if (State.Cpu.prefix & PREFIX_LOCK)
364	psz = (char *)memcpy(psz, "lock ", sizeof("lock ")) + sizeof("lock ") - 1;
365	if (State.Cpu.prefix & PREFIX_REP)
366	psz = (char *)memcpy(psz, "rep(e) ", sizeof("rep(e) ")) + sizeof("rep(e) ") - 1;
367	else if(State.Cpu.prefix & PREFIX_REPNE)
368	psz = (char *)memcpy(psz, "repne ", sizeof("repne ")) + sizeof("repne ") - 1;
369
370	/* the instruction */
371	const char *pszFormat = State.Cpu.pszOpcode;
372	char ch;
373	while ((ch = *pszFormat) && !isspace(ch) && ch != '%')
374	{
375	*psz++ = ch;
376	pszFormat++;
377	}
378	if (isspace(ch))
379	{
380	do *psz++ = ' ';
381	#ifdef DEBUG_bird /* Not sure if Sander want's this because of log size */
382	while (psz - szBuf < 8);
383	#else
384	while (0);
385	#endif
386	while (isspace(*pszFormat))
387	pszFormat++;
388	}
389
390	if (fFlags & DBGF_DISAS_FLAGS_NO_ANNOTATION)
391	pCtxCore = NULL;
392
393	/** @todo implement annotation and symbol lookup! */
394	int iParam = 1;
395	for (;;)
396	{
397	ch = *pszFormat;
398	if (ch == '%')
399	{
400	ch = pszFormat[1];
401	switch (ch)
402	{
403	/*
404	* Relative jump offset.
405	*/
406	case 'J':
407	{
408	AssertMsg(iParam == 1, ("Invalid branch parameter nr %d\n", iParam));
409	int32_t i32Disp;
410	if (State.Cpu.param1.flags & USE_IMMEDIATE8_REL)
411	i32Disp = (int32_t)(int8_t)State.Cpu.param1.parval;
412	else if (State.Cpu.param1.flags & USE_IMMEDIATE16_REL)
413	i32Disp = (int32_t)(int16_t)State.Cpu.param1.parval;
414	else if (State.Cpu.param1.flags & USE_IMMEDIATE32_REL)
415	i32Disp = (int32_t)State.Cpu.param1.parval;
416	else
417	{
418	AssertMsgFailed(("Oops!\n"));
419	dbgfR3DisasInstrDone(&State);
420	return VERR_GENERAL_FAILURE;
421	}
422	RTGCUINTPTR GCPtrTarget = (RTGCUINTPTR)GCPtr + State.Cpu.opsize + i32Disp;
423	switch (State.Cpu.opmode)
424	{
425	case CPUMODE_16BIT: GCPtrTarget &= UINT16_MAX; break;
426	case CPUMODE_32BIT: GCPtrTarget &= UINT32_MAX; break;
427	}
428	#ifdef DEBUG_bird /* an experiment. */
429	DBGFSYMBOL Sym;
430	RTGCINTPTR off;
431	int rc = DBGFR3SymbolByAddr(pVM, GCPtrTarget + SelInfo.GCPtrBase, &off, &Sym);
432	if ( VBOX_SUCCESS(rc)
433	&& Sym.Value - SelInfo.GCPtrBase <= SelInfo.cbLimit
434	&& off < _1M * 16 && off > -_1M * 16)
435	{
436	psz += RTStrPrintf(psz, &szBuf[sizeof(szBuf)] - psz, "%s", Sym.szName);
437	if (off > 0)
438	psz += RTStrPrintf(psz, &szBuf[sizeof(szBuf)] - psz, "+%#x", (int)off);
439	else if (off > 0)
440	psz += RTStrPrintf(psz, &szBuf[sizeof(szBuf)] - psz, "-%#x", -(int)off);
441	switch (State.Cpu.opmode)
442	{
443	case CPUMODE_16BIT:
444	psz += RTStrPrintf(psz, &szBuf[sizeof(szBuf)] - psz,
445	i32Disp >= 0 ? " (%04VGv/+%x)" : " (%04VGv/-%x)",
446	GCPtrTarget, i32Disp >= 0 ? i32Disp : -i32Disp);
447	break;
448	case CPUMODE_32BIT:
449	psz += RTStrPrintf(psz, &szBuf[sizeof(szBuf)] - psz,
450	i32Disp >= 0 ? " (%08VGv/+%x)" : " (%08VGv/-%x)",
451	GCPtrTarget, i32Disp >= 0 ? i32Disp : -i32Disp);
452	break;
453	default:
454	psz += RTStrPrintf(psz, &szBuf[sizeof(szBuf)] - psz,
455	i32Disp >= 0 ? " (%VGv/+%x)" : " (%VGv/-%x)",
456	GCPtrTarget, i32Disp >= 0 ? i32Disp : -i32Disp);
457	break;
458	}
459	}
460	else
461	#endif /* DEBUG_bird */
462	{
463	switch (State.Cpu.opmode)
464	{
465	case CPUMODE_16BIT:
466	psz += RTStrPrintf(psz, &szBuf[sizeof(szBuf)] - psz,
467	i32Disp >= 0 ? "%04VGv (+%x)" : "%04VGv (-%x)",
468	GCPtrTarget, i32Disp >= 0 ? i32Disp : -i32Disp);
469	break;
470	case CPUMODE_32BIT:
471	psz += RTStrPrintf(psz, &szBuf[sizeof(szBuf)] - psz,
472	i32Disp >= 0 ? "%08VGv (+%x)" : "%08VGv (-%x)",
473	GCPtrTarget, i32Disp >= 0 ? i32Disp : -i32Disp);
474	break;
475	default:
476	psz += RTStrPrintf(psz, &szBuf[sizeof(szBuf)] - psz,
477	i32Disp >= 0 ? "%VGv (+%x)" : "%VGv (-%x)",
478	GCPtrTarget, i32Disp >= 0 ? i32Disp : -i32Disp);
479	break;
480	}
481	}
482	break;
483	}
484
485	case 'A': //direct address
486	case 'C': //control register
487	case 'D': //debug register
488	case 'E': //ModRM specifies parameter
489	case 'F': //Eflags register
490	case 'G': //ModRM selects general register
491	case 'I': //Immediate data
492	case 'M': //ModRM may only refer to memory
493	case 'O': //No ModRM byte
494	case 'P': //ModRM byte selects MMX register
495	case 'Q': //ModRM byte selects MMX register or memory address
496	case 'R': //ModRM byte may only refer to a general register
497	case 'S': //ModRM byte selects a segment register
498	case 'T': //ModRM byte selects a test register
499	case 'V': //ModRM byte selects an XMM/SSE register
500	case 'W': //ModRM byte selects an XMM/SSE register or a memory address
501	case 'X': //DS:SI
502	case 'Y': //ES:DI
503	switch (iParam)
504	{
505	case 1: psz = mystrpcpy(psz, State.Cpu.param1.szParam); break;
506	case 2: psz = mystrpcpy(psz, State.Cpu.param2.szParam); break;
507	case 3: psz = mystrpcpy(psz, State.Cpu.param3.szParam); break;
508	}
509	pszFormat += 2;
510	break;
511
512	case 'e': //register based on operand size (e.g. %eAX)
513	if (State.Cpu.opmode == CPUMODE_32BIT)
514	*psz++ = 'E';
515	*psz++ = pszFormat[2];
516	*psz++ = pszFormat[3];
517	pszFormat += 4;
518	break;
519
520	default:
521	AssertMsgFailed(("Oops! ch=%c\n", ch));
522	break;
523	}
524
525	/* Skip to the next parameter in the format string. */
526	pszFormat = strchr(pszFormat, ',');
527	if (!pszFormat)
528	break;
529	pszFormat++;
530	*psz++ = ch = ',';
531	iParam++;
532	}
533	else
534	{
535	/* output char, but check for parameter separator first. */
536	if (ch == ',')
537	iParam++;
538	*psz++ = ch;
539	if (!ch)
540	break;
541	pszFormat++;
542	}
543
544	#ifdef DEBUG_bird /* Not sure if Sander want's this because of log size */
545	/* space after commas */
546	if (ch == ',')
547	{
548	while (isspace(*pszFormat))
549	pszFormat++;
550	*psz++ = ' ';
551	}
552	#endif
553	} /* foreach char in pszFormat */
554	*psz = '\0';
555
556	/*
557	* Print it to the user specified buffer.
558	*/
559	if (fFlags & DBGF_DISAS_FLAGS_NO_BYTES)
560	{
561	if (fFlags & DBGF_DISAS_FLAGS_NO_ADDRESS)
562	RTStrPrintf(pszOutput, cchOutput, "%s", szBuf);
563	else if (fRealModeAddress)
564	RTStrPrintf(pszOutput, cchOutput, "%04x:%04x %s", Sel, (unsigned)GCPtr, szBuf);
565	else if (Sel == DBGF_SEL_FLAT)
566	RTStrPrintf(pszOutput, cchOutput, "%VGv %s", GCPtr, szBuf);
567	else
568	RTStrPrintf(pszOutput, cchOutput, "%04x:%VGv %s", Sel, GCPtr, szBuf);
569	}
570	else
571	{
572	uint32_t cbBits = State.Cpu.opsize;
573	uint8_t pau8Bits = (uint8_t )alloca(cbBits);
574	rc = dbgfR3DisasInstrRead(GCPtr, pau8Bits, cbBits, &State);
575	AssertRC(rc);
576	if (fFlags & DBGF_DISAS_FLAGS_NO_ADDRESS)
577	RTStrPrintf(pszOutput, cchOutput, "%.Vhxs%s %s",
578	cbBits, pau8Bits, cbBits < 8 ? (8 - cbBits) * 3 : 0, "",
579	szBuf);
580	else if (fRealModeAddress)
581	RTStrPrintf(pszOutput, cchOutput, "%04x:%04x %.Vhxs%s %s",
582	Sel, (unsigned)GCPtr,
583	cbBits, pau8Bits, cbBits < 8 ? (8 - cbBits) * 3 : 0, "",
584	szBuf);
585	else if (Sel == DBGF_SEL_FLAT)
586	RTStrPrintf(pszOutput, cchOutput, "%VGv %.Vhxs%s %s",
587	GCPtr,
588	cbBits, pau8Bits, cbBits < 8 ? (8 - cbBits) * 3 : 0, "",
589	szBuf);
590	else
591	RTStrPrintf(pszOutput, cchOutput, "%04x:%VGv %.Vhxs%s %s",
592	Sel, GCPtr,
593	cbBits, pau8Bits, cbBits < 8 ? (8 - cbBits) * 3 : 0, "",
594	szBuf);
595
596	}
597
598	if (pcbInstr)
599	*pcbInstr = State.Cpu.opsize;
600
601	dbgfR3DisasInstrDone(&State);
602	return VINF_SUCCESS;
603	}
604
605
606	/**
607	* Disassembles an instruction.
608	* Addresses will be tried resolved to symbols
609	*
610	* @returns VBox status code.
611	* @param pVM VM handle.
612	* @param Sel The code selector. This used to determin the 32/16 bit ness and
613	* calculation of the actual instruction address.
614	* @param GCPtr The code address relative to the base of Sel.
615	* @param pszOutput Output buffer.
616	* @param cchOutput Size of the output buffer.
617	*/
618	DBGFR3DECL(int) DBGFR3DisasInstr(PVM pVM, RTSEL Sel, RTGCPTR GCPtr, char *pszOutput, uint32_t cchOutput)
619	{
620	return DBGFR3DisasInstrEx(pVM, Sel, GCPtr, 0, pszOutput, cchOutput, NULL);
621	}
622
623
624	/**
625	* Disassembles the current guest context instruction.
626	* All registers and data will be displayed. Addresses will be attempted resolved to symbols.
627	*
628	* @returns VBox status code.
629	* @param pVM VM handle.
630	* @param pszOutput Output buffer.
631	* @param cchOutput Size of the output buffer.
632	*/
633	DBGFR3DECL(int) DBGFR3DisasInstrCurrent(PVM pVM, char *pszOutput, uint32_t cchOutput)
634	{
635	return DBGFR3DisasInstrEx(pVM, 0, 0, DBGF_DISAS_FLAGS_CURRENT_GUEST, pszOutput, cchOutput, NULL);
636	}
637
638
639	/**
640	* Disassembles the current guest context instruction and writes it to the log.
641	* All registers and data will be displayed. Addresses will be attempted resolved to symbols.
642	*
643	* @returns VBox status code.
644	* @param pVM VM handle.
645	* @param pszPrefix Short prefix string to the dissassembly string. (optional)
646	*/
647	DBGFR3DECL(int) DBGFR3DisasInstrCurrentLogInternal(PVM pVM, const char *pszPrefix)
648	{
649	char szBuf[256];
650	szBuf[0] = '\0';
651	int rc = DBGFR3DisasInstrCurrent(pVM, &szBuf[0], sizeof(szBuf));
652	if (VBOX_FAILURE(rc))
653	RTStrPrintf(szBuf, sizeof(szBuf), "DBGFR3DisasInstrCurrentLog failed with rc=%Vrc\n", rc);
654	if (pszPrefix && *pszPrefix)
655	RTLogPrintf("%s: %s\n", pszPrefix, szBuf);
656	else
657	RTLogPrintf("%s\n", szBuf);
658	return rc;
659	}
660
661
662
663	/**
664	* Disassembles the specified guest context instruction and writes it to the log.
665	* Addresses will be attempted resolved to symbols.
666	*
667	* @returns VBox status code.
668	* @param pVM VM handle.
669	* @param Sel The code selector. This used to determin the 32/16 bit-ness and
670	* calculation of the actual instruction address.
671	* @param GCPtr The code address relative to the base of Sel.
672	*/
673	DBGFR3DECL(int) DBGFR3DisasInstrLogInternal(PVM pVM, RTSEL Sel, RTGCPTR GCPtr)
674	{
675	char szBuf[256];
676	szBuf[0] = '\0';
677	int rc = DBGFR3DisasInstr(pVM, Sel, GCPtr, &szBuf[0], sizeof(szBuf));
678	if (VBOX_FAILURE(rc))
679	RTStrPrintf(szBuf, sizeof(szBuf), "DBGFR3DisasInstrLog(, %RTsel, %RGv) failed with rc=%Vrc\n", Sel, GCPtr, rc);
680	RTLogPrintf("%s\n", szBuf);
681	return rc;
682	}
683

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source: vbox/trunk/src/VBox/VMM/DBGFDisas.cpp@ 7136

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