1 | /* $Id: serialport-os2.cpp 78607 2019-05-20 20:59:49Z vboxsync $ */
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2 | /** @file
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3 | * IPRT - Serial Port API, OS/2 Implementation.
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4 | */
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5 |
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6 | /*
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7 | * Copyright (C) 2017-2019 Oracle Corporation
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8 | *
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9 | * This file is part of VirtualBox Open Source Edition (OSE), as
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10 | * available from http://www.virtualbox.org. This file is free software;
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11 | * you can redistribute it and/or modify it under the terms of the GNU
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12 | * General Public License (GPL) as published by the Free Software
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13 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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14 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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15 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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16 | *
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17 | * The contents of this file may alternatively be used under the terms
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18 | * of the Common Development and Distribution License Version 1.0
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19 | * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
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20 | * VirtualBox OSE distribution, in which case the provisions of the
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21 | * CDDL are applicable instead of those of the GPL.
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22 | *
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23 | * You may elect to license modified versions of this file under the
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24 | * terms and conditions of either the GPL or the CDDL or both.
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25 | */
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26 |
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27 |
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28 | /*********************************************************************************************************************************
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29 | * Header Files *
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30 | *********************************************************************************************************************************/
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31 | #define INCL_BASE
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32 | #define INCL_DOSFILEMGR
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33 | #define INCL_ERRORS
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34 | #define INCL_DOS
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35 | #define INCL_DOSDEVIOCTL
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36 | #define INCL_DOSDEVICES
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37 | #include <os2.h>
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38 | #undef RT_MAX
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39 |
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40 | #include <iprt/serialport.h>
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41 | #include "internal/iprt.h"
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42 |
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43 | #include <iprt/asm.h>
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44 | #include <iprt/assert.h>
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45 | #include <iprt/cdefs.h>
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46 | #include <iprt/err.h>
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47 | #include <iprt/mem.h>
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48 | #include <iprt/string.h>
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49 | #include <iprt/time.h>
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50 | #include "internal/magics.h"
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51 |
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52 |
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53 |
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54 | /*********************************************************************************************************************************
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55 | * Structures and Typedefs *
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56 | *********************************************************************************************************************************/
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57 |
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58 | /**
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59 | * Returned data structure for ASYNC_EXTGETBAUDRATE.
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60 | */
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61 | typedef struct OS2EXTGETBAUDRATEDATA
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62 | {
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63 | /** Current bit rate. */
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64 | ULONG uBitRateCur;
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65 | /** Fraction of the current bit rate. */
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66 | BYTE bBitRateCurFrac;
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67 | /** Minimum supported bit rate. */
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68 | ULONG uBitRateMin;
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69 | /** Fraction of the minimum bit rate. */
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70 | BYTE bBitRateCurMin;
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71 | /** Maximum supported bit rate. */
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72 | ULONG uBitRateMax;
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73 | /** Fraction of the maximum bit rate. */
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74 | BYTE bBitRateCurMax;
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75 | } OS2EXTGETBAUDRATEDATA;
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76 | /** Pointer to the get extended baud rate data packet. */
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77 | typedef OS2EXTGETBAUDRATEDATA *POS2EXTGETBAUDRATEDATA;
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78 |
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79 |
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80 | /**
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81 | * Data packet for the ASYNC_EXTSETBAUDRATE ioctl.
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82 | */
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83 | typedef struct OS2EXTSETBAUDRATEDATA
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84 | {
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85 | /** Current bit rate. */
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86 | ULONG uBitRate;
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87 | /** Fraction of the current bit rate. */
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88 | BYTE bBitRateFrac;
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89 | } OS2EXTSETBAUDRATEDATA;
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90 | /** Pointer to the set extended baud rate data packet. */
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91 | typedef OS2EXTSETBAUDRATEDATA *POS2EXTSETBAUDRATEDATA;
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92 |
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93 |
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94 | /**
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95 | * Data packet for the ASYNC_GETLINECTRL ioctl.
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96 | */
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97 | typedef struct OS2GETLINECTRLDATA
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98 | {
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99 | /** Returns the current amount of data bits in a symbol used for the communication. */
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100 | BYTE bDataBits;
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101 | /** Current parity setting. */
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102 | BYTE bParity;
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103 | /** Current number of stop bits. */
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104 | BYTE bStopBits;
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105 | /** Flag whether a break condition is currently transmitted on the line. */
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106 | BYTE bTxBrk;
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107 | } OS2GETLINECTRLDATA;
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108 | /** Pointer to the get line control data packet. */
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109 | typedef OS2GETLINECTRLDATA *POS2GETLINECTRLDATA;
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110 |
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111 |
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112 | /**
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113 | * Data packet for the ASYNC_SETLINECTRL ioctl.
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114 | */
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115 | typedef struct OS2SETLINECTRLDATA
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116 | {
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117 | /** Returns the current amount of data bits in a symbol used for the communication. */
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118 | BYTE bDataBits;
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119 | /** Current parity setting. */
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120 | BYTE bParity;
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121 | /** Current number of stop bits. */
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122 | BYTE bStopBits;
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123 | } OS2SETLINECTRLDATA;
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124 | /** Pointer to the get line control data packet. */
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125 | typedef OS2SETLINECTRLDATA *POS2SETLINECTRLDATA;
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126 |
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127 |
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128 | /**
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129 | * Internal serial port state.
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130 | */
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131 | typedef struct RTSERIALPORTINTERNAL
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132 | {
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133 | /** Magic value (RTSERIALPORT_MAGIC). */
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134 | uint32_t u32Magic;
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135 | /** Flags given while opening the serial port. */
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136 | uint32_t fOpenFlags;
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137 | /** The file descriptor of the serial port. */
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138 | HFILE hDev;
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139 | /** Flag whether blocking mode is currently enabled. */
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140 | bool fBlocking;
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141 | /** Flag whether RTSerialPortEvtPoll() was interrupted by RTSerialPortEvtPollInterrupt(). */
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142 | volatile bool fInterrupt;
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143 | } RTSERIALPORTINTERNAL;
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144 | /** Pointer to the internal serial port state. */
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145 | typedef RTSERIALPORTINTERNAL *PRTSERIALPORTINTERNAL;
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146 |
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147 |
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148 |
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149 | /*********************************************************************************************************************************
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150 | * Defined Constants And Macros *
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151 | *********************************************************************************************************************************/
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152 |
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153 | /** Indicator whether the CTS input is set/clear. */
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154 | #define OS2_GET_MODEM_INPUT_CTS RT_BIT(4)
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155 | /** Indicator whether the DSR input is set/clear. */
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156 | #define OS2_GET_MODEM_INPUT_DSR RT_BIT(5)
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157 | /** Indicator whether the RI input is set/clear. */
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158 | #define OS2_GET_MODEM_INPUT_RI RT_BIT(6)
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159 | /** Indicator whether the DCD input is set/clear. */
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160 | #define OS2_GET_MODEM_INPUT_DCD RT_BIT(7)
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161 |
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162 | /** There is something to read on the serial port. */
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163 | #define OS2_GET_COMM_EVT_RX RT_BIT(0)
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164 | /** A receive timeout interrupt was generated on the serial port during a read request. */
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165 | #define OS2_GET_COMM_EVT_RTI RT_BIT(1)
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166 | /** The transmit queue for the serial port is empty. */
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167 | #define OS2_GET_COMM_EVT_TX_EMPTY RT_BIT(2)
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168 | /** The CTS signal changes state. */
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169 | #define OS2_GET_COMM_EVT_CTS_CHG RT_BIT(3)
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170 | /** The DSR signal changes state. */
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171 | #define OS2_GET_COMM_EVT_DSR_CHG RT_BIT(4)
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172 | /** The DCD signal changes state. */
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173 | #define OS2_GET_COMM_EVT_DCD_CHG RT_BIT(5)
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174 | /** A break condition was detected on the serial port. */
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175 | #define OS2_GET_COMM_EVT_BRK RT_BIT(6)
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176 | /** A parity, framing or receive hardware overrun error occurred. */
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177 | #define OS2_GET_COMM_EVT_COMM_ERR RT_BIT(7)
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178 | /** Trailing edge ring indicator was detected. */
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179 | #define OS2_GET_COMM_EVT_RI_TRAIL_EDGE RT_BIT(8)
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180 |
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181 |
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182 | /*********************************************************************************************************************************
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183 | * Global variables *
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184 | *********************************************************************************************************************************/
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185 | /** OS/2 parity value to IPRT parity enum. */
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186 | static RTSERIALPORTPARITY s_aParityConvTbl[] =
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187 | {
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188 | RTSERIALPORTPARITY_NONE,
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189 | RTSERIALPORTPARITY_ODD,
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190 | RTSERIALPORTPARITY_EVEN,
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191 | RTSERIALPORTPARITY_MARK,
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192 | RTSERIALPORTPARITY_SPACE
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193 | };
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194 |
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195 | /** OS/2 data bits value to IPRT data bits enum. */
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196 | static RTSERIALPORTDATABITS s_aDataBitsConvTbl[] =
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197 | {
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198 | RTSERIALPORTDATABITS_INVALID,
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199 | RTSERIALPORTDATABITS_INVALID,
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200 | RTSERIALPORTDATABITS_INVALID,
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201 | RTSERIALPORTDATABITS_INVALID,
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202 | RTSERIALPORTDATABITS_INVALID,
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203 | RTSERIALPORTDATABITS_5BITS,
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204 | RTSERIALPORTDATABITS_6BITS,
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205 | RTSERIALPORTDATABITS_7BITS,
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206 | RTSERIALPORTDATABITS_8BITS
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207 | };
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208 |
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209 | /** OS/2 stop bits value to IPRT stop bits enum. */
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210 | static RTSERIALPORTSTOPBITS s_aStopBitsConvTbl[] =
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211 | {
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212 | RTSERIALPORTSTOPBITS_ONE,
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213 | RTSERIALPORTSTOPBITS_ONEPOINTFIVE,
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214 | RTSERIALPORTSTOPBITS_TWO
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215 | };
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216 |
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217 |
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218 | /*********************************************************************************************************************************
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219 | * Internal Functions *
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220 | *********************************************************************************************************************************/
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221 |
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222 | /**
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223 | * The slow path of rtSerialPortSwitchBlockingMode that does the actual switching.
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224 | *
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225 | * @returns IPRT status code.
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226 | * @param pThis The internal serial port instance data.
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227 | * @param fBlocking The desired mode of operation.
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228 | * @remarks Do not call directly.
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229 | *
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230 | * @note Affects only read behavior.
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231 | */
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232 | static int rtSerialPortSwitchBlockingModeSlow(PRTSERIALPORTINTERNAL pThis, bool fBlocking)
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233 | {
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234 | DCBINFO DcbInfo;
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235 | ULONG cbDcbInfo = sizeof(DcbInfo);
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236 | ULONG rcOs2 = DosDevIOCtl(pThis->hDev, IOCTL_ASYNC, ASYNC_GETDCBINFO, NULL, 0, NULL, &DcbInfo, cbDcbInfo, &cbDcbInfo);
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237 | if (!rcOs2)
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238 | {
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239 | DcbInfo.fbTimeout &= ~0x06;
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240 | DcbInfo.fbTimeout |= fBlocking ? 0x04 : 0x06;
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241 | rcOs2 = DosDevIOCtl(pThis->hDev, IOCTL_ASYNC, ASYNC_SETDCBINFO, &DcbInfo, cbDcbInfo, &cbDcbInfo, NULL, 0, NULL);
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242 | if (rcOs2)
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243 | return RTErrConvertFromOS2(rcOs2);
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244 | }
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245 | else
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246 | return RTErrConvertFromOS2(rcOs2);
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247 |
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248 | pThis->fBlocking = fBlocking;
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249 | return VINF_SUCCESS;
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250 | }
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251 |
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252 |
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253 | /**
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254 | * Switches the serial port to the desired blocking mode if necessary.
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255 | *
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256 | * @returns IPRT status code.
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257 | * @param pThis The internal serial port instance data.
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258 | * @param fBlocking The desired mode of operation.
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259 | *
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260 | * @note Affects only read behavior.
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261 | */
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262 | DECLINLINE(int) rtSerialPortSwitchBlockingMode(PRTSERIALPORTINTERNAL pThis, bool fBlocking)
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263 | {
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264 | if (pThis->fBlocking != fBlocking)
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265 | return rtSerialPortSwitchBlockingModeSlow(pThis, fBlocking);
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266 | return VINF_SUCCESS;
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267 | }
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268 |
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269 |
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270 | RTDECL(int) RTSerialPortOpen(PRTSERIALPORT phSerialPort, const char *pszPortAddress, uint32_t fFlags)
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271 | {
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272 | AssertPtrReturn(phSerialPort, VERR_INVALID_POINTER);
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273 | AssertReturn(VALID_PTR(pszPortAddress) && *pszPortAddress != '\0', VERR_INVALID_PARAMETER);
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274 | AssertReturn(!(fFlags & ~RTSERIALPORT_OPEN_F_VALID_MASK), VERR_INVALID_PARAMETER);
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275 | AssertReturn((fFlags & RTSERIALPORT_OPEN_F_READ) || (fFlags & RTSERIALPORT_OPEN_F_WRITE),
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276 | VERR_INVALID_PARAMETER);
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277 |
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278 | int rc = VINF_SUCCESS;
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279 | PRTSERIALPORTINTERNAL pThis = (PRTSERIALPORTINTERNAL)RTMemAllocZ(sizeof(*pThis));
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280 | if (pThis)
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281 | {
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282 | ULONG fOpenMode = OPEN_SHARE_DENYREADWRITE
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283 | | OPEN_FLAGS_SEQUENTIAL
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284 | | OPEN_FLAGS_NOINHERIT
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285 | | OPEN_FLAGS_FAIL_ON_ERROR;
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286 |
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287 | if ((fFlags & RTSERIALPORT_OPEN_F_READ) && !(fFlags & RTSERIALPORT_OPEN_F_WRITE))
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288 | fOpenMode |= OPEN_ACCESS_READONLY;
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289 | else if (!(fFlags & RTSERIALPORT_OPEN_F_READ) && (fFlags & RTSERIALPORT_OPEN_F_WRITE))
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290 | fOpenMode |= OPEN_ACCESS_WRITEONLY;
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291 | else
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292 | fOpenMode |= OPEN_ACCESS_READWRITE;
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293 |
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294 | pThis->u32Magic = RTSERIALPORT_MAGIC;
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295 | pThis->fOpenFlags = fFlags;
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296 | pThis->fInterrupt = false;
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297 | pThis->fBlocking = true;
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298 |
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299 | ULONG uAction = 0;
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300 | ULONG rcOs2 = DosOpen((const UCHAR *)pszPortAddress, &pThis->hDev, &uAction, 0, FILE_NORMAL, FILE_OPEN, fOpenMode, NULL);
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301 | if (!rcOs2)
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302 | {
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303 | /* Switch to a known read blocking mode. */
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304 | rc = rtSerialPortSwitchBlockingMode(pThis, false);
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305 | if (RT_SUCCESS(rc))
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306 | {
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307 | *phSerialPort = pThis;
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308 | return VINF_SUCCESS;
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309 | }
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310 |
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311 | DosClose(pThis->hDev);
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312 | }
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313 | else
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314 | rc = RTErrConvertFromOS2(rcOs2);
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315 |
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316 | RTMemFree(pThis);
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317 | }
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318 | else
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319 | rc = VERR_NO_MEMORY;
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320 |
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321 | return rc;
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322 | }
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323 |
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324 |
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325 | RTDECL(int) RTSerialPortClose(RTSERIALPORT hSerialPort)
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326 | {
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327 | PRTSERIALPORTINTERNAL pThis = hSerialPort;
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328 | if (pThis == NIL_RTSERIALPORT)
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329 | return VINF_SUCCESS;
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330 | AssertPtrReturn(pThis, VERR_INVALID_PARAMETER);
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331 | AssertReturn(pThis->u32Magic == RTSERIALPORT_MAGIC, VERR_INVALID_HANDLE);
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332 |
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333 | /*
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334 | * Do the cleanup.
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335 | */
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336 | AssertReturn(ASMAtomicCmpXchgU32(&pThis->u32Magic, RTSERIALPORT_MAGIC_DEAD, RTSERIALPORT_MAGIC), VERR_INVALID_HANDLE);
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337 |
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338 | DosClose(pThis->hDev);
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339 | RTMemFree(pThis);
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340 | return VINF_SUCCESS;
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341 | }
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342 |
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343 |
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344 | RTDECL(RTHCINTPTR) RTSerialPortToNative(RTSERIALPORT hSerialPort)
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345 | {
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346 | PRTSERIALPORTINTERNAL pThis = hSerialPort;
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347 | AssertPtrReturn(pThis, -1);
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348 | AssertReturn(pThis->u32Magic == RTSERIALPORT_MAGIC, -1);
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349 |
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350 | return pThis->hDev;
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351 | }
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352 |
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353 |
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354 | RTDECL(int) RTSerialPortRead(RTSERIALPORT hSerialPort, void *pvBuf, size_t cbToRead, size_t *pcbRead)
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355 | {
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356 | PRTSERIALPORTINTERNAL pThis = hSerialPort;
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357 | AssertPtrReturn(pThis, VERR_INVALID_PARAMETER);
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358 | AssertReturn(pThis->u32Magic == RTSERIALPORT_MAGIC, VERR_INVALID_HANDLE);
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359 | AssertPtrReturn(pvBuf, VERR_INVALID_POINTER);
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360 | AssertReturn(cbToRead > 0, VERR_INVALID_PARAMETER);
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361 |
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362 | int rc = rtSerialPortSwitchBlockingMode(pThis, true);
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363 | if (RT_SUCCESS(rc))
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364 | {
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365 | /*
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366 | * Attempt read.
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367 | */
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368 | ULONG cbRead = 0;
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369 | ULONG rcOs2 = DosRead(pThis->hDev, pvBuf, cbToRead, &cbRead);
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370 | if (!rcOs2)
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371 | {
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372 | if (pcbRead)
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373 | /* caller can handle partial read. */
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374 | *pcbRead = cbRead;
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375 | else
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376 | {
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377 | /* Caller expects all to be read. */
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378 | while (cbToRead > cbRead)
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379 | {
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380 | ULONG cbReadPart = 0;
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381 | rcOs2 = DosRead(pThis->hDev, (uint8_t *)pvBuf + cbRead, cbToRead - cbRead, &cbReadPart);
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382 | if (rcOs2)
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383 | return RTErrConvertFromOS2(rcOs2);
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384 |
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385 | cbRead += cbReadPart;
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386 | }
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387 | }
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388 | }
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389 | else
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390 | rc = RTErrConvertFromOS2(rcOs2);
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391 | }
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392 |
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393 | return rc;
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394 | }
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395 |
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396 |
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397 | RTDECL(int) RTSerialPortReadNB(RTSERIALPORT hSerialPort, void *pvBuf, size_t cbToRead, size_t *pcbRead)
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398 | {
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399 | PRTSERIALPORTINTERNAL pThis = hSerialPort;
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400 | AssertPtrReturn(pThis, VERR_INVALID_PARAMETER);
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401 | AssertReturn(pThis->u32Magic == RTSERIALPORT_MAGIC, VERR_INVALID_HANDLE);
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402 | AssertPtrReturn(pvBuf, VERR_INVALID_POINTER);
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403 | AssertReturn(cbToRead > 0, VERR_INVALID_PARAMETER);
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404 | AssertPtrReturn(pcbRead, VERR_INVALID_POINTER);
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405 |
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406 | *pcbRead = 0;
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407 |
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408 | int rc = rtSerialPortSwitchBlockingMode(pThis, false);
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409 | if (RT_SUCCESS(rc))
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410 | {
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411 | ULONG cbThisRead = 0;
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412 | ULONG rcOs2 = DosRead(pThis->hDev, pvBuf, cbToRead, &cbThisRead);
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413 | if (!rcOs2)
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414 | {
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415 | *pcbRead = cbThisRead;
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416 |
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417 | if (cbThisRead == 0)
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418 | rc = VINF_TRY_AGAIN;
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419 | }
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420 | else
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421 | rc = RTErrConvertFromOS2(rcOs2);
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422 | }
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423 |
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424 | return rc;
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425 | }
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426 |
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427 |
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428 | RTDECL(int) RTSerialPortWrite(RTSERIALPORT hSerialPort, const void *pvBuf, size_t cbToWrite, size_t *pcbWritten)
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429 | {
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430 | PRTSERIALPORTINTERNAL pThis = hSerialPort;
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431 | AssertPtrReturn(pThis, VERR_INVALID_PARAMETER);
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432 | AssertReturn(pThis->u32Magic == RTSERIALPORT_MAGIC, VERR_INVALID_HANDLE);
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433 | AssertPtrReturn(pvBuf, VERR_INVALID_POINTER);
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434 | AssertReturn(cbToWrite > 0, VERR_INVALID_PARAMETER);
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435 |
|
---|
436 | /*
|
---|
437 | * Attempt write.
|
---|
438 | */
|
---|
439 | int rc = VINF_SUCCESS;
|
---|
440 | ULONG cbThisWritten = 0;
|
---|
441 | ULONG rcOs2 = DosWrite(pThis->hDev, pvBuf, cbToWrite, &cbThisWritten);
|
---|
442 | if (!rcOs2)
|
---|
443 | {
|
---|
444 | if (pcbWritten)
|
---|
445 | /* caller can handle partial write. */
|
---|
446 | *pcbWritten = cbThisWritten;
|
---|
447 | else
|
---|
448 | {
|
---|
449 | /** @todo Wait for TX empty and loop. */
|
---|
450 | rc = VERR_NOT_SUPPORTED;
|
---|
451 | }
|
---|
452 | }
|
---|
453 | else
|
---|
454 | rc = RTErrConvertFromOS2(rcOs2);
|
---|
455 |
|
---|
456 | return rc;
|
---|
457 | }
|
---|
458 |
|
---|
459 |
|
---|
460 | RTDECL(int) RTSerialPortWriteNB(RTSERIALPORT hSerialPort, const void *pvBuf, size_t cbToWrite, size_t *pcbWritten)
|
---|
461 | {
|
---|
462 | PRTSERIALPORTINTERNAL pThis = hSerialPort;
|
---|
463 | AssertPtrReturn(pThis, VERR_INVALID_PARAMETER);
|
---|
464 | AssertReturn(pThis->u32Magic == RTSERIALPORT_MAGIC, VERR_INVALID_HANDLE);
|
---|
465 | AssertPtrReturn(pvBuf, VERR_INVALID_POINTER);
|
---|
466 | AssertReturn(cbToWrite > 0, VERR_INVALID_PARAMETER);
|
---|
467 | AssertPtrReturn(pcbWritten, VERR_INVALID_POINTER);
|
---|
468 |
|
---|
469 | *pcbWritten = 0;
|
---|
470 |
|
---|
471 | int rc = VINF_SUCCESS;
|
---|
472 | ULONG cbThisWritten = 0;
|
---|
473 | ULONG rcOs2 = DosWrite(pThis->hDev, pvBuf, cbToWrite, &cbThisWritten);
|
---|
474 | if (!rcOs2)
|
---|
475 | {
|
---|
476 | *pcbWritten = cbThisWritten;
|
---|
477 | if (!cbThisWritten)
|
---|
478 | rc = VINF_TRY_AGAIN;
|
---|
479 | }
|
---|
480 | else
|
---|
481 | rc = RTErrConvertFromOS2(rcOs2);
|
---|
482 |
|
---|
483 | return rc;
|
---|
484 | }
|
---|
485 |
|
---|
486 |
|
---|
487 | RTDECL(int) RTSerialPortCfgQueryCurrent(RTSERIALPORT hSerialPort, PRTSERIALPORTCFG pCfg)
|
---|
488 | {
|
---|
489 | PRTSERIALPORTINTERNAL pThis = hSerialPort;
|
---|
490 | AssertPtrReturn(pThis, VERR_INVALID_PARAMETER);
|
---|
491 | AssertReturn(pThis->u32Magic == RTSERIALPORT_MAGIC, VERR_INVALID_HANDLE);
|
---|
492 |
|
---|
493 | int rc = VINF_SUCCESS;
|
---|
494 | OS2EXTGETBAUDRATEDATA ExtBaudRate;
|
---|
495 | ULONG cbExtBaudRate = sizeof(ExtBaudRate);
|
---|
496 | ULONG rcOs2 = DosDevIOCtl(pThis->hDev, IOCTL_ASYNC, ASYNC_EXTGETBAUDRATE, NULL, 0, NULL, &ExtBaudRate, cbExtBaudRate, &cbExtBaudRate);
|
---|
497 | if (!rcOs2)
|
---|
498 | {
|
---|
499 | OS2GETLINECTRLDATA LineCtrl;
|
---|
500 | ULONG cbLineCtrl = sizeof(LineCtrl);
|
---|
501 | rcOs2 = DosDevIOCtl(pThis->hDev, IOCTL_ASYNC, ASYNC_GETLINECTRL, NULL, 0, NULL, &LineCtrl, cbLineCtrl, &cbLineCtrl);
|
---|
502 | if (!rcOs2)
|
---|
503 | {
|
---|
504 | pCfg->uBaudRate = ExtBaudRate.uBitRateCur;
|
---|
505 | if (LineCtrl.bParity < RT_ELEMENTS(s_aParityConvTbl))
|
---|
506 | pCfg->enmParity = s_aParityConvTbl[LineCtrl.bParity];
|
---|
507 | else
|
---|
508 | rc = VERR_IPE_UNEXPECTED_STATUS;
|
---|
509 |
|
---|
510 | if ( RT_SUCCESS(rc)
|
---|
511 | && LineCtrl.bDataBits < RT_ELEMENTS(s_aDataBitsConvTbl)
|
---|
512 | && s_aDataBitsConvTbl[LineCtrl.bDataBits] != RTSERIALPORTDATABITS_INVALID)
|
---|
513 | pCfg->enmDataBitCount = s_aDataBitsConvTbl[LineCtrl.bDataBits];
|
---|
514 | else
|
---|
515 | rc = VERR_IPE_UNEXPECTED_STATUS;
|
---|
516 |
|
---|
517 | if ( RT_SUCCESS(rc)
|
---|
518 | && LineCtrl.bStopBits < RT_ELEMENTS(s_aStopBitsConvTbl))
|
---|
519 | pCfg->enmStopBitCount = s_aStopBitsConvTbl[LineCtrl.bStopBits];
|
---|
520 | else
|
---|
521 | rc = VERR_IPE_UNEXPECTED_STATUS;
|
---|
522 | }
|
---|
523 | else
|
---|
524 | rc = RTErrConvertFromOS2(rcOs2);
|
---|
525 | }
|
---|
526 | else
|
---|
527 | rc = RTErrConvertFromOS2(rcOs2);
|
---|
528 |
|
---|
529 | return rc;
|
---|
530 | }
|
---|
531 |
|
---|
532 |
|
---|
533 | RTDECL(int) RTSerialPortCfgSet(RTSERIALPORT hSerialPort, PCRTSERIALPORTCFG pCfg, PRTERRINFO pErrInfo)
|
---|
534 | {
|
---|
535 | PRTSERIALPORTINTERNAL pThis = hSerialPort;
|
---|
536 | AssertPtrReturn(pThis, VERR_INVALID_PARAMETER);
|
---|
537 | AssertReturn(pThis->u32Magic == RTSERIALPORT_MAGIC, VERR_INVALID_HANDLE);
|
---|
538 |
|
---|
539 | int rc = VINF_SUCCESS;
|
---|
540 | OS2EXTSETBAUDRATEDATA ExtBaudRate;
|
---|
541 | OS2SETLINECTRLDATA LineCtrl;
|
---|
542 | ULONG cbExtBaudRate = sizeof(ExtBaudRate);
|
---|
543 | ULONG cbLineCtrl = sizeof(LineCtrl);
|
---|
544 |
|
---|
545 | ExtBaudRate.uBitRate = pCfg->uBaudRate;
|
---|
546 | ExtBaudRate.bBitRateFrac = 0;
|
---|
547 |
|
---|
548 | BYTE idx = 0;
|
---|
549 | while (idx < RT_ELEMENTS(s_aParityConvTbl))
|
---|
550 | {
|
---|
551 | if (s_aParityConvTbl[idx] == pCfg->enmParity)
|
---|
552 | {
|
---|
553 | LineCtrl.bParity = idx;
|
---|
554 | break;
|
---|
555 | }
|
---|
556 | idx++;
|
---|
557 | }
|
---|
558 | AssertReturn(idx < RT_ELEMENTS(s_aParityConvTbl), VERR_INTERNAL_ERROR);
|
---|
559 |
|
---|
560 | idx = 0;
|
---|
561 | while (idx < RT_ELEMENTS(s_aDataBitsConvTbl))
|
---|
562 | {
|
---|
563 | if (s_aDataBitsConvTbl[idx] == pCfg->enmDataBitCount)
|
---|
564 | {
|
---|
565 | LineCtrl.bDataBits = idx;
|
---|
566 | break;
|
---|
567 | }
|
---|
568 | idx++;
|
---|
569 | }
|
---|
570 | AssertReturn(idx < RT_ELEMENTS(s_aDataBitsConvTbl), VERR_INTERNAL_ERROR);
|
---|
571 |
|
---|
572 | idx = 0;
|
---|
573 | while (idx < RT_ELEMENTS(s_aStopBitsConvTbl))
|
---|
574 | {
|
---|
575 | if (s_aStopBitsConvTbl[idx] == pCfg->enmStopBitCount)
|
---|
576 | {
|
---|
577 | LineCtrl.bStopBits = idx;
|
---|
578 | break;
|
---|
579 | }
|
---|
580 | idx++;
|
---|
581 | }
|
---|
582 | AssertReturn(idx < RT_ELEMENTS(s_aStopBitsConvTbl), VERR_INTERNAL_ERROR);
|
---|
583 |
|
---|
584 | ULONG rcOs2 = DosDevIOCtl(pThis->hDev, IOCTL_ASYNC, ASYNC_EXTSETBAUDRATE, &ExtBaudRate, cbExtBaudRate, &cbExtBaudRate, NULL, 0, NULL);
|
---|
585 | if (!rcOs2)
|
---|
586 | {
|
---|
587 | rcOs2 = DosDevIOCtl(pThis->hDev, IOCTL_ASYNC, ASYNC_SETLINECTRL, &LineCtrl, cbLineCtrl, &cbLineCtrl, NULL, 0, NULL);
|
---|
588 | if (rcOs2)
|
---|
589 | rc = RTErrConvertFromOS2(rcOs2);
|
---|
590 | }
|
---|
591 | else
|
---|
592 | rc = RTErrConvertFromOS2(rcOs2);
|
---|
593 |
|
---|
594 | return rc;
|
---|
595 | }
|
---|
596 |
|
---|
597 |
|
---|
598 | RTDECL(int) RTSerialPortEvtPoll(RTSERIALPORT hSerialPort, uint32_t fEvtMask, uint32_t *pfEvtsRecv,
|
---|
599 | RTMSINTERVAL msTimeout)
|
---|
600 | {
|
---|
601 | PRTSERIALPORTINTERNAL pThis = hSerialPort;
|
---|
602 | AssertPtrReturn(pThis, VERR_INVALID_PARAMETER);
|
---|
603 | AssertReturn(pThis->u32Magic == RTSERIALPORT_MAGIC, VERR_INVALID_HANDLE);
|
---|
604 | AssertReturn(!(fEvtMask & ~RTSERIALPORT_EVT_F_VALID_MASK), VERR_INVALID_PARAMETER);
|
---|
605 | AssertPtrReturn(pfEvtsRecv, VERR_INVALID_POINTER);
|
---|
606 |
|
---|
607 | *pfEvtsRecv = 0;
|
---|
608 |
|
---|
609 | /*
|
---|
610 | * We need to kind of busy wait here as there is, to my knowledge, no API
|
---|
611 | * to wait for a COM event.
|
---|
612 | *
|
---|
613 | * @todo Adaptive waiting
|
---|
614 | * @todo Handle rollover after 48days eventually
|
---|
615 | */
|
---|
616 | int rc = VINF_SUCCESS;
|
---|
617 | uint64_t tsStart = RTTimeSystemMilliTS();
|
---|
618 | do
|
---|
619 | {
|
---|
620 | if (ASMAtomicXchgBool(&pThis->fInterrupt, false))
|
---|
621 | {
|
---|
622 | rc = VERR_INTERRUPTED;
|
---|
623 | break;
|
---|
624 | }
|
---|
625 |
|
---|
626 | USHORT fCommEvt = 0;
|
---|
627 | ULONG cbCommEvt = sizeof(fCommEvt);
|
---|
628 | ULONG rcOs2 = DosDevIOCtl(pThis->hDev, IOCTL_ASYNC, ASYNC_GETCOMMEVENT, NULL, 0, NULL,
|
---|
629 | &fCommEvt, cbCommEvt, &cbCommEvt);
|
---|
630 | if (!rcOs2)
|
---|
631 | {
|
---|
632 | AssertReturn(cbCommEvt = sizeof(fCommEvt), VERR_IPE_UNEXPECTED_STATUS);
|
---|
633 |
|
---|
634 | if ( (fEvtMask & RTSERIALPORT_EVT_F_DATA_RX)
|
---|
635 | && (fCommEvt & OS2_GET_COMM_EVT_RX))
|
---|
636 | *pfEvtsRecv |= RTSERIALPORT_EVT_F_DATA_RX;
|
---|
637 |
|
---|
638 | /** @todo Is there something better to indicate that there is room in the queue instead of queue is empty? */
|
---|
639 | if ( (fEvtMask & RTSERIALPORT_EVT_F_DATA_TX)
|
---|
640 | && (fCommEvt & OS2_GET_COMM_EVT_TX_EMPTY))
|
---|
641 | *pfEvtsRecv |= RTSERIALPORT_EVT_F_DATA_TX;
|
---|
642 |
|
---|
643 | if ( (fEvtMask & RTSERIALPORT_EVT_F_STATUS_LINE_CHANGED)
|
---|
644 | && (fCommEvt & (OS2_GET_COMM_EVT_CTS_CHG | OS2_GET_COMM_EVT_DSR_CHG | OS2_GET_COMM_EVT_DCD_CHG)))
|
---|
645 | *pfEvtsRecv |= RTSERIALPORT_EVT_F_STATUS_LINE_CHANGED;
|
---|
646 |
|
---|
647 | if ( (fEvtMask & RTSERIALPORT_EVT_F_BREAK_DETECTED)
|
---|
648 | && (fCommEvt & OS2_GET_COMM_EVT_BRK))
|
---|
649 | *pfEvtsRecv |= RTSERIALPORT_EVT_F_BREAK_DETECTED;
|
---|
650 |
|
---|
651 | if (*pfEvtsRecv != 0)
|
---|
652 | break;
|
---|
653 | }
|
---|
654 | else
|
---|
655 | {
|
---|
656 | rc = RTErrConvertFromOS2(rcOs2);
|
---|
657 | break;
|
---|
658 | }
|
---|
659 |
|
---|
660 | uint64_t tsNow = RTTimeSystemMilliTS();
|
---|
661 | if ( msTimeout == RT_INDEFINITE_WAIT
|
---|
662 | || tsNow - tsStart < msTimeout)
|
---|
663 | DosSleep(1);
|
---|
664 | else
|
---|
665 | rc = VERR_TIMEOUT;
|
---|
666 | } while (RT_SUCCESS(rc));
|
---|
667 |
|
---|
668 | return rc;
|
---|
669 | }
|
---|
670 |
|
---|
671 |
|
---|
672 | RTDECL(int) RTSerialPortEvtPollInterrupt(RTSERIALPORT hSerialPort)
|
---|
673 | {
|
---|
674 | PRTSERIALPORTINTERNAL pThis = hSerialPort;
|
---|
675 | AssertPtrReturn(pThis, VERR_INVALID_PARAMETER);
|
---|
676 | AssertReturn(pThis->u32Magic == RTSERIALPORT_MAGIC, VERR_INVALID_HANDLE);
|
---|
677 |
|
---|
678 | ASMAtomicXchgBool(&pThis->fInterrupt, true);
|
---|
679 | return VINF_SUCCESS;
|
---|
680 | }
|
---|
681 |
|
---|
682 |
|
---|
683 | RTDECL(int) RTSerialPortChgBreakCondition(RTSERIALPORT hSerialPort, bool fSet)
|
---|
684 | {
|
---|
685 | PRTSERIALPORTINTERNAL pThis = hSerialPort;
|
---|
686 | AssertPtrReturn(pThis, VERR_INVALID_PARAMETER);
|
---|
687 | AssertReturn(pThis->u32Magic == RTSERIALPORT_MAGIC, VERR_INVALID_HANDLE);
|
---|
688 |
|
---|
689 | ULONG rcOs2 = DosDevIOCtl(pThis->hDev, IOCTL_ASYNC, fSet ? ASYNC_SETBREAKON : ASYNC_SETBREAKOFF,
|
---|
690 | NULL, 0, NULL, NULL, 0, NULL);
|
---|
691 |
|
---|
692 | return RTErrConvertFromOS2(rcOs2);
|
---|
693 | }
|
---|
694 |
|
---|
695 |
|
---|
696 | RTDECL(int) RTSerialPortChgStatusLines(RTSERIALPORT hSerialPort, uint32_t fClear, uint32_t fSet)
|
---|
697 | {
|
---|
698 | PRTSERIALPORTINTERNAL pThis = hSerialPort;
|
---|
699 | AssertPtrReturn(pThis, VERR_INVALID_PARAMETER);
|
---|
700 | AssertReturn(pThis->u32Magic == RTSERIALPORT_MAGIC, VERR_INVALID_HANDLE);
|
---|
701 |
|
---|
702 | MODEMSTATUS MdmSts;
|
---|
703 | ULONG cbMdmSts = sizeof(MdmSts);
|
---|
704 |
|
---|
705 | MdmSts.fbModemOn = (fSet & RTSERIALPORT_CHG_STS_LINES_F_RTS ? 0x02 : 0x00)
|
---|
706 | | (fSet & RTSERIALPORT_CHG_STS_LINES_F_DTR ? 0x01 : 0x00);
|
---|
707 | MdmSts.fbModemOff = 0xff;
|
---|
708 | MdmSts.fbModemOff &= ~( (fClear & RTSERIALPORT_CHG_STS_LINES_F_RTS ? 0x02 : 0x00)
|
---|
709 | | (fClear & RTSERIALPORT_CHG_STS_LINES_F_DTR ? 0x01 : 0x00));
|
---|
710 |
|
---|
711 | ULONG rcOs2 = DosDevIOCtl(pThis->hDev, IOCTL_ASYNC, ASYNC_SETMODEMCTRL, &MdmSts, cbMdmSts, &cbMdmSts, NULL, 0, NULL);
|
---|
712 |
|
---|
713 | return RTErrConvertFromOS2(rcOs2);
|
---|
714 | }
|
---|
715 |
|
---|
716 |
|
---|
717 | RTDECL(int) RTSerialPortQueryStatusLines(RTSERIALPORT hSerialPort, uint32_t *pfStsLines)
|
---|
718 | {
|
---|
719 | PRTSERIALPORTINTERNAL pThis = hSerialPort;
|
---|
720 | AssertPtrReturn(pThis, VERR_INVALID_PARAMETER);
|
---|
721 | AssertReturn(pThis->u32Magic == RTSERIALPORT_MAGIC, VERR_INVALID_HANDLE);
|
---|
722 | AssertPtrReturn(pfStsLines, VERR_INVALID_POINTER);
|
---|
723 |
|
---|
724 | *pfStsLines = 0;
|
---|
725 |
|
---|
726 | int rc = VINF_SUCCESS;
|
---|
727 | BYTE fStsLines = 0;
|
---|
728 | ULONG cbStsLines = sizeof(fStsLines);
|
---|
729 | ULONG rcOs2 = DosDevIOCtl(pThis->hDev, IOCTL_ASYNC, ASYNC_GETMODEMINPUT, NULL, 0, NULL, &fStsLines, cbStsLines, &cbStsLines);
|
---|
730 | if (!rcOs2)
|
---|
731 | {
|
---|
732 | AssertReturn(cbStsLines == sizeof(BYTE), VERR_IPE_UNEXPECTED_STATUS);
|
---|
733 |
|
---|
734 | *pfStsLines |= (fStsLines & OS2_GET_MODEM_INPUT_DCD) ? RTSERIALPORT_STS_LINE_DCD : 0;
|
---|
735 | *pfStsLines |= (fStsLines & OS2_GET_MODEM_INPUT_RI) ? RTSERIALPORT_STS_LINE_RI : 0;
|
---|
736 | *pfStsLines |= (fStsLines & OS2_GET_MODEM_INPUT_DSR) ? RTSERIALPORT_STS_LINE_DSR : 0;
|
---|
737 | *pfStsLines |= (fStsLines & OS2_GET_MODEM_INPUT_CTS) ? RTSERIALPORT_STS_LINE_CTS : 0;
|
---|
738 | }
|
---|
739 | else
|
---|
740 | rc = RTErrConvertFromOS2(rcOs2);
|
---|
741 |
|
---|
742 | return rc;
|
---|
743 | }
|
---|
744 |
|
---|