1 | ; $Id: rintf.asm 106061 2024-09-16 14:03:52Z vboxsync $
|
---|
2 | ;; @file
|
---|
3 | ; IPRT - No-CRT rintf - AMD64 & X86.
|
---|
4 | ;
|
---|
5 |
|
---|
6 | ;
|
---|
7 | ; Copyright (C) 2022-2024 Oracle and/or its affiliates.
|
---|
8 | ;
|
---|
9 | ; This file is part of VirtualBox base platform packages, as
|
---|
10 | ; available from https://www.virtualbox.org.
|
---|
11 | ;
|
---|
12 | ; This program is free software; you can redistribute it and/or
|
---|
13 | ; modify it under the terms of the GNU General Public License
|
---|
14 | ; as published by the Free Software Foundation, in version 3 of the
|
---|
15 | ; License.
|
---|
16 | ;
|
---|
17 | ; This program is distributed in the hope that it will be useful, but
|
---|
18 | ; WITHOUT ANY WARRANTY; without even the implied warranty of
|
---|
19 | ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
---|
20 | ; General Public License for more details.
|
---|
21 | ;
|
---|
22 | ; You should have received a copy of the GNU General Public License
|
---|
23 | ; along with this program; if not, see <https://www.gnu.org/licenses>.
|
---|
24 | ;
|
---|
25 | ; The contents of this file may alternatively be used under the terms
|
---|
26 | ; of the Common Development and Distribution License Version 1.0
|
---|
27 | ; (CDDL), a copy of it is provided in the "COPYING.CDDL" file included
|
---|
28 | ; in the VirtualBox distribution, in which case the provisions of the
|
---|
29 | ; CDDL are applicable instead of those of the GPL.
|
---|
30 | ;
|
---|
31 | ; You may elect to license modified versions of this file under the
|
---|
32 | ; terms and conditions of either the GPL or the CDDL or both.
|
---|
33 | ;
|
---|
34 | ; SPDX-License-Identifier: GPL-3.0-only OR CDDL-1.0
|
---|
35 | ;
|
---|
36 |
|
---|
37 |
|
---|
38 | %define RT_ASM_WITH_SEH64
|
---|
39 | %include "iprt/asmdefs.mac"
|
---|
40 | %include "iprt/x86.mac"
|
---|
41 |
|
---|
42 |
|
---|
43 | BEGINCODE
|
---|
44 |
|
---|
45 | ;;
|
---|
46 | ; Round to integer value according to current rounding mode.
|
---|
47 | ;
|
---|
48 | ; ASSUME FCW and MXCSR are in sync for AMD64.
|
---|
49 | ;
|
---|
50 | ; @returns st(0) / xmm0
|
---|
51 | ; @param rd [rbp + 08h] / xmm0
|
---|
52 | RT_NOCRT_BEGINPROC rintf
|
---|
53 | push xBP
|
---|
54 | SEH64_PUSH_xBP
|
---|
55 | mov xBP, xSP
|
---|
56 | SEH64_SET_FRAME_xBP 0
|
---|
57 | %ifdef RT_ARCH_AMD64
|
---|
58 | sub xSP, 10h
|
---|
59 | SEH64_ALLOCATE_STACK 10h
|
---|
60 | %endif
|
---|
61 | SEH64_END_PROLOGUE
|
---|
62 |
|
---|
63 | ;
|
---|
64 | ; Load the value into st(0). This messes up SNaN values.
|
---|
65 | ;
|
---|
66 | %ifdef RT_ARCH_AMD64
|
---|
67 | movss dword [xSP], xmm0
|
---|
68 | fld dword [xSP]
|
---|
69 | %else
|
---|
70 | fld dword [xBP + xCB*2]
|
---|
71 | %endif
|
---|
72 |
|
---|
73 | ;
|
---|
74 | ; Return immediately if NaN or infinity.
|
---|
75 | ;
|
---|
76 | fxam
|
---|
77 | fstsw ax
|
---|
78 | test ax, X86_FSW_C0 ; C0 is set for NaN, Infinity and Empty register. The latter is not the case.
|
---|
79 | jz .input_ok
|
---|
80 | %ifdef RT_ARCH_AMD64
|
---|
81 | ffreep st0 ; return the xmm0 register value unchanged, as FLD changes SNaN to QNaN.
|
---|
82 | %endif
|
---|
83 | jmp .return
|
---|
84 | .input_ok:
|
---|
85 |
|
---|
86 | ;
|
---|
87 | ; Do the job and return.
|
---|
88 | ;
|
---|
89 | frndint
|
---|
90 |
|
---|
91 | %ifdef RT_ARCH_AMD64
|
---|
92 | fstp dword [xSP]
|
---|
93 | movss xmm0, dword [xSP]
|
---|
94 | %endif
|
---|
95 | .return:
|
---|
96 | leave
|
---|
97 | ret
|
---|
98 | ENDPROC RT_NOCRT(rintf)
|
---|
99 |
|
---|