VirtualBox

source: vbox/trunk/src/VBox/Main/src-client/ConsoleImplConfigX86.cpp@ 101481

Last change on this file since 101481 was 101477, checked in by vboxsync, 17 months ago

Main/ConsoleImpl: Use the common method to configure the graphics controller respecting monitor count and VRAM settings, bugref:10528

  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
File size: 84.2 KB
Line 
1/* $Id: ConsoleImplConfigX86.cpp 101477 2023-10-17 12:09:33Z vboxsync $ */
2/** @file
3 * VBox Console COM Class implementation - VM Configuration Bits.
4 *
5 * @remark We've split out the code that the 64-bit VC++ v8 compiler finds
6 * problematic to optimize so we can disable optimizations and later,
7 * perhaps, find a real solution for it (like rewriting the code and
8 * to stop resemble a tonne of spaghetti).
9 */
10
11/*
12 * Copyright (C) 2006-2023 Oracle and/or its affiliates.
13 *
14 * This file is part of VirtualBox base platform packages, as
15 * available from https://www.virtualbox.org.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License
19 * as published by the Free Software Foundation, in version 3 of the
20 * License.
21 *
22 * This program is distributed in the hope that it will be useful, but
23 * WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
25 * General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, see <https://www.gnu.org/licenses>.
29 *
30 * SPDX-License-Identifier: GPL-3.0-only
31 */
32
33
34/*********************************************************************************************************************************
35* Header Files *
36*********************************************************************************************************************************/
37#define LOG_GROUP LOG_GROUP_MAIN_CONSOLE
38#include "LoggingNew.h"
39
40// VBoxNetCfg-win.h needs winsock2.h and thus MUST be included before any other
41// header file includes Windows.h.
42#if defined(RT_OS_WINDOWS) && defined(VBOX_WITH_NETFLT)
43# include <VBox/VBoxNetCfg-win.h>
44#endif
45
46#include "ConsoleImpl.h"
47#include "DisplayImpl.h"
48#include "NvramStoreImpl.h"
49#include "PlatformImpl.h"
50#include "VMMDev.h"
51#include "Global.h"
52#ifdef VBOX_WITH_PCI_PASSTHROUGH
53# include "PCIRawDevImpl.h"
54#endif
55
56// generated header
57#include "SchemaDefs.h"
58
59#include "AutoCaller.h"
60
61#include <iprt/base64.h>
62#include <iprt/buildconfig.h>
63#include <iprt/ctype.h>
64#include <iprt/dir.h>
65#include <iprt/file.h>
66#include <iprt/param.h>
67#include <iprt/path.h>
68#include <iprt/string.h>
69#include <iprt/system.h>
70#if 0 /* enable to play with lots of memory. */
71# include <iprt/env.h>
72#endif
73#include <iprt/stream.h>
74
75#include <iprt/http.h>
76#include <iprt/socket.h>
77#include <iprt/uri.h>
78
79#include <VBox/vmm/vmmr3vtable.h>
80#include <VBox/vmm/vmapi.h>
81#include <VBox/err.h>
82#include <VBox/param.h>
83#include <VBox/settings.h> /* For MachineConfigFile::getHostDefaultAudioDriver(). */
84#include <VBox/vmm/pdmapi.h> /* For PDMR3DriverAttach/PDMR3DriverDetach. */
85#include <VBox/vmm/pdmusb.h> /* For PDMR3UsbCreateEmulatedDevice. */
86#include <VBox/vmm/pdmdev.h> /* For PDMAPICMODE enum. */
87#include <VBox/vmm/pdmstorageifs.h>
88#include <VBox/vmm/gcm.h>
89#include <VBox/version.h>
90#ifdef VBOX_WITH_GUEST_PROPS
91# include <VBox/HostServices/GuestPropertySvc.h>
92# include <VBox/com/defs.h>
93# include <VBox/com/array.h>
94# include <vector>
95#endif /* VBOX_WITH_GUEST_PROPS */
96#include <VBox/intnet.h>
97
98#include <VBox/com/com.h>
99#include <VBox/com/string.h>
100#include <VBox/com/array.h>
101
102#ifdef VBOX_WITH_NETFLT
103# if defined(RT_OS_SOLARIS)
104# include <zone.h>
105# elif defined(RT_OS_LINUX)
106# include <unistd.h>
107# include <sys/ioctl.h>
108# include <sys/socket.h>
109# include <linux/types.h>
110# include <linux/if.h>
111# elif defined(RT_OS_FREEBSD)
112# include <unistd.h>
113# include <sys/types.h>
114# include <sys/ioctl.h>
115# include <sys/socket.h>
116# include <net/if.h>
117# include <net80211/ieee80211_ioctl.h>
118# endif
119# if defined(RT_OS_WINDOWS)
120# include <iprt/win/ntddndis.h>
121# include <devguid.h>
122# else
123# include <HostNetworkInterfaceImpl.h>
124# include <netif.h>
125# include <stdlib.h>
126# endif
127#endif /* VBOX_WITH_NETFLT */
128
129#ifdef VBOX_WITH_AUDIO_VRDE
130# include "DrvAudioVRDE.h"
131#endif
132#ifdef VBOX_WITH_AUDIO_RECORDING
133# include "DrvAudioRec.h"
134#endif
135#include "NetworkServiceRunner.h"
136#include "BusAssignmentManager.h"
137#ifdef VBOX_WITH_EXTPACK
138# include "ExtPackManagerImpl.h"
139#endif
140
141
142/*********************************************************************************************************************************
143* Internal Functions *
144*********************************************************************************************************************************/
145
146/* Darwin compile kludge */
147#undef PVM
148
149/**
150 * @throws HRESULT on extra data retrival error.
151 */
152static int getSmcDeviceKey(IVirtualBox *pVirtualBox, IMachine *pMachine, Utf8Str *pStrKey, bool *pfGetKeyFromRealSMC)
153{
154 *pfGetKeyFromRealSMC = false;
155
156 /*
157 * The extra data takes precedence (if non-zero).
158 */
159 GetExtraDataBoth(pVirtualBox, pMachine, "VBoxInternal2/SmcDeviceKey", pStrKey);
160 if (pStrKey->isNotEmpty())
161 return VINF_SUCCESS;
162
163#ifdef RT_OS_DARWIN
164
165 /*
166 * Work done in EFI/DevSmc
167 */
168 *pfGetKeyFromRealSMC = true;
169 int vrc = VINF_SUCCESS;
170
171#else
172 /*
173 * Is it apple hardware in bootcamp?
174 */
175 /** @todo implement + test RTSYSDMISTR_MANUFACTURER on all hosts.
176 * Currently falling back on the product name. */
177 char szManufacturer[256];
178 szManufacturer[0] = '\0';
179 RTSystemQueryDmiString(RTSYSDMISTR_MANUFACTURER, szManufacturer, sizeof(szManufacturer));
180 if (szManufacturer[0] != '\0')
181 {
182 if ( !strcmp(szManufacturer, "Apple Computer, Inc.")
183 || !strcmp(szManufacturer, "Apple Inc.")
184 )
185 *pfGetKeyFromRealSMC = true;
186 }
187 else
188 {
189 char szProdName[256];
190 szProdName[0] = '\0';
191 RTSystemQueryDmiString(RTSYSDMISTR_PRODUCT_NAME, szProdName, sizeof(szProdName));
192 if ( ( !strncmp(szProdName, RT_STR_TUPLE("Mac"))
193 || !strncmp(szProdName, RT_STR_TUPLE("iMac"))
194 || !strncmp(szProdName, RT_STR_TUPLE("Xserve"))
195 )
196 && !strchr(szProdName, ' ') /* no spaces */
197 && RT_C_IS_DIGIT(szProdName[strlen(szProdName) - 1]) /* version number */
198 )
199 *pfGetKeyFromRealSMC = true;
200 }
201
202 int vrc = VINF_SUCCESS;
203#endif
204
205 return vrc;
206}
207
208
209/*
210 * VC++ 8 / amd64 has some serious trouble with the next functions.
211 * As a temporary measure, we'll drop global optimizations.
212 */
213#if defined(_MSC_VER) && defined(RT_ARCH_AMD64)
214# if _MSC_VER >= RT_MSC_VER_VC80 && _MSC_VER < RT_MSC_VER_VC100
215# pragma optimize("g", off)
216# endif
217#endif
218
219/** Helper that finds out the next HBA port used
220 */
221static LONG GetNextUsedPort(LONG aPortUsed[30], LONG lBaseVal, uint32_t u32Size)
222{
223 LONG lNextPortUsed = 30;
224 for (size_t j = 0; j < u32Size; ++j)
225 {
226 if ( aPortUsed[j] > lBaseVal
227 && aPortUsed[j] <= lNextPortUsed)
228 lNextPortUsed = aPortUsed[j];
229 }
230 return lNextPortUsed;
231}
232
233#define MAX_BIOS_LUN_COUNT 4
234
235int Console::SetBiosDiskInfo(ComPtr<IMachine> pMachine, PCFGMNODE pCfg, PCFGMNODE pBiosCfg,
236 Bstr controllerName, const char * const s_apszBiosConfig[4])
237{
238 RT_NOREF(pCfg);
239 HRESULT hrc;
240#define MAX_DEVICES 30
241#define H() AssertLogRelMsgReturn(!FAILED(hrc), ("hrc=%Rhrc\n", hrc), VERR_MAIN_CONFIG_CONSTRUCTOR_COM_ERROR)
242#define VRC() AssertLogRelMsgReturn(RT_SUCCESS(vrc), ("vrc=%Rrc\n", vrc), vrc)
243
244 LONG lPortLUN[MAX_BIOS_LUN_COUNT];
245 LONG lPortUsed[MAX_DEVICES];
246 uint32_t u32HDCount = 0;
247
248 /* init to max value */
249 lPortLUN[0] = MAX_DEVICES;
250
251 com::SafeIfaceArray<IMediumAttachment> atts;
252 hrc = pMachine->GetMediumAttachmentsOfController(controllerName.raw(),
253 ComSafeArrayAsOutParam(atts)); H();
254 size_t uNumAttachments = atts.size();
255 if (uNumAttachments > MAX_DEVICES)
256 {
257 LogRel(("Number of Attachments > Max=%d.\n", uNumAttachments));
258 uNumAttachments = MAX_DEVICES;
259 }
260
261 /* Find the relevant ports/IDs, i.e the ones to which a HD is attached. */
262 for (size_t j = 0; j < uNumAttachments; ++j)
263 {
264 IMediumAttachment *pMediumAtt = atts[j];
265 LONG lPortNum = 0;
266 hrc = pMediumAtt->COMGETTER(Port)(&lPortNum); H();
267 if (SUCCEEDED(hrc))
268 {
269 DeviceType_T lType;
270 hrc = pMediumAtt->COMGETTER(Type)(&lType); H();
271 if (SUCCEEDED(hrc) && lType == DeviceType_HardDisk)
272 {
273 /* find min port number used for HD */
274 if (lPortNum < lPortLUN[0])
275 lPortLUN[0] = lPortNum;
276 lPortUsed[u32HDCount++] = lPortNum;
277 LogFlowFunc(("HD port Count=%d\n", u32HDCount));
278 }
279 }
280 }
281
282
283 /* Pick only the top 4 used HD Ports as CMOS doesn't have space
284 * to save details for all 30 ports
285 */
286 uint32_t u32MaxPortCount = MAX_BIOS_LUN_COUNT;
287 if (u32HDCount < MAX_BIOS_LUN_COUNT)
288 u32MaxPortCount = u32HDCount;
289 for (size_t j = 1; j < u32MaxPortCount; j++)
290 lPortLUN[j] = GetNextUsedPort(lPortUsed, lPortLUN[j-1], u32HDCount);
291 if (pBiosCfg)
292 {
293 for (size_t j = 0; j < u32MaxPortCount; j++)
294 {
295 InsertConfigInteger(pBiosCfg, s_apszBiosConfig[j], lPortLUN[j]);
296 LogFlowFunc(("Top %d HBA ports = %s, %d\n", j, s_apszBiosConfig[j], lPortLUN[j]));
297 }
298 }
299 return VINF_SUCCESS;
300}
301
302#ifdef VBOX_WITH_PCI_PASSTHROUGH
303HRESULT Console::i_attachRawPCIDevices(PUVM pUVM, BusAssignmentManager *pBusMgr, PCFGMNODE pDevices)
304{
305# ifndef VBOX_WITH_EXTPACK
306 RT_NOREF(pUVM);
307# endif
308 HRESULT hrc = S_OK;
309 PCFGMNODE pInst, pCfg, pLunL0, pLunL1;
310
311 SafeIfaceArray<IPCIDeviceAttachment> assignments;
312 ComPtr<IMachine> aMachine = i_machine();
313
314 hrc = aMachine->COMGETTER(PCIDeviceAssignments)(ComSafeArrayAsOutParam(assignments));
315 if ( hrc != S_OK
316 || assignments.size() < 1)
317 return hrc;
318
319 /*
320 * PCI passthrough is only available if the proper ExtPack is installed.
321 *
322 * Note. Configuring PCI passthrough here and providing messages about
323 * the missing extpack isn't exactly clean, but it is a necessary evil
324 * to patch over legacy compatability issues introduced by the new
325 * distribution model.
326 */
327# ifdef VBOX_WITH_EXTPACK
328 static const char *s_pszPCIRawExtPackName = "Oracle VM VirtualBox Extension Pack";
329 if (!mptrExtPackManager->i_isExtPackUsable(s_pszPCIRawExtPackName))
330 /* Always fatal! */
331 return pVMM->pfnVMR3SetError(pUVM, VERR_NOT_FOUND, RT_SRC_POS,
332 N_("Implementation of the PCI passthrough framework not found!\n"
333 "The VM cannot be started. To fix this problem, either "
334 "install the '%s' or disable PCI passthrough via VBoxManage"),
335 s_pszPCIRawExtPackName);
336# endif
337
338 /* Now actually add devices */
339 PCFGMNODE pPCIDevs = NULL;
340
341 if (assignments.size() > 0)
342 {
343 InsertConfigNode(pDevices, "pciraw", &pPCIDevs);
344
345 PCFGMNODE pRoot = CFGMR3GetParent(pDevices); Assert(pRoot);
346
347 /* Tell PGM to tell GPCIRaw about guest mappings. */
348 CFGMR3InsertNode(pRoot, "PGM", NULL);
349 InsertConfigInteger(CFGMR3GetChild(pRoot, "PGM"), "PciPassThrough", 1);
350
351 /*
352 * Currently, using IOMMU needed for PCI passthrough
353 * requires RAM preallocation.
354 */
355 /** @todo check if we can lift this requirement */
356 CFGMR3RemoveValue(pRoot, "RamPreAlloc");
357 InsertConfigInteger(pRoot, "RamPreAlloc", 1);
358 }
359
360 for (size_t iDev = 0; iDev < assignments.size(); iDev++)
361 {
362 ComPtr<IPCIDeviceAttachment> const assignment = assignments[iDev];
363
364 LONG host;
365 hrc = assignment->COMGETTER(HostAddress)(&host); H();
366 LONG guest;
367 hrc = assignment->COMGETTER(GuestAddress)(&guest); H();
368 Bstr bstrDevName;
369 hrc = assignment->COMGETTER(Name)(bstrDevName.asOutParam()); H();
370
371 InsertConfigNodeF(pPCIDevs, &pInst, "%d", iDev);
372 InsertConfigInteger(pInst, "Trusted", 1);
373
374 PCIBusAddress HostPCIAddress(host);
375 Assert(HostPCIAddress.valid());
376 InsertConfigNode(pInst, "Config", &pCfg);
377 InsertConfigString(pCfg, "DeviceName", bstrDevName);
378
379 InsertConfigInteger(pCfg, "DetachHostDriver", 1);
380 InsertConfigInteger(pCfg, "HostPCIBusNo", HostPCIAddress.miBus);
381 InsertConfigInteger(pCfg, "HostPCIDeviceNo", HostPCIAddress.miDevice);
382 InsertConfigInteger(pCfg, "HostPCIFunctionNo", HostPCIAddress.miFn);
383
384 PCIBusAddress GuestPCIAddress(guest);
385 Assert(GuestPCIAddress.valid());
386 hrc = pBusMgr->assignHostPCIDevice("pciraw", pInst, HostPCIAddress, GuestPCIAddress, true);
387 if (hrc != S_OK)
388 return hrc;
389
390 InsertConfigInteger(pCfg, "GuestPCIBusNo", GuestPCIAddress.miBus);
391 InsertConfigInteger(pCfg, "GuestPCIDeviceNo", GuestPCIAddress.miDevice);
392 InsertConfigInteger(pCfg, "GuestPCIFunctionNo", GuestPCIAddress.miFn);
393
394 /* the driver */
395 InsertConfigNode(pInst, "LUN#0", &pLunL0);
396 InsertConfigString(pLunL0, "Driver", "pciraw");
397 InsertConfigNode(pLunL0, "AttachedDriver", &pLunL1);
398
399 /* the Main driver */
400 InsertConfigString(pLunL1, "Driver", "MainPciRaw");
401 InsertConfigNode(pLunL1, "Config", &pCfg);
402 PCIRawDev *pMainDev = new PCIRawDev(this);
403# error This is not allowed any more
404 InsertConfigInteger(pCfg, "Object", (uintptr_t)pMainDev);
405 }
406
407 return hrc;
408}
409#endif
410
411
412/**
413 * Worker for configConstructor.
414 *
415 * @return VBox status code.
416 * @param pUVM The user mode VM handle.
417 * @param pVM The cross context VM handle.
418 * @param pVMM The VMM vtable.
419 * @param pAlock The automatic lock instance. This is for when we have
420 * to leave it in order to avoid deadlocks (ext packs and
421 * more).
422 */
423int Console::i_configConstructorX86(PUVM pUVM, PVM pVM, PCVMMR3VTABLE pVMM, AutoWriteLock *pAlock)
424{
425 RT_NOREF(pVM /* when everything is disabled */);
426 ComPtr<IMachine> pMachine = i_machine();
427
428 int vrc;
429 HRESULT hrc;
430 Utf8Str strTmp;
431 Bstr bstr;
432
433#define H() AssertLogRelMsgReturn(!FAILED(hrc), ("hrc=%Rhrc\n", hrc), VERR_MAIN_CONFIG_CONSTRUCTOR_COM_ERROR)
434
435 /*
436 * Get necessary objects and frequently used parameters.
437 */
438 ComPtr<IVirtualBox> virtualBox;
439 hrc = pMachine->COMGETTER(Parent)(virtualBox.asOutParam()); H();
440
441 ComPtr<IHost> host;
442 hrc = virtualBox->COMGETTER(Host)(host.asOutParam()); H();
443
444 ComPtr<ISystemProperties> systemProperties;
445 hrc = virtualBox->COMGETTER(SystemProperties)(systemProperties.asOutParam()); H();
446
447 ComPtr<IFirmwareSettings> firmwareSettings;
448 hrc = pMachine->COMGETTER(FirmwareSettings)(firmwareSettings.asOutParam()); H();
449
450 ComPtr<INvramStore> nvramStore;
451 hrc = pMachine->COMGETTER(NonVolatileStore)(nvramStore.asOutParam()); H();
452
453 hrc = pMachine->COMGETTER(HardwareUUID)(bstr.asOutParam()); H();
454 RTUUID HardwareUuid;
455 vrc = RTUuidFromUtf16(&HardwareUuid, bstr.raw());
456 AssertRCReturn(vrc, vrc);
457
458 ULONG cRamMBs;
459 hrc = pMachine->COMGETTER(MemorySize)(&cRamMBs); H();
460#if 0 /* enable to play with lots of memory. */
461 if (RTEnvExist("VBOX_RAM_SIZE"))
462 cRamMBs = RTStrToUInt64(RTEnvGet("VBOX_RAM_SIZE"));
463#endif
464 uint64_t const cbRam = cRamMBs * (uint64_t)_1M;
465 uint32_t cbRamHole = MM_RAM_HOLE_SIZE_DEFAULT;
466 uint64_t uMcfgBase = 0;
467 uint32_t cbMcfgLength = 0;
468
469 ParavirtProvider_T enmParavirtProvider;
470 hrc = pMachine->GetEffectiveParavirtProvider(&enmParavirtProvider); H();
471
472 Bstr strParavirtDebug;
473 hrc = pMachine->COMGETTER(ParavirtDebug)(strParavirtDebug.asOutParam()); H();
474
475 BOOL fIOAPIC;
476 uint32_t uIoApicPciAddress = NIL_PCIBDF;
477 hrc = firmwareSettings->COMGETTER(IOAPICEnabled)(&fIOAPIC); H();
478
479 ComPtr<IPlatform> platform;
480 pMachine->COMGETTER(Platform)(platform.asOutParam()); H();
481
482 ChipsetType_T chipsetType;
483 hrc = platform->COMGETTER(ChipsetType)(&chipsetType); H();
484 if (chipsetType == ChipsetType_ICH9)
485 {
486 /* We'd better have 0x10000000 region, to cover 256 buses but this put
487 * too much load on hypervisor heap. Linux 4.8 currently complains with
488 * ``acpi PNP0A03:00: [Firmware Info]: MMCONFIG for domain 0000 [bus 00-3f]
489 * only partially covers this bridge'' */
490 cbMcfgLength = 0x4000000; //0x10000000;
491 cbRamHole += cbMcfgLength;
492 uMcfgBase = _4G - cbRamHole;
493 }
494
495 /* Get the CPU profile name. */
496 Bstr bstrCpuProfile;
497 hrc = pMachine->COMGETTER(CPUProfile)(bstrCpuProfile.asOutParam()); H();
498
499 /* Get the X86 platform object. */
500 ComPtr<IPlatformX86> platformX86;
501 hrc = platform->COMGETTER(X86)(platformX86.asOutParam()); H();
502
503 /* Check if long mode is enabled. */
504 BOOL fIsGuest64Bit;
505 hrc = platformX86->GetCPUProperty(CPUPropertyTypeX86_LongMode, &fIsGuest64Bit); H();
506
507 /*
508 * Figure out the IOMMU config.
509 */
510#if defined(VBOX_WITH_IOMMU_AMD) || defined(VBOX_WITH_IOMMU_INTEL)
511 IommuType_T enmIommuType;
512 hrc = platform->COMGETTER(IommuType)(&enmIommuType); H();
513
514 /* Resolve 'automatic' type to an Intel or AMD IOMMU based on the host CPU. */
515 if (enmIommuType == IommuType_Automatic)
516 {
517 if ( bstrCpuProfile.startsWith("AMD")
518 || bstrCpuProfile.startsWith("Quad-Core AMD")
519 || bstrCpuProfile.startsWith("Hygon"))
520 enmIommuType = IommuType_AMD;
521 else if (bstrCpuProfile.startsWith("Intel"))
522 {
523 if ( bstrCpuProfile.equals("Intel 8086")
524 || bstrCpuProfile.equals("Intel 80186")
525 || bstrCpuProfile.equals("Intel 80286")
526 || bstrCpuProfile.equals("Intel 80386")
527 || bstrCpuProfile.equals("Intel 80486"))
528 enmIommuType = IommuType_None;
529 else
530 enmIommuType = IommuType_Intel;
531 }
532# if defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86)
533 else if (ASMIsAmdCpu())
534 enmIommuType = IommuType_AMD;
535 else if (ASMIsIntelCpu())
536 enmIommuType = IommuType_Intel;
537# endif
538 else
539 {
540 /** @todo Should we handle other CPUs like Shanghai, VIA etc. here? */
541 LogRel(("WARNING! Unrecognized CPU type, IOMMU disabled.\n"));
542 enmIommuType = IommuType_None;
543 }
544 }
545
546 if (enmIommuType == IommuType_AMD)
547 {
548# ifdef VBOX_WITH_IOMMU_AMD
549 /*
550 * Reserve the specific PCI address of the "SB I/O APIC" when using
551 * an AMD IOMMU. Required by Linux guests, see @bugref{9654#c23}.
552 */
553 uIoApicPciAddress = VBOX_PCI_BDF_SB_IOAPIC;
554# else
555 LogRel(("WARNING! AMD IOMMU not supported, IOMMU disabled.\n"));
556 enmIommuType = IommuType_None;
557# endif
558 }
559
560 if (enmIommuType == IommuType_Intel)
561 {
562# ifdef VBOX_WITH_IOMMU_INTEL
563 /*
564 * Reserve a unique PCI address for the I/O APIC when using
565 * an Intel IOMMU. For convenience we use the same address as
566 * we do on AMD, see @bugref{9967#c13}.
567 */
568 uIoApicPciAddress = VBOX_PCI_BDF_SB_IOAPIC;
569# else
570 LogRel(("WARNING! Intel IOMMU not supported, IOMMU disabled.\n"));
571 enmIommuType = IommuType_None;
572# endif
573 }
574
575 if ( enmIommuType == IommuType_AMD
576 || enmIommuType == IommuType_Intel)
577 {
578 if (chipsetType != ChipsetType_ICH9)
579 return pVMM->pfnVMR3SetError(pUVM, VERR_INVALID_PARAMETER, RT_SRC_POS,
580 N_("IOMMU uses MSIs which requires the ICH9 chipset implementation."));
581 if (!fIOAPIC)
582 return pVMM->pfnVMR3SetError(pUVM, VERR_INVALID_PARAMETER, RT_SRC_POS,
583 N_("IOMMU requires an I/O APIC for remapping interrupts."));
584 }
585#else
586 IommuType_T const enmIommuType = IommuType_None;
587#endif
588
589 /* Instantiate the bus assignment manager. */
590 Assert(enmIommuType != IommuType_Automatic);
591 BusAssignmentManager *pBusMgr = mBusMgr = BusAssignmentManager::createInstance(pVMM, chipsetType, enmIommuType);
592
593 ULONG cCpus = 1;
594 hrc = pMachine->COMGETTER(CPUCount)(&cCpus); H();
595
596 ULONG ulCpuExecutionCap = 100;
597 hrc = pMachine->COMGETTER(CPUExecutionCap)(&ulCpuExecutionCap); H();
598
599 LogRel(("Guest architecture: x86\n"));
600
601 Bstr osTypeId;
602 hrc = pMachine->COMGETTER(OSTypeId)(osTypeId.asOutParam()); H();
603 LogRel(("Guest OS type: '%s'\n", Utf8Str(osTypeId).c_str()));
604
605 APICMode_T apicMode;
606 hrc = firmwareSettings->COMGETTER(APICMode)(&apicMode); H();
607 uint32_t uFwAPIC;
608 switch (apicMode)
609 {
610 case APICMode_Disabled:
611 uFwAPIC = 0;
612 break;
613 case APICMode_APIC:
614 uFwAPIC = 1;
615 break;
616 case APICMode_X2APIC:
617 uFwAPIC = 2;
618 break;
619 default:
620 AssertMsgFailed(("Invalid APICMode=%d\n", apicMode));
621 uFwAPIC = 1;
622 break;
623 }
624
625 ComPtr<IGuestOSType> pGuestOSType;
626 virtualBox->GetGuestOSType(osTypeId.raw(), pGuestOSType.asOutParam());
627
628 BOOL fOsXGuest = FALSE;
629 BOOL fWinGuest = FALSE;
630 BOOL fOs2Guest = FALSE;
631 BOOL fW9xGuest = FALSE;
632 BOOL fDosGuest = FALSE;
633 if (pGuestOSType.isNotNull())
634 {
635 Bstr guestTypeFamilyId;
636 hrc = pGuestOSType->COMGETTER(FamilyId)(guestTypeFamilyId.asOutParam()); H();
637 fOsXGuest = guestTypeFamilyId == Bstr("MacOS");
638 fWinGuest = guestTypeFamilyId == Bstr("Windows");
639 fOs2Guest = osTypeId.startsWith(GUEST_OS_ID_STR_PARTIAL("OS2"));
640 fW9xGuest = osTypeId.startsWith(GUEST_OS_ID_STR_PARTIAL("Windows9")); /* Does not include Windows Me. */
641 fDosGuest = osTypeId.equals(GUEST_OS_ID_STR_X86("DOS")) || osTypeId.equals(GUEST_OS_ID_STR_X86("Windows31"));
642 }
643
644 ComPtr<IPlatformProperties> platformProperties;
645 virtualBox->GetPlatformProperties(PlatformArchitecture_x86, platformProperties.asOutParam());
646
647 /*
648 * Get root node first.
649 * This is the only node in the tree.
650 */
651 PCFGMNODE pRoot = pVMM->pfnCFGMR3GetRootU(pUVM);
652 Assert(pRoot);
653
654 // catching throws from InsertConfigString and friends.
655 try
656 {
657
658 /*
659 * Set the root (and VMM) level values.
660 */
661 hrc = pMachine->COMGETTER(Name)(bstr.asOutParam()); H();
662 InsertConfigString(pRoot, "Name", bstr);
663 InsertConfigBytes(pRoot, "UUID", &HardwareUuid, sizeof(HardwareUuid));
664 InsertConfigInteger(pRoot, "RamSize", cbRam);
665 InsertConfigInteger(pRoot, "RamHoleSize", cbRamHole);
666 InsertConfigInteger(pRoot, "NumCPUs", cCpus);
667 InsertConfigInteger(pRoot, "CpuExecutionCap", ulCpuExecutionCap);
668 InsertConfigInteger(pRoot, "TimerMillies", 10);
669
670 BOOL fPageFusion = FALSE;
671 hrc = pMachine->COMGETTER(PageFusionEnabled)(&fPageFusion); H();
672 InsertConfigInteger(pRoot, "PageFusionAllowed", fPageFusion); /* boolean */
673
674 /* Not necessary, but makes sure this setting ends up in the release log. */
675 ULONG ulBalloonSize = 0;
676 hrc = pMachine->COMGETTER(MemoryBalloonSize)(&ulBalloonSize); H();
677 InsertConfigInteger(pRoot, "MemBalloonSize", ulBalloonSize);
678
679 /*
680 * EM values (before CPUM as it may need to set IemExecutesAll).
681 */
682 PCFGMNODE pEM;
683 InsertConfigNode(pRoot, "EM", &pEM);
684
685 /* Triple fault behavior. */
686 BOOL fTripleFaultReset = false;
687 hrc = platformX86->GetCPUProperty(CPUPropertyTypeX86_TripleFaultReset, &fTripleFaultReset); H();
688 InsertConfigInteger(pEM, "TripleFaultReset", fTripleFaultReset);
689
690 /*
691 * CPUM values.
692 */
693 PCFGMNODE pCPUM;
694 InsertConfigNode(pRoot, "CPUM", &pCPUM);
695 PCFGMNODE pIsaExts;
696 InsertConfigNode(pCPUM, "IsaExts", &pIsaExts);
697
698 /* Host CPUID leaf overrides. */
699 for (uint32_t iOrdinal = 0; iOrdinal < _4K; iOrdinal++)
700 {
701 ULONG uLeaf, uSubLeaf, uEax, uEbx, uEcx, uEdx;
702 hrc = platformX86->GetCPUIDLeafByOrdinal(iOrdinal, &uLeaf, &uSubLeaf, &uEax, &uEbx, &uEcx, &uEdx);
703 if (hrc == E_INVALIDARG)
704 break;
705 H();
706 PCFGMNODE pLeaf;
707 InsertConfigNode(pCPUM, Utf8StrFmt("HostCPUID/%RX32", uLeaf).c_str(), &pLeaf);
708 /** @todo Figure out how to tell the VMM about uSubLeaf */
709 InsertConfigInteger(pLeaf, "eax", uEax);
710 InsertConfigInteger(pLeaf, "ebx", uEbx);
711 InsertConfigInteger(pLeaf, "ecx", uEcx);
712 InsertConfigInteger(pLeaf, "edx", uEdx);
713 }
714
715 /* We must limit CPUID count for Windows NT 4, as otherwise it stops
716 with error 0x3e (MULTIPROCESSOR_CONFIGURATION_NOT_SUPPORTED). */
717 if (osTypeId == GUEST_OS_ID_STR_X86("WindowsNT4"))
718 {
719 LogRel(("Limiting CPUID leaf count for NT4 guests\n"));
720 InsertConfigInteger(pCPUM, "NT4LeafLimit", true);
721 }
722
723 if (fOsXGuest)
724 {
725 /* Expose extended MWAIT features to Mac OS X guests. */
726 LogRel(("Using MWAIT extensions\n"));
727 InsertConfigInteger(pIsaExts, "MWaitExtensions", true);
728
729 /* Fake the CPU family/model so the guest works. This is partly
730 because older mac releases really doesn't work on newer cpus,
731 and partly because mac os x expects more from systems with newer
732 cpus (MSRs, power features, whatever). */
733 uint32_t uMaxIntelFamilyModelStep = UINT32_MAX;
734 if ( osTypeId == GUEST_OS_ID_STR_X86("MacOS")
735 || osTypeId == GUEST_OS_ID_STR_X64("MacOS"))
736 uMaxIntelFamilyModelStep = RT_MAKE_U32_FROM_U8(1, 23, 6, 0); /* Penryn / X5482. */
737 else if ( osTypeId == GUEST_OS_ID_STR_X86("MacOS106")
738 || osTypeId == GUEST_OS_ID_STR_X64("MacOS106"))
739 uMaxIntelFamilyModelStep = RT_MAKE_U32_FROM_U8(1, 23, 6, 0); /* Penryn / X5482 */
740 else if ( osTypeId == GUEST_OS_ID_STR_X86("MacOS107")
741 || osTypeId == GUEST_OS_ID_STR_X64("MacOS107"))
742 uMaxIntelFamilyModelStep = RT_MAKE_U32_FROM_U8(1, 23, 6, 0); /* Penryn / X5482 */ /** @todo figure out
743 what is required here. */
744 else if ( osTypeId == GUEST_OS_ID_STR_X86("MacOS108")
745 || osTypeId == GUEST_OS_ID_STR_X64("MacOS108"))
746 uMaxIntelFamilyModelStep = RT_MAKE_U32_FROM_U8(1, 23, 6, 0); /* Penryn / X5482 */ /** @todo figure out
747 what is required here. */
748 else if ( osTypeId == GUEST_OS_ID_STR_X86("MacOS109")
749 || osTypeId == GUEST_OS_ID_STR_X64("MacOS109"))
750 uMaxIntelFamilyModelStep = RT_MAKE_U32_FROM_U8(1, 23, 6, 0); /* Penryn / X5482 */ /** @todo figure
751 out what is required here. */
752 if (uMaxIntelFamilyModelStep != UINT32_MAX)
753 InsertConfigInteger(pCPUM, "MaxIntelFamilyModelStep", uMaxIntelFamilyModelStep);
754 }
755
756 /* CPU Portability level, */
757 ULONG uCpuIdPortabilityLevel = 0;
758 hrc = pMachine->COMGETTER(CPUIDPortabilityLevel)(&uCpuIdPortabilityLevel); H();
759 InsertConfigInteger(pCPUM, "PortableCpuIdLevel", uCpuIdPortabilityLevel);
760
761 /* Physical Address Extension (PAE) */
762 BOOL fEnablePAE = false;
763 hrc = platformX86->GetCPUProperty(CPUPropertyTypeX86_PAE, &fEnablePAE); H();
764 fEnablePAE |= fIsGuest64Bit;
765 InsertConfigInteger(pRoot, "EnablePAE", fEnablePAE);
766
767 /* 64-bit guests (long mode) */
768 InsertConfigInteger(pCPUM, "Enable64bit", fIsGuest64Bit);
769
770 /* APIC/X2APIC configuration */
771 BOOL fEnableAPIC = true;
772 BOOL fEnableX2APIC = true;
773 hrc = platformX86->GetCPUProperty(CPUPropertyTypeX86_APIC, &fEnableAPIC); H();
774 hrc = platformX86->GetCPUProperty(CPUPropertyTypeX86_X2APIC, &fEnableX2APIC); H();
775 if (fEnableX2APIC)
776 Assert(fEnableAPIC);
777
778 /* CPUM profile name. */
779 InsertConfigString(pCPUM, "GuestCpuName", bstrCpuProfile);
780
781 /*
782 * Temporary(?) hack to make sure we emulate the ancient 16-bit CPUs
783 * correctly. There are way too many #UDs we'll miss using VT-x,
784 * raw-mode or qemu for the 186 and 286, while we'll get undefined opcodes
785 * dead wrong on 8086 (see http://www.os2museum.com/wp/undocumented-8086-opcodes/).
786 */
787 if ( bstrCpuProfile.equals("Intel 80386") /* just for now */
788 || bstrCpuProfile.equals("Intel 80286")
789 || bstrCpuProfile.equals("Intel 80186")
790 || bstrCpuProfile.equals("Nec V20")
791 || bstrCpuProfile.equals("Intel 8086") )
792 {
793 InsertConfigInteger(pEM, "IemExecutesAll", true);
794 if (!bstrCpuProfile.equals("Intel 80386"))
795 {
796 fEnableAPIC = false;
797 fIOAPIC = false;
798 }
799 fEnableX2APIC = false;
800 }
801
802 /* Adjust firmware APIC handling to stay within the VCPU limits. */
803 if (uFwAPIC == 2 && !fEnableX2APIC)
804 {
805 if (fEnableAPIC)
806 uFwAPIC = 1;
807 else
808 uFwAPIC = 0;
809 LogRel(("Limiting the firmware APIC level from x2APIC to %s\n", fEnableAPIC ? "APIC" : "Disabled"));
810 }
811 else if (uFwAPIC == 1 && !fEnableAPIC)
812 {
813 uFwAPIC = 0;
814 LogRel(("Limiting the firmware APIC level from APIC to Disabled\n"));
815 }
816
817 /* Speculation Control. */
818 BOOL fSpecCtrl = FALSE;
819 hrc = platformX86->GetCPUProperty(CPUPropertyTypeX86_SpecCtrl, &fSpecCtrl); H();
820 InsertConfigInteger(pCPUM, "SpecCtrl", fSpecCtrl);
821
822 /* Nested VT-x / AMD-V. */
823 BOOL fNestedHWVirt = FALSE;
824 hrc = platformX86->GetCPUProperty(CPUPropertyTypeX86_HWVirt, &fNestedHWVirt); H();
825 InsertConfigInteger(pCPUM, "NestedHWVirt", fNestedHWVirt ? true : false);
826
827 /*
828 * Hardware virtualization extensions.
829 */
830 /* Sanitize valid/useful APIC combinations, see @bugref{8868}. */
831 if (!fEnableAPIC)
832 {
833 if (fIsGuest64Bit)
834 return pVMM->pfnVMR3SetError(pUVM, VERR_INVALID_PARAMETER, RT_SRC_POS,
835 N_("Cannot disable the APIC for a 64-bit guest."));
836 if (cCpus > 1)
837 return pVMM->pfnVMR3SetError(pUVM, VERR_INVALID_PARAMETER, RT_SRC_POS,
838 N_("Cannot disable the APIC for an SMP guest."));
839 if (fIOAPIC)
840 return pVMM->pfnVMR3SetError(pUVM, VERR_INVALID_PARAMETER, RT_SRC_POS,
841 N_("Cannot disable the APIC when the I/O APIC is present."));
842 }
843
844 BOOL fHMEnabled;
845 hrc = platformX86->GetHWVirtExProperty(HWVirtExPropertyType_Enabled, &fHMEnabled); H();
846 if (cCpus > 1 && !fHMEnabled)
847 {
848 LogRel(("Forced fHMEnabled to TRUE by SMP guest.\n"));
849 fHMEnabled = TRUE;
850 }
851
852 BOOL fHMForced;
853 fHMEnabled = fHMForced = TRUE;
854 LogRel(("fHMForced=true - No raw-mode support in this build!\n"));
855 if (!fHMForced) /* No need to query if already forced above. */
856 {
857 hrc = platformX86->GetHWVirtExProperty(HWVirtExPropertyType_Force, &fHMForced); H();
858 if (fHMForced)
859 LogRel(("fHMForced=true - HWVirtExPropertyType_Force\n"));
860 }
861 InsertConfigInteger(pRoot, "HMEnabled", fHMEnabled);
862
863 /* /HM/xyz */
864 PCFGMNODE pHM;
865 InsertConfigNode(pRoot, "HM", &pHM);
866 InsertConfigInteger(pHM, "HMForced", fHMForced);
867 if (fHMEnabled)
868 {
869 /* Indicate whether 64-bit guests are supported or not. */
870 InsertConfigInteger(pHM, "64bitEnabled", fIsGuest64Bit);
871
872 /** @todo Not exactly pretty to check strings; VBOXOSTYPE would be better,
873 but that requires quite a bit of API change in Main. */
874 if ( fIOAPIC
875 && ( osTypeId == GUEST_OS_ID_STR_X86("WindowsNT4")
876 || osTypeId == GUEST_OS_ID_STR_X86("Windows2000")
877 || osTypeId == GUEST_OS_ID_STR_X86("WindowsXP")
878 || osTypeId == GUEST_OS_ID_STR_X86("Windows2003")))
879 {
880 /* Only allow TPR patching for NT, Win2k, XP and Windows Server 2003. (32 bits mode)
881 * We may want to consider adding more guest OSes (Solaris) later on.
882 */
883 InsertConfigInteger(pHM, "TPRPatchingEnabled", 1);
884 }
885 }
886
887 /* HWVirtEx exclusive mode */
888 BOOL fHMExclusive = true;
889 hrc = platformProperties->COMGETTER(ExclusiveHwVirt)(&fHMExclusive); H();
890 InsertConfigInteger(pHM, "Exclusive", fHMExclusive);
891
892 /* Nested paging (VT-x/AMD-V) */
893 BOOL fEnableNestedPaging = false;
894 hrc = platformX86->GetHWVirtExProperty(HWVirtExPropertyType_NestedPaging, &fEnableNestedPaging); H();
895 InsertConfigInteger(pHM, "EnableNestedPaging", fEnableNestedPaging);
896
897 /* Large pages; requires nested paging */
898 BOOL fEnableLargePages = false;
899 hrc = platformX86->GetHWVirtExProperty(HWVirtExPropertyType_LargePages, &fEnableLargePages); H();
900 InsertConfigInteger(pHM, "EnableLargePages", fEnableLargePages);
901
902 /* VPID (VT-x) */
903 BOOL fEnableVPID = false;
904 hrc = platformX86->GetHWVirtExProperty(HWVirtExPropertyType_VPID, &fEnableVPID); H();
905 InsertConfigInteger(pHM, "EnableVPID", fEnableVPID);
906
907 /* Unrestricted execution aka UX (VT-x) */
908 BOOL fEnableUX = false;
909 hrc = platformX86->GetHWVirtExProperty(HWVirtExPropertyType_UnrestrictedExecution, &fEnableUX); H();
910 InsertConfigInteger(pHM, "EnableUX", fEnableUX);
911
912 /* Virtualized VMSAVE/VMLOAD (AMD-V) */
913 BOOL fVirtVmsaveVmload = true;
914 hrc = host->GetProcessorFeature(ProcessorFeature_VirtVmsaveVmload, &fVirtVmsaveVmload); H();
915 InsertConfigInteger(pHM, "SvmVirtVmsaveVmload", fVirtVmsaveVmload);
916
917 /* Indirect branch prediction boundraries. */
918 BOOL fIBPBOnVMExit = false;
919 hrc = platformX86->GetCPUProperty(CPUPropertyTypeX86_IBPBOnVMExit, &fIBPBOnVMExit); H();
920 InsertConfigInteger(pHM, "IBPBOnVMExit", fIBPBOnVMExit);
921
922 BOOL fIBPBOnVMEntry = false;
923 hrc = platformX86->GetCPUProperty(CPUPropertyTypeX86_IBPBOnVMEntry, &fIBPBOnVMEntry); H();
924 InsertConfigInteger(pHM, "IBPBOnVMEntry", fIBPBOnVMEntry);
925
926 BOOL fSpecCtrlByHost = false;
927 hrc = platformX86->GetCPUProperty(CPUPropertyTypeX86_SpecCtrlByHost, &fSpecCtrlByHost); H();
928 InsertConfigInteger(pHM, "SpecCtrlByHost", fSpecCtrlByHost);
929
930 BOOL fL1DFlushOnSched = true;
931 hrc = platformX86->GetCPUProperty(CPUPropertyTypeX86_L1DFlushOnEMTScheduling, &fL1DFlushOnSched); H();
932 InsertConfigInteger(pHM, "L1DFlushOnSched", fL1DFlushOnSched);
933
934 BOOL fL1DFlushOnVMEntry = false;
935 hrc = platformX86->GetCPUProperty(CPUPropertyTypeX86_L1DFlushOnVMEntry, &fL1DFlushOnVMEntry); H();
936 InsertConfigInteger(pHM, "L1DFlushOnVMEntry", fL1DFlushOnVMEntry);
937
938 BOOL fMDSClearOnSched = true;
939 hrc = platformX86->GetCPUProperty(CPUPropertyTypeX86_MDSClearOnEMTScheduling, &fMDSClearOnSched); H();
940 InsertConfigInteger(pHM, "MDSClearOnSched", fMDSClearOnSched);
941
942 BOOL fMDSClearOnVMEntry = false;
943 hrc = platformX86->GetCPUProperty(CPUPropertyTypeX86_MDSClearOnVMEntry, &fMDSClearOnVMEntry); H();
944 InsertConfigInteger(pHM, "MDSClearOnVMEntry", fMDSClearOnVMEntry);
945
946 /* Reset overwrite. */
947 mfTurnResetIntoPowerOff = GetExtraDataBoth(virtualBox, pMachine,
948 "VBoxInternal2/TurnResetIntoPowerOff", &strTmp)->equals("1");
949 if (mfTurnResetIntoPowerOff)
950 InsertConfigInteger(pRoot, "PowerOffInsteadOfReset", 1);
951
952 /* Use NEM rather than HM. */
953 BOOL fUseNativeApi = false;
954 hrc = platformX86->GetHWVirtExProperty(HWVirtExPropertyType_UseNativeApi, &fUseNativeApi); H();
955 InsertConfigInteger(pHM, "UseNEMInstead", fUseNativeApi);
956
957 /* Enable workaround for missing TLB flush for OS/2 guests, see ticketref:20625. */
958 if (fOs2Guest)
959 InsertConfigInteger(pHM, "MissingOS2TlbFlushWorkaround", 1);
960
961 /*
962 * NEM
963 */
964 PCFGMNODE pNEM;
965 InsertConfigNode(pRoot, "NEM", &pNEM);
966 InsertConfigInteger(pNEM, "Allow64BitGuests", fIsGuest64Bit);
967
968 /*
969 * Paravirt. provider.
970 */
971 PCFGMNODE pParavirtNode;
972 InsertConfigNode(pRoot, "GIM", &pParavirtNode);
973 const char *pcszParavirtProvider;
974 bool fGimDeviceNeeded = true;
975 switch (enmParavirtProvider)
976 {
977 case ParavirtProvider_None:
978 pcszParavirtProvider = "None";
979 fGimDeviceNeeded = false;
980 break;
981
982 case ParavirtProvider_Minimal:
983 pcszParavirtProvider = "Minimal";
984 break;
985
986 case ParavirtProvider_HyperV:
987 pcszParavirtProvider = "HyperV";
988 break;
989
990 case ParavirtProvider_KVM:
991 pcszParavirtProvider = "KVM";
992 break;
993
994 default:
995 AssertMsgFailed(("Invalid enmParavirtProvider=%d\n", enmParavirtProvider));
996 return pVMM->pfnVMR3SetError(pUVM, VERR_INVALID_PARAMETER, RT_SRC_POS, N_("Invalid paravirt. provider '%d'"),
997 enmParavirtProvider);
998 }
999 InsertConfigString(pParavirtNode, "Provider", pcszParavirtProvider);
1000
1001 /*
1002 * Parse paravirt. debug options.
1003 */
1004 bool fGimDebug = false;
1005 com::Utf8Str strGimDebugAddress = "127.0.0.1";
1006 uint32_t uGimDebugPort = 50000;
1007 if (strParavirtDebug.isNotEmpty())
1008 {
1009 /* Hyper-V debug options. */
1010 if (enmParavirtProvider == ParavirtProvider_HyperV)
1011 {
1012 bool fGimHvDebug = false;
1013 com::Utf8Str strGimHvVendor;
1014 bool fGimHvVsIf = false;
1015 bool fGimHvHypercallIf = false;
1016
1017 size_t uPos = 0;
1018 com::Utf8Str strDebugOptions = strParavirtDebug;
1019 com::Utf8Str strKey;
1020 com::Utf8Str strVal;
1021 while ((uPos = strDebugOptions.parseKeyValue(strKey, strVal, uPos)) != com::Utf8Str::npos)
1022 {
1023 if (strKey == "enabled")
1024 {
1025 if (strVal.toUInt32() == 1)
1026 {
1027 /* Apply defaults.
1028 The defaults are documented in the user manual,
1029 changes need to be reflected accordingly. */
1030 fGimHvDebug = true;
1031 strGimHvVendor = "Microsoft Hv";
1032 fGimHvVsIf = true;
1033 fGimHvHypercallIf = false;
1034 }
1035 /* else: ignore, i.e. don't assert below with 'enabled=0'. */
1036 }
1037 else if (strKey == "address")
1038 strGimDebugAddress = strVal;
1039 else if (strKey == "port")
1040 uGimDebugPort = strVal.toUInt32();
1041 else if (strKey == "vendor")
1042 strGimHvVendor = strVal;
1043 else if (strKey == "vsinterface")
1044 fGimHvVsIf = RT_BOOL(strVal.toUInt32());
1045 else if (strKey == "hypercallinterface")
1046 fGimHvHypercallIf = RT_BOOL(strVal.toUInt32());
1047 else
1048 {
1049 AssertMsgFailed(("Unrecognized Hyper-V debug option '%s'\n", strKey.c_str()));
1050 return pVMM->pfnVMR3SetError(pUVM, VERR_INVALID_PARAMETER, RT_SRC_POS,
1051 N_("Unrecognized Hyper-V debug option '%s' in '%s'"), strKey.c_str(),
1052 strDebugOptions.c_str());
1053 }
1054 }
1055
1056 /* Update HyperV CFGM node with active debug options. */
1057 if (fGimHvDebug)
1058 {
1059 PCFGMNODE pHvNode;
1060 InsertConfigNode(pParavirtNode, "HyperV", &pHvNode);
1061 InsertConfigString(pHvNode, "VendorID", strGimHvVendor);
1062 InsertConfigInteger(pHvNode, "VSInterface", fGimHvVsIf ? 1 : 0);
1063 InsertConfigInteger(pHvNode, "HypercallDebugInterface", fGimHvHypercallIf ? 1 : 0);
1064 fGimDebug = true;
1065 }
1066 }
1067 }
1068
1069 /*
1070 * Guest Compatibility Manager.
1071 */
1072 PCFGMNODE pGcmNode;
1073 uint32_t u32FixerSet = 0;
1074 InsertConfigNode(pRoot, "GCM", &pGcmNode);
1075 /* OS/2 and Win9x guests can run DOS apps so they get
1076 * the DOS specific fixes as well.
1077 */
1078 if (fOs2Guest)
1079 u32FixerSet = GCMFIXER_DBZ_DOS | GCMFIXER_DBZ_OS2;
1080 else if (fW9xGuest)
1081 u32FixerSet = GCMFIXER_DBZ_DOS | GCMFIXER_DBZ_WIN9X;
1082 else if (fDosGuest)
1083 u32FixerSet = GCMFIXER_DBZ_DOS;
1084 InsertConfigInteger(pGcmNode, "FixerSet", u32FixerSet);
1085
1086
1087 /*
1088 * MM values.
1089 */
1090 PCFGMNODE pMM;
1091 InsertConfigNode(pRoot, "MM", &pMM);
1092 InsertConfigInteger(pMM, "CanUseLargerHeap", chipsetType == ChipsetType_ICH9);
1093
1094 /*
1095 * PDM config.
1096 * Load drivers in VBoxC.[so|dll]
1097 */
1098 vrc = i_configPdm(pMachine, pVMM, pUVM, pRoot); VRC();
1099
1100 /*
1101 * Devices
1102 */
1103 PCFGMNODE pDevices = NULL; /* /Devices */
1104 PCFGMNODE pDev = NULL; /* /Devices/Dev/ */
1105 PCFGMNODE pInst = NULL; /* /Devices/Dev/0/ */
1106 PCFGMNODE pCfg = NULL; /* /Devices/Dev/.../Config/ */
1107 PCFGMNODE pLunL0 = NULL; /* /Devices/Dev/0/LUN#0/ */
1108 PCFGMNODE pLunL1 = NULL; /* /Devices/Dev/0/LUN#0/AttachedDriver/ */
1109 PCFGMNODE pBiosCfg = NULL; /* /Devices/pcbios/0/Config/ */
1110 PCFGMNODE pNetBootCfg = NULL; /* /Devices/pcbios/0/Config/NetBoot/ */
1111
1112 InsertConfigNode(pRoot, "Devices", &pDevices);
1113
1114 /*
1115 * GIM Device
1116 */
1117 if (fGimDeviceNeeded)
1118 {
1119 InsertConfigNode(pDevices, "GIMDev", &pDev);
1120 InsertConfigNode(pDev, "0", &pInst);
1121 InsertConfigInteger(pInst, "Trusted", 1); /* boolean */
1122 //InsertConfigNode(pInst, "Config", &pCfg);
1123
1124 if (fGimDebug)
1125 {
1126 InsertConfigNode(pInst, "LUN#998", &pLunL0);
1127 InsertConfigString(pLunL0, "Driver", "UDP");
1128 InsertConfigNode(pLunL0, "Config", &pLunL1);
1129 InsertConfigString(pLunL1, "ServerAddress", strGimDebugAddress);
1130 InsertConfigInteger(pLunL1, "ServerPort", uGimDebugPort);
1131 }
1132 }
1133
1134 /*
1135 * PC Arch.
1136 */
1137 InsertConfigNode(pDevices, "pcarch", &pDev);
1138 InsertConfigNode(pDev, "0", &pInst);
1139 InsertConfigInteger(pInst, "Trusted", 1); /* boolean */
1140 InsertConfigNode(pInst, "Config", &pCfg);
1141
1142 /*
1143 * The time offset
1144 */
1145 LONG64 timeOffset;
1146 hrc = firmwareSettings->COMGETTER(TimeOffset)(&timeOffset); H();
1147 PCFGMNODE pTMNode;
1148 InsertConfigNode(pRoot, "TM", &pTMNode);
1149 InsertConfigInteger(pTMNode, "UTCOffset", timeOffset * 1000000);
1150
1151 /*
1152 * DMA
1153 */
1154 InsertConfigNode(pDevices, "8237A", &pDev);
1155 InsertConfigNode(pDev, "0", &pInst);
1156 InsertConfigInteger(pInst, "Trusted", 1); /* boolean */
1157
1158 /*
1159 * PCI buses.
1160 */
1161 uint32_t uIocPCIAddress, uHbcPCIAddress;
1162 switch (chipsetType)
1163 {
1164 default:
1165 AssertFailed();
1166 RT_FALL_THRU();
1167 case ChipsetType_PIIX3:
1168 /* Create the base for adding bridges on demand */
1169 InsertConfigNode(pDevices, "pcibridge", NULL);
1170
1171 InsertConfigNode(pDevices, "pci", &pDev);
1172 uHbcPCIAddress = (0x0 << 16) | 0;
1173 uIocPCIAddress = (0x1 << 16) | 0; // ISA controller
1174 break;
1175 case ChipsetType_ICH9:
1176 /* Create the base for adding bridges on demand */
1177 InsertConfigNode(pDevices, "ich9pcibridge", NULL);
1178
1179 InsertConfigNode(pDevices, "ich9pci", &pDev);
1180 uHbcPCIAddress = (0x1e << 16) | 0;
1181 uIocPCIAddress = (0x1f << 16) | 0; // LPC controller
1182 break;
1183 }
1184 InsertConfigNode(pDev, "0", &pInst);
1185 InsertConfigInteger(pInst, "Trusted", 1); /* boolean */
1186 InsertConfigNode(pInst, "Config", &pCfg);
1187 InsertConfigInteger(pCfg, "IOAPIC", fIOAPIC);
1188 if (chipsetType == ChipsetType_ICH9)
1189 {
1190 /* Provide MCFG info */
1191 InsertConfigInteger(pCfg, "McfgBase", uMcfgBase);
1192 InsertConfigInteger(pCfg, "McfgLength", cbMcfgLength);
1193
1194#ifdef VBOX_WITH_PCI_PASSTHROUGH
1195 /* Add PCI passthrough devices */
1196 hrc = i_attachRawPCIDevices(pUVM, pBusMgr, pDevices); H();
1197#endif
1198
1199 if (enmIommuType == IommuType_AMD)
1200 {
1201 /* AMD IOMMU. */
1202 InsertConfigNode(pDevices, "iommu-amd", &pDev);
1203 InsertConfigNode(pDev, "0", &pInst);
1204 InsertConfigInteger(pInst, "Trusted", 1); /* boolean */
1205 InsertConfigNode(pInst, "Config", &pCfg);
1206 hrc = pBusMgr->assignPCIDevice("iommu-amd", pInst); H();
1207
1208 /* The AMD IOMMU device needs to know which PCI slot it's in, see @bugref{9654#c104}. */
1209 {
1210 PCIBusAddress Address;
1211 if (pBusMgr->findPCIAddress("iommu-amd", 0, Address))
1212 {
1213 uint32_t const u32IommuAddress = (Address.miDevice << 16) | Address.miFn;
1214 InsertConfigInteger(pCfg, "PCIAddress", u32IommuAddress);
1215 }
1216 else
1217 return pVMM->pfnVMR3SetError(pUVM, VERR_INVALID_PARAMETER, RT_SRC_POS,
1218 N_("Failed to find PCI address of the assigned IOMMU device!"));
1219 }
1220
1221 PCIBusAddress PCIAddr = PCIBusAddress((int32_t)uIoApicPciAddress);
1222 hrc = pBusMgr->assignPCIDevice("sb-ioapic", NULL /* pCfg */, PCIAddr, true /*fGuestAddressRequired*/); H();
1223 }
1224 else if (enmIommuType == IommuType_Intel)
1225 {
1226 /* Intel IOMMU. */
1227 InsertConfigNode(pDevices, "iommu-intel", &pDev);
1228 InsertConfigNode(pDev, "0", &pInst);
1229 InsertConfigInteger(pInst, "Trusted", 1); /* boolean */
1230 InsertConfigNode(pInst, "Config", &pCfg);
1231 hrc = pBusMgr->assignPCIDevice("iommu-intel", pInst); H();
1232
1233 PCIBusAddress PCIAddr = PCIBusAddress((int32_t)uIoApicPciAddress);
1234 hrc = pBusMgr->assignPCIDevice("sb-ioapic", NULL /* pCfg */, PCIAddr, true /*fGuestAddressRequired*/); H();
1235 }
1236 }
1237
1238 /*
1239 * Enable the following devices: HPET, SMC and LPC on MacOS X guests or on ICH9 chipset
1240 */
1241
1242 /*
1243 * High Precision Event Timer (HPET)
1244 */
1245 BOOL fHPETEnabled;
1246 /* Other guests may wish to use HPET too, but MacOS X not functional without it */
1247 hrc = platformX86->COMGETTER(HPETEnabled)(&fHPETEnabled); H();
1248 /* so always enable HPET in extended profile */
1249 fHPETEnabled |= fOsXGuest;
1250 /* HPET is always present on ICH9 */
1251 fHPETEnabled |= (chipsetType == ChipsetType_ICH9);
1252 if (fHPETEnabled)
1253 {
1254 InsertConfigNode(pDevices, "hpet", &pDev);
1255 InsertConfigNode(pDev, "0", &pInst);
1256 InsertConfigInteger(pInst, "Trusted", 1); /* boolean */
1257 InsertConfigNode(pInst, "Config", &pCfg);
1258 InsertConfigInteger(pCfg, "ICH9", (chipsetType == ChipsetType_ICH9) ? 1 : 0); /* boolean */
1259 }
1260
1261 /*
1262 * System Management Controller (SMC)
1263 */
1264 BOOL fSmcEnabled;
1265 fSmcEnabled = fOsXGuest;
1266 if (fSmcEnabled)
1267 {
1268 InsertConfigNode(pDevices, "smc", &pDev);
1269 InsertConfigNode(pDev, "0", &pInst);
1270 InsertConfigInteger(pInst, "Trusted", 1); /* boolean */
1271 InsertConfigNode(pInst, "Config", &pCfg);
1272
1273 bool fGetKeyFromRealSMC;
1274 Utf8Str strKey;
1275 vrc = getSmcDeviceKey(virtualBox, pMachine, &strKey, &fGetKeyFromRealSMC);
1276 AssertRCReturn(vrc, vrc);
1277
1278 if (!fGetKeyFromRealSMC)
1279 InsertConfigString(pCfg, "DeviceKey", strKey);
1280 InsertConfigInteger(pCfg, "GetKeyFromRealSMC", fGetKeyFromRealSMC);
1281 }
1282
1283 /*
1284 * Low Pin Count (LPC) bus
1285 */
1286 BOOL fLpcEnabled;
1287 /** @todo implement appropriate getter */
1288 fLpcEnabled = fOsXGuest || (chipsetType == ChipsetType_ICH9);
1289 if (fLpcEnabled)
1290 {
1291 InsertConfigNode(pDevices, "lpc", &pDev);
1292 InsertConfigNode(pDev, "0", &pInst);
1293 hrc = pBusMgr->assignPCIDevice("lpc", pInst); H();
1294 InsertConfigInteger(pInst, "Trusted", 1); /* boolean */
1295 }
1296
1297 BOOL fShowRtc;
1298 fShowRtc = fOsXGuest || (chipsetType == ChipsetType_ICH9);
1299
1300 /*
1301 * PS/2 keyboard & mouse.
1302 */
1303 InsertConfigNode(pDevices, "pckbd", &pDev);
1304 InsertConfigNode(pDev, "0", &pInst);
1305 InsertConfigInteger(pInst, "Trusted", 1); /* boolean */
1306 InsertConfigNode(pInst, "Config", &pCfg);
1307
1308 KeyboardHIDType_T aKbdHID;
1309 hrc = pMachine->COMGETTER(KeyboardHIDType)(&aKbdHID); H();
1310 if (aKbdHID != KeyboardHIDType_None)
1311 {
1312 InsertConfigNode(pInst, "LUN#0", &pLunL0);
1313 InsertConfigString(pLunL0, "Driver", "KeyboardQueue");
1314 InsertConfigNode(pLunL0, "Config", &pCfg);
1315 InsertConfigInteger(pCfg, "QueueSize", 64);
1316
1317 InsertConfigNode(pLunL0, "AttachedDriver", &pLunL1);
1318 InsertConfigString(pLunL1, "Driver", "MainKeyboard");
1319 }
1320
1321 PointingHIDType_T aPointingHID;
1322 hrc = pMachine->COMGETTER(PointingHIDType)(&aPointingHID); H();
1323 if (aPointingHID != PointingHIDType_None)
1324 {
1325 InsertConfigNode(pInst, "LUN#1", &pLunL0);
1326 InsertConfigString(pLunL0, "Driver", "MouseQueue");
1327 InsertConfigNode(pLunL0, "Config", &pCfg);
1328 InsertConfigInteger(pCfg, "QueueSize", 128);
1329
1330 InsertConfigNode(pLunL0, "AttachedDriver", &pLunL1);
1331 InsertConfigString(pLunL1, "Driver", "MainMouse");
1332 }
1333
1334 /*
1335 * i8254 Programmable Interval Timer And Dummy Speaker
1336 */
1337 InsertConfigNode(pDevices, "i8254", &pDev);
1338 InsertConfigNode(pDev, "0", &pInst);
1339 InsertConfigNode(pInst, "Config", &pCfg);
1340#ifdef DEBUG
1341 InsertConfigInteger(pInst, "Trusted", 1); /* boolean */
1342#endif
1343
1344 /*
1345 * i8259 Programmable Interrupt Controller.
1346 */
1347 InsertConfigNode(pDevices, "i8259", &pDev);
1348 InsertConfigNode(pDev, "0", &pInst);
1349 InsertConfigInteger(pInst, "Trusted", 1); /* boolean */
1350 InsertConfigNode(pInst, "Config", &pCfg);
1351
1352 /*
1353 * Advanced Programmable Interrupt Controller.
1354 * SMP: Each CPU has a LAPIC, but we have a single device representing all LAPICs states,
1355 * thus only single insert
1356 */
1357 if (fEnableAPIC)
1358 {
1359 InsertConfigNode(pDevices, "apic", &pDev);
1360 InsertConfigNode(pDev, "0", &pInst);
1361 InsertConfigInteger(pInst, "Trusted", 1); /* boolean */
1362 InsertConfigNode(pInst, "Config", &pCfg);
1363 InsertConfigInteger(pCfg, "IOAPIC", fIOAPIC);
1364 PDMAPICMODE enmAPICMode = PDMAPICMODE_APIC;
1365 if (fEnableX2APIC)
1366 enmAPICMode = PDMAPICMODE_X2APIC;
1367 else if (!fEnableAPIC)
1368 enmAPICMode = PDMAPICMODE_NONE;
1369 InsertConfigInteger(pCfg, "Mode", enmAPICMode);
1370 InsertConfigInteger(pCfg, "NumCPUs", cCpus);
1371
1372 if (fIOAPIC)
1373 {
1374 /*
1375 * I/O Advanced Programmable Interrupt Controller.
1376 */
1377 InsertConfigNode(pDevices, "ioapic", &pDev);
1378 InsertConfigNode(pDev, "0", &pInst);
1379 InsertConfigInteger(pInst, "Trusted", 1); /* boolean */
1380 InsertConfigNode(pInst, "Config", &pCfg);
1381 InsertConfigInteger(pCfg, "NumCPUs", cCpus);
1382 if (enmIommuType == IommuType_AMD)
1383 InsertConfigInteger(pCfg, "PCIAddress", uIoApicPciAddress);
1384 else if (enmIommuType == IommuType_Intel)
1385 {
1386 InsertConfigString(pCfg, "ChipType", "DMAR");
1387 InsertConfigInteger(pCfg, "PCIAddress", uIoApicPciAddress);
1388 }
1389 }
1390 }
1391
1392 /*
1393 * RTC MC146818.
1394 */
1395 InsertConfigNode(pDevices, "mc146818", &pDev);
1396 InsertConfigNode(pDev, "0", &pInst);
1397 InsertConfigNode(pInst, "Config", &pCfg);
1398 BOOL fRTCUseUTC;
1399 hrc = platform->COMGETTER(RTCUseUTC)(&fRTCUseUTC); H();
1400 InsertConfigInteger(pCfg, "UseUTC", fRTCUseUTC ? 1 : 0);
1401
1402 /*
1403 * VGA.
1404 */
1405 ComPtr<IGraphicsAdapter> pGraphicsAdapter;
1406 hrc = pMachine->COMGETTER(GraphicsAdapter)(pGraphicsAdapter.asOutParam()); H();
1407 GraphicsControllerType_T enmGraphicsController;
1408 hrc = pGraphicsAdapter->COMGETTER(GraphicsControllerType)(&enmGraphicsController); H();
1409 switch (enmGraphicsController)
1410 {
1411 case GraphicsControllerType_Null:
1412 break;
1413#ifdef VBOX_WITH_VMSVGA
1414 case GraphicsControllerType_VMSVGA:
1415 InsertConfigInteger(pHM, "LovelyMesaDrvWorkaround", 1); /* hits someone else logging backdoor. */
1416 InsertConfigInteger(pNEM, "LovelyMesaDrvWorkaround", 1); /* hits someone else logging backdoor. */
1417 RT_FALL_THROUGH();
1418 case GraphicsControllerType_VBoxSVGA:
1419#endif
1420 case GraphicsControllerType_VBoxVGA:
1421 vrc = i_configGraphicsController(pDevices, enmGraphicsController, pBusMgr, pMachine, pGraphicsAdapter, firmwareSettings);
1422 if (FAILED(vrc))
1423 return vrc;
1424 break;
1425 default:
1426 AssertMsgFailed(("Invalid graphicsController=%d\n", enmGraphicsController));
1427 return pVMM->pfnVMR3SetError(pUVM, VERR_INVALID_PARAMETER, RT_SRC_POS,
1428 N_("Invalid graphics controller type '%d'"), enmGraphicsController);
1429 }
1430
1431 /*
1432 * Firmware.
1433 */
1434 FirmwareType_T eFwType = FirmwareType_BIOS;
1435 hrc = firmwareSettings->COMGETTER(FirmwareType)(&eFwType); H();
1436
1437#ifdef VBOX_WITH_EFI
1438 BOOL fEfiEnabled = (eFwType >= FirmwareType_EFI) && (eFwType <= FirmwareType_EFIDUAL);
1439#else
1440 BOOL fEfiEnabled = false;
1441#endif
1442 if (!fEfiEnabled)
1443 {
1444 /*
1445 * PC Bios.
1446 */
1447 InsertConfigNode(pDevices, "pcbios", &pDev);
1448 InsertConfigNode(pDev, "0", &pInst);
1449 InsertConfigInteger(pInst, "Trusted", 1); /* boolean */
1450 InsertConfigNode(pInst, "Config", &pBiosCfg);
1451 InsertConfigInteger(pBiosCfg, "NumCPUs", cCpus);
1452 InsertConfigString(pBiosCfg, "HardDiskDevice", "piix3ide");
1453 InsertConfigString(pBiosCfg, "FloppyDevice", "i82078");
1454 InsertConfigInteger(pBiosCfg, "IOAPIC", fIOAPIC);
1455 InsertConfigInteger(pBiosCfg, "APIC", uFwAPIC);
1456 BOOL fPXEDebug;
1457 hrc = firmwareSettings->COMGETTER(PXEDebugEnabled)(&fPXEDebug); H();
1458 InsertConfigInteger(pBiosCfg, "PXEDebug", fPXEDebug);
1459 InsertConfigBytes(pBiosCfg, "UUID", &HardwareUuid,sizeof(HardwareUuid));
1460 BOOL fUuidLe;
1461 hrc = firmwareSettings->COMGETTER(SMBIOSUuidLittleEndian)(&fUuidLe); H();
1462 InsertConfigInteger(pBiosCfg, "UuidLe", fUuidLe);
1463 BOOL fAutoSerialNumGen;
1464 hrc = firmwareSettings->COMGETTER(AutoSerialNumGen)(&fAutoSerialNumGen); H();
1465 if (fAutoSerialNumGen)
1466 InsertConfigString(pBiosCfg, "DmiSystemSerial", "VirtualBox-<DmiSystemUuid>");
1467 InsertConfigNode(pBiosCfg, "NetBoot", &pNetBootCfg);
1468 InsertConfigInteger(pBiosCfg, "McfgBase", uMcfgBase);
1469 InsertConfigInteger(pBiosCfg, "McfgLength", cbMcfgLength);
1470
1471 AssertMsgReturn(SchemaDefs::MaxBootPosition <= 9, ("Too many boot devices %d\n", SchemaDefs::MaxBootPosition),
1472 VERR_INVALID_PARAMETER);
1473
1474 for (ULONG pos = 1; pos <= SchemaDefs::MaxBootPosition; ++pos)
1475 {
1476 DeviceType_T enmBootDevice;
1477 hrc = pMachine->GetBootOrder(pos, &enmBootDevice); H();
1478
1479 char szParamName[] = "BootDeviceX";
1480 szParamName[sizeof(szParamName) - 2] = (char)(pos - 1 + '0');
1481
1482 const char *pszBootDevice;
1483 switch (enmBootDevice)
1484 {
1485 case DeviceType_Null:
1486 pszBootDevice = "NONE";
1487 break;
1488 case DeviceType_HardDisk:
1489 pszBootDevice = "IDE";
1490 break;
1491 case DeviceType_DVD:
1492 pszBootDevice = "DVD";
1493 break;
1494 case DeviceType_Floppy:
1495 pszBootDevice = "FLOPPY";
1496 break;
1497 case DeviceType_Network:
1498 pszBootDevice = "LAN";
1499 break;
1500 default:
1501 AssertMsgFailed(("Invalid enmBootDevice=%d\n", enmBootDevice));
1502 return pVMM->pfnVMR3SetError(pUVM, VERR_INVALID_PARAMETER, RT_SRC_POS,
1503 N_("Invalid boot device '%d'"), enmBootDevice);
1504 }
1505 InsertConfigString(pBiosCfg, szParamName, pszBootDevice);
1506 }
1507
1508 /** @todo @bugref{7145}: We might want to enable this by default for new VMs. For now,
1509 * this is required for Windows 2012 guests. */
1510 if (osTypeId == GUEST_OS_ID_STR_X64("Windows2012"))
1511 InsertConfigInteger(pBiosCfg, "DmiExposeMemoryTable", 1); /* boolean */
1512 }
1513 else
1514 {
1515 /* Autodetect firmware type, basing on guest type */
1516 if (eFwType == FirmwareType_EFI)
1517 eFwType = fIsGuest64Bit ? FirmwareType_EFI64 : FirmwareType_EFI32;
1518 bool const f64BitEntry = eFwType == FirmwareType_EFI64;
1519
1520 Assert(eFwType == FirmwareType_EFI64 || eFwType == FirmwareType_EFI32 || eFwType == FirmwareType_EFIDUAL);
1521#ifdef VBOX_WITH_EFI_IN_DD2
1522 const char *pszEfiRomFile = eFwType == FirmwareType_EFIDUAL ? "VBoxEFIDual.fd"
1523 : eFwType == FirmwareType_EFI32 ? "VBoxEFI32.fd"
1524 : "VBoxEFI64.fd";
1525#else
1526 Utf8Str efiRomFile;
1527 vrc = findEfiRom(virtualBox, PlatformArchitecture_x86, eFwType, &efiRomFile);
1528 AssertRCReturn(vrc, vrc);
1529 const char *pszEfiRomFile = efiRomFile.c_str();
1530#endif
1531
1532 /* Get boot args */
1533 Utf8Str bootArgs;
1534 GetExtraDataBoth(virtualBox, pMachine, "VBoxInternal2/EfiBootArgs", &bootArgs);
1535
1536 /* Get device props */
1537 Utf8Str deviceProps;
1538 GetExtraDataBoth(virtualBox, pMachine, "VBoxInternal2/EfiDeviceProps", &deviceProps);
1539
1540 /* Get NVRAM file name */
1541 Utf8Str strNvram = mptrNvramStore->i_getNonVolatileStorageFile();
1542
1543 BOOL fUuidLe;
1544 hrc = firmwareSettings->COMGETTER(SMBIOSUuidLittleEndian)(&fUuidLe); H();
1545
1546 BOOL fAutoSerialNumGen;
1547 hrc = firmwareSettings->COMGETTER(AutoSerialNumGen)(&fAutoSerialNumGen); H();
1548
1549 /* Get graphics mode settings */
1550 uint32_t u32GraphicsMode = UINT32_MAX;
1551 GetExtraDataBoth(virtualBox, pMachine, "VBoxInternal2/EfiGraphicsMode", &strTmp);
1552 if (strTmp.isEmpty())
1553 GetExtraDataBoth(virtualBox, pMachine, "VBoxInternal2/EfiGopMode", &strTmp);
1554 if (!strTmp.isEmpty())
1555 u32GraphicsMode = strTmp.toUInt32();
1556
1557 /* Get graphics resolution settings, with some sanity checking */
1558 Utf8Str strResolution;
1559 GetExtraDataBoth(virtualBox, pMachine, "VBoxInternal2/EfiGraphicsResolution", &strResolution);
1560 if (!strResolution.isEmpty())
1561 {
1562 size_t pos = strResolution.find("x");
1563 if (pos != strResolution.npos)
1564 {
1565 Utf8Str strH, strV;
1566 strH.assignEx(strResolution, 0, pos);
1567 strV.assignEx(strResolution, pos+1, strResolution.length()-pos-1);
1568 uint32_t u32H = strH.toUInt32();
1569 uint32_t u32V = strV.toUInt32();
1570 if (u32H == 0 || u32V == 0)
1571 strResolution.setNull();
1572 }
1573 else
1574 strResolution.setNull();
1575 }
1576 else
1577 {
1578 uint32_t u32H = 0;
1579 uint32_t u32V = 0;
1580 GetExtraDataBoth(virtualBox, pMachine, "VBoxInternal2/EfiHorizontalResolution", &strTmp);
1581 if (strTmp.isEmpty())
1582 GetExtraDataBoth(virtualBox, pMachine, "VBoxInternal2/EfiUgaHorizontalResolution", &strTmp);
1583 if (!strTmp.isEmpty())
1584 u32H = strTmp.toUInt32();
1585
1586 GetExtraDataBoth(virtualBox, pMachine, "VBoxInternal2/EfiVerticalResolution", &strTmp);
1587 if (strTmp.isEmpty())
1588 GetExtraDataBoth(virtualBox, pMachine, "VBoxInternal2/EfiUgaVerticalResolution", &strTmp);
1589 if (!strTmp.isEmpty())
1590 u32V = strTmp.toUInt32();
1591 if (u32H != 0 && u32V != 0)
1592 strResolution = Utf8StrFmt("%ux%u", u32H, u32V);
1593 }
1594
1595 /*
1596 * EFI subtree.
1597 */
1598 InsertConfigNode(pDevices, "efi", &pDev);
1599 InsertConfigNode(pDev, "0", &pInst);
1600 InsertConfigInteger(pInst, "Trusted", 1); /* boolean */
1601 InsertConfigNode(pInst, "Config", &pCfg);
1602 InsertConfigInteger(pCfg, "NumCPUs", cCpus);
1603 InsertConfigInteger(pCfg, "McfgBase", uMcfgBase);
1604 InsertConfigInteger(pCfg, "McfgLength", cbMcfgLength);
1605 InsertConfigString(pCfg, "EfiRom", pszEfiRomFile);
1606 InsertConfigString(pCfg, "BootArgs", bootArgs);
1607 InsertConfigString(pCfg, "DeviceProps", deviceProps);
1608 InsertConfigInteger(pCfg, "IOAPIC", fIOAPIC);
1609 InsertConfigInteger(pCfg, "APIC", uFwAPIC);
1610 InsertConfigBytes(pCfg, "UUID", &HardwareUuid,sizeof(HardwareUuid));
1611 InsertConfigInteger(pCfg, "UuidLe", fUuidLe);
1612 if (fAutoSerialNumGen)
1613 InsertConfigString(pCfg, "DmiSystemSerial", "VirtualBox-<DmiSystemUuid>");
1614 InsertConfigInteger(pCfg, "64BitEntry", f64BitEntry); /* boolean */
1615 InsertConfigString(pCfg, "NvramFile", strNvram);
1616 if (u32GraphicsMode != UINT32_MAX)
1617 InsertConfigInteger(pCfg, "GraphicsMode", u32GraphicsMode);
1618 if (!strResolution.isEmpty())
1619 InsertConfigString(pCfg, "GraphicsResolution", strResolution);
1620
1621 /* For OS X guests we'll force passing host's DMI info to the guest */
1622 if (fOsXGuest)
1623 {
1624 InsertConfigInteger(pCfg, "DmiUseHostInfo", 1);
1625 InsertConfigInteger(pCfg, "DmiExposeMemoryTable", 1);
1626 }
1627
1628 /* Attach the NVRAM storage driver. */
1629 InsertConfigNode(pInst, "LUN#0", &pLunL0);
1630 InsertConfigString(pLunL0, "Driver", "NvramStore");
1631 }
1632
1633 /*
1634 * The USB Controllers.
1635 */
1636 PCFGMNODE pUsbDevices = NULL;
1637 vrc = i_configUsb(pMachine, pBusMgr, pRoot, pDevices, aKbdHID, aPointingHID, &pUsbDevices);
1638
1639 /*
1640 * Storage controllers.
1641 */
1642 bool fFdcEnabled = false;
1643 vrc = i_configStorageCtrls(pMachine, pBusMgr, pVMM, pUVM,
1644 pDevices, pUsbDevices, pBiosCfg, &fFdcEnabled); VRC();
1645
1646 /*
1647 * Network adapters
1648 */
1649 std::list<BootNic> llBootNics;
1650 vrc = i_configNetworkCtrls(pMachine, platformProperties, chipsetType, pBusMgr,
1651 pVMM, pUVM, pDevices, llBootNics); VRC();
1652
1653 /*
1654 * Build network boot information and transfer it to the BIOS.
1655 */
1656 if (pNetBootCfg && !llBootNics.empty()) /* NetBoot node doesn't exist for EFI! */
1657 {
1658 llBootNics.sort(); /* Sort the list by boot priority. */
1659
1660 char achBootIdx[] = "0";
1661 unsigned uBootIdx = 0;
1662
1663 for (std::list<BootNic>::iterator it = llBootNics.begin(); it != llBootNics.end(); ++it)
1664 {
1665 /* A NIC with priority 0 is only used if it's first in the list. */
1666 if (it->mBootPrio == 0 && uBootIdx != 0)
1667 break;
1668
1669 PCFGMNODE pNetBtDevCfg;
1670 achBootIdx[0] = (char)('0' + uBootIdx++); /* Boot device order. */
1671 InsertConfigNode(pNetBootCfg, achBootIdx, &pNetBtDevCfg);
1672 InsertConfigInteger(pNetBtDevCfg, "NIC", it->mInstance);
1673 InsertConfigInteger(pNetBtDevCfg, "PCIBusNo", it->mPCIAddress.miBus);
1674 InsertConfigInteger(pNetBtDevCfg, "PCIDeviceNo", it->mPCIAddress.miDevice);
1675 InsertConfigInteger(pNetBtDevCfg, "PCIFunctionNo", it->mPCIAddress.miFn);
1676 }
1677 }
1678
1679 /*
1680 * Serial (UART) Ports
1681 */
1682 /* serial enabled mask to be passed to dev ACPI */
1683 uint16_t auSerialIoPortBase[SchemaDefs::SerialPortCount] = {0};
1684 uint8_t auSerialIrq[SchemaDefs::SerialPortCount] = {0};
1685 InsertConfigNode(pDevices, "serial", &pDev);
1686 for (ULONG ulInstance = 0; ulInstance < SchemaDefs::SerialPortCount; ++ulInstance)
1687 {
1688 ComPtr<ISerialPort> serialPort;
1689 hrc = pMachine->GetSerialPort(ulInstance, serialPort.asOutParam()); H();
1690 BOOL fEnabledSerPort = FALSE;
1691 if (serialPort)
1692 {
1693 hrc = serialPort->COMGETTER(Enabled)(&fEnabledSerPort); H();
1694 }
1695 if (!fEnabledSerPort)
1696 {
1697 m_aeSerialPortMode[ulInstance] = PortMode_Disconnected;
1698 continue;
1699 }
1700
1701 InsertConfigNode(pDev, Utf8StrFmt("%u", ulInstance).c_str(), &pInst);
1702 InsertConfigInteger(pInst, "Trusted", 1); /* boolean */
1703 InsertConfigNode(pInst, "Config", &pCfg);
1704
1705 ULONG ulIRQ;
1706 hrc = serialPort->COMGETTER(IRQ)(&ulIRQ); H();
1707 InsertConfigInteger(pCfg, "IRQ", ulIRQ);
1708 auSerialIrq[ulInstance] = (uint8_t)ulIRQ;
1709
1710 ULONG ulIOBase;
1711 hrc = serialPort->COMGETTER(IOAddress)(&ulIOBase); H();
1712 InsertConfigInteger(pCfg, "IOAddress", ulIOBase);
1713 auSerialIoPortBase[ulInstance] = (uint16_t)ulIOBase;
1714
1715 BOOL fServer;
1716 hrc = serialPort->COMGETTER(Server)(&fServer); H();
1717 hrc = serialPort->COMGETTER(Path)(bstr.asOutParam()); H();
1718 UartType_T eUartType;
1719 const char *pszUartType;
1720 hrc = serialPort->COMGETTER(UartType)(&eUartType); H();
1721 switch (eUartType)
1722 {
1723 case UartType_U16450: pszUartType = "16450"; break;
1724 case UartType_U16750: pszUartType = "16750"; break;
1725 default: AssertFailed(); RT_FALL_THRU();
1726 case UartType_U16550A: pszUartType = "16550A"; break;
1727 }
1728 InsertConfigString(pCfg, "UartType", pszUartType);
1729
1730 PortMode_T eHostMode;
1731 hrc = serialPort->COMGETTER(HostMode)(&eHostMode); H();
1732
1733 m_aeSerialPortMode[ulInstance] = eHostMode;
1734 if (eHostMode != PortMode_Disconnected)
1735 {
1736 vrc = i_configSerialPort(pInst, eHostMode, Utf8Str(bstr).c_str(), RT_BOOL(fServer));
1737 if (RT_FAILURE(vrc))
1738 return vrc;
1739 }
1740 }
1741
1742 /*
1743 * Parallel (LPT) Ports
1744 */
1745 /* parallel enabled mask to be passed to dev ACPI */
1746 uint16_t auParallelIoPortBase[SchemaDefs::ParallelPortCount] = {0};
1747 uint8_t auParallelIrq[SchemaDefs::ParallelPortCount] = {0};
1748 InsertConfigNode(pDevices, "parallel", &pDev);
1749 for (ULONG ulInstance = 0; ulInstance < SchemaDefs::ParallelPortCount; ++ulInstance)
1750 {
1751 ComPtr<IParallelPort> parallelPort;
1752 hrc = pMachine->GetParallelPort(ulInstance, parallelPort.asOutParam()); H();
1753 BOOL fEnabledParPort = FALSE;
1754 if (parallelPort)
1755 {
1756 hrc = parallelPort->COMGETTER(Enabled)(&fEnabledParPort); H();
1757 }
1758 if (!fEnabledParPort)
1759 continue;
1760
1761 InsertConfigNode(pDev, Utf8StrFmt("%u", ulInstance).c_str(), &pInst);
1762 InsertConfigNode(pInst, "Config", &pCfg);
1763
1764 ULONG ulIRQ;
1765 hrc = parallelPort->COMGETTER(IRQ)(&ulIRQ); H();
1766 InsertConfigInteger(pCfg, "IRQ", ulIRQ);
1767 auParallelIrq[ulInstance] = (uint8_t)ulIRQ;
1768 ULONG ulIOBase;
1769 hrc = parallelPort->COMGETTER(IOBase)(&ulIOBase); H();
1770 InsertConfigInteger(pCfg, "IOBase", ulIOBase);
1771 auParallelIoPortBase[ulInstance] = (uint16_t)ulIOBase;
1772
1773 hrc = parallelPort->COMGETTER(Path)(bstr.asOutParam()); H();
1774 if (!bstr.isEmpty())
1775 {
1776 InsertConfigNode(pInst, "LUN#0", &pLunL0);
1777 InsertConfigString(pLunL0, "Driver", "HostParallel");
1778 InsertConfigNode(pLunL0, "Config", &pLunL1);
1779 InsertConfigString(pLunL1, "DevicePath", bstr);
1780 }
1781 }
1782
1783 vrc = i_configVmmDev(pMachine, pBusMgr, pDevices); VRC();
1784
1785 /*
1786 * Audio configuration.
1787 */
1788 bool fAudioEnabled = false;
1789 vrc = i_configAudioCtrl(virtualBox, pMachine, pBusMgr, pDevices,
1790 fOsXGuest, &fAudioEnabled); VRC();
1791
1792#if defined(VBOX_WITH_TPM)
1793 /*
1794 * Configure the Trusted Platform Module.
1795 */
1796 ComObjPtr<ITrustedPlatformModule> ptrTpm;
1797 TpmType_T enmTpmType = TpmType_None;
1798
1799 hrc = pMachine->COMGETTER(TrustedPlatformModule)(ptrTpm.asOutParam()); H();
1800 hrc = ptrTpm->COMGETTER(Type)(&enmTpmType); H();
1801 if (enmTpmType != TpmType_None)
1802 {
1803 InsertConfigNode(pDevices, "tpm", &pDev);
1804 InsertConfigNode(pDev, "0", &pInst);
1805 InsertConfigInteger(pInst, "Trusted", 1); /* boolean */
1806 InsertConfigNode(pInst, "Config", &pCfg);
1807 InsertConfigNode(pInst, "LUN#0", &pLunL0);
1808
1809 switch (enmTpmType)
1810 {
1811 case TpmType_v1_2:
1812 case TpmType_v2_0:
1813 InsertConfigString(pLunL0, "Driver", "TpmEmuTpms");
1814 InsertConfigNode(pLunL0, "Config", &pCfg);
1815 InsertConfigInteger(pCfg, "TpmVersion", enmTpmType == TpmType_v1_2 ? 1 : 2);
1816 InsertConfigNode(pLunL0, "AttachedDriver", &pLunL1);
1817 InsertConfigString(pLunL1, "Driver", "NvramStore");
1818 break;
1819 case TpmType_Host:
1820#if defined(RT_OS_LINUX) || defined(RT_OS_WINDOWS)
1821 InsertConfigString(pLunL0, "Driver", "TpmHost");
1822 InsertConfigNode(pLunL0, "Config", &pCfg);
1823#endif
1824 break;
1825 case TpmType_Swtpm:
1826 hrc = ptrTpm->COMGETTER(Location)(bstr.asOutParam()); H();
1827 InsertConfigString(pLunL0, "Driver", "TpmEmu");
1828 InsertConfigNode(pLunL0, "Config", &pCfg);
1829 InsertConfigString(pCfg, "Location", bstr);
1830 break;
1831 default:
1832 AssertFailedBreak();
1833 }
1834 }
1835#endif
1836
1837 /*
1838 * ACPI
1839 */
1840 BOOL fACPI;
1841 hrc = firmwareSettings->COMGETTER(ACPIEnabled)(&fACPI); H();
1842 if (fACPI)
1843 {
1844 /* Always show the CPU leafs when we have multiple VCPUs or when the IO-APIC is enabled.
1845 * The Windows SMP kernel needs a CPU leaf or else its idle loop will burn cpu cycles; the
1846 * intelppm driver refuses to register an idle state handler.
1847 * Always show CPU leafs for OS X guests. */
1848 BOOL fShowCpu = fOsXGuest;
1849 if (cCpus > 1 || fIOAPIC)
1850 fShowCpu = true;
1851
1852 BOOL fCpuHotPlug;
1853 hrc = pMachine->COMGETTER(CPUHotPlugEnabled)(&fCpuHotPlug); H();
1854
1855 InsertConfigNode(pDevices, "acpi", &pDev);
1856 InsertConfigNode(pDev, "0", &pInst);
1857 InsertConfigInteger(pInst, "Trusted", 1); /* boolean */
1858 InsertConfigNode(pInst, "Config", &pCfg);
1859 hrc = pBusMgr->assignPCIDevice("acpi", pInst); H();
1860
1861 InsertConfigInteger(pCfg, "NumCPUs", cCpus);
1862
1863 InsertConfigInteger(pCfg, "IOAPIC", fIOAPIC);
1864 InsertConfigInteger(pCfg, "FdcEnabled", fFdcEnabled);
1865 InsertConfigInteger(pCfg, "HpetEnabled", fHPETEnabled);
1866 InsertConfigInteger(pCfg, "SmcEnabled", fSmcEnabled);
1867 InsertConfigInteger(pCfg, "ShowRtc", fShowRtc);
1868 if (fOsXGuest && !llBootNics.empty())
1869 {
1870 BootNic aNic = llBootNics.front();
1871 uint32_t u32NicPCIAddr = (aNic.mPCIAddress.miDevice << 16) | aNic.mPCIAddress.miFn;
1872 InsertConfigInteger(pCfg, "NicPciAddress", u32NicPCIAddr);
1873 }
1874 if (fOsXGuest && fAudioEnabled)
1875 {
1876 PCIBusAddress Address;
1877 if (pBusMgr->findPCIAddress("hda", 0, Address))
1878 {
1879 uint32_t u32AudioPCIAddr = (Address.miDevice << 16) | Address.miFn;
1880 InsertConfigInteger(pCfg, "AudioPciAddress", u32AudioPCIAddr);
1881 }
1882 }
1883 if (fOsXGuest)
1884 {
1885 PCIBusAddress Address;
1886 if (pBusMgr->findPCIAddress("nvme", 0, Address))
1887 {
1888 uint32_t u32NvmePCIAddr = (Address.miDevice << 16) | Address.miFn;
1889 InsertConfigInteger(pCfg, "NvmePciAddress", u32NvmePCIAddr);
1890 }
1891 }
1892 if (enmIommuType == IommuType_AMD)
1893 {
1894 PCIBusAddress Address;
1895 if (pBusMgr->findPCIAddress("iommu-amd", 0, Address))
1896 {
1897 uint32_t u32IommuAddress = (Address.miDevice << 16) | Address.miFn;
1898 InsertConfigInteger(pCfg, "IommuAmdEnabled", true);
1899 InsertConfigInteger(pCfg, "IommuPciAddress", u32IommuAddress);
1900 if (pBusMgr->findPCIAddress("sb-ioapic", 0, Address))
1901 {
1902 uint32_t const u32SbIoapicAddress = (Address.miDevice << 16) | Address.miFn;
1903 InsertConfigInteger(pCfg, "SbIoApicPciAddress", u32SbIoapicAddress);
1904 }
1905 else
1906 return pVMM->pfnVMR3SetError(pUVM, VERR_INVALID_PARAMETER, RT_SRC_POS,
1907 N_("AMD IOMMU is enabled, but the I/O APIC is not assigned a PCI address!"));
1908 }
1909 }
1910 else if (enmIommuType == IommuType_Intel)
1911 {
1912 PCIBusAddress Address;
1913 if (pBusMgr->findPCIAddress("iommu-intel", 0, Address))
1914 {
1915 uint32_t u32IommuAddress = (Address.miDevice << 16) | Address.miFn;
1916 InsertConfigInteger(pCfg, "IommuIntelEnabled", true);
1917 InsertConfigInteger(pCfg, "IommuPciAddress", u32IommuAddress);
1918 if (pBusMgr->findPCIAddress("sb-ioapic", 0, Address))
1919 {
1920 uint32_t const u32SbIoapicAddress = (Address.miDevice << 16) | Address.miFn;
1921 InsertConfigInteger(pCfg, "SbIoApicPciAddress", u32SbIoapicAddress);
1922 }
1923 else
1924 return pVMM->pfnVMR3SetError(pUVM, VERR_INVALID_PARAMETER, RT_SRC_POS,
1925 N_("Intel IOMMU is enabled, but the I/O APIC is not assigned a PCI address!"));
1926 }
1927 }
1928
1929 InsertConfigInteger(pCfg, "IocPciAddress", uIocPCIAddress);
1930 if (chipsetType == ChipsetType_ICH9)
1931 {
1932 InsertConfigInteger(pCfg, "McfgBase", uMcfgBase);
1933 InsertConfigInteger(pCfg, "McfgLength", cbMcfgLength);
1934 /* 64-bit prefetch window root resource: Only for ICH9 and if PAE or Long Mode is enabled (@bugref{5454}). */
1935 if (fIsGuest64Bit || fEnablePAE)
1936 InsertConfigInteger(pCfg, "PciPref64Enabled", 1);
1937 }
1938 InsertConfigInteger(pCfg, "HostBusPciAddress", uHbcPCIAddress);
1939 InsertConfigInteger(pCfg, "ShowCpu", fShowCpu);
1940 InsertConfigInteger(pCfg, "CpuHotPlug", fCpuHotPlug);
1941
1942 InsertConfigInteger(pCfg, "Serial0IoPortBase", auSerialIoPortBase[0]);
1943 InsertConfigInteger(pCfg, "Serial0Irq", auSerialIrq[0]);
1944
1945 InsertConfigInteger(pCfg, "Serial1IoPortBase", auSerialIoPortBase[1]);
1946 InsertConfigInteger(pCfg, "Serial1Irq", auSerialIrq[1]);
1947
1948 if (auSerialIoPortBase[2])
1949 {
1950 InsertConfigInteger(pCfg, "Serial2IoPortBase", auSerialIoPortBase[2]);
1951 InsertConfigInteger(pCfg, "Serial2Irq", auSerialIrq[2]);
1952 }
1953
1954 if (auSerialIoPortBase[3])
1955 {
1956 InsertConfigInteger(pCfg, "Serial3IoPortBase", auSerialIoPortBase[3]);
1957 InsertConfigInteger(pCfg, "Serial3Irq", auSerialIrq[3]);
1958 }
1959
1960 InsertConfigInteger(pCfg, "Parallel0IoPortBase", auParallelIoPortBase[0]);
1961 InsertConfigInteger(pCfg, "Parallel0Irq", auParallelIrq[0]);
1962
1963 InsertConfigInteger(pCfg, "Parallel1IoPortBase", auParallelIoPortBase[1]);
1964 InsertConfigInteger(pCfg, "Parallel1Irq", auParallelIrq[1]);
1965
1966#if defined(VBOX_WITH_TPM)
1967 switch (enmTpmType)
1968 {
1969 case TpmType_v1_2:
1970 InsertConfigString(pCfg, "TpmMode", "tis1.2");
1971 break;
1972 case TpmType_v2_0:
1973 InsertConfigString(pCfg, "TpmMode", "fifo2.0");
1974 break;
1975 /** @todo Host and swtpm. */
1976 default:
1977 break;
1978 }
1979#endif
1980
1981 InsertConfigNode(pInst, "LUN#0", &pLunL0);
1982 InsertConfigString(pLunL0, "Driver", "ACPIHost");
1983 InsertConfigNode(pLunL0, "Config", &pCfg);
1984
1985 /* Attach the dummy CPU drivers */
1986 for (ULONG iCpuCurr = 1; iCpuCurr < cCpus; iCpuCurr++)
1987 {
1988 BOOL fCpuAttached = true;
1989
1990 if (fCpuHotPlug)
1991 {
1992 hrc = pMachine->GetCPUStatus(iCpuCurr, &fCpuAttached); H();
1993 }
1994
1995 if (fCpuAttached)
1996 {
1997 InsertConfigNode(pInst, Utf8StrFmt("LUN#%u", iCpuCurr).c_str(), &pLunL0);
1998 InsertConfigString(pLunL0, "Driver", "ACPICpu");
1999 InsertConfigNode(pLunL0, "Config", &pCfg);
2000 }
2001 }
2002 }
2003
2004 /*
2005 * Configure DBGF (Debug(ger) Facility) and DBGC (Debugger Console).
2006 */
2007 vrc = i_configGuestDbg(virtualBox, pMachine, pRoot); VRC();
2008 }
2009 catch (ConfigError &x)
2010 {
2011 // InsertConfig threw something:
2012 pVMM->pfnVMR3SetError(pUVM, x.m_vrc, RT_SRC_POS, "Caught ConfigError: %Rrc - %s", x.m_vrc, x.what());
2013 return x.m_vrc;
2014 }
2015 catch (HRESULT hrcXcpt)
2016 {
2017 AssertLogRelMsgFailedReturn(("hrc=%Rhrc\n", hrcXcpt), VERR_MAIN_CONFIG_CONSTRUCTOR_COM_ERROR);
2018 }
2019
2020#ifdef VBOX_WITH_EXTPACK
2021 /*
2022 * Call the extension pack hooks if everything went well thus far.
2023 */
2024 if (RT_SUCCESS(vrc))
2025 {
2026 pAlock->release();
2027 vrc = mptrExtPackManager->i_callAllVmConfigureVmmHooks(this, pVM, pVMM);
2028 pAlock->acquire();
2029 }
2030#endif
2031
2032 /*
2033 * Apply the CFGM overlay.
2034 */
2035 if (RT_SUCCESS(vrc))
2036 vrc = i_configCfgmOverlay(pRoot, virtualBox, pMachine);
2037
2038 /*
2039 * Dump all extradata API settings tweaks, both global and per VM.
2040 */
2041 if (RT_SUCCESS(vrc))
2042 vrc = i_configDumpAPISettingsTweaks(virtualBox, pMachine);
2043
2044#undef H
2045
2046 pAlock->release(); /* Avoid triggering the lock order inversion check. */
2047
2048 /*
2049 * Register VM state change handler.
2050 */
2051 int vrc2 = pVMM->pfnVMR3AtStateRegister(pUVM, Console::i_vmstateChangeCallback, this);
2052 AssertRC(vrc2);
2053 if (RT_SUCCESS(vrc))
2054 vrc = vrc2;
2055
2056 /*
2057 * Register VM runtime error handler.
2058 */
2059 vrc2 = pVMM->pfnVMR3AtRuntimeErrorRegister(pUVM, Console::i_atVMRuntimeErrorCallback, this);
2060 AssertRC(vrc2);
2061 if (RT_SUCCESS(vrc))
2062 vrc = vrc2;
2063
2064 pAlock->acquire();
2065
2066 LogFlowFunc(("vrc = %Rrc\n", vrc));
2067 LogFlowFuncLeave();
2068
2069 return vrc;
2070}
Note: See TracBrowser for help on using the repository browser.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette