1 | ; $Id: tstAsmMovFixedReg-1.asm 98103 2023-01-17 14:15:46Z vboxsync $
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2 | ;; @file
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3 | ; Disassembly testcase - Valid mov immediate to fixed registers.
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4 | ;
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5 | ; This is a build test, that means it will be assembled, disassembled,
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6 | ; then the disassembly output will be assembled and the new binary will
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7 | ; compared with the original.
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8 | ;
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9 |
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10 | ;
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11 | ; Copyright (C) 2013-2023 Oracle and/or its affiliates.
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12 | ;
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13 | ; This file is part of VirtualBox base platform packages, as
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14 | ; available from https://www.virtualbox.org.
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15 | ;
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16 | ; This program is free software; you can redistribute it and/or
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17 | ; modify it under the terms of the GNU General Public License
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18 | ; as published by the Free Software Foundation, in version 3 of the
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19 | ; License.
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20 | ;
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21 | ; This program is distributed in the hope that it will be useful, but
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22 | ; WITHOUT ANY WARRANTY; without even the implied warranty of
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23 | ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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24 | ; General Public License for more details.
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25 | ;
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26 | ; You should have received a copy of the GNU General Public License
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27 | ; along with this program; if not, see <https://www.gnu.org/licenses>.
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28 | ;
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29 | ; SPDX-License-Identifier: GPL-3.0-only
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30 | ;
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31 |
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32 | BITS TEST_BITS
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33 |
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34 | mov al, 01h
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35 | mov cl, 02h
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36 | mov dl, 03h
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37 | mov bl, 04h
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38 | mov ah, 05h
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39 | mov ch, 06h
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40 | mov dh, 07h
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41 | mov bh, 08h
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42 | %if TEST_BITS == 64
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43 | mov spl, 09h
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44 | mov bpl, 0ah
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45 | mov sil, 0bh
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46 | mov dil, 0ch
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47 | mov r8b, 0dh
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48 | mov r9b, 0eh
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49 | mov r10b, 0fh
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50 | mov r11b, 010h
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51 | mov r12b, 011h
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52 | mov r13b, 012h
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53 | mov r14b, 013h
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54 | mov r15b, 014h
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55 | %endif
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56 |
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57 | mov ax, 0f701h
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58 | mov cx, 0f702h
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59 | mov dx, 0f703h
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60 | mov bx, 0f704h
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61 | mov sp, 0f705h
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62 | mov bp, 0f706h
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63 | mov si, 0f707h
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64 | mov di, 0f708h
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65 | %if TEST_BITS == 64
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66 | mov r8w, 0f709h
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67 | mov r9w, 0f70ah
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68 | mov r10w, 0f70bh
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69 | mov r11w, 0f70ch
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70 | mov r12w, 0f70dh
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71 | mov r13w, 0f70eh
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72 | mov r14w, 0f70fh
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73 | mov r15w, 0f710h
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74 | %endif
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75 |
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76 | mov eax, 0beeff701h
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77 | mov ecx, 0beeff702h
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78 | mov edx, 0beeff703h
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79 | mov ebx, 0beeff704h
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80 | mov esp, 0beeff705h
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81 | mov ebp, 0beeff706h
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82 | mov esi, 0beeff707h
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83 | mov edi, 0beeff708h
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84 | %if TEST_BITS == 64
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85 | mov r8d, 0beeff709h
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86 | mov r9d, 0beeff70ah
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87 | mov r10d, 0beeff70bh
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88 | mov r11d, 0beeff70ch
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89 | mov r12d, 0beeff70dh
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90 | mov r13d, 0beeff70eh
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91 | mov r14d, 0beeff70fh
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92 | mov r15d, 0beeff710h
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93 | %endif
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94 |
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95 | %if TEST_BITS == 64
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96 | mov rax, 0feedbabef00df701h
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97 | mov rcx, 0feedbabef00df702h
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98 | mov rdx, 0feedbabef00df703h
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99 | mov rbx, 0feedbabef00df704h
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100 | mov rsp, 0feedbabef00df705h
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101 | mov rbp, 0feedbabef00df706h
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102 | mov rsi, 0feedbabef00df707h
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103 | mov rdi, 0feedbabef00df708h
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104 | mov r8, 0feedbabef00df709h
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105 | mov r9, 0feedbabef00df70ah
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106 | mov r10, 0feedbabef00df70bh
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107 | mov r11, 0feedbabef00df70ch
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108 | mov r12, 0feedbabef00df70dh
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109 | mov r13, 0feedbabef00df70eh
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110 | mov r14, 0feedbabef00df70fh
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111 | mov r15, 0feedbabef00df710h
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112 | %endif
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113 |
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