tstAsmLock-2.asm@ 98278

Last change on this file since 98278 was 98103, checked in by vboxsync, 2 years ago
Copyright year updates by scm.
Property svn:eol-style set to `native` Property svn:keywords set to `Id Revision`
File size: 13.4 KB

Line
1	; $Id: tstAsmLock-2.asm 98103 2023-01-17 14:15:46Z vboxsync $
2	;; @file
3	; Disassembly testcase - Invalid invariants.
4	;
5	; The intention is to check in a binary using the --all-invalid mode
6	; of tstDisasm-2.
7	;
8	; There are some regX, reg/memX variations that aren't tested as
9	; they would require db'ing out the instructions (12 /r and 13 /r
10	; for instance).
11	;
12
13	;
14	; Copyright (C) 2008-2023 Oracle and/or its affiliates.
15	;
16	; This file is part of VirtualBox base platform packages, as
17	; available from https://www.virtualbox.org.
18	;
19	; This program is free software; you can redistribute it and/or
20	; modify it under the terms of the GNU General Public License
21	; as published by the Free Software Foundation, in version 3 of the
22	; License.
23	;
24	; This program is distributed in the hope that it will be useful, but
25	; WITHOUT ANY WARRANTY; without even the implied warranty of
26	; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
27	; General Public License for more details.
28	;
29	; You should have received a copy of the GNU General Public License
30	; along with this program; if not, see <https://www.gnu.org/licenses>.
31	;
32	; SPDX-License-Identifier: GPL-3.0-only
33	;
34
35	%include "tstAsm.mac"
36	%if TEST_BITS == 64
37	; The disassembler doesn't do imm32 right for 64-bit stuff, so disable it for now.
38	; %define WITH_64_BIT_TESTS_IMM32
39	%define WITH_64_BIT_TESTS
40	%endif
41
42	BITS TEST_BITS
43
44	;
45	; ADC
46	;
47	; 14 ib ADC AL, imm8
48	lock adc al, byte 8
49	; 15 i[wd] ADC [ER]AX, immX
50	lock adc ax, word 16
51	lock adc eax, dword 128
52	%ifdef WITH_64_BIT_TESTS_IMM32
53	lock adc rax, dword 256
54	lock adc rax, dword 0cc90cc90h
55	%endif
56	; 80 /2 ib ADC reg/mem8, imm8 - with reg dst
57	lock adc cl, byte 8
58	; 81 /2 i[wd] ADC reg/memX, immX - with reg dst
59	lock adc cx, word 1000h
60	lock adc ecx, dword 100000h
61	%ifdef WITH_64_BIT_TESTS_IMM32
62	lock adc rcx, dword 100000h
63	%endif
64	; 83 /2 ib ADC reg/memX, imm8 - with reg dst
65	lock adc cx, byte 07fh
66	lock adc ecx, byte 07fh
67	%ifdef WITH_64_BIT_TESTS_IMM32
68	lock adc rcx, byte 07fh
69	%endif
70
71	; 10 /r ADC reg/mem8, reg8 - with reg dst
72	lock adc cl, bl
73	; 11 /r ADC reg/memX, regX - with reg dst
74	lock adc cx, bx
75	lock adc ecx, ebx
76	%ifdef WITH_64_BIT_TESTS
77	lock adc rcx, rbx
78	%endif
79	; 12 /r ADC reg8, reg/mem8
80	lock adc cl, [0badh]
81	; 13 /r ADC regX, reg/memX
82	lock adc cx, [0badh]
83	lock adc ecx, [0badh]
84	%ifdef WITH_64_BIT_TESTS
85	lock adc rcx, [0badh]
86	%endif
87
88	;
89	; ADD
90	;
91	; 04 ib ADD AL, imm8
92	lock add al, byte 8
93	; 05 i[wd] ADD [ER]AX, immX
94	lock add ax, word 16
95	lock add eax, dword 128
96	%ifdef WITH_64_BIT_TESTS_IMM32
97	lock add rax, dword 256
98	lock add rax, dword 0cc90cc90h
99	%endif
100	; 80 /0 ib ADD reg/mem8, imm8 - with reg dst
101	lock add cl, byte 8
102	; 81 /0 i[wd] ADD reg/memX, immX - with reg dst
103	lock add cx, word 1000h
104	lock add ecx, dword 100000h
105	%ifdef WITH_64_BIT_TESTS_IMM32
106	lock add rcx, dword 100000h
107	%endif
108	; 83 /0 ib ADD reg/memX, imm8 - with reg dst
109	lock add cx, byte 07fh
110	lock add ecx, byte 07fh
111	%ifdef WITH_64_BIT_TESTS
112	lock add rcx, byte 07fh
113	%endif
114
115	; 00 /r ADD reg/mem8, reg8 - with reg dst
116	lock add cl, bl
117	; 01 /r ADD reg/memX, regX - with reg dst
118	lock add cx, bx
119	lock add ecx, ebx
120	%ifdef WITH_64_BIT_TESTS
121	lock add rcx, rbx
122	%endif
123	; 02 /r ADD reg8, reg/mem8
124	lock add cl, [0badh]
125	; 03 /r ADD regX, reg/memX
126	lock add cx, [0badh]
127	lock add ecx, [0badh]
128	%ifdef WITH_64_BIT_TESTS
129	lock add rcx, [0badh]
130	%endif
131
132	;
133	; AND
134	;
135	; 24 ib AND AL, imm8
136	lock and al, byte 8
137	; 25 i[wd] AND [ER]AX, immX
138	lock and ax, word 16
139	lock and eax, dword 128
140	%ifdef WITH_64_BIT_TESTS_IMM32
141	lock and rax, dword 256
142	lock and rax, dword 0cc90cc90h
143	%endif
144	; 80 /4 ib AND reg/mem8, imm8 - with reg dst
145	lock and cl, byte 8
146	; 81 /4 i[wd] AND reg/memX, immX - with reg dst
147	lock and cx, word 1000h
148	lock and ecx, dword 100000h
149	%ifdef WITH_64_BIT_TESTS_IMM32
150	lock and rcx, dword 100000h
151	%endif
152	; 83 /4 ib AND reg/memX, imm8 - with reg dst
153	lock and cx, byte 07fh
154	lock and ecx, byte 07fh
155	%ifdef WITH_64_BIT_TESTS
156	lock and rcx, byte 07fh
157	%endif
158
159	; 20 /r AND reg/mem8, reg8 - with reg dst
160	lock and cl, bl
161	; 21 /r AND reg/memX, regX - with reg dst
162	lock and cx, bx
163	lock and ecx, ebx
164	%ifdef WITH_64_BIT_TESTS
165	lock and rcx, rbx
166	%endif
167	; 22 /r AND reg8, reg/mem8
168	lock and cl, [0badh]
169	; 23 /r AND regX, reg/memX
170	lock and cx, [0badh]
171	lock and ecx, [0badh]
172	%ifdef WITH_64_BIT_TESTS
173	lock and rcx, [0badh]
174	%endif
175
176	;
177	; BTC
178	;
179	; 0f bb /r BTC reg/memX, regX (X != 8) - with reg dst
180	lock btc cx, bx
181	lock btc ecx, ebx
182	%ifdef WITH_64_BIT_TESTS
183	lock btc rcx, rbx
184	lock btc r8, rbx
185	lock btc r10, r8
186	%endif
187	; 0f ba /7 ib BTC reg/memX, imm8 (X != 8) - with reg dst
188	lock btc cx, 15
189	lock btc ecx, 30
190	%ifdef WITH_64_BIT_TESTS
191	lock btc rcx, 60
192	lock btc r8, 61
193	lock btc r10, 3
194	%endif
195
196	;
197	; BTR
198	;
199	; 0f b3 /r BTR reg/memX, regX (X != 8) - with reg dst
200	lock btr cx, bx
201	lock btr ecx, ebx
202	%ifdef WITH_64_BIT_TESTS
203	lock btr rcx, rbx
204	lock btr r8, rbx
205	lock btr r10, r8
206	%endif
207	; 0f ba /6 ib BTR reg/memX, imm8 (X != 8) - with reg dst
208	lock btr cx, 15
209	lock btr ecx, 30
210	%ifdef WITH_64_BIT_TESTS
211	lock btr rcx, 60
212	lock btr r8, 61
213	lock btr r10, 3
214	%endif
215
216	;
217	; BTS
218	;
219	; 0f ab /r BTS reg/memX, regX (X != 8) - with reg dst
220	lock bts cx, bx
221	lock bts ecx, ebx
222	%ifdef WITH_64_BIT_TESTS
223	lock bts rcx, rbx
224	lock bts r8, rbx
225	lock bts r10, r8
226	%endif
227	; 0f ba /5 ib BTS reg/memX, imm8 (X != 8) - with reg dst
228	lock bts cx, 15
229	lock bts ecx, 30
230	%ifdef WITH_64_BIT_TESTS
231	lock bts rcx, 60
232	lock bts r8, 61
233	lock bts r10, 3
234	%endif
235
236	;
237	; CMPXCHG
238	;
239	; 0f b0 /r CMPXCHG reg8/mem8, regX - with reg dst
240	lock cmpxchg bl, cl
241	; 0f b1 /r CMPXCHG regX/memX, regX - with reg dst
242	lock cmpxchg bx, cx
243	lock cmpxchg ebx, ecx
244	%ifdef WITH_64_BIT_TESTS
245	lock cmpxchg rbx, rcx
246	%endif
247
248	;
249	; CMPXCHG8B
250	; CMPXCHG16B
251	;
252	; all valid.
253
254	;
255	; DEC
256	;
257	; fe /1 DEC reg8/mem8 - with reg dst
258	lock dec bl
259	; ff /1 DEC regX/memX - with reg dst
260
261	%if TEST_BITS != 64 ; cannot force these two in 32 and 16 bit mode.
262	db 066h, 0f0h, 0ffh, 0cbh
263	db 0f0h, 0ffh, 0cbh
264	%else
265	lock dec bx
266	lock dec ebx
267	%ifdef WITH_64_BIT_TESTS
268	lock dec rbx
269	lock dec r8
270	lock dec r14
271	%endif
272	%endif
273	%if TEST_BITS != 64
274	; 48 +rw DEC reg16
275	lock dec dx
276	; 48 +rd DEC reg32
277	lock dec edx
278	%endif
279
280	;
281	; INC
282	;
283	; fe /1 INC reg8/mem8 - with reg dst
284	lock inc bl
285	; ff /1 INC regX/memX - with reg dst
286
287	%if TEST_BITS != 64 ; cannot force these two in 32 and 16 bit mode.
288	db 066h, 0f0h, 0ffh, 0c3h
289	db 0f0h, 0ffh, 0c3h
290	%else
291	lock inc bx
292	lock inc ebx
293	%ifdef WITH_64_BIT_TESTS
294	lock inc rbx
295	lock inc r8
296	lock inc r14
297	%endif
298	%endif
299	%if TEST_BITS != 64
300	; 48 +rw INC reg16
301	lock inc dx
302	; 48 +rd INC reg32
303	lock inc edx
304	%endif
305
306	;
307	; NEG
308	;
309	; f6 /3 NEG reg8/mem8 - with reg dst
310	lock neg bl
311	; f7 /3 NEG regX/memX - with reg dst
312	lock neg bx
313	lock neg ebx
314	%ifdef WITH_64_BIT_TESTS
315	lock neg rbx
316	lock neg r8
317	lock neg r14
318	%endif
319
320	;
321	; NOT
322	;
323	; f6 /2 NOT reg8/mem8 - with reg dst
324	lock not bl
325	; f7 /2 NOT regX/memX - with reg dst
326	lock not bx
327	lock not ebx
328	%ifdef WITH_64_BIT_TESTS
329	lock not rbx
330	lock not r8
331	lock not r14
332	%endif
333
334	;
335	; OR
336	;
337	; 0C ib OR AL, imm8
338	lock or al, byte 8
339	; 0D i[wd] OR [ER]AX, immX
340	lock or ax, word 16
341	lock or eax, dword 128
342	%ifdef WITH_64_BIT_TESTS_IMM32
343	lock or rax, dword 256
344	lock or rax, dword 0cc90cc90h
345	%endif
346	; 80 /1 ib OR reg/mem8, imm8 - with reg dst
347	lock or cl, byte 8
348	; 81 /1 i[wd] OR reg/memX, immX - with reg dst
349	lock or cx, word 1000h
350	lock or ecx, dword 100000h
351	%ifdef WITH_64_BIT_TESTS_IMM32
352	lock or rcx, dword 100000h
353	%endif
354	; 83 /1 ib OR reg/memX, imm8 - with reg dst
355	lock or cx, byte 07fh
356	lock or ecx, byte 07fh
357	%ifdef WITH_64_BIT_TESTS_IMM32
358	lock or rcx, byte 07fh
359	%endif
360	; 08 /r OR reg/mem8, reg8 - with reg dst
361	lock or cl, bl
362	; 09 /r OR reg/memX, regX - with reg dst
363	lock or cx, bx
364	lock or ecx, ebx
365	%ifdef WITH_64_BIT_TESTS
366	lock or rcx, rbx
367	%endif
368	; 0A /r OR reg8, reg/mem8
369	lock or cl, [0badh]
370	; 0B /r OR regX, reg/memX
371	lock or cx, [0badh]
372	lock or ecx, [0badh]
373	%ifdef WITH_64_BIT_TESTS
374	lock or rcx, [0badh]
375	%endif
376
377	;
378	; SBB
379	;
380	; 1C ib SBB AL, imm8
381	lock sbb al, byte 8
382	; 1D i[wd] SBB [ER]AX, immX
383	lock sbb ax, word 16
384	lock sbb eax, dword 128
385	%ifdef WITH_64_BIT_TESTS_IMM32
386	lock sbb rax, dword 256
387	lock sbb rax, dword 0cc90cc90h
388	%endif
389	; 80 /3 ib SBB reg/mem8, imm8 - with reg dst
390	lock sbb cl, byte 8
391	; 81 /3 i[wd] SBB reg/memX, immX - with reg dst
392	lock sbb cx, word 1000h
393	lock sbb ecx, dword 100000h
394	%ifdef WITH_64_BIT_TESTS_IMM32
395	lock sbb rcx, dword 100000h
396	%endif
397	; 83 /3 ib SBB reg/memX, imm8 - with reg dst
398	lock sbb cx, byte 07fh
399	lock sbb ecx, byte 07fh
400	%ifdef WITH_64_BIT_TESTS_IMM32
401	lock sbb rcx, byte 07fh
402	%endif
403	; 18 /r SBB reg/mem8, reg8 - with reg dst
404	lock sbb cl, bl
405	; 19 /r SBB reg/memX, regX - with reg dst
406	lock sbb cx, bx
407	lock sbb ecx, ebx
408	%ifdef WITH_64_BIT_TESTS
409	lock sbb rcx, rbx
410	%endif
411	; 1A /r SBB reg8, reg/mem8
412	lock sbb cl, [0badh]
413	; 1B /r SBB regX, reg/memX
414	lock sbb cx, [0badh]
415	lock sbb ecx, [0badh]
416	%ifdef WITH_64_BIT_TESTS
417	lock sbb rcx, [0badh]
418	%endif
419
420	;
421	; SUB
422	;
423	; 2C ib SUB AL, imm8
424	lock sub al, byte 8
425	; 2D i[wd] SUB [ER]AX, immX
426	lock sub ax, word 16
427	lock sub eax, dword 128
428	%ifdef WITH_64_BIT_TESTS_IMM32
429	lock sub rax, dword 256
430	lock sub rax, dword 0cc90cc90h
431	%endif
432	; 80 /5 ib SUB reg/mem8, imm8 - with reg dst
433	lock sub cl, byte 8
434	; 81 /5 i[wd] SUB reg/memX, immX - with reg dst
435	lock sub cx, word 1000h
436	lock sub ecx, dword 100000h
437	%ifdef WITH_64_BIT_TESTS_IMM32
438	lock sub rcx, dword 100000h
439	%endif
440	; 83 /5 ib SUB reg/memX, imm8 - with reg dst
441	lock sub cx, byte 07fh
442	lock sub ecx, byte 07fh
443	%ifdef WITH_64_BIT_TESTS_IMM32
444	lock sub rcx, byte 07fh
445	%endif
446	; 28 /r SUB reg/mem8, reg8 - with reg dst
447	lock sub cl, bl
448	; 29 /r SUB reg/memX, regX - with reg dst
449	lock sub cx, bx
450	lock sub ecx, ebx
451	%ifdef WITH_64_BIT_TESTS
452	lock sub rcx, rbx
453	%endif
454	; 2A /r SUB reg8, reg/mem8
455	lock sub cl, [0badh]
456	; 2B /r SUB regX, reg/memX
457	lock sub cx, [0badh]
458	lock sub ecx, [0badh]
459	%ifdef WITH_64_BIT_TESTS
460	lock sub rcx, [0badh]
461	%endif
462
463	;
464	; XADD
465	;
466	; 0f c0 /r XADD reg/mem8, reg8 - with reg dst
467	lock xadd al, bl
468	; 0f c1 /r XADD reg/memX, immX - with reg dst
469	lock xadd cx, bx
470	lock xadd ecx, ebx
471	%ifdef WITH_64_BIT_TESTS
472	lock xadd rcx, rbx
473	lock xadd r8, rbx
474	lock xadd r10, r8
475	%endif
476
477	;
478	; XCHG
479	;
480	; Note: The operands can be switched around but the
481	; encoding is the same.
482	;
483	; 90 +r[wdq] XCHG [RE]ax, regX
484	lock xchg ax, bx
485	lock xchg eax, ecx
486	%ifdef WITH_64_BIT_TESTS
487	lock xchg rax, rcx
488	lock xchg rax, r10
489	%endif
490	; 86 /r XCHG reg/mem8, imm8 - with reg dst
491	lock xchg al, bl
492	%ifdef WITH_64_BIT_TESTS
493	lock xchg r10b, cl
494	lock xchg r10b, r15b
495	%endif
496	; 87 /r XCHG reg/memX, immX - with reg dst
497	lock xchg ax, bx
498	lock xchg eax, ebx
499	%ifdef WITH_64_BIT_TESTS_IMM32
500	lock xchg rax, rbx
501	lock xchg r12, rbx
502	lock xchg r14, r8
503	%endif
504
505	;
506	; XOR
507	;
508	; 34 ib XOR AL, imm8
509	lock xor al, byte 8
510	; 35 i[wd] XOR [ER]AX, immX
511	lock xor ax, word 16
512	lock xor eax, dword 128
513	%ifdef WITH_64_BIT_TESTS_IMM32
514	lock xor rax, dword 256
515	lock xor rax, dword 0cc90cc90h
516	%endif
517	; 80 /6 ib XOR reg/mem8, imm8 - with reg dst
518	lock xor cl, byte 8
519	; 81 /6 i[wd] XOR reg/memX, immX - with reg dst
520	lock xor cx, word 1000h
521	lock xor ecx, dword 100000h
522	%ifdef WITH_64_BIT_TESTS_IMM32
523	lock xor rcx, dword 100000h
524	%endif
525	; 83 /6 ib XOR reg/memX, imm8 - with reg dst
526	lock xor cx, byte 07fh
527	lock xor ecx, byte 07fh
528	%ifdef WITH_64_BIT_TESTS_IMM32
529	lock xor rcx, byte 07fh
530	%endif
531	; 30 /r XOR reg/mem8, reg8 - with reg dst
532	lock xor cl, bl
533	; 31 /r XOR reg/memX, regX - with reg dst
534	lock xor cx, bx
535	lock xor ecx, ebx
536	%ifdef WITH_64_BIT_TESTS
537	lock xor rcx, rbx
538	%endif
539	; 32 /r XOR reg8, reg/mem8
540	lock xor cl, [0badh]
541	; 33 /r XOR regX, reg/memX
542	lock xor cx, [0badh]
543	lock xor ecx, [0badh]
544	%ifdef WITH_64_BIT_TESTS
545	lock xor rcx, [0badh]
546	%endif
547

Note: See TracBrowser for help on using the repository browser.

source: vbox/trunk/src/VBox/Disassembler/testcase/tstAsmLock-2.asm@ 98278

Download in other formats: