DisasmTables-armv8-a64-ld-st.cpp.h@ 107044

Last change on this file since 107044 was 106817, checked in by vboxsync, 3 weeks ago
Disassembler: Decode SIMD load/store multiple structures (post-indexed) instructions immediate, bugref:10394
Property svn:eol-style set to `native` Property svn:keywords set to `Author Date Id Revision`
File size: 107.1 KB

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1	/* $Id: DisasmTables-armv8-a64-ld-st.cpp.h 106817 2024-11-01 10:06:53Z vboxsync $ */
2	/** @file
3	* VBox disassembler - Tables for ARMv8 A64 - Lods & Stores.
4	*/
5
6	/*
7	* Copyright (C) 2023-2024 Oracle and/or its affiliates.
8	*
9	* This file is part of VirtualBox base platform packages, as
10	* available from https://www.virtualbox.org.
11	*
12	* This program is free software; you can redistribute it and/or
13	* modify it under the terms of the GNU General Public License
14	* as published by the Free Software Foundation, in version 3 of the
15	* License.
16	*
17	* This program is distributed in the hope that it will be useful, but
18	* WITHOUT ANY WARRANTY; without even the implied warranty of
19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20	* General Public License for more details.
21	*
22	* You should have received a copy of the GNU General Public License
23	* along with this program; if not, see <https://www.gnu.org/licenses>.
24	*
25	* SPDX-License-Identifier: GPL-3.0-only
26	*/
27
28
29	/* STRB/LDRB/LDRSB/STR/LDR/STRH/LDRH/LDRSH/LDRSW/PRFM
30	*
31	* Note: The size,opc bitfields are concatenated to form an index.
32	*/
33	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(LdStRegUImmGpr)
34	DIS_ARMV8_INSN_DECODE(kDisParmParseSize, 30, 2, DIS_ARMV8_INSN_PARAM_UNSET),
35	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 0, 5, 0 /idxParam/),
36	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 1 /idxParam/),
37	DIS_ARMV8_INSN_DECODE(kDisParmParseImmMemOff, 10, 12, 1 /idxParam/),
38	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(LdStRegUImmGpr)
39	DIS_ARMV8_OP(0x39000000, "strb", OP_ARMV8_A64_STRB, DISOPTYPE_HARMLESS),
40	DIS_ARMV8_OP(0x39400000, "ldrb", OP_ARMV8_A64_LDRB, DISOPTYPE_HARMLESS),
41	DIS_ARMV8_OP_EX(0x39800000, "ldrsb", OP_ARMV8_A64_LDRSB, DISOPTYPE_HARMLESS, DISARMV8INSNCLASS_F_FORCED_64BIT),
42	DIS_ARMV8_OP(0x39c00000, "ldrsb", OP_ARMV8_A64_LDRSB, DISOPTYPE_HARMLESS),
43	DIS_ARMV8_OP(0x79000000, "strh", OP_ARMV8_A64_STRH, DISOPTYPE_HARMLESS),
44	DIS_ARMV8_OP(0x79400000, "ldrh", OP_ARMV8_A64_LDRH, DISOPTYPE_HARMLESS),
45	DIS_ARMV8_OP_EX(0x79800000, "ldrsh", OP_ARMV8_A64_LDRSH, DISOPTYPE_HARMLESS, DISARMV8INSNCLASS_F_FORCED_64BIT),
46	DIS_ARMV8_OP(0x79c00000, "ldrsh", OP_ARMV8_A64_LDRSH, DISOPTYPE_HARMLESS),
47	DIS_ARMV8_OP(0xb9000000, "str", OP_ARMV8_A64_STR, DISOPTYPE_HARMLESS),
48	DIS_ARMV8_OP(0xb9400000, "ldr", OP_ARMV8_A64_LDR, DISOPTYPE_HARMLESS),
49	DIS_ARMV8_OP_EX(0xb9800000, "ldrsw", OP_ARMV8_A64_LDRSW, DISOPTYPE_HARMLESS, DISARMV8INSNCLASS_F_FORCED_64BIT),
50	INVALID_OPCODE,
51	DIS_ARMV8_OP(0xf9000000, "str", OP_ARMV8_A64_STR, DISOPTYPE_HARMLESS),
52	DIS_ARMV8_OP(0xf9400000, "ldr", OP_ARMV8_A64_LDR, DISOPTYPE_HARMLESS),
53	INVALID_OPCODE, /** @todo PRFM */
54	INVALID_OPCODE,
55	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(LdStRegUImmGpr, 0xffc00000 /fFixedInsn/,
56	kDisArmV8OpcDecodeCollate,
57	RT_BIT_32(22) \| RT_BIT_32(23) \| RT_BIT_32(30) \| RT_BIT_32(31), 22);
58
59
60	/* SIMD STR/LDR */
61	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(LdStRegUImmSimd)
62	DIS_ARMV8_INSN_DECODE(kDisParmParseSimdRegSize, 30, 2, DIS_ARMV8_INSN_PARAM_UNSET),
63	DIS_ARMV8_INSN_DECODE(kDisParmParseSimdRegScalar, 0, 5, 0 /idxParam/),
64	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 1 /idxParam/),
65	DIS_ARMV8_INSN_DECODE(kDisParmParseImmMemOff, 10, 12, 1 /idxParam/),
66	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER_ALTERNATIVE(LdStRegUImmSimd128)
67	DIS_ARMV8_INSN_DECODE(kDisParmParseSimdRegSize128, 0, 0, DIS_ARMV8_INSN_PARAM_UNSET),
68	DIS_ARMV8_INSN_DECODE(kDisParmParseSimdRegScalar, 0, 5, 0 /idxParam/),
69	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 1 /idxParam/),
70	DIS_ARMV8_INSN_DECODE(kDisParmParseImmMemOff, 10, 12, 1 /idxParam/),
71	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(LdStRegUImmSimd)
72	DIS_ARMV8_OP( 0x3d000000, "str", OP_ARMV8_A64_STR, DISOPTYPE_HARMLESS),
73	DIS_ARMV8_OP( 0x3d400000, "ldr", OP_ARMV8_A64_LDR, DISOPTYPE_HARMLESS),
74	DIS_ARMV8_OP_ALT_DECODE(0x3d800000, "str", OP_ARMV8_A64_STR, DISOPTYPE_HARMLESS, LdStRegUImmSimd128), /** @todo size == 0. */
75	DIS_ARMV8_OP_ALT_DECODE(0x3dc00000, "ldr", OP_ARMV8_A64_LDR, DISOPTYPE_HARMLESS, LdStRegUImmSimd128), /** @todo size == 0. */
76	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(LdStRegUImmSimd, 0x3fc00000 /fFixedInsn/,
77	kDisArmV8OpcDecodeNop,
78	RT_BIT_32(22) \| RT_BIT_32(23), 22);
79
80
81	/*
82	* C4.1.94 - Loads and Stores - Load/Store register variants
83	*
84	* Differentiate further based on the VR field.
85	*
86	* Bit 26
87	* +-------------------------------------------
88	* 0 GPR variants.
89	* 1 SIMD/FP variants
90	*/
91	DIS_ARMV8_DECODE_MAP_DEFINE_BEGIN(LdStRegUImm)
92	DIS_ARMV8_DECODE_MAP_ENTRY(LdStRegUImmGpr),
93	DIS_ARMV8_DECODE_MAP_ENTRY(LdStRegUImmSimd),
94	DIS_ARMV8_DECODE_MAP_DEFINE_END(LdStRegUImm, RT_BIT_32(26), 26);
95
96
97	/*
98	* STRB/LDRB/LDRSB/STR/LDR/STRH/LDRH/LDRSH/LDRSW/PRFM
99	*
100	* Note: The size,opc bitfields are concatenated to form an index.
101	*/
102	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(LdStRegOffGpr)
103	DIS_ARMV8_INSN_DECODE(kDisParmParseSize, 30, 2, DIS_ARMV8_INSN_PARAM_UNSET),
104	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 0, 5, 0 /idxParam/),
105	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 1 /idxParam/),
106	DIS_ARMV8_INSN_DECODE(kDisParmParseGprOff, 16, 5, 1 /idxParam/),
107	DIS_ARMV8_INSN_DECODE(kDisParmParseOption, 13, 3, 1 /idxParam/),
108	DIS_ARMV8_INSN_DECODE(kDisParmParseS, 12, 1, 1 /idxParam/),
109	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(LdStRegOffGpr)
110	DIS_ARMV8_OP(0x38200800, "strb", OP_ARMV8_A64_STRB, DISOPTYPE_HARMLESS),
111	DIS_ARMV8_OP(0x38600800, "ldrb", OP_ARMV8_A64_LDRB, DISOPTYPE_HARMLESS),
112	DIS_ARMV8_OP_EX(0x38a00800, "ldrsb", OP_ARMV8_A64_LDRSB, DISOPTYPE_HARMLESS, DISARMV8INSNCLASS_F_FORCED_64BIT),
113	DIS_ARMV8_OP(0x38e00800, "ldrsb", OP_ARMV8_A64_LDRSB, DISOPTYPE_HARMLESS),
114	DIS_ARMV8_OP(0x78200800, "strh", OP_ARMV8_A64_STRH, DISOPTYPE_HARMLESS),
115	DIS_ARMV8_OP(0x78600800, "ldrh", OP_ARMV8_A64_LDRH, DISOPTYPE_HARMLESS),
116	DIS_ARMV8_OP_EX(0x78a00800, "ldrsh", OP_ARMV8_A64_LDRSH, DISOPTYPE_HARMLESS, DISARMV8INSNCLASS_F_FORCED_64BIT),
117	DIS_ARMV8_OP(0x78e00800, "ldrsh", OP_ARMV8_A64_LDRSH, DISOPTYPE_HARMLESS),
118	DIS_ARMV8_OP(0xb8200800, "str", OP_ARMV8_A64_STR, DISOPTYPE_HARMLESS),
119	DIS_ARMV8_OP(0xb8600800, "ldr", OP_ARMV8_A64_LDR, DISOPTYPE_HARMLESS),
120	DIS_ARMV8_OP_EX(0xb8a00800, "ldrsw", OP_ARMV8_A64_LDRSW, DISOPTYPE_HARMLESS, DISARMV8INSNCLASS_F_FORCED_64BIT ),
121	INVALID_OPCODE,
122	DIS_ARMV8_OP(0xf8200800, "str", OP_ARMV8_A64_STR, DISOPTYPE_HARMLESS),
123	DIS_ARMV8_OP(0xf8600800, "ldr", OP_ARMV8_A64_LDR, DISOPTYPE_HARMLESS),
124	INVALID_OPCODE, /** @todo PRFM */
125	INVALID_OPCODE,
126	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(LdStRegOffGpr, 0xffe00c00 /fFixedInsn/,
127	kDisArmV8OpcDecodeCollate,
128	RT_BIT_32(22) \| RT_BIT_32(23) \| RT_BIT_32(30) \| RT_BIT_32(31), 22);
129
130
131	/* SIMD LDR/STR */
132	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(LdStRegOffSimd)
133	DIS_ARMV8_INSN_DECODE(kDisParmParseSimdRegSize, 30, 2, DIS_ARMV8_INSN_PARAM_UNSET),
134	DIS_ARMV8_INSN_DECODE(kDisParmParseSimdRegScalar, 0, 5, 0 /idxParam/),
135	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 1 /idxParam/),
136	DIS_ARMV8_INSN_DECODE(kDisParmParseGprOff, 16, 5, 1 /idxParam/),
137	DIS_ARMV8_INSN_DECODE(kDisParmParseOption, 13, 3, 1 /idxParam/),
138	DIS_ARMV8_INSN_DECODE(kDisParmParseS, 12, 1, 1 /idxParam/),
139	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER_ALTERNATIVE(LdStRegOffSimd128)
140	DIS_ARMV8_INSN_DECODE(kDisParmParseSimdRegSize128, 0, 0, DIS_ARMV8_INSN_PARAM_UNSET),
141	DIS_ARMV8_INSN_DECODE(kDisParmParseSimdRegScalar, 0, 5, 0 /idxParam/),
142	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 1 /idxParam/),
143	DIS_ARMV8_INSN_DECODE(kDisParmParseGprOff, 16, 5, 1 /idxParam/),
144	DIS_ARMV8_INSN_DECODE(kDisParmParseOption, 13, 3, 1 /idxParam/),
145	DIS_ARMV8_INSN_DECODE(kDisParmParseS, 12, 1, 1 /idxParam/),
146	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(LdStRegOffSimd)
147	DIS_ARMV8_OP( 0x3c200800, "str", OP_ARMV8_A64_STR, DISOPTYPE_HARMLESS),
148	DIS_ARMV8_OP( 0x3c600800, "ldr", OP_ARMV8_A64_LDR, DISOPTYPE_HARMLESS),
149	DIS_ARMV8_OP_ALT_DECODE(0x3ca00800, "str", OP_ARMV8_A64_STR, DISOPTYPE_HARMLESS, LdStRegOffSimd128), /** @todo size == 0. */
150	DIS_ARMV8_OP_ALT_DECODE(0x3ce00800, "ldr", OP_ARMV8_A64_LDR, DISOPTYPE_HARMLESS, LdStRegOffSimd128), /** @todo size == 0. */
151	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(LdStRegOffSimd, 0x3fe00c00 /fFixedInsn/,
152	kDisArmV8OpcDecodeNop,
153	RT_BIT_32(22) \| RT_BIT_32(23), 22);
154
155
156	/*
157	* C4.1.94 - Loads and Stores - Load/Store register (register offset) variants
158	*
159	* Differentiate further based on the VR field.
160	*
161	* Bit 26
162	* +-------------------------------------------
163	* 0 GPR variants.
164	* 1 SIMD/FP variants
165	*/
166	DIS_ARMV8_DECODE_MAP_DEFINE_BEGIN(LdStRegOff)
167	DIS_ARMV8_DECODE_MAP_ENTRY(LdStRegOffGpr),
168	DIS_ARMV8_DECODE_MAP_ENTRY(LdStRegOffSimd),
169	DIS_ARMV8_DECODE_MAP_DEFINE_END(LdStRegOff, RT_BIT_32(26), 26);
170
171
172	/* LDRAA/LDRAB */
173	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(LdStRegPac)
174	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 0, 5, 0 /idxParam/),
175	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 1 /idxParam/),
176	DIS_ARMV8_INSN_DECODE(kDisParmParseLdrPacImm, 0, 0, 1 /idxParam/), /* Hardcoded */
177	DIS_ARMV8_INSN_DECODE(kDisParmParseLdrPacW, 11, 1, 1 /idxParam/),
178	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(LdStRegPac)
179	DIS_ARMV8_OP(0xf8200400, "ldraa", OP_ARMV8_A64_LDRAA, DISOPTYPE_HARMLESS),
180	DIS_ARMV8_OP(0xf8a00400, "ldrab", OP_ARMV8_A64_LDRAB, DISOPTYPE_HARMLESS),
181	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(LdStRegPac, 0xffa00400 /fFixedInsn/,
182	kDisArmV8OpcDecodeNop,
183	RT_BIT_32(23), 23);
184
185
186	/* Atomic memory operations - Byte size variants */
187	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(AtomicMemoryByte)
188	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr32, 16, 5, 0 /idxParam/),
189	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr32, 0, 5, 1 /idxParam/),
190	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 2 /idxParam/),
191	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER_ALTERNATIVE(AtomicMemoryByteThe)
192	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr64, 16, 5, 0 /idxParam/),
193	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr64, 0, 5, 1 /idxParam/),
194	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 2 /idxParam/),
195	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER_ALTERNATIVE(AtomicMemoryByteLrcpc)
196	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr32, 0, 5, 0 /idxParam/),
197	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 1 /idxParam/),
198	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(AtomicMemoryByte)
199	DIS_ARMV8_OP( 0x38200000, "ldaddb", OP_ARMV8_A64_LDADDB, DISOPTYPE_HARMLESS),
200	DIS_ARMV8_OP( 0x38201000, "ldclrb", OP_ARMV8_A64_LDCLRB, DISOPTYPE_HARMLESS),
201	DIS_ARMV8_OP( 0x38202000, "ldeorb", OP_ARMV8_A64_LDEORB, DISOPTYPE_HARMLESS),
202	DIS_ARMV8_OP( 0x38203000, "ldsetb", OP_ARMV8_A64_LDSETB, DISOPTYPE_HARMLESS),
203	DIS_ARMV8_OP( 0x38204000, "ldsmaxb", OP_ARMV8_A64_LDSMAXB, DISOPTYPE_HARMLESS),
204	DIS_ARMV8_OP( 0x38205000, "ldsminb", OP_ARMV8_A64_LDSMINB, DISOPTYPE_HARMLESS),
205	DIS_ARMV8_OP( 0x38206000, "ldumaxb", OP_ARMV8_A64_LDUMAXB, DISOPTYPE_HARMLESS),
206	DIS_ARMV8_OP( 0x38207000, "lduminb", OP_ARMV8_A64_LDUMINB, DISOPTYPE_HARMLESS),
207	DIS_ARMV8_OP( 0x38208000, "swpb", OP_ARMV8_A64_SWPB, DISOPTYPE_HARMLESS),
208	DIS_ARMV8_OP_ALT_DECODE(0x38209000, "rcwclr", OP_ARMV8_A64_RCWCLR, DISOPTYPE_HARMLESS, AtomicMemoryByteThe), /* FEAT_THE */
209	DIS_ARMV8_OP_ALT_DECODE(0x3820a000, "rcwswp", OP_ARMV8_A64_RCWSWP, DISOPTYPE_HARMLESS, AtomicMemoryByteThe), /* FEAT_THE */
210	DIS_ARMV8_OP_ALT_DECODE(0x3820b000, "rcwset", OP_ARMV8_A64_RCWSET, DISOPTYPE_HARMLESS, AtomicMemoryByteThe), /* FEAT_THE */
211	INVALID_OPCODE,
212	INVALID_OPCODE,
213	INVALID_OPCODE,
214	INVALID_OPCODE,
215	DIS_ARMV8_OP( 0x38600000, "ldaddlb", OP_ARMV8_A64_LDADDLB, DISOPTYPE_HARMLESS),
216	DIS_ARMV8_OP( 0x38601000, "ldclrlb", OP_ARMV8_A64_LDCLRLB, DISOPTYPE_HARMLESS),
217	DIS_ARMV8_OP( 0x38602000, "ldeorlb", OP_ARMV8_A64_LDEORLB, DISOPTYPE_HARMLESS),
218	DIS_ARMV8_OP( 0x38603000, "ldsetlb", OP_ARMV8_A64_LDSETLB, DISOPTYPE_HARMLESS),
219	DIS_ARMV8_OP( 0x38604000, "ldsmaxlb", OP_ARMV8_A64_LDSMAXLB, DISOPTYPE_HARMLESS),
220	DIS_ARMV8_OP( 0x38605000, "ldsminlb", OP_ARMV8_A64_LDSMINLB, DISOPTYPE_HARMLESS),
221	DIS_ARMV8_OP( 0x38606000, "ldumaxlb", OP_ARMV8_A64_LDUMAXLB, DISOPTYPE_HARMLESS),
222	DIS_ARMV8_OP( 0x38607000, "lduminlb", OP_ARMV8_A64_LDUMINLB, DISOPTYPE_HARMLESS),
223	DIS_ARMV8_OP( 0x38608000, "swplb", OP_ARMV8_A64_SWPLB, DISOPTYPE_HARMLESS),
224	DIS_ARMV8_OP_ALT_DECODE(0x38609000, "rcwclrl", OP_ARMV8_A64_RCWCLRL, DISOPTYPE_HARMLESS, AtomicMemoryByteThe), /* FEAT_THE */
225	DIS_ARMV8_OP_ALT_DECODE(0x3860a000, "rcwswpl", OP_ARMV8_A64_RCWSWPL, DISOPTYPE_HARMLESS, AtomicMemoryByteThe), /* FEAT_THE */
226	DIS_ARMV8_OP_ALT_DECODE(0x3860b000, "rcwsetl", OP_ARMV8_A64_RCWSETL, DISOPTYPE_HARMLESS, AtomicMemoryByteThe), /* FEAT_THE */
227	INVALID_OPCODE,
228	INVALID_OPCODE,
229	INVALID_OPCODE,
230	INVALID_OPCODE,
231	DIS_ARMV8_OP( 0x38a00000, "ldaddab", OP_ARMV8_A64_LDADDAB, DISOPTYPE_HARMLESS),
232	DIS_ARMV8_OP( 0x38a01000, "ldclrab", OP_ARMV8_A64_LDCLRAB, DISOPTYPE_HARMLESS),
233	DIS_ARMV8_OP( 0x38a02000, "ldeorab", OP_ARMV8_A64_LDEORAB, DISOPTYPE_HARMLESS),
234	DIS_ARMV8_OP( 0x38a03000, "ldsetab", OP_ARMV8_A64_LDSETAB, DISOPTYPE_HARMLESS),
235	DIS_ARMV8_OP( 0x38a04000, "ldsmaxab", OP_ARMV8_A64_LDSMAXAB, DISOPTYPE_HARMLESS),
236	DIS_ARMV8_OP( 0x38a05000, "ldsminab", OP_ARMV8_A64_LDSMINAB, DISOPTYPE_HARMLESS),
237	DIS_ARMV8_OP( 0x38a06000, "ldumaxab", OP_ARMV8_A64_LDUMAXAB, DISOPTYPE_HARMLESS),
238	DIS_ARMV8_OP( 0x38a07000, "lduminab", OP_ARMV8_A64_LDUMINAB, DISOPTYPE_HARMLESS),
239	DIS_ARMV8_OP( 0x38a08000, "swpab", OP_ARMV8_A64_SWPAB, DISOPTYPE_HARMLESS),
240	DIS_ARMV8_OP_ALT_DECODE(0x38a09000, "rcwclra", OP_ARMV8_A64_RCWCLRA, DISOPTYPE_HARMLESS, AtomicMemoryByteThe), /* FEAT_THE */
241	DIS_ARMV8_OP_ALT_DECODE(0x38a0a000, "rcwswpa", OP_ARMV8_A64_RCWSWPA, DISOPTYPE_HARMLESS, AtomicMemoryByteThe), /* FEAT_THE */
242	DIS_ARMV8_OP_ALT_DECODE(0x38a0b000, "rcwseta", OP_ARMV8_A64_RCWSETA, DISOPTYPE_HARMLESS, AtomicMemoryByteThe), /* FEAT_THE */
243	DIS_ARMV8_OP_ALT_DECODE(0x38a0c000, "ldaprb", OP_ARMV8_A64_LDAPRB, DISOPTYPE_HARMLESS, AtomicMemoryByteLrcpc), /* FEAT_LRCPC / /* @todo Rs == 11111 */
244	INVALID_OPCODE,
245	INVALID_OPCODE,
246	INVALID_OPCODE,
247	DIS_ARMV8_OP( 0x38e00000, "ldaddalb", OP_ARMV8_A64_LDADDALB, DISOPTYPE_HARMLESS),
248	DIS_ARMV8_OP( 0x38e01000, "ldclralb", OP_ARMV8_A64_LDCLRALB, DISOPTYPE_HARMLESS),
249	DIS_ARMV8_OP( 0x38e02000, "ldeoralb", OP_ARMV8_A64_LDEORALB, DISOPTYPE_HARMLESS),
250	DIS_ARMV8_OP( 0x38e03000, "ldsetalb", OP_ARMV8_A64_LDSETALB, DISOPTYPE_HARMLESS),
251	DIS_ARMV8_OP( 0x38e04000, "ldsmaxalb", OP_ARMV8_A64_LDSMAXALB, DISOPTYPE_HARMLESS),
252	DIS_ARMV8_OP( 0x38e05000, "ldsminalb", OP_ARMV8_A64_LDSMINALB, DISOPTYPE_HARMLESS),
253	DIS_ARMV8_OP( 0x38e06000, "ldumaxalb", OP_ARMV8_A64_LDUMAXALB, DISOPTYPE_HARMLESS),
254	DIS_ARMV8_OP( 0x38e07000, "lduminalb", OP_ARMV8_A64_LDUMINALB, DISOPTYPE_HARMLESS),
255	DIS_ARMV8_OP( 0x38e08000, "swpalb", OP_ARMV8_A64_SWPALB, DISOPTYPE_HARMLESS),
256	DIS_ARMV8_OP_ALT_DECODE(0x38e09000, "rcwclral", OP_ARMV8_A64_RCWCLRAL, DISOPTYPE_HARMLESS, AtomicMemoryByteThe), /* FEAT_THE */
257	DIS_ARMV8_OP_ALT_DECODE(0x38e0a000, "rcwswpal", OP_ARMV8_A64_RCWSWPAL, DISOPTYPE_HARMLESS, AtomicMemoryByteThe), /* FEAT_THE */
258	DIS_ARMV8_OP_ALT_DECODE(0x38e0b000, "rcwsetal", OP_ARMV8_A64_RCWSETAL, DISOPTYPE_HARMLESS, AtomicMemoryByteThe), /* FEAT_THE */
259	/* Rest of the encodings is invalid. */
260	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(AtomicMemoryByte, 0xffe0fc00 /fFixedInsn/,
261	kDisArmV8OpcDecodeCollate,
262	/* opc */ RT_BIT_32(12) \| RT_BIT_32(13) \| RT_BIT_32(14)
263	/* o3 */ \| RT_BIT_32(15)
264	/* R */ \| RT_BIT_32(22)
265	/* A */ \| RT_BIT_32(23), 12);
266
267
268	/* Atomic memory operations - Halfword size variants */
269	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(AtomicMemoryHalfword)
270	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr32, 16, 5, 0 /idxParam/),
271	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr32, 0, 5, 1 /idxParam/),
272	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 2 /idxParam/),
273	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER_ALTERNATIVE(AtomicMemoryHalfwordThe)
274	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr64, 16, 5, 0 /idxParam/),
275	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr64, 0, 5, 1 /idxParam/),
276	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 2 /idxParam/),
277	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER_ALTERNATIVE(AtomicMemoryHalfwordLrcpc)
278	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr32, 0, 5, 0 /idxParam/),
279	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 1 /idxParam/),
280	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(AtomicMemoryHalfword)
281	DIS_ARMV8_OP( 0x78200000, "ldaddh", OP_ARMV8_A64_LDADDH, DISOPTYPE_HARMLESS),
282	DIS_ARMV8_OP( 0x78201000, "ldclrh", OP_ARMV8_A64_LDCLRH, DISOPTYPE_HARMLESS),
283	DIS_ARMV8_OP( 0x78202000, "ldeorh", OP_ARMV8_A64_LDEORH, DISOPTYPE_HARMLESS),
284	DIS_ARMV8_OP( 0x78203000, "ldseth", OP_ARMV8_A64_LDSETH, DISOPTYPE_HARMLESS),
285	DIS_ARMV8_OP( 0x78204000, "ldsmaxh", OP_ARMV8_A64_LDSMAXH, DISOPTYPE_HARMLESS),
286	DIS_ARMV8_OP( 0x78205000, "ldsminh", OP_ARMV8_A64_LDSMINH, DISOPTYPE_HARMLESS),
287	DIS_ARMV8_OP( 0x78206000, "ldumaxh", OP_ARMV8_A64_LDUMAXH, DISOPTYPE_HARMLESS),
288	DIS_ARMV8_OP( 0x78207000, "lduminh", OP_ARMV8_A64_LDUMINH, DISOPTYPE_HARMLESS),
289	DIS_ARMV8_OP( 0x78208000, "swph", OP_ARMV8_A64_SWPH, DISOPTYPE_HARMLESS),
290	DIS_ARMV8_OP_ALT_DECODE(0x78209000, "rcwsclr", OP_ARMV8_A64_RCWSCLR, DISOPTYPE_HARMLESS, AtomicMemoryHalfwordThe), /* FEAT_THE */
291	DIS_ARMV8_OP_ALT_DECODE(0x7820a000, "rcwsswp", OP_ARMV8_A64_RCWSSWP, DISOPTYPE_HARMLESS, AtomicMemoryHalfwordThe), /* FEAT_THE */
292	DIS_ARMV8_OP_ALT_DECODE(0x7820b000, "rcwsset", OP_ARMV8_A64_RCWSSET, DISOPTYPE_HARMLESS, AtomicMemoryHalfwordThe), /* FEAT_THE */
293	INVALID_OPCODE,
294	INVALID_OPCODE,
295	INVALID_OPCODE,
296	INVALID_OPCODE,
297	DIS_ARMV8_OP( 0x78600000, "ldaddlh", OP_ARMV8_A64_LDADDLH, DISOPTYPE_HARMLESS),
298	DIS_ARMV8_OP( 0x78601000, "ldclrlh", OP_ARMV8_A64_LDCLRLH, DISOPTYPE_HARMLESS),
299	DIS_ARMV8_OP( 0x78602000, "ldeorlh", OP_ARMV8_A64_LDEORLH, DISOPTYPE_HARMLESS),
300	DIS_ARMV8_OP( 0x78603000, "ldsetlh", OP_ARMV8_A64_LDSETLH, DISOPTYPE_HARMLESS),
301	DIS_ARMV8_OP( 0x78604000, "ldsmaxlh", OP_ARMV8_A64_LDSMAXLH, DISOPTYPE_HARMLESS),
302	DIS_ARMV8_OP( 0x78605000, "ldsminlh", OP_ARMV8_A64_LDSMINLH, DISOPTYPE_HARMLESS),
303	DIS_ARMV8_OP( 0x78606000, "ldumaxlh", OP_ARMV8_A64_LDUMAXLH, DISOPTYPE_HARMLESS),
304	DIS_ARMV8_OP( 0x78607000, "lduminlh", OP_ARMV8_A64_LDUMINLH, DISOPTYPE_HARMLESS),
305	DIS_ARMV8_OP( 0x78608000, "swplh", OP_ARMV8_A64_SWPLH, DISOPTYPE_HARMLESS),
306	DIS_ARMV8_OP_ALT_DECODE(0x78609000, "rcwsclrl", OP_ARMV8_A64_RCWSCLRL, DISOPTYPE_HARMLESS, AtomicMemoryHalfwordThe), /* FEAT_THE */
307	DIS_ARMV8_OP_ALT_DECODE(0x7860a000, "rcwsswpl", OP_ARMV8_A64_RCWSSWPL, DISOPTYPE_HARMLESS, AtomicMemoryHalfwordThe), /* FEAT_THE */
308	DIS_ARMV8_OP_ALT_DECODE(0x7860b000, "rcwssetl", OP_ARMV8_A64_RCWSSETL, DISOPTYPE_HARMLESS, AtomicMemoryHalfwordThe), /* FEAT_THE */
309	INVALID_OPCODE,
310	INVALID_OPCODE,
311	INVALID_OPCODE,
312	INVALID_OPCODE,
313	DIS_ARMV8_OP( 0x78a00000, "ldaddah", OP_ARMV8_A64_LDADDAH, DISOPTYPE_HARMLESS),
314	DIS_ARMV8_OP( 0x78a01000, "ldclrah", OP_ARMV8_A64_LDCLRAH, DISOPTYPE_HARMLESS),
315	DIS_ARMV8_OP( 0x78a02000, "ldeorah", OP_ARMV8_A64_LDEORAH, DISOPTYPE_HARMLESS),
316	DIS_ARMV8_OP( 0x78a03000, "ldsetah", OP_ARMV8_A64_LDSETAH, DISOPTYPE_HARMLESS),
317	DIS_ARMV8_OP( 0x78a04000, "ldsmaxah", OP_ARMV8_A64_LDSMAXAH, DISOPTYPE_HARMLESS),
318	DIS_ARMV8_OP( 0x78a05000, "ldsminah", OP_ARMV8_A64_LDSMINAH, DISOPTYPE_HARMLESS),
319	DIS_ARMV8_OP( 0x78a06000, "ldumaxah", OP_ARMV8_A64_LDUMAXAH, DISOPTYPE_HARMLESS),
320	DIS_ARMV8_OP( 0x78a07000, "lduminah", OP_ARMV8_A64_LDUMINAH, DISOPTYPE_HARMLESS),
321	DIS_ARMV8_OP( 0x78a08000, "swpah", OP_ARMV8_A64_SWPAH, DISOPTYPE_HARMLESS),
322	DIS_ARMV8_OP_ALT_DECODE(0x78a09000, "rcwsclra", OP_ARMV8_A64_RCWSCLRA, DISOPTYPE_HARMLESS, AtomicMemoryHalfwordThe), /* FEAT_THE */
323	DIS_ARMV8_OP_ALT_DECODE(0x78a0a000, "rcwsswpa", OP_ARMV8_A64_RCWSSWPA, DISOPTYPE_HARMLESS, AtomicMemoryHalfwordThe), /* FEAT_THE */
324	DIS_ARMV8_OP_ALT_DECODE(0x78a0b000, "rcwsseta", OP_ARMV8_A64_RCWSSETA, DISOPTYPE_HARMLESS, AtomicMemoryHalfwordThe), /* FEAT_THE */
325	DIS_ARMV8_OP_ALT_DECODE(0x78a0c000, "ldaprh", OP_ARMV8_A64_LDAPRH, DISOPTYPE_HARMLESS, AtomicMemoryHalfwordLrcpc), /* FEAT_LRCPC / /* @todo Rs == 11111 */
326	INVALID_OPCODE,
327	INVALID_OPCODE,
328	INVALID_OPCODE,
329	DIS_ARMV8_OP( 0x78e00000, "ldaddalh", OP_ARMV8_A64_LDADDALH, DISOPTYPE_HARMLESS),
330	DIS_ARMV8_OP( 0x78e01000, "ldclralh", OP_ARMV8_A64_LDCLRALH, DISOPTYPE_HARMLESS),
331	DIS_ARMV8_OP( 0x78e02000, "ldeoralh", OP_ARMV8_A64_LDEORALH, DISOPTYPE_HARMLESS),
332	DIS_ARMV8_OP( 0x78e03000, "ldsetalh", OP_ARMV8_A64_LDSETALH, DISOPTYPE_HARMLESS),
333	DIS_ARMV8_OP( 0x78e04000, "ldsmaxalh", OP_ARMV8_A64_LDSMAXALH, DISOPTYPE_HARMLESS),
334	DIS_ARMV8_OP( 0x78e05000, "ldsminalh", OP_ARMV8_A64_LDSMINALH, DISOPTYPE_HARMLESS),
335	DIS_ARMV8_OP( 0x78e06000, "ldumaxalh", OP_ARMV8_A64_LDUMAXALH, DISOPTYPE_HARMLESS),
336	DIS_ARMV8_OP( 0x78e07000, "lduminalh", OP_ARMV8_A64_LDUMINALH, DISOPTYPE_HARMLESS),
337	DIS_ARMV8_OP( 0x78e08000, "swpalh", OP_ARMV8_A64_SWPALH, DISOPTYPE_HARMLESS),
338	DIS_ARMV8_OP_ALT_DECODE(0x78e09000, "rcwsclral", OP_ARMV8_A64_RCWSCLRAL, DISOPTYPE_HARMLESS, AtomicMemoryHalfwordThe), /* FEAT_THE */
339	DIS_ARMV8_OP_ALT_DECODE(0x78e0a000, "rcwsswpal", OP_ARMV8_A64_RCWSSWPAL, DISOPTYPE_HARMLESS, AtomicMemoryHalfwordThe), /* FEAT_THE */
340	DIS_ARMV8_OP_ALT_DECODE(0x78e0b000, "rcwssetal", OP_ARMV8_A64_RCWSSETAL, DISOPTYPE_HARMLESS, AtomicMemoryHalfwordThe), /* FEAT_THE */
341	/* Rest of the encodings is invalid. */
342	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(AtomicMemoryHalfword, 0xffe0fc00 /fFixedInsn/,
343	kDisArmV8OpcDecodeCollate,
344	/* opc */ RT_BIT_32(12) \| RT_BIT_32(13) \| RT_BIT_32(14)
345	/* o3 */ \| RT_BIT_32(15)
346	/* R */ \| RT_BIT_32(22)
347	/* A */ \| RT_BIT_32(23), 12);
348
349
350	/* Atomic memory operations - Word size variants */
351	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(AtomicMemoryWord)
352	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr32, 16, 5, 0 /idxParam/),
353	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr32, 0, 5, 1 /idxParam/),
354	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 2 /idxParam/),
355	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER_ALTERNATIVE(AtomicMemoryWordLrcpc)
356	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr32, 0, 5, 0 /idxParam/),
357	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 1 /idxParam/),
358	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(AtomicMemoryWord)
359	DIS_ARMV8_OP( 0xb8200000, "ldadd", OP_ARMV8_A64_LDADD, DISOPTYPE_HARMLESS),
360	DIS_ARMV8_OP( 0xb8201000, "ldclr", OP_ARMV8_A64_LDCLR, DISOPTYPE_HARMLESS),
361	DIS_ARMV8_OP( 0xb8202000, "ldeor", OP_ARMV8_A64_LDEOR, DISOPTYPE_HARMLESS),
362	DIS_ARMV8_OP( 0xb8203000, "ldset", OP_ARMV8_A64_LDSET, DISOPTYPE_HARMLESS),
363	DIS_ARMV8_OP( 0xb8204000, "ldsmax", OP_ARMV8_A64_LDSMAX, DISOPTYPE_HARMLESS),
364	DIS_ARMV8_OP( 0xb8205000, "ldsmin", OP_ARMV8_A64_LDSMIN, DISOPTYPE_HARMLESS),
365	DIS_ARMV8_OP( 0xb8206000, "ldumax", OP_ARMV8_A64_LDUMAX, DISOPTYPE_HARMLESS),
366	DIS_ARMV8_OP( 0xb8207000, "ldumin", OP_ARMV8_A64_LDUMIN, DISOPTYPE_HARMLESS),
367	DIS_ARMV8_OP( 0xb8208000, "swp", OP_ARMV8_A64_SWP, DISOPTYPE_HARMLESS),
368	INVALID_OPCODE,
369	INVALID_OPCODE,
370	INVALID_OPCODE,
371	INVALID_OPCODE,
372	INVALID_OPCODE,
373	INVALID_OPCODE,
374	INVALID_OPCODE,
375	DIS_ARMV8_OP( 0xb8600000, "ldaddl", OP_ARMV8_A64_LDADDL, DISOPTYPE_HARMLESS),
376	DIS_ARMV8_OP( 0xb8601000, "ldclrl", OP_ARMV8_A64_LDCLRL, DISOPTYPE_HARMLESS),
377	DIS_ARMV8_OP( 0xb8602000, "ldeorl", OP_ARMV8_A64_LDEORL, DISOPTYPE_HARMLESS),
378	DIS_ARMV8_OP( 0xb8603000, "ldsetl", OP_ARMV8_A64_LDSETL, DISOPTYPE_HARMLESS),
379	DIS_ARMV8_OP( 0xb8604000, "ldsmaxl", OP_ARMV8_A64_LDSMAXL, DISOPTYPE_HARMLESS),
380	DIS_ARMV8_OP( 0xb8605000, "ldsminl", OP_ARMV8_A64_LDSMINL, DISOPTYPE_HARMLESS),
381	DIS_ARMV8_OP( 0xb8606000, "ldumaxl", OP_ARMV8_A64_LDUMAXL, DISOPTYPE_HARMLESS),
382	DIS_ARMV8_OP( 0xb8607000, "lduminl", OP_ARMV8_A64_LDUMINL, DISOPTYPE_HARMLESS),
383	DIS_ARMV8_OP( 0xb8608000, "swpl", OP_ARMV8_A64_SWPL, DISOPTYPE_HARMLESS),
384	INVALID_OPCODE,
385	INVALID_OPCODE,
386	INVALID_OPCODE,
387	INVALID_OPCODE,
388	INVALID_OPCODE,
389	INVALID_OPCODE,
390	INVALID_OPCODE,
391	DIS_ARMV8_OP( 0xb8a00000, "ldadda", OP_ARMV8_A64_LDADDA, DISOPTYPE_HARMLESS),
392	DIS_ARMV8_OP( 0xb8a01000, "ldclra", OP_ARMV8_A64_LDCLRA, DISOPTYPE_HARMLESS),
393	DIS_ARMV8_OP( 0xb8a02000, "ldeora", OP_ARMV8_A64_LDEORA, DISOPTYPE_HARMLESS),
394	DIS_ARMV8_OP( 0xb8a03000, "ldseta", OP_ARMV8_A64_LDSETA, DISOPTYPE_HARMLESS),
395	DIS_ARMV8_OP( 0xb8a04000, "ldsmaxa", OP_ARMV8_A64_LDSMAXA, DISOPTYPE_HARMLESS),
396	DIS_ARMV8_OP( 0xb8a05000, "ldsmina", OP_ARMV8_A64_LDSMINA, DISOPTYPE_HARMLESS),
397	DIS_ARMV8_OP( 0xb8a06000, "ldumaxa", OP_ARMV8_A64_LDUMAXA, DISOPTYPE_HARMLESS),
398	DIS_ARMV8_OP( 0xb8a07000, "ldumina", OP_ARMV8_A64_LDUMINA, DISOPTYPE_HARMLESS),
399	DIS_ARMV8_OP( 0xb8a08000, "swpa", OP_ARMV8_A64_SWPA, DISOPTYPE_HARMLESS),
400	INVALID_OPCODE,
401	INVALID_OPCODE,
402	INVALID_OPCODE,
403	DIS_ARMV8_OP_ALT_DECODE(0xb8a0c000, "ldapr", OP_ARMV8_A64_LDAPR, DISOPTYPE_HARMLESS, AtomicMemoryWordLrcpc), /* FEAT_LRCPC / /* @todo Rs == 11111 */
404	INVALID_OPCODE,
405	INVALID_OPCODE,
406	INVALID_OPCODE,
407	DIS_ARMV8_OP( 0xb8e00000, "ldaddal", OP_ARMV8_A64_LDADDAL, DISOPTYPE_HARMLESS),
408	DIS_ARMV8_OP( 0xb8e01000, "ldclral", OP_ARMV8_A64_LDCLRAL, DISOPTYPE_HARMLESS),
409	DIS_ARMV8_OP( 0xb8e02000, "ldeoral", OP_ARMV8_A64_LDEORAL, DISOPTYPE_HARMLESS),
410	DIS_ARMV8_OP( 0xb8e03000, "ldsetal", OP_ARMV8_A64_LDSETAL, DISOPTYPE_HARMLESS),
411	DIS_ARMV8_OP( 0xb8e04000, "ldsmaxal", OP_ARMV8_A64_LDSMAXAL, DISOPTYPE_HARMLESS),
412	DIS_ARMV8_OP( 0xb8e05000, "ldsminal", OP_ARMV8_A64_LDSMINAL, DISOPTYPE_HARMLESS),
413	DIS_ARMV8_OP( 0xb8e06000, "ldumaxal", OP_ARMV8_A64_LDUMAXAL, DISOPTYPE_HARMLESS),
414	DIS_ARMV8_OP( 0xb8e07000, "lduminal", OP_ARMV8_A64_LDUMINAL, DISOPTYPE_HARMLESS),
415	DIS_ARMV8_OP( 0xb8e08000, "swpal", OP_ARMV8_A64_SWPAL, DISOPTYPE_HARMLESS),
416	/* Rest of the encodings is invalid. */
417	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(AtomicMemoryWord, 0xffe0fc00 /fFixedInsn/,
418	kDisArmV8OpcDecodeCollate,
419	/* opc */ RT_BIT_32(12) \| RT_BIT_32(13) \| RT_BIT_32(14)
420	/* o3 */ \| RT_BIT_32(15)
421	/* R */ \| RT_BIT_32(22)
422	/* A */ \| RT_BIT_32(23), 12);
423
424
425	/* Atomic memory operations - Word size variants */
426	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(AtomicMemoryDWord)
427	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr64, 16, 5, 0 /idxParam/),
428	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr64, 0, 5, 1 /idxParam/),
429	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 2 /idxParam/),
430	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER_ALTERNATIVE(AtomicMemoryDWordLrcpc)
431	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr64, 0, 5, 0 /idxParam/),
432	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 1 /idxParam/),
433	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(AtomicMemoryDWord)
434	DIS_ARMV8_OP( 0xf8200000, "ldadd", OP_ARMV8_A64_LDADD, DISOPTYPE_HARMLESS),
435	DIS_ARMV8_OP( 0xf8201000, "ldclr", OP_ARMV8_A64_LDCLR, DISOPTYPE_HARMLESS),
436	DIS_ARMV8_OP( 0xf8202000, "ldeor", OP_ARMV8_A64_LDEOR, DISOPTYPE_HARMLESS),
437	DIS_ARMV8_OP( 0xf8203000, "ldset", OP_ARMV8_A64_LDSET, DISOPTYPE_HARMLESS),
438	DIS_ARMV8_OP( 0xf8204000, "ldsmax", OP_ARMV8_A64_LDSMAX, DISOPTYPE_HARMLESS),
439	DIS_ARMV8_OP( 0xf8205000, "ldsmin", OP_ARMV8_A64_LDSMIN, DISOPTYPE_HARMLESS),
440	DIS_ARMV8_OP( 0xf8206000, "ldumax", OP_ARMV8_A64_LDUMAX, DISOPTYPE_HARMLESS),
441	DIS_ARMV8_OP( 0xf8207000, "ldumin", OP_ARMV8_A64_LDUMIN, DISOPTYPE_HARMLESS),
442	DIS_ARMV8_OP( 0xf8208000, "swp", OP_ARMV8_A64_SWP, DISOPTYPE_HARMLESS),
443	INVALID_OPCODE,
444	INVALID_OPCODE,
445	INVALID_OPCODE,
446	INVALID_OPCODE,
447	INVALID_OPCODE,
448	INVALID_OPCODE,
449	INVALID_OPCODE,
450	DIS_ARMV8_OP( 0xf8600000, "ldaddl", OP_ARMV8_A64_LDADDL, DISOPTYPE_HARMLESS),
451	DIS_ARMV8_OP( 0xf8601000, "ldclrl", OP_ARMV8_A64_LDCLRL, DISOPTYPE_HARMLESS),
452	DIS_ARMV8_OP( 0xf8602000, "ldeorl", OP_ARMV8_A64_LDEORL, DISOPTYPE_HARMLESS),
453	DIS_ARMV8_OP( 0xf8603000, "ldsetl", OP_ARMV8_A64_LDSETL, DISOPTYPE_HARMLESS),
454	DIS_ARMV8_OP( 0xf8604000, "ldsmaxl", OP_ARMV8_A64_LDSMAXL, DISOPTYPE_HARMLESS),
455	DIS_ARMV8_OP( 0xf8605000, "ldsminl", OP_ARMV8_A64_LDSMINL, DISOPTYPE_HARMLESS),
456	DIS_ARMV8_OP( 0xf8606000, "ldumaxl", OP_ARMV8_A64_LDUMAXL, DISOPTYPE_HARMLESS),
457	DIS_ARMV8_OP( 0xf8607000, "lduminl", OP_ARMV8_A64_LDUMINL, DISOPTYPE_HARMLESS),
458	DIS_ARMV8_OP( 0xf8608000, "swpl", OP_ARMV8_A64_SWPL, DISOPTYPE_HARMLESS),
459	INVALID_OPCODE, /** @todo ST64B - FEAT_LS64 */
460	INVALID_OPCODE, /** @todo ST64BV0 - FEAT_LS64_ACCDATA */
461	INVALID_OPCODE, /** @todo ST64BV - FEAT_LS64_V */
462	INVALID_OPCODE,
463	INVALID_OPCODE, /** @todo LD64B - FEAT_LS64 */
464	INVALID_OPCODE,
465	INVALID_OPCODE,
466	DIS_ARMV8_OP( 0xf8a00000, "ldadda", OP_ARMV8_A64_LDADDA, DISOPTYPE_HARMLESS),
467	DIS_ARMV8_OP( 0xf8a01000, "ldclra", OP_ARMV8_A64_LDCLRA, DISOPTYPE_HARMLESS),
468	DIS_ARMV8_OP( 0xf8a02000, "ldeora", OP_ARMV8_A64_LDEORA, DISOPTYPE_HARMLESS),
469	DIS_ARMV8_OP( 0xf8a03000, "ldseta", OP_ARMV8_A64_LDSETA, DISOPTYPE_HARMLESS),
470	DIS_ARMV8_OP( 0xf8a04000, "ldsmaxa", OP_ARMV8_A64_LDSMAXA, DISOPTYPE_HARMLESS),
471	DIS_ARMV8_OP( 0xf8a05000, "ldsmina", OP_ARMV8_A64_LDSMINA, DISOPTYPE_HARMLESS),
472	DIS_ARMV8_OP( 0xf8a06000, "ldumaxa", OP_ARMV8_A64_LDUMAXA, DISOPTYPE_HARMLESS),
473	DIS_ARMV8_OP( 0xf8a07000, "ldumina", OP_ARMV8_A64_LDUMINA, DISOPTYPE_HARMLESS),
474	DIS_ARMV8_OP( 0xf8a08000, "swpa", OP_ARMV8_A64_SWPA, DISOPTYPE_HARMLESS),
475	INVALID_OPCODE,
476	INVALID_OPCODE,
477	INVALID_OPCODE,
478	DIS_ARMV8_OP_ALT_DECODE(0xf8a0c000, "ldapr", OP_ARMV8_A64_LDAPR, DISOPTYPE_HARMLESS, AtomicMemoryDWordLrcpc), /* FEAT_LRCPC / /* @todo Rs == 11111 */
479	INVALID_OPCODE,
480	INVALID_OPCODE,
481	INVALID_OPCODE,
482	DIS_ARMV8_OP( 0xf8e00000, "ldaddal", OP_ARMV8_A64_LDADDAL, DISOPTYPE_HARMLESS),
483	DIS_ARMV8_OP( 0xf8e01000, "ldclral", OP_ARMV8_A64_LDCLRAL, DISOPTYPE_HARMLESS),
484	DIS_ARMV8_OP( 0xf8e02000, "ldeoral", OP_ARMV8_A64_LDEORAL, DISOPTYPE_HARMLESS),
485	DIS_ARMV8_OP( 0xf8e03000, "ldsetal", OP_ARMV8_A64_LDSETAL, DISOPTYPE_HARMLESS),
486	DIS_ARMV8_OP( 0xf8e04000, "ldsmaxal", OP_ARMV8_A64_LDSMAXAL, DISOPTYPE_HARMLESS),
487	DIS_ARMV8_OP( 0xf8e05000, "ldsminal", OP_ARMV8_A64_LDSMINAL, DISOPTYPE_HARMLESS),
488	DIS_ARMV8_OP( 0xf8e06000, "ldumaxal", OP_ARMV8_A64_LDUMAXAL, DISOPTYPE_HARMLESS),
489	DIS_ARMV8_OP( 0xf8e07000, "lduminal", OP_ARMV8_A64_LDUMINAL, DISOPTYPE_HARMLESS),
490	DIS_ARMV8_OP( 0xf8e08000, "swpal", OP_ARMV8_A64_SWPAL, DISOPTYPE_HARMLESS),
491	/* Rest of the encodings is invalid. */
492	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(AtomicMemoryDWord, 0xffe0fc00 /fFixedInsn/,
493	kDisArmV8OpcDecodeCollate,
494	/* opc */ RT_BIT_32(12) \| RT_BIT_32(13) \| RT_BIT_32(14)
495	/* o3 */ \| RT_BIT_32(15)
496	/* R */ \| RT_BIT_32(22)
497	/* A */ \| RT_BIT_32(23), 12);
498
499
500	/*
501	* C4.1.94.29 - Loads and Stores - Atomic memory oeprations
502	*
503	* Differentiate further based on the size field.
504	*/
505	DIS_ARMV8_DECODE_MAP_DEFINE_BEGIN(AtomicMemory)
506	DIS_ARMV8_DECODE_MAP_ENTRY(AtomicMemoryByte),
507	DIS_ARMV8_DECODE_MAP_ENTRY(AtomicMemoryHalfword),
508	DIS_ARMV8_DECODE_MAP_ENTRY(AtomicMemoryWord),
509	DIS_ARMV8_DECODE_MAP_ENTRY(AtomicMemoryDWord),
510	DIS_ARMV8_DECODE_MAP_DEFINE_END(AtomicMemory, RT_BIT_32(30) \| RT_BIT_32(31), 30);
511
512
513	/*
514	* C4.1.94 - Loads and Stores - Load/Store register variants
515	*
516	* Differentiate further based on the op2<1:0> field.
517	*
518	* Bit 11 10
519	* +-------------------------------------------
520	* 0 0 Atomic memory operations
521	* 0 1 Load/store register (pac)
522	* 1 0 Load/store register (register offset)
523	* 1 1 Load/store register (pac)
524	*/
525	DIS_ARMV8_DECODE_MAP_DEFINE_BEGIN(LdStRegOp2_11_1)
526	DIS_ARMV8_DECODE_MAP_ENTRY(AtomicMemory),
527	DIS_ARMV8_DECODE_MAP_ENTRY(LdStRegPac),
528	DIS_ARMV8_DECODE_MAP_ENTRY(LdStRegOff),
529	DIS_ARMV8_DECODE_MAP_ENTRY(LdStRegPac),
530	DIS_ARMV8_DECODE_MAP_DEFINE_END(LdStRegOp2_11_1, RT_BIT_32(10) \| RT_BIT_32(11), 10);
531
532
533	/*
534	* STURB/LDURB/LDURSB/STURH/LDURH/LDURSH/STUR/LDUR/LDURSW/PRFUM
535	*
536	* Note: The size,opc bitfields are concatenated to form an index.
537	*/
538	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(LdStRegUnscaledImmGpr)
539	DIS_ARMV8_INSN_DECODE(kDisParmParseSize, 30, 2, DIS_ARMV8_INSN_PARAM_UNSET),
540	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 0, 5, 0 /idxParam/),
541	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 1 /idxParam/),
542	DIS_ARMV8_INSN_DECODE(kDisParmParseSImmMemOffUnscaled, 12, 9, 1 /idxParam/),
543	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(LdStRegUnscaledImmGpr)
544	DIS_ARMV8_OP(0x38000000, "sturb", OP_ARMV8_A64_STURB, DISOPTYPE_HARMLESS),
545	DIS_ARMV8_OP(0x38400000, "ldurb", OP_ARMV8_A64_LDURB, DISOPTYPE_HARMLESS),
546	DIS_ARMV8_OP_EX(0x38800000, "ldursb", OP_ARMV8_A64_LDURSB, DISOPTYPE_HARMLESS, DISARMV8INSNCLASS_F_FORCED_64BIT),
547	DIS_ARMV8_OP(0x38c00000, "ldursb", OP_ARMV8_A64_LDURSB, DISOPTYPE_HARMLESS),
548	DIS_ARMV8_OP(0x78000000, "sturh", OP_ARMV8_A64_STURH, DISOPTYPE_HARMLESS),
549	DIS_ARMV8_OP(0x78400000, "ldurh", OP_ARMV8_A64_LDURH, DISOPTYPE_HARMLESS),
550	DIS_ARMV8_OP_EX(0x78800000, "ldursh", OP_ARMV8_A64_LDURSH, DISOPTYPE_HARMLESS, DISARMV8INSNCLASS_F_FORCED_64BIT),
551	DIS_ARMV8_OP(0x78c00000, "ldursh", OP_ARMV8_A64_LDURSH, DISOPTYPE_HARMLESS),
552	DIS_ARMV8_OP(0xb8000000, "stur", OP_ARMV8_A64_STUR, DISOPTYPE_HARMLESS),
553	DIS_ARMV8_OP(0xb8400000, "ldur", OP_ARMV8_A64_LDUR, DISOPTYPE_HARMLESS),
554	DIS_ARMV8_OP_EX(0xb8800000, "ldursw", OP_ARMV8_A64_LDURSW, DISOPTYPE_HARMLESS, DISARMV8INSNCLASS_F_FORCED_64BIT),
555	INVALID_OPCODE,
556	DIS_ARMV8_OP(0xf8000000, "stur", OP_ARMV8_A64_STUR, DISOPTYPE_HARMLESS),
557	DIS_ARMV8_OP(0xf8400000, "ldur", OP_ARMV8_A64_LDUR, DISOPTYPE_HARMLESS),
558	INVALID_OPCODE, /** @todo PRFUM */
559	INVALID_OPCODE,
560	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(LdStRegUnscaledImmGpr, 0xffe00c00 /fFixedInsn/,
561	kDisArmV8OpcDecodeCollate,
562	RT_BIT_32(22) \| RT_BIT_32(23) \| RT_BIT_32(30) \| RT_BIT_32(31), 22);
563
564
565	/* SIMD STUR/LDUR */
566	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(LdStRegUnscaledImmSimd)
567	DIS_ARMV8_INSN_DECODE(kDisParmParseSimdRegSize, 30, 2, DIS_ARMV8_INSN_PARAM_UNSET),
568	DIS_ARMV8_INSN_DECODE(kDisParmParseSimdRegScalar, 0, 5, 0 /idxParam/),
569	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 1 /idxParam/),
570	DIS_ARMV8_INSN_DECODE(kDisParmParseSImmMemOffUnscaled, 12, 9, 1 /idxParam/),
571	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER_ALTERNATIVE(LdStRegUnscaledImmSimd128)
572	DIS_ARMV8_INSN_DECODE(kDisParmParseSimdRegSize128, 0, 0, DIS_ARMV8_INSN_PARAM_UNSET),
573	DIS_ARMV8_INSN_DECODE(kDisParmParseSimdRegScalar, 0, 5, 0 /idxParam/),
574	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 1 /idxParam/),
575	DIS_ARMV8_INSN_DECODE(kDisParmParseSImmMemOffUnscaled, 12, 9, 1 /idxParam/),
576	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(LdStRegUnscaledImmSimd)
577	DIS_ARMV8_OP( 0x3c000000, "stur", OP_ARMV8_A64_STUR, DISOPTYPE_HARMLESS),
578	DIS_ARMV8_OP( 0x3c400000, "ldur", OP_ARMV8_A64_LDUR, DISOPTYPE_HARMLESS),
579	DIS_ARMV8_OP_ALT_DECODE(0x3c800000, "stur", OP_ARMV8_A64_STUR, DISOPTYPE_HARMLESS, LdStRegUnscaledImmSimd128), /** @todo size == 0. */
580	DIS_ARMV8_OP_ALT_DECODE(0x3cc00000, "ldur", OP_ARMV8_A64_LDUR, DISOPTYPE_HARMLESS, LdStRegUnscaledImmSimd128), /** @todo size == 0. */
581	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(LdStRegUnscaledImmSimd, 0x3fe00c00 /fFixedInsn/,
582	kDisArmV8OpcDecodeNop,
583	RT_BIT_32(22) \| RT_BIT_32(23), 22);
584
585
586	/*
587	* C4.1.94 - Loads and Stores - Load/Store register (register offset) variants
588	*
589	* Differentiate further based on the VR field.
590	*
591	* Bit 26
592	* +-------------------------------------------
593	* 0 GPR variants.
594	* 1 SIMD/FP variants
595	*/
596	DIS_ARMV8_DECODE_MAP_DEFINE_BEGIN(LdStRegUnscaledImm)
597	DIS_ARMV8_DECODE_MAP_ENTRY(LdStRegUnscaledImmGpr),
598	DIS_ARMV8_DECODE_MAP_ENTRY(LdStRegUnscaledImmSimd),
599	DIS_ARMV8_DECODE_MAP_DEFINE_END(LdStRegUnscaledImm, RT_BIT_32(26), 26);
600
601
602	/*
603	* STRB/LDRB/LDRSB/STRH/LDRH/LDRSH/STR/LDR/LDRSW/STR/LDR
604	*
605	* Note: The size,opc bitfields are concatenated to form an index.
606	*/
607	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(LdStRegImmPreIndexGpr)
608	DIS_ARMV8_INSN_DECODE(kDisParmParseSize, 30, 2, DIS_ARMV8_INSN_PARAM_UNSET),
609	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 0, 5, 0 /idxParam/),
610	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 1 /idxParam/),
611	DIS_ARMV8_INSN_DECODE(kDisParmParseSImmMemOffUnscaled, 12, 9, 1 /idxParam/),
612	DIS_ARMV8_INSN_DECODE(kDisParmParseSetPreIndexed, 0, 0, 1 /idxParam/),
613	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(LdStRegImmPreIndexGpr)
614	DIS_ARMV8_OP(0x38000c00, "strb", OP_ARMV8_A64_STRB, DISOPTYPE_HARMLESS),
615	DIS_ARMV8_OP(0x38400c00, "ldrb", OP_ARMV8_A64_LDRB, DISOPTYPE_HARMLESS),
616	DIS_ARMV8_OP_EX(0x38800c00, "ldrsb", OP_ARMV8_A64_LDRSB, DISOPTYPE_HARMLESS, DISARMV8INSNCLASS_F_FORCED_64BIT),
617	DIS_ARMV8_OP_EX(0x38c00c00, "ldrsb", OP_ARMV8_A64_LDRSB, DISOPTYPE_HARMLESS, DISARMV8INSNCLASS_F_FORCED_32BIT),
618	DIS_ARMV8_OP(0x78000c00, "strh", OP_ARMV8_A64_STRH, DISOPTYPE_HARMLESS),
619	DIS_ARMV8_OP(0x78400c00, "ldrh", OP_ARMV8_A64_LDRH, DISOPTYPE_HARMLESS),
620	DIS_ARMV8_OP_EX(0x78800c00, "ldrsh", OP_ARMV8_A64_LDURSH, DISOPTYPE_HARMLESS, DISARMV8INSNCLASS_F_FORCED_64BIT),
621	DIS_ARMV8_OP_EX(0x78c00c00, "ldrsh", OP_ARMV8_A64_LDURSH, DISOPTYPE_HARMLESS, DISARMV8INSNCLASS_F_FORCED_32BIT),
622	DIS_ARMV8_OP(0xb8000c00, "str", OP_ARMV8_A64_STR, DISOPTYPE_HARMLESS),
623	DIS_ARMV8_OP(0xb8400c00, "ldr", OP_ARMV8_A64_LDR, DISOPTYPE_HARMLESS),
624	DIS_ARMV8_OP_EX(0xb8800c00, "ldrsw", OP_ARMV8_A64_LDURSW, DISOPTYPE_HARMLESS, DISARMV8INSNCLASS_F_FORCED_64BIT),
625	INVALID_OPCODE,
626	DIS_ARMV8_OP(0xf8000c00, "str", OP_ARMV8_A64_STR, DISOPTYPE_HARMLESS),
627	DIS_ARMV8_OP(0xf8400c00, "ldr", OP_ARMV8_A64_LDR, DISOPTYPE_HARMLESS),
628	INVALID_OPCODE,
629	INVALID_OPCODE,
630	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(LdStRegImmPreIndexGpr, 0xffe00c00 /fFixedInsn/,
631	kDisArmV8OpcDecodeCollate,
632	RT_BIT_32(22) \| RT_BIT_32(23) \| RT_BIT_32(30) \| RT_BIT_32(31), 22);
633
634
635	/* SIMD STR/LDR */
636	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(LdStRegImmPreIndexSimd)
637	DIS_ARMV8_INSN_DECODE(kDisParmParseSimdRegSize, 30, 2, DIS_ARMV8_INSN_PARAM_UNSET),
638	DIS_ARMV8_INSN_DECODE(kDisParmParseSimdRegScalar, 0, 5, 0 /idxParam/),
639	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 1 /idxParam/),
640	DIS_ARMV8_INSN_DECODE(kDisParmParseSImmMemOffUnscaled, 12, 9, 1 /idxParam/),
641	DIS_ARMV8_INSN_DECODE(kDisParmParseSetPreIndexed, 0, 0, 1 /idxParam/),
642	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER_ALTERNATIVE(LdStRegImmPreIndexSimd128)
643	DIS_ARMV8_INSN_DECODE(kDisParmParseSimdRegSize128, 0, 0, DIS_ARMV8_INSN_PARAM_UNSET),
644	DIS_ARMV8_INSN_DECODE(kDisParmParseSimdRegScalar, 0, 5, 0 /idxParam/),
645	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 1 /idxParam/),
646	DIS_ARMV8_INSN_DECODE(kDisParmParseSImmMemOffUnscaled, 12, 9, 1 /idxParam/),
647	DIS_ARMV8_INSN_DECODE(kDisParmParseSetPreIndexed, 0, 0, 1 /idxParam/),
648	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(LdStRegImmPreIndexSimd)
649	DIS_ARMV8_OP( 0x3c000c00, "str", OP_ARMV8_A64_STR, DISOPTYPE_HARMLESS),
650	DIS_ARMV8_OP( 0x3c400c00, "ldr", OP_ARMV8_A64_LDR, DISOPTYPE_HARMLESS),
651	DIS_ARMV8_OP_ALT_DECODE(0x3c800c00, "str", OP_ARMV8_A64_STR, DISOPTYPE_HARMLESS, LdStRegImmPreIndexSimd128), /** @todo size == 0. */
652	DIS_ARMV8_OP_ALT_DECODE(0x3cc00c00, "ldr", OP_ARMV8_A64_LDR, DISOPTYPE_HARMLESS, LdStRegImmPreIndexSimd128), /** @todo size == 0. */
653	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(LdStRegImmPreIndexSimd, 0x3fe00c00 /fFixedInsn/,
654	kDisArmV8OpcDecodeNop,
655	RT_BIT_32(22) \| RT_BIT_32(23), 22);
656
657
658	/*
659	* C4.1.94.28 - Loads and Stores - Load/Store register (immediate pre-indexed) variants
660	*
661	* Differentiate further based on the VR field.
662	*
663	* Bit 26
664	* +-------------------------------------------
665	* 0 GPR variants.
666	* 1 SIMD/FP variants
667	*/
668	DIS_ARMV8_DECODE_MAP_DEFINE_BEGIN(LdStRegImmPreIndex)
669	DIS_ARMV8_DECODE_MAP_ENTRY(LdStRegImmPreIndexGpr),
670	DIS_ARMV8_DECODE_MAP_ENTRY(LdStRegImmPreIndexSimd),
671	DIS_ARMV8_DECODE_MAP_DEFINE_END(LdStRegImmPreIndex, RT_BIT_32(26), 26);
672
673
674	/*
675	* STRB/LDRB/LDRSB/STRH/LDRH/LDRSH/STR/LDR/LDRSW/STR/LDR
676	*
677	* Note: The size,opc bitfields are concatenated to form an index.
678	*/
679	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(LdStRegImmPostIndexGpr)
680	DIS_ARMV8_INSN_DECODE(kDisParmParseSize, 30, 2, DIS_ARMV8_INSN_PARAM_UNSET),
681	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 0, 5, 0 /idxParam/),
682	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 1 /idxParam/),
683	DIS_ARMV8_INSN_DECODE(kDisParmParseSImmMemOffUnscaled, 12, 9, 1 /idxParam/),
684	DIS_ARMV8_INSN_DECODE(kDisParmParseSetPostIndexed, 0, 0, 1 /idxParam/),
685	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(LdStRegImmPostIndexGpr)
686	DIS_ARMV8_OP(0x38000400, "strb", OP_ARMV8_A64_STRB, DISOPTYPE_HARMLESS),
687	DIS_ARMV8_OP(0x38400400, "ldrb", OP_ARMV8_A64_LDRB, DISOPTYPE_HARMLESS),
688	DIS_ARMV8_OP_EX(0x38800400, "ldrsb", OP_ARMV8_A64_LDRSB, DISOPTYPE_HARMLESS, DISARMV8INSNCLASS_F_FORCED_64BIT),
689	DIS_ARMV8_OP_EX(0x38c00400, "ldrsb", OP_ARMV8_A64_LDRSB, DISOPTYPE_HARMLESS, DISARMV8INSNCLASS_F_FORCED_32BIT),
690	DIS_ARMV8_OP(0x78000400, "strh", OP_ARMV8_A64_STRH, DISOPTYPE_HARMLESS),
691	DIS_ARMV8_OP(0x78400400, "ldrh", OP_ARMV8_A64_LDRH, DISOPTYPE_HARMLESS),
692	DIS_ARMV8_OP_EX(0x78800400, "ldrsh", OP_ARMV8_A64_LDRSH, DISOPTYPE_HARMLESS, DISARMV8INSNCLASS_F_FORCED_64BIT),
693	DIS_ARMV8_OP_EX(0x78c00400, "ldrsh", OP_ARMV8_A64_LDRSH, DISOPTYPE_HARMLESS, DISARMV8INSNCLASS_F_FORCED_32BIT),
694	DIS_ARMV8_OP(0xb8000400, "str", OP_ARMV8_A64_STR, DISOPTYPE_HARMLESS),
695	DIS_ARMV8_OP(0xb8400400, "ldr", OP_ARMV8_A64_LDR, DISOPTYPE_HARMLESS),
696	DIS_ARMV8_OP_EX(0xb8800400, "ldrsw", OP_ARMV8_A64_LDRSW, DISOPTYPE_HARMLESS, DISARMV8INSNCLASS_F_FORCED_64BIT),
697	INVALID_OPCODE,
698	DIS_ARMV8_OP(0xf8000400, "str", OP_ARMV8_A64_STR, DISOPTYPE_HARMLESS),
699	DIS_ARMV8_OP(0xf8400400, "ldr", OP_ARMV8_A64_LDR, DISOPTYPE_HARMLESS),
700	INVALID_OPCODE,
701	INVALID_OPCODE,
702	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(LdStRegImmPostIndexGpr, 0xffe00c00 /fFixedInsn/,
703	kDisArmV8OpcDecodeCollate,
704	RT_BIT_32(22) \| RT_BIT_32(23) \| RT_BIT_32(30) \| RT_BIT_32(31), 22);
705
706
707	/* SIMD STR/LDR */
708	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(LdStRegImmPostIndexSimd)
709	DIS_ARMV8_INSN_DECODE(kDisParmParseSimdRegSize, 30, 2, DIS_ARMV8_INSN_PARAM_UNSET),
710	DIS_ARMV8_INSN_DECODE(kDisParmParseSimdRegScalar, 0, 5, 0 /idxParam/),
711	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 1 /idxParam/),
712	DIS_ARMV8_INSN_DECODE(kDisParmParseSImmMemOffUnscaled, 12, 9, 1 /idxParam/),
713	DIS_ARMV8_INSN_DECODE(kDisParmParseSetPostIndexed, 0, 0, 1 /idxParam/),
714	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER_ALTERNATIVE(LdStRegImmPostIndexSimd128)
715	DIS_ARMV8_INSN_DECODE(kDisParmParseSimdRegSize128, 0, 0, DIS_ARMV8_INSN_PARAM_UNSET),
716	DIS_ARMV8_INSN_DECODE(kDisParmParseSimdRegScalar, 0, 5, 0 /idxParam/),
717	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 1 /idxParam/),
718	DIS_ARMV8_INSN_DECODE(kDisParmParseSImmMemOffUnscaled, 12, 9, 1 /idxParam/),
719	DIS_ARMV8_INSN_DECODE(kDisParmParseSetPostIndexed, 0, 0, 1 /idxParam/),
720	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(LdStRegImmPostIndexSimd)
721	DIS_ARMV8_OP( 0x3c000400, "str", OP_ARMV8_A64_STR, DISOPTYPE_HARMLESS),
722	DIS_ARMV8_OP( 0x3c400400, "ldr", OP_ARMV8_A64_LDR, DISOPTYPE_HARMLESS),
723	DIS_ARMV8_OP_ALT_DECODE(0x3c800400, "str", OP_ARMV8_A64_STR, DISOPTYPE_HARMLESS, LdStRegImmPostIndexSimd128), /** @todo size == 0. */
724	DIS_ARMV8_OP_ALT_DECODE(0x3cc00400, "ldr", OP_ARMV8_A64_LDR, DISOPTYPE_HARMLESS, LdStRegImmPostIndexSimd128), /** @todo size == 0. */
725	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(LdStRegImmPostIndexSimd, 0x3fe00c00 /fFixedInsn/,
726	kDisArmV8OpcDecodeNop,
727	RT_BIT_32(22) \| RT_BIT_32(23), 22);
728
729
730	/*
731	* C4.1.94.26 - Loads and Stores - Load/Store register (immediate post-indexed) variants
732	*
733	* Differentiate further based on the VR field.
734	*
735	* Bit 26
736	* +-------------------------------------------
737	* 0 GPR variants.
738	* 1 SIMD/FP variants
739	*/
740	DIS_ARMV8_DECODE_MAP_DEFINE_BEGIN(LdStRegImmPostIndex)
741	DIS_ARMV8_DECODE_MAP_ENTRY(LdStRegImmPostIndexGpr),
742	DIS_ARMV8_DECODE_MAP_ENTRY(LdStRegImmPostIndexSimd),
743	DIS_ARMV8_DECODE_MAP_DEFINE_END(LdStRegImmPostIndex, RT_BIT_32(26), 26);
744
745
746	/*
747	* STTRB/LDTRB/LDTRSB/STTRH/LDTRH/LDTRSH/LDTRSH/STTR/LDTR/LDTRSW/STTR/LDTR
748	*
749	* Note: The size,opc bitfields are concatenated to form an index.
750	*/
751	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(LdStRegUnpriv)
752	DIS_ARMV8_INSN_DECODE(kDisParmParseSize, 30, 2, DIS_ARMV8_INSN_PARAM_UNSET),
753	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 0, 5, 0 /idxParam/),
754	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 1 /idxParam/),
755	DIS_ARMV8_INSN_DECODE(kDisParmParseSImmMemOffUnscaled, 12, 9, 1 /idxParam/),
756	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(LdStRegUnpriv)
757	DIS_ARMV8_OP(0x38000800, "sttrb", OP_ARMV8_A64_STTRB, DISOPTYPE_HARMLESS),
758	DIS_ARMV8_OP(0x38400800, "ldtrb", OP_ARMV8_A64_LDTRB, DISOPTYPE_HARMLESS),
759	DIS_ARMV8_OP_EX(0x38800800, "ldtrsb", OP_ARMV8_A64_LDTRSB, DISOPTYPE_HARMLESS, DISARMV8INSNCLASS_F_FORCED_64BIT),
760	DIS_ARMV8_OP_EX(0x38c00800, "ldtrsb", OP_ARMV8_A64_LDTRSB, DISOPTYPE_HARMLESS, DISARMV8INSNCLASS_F_FORCED_32BIT),
761	DIS_ARMV8_OP(0x78000800, "sttrh", OP_ARMV8_A64_STTRH, DISOPTYPE_HARMLESS),
762	DIS_ARMV8_OP(0x78400800, "ldtrh", OP_ARMV8_A64_LDTRH, DISOPTYPE_HARMLESS),
763	DIS_ARMV8_OP_EX(0x78800800, "ldtrsh", OP_ARMV8_A64_LDTRSH, DISOPTYPE_HARMLESS, DISARMV8INSNCLASS_F_FORCED_64BIT),
764	DIS_ARMV8_OP_EX(0x78c00800, "ldtrsh", OP_ARMV8_A64_LDTRSH, DISOPTYPE_HARMLESS, DISARMV8INSNCLASS_F_FORCED_32BIT),
765	DIS_ARMV8_OP(0xb8000800, "sttr", OP_ARMV8_A64_STTR, DISOPTYPE_HARMLESS),
766	DIS_ARMV8_OP(0xb8400800, "ldtr", OP_ARMV8_A64_LDTR, DISOPTYPE_HARMLESS),
767	DIS_ARMV8_OP_EX(0xb8800800, "ldtrsw", OP_ARMV8_A64_LDTRSW, DISOPTYPE_HARMLESS, DISARMV8INSNCLASS_F_FORCED_64BIT),
768	INVALID_OPCODE,
769	DIS_ARMV8_OP(0xf8000800, "sttr", OP_ARMV8_A64_STTR, DISOPTYPE_HARMLESS),
770	DIS_ARMV8_OP(0xf8400800, "ldtr", OP_ARMV8_A64_LDTR, DISOPTYPE_HARMLESS),
771	INVALID_OPCODE,
772	INVALID_OPCODE,
773	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(LdStRegUnpriv, 0xffe00c00 /fFixedInsn/,
774	kDisArmV8OpcDecodeCollate,
775	RT_BIT_32(22) \| RT_BIT_32(23) \| RT_BIT_32(30) \| RT_BIT_32(31), 22);
776
777
778	/*
779	* C4.1.94 - Loads and Stores - Load/Store register variants
780	*
781	* Differentiate further based on the op2<1:0> field.
782	*
783	* Bit 11 10
784	* +-------------------------------------------
785	* 0 0 Load/store register (unscaled immediate)
786	* 0 1 Load/store register (immediate post-indexed)
787	* 1 0 Load/store register (unprivileged)
788	* 1 1 Load/store register (immediate pre-indexed)
789	*/
790	DIS_ARMV8_DECODE_MAP_DEFINE_BEGIN(LdStRegOp2_11_0)
791	DIS_ARMV8_DECODE_MAP_ENTRY(LdStRegUnscaledImm),
792	DIS_ARMV8_DECODE_MAP_ENTRY(LdStRegImmPostIndex),
793	DIS_ARMV8_DECODE_MAP_ENTRY(LdStRegUnpriv), /* No vector variants. */
794	DIS_ARMV8_DECODE_MAP_ENTRY(LdStRegImmPreIndex),
795	DIS_ARMV8_DECODE_MAP_DEFINE_END(LdStRegOp2_11_0, RT_BIT_32(10) \| RT_BIT_32(11), 10);
796
797
798	/*
799	* C4.1.94 - Loads and Stores - Load/Store register variants
800	*
801	* Differentiate further based on the op2<11> field.
802	*
803	* Bit 21
804	* +-------------------------------------------
805	* 0 Load/store register (unscaled immediate) / Load/store register (immediate post-indexed) / Load/store register (unprivileged) / Load/store register (immediate pre-indexed)
806	* 1 Atomic memory operations / Load/store register (register offset) / Load/store register (pac).
807	*/
808	DIS_ARMV8_DECODE_MAP_DEFINE_BEGIN(LdStRegOp2_11)
809	DIS_ARMV8_DECODE_MAP_ENTRY(LdStRegOp2_11_0),
810	DIS_ARMV8_DECODE_MAP_ENTRY(LdStRegOp2_11_1),
811	DIS_ARMV8_DECODE_MAP_DEFINE_END(LdStRegOp2_11, RT_BIT_32(21), 21);
812
813
814	/*
815	* C4.1.94 - Loads and Stores - Load/Store register variants
816	*
817	* Differentiate further based on the op2<14> field.
818	*
819	* Bit 24
820	* +-------------------------------------------
821	* 0 All the other Load/store register variants and Atomic memory operations.
822	* 1 Load/store register (unsigned immediate).
823	*/
824	DIS_ARMV8_DECODE_MAP_DEFINE_BEGIN(LdStReg)
825	DIS_ARMV8_DECODE_MAP_ENTRY(LdStRegOp2_11),
826	DIS_ARMV8_DECODE_MAP_ENTRY(LdStRegUImm),
827	DIS_ARMV8_DECODE_MAP_DEFINE_END(LdStReg, RT_BIT_32(24), 24);
828
829
830	/*
831	* STP/LDP/STGP/LDPSW
832	*
833	* Note: The opc,L bitfields are concatenated to form an index.
834	*/
835	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(LdStRegPairOff)
836	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 0, 5, 0 /idxParam/),
837	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 10, 5, 1 /idxParam/),
838	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 2 /idxParam/),
839	DIS_ARMV8_INSN_DECODE(kDisParmParseSImmMemOff, 15, 7, 2 /idxParam/),
840	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(LdStRegPairOff)
841	DIS_ARMV8_OP_EX(0x29000000, "stp", OP_ARMV8_A64_STP, DISOPTYPE_HARMLESS, DISARMV8INSNCLASS_F_FORCED_32BIT),
842	DIS_ARMV8_OP_EX(0x29400000, "ldp", OP_ARMV8_A64_LDP, DISOPTYPE_HARMLESS, DISARMV8INSNCLASS_F_FORCED_32BIT),
843	INVALID_OPCODE,
844	INVALID_OPCODE,
845	DIS_ARMV8_OP_EX(0xa9000000, "stp", OP_ARMV8_A64_STP, DISOPTYPE_HARMLESS, DISARMV8INSNCLASS_F_FORCED_64BIT),
846	DIS_ARMV8_OP_EX(0xa9400000, "ldp", OP_ARMV8_A64_LDP, DISOPTYPE_HARMLESS, DISARMV8INSNCLASS_F_FORCED_64BIT),
847	INVALID_OPCODE,
848	INVALID_OPCODE,
849	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(LdStRegPairOff, 0xffc00000 /fFixedInsn/,
850	kDisArmV8OpcDecodeCollate,
851	RT_BIT_32(22) \| RT_BIT_32(30) \| RT_BIT_32(31), 22);
852
853
854	/*
855	* STP/LDP/STGP/LDPSW - pre-indexed variant.
856	*
857	* Note: The opc,L bitfields are concatenated to form an index.
858	*/
859	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(LdStRegPairPreIndex)
860	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 0, 5, 0 /idxParam/),
861	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 10, 5, 1 /idxParam/),
862	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 2 /idxParam/),
863	DIS_ARMV8_INSN_DECODE(kDisParmParseSImmMemOff, 15, 7, 2 /idxParam/),
864	DIS_ARMV8_INSN_DECODE(kDisParmParseSetPreIndexed, 0, 0, 2 /idxParam/),
865	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(LdStRegPairPreIndex)
866	DIS_ARMV8_OP_EX(0x29800000, "stp", OP_ARMV8_A64_STP, DISOPTYPE_HARMLESS, DISARMV8INSNCLASS_F_FORCED_32BIT),
867	DIS_ARMV8_OP_EX(0x29c00000, "ldp", OP_ARMV8_A64_LDP, DISOPTYPE_HARMLESS, DISARMV8INSNCLASS_F_FORCED_32BIT),
868	INVALID_OPCODE,
869	INVALID_OPCODE,
870	DIS_ARMV8_OP_EX(0xa9800000, "stp", OP_ARMV8_A64_STP, DISOPTYPE_HARMLESS, DISARMV8INSNCLASS_F_FORCED_64BIT),
871	DIS_ARMV8_OP_EX(0xa9c00000, "ldp", OP_ARMV8_A64_LDP, DISOPTYPE_HARMLESS, DISARMV8INSNCLASS_F_FORCED_64BIT),
872	INVALID_OPCODE,
873	INVALID_OPCODE,
874	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(LdStRegPairPreIndex, 0xffc00000 /fFixedInsn/,
875	kDisArmV8OpcDecodeCollate,
876	RT_BIT_32(22) \| RT_BIT_32(30) \| RT_BIT_32(31), 22);
877
878
879	/*
880	* STP/LDP/STGP/LDPSW - post-indexed variant.
881	*
882	* Note: The opc,L bitfields are concatenated to form an index.
883	*/
884	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(LdStRegPairPostIndex)
885	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 0, 5, 0 /idxParam/),
886	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 10, 5, 1 /idxParam/),
887	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 2 /idxParam/),
888	DIS_ARMV8_INSN_DECODE(kDisParmParseSImmMemOff, 15, 7, 2 /idxParam/),
889	DIS_ARMV8_INSN_DECODE(kDisParmParseSetPostIndexed, 0, 0, 2 /idxParam/),
890	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(LdStRegPairPostIndex)
891	DIS_ARMV8_OP_EX(0x28800000, "stp", OP_ARMV8_A64_STP, DISOPTYPE_HARMLESS, DISARMV8INSNCLASS_F_FORCED_32BIT),
892	DIS_ARMV8_OP_EX(0x28c00000, "ldp", OP_ARMV8_A64_LDP, DISOPTYPE_HARMLESS, DISARMV8INSNCLASS_F_FORCED_32BIT),
893	INVALID_OPCODE,
894	INVALID_OPCODE,
895	DIS_ARMV8_OP_EX(0xa8800000, "stp", OP_ARMV8_A64_STP, DISOPTYPE_HARMLESS, DISARMV8INSNCLASS_F_FORCED_64BIT),
896	DIS_ARMV8_OP_EX(0xa8c00000, "ldp", OP_ARMV8_A64_LDP, DISOPTYPE_HARMLESS, DISARMV8INSNCLASS_F_FORCED_64BIT),
897	INVALID_OPCODE,
898	INVALID_OPCODE,
899	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(LdStRegPairPostIndex, 0xffc00000 /fFixedInsn/,
900	kDisArmV8OpcDecodeCollate,
901	RT_BIT_32(22) \| RT_BIT_32(30) \| RT_BIT_32(31), 22);
902
903
904	/*
905	* STNP/LDNP - no-allocate variant.
906	*
907	* Note: The opc,L bitfields are concatenated to form an index.
908	*/
909	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(LdStRegPairNoAllocGpr)
910	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 0, 5, 0 /idxParam/),
911	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 10, 5, 1 /idxParam/),
912	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 2 /idxParam/),
913	DIS_ARMV8_INSN_DECODE(kDisParmParseSImmMemOff, 15, 7, 2 /idxParam/),
914	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(LdStRegPairNoAllocGpr)
915	DIS_ARMV8_OP_EX(0x28000000, "stnp", OP_ARMV8_A64_STNP, DISOPTYPE_HARMLESS, DISARMV8INSNCLASS_F_FORCED_32BIT),
916	DIS_ARMV8_OP_EX(0x28400000, "ldnp", OP_ARMV8_A64_LDNP, DISOPTYPE_HARMLESS, DISARMV8INSNCLASS_F_FORCED_32BIT),
917	INVALID_OPCODE,
918	INVALID_OPCODE,
919	DIS_ARMV8_OP_EX(0xa8000000, "stnp", OP_ARMV8_A64_STNP, DISOPTYPE_HARMLESS, DISARMV8INSNCLASS_F_FORCED_64BIT),
920	DIS_ARMV8_OP_EX(0xa8400000, "ldnp", OP_ARMV8_A64_LDNP, DISOPTYPE_HARMLESS, DISARMV8INSNCLASS_F_FORCED_64BIT),
921	INVALID_OPCODE,
922	INVALID_OPCODE,
923	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(LdStRegPairNoAllocGpr, 0xffc00000 /fFixedInsn/,
924	kDisArmV8OpcDecodeCollate,
925	RT_BIT_32(22) \| RT_BIT_32(30) \| RT_BIT_32(31), 22);
926
927
928	/*
929	* SIMD STNP/LDNP - no-allocate variant.
930	*
931	* Note: The opc,L bitfields are concatenated to form an index.
932	*/
933	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(LdStRegPairNoAllocSimd)
934	DIS_ARMV8_INSN_DECODE(kDisParmParseSimdRegSize32, 0, 0, DIS_ARMV8_INSN_PARAM_UNSET),
935	DIS_ARMV8_INSN_DECODE(kDisParmParseSimdRegScalar, 0, 5, 0 /idxParam/),
936	DIS_ARMV8_INSN_DECODE(kDisParmParseSimdRegScalar, 10, 5, 1 /idxParam/),
937	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 2 /idxParam/),
938	DIS_ARMV8_INSN_DECODE(kDisParmParseSImmMemOff, 15, 7, 2 /idxParam/),
939	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER_ALTERNATIVE(LdStRegPairNoAllocSimd64)
940	DIS_ARMV8_INSN_DECODE(kDisParmParseSimdRegSize64, 0, 0, DIS_ARMV8_INSN_PARAM_UNSET),
941	DIS_ARMV8_INSN_DECODE(kDisParmParseSimdRegScalar, 0, 5, 0 /idxParam/),
942	DIS_ARMV8_INSN_DECODE(kDisParmParseSimdRegScalar, 10, 5, 1 /idxParam/),
943	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 2 /idxParam/),
944	DIS_ARMV8_INSN_DECODE(kDisParmParseSImmMemOff, 15, 7, 2 /idxParam/),
945	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER_ALTERNATIVE(LdStRegPairNoAllocSimd128)
946	DIS_ARMV8_INSN_DECODE(kDisParmParseSimdRegSize128, 0, 0, DIS_ARMV8_INSN_PARAM_UNSET),
947	DIS_ARMV8_INSN_DECODE(kDisParmParseSimdRegScalar, 0, 5, 0 /idxParam/),
948	DIS_ARMV8_INSN_DECODE(kDisParmParseSimdRegScalar, 10, 5, 1 /idxParam/),
949	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 2 /idxParam/),
950	DIS_ARMV8_INSN_DECODE(kDisParmParseSImmMemOff, 15, 7, 2 /idxParam/),
951	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(LdStRegPairNoAllocSimd)
952	DIS_ARMV8_OP( 0x2c000000, "stnp", OP_ARMV8_A64_STNP, DISOPTYPE_HARMLESS),
953	DIS_ARMV8_OP( 0x2c400000, "ldnp", OP_ARMV8_A64_LDNP, DISOPTYPE_HARMLESS),
954	DIS_ARMV8_OP_ALT_DECODE(0x6c000000, "stnp", OP_ARMV8_A64_STNP, DISOPTYPE_HARMLESS, LdStRegPairNoAllocSimd64),
955	DIS_ARMV8_OP_ALT_DECODE(0x6c400000, "ldnp", OP_ARMV8_A64_LDNP, DISOPTYPE_HARMLESS, LdStRegPairNoAllocSimd64),
956	DIS_ARMV8_OP_ALT_DECODE(0xac000000, "stnp", OP_ARMV8_A64_STNP, DISOPTYPE_HARMLESS, LdStRegPairNoAllocSimd128),
957	DIS_ARMV8_OP_ALT_DECODE(0xac400000, "ldnp", OP_ARMV8_A64_LDNP, DISOPTYPE_HARMLESS, LdStRegPairNoAllocSimd128),
958	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(LdStRegPairNoAllocSimd, 0xffc00000 /fFixedInsn/,
959	kDisArmV8OpcDecodeCollate,
960	RT_BIT_32(22) \| RT_BIT_32(30) \| RT_BIT_32(31), 22);
961
962
963	/*
964	* C4.1.94.21 - Loads and Stores - Load/Store register (immediate post-indexed) variants
965	*
966	* Differentiate further based on the VR field.
967	*
968	* Bit 26
969	* +-------------------------------------------
970	* 0 GPR variants.
971	* 1 SIMD/FP variants
972	*/
973	DIS_ARMV8_DECODE_MAP_DEFINE_BEGIN(LdStRegPairNoAlloc)
974	DIS_ARMV8_DECODE_MAP_ENTRY(LdStRegPairNoAllocGpr),
975	DIS_ARMV8_DECODE_MAP_ENTRY(LdStRegPairNoAllocSimd),
976	DIS_ARMV8_DECODE_MAP_DEFINE_END(LdStRegPairNoAlloc, RT_BIT_32(26), 26);
977
978
979	/*
980	* C4.1.94 - Loads and Stores - Load/Store register pair variants
981	*
982	* Differentiate further based on the op2<14:13> field.
983	*
984	* Bit 24 23
985	* +-------------------------------------------
986	* 0 0 Load/store no-allocate pair (offset)
987	* 0 1 Load/store register pair (post-indexed)
988	* 1 0 Load/store register pair (offset).
989	* 1 1 Load/store register pair (pre-indexed).
990	*/
991	DIS_ARMV8_DECODE_MAP_DEFINE_BEGIN(LdStRegPair)
992	DIS_ARMV8_DECODE_MAP_ENTRY(LdStRegPairNoAlloc),
993	DIS_ARMV8_DECODE_MAP_ENTRY(LdStRegPairPostIndex),
994	DIS_ARMV8_DECODE_MAP_ENTRY(LdStRegPairOff),
995	DIS_ARMV8_DECODE_MAP_ENTRY(LdStRegPairPreIndex),
996	DIS_ARMV8_DECODE_MAP_DEFINE_END(LdStRegPair, RT_BIT_32(23) \| RT_BIT_32(24), 23);
997
998
999	/* LDR/LDRSW/PRFM - literal variant. */
1000	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(LdRegLiteralGpr)
1001	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 0, 5, 0 /idxParam/),
1002	DIS_ARMV8_INSN_DECODE(kDisParmParseImmRel, 5, 19, 1 /idxParam/),
1003	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(LdRegLiteralGpr)
1004	DIS_ARMV8_OP_EX(0x18000000, "ldr", OP_ARMV8_A64_LDR, DISOPTYPE_HARMLESS, DISARMV8INSNCLASS_F_FORCED_32BIT),
1005	DIS_ARMV8_OP_EX(0x58000000, "ldr", OP_ARMV8_A64_LDR, DISOPTYPE_HARMLESS, DISARMV8INSNCLASS_F_FORCED_64BIT),
1006	DIS_ARMV8_OP_EX(0x98000000, "ldrsw", OP_ARMV8_A64_LDRSW, DISOPTYPE_HARMLESS, DISARMV8INSNCLASS_F_FORCED_64BIT),
1007	INVALID_OPCODE, /** @todo PRFM */
1008	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(LdRegLiteralGpr, 0xff000000 /fFixedInsn/,
1009	kDisArmV8OpcDecodeNop,
1010	RT_BIT_32(30) \| RT_BIT_32(31), 30);
1011
1012
1013	/* SIMD LDR - literal variant. */
1014	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(LdRegLiteralSimd)
1015	DIS_ARMV8_INSN_DECODE(kDisParmParseSimdRegSize32, 0, 0, DIS_ARMV8_INSN_PARAM_UNSET),
1016	DIS_ARMV8_INSN_DECODE(kDisParmParseSimdRegScalar, 0, 5, 0 /idxParam/),
1017	DIS_ARMV8_INSN_DECODE(kDisParmParseImmRel, 5, 19, 1 /idxParam/),
1018	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER_ALTERNATIVE(LdRegLiteralSimd64)
1019	DIS_ARMV8_INSN_DECODE(kDisParmParseSimdRegSize64, 0, 0, DIS_ARMV8_INSN_PARAM_UNSET),
1020	DIS_ARMV8_INSN_DECODE(kDisParmParseSimdRegScalar, 0, 5, 0 /idxParam/),
1021	DIS_ARMV8_INSN_DECODE(kDisParmParseImmRel, 5, 19, 1 /idxParam/),
1022	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER_ALTERNATIVE(LdRegLiteralSimd128)
1023	DIS_ARMV8_INSN_DECODE(kDisParmParseSimdRegSize128, 0, 0, DIS_ARMV8_INSN_PARAM_UNSET),
1024	DIS_ARMV8_INSN_DECODE(kDisParmParseSimdRegScalar, 0, 5, 0 /idxParam/),
1025	DIS_ARMV8_INSN_DECODE(kDisParmParseImmRel, 5, 19, 1 /idxParam/),
1026	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(LdRegLiteralSimd)
1027	DIS_ARMV8_OP( 0x1c000000, "ldr", OP_ARMV8_A64_LDR, DISOPTYPE_HARMLESS),
1028	DIS_ARMV8_OP_ALT_DECODE(0x5c000000, "ldr", OP_ARMV8_A64_LDR, DISOPTYPE_HARMLESS, LdRegLiteralSimd64),
1029	DIS_ARMV8_OP_ALT_DECODE(0x9c000000, "ldr", OP_ARMV8_A64_LDR, DISOPTYPE_HARMLESS, LdRegLiteralSimd128),
1030	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(LdRegLiteralSimd, 0xff000000 /fFixedInsn/,
1031	kDisArmV8OpcDecodeNop,
1032	RT_BIT_32(30) \| RT_BIT_32(31), 30);
1033
1034
1035	/*
1036	* C4.1.94.19 - Loads and Stores - Load register (literal) variants
1037	*
1038	* Differentiate further based on the VR field.
1039	*
1040	* Bit 26
1041	* +-------------------------------------------
1042	* 0 GPR variants.
1043	* 1 SIMD/FP variants
1044	*/
1045	DIS_ARMV8_DECODE_MAP_DEFINE_BEGIN(LdRegLiteral)
1046	DIS_ARMV8_DECODE_MAP_ENTRY(LdRegLiteralGpr),
1047	DIS_ARMV8_DECODE_MAP_ENTRY(LdRegLiteralSimd),
1048	DIS_ARMV8_DECODE_MAP_DEFINE_END(LdRegLiteral, RT_BIT_32(26), 26);
1049
1050
1051	/* STG/STZGM/LDG/STZG/ST2G/STGM/STZ2G/LDGM. */
1052	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(LdStMemTags)
1053	DIS_ARMV8_INSN_DECODE(kDisParmParseGprSp, 0, 5, 0 /idxParam/),
1054	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 1 /idxParam/),
1055	DIS_ARMV8_INSN_DECODE(kDisParmParseSImmTags, 12, 9, 1 /idxParam/),
1056	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER_ALTERNATIVE(LdStMemTagsLdg) /** @todo imm9 == 0 */
1057	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 0, 5, 0 /idxParam/),
1058	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 1 /idxParam/),
1059	DIS_ARMV8_INSN_DECODE(kDisParmParseSImmTags, 12, 9, 1 /idxParam/),
1060	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER_ALTERNATIVE(LdStMemTagsStzgm) /** @todo imm9 == 0 */
1061	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 0, 5, 0 /idxParam/),
1062	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 1 /idxParam/),
1063	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER_ALTERNATIVE(LdStMemTagsPostIndex)
1064	DIS_ARMV8_INSN_DECODE(kDisParmParseGprSp, 0, 5, 0 /idxParam/),
1065	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 1 /idxParam/),
1066	DIS_ARMV8_INSN_DECODE(kDisParmParseSImmTags, 12, 9, 1 /idxParam/),
1067	DIS_ARMV8_INSN_DECODE(kDisParmParseSetPostIndexed, 0, 0, 1 /idxParam/),
1068	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER_ALTERNATIVE(LdStMemTagsPreIndex)
1069	DIS_ARMV8_INSN_DECODE(kDisParmParseGprSp, 0, 5, 0 /idxParam/),
1070	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 1 /idxParam/),
1071	DIS_ARMV8_INSN_DECODE(kDisParmParseSImmTags, 12, 9, 1 /idxParam/),
1072	DIS_ARMV8_INSN_DECODE(kDisParmParseSetPreIndexed, 0, 0, 1 /idxParam/),
1073	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(LdStMemTags)
1074	DIS_ARMV8_OP_ALT_DECODE(0xd9200000, "stzgm", OP_ARMV8_A64_STZGM, DISOPTYPE_HARMLESS, LdStMemTagsStzgm), /* FEAT_MTE2 */
1075	DIS_ARMV8_OP_ALT_DECODE(0xd9200400, "stg", OP_ARMV8_A64_STG, DISOPTYPE_HARMLESS, LdStMemTagsPostIndex), /* FEAT_MTE */
1076	DIS_ARMV8_OP( 0xd9200800, "stg", OP_ARMV8_A64_STG, DISOPTYPE_HARMLESS), /* FEAT_MTE */
1077	DIS_ARMV8_OP_ALT_DECODE(0xd9200c00, "stg", OP_ARMV8_A64_STG, DISOPTYPE_HARMLESS, LdStMemTagsPreIndex), /* FEAT_MTE */
1078	DIS_ARMV8_OP_ALT_DECODE(0xd9600000, "ldg", OP_ARMV8_A64_LDG, DISOPTYPE_HARMLESS, LdStMemTagsLdg), /* FEAT_MTE */
1079	DIS_ARMV8_OP_ALT_DECODE(0xd9600400, "stzg", OP_ARMV8_A64_STZG, DISOPTYPE_HARMLESS, LdStMemTagsPostIndex), /* FEAT_MTE */
1080	DIS_ARMV8_OP( 0xd9600800, "stzg", OP_ARMV8_A64_STZG, DISOPTYPE_HARMLESS), /* FEAT_MTE */
1081	DIS_ARMV8_OP_ALT_DECODE(0xd9600c00, "stzg", OP_ARMV8_A64_STZG, DISOPTYPE_HARMLESS, LdStMemTagsPreIndex), /* FEAT_MTE */
1082	DIS_ARMV8_OP_ALT_DECODE(0xd9a00000, "stgm", OP_ARMV8_A64_STGM, DISOPTYPE_HARMLESS, LdStMemTagsStzgm), /* FEAT_MTE2 */
1083	DIS_ARMV8_OP_ALT_DECODE(0xd9a00400, "st2g", OP_ARMV8_A64_ST2G, DISOPTYPE_HARMLESS, LdStMemTagsPostIndex), /* FEAT_MTE */
1084	DIS_ARMV8_OP( 0xd9a00800, "st2g", OP_ARMV8_A64_ST2G, DISOPTYPE_HARMLESS), /* FEAT_MTE */
1085	DIS_ARMV8_OP_ALT_DECODE(0xd9a00c00, "st2g", OP_ARMV8_A64_ST2G, DISOPTYPE_HARMLESS, LdStMemTagsPreIndex), /* FEAT_MTE */
1086	DIS_ARMV8_OP_ALT_DECODE(0xd9e00000, "ldgm", OP_ARMV8_A64_LDGM, DISOPTYPE_HARMLESS, LdStMemTagsStzgm), /* FEAT_MTE2 */
1087	DIS_ARMV8_OP_ALT_DECODE(0xd9e00400, "stz2g", OP_ARMV8_A64_STZ2G, DISOPTYPE_HARMLESS, LdStMemTagsPostIndex), /* FEAT_MTE */
1088	DIS_ARMV8_OP( 0xd9e00800, "stz2g", OP_ARMV8_A64_STZ2G, DISOPTYPE_HARMLESS), /* FEAT_MTE */
1089	DIS_ARMV8_OP_ALT_DECODE(0xd9e00c00, "stz2g", OP_ARMV8_A64_STZ2G, DISOPTYPE_HARMLESS, LdStMemTagsPreIndex), /* FEAT_MTE */
1090	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(LdStMemTags, 0xffe00c00 /fFixedInsn/,
1091	kDisArmV8OpcDecodeCollate,
1092	RT_BIT_32(10) \| RT_BIT_32(11) \| RT_BIT_32(22) \| RT_BIT_32(23), 10);
1093
1094
1095	/* C4.1.94.6 - RCW compare and swap. */
1096	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(LdStRcwCmpSwp)
1097	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr64, 16, 5, 0 /idxParam/),
1098	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr64, 0, 5, 1 /idxParam/),
1099	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 2 /idxParam/),
1100	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(LdStRcwCmpSwp)
1101	DIS_ARMV8_OP(0x19200800, "rcwcas", OP_ARMV8_A64_RCWCAS, DISOPTYPE_HARMLESS), /* FEAT_THE */
1102	DIS_ARMV8_OP(0x19600800, "rcwcasl", OP_ARMV8_A64_RCWCASL, DISOPTYPE_HARMLESS), /* FEAT_THE */
1103	DIS_ARMV8_OP(0x19a00800, "rcwcasa", OP_ARMV8_A64_RCWCASA, DISOPTYPE_HARMLESS), /* FEAT_THE */
1104	DIS_ARMV8_OP(0x19e00800, "rcwcasal", OP_ARMV8_A64_RCWCASAL, DISOPTYPE_HARMLESS), /* FEAT_THE */
1105	DIS_ARMV8_OP(0x59200800, "rcwscas", OP_ARMV8_A64_RCWSCAS, DISOPTYPE_HARMLESS), /* FEAT_THE */
1106	DIS_ARMV8_OP(0x59600800, "rcwscasl", OP_ARMV8_A64_RCWSCASL, DISOPTYPE_HARMLESS), /* FEAT_THE */
1107	DIS_ARMV8_OP(0x59a00800, "rcwscasa", OP_ARMV8_A64_RCWSCASA, DISOPTYPE_HARMLESS), /* FEAT_THE */
1108	DIS_ARMV8_OP(0x59e00800, "rcwscasal", OP_ARMV8_A64_RCWSCASAL, DISOPTYPE_HARMLESS), /* FEAT_THE */
1109	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(LdStRcwCmpSwp, 0xffe0fc00 /fFixedInsn/,
1110	kDisArmV8OpcDecodeCollate,
1111	RT_BIT_32(22) \| RT_BIT_32(23) \| RT_BIT_32(30), 22);
1112
1113
1114	/* C4.1.94.6 - RCW compare and swap pair. */
1115	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(LdStRcwCmpSwpPair)
1116	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr64, 16, 5, 0 /idxParam/),
1117	DIS_ARMV8_INSN_DECODE(kDisParmParseGprCount, 0, 2, 0 /idxParam/),
1118	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr64, 0, 5, 1 /idxParam/),
1119	DIS_ARMV8_INSN_DECODE(kDisParmParseGprCount, 0, 2, 1 /idxParam/),
1120	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 2 /idxParam/),
1121	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(LdStRcwCmpSwpPair)
1122	DIS_ARMV8_OP(0x19200c00, "rcwcasp", OP_ARMV8_A64_RCWCASP, DISOPTYPE_HARMLESS), /* FEAT_D128 && FEAT_THE */
1123	DIS_ARMV8_OP(0x19600c00, "rcwcaspl", OP_ARMV8_A64_RCWCASPL, DISOPTYPE_HARMLESS), /* FEAT_D128 && FEAT_THE */
1124	DIS_ARMV8_OP(0x19a00c00, "rcwcaspa", OP_ARMV8_A64_RCWCASPA, DISOPTYPE_HARMLESS), /* FEAT_D128 && FEAT_THE */
1125	DIS_ARMV8_OP(0x19e00c00, "rcwcaspal", OP_ARMV8_A64_RCWCASPAL, DISOPTYPE_HARMLESS), /* FEAT_D128 && FEAT_THE */
1126	DIS_ARMV8_OP(0x59200c00, "rcwscasp", OP_ARMV8_A64_RCWSCASP, DISOPTYPE_HARMLESS), /* FEAT_D128 && FEAT_THE */
1127	DIS_ARMV8_OP(0x59600c00, "rcwscaspl", OP_ARMV8_A64_RCWSCASPL, DISOPTYPE_HARMLESS), /* FEAT_D128 && FEAT_THE */
1128	DIS_ARMV8_OP(0x59a00c00, "rcwscaspa", OP_ARMV8_A64_RCWSCASPA, DISOPTYPE_HARMLESS), /* FEAT_D128 && FEAT_THE */
1129	DIS_ARMV8_OP(0x59e00c00, "rcwscaspal", OP_ARMV8_A64_RCWSCASPAL, DISOPTYPE_HARMLESS), /* FEAT_D128 && FEAT_THE */
1130	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(LdStRcwCmpSwpPair, 0xffe0fc00 /fFixedInsn/,
1131	kDisArmV8OpcDecodeCollate,
1132	RT_BIT_32(22) \| RT_BIT_32(23) \| RT_BIT_32(30), 22);
1133
1134
1135	/**
1136	* C4.1.94 - Loads and Stores
1137	*
1138	* Differentiate between the RCW compare and swap (pair) and 128-bit atomic instructions.
1139	*/
1140	DIS_ARMV8_DECODE_MAP_DEFINE_BEGIN(LdStRcwCmpSwp128BitAtomic)
1141	DIS_ARMV8_DECODE_MAP_INVALID_ENTRY, /** @todo 128-bit atomic instructions */
1142	DIS_ARMV8_DECODE_MAP_INVALID_ENTRY,
1143	DIS_ARMV8_DECODE_MAP_ENTRY(LdStRcwCmpSwp),
1144	DIS_ARMV8_DECODE_MAP_ENTRY(LdStRcwCmpSwpPair),
1145	DIS_ARMV8_DECODE_MAP_DEFINE_END(LdStRcwCmpSwp128BitAtomic, RT_BIT_32(10) \| RT_BIT_32(11), 10);
1146
1147
1148	/**
1149	* C4.1.94 - Loads and Stores
1150	*
1151	* Differentiate between further based on op0<3> (bit 31).
1152	*/
1153	DIS_ARMV8_DECODE_MAP_DEFINE_BEGIN(LdStBit28_1_Bit29_0_Bit24_1_Bit21_1)
1154	DIS_ARMV8_DECODE_MAP_ENTRY(LdStRcwCmpSwp128BitAtomic),
1155	DIS_ARMV8_DECODE_MAP_ENTRY(LdStMemTags),
1156	DIS_ARMV8_DECODE_MAP_DEFINE_END_SINGLE_BIT(LdStBit28_1_Bit29_0_Bit24_1_Bit21_1, 31);
1157
1158
1159	/**
1160	* C4.1.94 - Loads and Stores
1161	*
1162	* Differentiate between further based on op2<11> (bit 21).
1163	*/
1164	DIS_ARMV8_DECODE_MAP_DEFINE_BEGIN(LdStBit28_1_Bit29_0_Bit24_1)
1165	DIS_ARMV8_DECODE_MAP_INVALID_ENTRY, /** @todo GCS load/store / LDIAPP/STILP / LDAPR/STLR / Memory Copy and Set */
1166	DIS_ARMV8_DECODE_MAP_ENTRY(LdStBit28_1_Bit29_0_Bit24_1_Bit21_1),
1167	DIS_ARMV8_DECODE_MAP_DEFINE_END_SINGLE_BIT(LdStBit28_1_Bit29_0_Bit24_1, 21);
1168
1169
1170	/**
1171	* C4.1.94 - Loads and Stores
1172	*
1173	* Differentiate between Load register (literal) and the other classes based on op2<14> (bit 24).
1174	*/
1175	DIS_ARMV8_DECODE_MAP_DEFINE_BEGIN(LdStBit28_1_Bit29_0)
1176	DIS_ARMV8_DECODE_MAP_ENTRY(LdRegLiteral),
1177	DIS_ARMV8_DECODE_MAP_ENTRY(LdStBit28_1_Bit29_0_Bit24_1),
1178	DIS_ARMV8_DECODE_MAP_DEFINE_END_SINGLE_BIT(LdStBit28_1_Bit29_0, 24);
1179
1180
1181	/* C4.1.94.13 - Loads and Stores - Load/Store ordered */
1182	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(LdStOrdered)
1183	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr32, 0, 5, 0 /idxParam/),
1184	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 1 /idxParam/),
1185	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER_ALTERNATIVE(LdStOrdered64)
1186	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr64, 0, 5, 0 /idxParam/),
1187	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 1 /idxParam/),
1188	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(LdStOrdered)
1189	DIS_ARMV8_OP( 0x089f7c00, "stllrb", OP_ARMV8_A64_STLLRB, DISOPTYPE_HARMLESS), /* FEAT_LOR */
1190	DIS_ARMV8_OP( 0x089ffc00, "stlrb", OP_ARMV8_A64_STLRB, DISOPTYPE_HARMLESS),
1191	DIS_ARMV8_OP( 0x08df7c00, "ldlarb", OP_ARMV8_A64_LDLARB, DISOPTYPE_HARMLESS), /* FEAT_LOR */
1192	DIS_ARMV8_OP( 0x08dffc00, "ldarb", OP_ARMV8_A64_LDARB, DISOPTYPE_HARMLESS),
1193	DIS_ARMV8_OP( 0x489f7c00, "stllrh", OP_ARMV8_A64_STLLRH, DISOPTYPE_HARMLESS), /* FEAT_LOR */
1194	DIS_ARMV8_OP( 0x489ffc00, "stlrh", OP_ARMV8_A64_STLRH, DISOPTYPE_HARMLESS),
1195	DIS_ARMV8_OP( 0x48df7c00, "ldlarh", OP_ARMV8_A64_LDLARH, DISOPTYPE_HARMLESS), /* FEAT_LOR */
1196	DIS_ARMV8_OP( 0x48dffc00, "ldarh", OP_ARMV8_A64_LDARH, DISOPTYPE_HARMLESS),
1197	DIS_ARMV8_OP( 0x889f7c00, "stllr", OP_ARMV8_A64_STLLR, DISOPTYPE_HARMLESS), /* FEAT_LOR */
1198	DIS_ARMV8_OP( 0x889ffc00, "stlr", OP_ARMV8_A64_STLR, DISOPTYPE_HARMLESS),
1199	DIS_ARMV8_OP( 0x88df7c00, "ldlar", OP_ARMV8_A64_LDLAR, DISOPTYPE_HARMLESS), /* FEAT_LOR */
1200	DIS_ARMV8_OP( 0x88dffc00, "ldar", OP_ARMV8_A64_LDAR, DISOPTYPE_HARMLESS),
1201	DIS_ARMV8_OP_ALT_DECODE(0xc89f7c00, "stllr", OP_ARMV8_A64_STLLR, DISOPTYPE_HARMLESS, LdStOrdered64), /* FEAT_LOR */
1202	DIS_ARMV8_OP_ALT_DECODE(0xc89ffc00, "stlr", OP_ARMV8_A64_STLR, DISOPTYPE_HARMLESS, LdStOrdered64),
1203	DIS_ARMV8_OP_ALT_DECODE(0xc8df7c00, "ldlar", OP_ARMV8_A64_LDLAR, DISOPTYPE_HARMLESS, LdStOrdered64), /* FEAT_LOR */
1204	DIS_ARMV8_OP_ALT_DECODE(0xc8dffc00, "ldar", OP_ARMV8_A64_LDAR, DISOPTYPE_HARMLESS, LdStOrdered64),
1205	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(LdStOrdered, 0xfffffc00 /fFixedInsn/,
1206	kDisArmV8OpcDecodeCollate,
1207	/* o0 */ RT_BIT_32(15)
1208	/* L */ \| RT_BIT_32(22)
1209	/* size */ \| RT_BIT_32(30) \| RT_BIT_32(31), 15);
1210
1211
1212	/* C4.1.94.14 - Loads and Stores - Compare and swap */
1213	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(LdStCas)
1214	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr32, 16, 5, 0 /idxParam/),
1215	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr32, 0, 5, 1 /idxParam/),
1216	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 2 /idxParam/),
1217	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER_ALTERNATIVE(LdStCas64)
1218	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr64, 16, 5, 0 /idxParam/),
1219	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr64, 0, 5, 1 /idxParam/),
1220	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 2 /idxParam/),
1221	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(LdStCas)
1222	DIS_ARMV8_OP( 0x08a07c00, "casb", OP_ARMV8_A64_CASB, DISOPTYPE_HARMLESS),
1223	DIS_ARMV8_OP( 0x08a0fc00, "caslb", OP_ARMV8_A64_CASLB, DISOPTYPE_HARMLESS),
1224	DIS_ARMV8_OP( 0x08e07c00, "casab", OP_ARMV8_A64_CASAB, DISOPTYPE_HARMLESS),
1225	DIS_ARMV8_OP( 0x08e0fc00, "casalb", OP_ARMV8_A64_CASALB, DISOPTYPE_HARMLESS),
1226	DIS_ARMV8_OP( 0x48a07c00, "cash", OP_ARMV8_A64_CASH, DISOPTYPE_HARMLESS),
1227	DIS_ARMV8_OP( 0x48a0fc00, "caslh", OP_ARMV8_A64_CASLH, DISOPTYPE_HARMLESS),
1228	DIS_ARMV8_OP( 0x48e07c00, "casah", OP_ARMV8_A64_CASAH, DISOPTYPE_HARMLESS),
1229	DIS_ARMV8_OP( 0x48e0fc00, "casalh", OP_ARMV8_A64_CASALH, DISOPTYPE_HARMLESS),
1230	DIS_ARMV8_OP( 0x88a07c00, "cas", OP_ARMV8_A64_CAS, DISOPTYPE_HARMLESS),
1231	DIS_ARMV8_OP( 0x88a0fc00, "casl", OP_ARMV8_A64_CASL, DISOPTYPE_HARMLESS),
1232	DIS_ARMV8_OP( 0x88e07c00, "casa", OP_ARMV8_A64_CASA, DISOPTYPE_HARMLESS),
1233	DIS_ARMV8_OP( 0x88e0fc00, "casal", OP_ARMV8_A64_CASAL, DISOPTYPE_HARMLESS),
1234	DIS_ARMV8_OP_ALT_DECODE(0xc8a07c00, "cas", OP_ARMV8_A64_CAS, DISOPTYPE_HARMLESS, LdStCas64),
1235	DIS_ARMV8_OP_ALT_DECODE(0xc8a0fc00, "casl", OP_ARMV8_A64_CASL, DISOPTYPE_HARMLESS, LdStCas64),
1236	DIS_ARMV8_OP_ALT_DECODE(0xc8e07c00, "casa", OP_ARMV8_A64_CASA, DISOPTYPE_HARMLESS, LdStCas64),
1237	DIS_ARMV8_OP_ALT_DECODE(0xc8e0fc00, "casal", OP_ARMV8_A64_CASAL, DISOPTYPE_HARMLESS, LdStCas64),
1238	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(LdStCas, 0xffe0fc00 /fFixedInsn/,
1239	kDisArmV8OpcDecodeCollate,
1240	/* o0 */ RT_BIT_32(15)
1241	/* L */ \| RT_BIT_32(22)
1242	/* size */ \| RT_BIT_32(30) \| RT_BIT_32(31), 15);
1243
1244
1245	/**
1246	* C4.1.94 - Loads and Stores
1247	*
1248	* Differentiate between Load/Store ordered and Compare and swap instruction classes based on op2<11> (bit 21).
1249	*/
1250	DIS_ARMV8_DECODE_MAP_DEFINE_BEGIN(LdStOrdered_Cas)
1251	DIS_ARMV8_DECODE_MAP_ENTRY(LdStOrdered),
1252	DIS_ARMV8_DECODE_MAP_ENTRY(LdStCas),
1253	DIS_ARMV8_DECODE_MAP_DEFINE_END_SINGLE_BIT(LdStOrdered_Cas, 21);
1254
1255
1256	/* C4.1.94.11 - Loads and Stores - Load exclusive pair */
1257	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(LdStExclusivePair)
1258	DIS_ARMV8_INSN_DECODE(kDisParmParseSf, 30, 1, DIS_ARMV8_INSN_PARAM_UNSET), /* Not exactly an SF bit but serves the same purpose. */
1259	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr32, 16, 5, 0 /idxParam/),
1260	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 0, 5, 1 /idxParam/),
1261	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 10, 5, 2 /idxParam/),
1262	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 3 /idxParam/),
1263	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER_ALTERNATIVE(LdStExclusiveRegLd)
1264	DIS_ARMV8_INSN_DECODE(kDisParmParseSf, 30, 1, DIS_ARMV8_INSN_PARAM_UNSET), /* Not exactly an SF bit but serves the same purpose. */
1265	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 0, 5, 0 /idxParam/),
1266	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr, 10, 5, 1 /idxParam/),
1267	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 2 /idxParam/),
1268	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(LdStExclusivePair)
1269	DIS_ARMV8_OP( 0x88200000, "stxp", OP_ARMV8_A64_STXP, DISOPTYPE_HARMLESS),
1270	DIS_ARMV8_OP( 0x88208000, "stlxp", OP_ARMV8_A64_STLXP, DISOPTYPE_HARMLESS),
1271	DIS_ARMV8_OP_ALT_DECODE(0x88600000, "ldxp", OP_ARMV8_A64_LDXP, DISOPTYPE_HARMLESS, LdStExclusiveRegLd),
1272	DIS_ARMV8_OP_ALT_DECODE(0x88608000, "ldaxp", OP_ARMV8_A64_LDAXP, DISOPTYPE_HARMLESS, LdStExclusiveRegLd),
1273	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(LdStExclusivePair, 0xbfe08000 /fFixedInsn/,
1274	kDisArmV8OpcDecodeCollate,
1275	/* o0 */ RT_BIT_32(15)
1276	/* L */ \| RT_BIT_32(22), 15);
1277
1278
1279	/* C4.1.94.14 - Loads and Stores - Load exclusive register */
1280	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(LdStExclusiveReg)
1281	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr32, 16, 5, 0 /idxParam/),
1282	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr32, 0, 5, 1 /idxParam/),
1283	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 2 /idxParam/),
1284	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER_ALTERNATIVE(LdStExclusiveRegLd32)
1285	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr32, 0, 5, 0 /idxParam/),
1286	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 1 /idxParam/),
1287	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER_ALTERNATIVE(LdStExclusiveRegLd64)
1288	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr64, 0, 5, 0 /idxParam/),
1289	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 1 /idxParam/),
1290	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER_ALTERNATIVE(LdStExclusiveRegSt64)
1291	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr32, 16, 5, 0 /idxParam/),
1292	DIS_ARMV8_INSN_DECODE(kDisParmParseGprZr64, 0, 5, 1 /idxParam/),
1293	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 2 /idxParam/),
1294	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(LdStExclusiveReg)
1295	DIS_ARMV8_OP( 0x08000000, "stxrb", OP_ARMV8_A64_STXRB, DISOPTYPE_HARMLESS),
1296	DIS_ARMV8_OP( 0x08008000, "stlxrb", OP_ARMV8_A64_STLXRB, DISOPTYPE_HARMLESS),
1297	DIS_ARMV8_OP_ALT_DECODE(0x08400000, "ldxrb", OP_ARMV8_A64_LDXRB, DISOPTYPE_HARMLESS, LdStExclusiveRegLd32),
1298	DIS_ARMV8_OP_ALT_DECODE(0x08408000, "ldaxrb", OP_ARMV8_A64_LDAXRB, DISOPTYPE_HARMLESS, LdStExclusiveRegLd32),
1299	DIS_ARMV8_OP( 0x48000000, "stxrh", OP_ARMV8_A64_STXRH, DISOPTYPE_HARMLESS),
1300	DIS_ARMV8_OP( 0x48008000, "stlxrh", OP_ARMV8_A64_STLXRH, DISOPTYPE_HARMLESS),
1301	DIS_ARMV8_OP_ALT_DECODE(0x48400000, "ldxrh", OP_ARMV8_A64_LDXRH, DISOPTYPE_HARMLESS, LdStExclusiveRegLd32),
1302	DIS_ARMV8_OP_ALT_DECODE(0x48408000, "ldaxrh", OP_ARMV8_A64_LDAXRH, DISOPTYPE_HARMLESS, LdStExclusiveRegLd32),
1303	DIS_ARMV8_OP( 0x88000000, "stxr", OP_ARMV8_A64_STXR, DISOPTYPE_HARMLESS),
1304	DIS_ARMV8_OP( 0x88008000, "stlxr", OP_ARMV8_A64_STLXR, DISOPTYPE_HARMLESS),
1305	DIS_ARMV8_OP_ALT_DECODE(0x88400000, "ldxr", OP_ARMV8_A64_LDXR, DISOPTYPE_HARMLESS, LdStExclusiveRegLd32),
1306	DIS_ARMV8_OP_ALT_DECODE(0x88408000, "ldaxr", OP_ARMV8_A64_LDAXR, DISOPTYPE_HARMLESS, LdStExclusiveRegLd32),
1307	DIS_ARMV8_OP_ALT_DECODE(0xc8000000, "stxr", OP_ARMV8_A64_STXR, DISOPTYPE_HARMLESS, LdStExclusiveRegSt64),
1308	DIS_ARMV8_OP_ALT_DECODE(0xc8008000, "stlxr", OP_ARMV8_A64_STLXR, DISOPTYPE_HARMLESS, LdStExclusiveRegSt64),
1309	DIS_ARMV8_OP_ALT_DECODE(0xc8400000, "ldxr", OP_ARMV8_A64_LDXR, DISOPTYPE_HARMLESS, LdStExclusiveRegLd64),
1310	DIS_ARMV8_OP_ALT_DECODE(0xc8408000, "ldaxr", OP_ARMV8_A64_LDAXR, DISOPTYPE_HARMLESS, LdStExclusiveRegLd64),
1311	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(LdStExclusiveReg, 0xffe08000 /fFixedInsn/,
1312	kDisArmV8OpcDecodeCollate,
1313	/* o0 */ RT_BIT_32(15)
1314	/* L */ \| RT_BIT_32(22)
1315	/* size */ \| RT_BIT_32(30) \| RT_BIT_32(31), 15);
1316
1317
1318	/**
1319	* C4.1.94 - Loads and Stores
1320	*
1321	* Differentiate between Load/Store exclusive register and pair instruction classes based on op2<11> (bit 21).
1322	*/
1323	DIS_ARMV8_DECODE_MAP_DEFINE_BEGIN(LdStExclusive)
1324	DIS_ARMV8_DECODE_MAP_ENTRY(LdStExclusiveReg),
1325	DIS_ARMV8_DECODE_MAP_ENTRY(LdStExclusivePair),
1326	DIS_ARMV8_DECODE_MAP_DEFINE_END_SINGLE_BIT(LdStExclusive, 21);
1327
1328
1329	/**
1330	* C4.1.94 - Loads and Stores
1331	*
1332	* Differentiate between Advanced SIMD load/stores and the rest based on op2<13> (bit 23).
1333	*/
1334	DIS_ARMV8_DECODE_MAP_DEFINE_BEGIN(LdStBit28_1_Bit29_0_Bit26_1)
1335	DIS_ARMV8_DECODE_MAP_ENTRY(LdStExclusive),
1336	DIS_ARMV8_DECODE_MAP_ENTRY(LdStOrdered_Cas),
1337	DIS_ARMV8_DECODE_MAP_DEFINE_END_SINGLE_BIT(LdStBit28_1_Bit29_0_Bit26_1, 23);
1338
1339
1340	/* C4.1.94.2 - Loads and Stores - Advanced SIMD load/store multiple structures */
1341	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(LdStAdvSimdMultStructs)
1342	DIS_ARMV8_INSN_DECODE(kDisParmParseVecRegElemSize, 10, 2, DIS_ARMV8_INSN_PARAM_UNSET),
1343	DIS_ARMV8_INSN_DECODE(kDisParmParseVecQ, 30, 1, DIS_ARMV8_INSN_PARAM_UNSET),
1344	DIS_ARMV8_INSN_DECODE(kDisParmParseVecReg, 0, 5, 0 /idxParam/),
1345	DIS_ARMV8_INSN_DECODE(kDisParmParseVecGrp, 0, 4, 0 /idxParam/),
1346	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 1 /idxParam/),
1347	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER_ALTERNATIVE(LdStAdvSimdMultStructs3)
1348	DIS_ARMV8_INSN_DECODE(kDisParmParseVecRegElemSize, 10, 2, DIS_ARMV8_INSN_PARAM_UNSET),
1349	DIS_ARMV8_INSN_DECODE(kDisParmParseVecQ, 30, 1, DIS_ARMV8_INSN_PARAM_UNSET),
1350	DIS_ARMV8_INSN_DECODE(kDisParmParseVecReg, 0, 5, 0 /idxParam/),
1351	DIS_ARMV8_INSN_DECODE(kDisParmParseVecGrp, 0, 3, 0 /idxParam/),
1352	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 1 /idxParam/),
1353	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER_ALTERNATIVE(LdStAdvSimdMultStructs2)
1354	DIS_ARMV8_INSN_DECODE(kDisParmParseVecRegElemSize, 10, 2, DIS_ARMV8_INSN_PARAM_UNSET),
1355	DIS_ARMV8_INSN_DECODE(kDisParmParseVecQ, 30, 1, DIS_ARMV8_INSN_PARAM_UNSET),
1356	DIS_ARMV8_INSN_DECODE(kDisParmParseVecReg, 0, 5, 0 /idxParam/),
1357	DIS_ARMV8_INSN_DECODE(kDisParmParseVecGrp, 0, 2, 0 /idxParam/),
1358	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 1 /idxParam/),
1359	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER_ALTERNATIVE(LdStAdvSimdMultStructs1)
1360	DIS_ARMV8_INSN_DECODE(kDisParmParseVecRegElemSize, 10, 2, DIS_ARMV8_INSN_PARAM_UNSET),
1361	DIS_ARMV8_INSN_DECODE(kDisParmParseVecQ, 30, 1, DIS_ARMV8_INSN_PARAM_UNSET),
1362	DIS_ARMV8_INSN_DECODE(kDisParmParseVecReg, 0, 5, 0 /idxParam/),
1363	DIS_ARMV8_INSN_DECODE(kDisParmParseVecGrp, 0, 1, 0 /idxParam/),
1364	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 1 /idxParam/),
1365	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(LdStAdvSimdMultStructs)
1366	DIS_ARMV8_OP( 0x0c000000, "st4", OP_ARMV8_A64_ST4, DISOPTYPE_HARMLESS),
1367	INVALID_OPCODE,
1368	DIS_ARMV8_OP( 0x0c002000, "st1", OP_ARMV8_A64_ST1, DISOPTYPE_HARMLESS),
1369	INVALID_OPCODE,
1370	DIS_ARMV8_OP_ALT_DECODE(0x0c004000, "st3", OP_ARMV8_A64_ST3, DISOPTYPE_HARMLESS, LdStAdvSimdMultStructs3),
1371	INVALID_OPCODE,
1372	DIS_ARMV8_OP_ALT_DECODE(0x0c006000, "st1", OP_ARMV8_A64_ST1, DISOPTYPE_HARMLESS, LdStAdvSimdMultStructs3),
1373	DIS_ARMV8_OP_ALT_DECODE(0x0c007000, "st1", OP_ARMV8_A64_ST1, DISOPTYPE_HARMLESS, LdStAdvSimdMultStructs1),
1374	DIS_ARMV8_OP_ALT_DECODE(0x0c008000, "st2", OP_ARMV8_A64_ST2, DISOPTYPE_HARMLESS, LdStAdvSimdMultStructs2),
1375	INVALID_OPCODE,
1376	DIS_ARMV8_OP_ALT_DECODE(0x0c00a000, "st1", OP_ARMV8_A64_ST1, DISOPTYPE_HARMLESS, LdStAdvSimdMultStructs2),
1377	INVALID_OPCODE,
1378	INVALID_OPCODE,
1379	INVALID_OPCODE,
1380	INVALID_OPCODE,
1381	INVALID_OPCODE,
1382	DIS_ARMV8_OP( 0x0c400000, "ld4", OP_ARMV8_A64_LD4, DISOPTYPE_HARMLESS),
1383	INVALID_OPCODE,
1384	DIS_ARMV8_OP( 0x0c402000, "ld1", OP_ARMV8_A64_LD1, DISOPTYPE_HARMLESS),
1385	INVALID_OPCODE,
1386	DIS_ARMV8_OP_ALT_DECODE(0x0c404000, "ld3", OP_ARMV8_A64_LD3, DISOPTYPE_HARMLESS, LdStAdvSimdMultStructs3),
1387	INVALID_OPCODE,
1388	DIS_ARMV8_OP_ALT_DECODE(0x0c406000, "ld1", OP_ARMV8_A64_LD1, DISOPTYPE_HARMLESS, LdStAdvSimdMultStructs3),
1389	DIS_ARMV8_OP_ALT_DECODE(0x0c407000, "ld1", OP_ARMV8_A64_LD1, DISOPTYPE_HARMLESS, LdStAdvSimdMultStructs1),
1390	DIS_ARMV8_OP_ALT_DECODE(0x0c408000, "ld2", OP_ARMV8_A64_LD2, DISOPTYPE_HARMLESS, LdStAdvSimdMultStructs2),
1391	INVALID_OPCODE,
1392	DIS_ARMV8_OP_ALT_DECODE(0x0c40a000, "ld1", OP_ARMV8_A64_LD1, DISOPTYPE_HARMLESS, LdStAdvSimdMultStructs2),
1393	/* Rest is invalid */
1394	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(LdStAdvSimdMultStructs, 0xbffff000 /fFixedInsn/,
1395	kDisArmV8OpcDecodeCollate,
1396	/* opcode */ RT_BIT_32(12) \| RT_BIT_32(13) \| RT_BIT_32(14) \| RT_BIT_32(15)
1397	/* L */ \| RT_BIT_32(22), 12);
1398
1399
1400	/* C4.1.94.3 - Loads and Stores - Advanced SIMD load/store multiple structures (post-indexed), register variant. */
1401	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(LdStAdvSimdMultStructsPostIndexGpr)
1402	DIS_ARMV8_INSN_DECODE(kDisParmParseVecRegElemSize, 10, 2, DIS_ARMV8_INSN_PARAM_UNSET),
1403	DIS_ARMV8_INSN_DECODE(kDisParmParseVecQ, 30, 1, DIS_ARMV8_INSN_PARAM_UNSET),
1404	DIS_ARMV8_INSN_DECODE(kDisParmParseVecReg, 0, 5, 0 /idxParam/),
1405	DIS_ARMV8_INSN_DECODE(kDisParmParseVecGrp, 0, 4, 0 /idxParam/),
1406	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 1 /idxParam/),
1407	DIS_ARMV8_INSN_DECODE(kDisParmParseGprOff, 16, 5, 1 /idxParam/),
1408	DIS_ARMV8_INSN_DECODE(kDisParmParseSetPostIndexed, 0, 0, 1 /idxParam/),
1409	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER_ALTERNATIVE(LdStAdvSimdMultStructsPostIndexGpr3)
1410	DIS_ARMV8_INSN_DECODE(kDisParmParseVecRegElemSize, 10, 2, DIS_ARMV8_INSN_PARAM_UNSET),
1411	DIS_ARMV8_INSN_DECODE(kDisParmParseVecQ, 30, 1, DIS_ARMV8_INSN_PARAM_UNSET),
1412	DIS_ARMV8_INSN_DECODE(kDisParmParseVecReg, 0, 5, 0 /idxParam/),
1413	DIS_ARMV8_INSN_DECODE(kDisParmParseVecGrp, 0, 3, 0 /idxParam/),
1414	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 1 /idxParam/),
1415	DIS_ARMV8_INSN_DECODE(kDisParmParseGprOff, 16, 5, 1 /idxParam/),
1416	DIS_ARMV8_INSN_DECODE(kDisParmParseSetPostIndexed, 0, 0, 1 /idxParam/),
1417	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER_ALTERNATIVE(LdStAdvSimdMultStructsPostIndexGpr2)
1418	DIS_ARMV8_INSN_DECODE(kDisParmParseVecRegElemSize, 10, 2, DIS_ARMV8_INSN_PARAM_UNSET),
1419	DIS_ARMV8_INSN_DECODE(kDisParmParseVecQ, 30, 1, DIS_ARMV8_INSN_PARAM_UNSET),
1420	DIS_ARMV8_INSN_DECODE(kDisParmParseVecReg, 0, 5, 0 /idxParam/),
1421	DIS_ARMV8_INSN_DECODE(kDisParmParseVecGrp, 0, 2, 0 /idxParam/),
1422	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 1 /idxParam/),
1423	DIS_ARMV8_INSN_DECODE(kDisParmParseGprOff, 16, 5, 1 /idxParam/),
1424	DIS_ARMV8_INSN_DECODE(kDisParmParseSetPostIndexed, 0, 0, 1 /idxParam/),
1425	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER_ALTERNATIVE(LdStAdvSimdMultStructsPostIndexGpr1)
1426	DIS_ARMV8_INSN_DECODE(kDisParmParseVecRegElemSize, 10, 2, DIS_ARMV8_INSN_PARAM_UNSET),
1427	DIS_ARMV8_INSN_DECODE(kDisParmParseVecQ, 30, 1, DIS_ARMV8_INSN_PARAM_UNSET),
1428	DIS_ARMV8_INSN_DECODE(kDisParmParseVecReg, 0, 5, 0 /idxParam/),
1429	DIS_ARMV8_INSN_DECODE(kDisParmParseVecGrp, 0, 1, 0 /idxParam/),
1430	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 1 /idxParam/),
1431	DIS_ARMV8_INSN_DECODE(kDisParmParseGprOff, 16, 5, 1 /idxParam/),
1432	DIS_ARMV8_INSN_DECODE(kDisParmParseSetPostIndexed, 0, 0, 1 /idxParam/),
1433	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(LdStAdvSimdMultStructsPostIndexGpr)
1434	DIS_ARMV8_OP( 0x0c800000, "st4", OP_ARMV8_A64_ST4, DISOPTYPE_HARMLESS),
1435	INVALID_OPCODE,
1436	DIS_ARMV8_OP( 0x0c802000, "st1", OP_ARMV8_A64_ST1, DISOPTYPE_HARMLESS),
1437	INVALID_OPCODE,
1438	DIS_ARMV8_OP_ALT_DECODE(0x0c804000, "st3", OP_ARMV8_A64_ST3, DISOPTYPE_HARMLESS, LdStAdvSimdMultStructsPostIndexGpr3),
1439	INVALID_OPCODE,
1440	DIS_ARMV8_OP_ALT_DECODE(0x0c806000, "st1", OP_ARMV8_A64_ST1, DISOPTYPE_HARMLESS, LdStAdvSimdMultStructsPostIndexGpr3),
1441	DIS_ARMV8_OP_ALT_DECODE(0x0c807000, "st1", OP_ARMV8_A64_ST1, DISOPTYPE_HARMLESS, LdStAdvSimdMultStructsPostIndexGpr1),
1442	DIS_ARMV8_OP_ALT_DECODE(0x0c808000, "st2", OP_ARMV8_A64_ST2, DISOPTYPE_HARMLESS, LdStAdvSimdMultStructsPostIndexGpr2),
1443	INVALID_OPCODE,
1444	DIS_ARMV8_OP_ALT_DECODE(0x0c80a000, "st1", OP_ARMV8_A64_ST1, DISOPTYPE_HARMLESS, LdStAdvSimdMultStructsPostIndexGpr2),
1445	INVALID_OPCODE,
1446	INVALID_OPCODE,
1447	INVALID_OPCODE,
1448	INVALID_OPCODE,
1449	INVALID_OPCODE,
1450	DIS_ARMV8_OP( 0x0cc00000, "ld4", OP_ARMV8_A64_LD4, DISOPTYPE_HARMLESS),
1451	INVALID_OPCODE,
1452	DIS_ARMV8_OP( 0x0cc02000, "ld1", OP_ARMV8_A64_LD1, DISOPTYPE_HARMLESS),
1453	INVALID_OPCODE,
1454	DIS_ARMV8_OP_ALT_DECODE(0x0cc04000, "ld3", OP_ARMV8_A64_LD3, DISOPTYPE_HARMLESS, LdStAdvSimdMultStructsPostIndexGpr3),
1455	INVALID_OPCODE,
1456	DIS_ARMV8_OP_ALT_DECODE(0x0cc06000, "ld1", OP_ARMV8_A64_LD1, DISOPTYPE_HARMLESS, LdStAdvSimdMultStructsPostIndexGpr3),
1457	DIS_ARMV8_OP_ALT_DECODE(0x0cc07000, "ld1", OP_ARMV8_A64_LD1, DISOPTYPE_HARMLESS, LdStAdvSimdMultStructsPostIndexGpr1),
1458	DIS_ARMV8_OP_ALT_DECODE(0x0cc08000, "ld2", OP_ARMV8_A64_LD2, DISOPTYPE_HARMLESS, LdStAdvSimdMultStructsPostIndexGpr2),
1459	INVALID_OPCODE,
1460	DIS_ARMV8_OP_ALT_DECODE(0x0cc0a000, "ld1", OP_ARMV8_A64_LD1, DISOPTYPE_HARMLESS, LdStAdvSimdMultStructsPostIndexGpr2),
1461	/* Rest is invalid */
1462	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(LdStAdvSimdMultStructsPostIndexGpr, 0xbfe0f000 /fFixedInsn/,
1463	kDisArmV8OpcDecodeCollate,
1464	/* opcode */ RT_BIT_32(12) \| RT_BIT_32(13) \| RT_BIT_32(14) \| RT_BIT_32(15)
1465	/* L */ \| RT_BIT_32(22), 12);
1466
1467
1468	/* C4.1.94.3 - Loads and Stores - Advanced SIMD load/store multiple structures (post-indexed), register variant. */
1469	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER(LdStAdvSimdMultStructsPostIndexImm)
1470	DIS_ARMV8_INSN_DECODE(kDisParmParseVecRegElemSize, 10, 2, DIS_ARMV8_INSN_PARAM_UNSET),
1471	DIS_ARMV8_INSN_DECODE(kDisParmParseVecQ, 30, 1, DIS_ARMV8_INSN_PARAM_UNSET),
1472	DIS_ARMV8_INSN_DECODE(kDisParmParseVecReg, 0, 5, 0 /idxParam/),
1473	DIS_ARMV8_INSN_DECODE(kDisParmParseVecGrp, 0, 4, 0 /idxParam/),
1474	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 1 /idxParam/),
1475	DIS_ARMV8_INSN_DECODE(kDisParmParseSimdLdStPostIndexImm, 32, 64, 1 /idxParam/),
1476	DIS_ARMV8_INSN_DECODE(kDisParmParseSetPostIndexed, 0, 0, 1 /idxParam/),
1477	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER_ALTERNATIVE(LdStAdvSimdMultStructsPostIndexImm3)
1478	DIS_ARMV8_INSN_DECODE(kDisParmParseVecRegElemSize, 10, 2, DIS_ARMV8_INSN_PARAM_UNSET),
1479	DIS_ARMV8_INSN_DECODE(kDisParmParseVecQ, 30, 1, DIS_ARMV8_INSN_PARAM_UNSET),
1480	DIS_ARMV8_INSN_DECODE(kDisParmParseVecReg, 0, 5, 0 /idxParam/),
1481	DIS_ARMV8_INSN_DECODE(kDisParmParseVecGrp, 0, 3, 0 /idxParam/),
1482	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 1 /idxParam/),
1483	DIS_ARMV8_INSN_DECODE(kDisParmParseSimdLdStPostIndexImm, 24, 48, 1 /idxParam/),
1484	DIS_ARMV8_INSN_DECODE(kDisParmParseSetPostIndexed, 0, 0, 1 /idxParam/),
1485	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER_ALTERNATIVE(LdStAdvSimdMultStructsPostIndexImm2)
1486	DIS_ARMV8_INSN_DECODE(kDisParmParseVecRegElemSize, 10, 2, DIS_ARMV8_INSN_PARAM_UNSET),
1487	DIS_ARMV8_INSN_DECODE(kDisParmParseVecQ, 30, 1, DIS_ARMV8_INSN_PARAM_UNSET),
1488	DIS_ARMV8_INSN_DECODE(kDisParmParseVecReg, 0, 5, 0 /idxParam/),
1489	DIS_ARMV8_INSN_DECODE(kDisParmParseVecGrp, 0, 2, 0 /idxParam/),
1490	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 1 /idxParam/),
1491	DIS_ARMV8_INSN_DECODE(kDisParmParseSimdLdStPostIndexImm, 16, 32, 1 /idxParam/),
1492	DIS_ARMV8_INSN_DECODE(kDisParmParseSetPostIndexed, 0, 0, 1 /idxParam/),
1493	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_DECODER_ALTERNATIVE(LdStAdvSimdMultStructsPostIndexImm1)
1494	DIS_ARMV8_INSN_DECODE(kDisParmParseVecRegElemSize, 10, 2, DIS_ARMV8_INSN_PARAM_UNSET),
1495	DIS_ARMV8_INSN_DECODE(kDisParmParseVecQ, 30, 1, DIS_ARMV8_INSN_PARAM_UNSET),
1496	DIS_ARMV8_INSN_DECODE(kDisParmParseVecReg, 0, 5, 0 /idxParam/),
1497	DIS_ARMV8_INSN_DECODE(kDisParmParseVecGrp, 0, 1, 0 /idxParam/),
1498	DIS_ARMV8_INSN_DECODE(kDisParmParseAddrGprSp, 5, 5, 1 /idxParam/),
1499	DIS_ARMV8_INSN_DECODE(kDisParmParseSimdLdStPostIndexImm, 8, 16, 1 /idxParam/),
1500	DIS_ARMV8_INSN_DECODE(kDisParmParseSetPostIndexed, 0, 0, 1 /idxParam/),
1501	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_BEGIN(LdStAdvSimdMultStructsPostIndexImm)
1502	DIS_ARMV8_OP( 0x0c9f0000, "st4", OP_ARMV8_A64_ST4, DISOPTYPE_HARMLESS),
1503	INVALID_OPCODE,
1504	DIS_ARMV8_OP( 0x0c9f2000, "st1", OP_ARMV8_A64_ST1, DISOPTYPE_HARMLESS),
1505	INVALID_OPCODE,
1506	DIS_ARMV8_OP_ALT_DECODE(0x0c9f4000, "st3", OP_ARMV8_A64_ST3, DISOPTYPE_HARMLESS, LdStAdvSimdMultStructsPostIndexImm3),
1507	INVALID_OPCODE,
1508	DIS_ARMV8_OP_ALT_DECODE(0x0c9f6000, "st1", OP_ARMV8_A64_ST1, DISOPTYPE_HARMLESS, LdStAdvSimdMultStructsPostIndexImm3),
1509	DIS_ARMV8_OP_ALT_DECODE(0x0c9f7000, "st1", OP_ARMV8_A64_ST1, DISOPTYPE_HARMLESS, LdStAdvSimdMultStructsPostIndexImm1),
1510	DIS_ARMV8_OP_ALT_DECODE(0x0c9f8000, "st2", OP_ARMV8_A64_ST2, DISOPTYPE_HARMLESS, LdStAdvSimdMultStructsPostIndexImm2),
1511	INVALID_OPCODE,
1512	DIS_ARMV8_OP_ALT_DECODE(0x0c9fa000, "st1", OP_ARMV8_A64_ST1, DISOPTYPE_HARMLESS, LdStAdvSimdMultStructsPostIndexImm2),
1513	INVALID_OPCODE,
1514	INVALID_OPCODE,
1515	INVALID_OPCODE,
1516	INVALID_OPCODE,
1517	INVALID_OPCODE,
1518	DIS_ARMV8_OP( 0x0cdf0000, "ld4", OP_ARMV8_A64_LD4, DISOPTYPE_HARMLESS),
1519	INVALID_OPCODE,
1520	DIS_ARMV8_OP( 0x0cdf2000, "ld1", OP_ARMV8_A64_LD1, DISOPTYPE_HARMLESS),
1521	INVALID_OPCODE,
1522	DIS_ARMV8_OP_ALT_DECODE(0x0cdf4000, "ld3", OP_ARMV8_A64_LD3, DISOPTYPE_HARMLESS, LdStAdvSimdMultStructsPostIndexImm3),
1523	INVALID_OPCODE,
1524	DIS_ARMV8_OP_ALT_DECODE(0x0cdf6000, "ld1", OP_ARMV8_A64_LD1, DISOPTYPE_HARMLESS, LdStAdvSimdMultStructsPostIndexImm3),
1525	DIS_ARMV8_OP_ALT_DECODE(0x0cdf7000, "ld1", OP_ARMV8_A64_LD1, DISOPTYPE_HARMLESS, LdStAdvSimdMultStructsPostIndexImm1),
1526	DIS_ARMV8_OP_ALT_DECODE(0x0cdf8000, "ld2", OP_ARMV8_A64_LD2, DISOPTYPE_HARMLESS, LdStAdvSimdMultStructsPostIndexImm2),
1527	INVALID_OPCODE,
1528	DIS_ARMV8_OP_ALT_DECODE(0x0cdfa000, "ld1", OP_ARMV8_A64_LD1, DISOPTYPE_HARMLESS, LdStAdvSimdMultStructsPostIndexImm2),
1529	/* Rest is invalid */
1530	DIS_ARMV8_DECODE_INSN_CLASS_DEFINE_END(LdStAdvSimdMultStructsPostIndexImm, 0xbffff000 /fFixedInsn/,
1531	kDisArmV8OpcDecodeCollate,
1532	/* opcode */ RT_BIT_32(12) \| RT_BIT_32(13) \| RT_BIT_32(14) \| RT_BIT_32(15)
1533	/* L */ \| RT_BIT_32(22), 12);
1534
1535
1536	/**
1537	* C4.1.94.3 - Loads and Stores - Advanced SIMD load/store multiple structures (post-indexed).
1538	*
1539	* Differentiate between the register and immediate offset variant (based on Rm).
1540	*/
1541	DIS_ARMV8_DECODE_MAP_DEFINE_BEGIN(LdStAdvSimdMultStructsPostIndex)
1542	DIS_ARMV8_DECODE_MAP_ENTRY(LdStAdvSimdMultStructsPostIndexGpr),
1543	DIS_ARMV8_DECODE_MAP_ENTRY(LdStAdvSimdMultStructsPostIndexGpr),
1544	DIS_ARMV8_DECODE_MAP_ENTRY(LdStAdvSimdMultStructsPostIndexGpr),
1545	DIS_ARMV8_DECODE_MAP_ENTRY(LdStAdvSimdMultStructsPostIndexGpr),
1546	DIS_ARMV8_DECODE_MAP_ENTRY(LdStAdvSimdMultStructsPostIndexGpr),
1547	DIS_ARMV8_DECODE_MAP_ENTRY(LdStAdvSimdMultStructsPostIndexGpr),
1548	DIS_ARMV8_DECODE_MAP_ENTRY(LdStAdvSimdMultStructsPostIndexGpr),
1549	DIS_ARMV8_DECODE_MAP_ENTRY(LdStAdvSimdMultStructsPostIndexGpr),
1550	DIS_ARMV8_DECODE_MAP_ENTRY(LdStAdvSimdMultStructsPostIndexGpr),
1551	DIS_ARMV8_DECODE_MAP_ENTRY(LdStAdvSimdMultStructsPostIndexGpr),
1552	DIS_ARMV8_DECODE_MAP_ENTRY(LdStAdvSimdMultStructsPostIndexGpr),
1553	DIS_ARMV8_DECODE_MAP_ENTRY(LdStAdvSimdMultStructsPostIndexGpr),
1554	DIS_ARMV8_DECODE_MAP_ENTRY(LdStAdvSimdMultStructsPostIndexGpr),
1555	DIS_ARMV8_DECODE_MAP_ENTRY(LdStAdvSimdMultStructsPostIndexGpr),
1556	DIS_ARMV8_DECODE_MAP_ENTRY(LdStAdvSimdMultStructsPostIndexGpr),
1557	DIS_ARMV8_DECODE_MAP_ENTRY(LdStAdvSimdMultStructsPostIndexGpr),
1558	DIS_ARMV8_DECODE_MAP_ENTRY(LdStAdvSimdMultStructsPostIndexGpr),
1559	DIS_ARMV8_DECODE_MAP_ENTRY(LdStAdvSimdMultStructsPostIndexGpr),
1560	DIS_ARMV8_DECODE_MAP_ENTRY(LdStAdvSimdMultStructsPostIndexGpr),
1561	DIS_ARMV8_DECODE_MAP_ENTRY(LdStAdvSimdMultStructsPostIndexGpr),
1562	DIS_ARMV8_DECODE_MAP_ENTRY(LdStAdvSimdMultStructsPostIndexGpr),
1563	DIS_ARMV8_DECODE_MAP_ENTRY(LdStAdvSimdMultStructsPostIndexGpr),
1564	DIS_ARMV8_DECODE_MAP_ENTRY(LdStAdvSimdMultStructsPostIndexGpr),
1565	DIS_ARMV8_DECODE_MAP_ENTRY(LdStAdvSimdMultStructsPostIndexGpr),
1566	DIS_ARMV8_DECODE_MAP_ENTRY(LdStAdvSimdMultStructsPostIndexGpr),
1567	DIS_ARMV8_DECODE_MAP_ENTRY(LdStAdvSimdMultStructsPostIndexGpr),
1568	DIS_ARMV8_DECODE_MAP_ENTRY(LdStAdvSimdMultStructsPostIndexGpr),
1569	DIS_ARMV8_DECODE_MAP_ENTRY(LdStAdvSimdMultStructsPostIndexGpr),
1570	DIS_ARMV8_DECODE_MAP_ENTRY(LdStAdvSimdMultStructsPostIndexGpr),
1571	DIS_ARMV8_DECODE_MAP_ENTRY(LdStAdvSimdMultStructsPostIndexGpr),
1572	DIS_ARMV8_DECODE_MAP_ENTRY(LdStAdvSimdMultStructsPostIndexGpr),
1573	DIS_ARMV8_DECODE_MAP_ENTRY(LdStAdvSimdMultStructsPostIndexImm), /* Rm == 11111 (xzr) will be treated as immediate offset encoding. */
1574	DIS_ARMV8_DECODE_MAP_DEFINE_END(LdStAdvSimdMultStructsPostIndex,
1575	RT_BIT_32(16) \| RT_BIT_32(17) \| RT_BIT_32(18) \| RT_BIT_32(19) \| RT_BIT_32(20),
1576	16);
1577
1578
1579	/**
1580	* C4.1.94 - Loads and Stores
1581	*
1582	* Differentiate between the Advanced SIMD load/stores.
1583	*/
1584	DIS_ARMV8_DECODE_MAP_DEFINE_BEGIN(LdStAdvSimd)
1585	DIS_ARMV8_DECODE_MAP_ENTRY(LdStAdvSimdMultStructs),
1586	DIS_ARMV8_DECODE_MAP_ENTRY(LdStAdvSimdMultStructsPostIndex),
1587	DIS_ARMV8_DECODE_MAP_INVALID_ENTRY, /** @todo Advanced SIMD load/store single structure */
1588	DIS_ARMV8_DECODE_MAP_INVALID_ENTRY, /** @todo Advanced SIMD load/store single structure (post-indexed) */
1589	DIS_ARMV8_DECODE_MAP_DEFINE_END(LdStAdvSimd, RT_BIT_32(23) \| RT_BIT_32(24), 23);
1590
1591
1592	/**
1593	* C4.1.94 - Loads and Stores
1594	*
1595	* Differentiate between Advanced SIMD load/stores and the rest based on op1 (bit 26).
1596	*/
1597	DIS_ARMV8_DECODE_MAP_DEFINE_BEGIN(LdStBit28_0_Bit29_0)
1598	DIS_ARMV8_DECODE_MAP_ENTRY(LdStBit28_1_Bit29_0_Bit26_1),
1599	DIS_ARMV8_DECODE_MAP_ENTRY(LdStAdvSimd),
1600	DIS_ARMV8_DECODE_MAP_DEFINE_END_SINGLE_BIT(LdStBit28_0_Bit29_0, 26);
1601
1602
1603	/*
1604	* C4.1.94 - Loads and Stores
1605	*
1606	* Differentiate further based on the op0<1:0> field.
1607	* Splitting this up because the decoding would get insane otherwise with tables doing cross referencing...
1608	*
1609	* Bit 29 28
1610	* +-------------------------------------------
1611	* 0 0 Compare and swap pair / Advanced SIMD loads/stores / Load/store exclusive pair / Load/store exclusive register
1612	* Load/store ordered / Compare and swap
1613	* 0 1 RCW compare and swap / 128-bit atomic memory instructions / GCS load/store / Load/store memory tags /
1614	* LDIAPP/STILP / LDAPR/STLR / Load register (literal) / Memory Copy and Set
1615	* 1 0 Load/store no-allocate pair / Load/store register pair /
1616	* 1 1 Load/store register / Atomic memory operations
1617	*/
1618	DIS_ARMV8_DECODE_MAP_DEFINE_BEGIN(LdStOp0Lo)
1619	DIS_ARMV8_DECODE_MAP_ENTRY(LdStBit28_0_Bit29_0),
1620	DIS_ARMV8_DECODE_MAP_ENTRY(LdStBit28_1_Bit29_0),
1621	DIS_ARMV8_DECODE_MAP_ENTRY(LdStRegPair),
1622	DIS_ARMV8_DECODE_MAP_ENTRY(LdStReg),
1623	DIS_ARMV8_DECODE_MAP_DEFINE_END(LdStOp0Lo, RT_BIT_32(28) \| RT_BIT_32(29), 28);

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source: vbox/trunk/src/VBox/Disassembler/DisasmTables-armv8-a64-ld-st.cpp.h@ 107044

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