VirtualBox

source: vbox/trunk/src/VBox/Disassembler/DisasmCore.cpp@ 8933

Last change on this file since 8933 was 8493, checked in by vboxsync, 17 years ago

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1/** @file
2 *
3 * VBox disassembler:
4 * Core components
5 */
6
7/*
8 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
9 *
10 * This file is part of VirtualBox Open Source Edition (OSE), as
11 * available from http://www.virtualbox.org. This file is free software;
12 * you can redistribute it and/or modify it under the terms of the GNU
13 * General Public License (GPL) as published by the Free Software
14 * Foundation, in version 2 as it comes in the "COPYING" file of the
15 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
16 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
17 *
18 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
19 * Clara, CA 95054 USA or visit http://www.sun.com if you need
20 * additional information or have any questions.
21 */
22
23
24/*******************************************************************************
25* Header Files *
26*******************************************************************************/
27#define LOG_GROUP LOG_GROUP_DIS
28#ifdef USING_VISUAL_STUDIO
29# include <stdafx.h>
30#endif
31
32#include <VBox/dis.h>
33#include <VBox/disopcode.h>
34#include <VBox/cpum.h>
35#include <VBox/err.h>
36#include <VBox/log.h>
37#include <iprt/assert.h>
38#include <iprt/string.h>
39#include <iprt/stdarg.h>
40#include "DisasmInternal.h"
41#include "DisasmTables.h"
42
43#if !defined(DIS_CORE_ONLY) && defined(LOG_ENABLED)
44# include <stdlib.h>
45# include <stdio.h>
46#endif
47
48
49/*******************************************************************************
50* Internal Functions *
51*******************************************************************************/
52static int disCoreOne(PDISCPUSTATE pCpu, RTUINTPTR InstructionAddr, unsigned *pcbInstruction);
53#if !defined(DIS_CORE_ONLY) && defined(LOG_ENABLED)
54static void disasmAddString(char *psz, const char *pszString);
55static void disasmAddStringF(char *psz, uint32_t cbString, const char *pszFormat, ...);
56static void disasmAddChar(char *psz, char ch);
57#else
58# define disasmAddString(psz, pszString) do {} while (0)
59# ifdef _MSC_VER
60# define disasmAddStringF __noop
61# else
62# define disasmAddStringF(psz, cbString, pszFormat...) do {} while (0) /* Arg wanna get rid of that warning */
63# endif
64# define disasmAddChar(psz, ch) do {} while (0)
65#endif
66
67static unsigned QueryModRM(RTUINTPTR pu8CodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu, unsigned *pSibInc = NULL);
68static unsigned QueryModRM_SizeOnly(RTUINTPTR pu8CodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu, unsigned *pSibInc = NULL);
69static void UseSIB(RTUINTPTR pu8CodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu);
70static unsigned ParseSIB_SizeOnly(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu);
71
72/*******************************************************************************
73* Global Variables *
74*******************************************************************************/
75
76PFNDISPARSE pfnFullDisasm[IDX_ParseMax] =
77{
78 ParseIllegal,
79 ParseModRM,
80 UseModRM,
81 ParseImmByte,
82 ParseImmBRel,
83 ParseImmUshort,
84 ParseImmV,
85 ParseImmVRel,
86 ParseImmAddr,
87 ParseFixedReg,
88 ParseImmUlong,
89 ParseImmQword,
90 ParseTwoByteEsc,
91 ParseImmGrpl,
92 ParseShiftGrp2,
93 ParseGrp3,
94 ParseGrp4,
95 ParseGrp5,
96 Parse3DNow,
97 ParseGrp6,
98 ParseGrp7,
99 ParseGrp8,
100 ParseGrp9,
101 ParseGrp10,
102 ParseGrp12,
103 ParseGrp13,
104 ParseGrp14,
105 ParseGrp15,
106 ParseGrp16,
107 ParseModFence,
108 ParseYv,
109 ParseYb,
110 ParseXv,
111 ParseXb,
112 ParseEscFP,
113 ParseNopPause,
114 ParseImmByteSX
115};
116
117PFNDISPARSE pfnCalcSize[IDX_ParseMax] =
118{
119 ParseIllegal,
120 ParseModRM_SizeOnly,
121 UseModRM,
122 ParseImmByte_SizeOnly,
123 ParseImmBRel_SizeOnly,
124 ParseImmUshort_SizeOnly,
125 ParseImmV_SizeOnly,
126 ParseImmVRel_SizeOnly,
127 ParseImmAddr_SizeOnly,
128 ParseFixedReg,
129 ParseImmUlong_SizeOnly,
130 ParseImmQword_SizeOnly,
131 ParseTwoByteEsc,
132 ParseImmGrpl,
133 ParseShiftGrp2,
134 ParseGrp3,
135 ParseGrp4,
136 ParseGrp5,
137 Parse3DNow,
138 ParseGrp6,
139 ParseGrp7,
140 ParseGrp8,
141 ParseGrp9,
142 ParseGrp10,
143 ParseGrp12,
144 ParseGrp13,
145 ParseGrp14,
146 ParseGrp15,
147 ParseGrp16,
148 ParseModFence,
149 ParseYv,
150 ParseYb,
151 ParseXv,
152 ParseXb,
153 ParseEscFP,
154 ParseNopPause,
155 ParseImmByteSX_SizeOnly
156};
157
158/**
159 * Parses one instruction.
160 * The result is found in pCpu.
161 *
162 * @returns Success indicator.
163 * @param pCpu Pointer to cpu structure which has DISCPUSTATE::mode set correctly.
164 * @param InstructionAddr Pointer to the instruction to parse.
165 * @param pcbInstruction Where to store the size of the instruction.
166 * NULL is allowed.
167 */
168DISDECL(int) DISCoreOne(PDISCPUSTATE pCpu, RTUINTPTR InstructionAddr, unsigned *pcbInstruction)
169{
170 /*
171 * Reset instruction settings
172 */
173 pCpu->prefix = PREFIX_NONE;
174 pCpu->prefix_seg = 0;
175 pCpu->lastprefix = 0;
176 pCpu->ModRM.u = 0;
177 pCpu->SIB.u = 0;
178 pCpu->param1.parval = 0;
179 pCpu->param2.parval = 0;
180 pCpu->param3.parval = 0;
181 pCpu->param1.szParam[0] = '\0';
182 pCpu->param2.szParam[0] = '\0';
183 pCpu->param3.szParam[0] = '\0';
184 pCpu->param1.flags = 0;
185 pCpu->param2.flags = 0;
186 pCpu->param3.flags = 0;
187 pCpu->param1.size = 0;
188 pCpu->param2.size = 0;
189 pCpu->param3.size = 0;
190 pCpu->pfnReadBytes = 0;
191 pCpu->uFilter = OPTYPE_ALL;
192 pCpu->pfnDisasmFnTable = pfnFullDisasm;
193
194 return VBOX_SUCCESS(disCoreOne(pCpu, InstructionAddr, pcbInstruction));
195}
196
197/**
198 * Parses one guest instruction.
199 * The result is found in pCpu and pcbInstruction.
200 *
201 * @returns VBox status code.
202 * @param InstructionAddr Address of the instruction to decode. What this means
203 * is left to the pfnReadBytes function.
204 * @param enmCpuMode The CPU mode. CPUMODE_32BIT, CPUMODE_16BIT, or CPUMODE_64BIT.
205 * @param pfnReadBytes Callback for reading instruction bytes.
206 * @param pvUser User argument for the instruction reader. (Ends up in apvUserData[0].)
207 * @param pCpu Pointer to cpu structure. Will be initialized.
208 * @param pcbInstruction Where to store the size of the instruction.
209 * NULL is allowed.
210 */
211DISDECL(int) DISCoreOneEx(RTUINTPTR InstructionAddr, DISCPUMODE enmCpuMode, PFN_DIS_READBYTES pfnReadBytes, void *pvUser,
212 PDISCPUSTATE pCpu, unsigned *pcbInstruction)
213{
214 /*
215 * Reset instruction settings
216 */
217 pCpu->prefix = PREFIX_NONE;
218 pCpu->prefix_seg = 0;
219 pCpu->lastprefix = 0;
220 pCpu->mode = enmCpuMode;
221 pCpu->ModRM.u = 0;
222 pCpu->SIB.u = 0;
223 pCpu->param1.parval = 0;
224 pCpu->param2.parval = 0;
225 pCpu->param3.parval = 0;
226 pCpu->param1.szParam[0] = '\0';
227 pCpu->param2.szParam[0] = '\0';
228 pCpu->param3.szParam[0] = '\0';
229 pCpu->param1.flags = 0;
230 pCpu->param2.flags = 0;
231 pCpu->param3.flags = 0;
232 pCpu->param1.size = 0;
233 pCpu->param2.size = 0;
234 pCpu->param3.size = 0;
235 pCpu->pfnReadBytes = pfnReadBytes;
236 pCpu->apvUserData[0] = pvUser;
237 pCpu->uFilter = OPTYPE_ALL;
238 pCpu->pfnDisasmFnTable = pfnFullDisasm;
239
240 return disCoreOne(pCpu, InstructionAddr, pcbInstruction);
241}
242
243/**
244 * Internal worker for DISCoreOne and DISCoreOneEx.
245 *
246 * @returns VBox status code.
247 * @param pCpu Initialized cpu state.
248 * @param InstructionAddr Instruction address.
249 * @param pcbInstruction Where to store the instruction size. Can be NULL.
250 */
251static int disCoreOne(PDISCPUSTATE pCpu, RTUINTPTR InstructionAddr, unsigned *pcbInstruction)
252{
253 const OPCODE *paOneByteMap;
254
255 /*
256 * Parse byte by byte.
257 */
258 unsigned iByte = 0;
259 unsigned cbInc;
260
261 if (pCpu->mode == CPUMODE_64BIT)
262 {
263 paOneByteMap = g_aOneByteMapX64;
264 pCpu->addrmode = CPUMODE_64BIT;
265 pCpu->opmode = CPUMODE_32BIT;
266 }
267 else
268 {
269 paOneByteMap = g_aOneByteMapX86;
270 pCpu->addrmode = pCpu->mode;
271 pCpu->opmode = pCpu->mode;
272 }
273
274 while(1)
275 {
276 uint8_t codebyte = DISReadByte(pCpu, InstructionAddr+iByte);
277 uint8_t opcode = paOneByteMap[codebyte].opcode;
278
279 /* Hardcoded assumption about OP_* values!! */
280 if (opcode <= OP_LAST_PREFIX)
281 {
282 /* The REX prefix must precede the opcode byte(s). Any other placement is ignored. */
283 if (opcode != OP_REX)
284 {
285 /** Last prefix byte (for SSE2 extension tables); don't include the REX prefix */
286 pCpu->lastprefix = opcode;
287 pCpu->prefix &= ~PREFIX_REX;
288 }
289
290 switch (opcode)
291 {
292 case OP_INVALID:
293 AssertMsgFailed(("Invalid opcode!!\n"));
294 return VERR_GENERAL_FAILURE; /** @todo better error code. */
295
296 // segment override prefix byte
297 case OP_SEG:
298 pCpu->prefix_seg = paOneByteMap[codebyte].param1 - OP_PARM_REG_SEG_START;
299 /* Segment prefixes for CS, DS, ES and SS are ignored in long mode. */
300 if ( pCpu->mode != CPUMODE_64BIT
301 || pCpu->prefix_seg >= OP_PARM_REG_FS)
302 {
303 pCpu->prefix |= PREFIX_SEG;
304 }
305 iByte += sizeof(uint8_t);
306 continue; //fetch the next byte
307
308 // lock prefix byte
309 case OP_LOCK:
310 pCpu->prefix |= PREFIX_LOCK;
311 iByte += sizeof(uint8_t);
312 continue; //fetch the next byte
313
314 // address size override prefix byte
315 case OP_ADDRSIZE:
316 pCpu->prefix |= PREFIX_ADDRSIZE;
317 if (pCpu->mode == CPUMODE_16BIT)
318 pCpu->addrmode = CPUMODE_32BIT;
319 else
320 if (pCpu->mode == CPUMODE_32BIT)
321 pCpu->addrmode = CPUMODE_16BIT;
322 else
323 pCpu->addrmode = CPUMODE_32BIT; /* 64 bits */
324
325 iByte += sizeof(uint8_t);
326 continue; //fetch the next byte
327
328 // operand size override prefix byte
329 case OP_OPSIZE:
330 pCpu->prefix |= PREFIX_OPSIZE;
331 if (pCpu->mode == CPUMODE_16BIT)
332 pCpu->opmode = CPUMODE_32BIT;
333 else
334 pCpu->opmode = CPUMODE_16BIT; /* for 32 and 64 bits mode (there is no 32 bits operand size override prefix) */
335
336 iByte += sizeof(uint8_t);
337 continue; //fetch the next byte
338
339 // rep and repne are not really prefixes, but we'll treat them as such
340 case OP_REPE:
341 pCpu->prefix |= PREFIX_REP;
342 iByte += sizeof(uint8_t);
343 continue; //fetch the next byte
344
345 case OP_REPNE:
346 pCpu->prefix |= PREFIX_REPNE;
347 iByte += sizeof(uint8_t);
348 continue; //fetch the next byte
349
350 case OP_REX:
351 Assert(pCpu->mode == CPUMODE_64BIT);
352 /* REX prefix byte */
353 pCpu->prefix |= PREFIX_REX;
354 pCpu->prefix_rex = PREFIX_REX_OP_2_FLAGS(paOneByteMap[codebyte].param1);
355 iByte += sizeof(uint8_t);
356
357 if (pCpu->prefix_rex & PREFIX_REX_FLAGS_W)
358 pCpu->opmode = CPUMODE_64BIT; /* overrides size prefix byte */
359 continue; //fetch the next byte
360 }
361 }
362
363 unsigned uIdx = iByte;
364 iByte += sizeof(uint8_t); //first opcode byte
365
366 pCpu->opaddr = InstructionAddr + uIdx;
367 pCpu->opcode = codebyte;
368
369 cbInc = ParseInstruction(InstructionAddr + iByte, &paOneByteMap[pCpu->opcode], pCpu);
370 iByte += cbInc;
371 break;
372 }
373
374 pCpu->opsize = iByte;
375 if (pcbInstruction)
376 *pcbInstruction = iByte;
377
378 return VINF_SUCCESS;
379}
380//*****************************************************************************
381//*****************************************************************************
382unsigned ParseInstruction(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, PDISCPUSTATE pCpu)
383{
384 int size = 0;
385 bool fFiltered = false;
386
387 // Store the opcode format string for disasmPrintf
388#ifndef DIS_CORE_ONLY
389 pCpu->pszOpcode = pOp->pszOpcode;
390#endif
391 pCpu->pCurInstr = pOp;
392
393 /*
394 * Apply filter to instruction type to determine if a full disassembly is required.
395 * @note Multibyte opcodes are always marked harmless until the final byte.
396 */
397 if ((pOp->optype & pCpu->uFilter) == 0)
398 {
399 fFiltered = true;
400 pCpu->pfnDisasmFnTable = pfnCalcSize;
401 }
402 else
403 {
404 /* Not filtered out -> full disassembly */
405 pCpu->pfnDisasmFnTable = pfnFullDisasm;
406 }
407
408 // Should contain the parameter type on input
409 pCpu->param1.param = pOp->param1;
410 pCpu->param2.param = pOp->param2;
411 pCpu->param3.param = pOp->param3;
412
413 /* Correct the operand size if the instruction is marked as forced or default 64 bits */
414 if (pCpu->mode == CPUMODE_64BIT)
415 {
416 if (pOp->optype & OPTYPE_FORCED_64_OP_SIZE)
417 pCpu->opsize = CPUMODE_64BIT;
418 else
419 if ( (pOp->optype & OPTYPE_DEFAULT_64_OP_SIZE)
420 && !(pCpu->prefix & PREFIX_OPSIZE))
421 pCpu->opsize = CPUMODE_64BIT;
422 }
423
424 if (pOp->idxParse1 != IDX_ParseNop)
425 {
426 size += pCpu->pfnDisasmFnTable[pOp->idxParse1](lpszCodeBlock, pOp, &pCpu->param1, pCpu);
427 if (fFiltered == false) pCpu->param1.size = DISGetParamSize(pCpu, &pCpu->param1);
428 }
429
430 if (pOp->idxParse2 != IDX_ParseNop)
431 {
432 size += pCpu->pfnDisasmFnTable[pOp->idxParse2](lpszCodeBlock+size, pOp, &pCpu->param2, pCpu);
433 if (fFiltered == false) pCpu->param2.size = DISGetParamSize(pCpu, &pCpu->param2);
434 }
435
436 if (pOp->idxParse3 != IDX_ParseNop)
437 {
438 size += pCpu->pfnDisasmFnTable[pOp->idxParse3](lpszCodeBlock+size, pOp, &pCpu->param3, pCpu);
439 if (fFiltered == false) pCpu->param3.size = DISGetParamSize(pCpu, &pCpu->param3);
440 }
441 // else simple one byte instruction
442
443 return size;
444}
445//*****************************************************************************
446/* Floating point opcode parsing */
447//*****************************************************************************
448unsigned ParseEscFP(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
449{
450 int index;
451 const OPCODE *fpop;
452 unsigned size = 0, ModRM;
453
454 ModRM = DISReadByte(pCpu, lpszCodeBlock);
455
456 index = pCpu->opcode - 0xD8;
457 if (ModRM <= 0xBF)
458 {
459 fpop = &(g_paMapX86_FP_Low[index])[MODRM_REG(ModRM)];
460 pCpu->pCurInstr = (PCOPCODE)fpop;
461
462 // Should contain the parameter type on input
463 pCpu->param1.parval = fpop->param1;
464 pCpu->param2.parval = fpop->param2;
465 }
466 else
467 {
468 fpop = &(g_paMapX86_FP_High[index])[ModRM - 0xC0];
469 pCpu->pCurInstr = (PCOPCODE)fpop;
470 }
471
472 /*
473 * Apply filter to instruction type to determine if a full disassembly is required.
474 * @note Multibyte opcodes are always marked harmless until the final byte.
475 */
476 if ((fpop->optype & pCpu->uFilter) == 0)
477 {
478 pCpu->pfnDisasmFnTable = pfnCalcSize;
479 }
480 else
481 {
482 /* Not filtered out -> full disassembly */
483 pCpu->pfnDisasmFnTable = pfnFullDisasm;
484 }
485
486 /* Correct the operand size if the instruction is marked as forced or default 64 bits */
487 if (pCpu->mode == CPUMODE_64BIT)
488 {
489 /* Note: redundant, but just in case this ever changes */
490 if (fpop->optype & OPTYPE_FORCED_64_OP_SIZE)
491 pCpu->opsize = CPUMODE_64BIT;
492 else
493 if ( (fpop->optype & OPTYPE_DEFAULT_64_OP_SIZE)
494 && !(pCpu->prefix & PREFIX_OPSIZE))
495 pCpu->opsize = CPUMODE_64BIT;
496 }
497
498 // Little hack to make sure the ModRM byte is included in the returned size
499 if (fpop->idxParse1 != IDX_ParseModRM && fpop->idxParse2 != IDX_ParseModRM)
500 size = sizeof(uint8_t); //ModRM byte
501
502 if (fpop->idxParse1 != IDX_ParseNop)
503 size += pCpu->pfnDisasmFnTable[fpop->idxParse1](lpszCodeBlock+size, (PCOPCODE)fpop, pParam, pCpu);
504
505 if (fpop->idxParse2 != IDX_ParseNop)
506 size += pCpu->pfnDisasmFnTable[fpop->idxParse2](lpszCodeBlock+size, (PCOPCODE)fpop, pParam, pCpu);
507
508 // Store the opcode format string for disasmPrintf
509#ifndef DIS_CORE_ONLY
510 pCpu->pszOpcode = fpop->pszOpcode;
511#endif
512
513 return size;
514}
515//*****************************************************************************
516// SIB byte: (32 bits mode only)
517// 7 - 6 5 - 3 2-0
518// Scale Index Base
519//*****************************************************************************
520static const char *szSIBBaseReg[8] = {"EAX", "ECX", "EDX", "EBX", "ESP", "EBP", "ESI", "EDI"};
521static const char *szSIBIndexReg[8] = {"EAX", "ECX", "EDX", "EBX", NULL, "EBP", "ESI", "EDI"};
522static const char *szSIBBaseReg64[16] = {"RAX", "RCX", "RDX", "RBX", "RSP", "RBP", "RSI", "RDI", "R8", "R9", "R10", "R11", "R12", "R13", "R14", "R15"};
523static const char *szSIBIndexReg64[16]= {"RAX", "RCX", "RDX", "RBX", NULL, "RBP", "RSI", "RDI", "R8", "R9", "R10", "R11", "R12", "R13", "R14", "R15"};
524static const char *szSIBScale[4] = {"", "*2", "*4", "*8"};
525//*****************************************************************************
526void UseSIB(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
527{
528 unsigned scale, base, index, regtype;
529 const char **ppszSIBIndexReg;
530 const char **ppszSIBBaseReg;
531 char szTemp[32];
532 szTemp[0] = '\0';
533
534 scale = pCpu->SIB.Bits.Scale;
535 base = pCpu->SIB.Bits.Base;
536 index = pCpu->SIB.Bits.Index;
537
538 if (pCpu->addrmode == CPUMODE_32BIT)
539 {
540 ppszSIBIndexReg = szSIBIndexReg;
541 ppszSIBBaseReg = szSIBBaseReg;
542 regtype = USE_REG_GEN32;
543 }
544 else
545 {
546 ppszSIBIndexReg = szSIBIndexReg64;
547 ppszSIBBaseReg = szSIBBaseReg64;
548 regtype = USE_REG_GEN64;
549 }
550
551 if (ppszSIBIndexReg[index])
552 {
553 pParam->flags |= USE_INDEX;
554 pParam->index.reg_gen = index;
555
556 if (scale != 0)
557 {
558 pParam->flags |= USE_SCALE;
559 pParam->scale = (1<<scale);
560 }
561
562 if (base == 5 && pCpu->ModRM.Bits.Mod == 0)
563 disasmAddStringF(szTemp, sizeof(szTemp), "%s%s", ppszSIBIndexReg[index], szSIBScale[scale]);
564 else
565 disasmAddStringF(szTemp, sizeof(szTemp), "%s+%s%s", ppszSIBBaseReg[base], ppszSIBIndexReg[index], szSIBScale[scale]);
566 }
567 else
568 {
569 if (base != 5 || pCpu->ModRM.Bits.Mod != 0)
570 disasmAddStringF(szTemp, sizeof(szTemp), "%s", ppszSIBBaseReg[base]);
571 }
572
573 if (base == 5 && pCpu->ModRM.Bits.Mod == 0)
574 {
575 // [scaled index] + disp32
576 disasmAddString(pParam->szParam, &szTemp[0]);
577 pParam->flags |= USE_DISPLACEMENT32;
578 pParam->disp32 = pCpu->disp;
579 disasmAddChar(pParam->szParam, '+');
580 disasmPrintDisp32(pParam);
581 }
582 else
583 {
584 disasmAddString(pParam->szParam, szTemp);
585
586 pParam->flags |= USE_BASE | regtype;
587 pParam->base.reg_gen = base;
588 }
589 return; /* Already fetched everything in ParseSIB; no size returned */
590}
591//*****************************************************************************
592//*****************************************************************************
593unsigned ParseSIB(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
594{
595 unsigned size = sizeof(uint8_t);
596 unsigned SIB;
597
598 SIB = DISReadByte(pCpu, lpszCodeBlock);
599 lpszCodeBlock += size;
600
601 pCpu->SIB.Bits.Base = SIB_BASE(SIB);
602 pCpu->SIB.Bits.Index = SIB_INDEX(SIB);
603 pCpu->SIB.Bits.Scale = SIB_SCALE(SIB);
604
605 if (pCpu->prefix & PREFIX_REX)
606 {
607 /* REX.B extends the Base field if not scaled index + disp32 */
608 if (!(pCpu->SIB.Bits.Base == 5 && pCpu->ModRM.Bits.Mod == 0))
609 pCpu->SIB.Bits.Base |= ((!!(pCpu->prefix_rex & PREFIX_REX_FLAGS_B)) << 3);
610
611 pCpu->SIB.Bits.Index |= ((!!(pCpu->prefix_rex & PREFIX_REX_FLAGS_X)) << 3);
612 }
613
614 if ( pCpu->SIB.Bits.Base == 5
615 && pCpu->ModRM.Bits.Mod == 0)
616 {
617 /* Additional 32 bits displacement. No change in long mode. */
618 pCpu->disp = DISReadDWord(pCpu, lpszCodeBlock);
619 size += sizeof(int32_t);
620 }
621 return size;
622}
623//*****************************************************************************
624//*****************************************************************************
625unsigned ParseSIB_SizeOnly(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
626{
627 unsigned size = sizeof(uint8_t);
628 unsigned SIB;
629
630 SIB = DISReadByte(pCpu, lpszCodeBlock);
631 lpszCodeBlock += size;
632
633 pCpu->SIB.Bits.Base = SIB_BASE(SIB);
634 pCpu->SIB.Bits.Index = SIB_INDEX(SIB);
635 pCpu->SIB.Bits.Scale = SIB_SCALE(SIB);
636
637 if (pCpu->prefix & PREFIX_REX)
638 {
639 /* REX.B extends the Base field. */
640 pCpu->SIB.Bits.Base |= ((!!(pCpu->prefix_rex & PREFIX_REX_FLAGS_B)) << 3);
641 /* REX.X extends the Index field. */
642 pCpu->SIB.Bits.Index |= ((!!(pCpu->prefix_rex & PREFIX_REX_FLAGS_X)) << 3);
643 }
644
645 if ( pCpu->SIB.Bits.Base == 5
646 && pCpu->ModRM.Bits.Mod == 0)
647 {
648 /* Additional 32 bits displacement. No change in long mode. */
649 size += sizeof(int32_t);
650 }
651 return size;
652}
653//*****************************************************************************
654// ModR/M byte:
655// 7 - 6 5 - 3 2-0
656// Mod Reg/Opcode R/M
657//*****************************************************************************
658unsigned UseModRM(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
659{
660 int vtype = OP_PARM_VTYPE(pParam->param);
661 unsigned reg = pCpu->ModRM.Bits.Reg;
662 unsigned mod = pCpu->ModRM.Bits.Mod;
663 unsigned rm = pCpu->ModRM.Bits.Rm;
664
665 switch (vtype)
666 {
667 case OP_PARM_G: //general purpose register
668 disasmModRMReg(pCpu, pOp, reg, pParam, 0);
669 return 0;
670
671 default:
672 if (IS_OP_PARM_RARE(vtype))
673 {
674 switch (vtype)
675 {
676 case OP_PARM_C: //control register
677 disasmAddStringF(pParam->szParam, sizeof(pParam->szParam), "CR%d", reg);
678 pParam->flags |= USE_REG_CR;
679 pParam->base.reg_ctrl = reg;
680 return 0;
681
682 case OP_PARM_D: //debug register
683 disasmAddStringF(pParam->szParam, sizeof(pParam->szParam), "DR%d", reg);
684 pParam->flags |= USE_REG_DBG;
685 pParam->base.reg_dbg = reg;
686 return 0;
687
688 case OP_PARM_P: //MMX register
689 reg &= 7; /* REX.R has no effect here */
690 disasmAddStringF(pParam->szParam, sizeof(pParam->szParam), "MM%d", reg);
691 pParam->flags |= USE_REG_MMX;
692 pParam->base.reg_mmx = reg;
693 return 0;
694
695 case OP_PARM_S: //segment register
696 reg &= 7; /* REX.R has no effect here */
697 disasmModRMSReg(pCpu, pOp, reg, pParam);
698 pParam->flags |= USE_REG_SEG;
699 return 0;
700
701 case OP_PARM_T: //test register
702 reg &= 7; /* REX.R has no effect here */
703 disasmAddStringF(pParam->szParam, sizeof(pParam->szParam), "TR%d", reg);
704 pParam->flags |= USE_REG_TEST;
705 pParam->base.reg_test = reg;
706 return 0;
707
708 case OP_PARM_W: //XMM register or memory operand
709 if (mod != 3)
710 break; /* memory operand */
711 reg = rm; /* the RM field specifies the xmm register */
712 /* else no break */
713
714 case OP_PARM_V: //XMM register
715 disasmAddStringF(pParam->szParam, sizeof(pParam->szParam), "XMM%d", reg);
716 pParam->flags |= USE_REG_XMM;
717 pParam->base.reg_xmm = reg;
718 return 0;
719 }
720 }
721 }
722
723 /* @todo bound */
724
725 if (pCpu->addrmode != CPUMODE_16BIT)
726 {
727 Assert(pCpu->addrmode == CPUMODE_32BIT || pCpu->addrmode == CPUMODE_64BIT);
728
729 /*
730 * Note: displacements in long mode are 8 or 32 bits and sign-extended to 64 bits
731 */
732 switch (mod)
733 {
734 case 0: //effective address
735 disasmGetPtrString(pCpu, pOp, pParam);
736 disasmAddChar(pParam->szParam, '[');
737 if (rm == 4)
738 { /* SIB byte follows ModRM */
739 UseSIB(lpszCodeBlock, pOp, pParam, pCpu);
740 }
741 else
742 if (rm == 5)
743 {
744 /* 32 bits displacement */
745 if (pCpu->mode == CPUMODE_32BIT)
746 {
747 pParam->flags |= USE_DISPLACEMENT32;
748 pParam->disp32 = pCpu->disp;
749 disasmPrintDisp32(pParam);
750 }
751 else
752 {
753 pParam->flags |= USE_RIPDISPLACEMENT32;
754 pParam->disp32 = pCpu->disp;
755 disasmAddStringF(pParam->szParam, sizeof(pParam->szParam), "RIP+");
756 disasmPrintDisp32(pParam);
757 }
758 }
759 else {//register address
760 pParam->flags |= USE_BASE;
761 disasmModRMReg(pCpu, pOp, rm, pParam, 1);
762 }
763 disasmAddChar(pParam->szParam, ']');
764 break;
765
766 case 1: //effective address + 8 bits displacement
767 disasmGetPtrString(pCpu, pOp, pParam);
768 disasmAddChar(pParam->szParam, '[');
769 if (rm == 4) {//SIB byte follows ModRM
770 UseSIB(lpszCodeBlock, pOp, pParam, pCpu);
771 }
772 else
773 {
774 pParam->flags |= USE_BASE;
775 disasmModRMReg(pCpu, pOp, rm, pParam, 1);
776 }
777 pParam->disp8 = pCpu->disp;
778 pParam->flags |= USE_DISPLACEMENT8;
779
780 if (pParam->disp8 != 0)
781 {
782 if (pParam->disp8 > 0)
783 disasmAddChar(pParam->szParam, '+');
784 disasmPrintDisp8(pParam);
785 }
786 disasmAddChar(pParam->szParam, ']');
787 break;
788
789 case 2: //effective address + 32 bits displacement
790 disasmGetPtrString(pCpu, pOp, pParam);
791 disasmAddChar(pParam->szParam, '[');
792 if (rm == 4) {//SIB byte follows ModRM
793 UseSIB(lpszCodeBlock, pOp, pParam, pCpu);
794 }
795 else
796 {
797 pParam->flags |= USE_BASE;
798 disasmModRMReg(pCpu, pOp, rm, pParam, 1);
799 }
800 pParam->disp32 = pCpu->disp;
801 pParam->flags |= USE_DISPLACEMENT32;
802
803 if (pParam->disp32 != 0)
804 {
805 disasmAddChar(pParam->szParam, '+');
806 disasmPrintDisp32(pParam);
807 }
808 disasmAddChar(pParam->szParam, ']');
809 break;
810
811 case 3: //registers
812 disasmModRMReg(pCpu, pOp, rm, pParam, 0);
813 break;
814 }
815 }
816 else
817 {//16 bits addressing mode
818 switch (mod)
819 {
820 case 0: //effective address
821 disasmGetPtrString(pCpu, pOp, pParam);
822 disasmAddChar(pParam->szParam, '[');
823 if (rm == 6)
824 {//16 bits displacement
825 pParam->disp16 = pCpu->disp;
826 pParam->flags |= USE_DISPLACEMENT16;
827 disasmPrintDisp16(pParam);
828 }
829 else
830 {
831 pParam->flags |= USE_BASE;
832 disasmModRMReg16(pCpu, pOp, rm, pParam);
833 }
834 disasmAddChar(pParam->szParam, ']');
835 break;
836
837 case 1: //effective address + 8 bits displacement
838 disasmGetPtrString(pCpu, pOp, pParam);
839 disasmAddChar(pParam->szParam, '[');
840 disasmModRMReg16(pCpu, pOp, rm, pParam);
841 pParam->disp8 = pCpu->disp;
842 pParam->flags |= USE_BASE | USE_DISPLACEMENT8;
843
844 if (pParam->disp8 != 0)
845 {
846 if (pParam->disp8 > 0)
847 disasmAddChar(pParam->szParam, '+');
848 disasmPrintDisp8(pParam);
849 }
850 disasmAddChar(pParam->szParam, ']');
851 break;
852
853 case 2: //effective address + 16 bits displacement
854 disasmGetPtrString(pCpu, pOp, pParam);
855 disasmAddChar(pParam->szParam, '[');
856 disasmModRMReg16(pCpu, pOp, rm, pParam);
857 pParam->disp16 = pCpu->disp;
858 pParam->flags |= USE_BASE | USE_DISPLACEMENT16;
859
860 if (pParam->disp16 != 0)
861 {
862 disasmAddChar(pParam->szParam, '+');
863 disasmPrintDisp16(pParam);
864 }
865 disasmAddChar(pParam->szParam, ']');
866 break;
867
868 case 3: //registers
869 disasmModRMReg(pCpu, pOp, rm, pParam, 0);
870 break;
871 }
872 }
873 return 0; //everything was already fetched in ParseModRM
874}
875//*****************************************************************************
876// Query the size of the ModRM parameters and fetch the immediate data (if any)
877//*****************************************************************************
878unsigned QueryModRM(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu, unsigned *pSibInc)
879{
880 unsigned sibinc;
881 unsigned size = 0;
882 // unsigned reg = pCpu->ModRM.Bits.Reg;
883 unsigned mod = pCpu->ModRM.Bits.Mod;
884 unsigned rm = pCpu->ModRM.Bits.Rm;
885
886 if (!pSibInc)
887 pSibInc = &sibinc;
888
889 *pSibInc = 0;
890
891 if (pCpu->addrmode != CPUMODE_16BIT)
892 {
893 Assert(pCpu->addrmode == CPUMODE_32BIT || pCpu->addrmode == CPUMODE_64BIT);
894
895 /*
896 * Note: displacements in long mode are 8 or 32 bits and sign-extended to 64 bits
897 */
898 if (mod != 3 && rm == 4)
899 { /* SIB byte follows ModRM */
900 *pSibInc = ParseSIB(lpszCodeBlock, pOp, pParam, pCpu);
901 lpszCodeBlock += *pSibInc;
902 size += *pSibInc;
903 }
904
905 switch (mod)
906 {
907 case 0: /* Effective address */
908 if (rm == 5) { /* 32 bits displacement */
909 pCpu->disp = DISReadDWord(pCpu, lpszCodeBlock);
910 size += sizeof(int32_t);
911 }
912 /* else register address */
913 break;
914
915 case 1: /* Effective address + 8 bits displacement */
916 pCpu->disp = (int8_t)DISReadByte(pCpu, lpszCodeBlock);
917 size += sizeof(char);
918 break;
919
920 case 2: /* Effective address + 32 bits displacement */
921 pCpu->disp = DISReadDWord(pCpu, lpszCodeBlock);
922 size += sizeof(int32_t);
923 break;
924
925 case 3: /* registers */
926 break;
927 }
928 }
929 else
930 {
931 /* 16 bits mode */
932 switch (mod)
933 {
934 case 0: /* Effective address */
935 if (rm == 6) {
936 pCpu->disp = DISReadWord(pCpu, lpszCodeBlock);
937 size += sizeof(uint16_t);
938 }
939 /* else register address */
940 break;
941
942 case 1: /* Effective address + 8 bits displacement */
943 pCpu->disp = (int8_t)DISReadByte(pCpu, lpszCodeBlock);
944 size += sizeof(char);
945 break;
946
947 case 2: /* Effective address + 32 bits displacement */
948 pCpu->disp = (int16_t)DISReadWord(pCpu, lpszCodeBlock);
949 size += sizeof(uint16_t);
950 break;
951
952 case 3: /* registers */
953 break;
954 }
955 }
956 return size;
957}
958//*****************************************************************************
959// Query the size of the ModRM parameters and fetch the immediate data (if any)
960//*****************************************************************************
961unsigned QueryModRM_SizeOnly(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu, unsigned *pSibInc)
962{
963 unsigned sibinc;
964 unsigned size = 0;
965 // unsigned reg = pCpu->ModRM.Bits.Reg;
966 unsigned mod = pCpu->ModRM.Bits.Mod;
967 unsigned rm = pCpu->ModRM.Bits.Rm;
968
969 if (!pSibInc)
970 pSibInc = &sibinc;
971
972 *pSibInc = 0;
973
974 if (pCpu->addrmode != CPUMODE_16BIT)
975 {
976 Assert(pCpu->addrmode == CPUMODE_32BIT || pCpu->addrmode == CPUMODE_64BIT);
977 /*
978 * Note: displacements in long mode are 8 or 32 bits and sign-extended to 64 bits
979 */
980 if (mod != 3 && rm == 4)
981 { /* SIB byte follows ModRM */
982 *pSibInc = ParseSIB_SizeOnly(lpszCodeBlock, pOp, pParam, pCpu);
983 lpszCodeBlock += *pSibInc;
984 size += *pSibInc;
985 }
986
987 switch (mod)
988 {
989 case 0: //effective address
990 if (rm == 5) { /* 32 bits displacement */
991 size += sizeof(int32_t);
992 }
993 /* else register address */
994 break;
995
996 case 1: /* Effective address + 8 bits displacement */
997 size += sizeof(char);
998 break;
999
1000 case 2: /* Effective address + 32 bits displacement */
1001 size += sizeof(int32_t);
1002 break;
1003
1004 case 3: /* registers */
1005 break;
1006 }
1007 }
1008 else
1009 {
1010 /* 16 bits mode */
1011 switch (mod)
1012 {
1013 case 0: //effective address
1014 if (rm == 6) {
1015 size += sizeof(uint16_t);
1016 }
1017 /* else register address */
1018 break;
1019
1020 case 1: /* Effective address + 8 bits displacement */
1021 size += sizeof(char);
1022 break;
1023
1024 case 2: /* Effective address + 32 bits displacement */
1025 size += sizeof(uint16_t);
1026 break;
1027
1028 case 3: /* registers */
1029 break;
1030 }
1031 }
1032 return size;
1033}
1034//*****************************************************************************
1035//*****************************************************************************
1036unsigned ParseIllegal(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
1037{
1038 AssertFailed();
1039 return 0;
1040}
1041//*****************************************************************************
1042//*****************************************************************************
1043unsigned ParseModRM(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
1044{
1045 unsigned size = sizeof(uint8_t); //ModRM byte
1046 unsigned sibinc, ModRM;
1047
1048 ModRM = DISReadByte(pCpu, lpszCodeBlock);
1049 lpszCodeBlock += sizeof(uint8_t);
1050
1051 pCpu->ModRM.Bits.Rm = MODRM_RM(ModRM);
1052 pCpu->ModRM.Bits.Mod = MODRM_MOD(ModRM);
1053 pCpu->ModRM.Bits.Reg = MODRM_REG(ModRM);
1054
1055 if (pCpu->prefix & PREFIX_REX)
1056 {
1057 Assert(pCpu->mode == CPUMODE_64BIT);
1058
1059 /* REX.R extends the Reg field. */
1060 pCpu->ModRM.Bits.Reg |= ((!!(pCpu->prefix_rex & PREFIX_REX_FLAGS_R)) << 3);
1061
1062 /* REX.B extends the Rm field if there is no SIB byte nor a 32 bits displacement */
1063 if (!( pCpu->ModRM.Bits.Mod != 3
1064 && pCpu->ModRM.Bits.Rm == 4)
1065 &&
1066 !( pCpu->ModRM.Bits.Mod == 0
1067 && pCpu->ModRM.Bits.Rm == 5))
1068 {
1069 pCpu->ModRM.Bits.Rm |= ((!!(pCpu->prefix_rex & PREFIX_REX_FLAGS_B)) << 3);
1070 }
1071 }
1072 size += QueryModRM(lpszCodeBlock, pOp, pParam, pCpu, &sibinc);
1073 lpszCodeBlock += sibinc;
1074
1075 UseModRM(lpszCodeBlock, pOp, pParam, pCpu);
1076 return size;
1077}
1078//*****************************************************************************
1079//*****************************************************************************
1080unsigned ParseModRM_SizeOnly(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
1081{
1082 unsigned size = sizeof(uint8_t); //ModRM byte
1083 unsigned sibinc, ModRM;
1084
1085 ModRM = DISReadByte(pCpu, lpszCodeBlock);
1086 lpszCodeBlock += sizeof(uint8_t);
1087
1088 pCpu->ModRM.Bits.Rm = MODRM_RM(ModRM);
1089 pCpu->ModRM.Bits.Mod = MODRM_MOD(ModRM);
1090 pCpu->ModRM.Bits.Reg = MODRM_REG(ModRM);
1091
1092 if (pCpu->prefix & PREFIX_REX)
1093 {
1094 Assert(pCpu->mode == CPUMODE_64BIT);
1095
1096 /* REX.R extends the Reg field. */
1097 pCpu->ModRM.Bits.Reg |= ((!!(pCpu->prefix_rex & PREFIX_REX_FLAGS_R)) << 3);
1098
1099 /* REX.B extends the Rm field if there is no SIB byte nor a 32 bits displacement */
1100 if (!( pCpu->ModRM.Bits.Mod != 3
1101 && pCpu->ModRM.Bits.Rm == 4)
1102 &&
1103 !( pCpu->ModRM.Bits.Mod == 0
1104 && pCpu->ModRM.Bits.Rm == 5))
1105 {
1106 pCpu->ModRM.Bits.Rm |= ((!!(pCpu->prefix_rex & PREFIX_REX_FLAGS_B)) << 3);
1107 }
1108 }
1109
1110 size += QueryModRM_SizeOnly(lpszCodeBlock, pOp, pParam, pCpu, &sibinc);
1111 lpszCodeBlock += sibinc;
1112
1113 /* UseModRM is not necessary here; we're only interested in the opcode size */
1114 return size;
1115}
1116//*****************************************************************************
1117//*****************************************************************************
1118unsigned ParseModFence(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
1119{
1120 ////AssertMsgFailed(("??\n"));
1121 //nothing to do apparently
1122 return 0;
1123}
1124//*****************************************************************************
1125//*****************************************************************************
1126unsigned ParseImmByte(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
1127{
1128 pParam->parval = DISReadByte(pCpu, lpszCodeBlock);
1129 pParam->flags |= USE_IMMEDIATE8;
1130
1131 disasmAddStringF(pParam->szParam, sizeof(pParam->szParam), "0%02Xh", (uint32_t)pParam->parval);
1132 return sizeof(uint8_t);
1133}
1134//*****************************************************************************
1135//*****************************************************************************
1136unsigned ParseImmByte_SizeOnly(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
1137{
1138 return sizeof(uint8_t);
1139}
1140//*****************************************************************************
1141//*****************************************************************************
1142unsigned ParseImmByteSX(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
1143{
1144 if (pCpu->opmode == CPUMODE_32BIT)
1145 {
1146 pParam->parval = (uint32_t)(int8_t)DISReadByte(pCpu, lpszCodeBlock);
1147 pParam->flags |= USE_IMMEDIATE32_SX8;
1148 disasmAddStringF(pParam->szParam, sizeof(pParam->szParam), "0%08Xh", (uint32_t)pParam->parval);
1149 }
1150 else
1151 {
1152 pParam->parval = (uint16_t)(int8_t)DISReadByte(pCpu, lpszCodeBlock);
1153 pParam->flags |= USE_IMMEDIATE16_SX8;
1154 disasmAddStringF(pParam->szParam, sizeof(pParam->szParam), "0%04Xh", (uint16_t)pParam->parval);
1155 }
1156 return sizeof(uint8_t);
1157}
1158//*****************************************************************************
1159//*****************************************************************************
1160unsigned ParseImmByteSX_SizeOnly(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
1161{
1162 return sizeof(uint8_t);
1163}
1164//*****************************************************************************
1165//*****************************************************************************
1166unsigned ParseImmUshort(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
1167{
1168 pParam->parval = DISReadWord(pCpu, lpszCodeBlock);
1169 pParam->flags |= USE_IMMEDIATE16;
1170
1171 disasmAddStringF(pParam->szParam, sizeof(pParam->szParam), "0%04Xh", (uint16_t)pParam->parval);
1172 return sizeof(uint16_t);
1173}
1174//*****************************************************************************
1175//*****************************************************************************
1176unsigned ParseImmUshort_SizeOnly(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
1177{
1178 return sizeof(uint16_t);
1179}
1180//*****************************************************************************
1181//*****************************************************************************
1182unsigned ParseImmUlong(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
1183{
1184 pParam->parval = DISReadDWord(pCpu, lpszCodeBlock);
1185 pParam->flags |= USE_IMMEDIATE32;
1186
1187 disasmAddStringF(pParam->szParam, sizeof(pParam->szParam), "0%08Xh", (uint32_t)pParam->parval);
1188 return sizeof(uint32_t);
1189}
1190//*****************************************************************************
1191//*****************************************************************************
1192unsigned ParseImmUlong_SizeOnly(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
1193{
1194 return sizeof(uint32_t);
1195}
1196//*****************************************************************************
1197//*****************************************************************************
1198unsigned ParseImmQword(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
1199{
1200 pParam->parval = DISReadQWord(pCpu, lpszCodeBlock);
1201 pParam->flags |= USE_IMMEDIATE64;
1202
1203 disasmAddStringF(pParam->szParam, sizeof(pParam->szParam), "0%08X", (uint32_t)pParam->parval);
1204 disasmAddStringF(&pParam->szParam[9], sizeof(pParam->szParam)-9, "%08Xh", (uint32_t)(pParam->parval >> 32));
1205 return sizeof(uint64_t);
1206}
1207//*****************************************************************************
1208//*****************************************************************************
1209unsigned ParseImmQword_SizeOnly(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
1210{
1211 return sizeof(uint64_t);
1212}
1213//*****************************************************************************
1214//*****************************************************************************
1215unsigned ParseImmV(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
1216{
1217 if (pCpu->opmode == CPUMODE_32BIT)
1218 {
1219 pParam->parval = DISReadDWord(pCpu, lpszCodeBlock);
1220 pParam->flags |= USE_IMMEDIATE32;
1221
1222 disasmAddStringF(pParam->szParam, sizeof(pParam->szParam), "0%08Xh", (uint32_t)pParam->parval);
1223 return sizeof(uint32_t);
1224 }
1225 else
1226 {
1227 pParam->parval = DISReadWord(pCpu, lpszCodeBlock);
1228 pParam->flags |= USE_IMMEDIATE16;
1229
1230 disasmAddStringF(pParam->szParam, sizeof(pParam->szParam), "0%04Xh", (uint32_t)pParam->parval);
1231 return sizeof(uint16_t);
1232 }
1233}
1234//*****************************************************************************
1235//*****************************************************************************
1236unsigned ParseImmV_SizeOnly(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
1237{
1238 if (pCpu->opmode == CPUMODE_32BIT)
1239 return sizeof(uint32_t);
1240 return sizeof(uint16_t);
1241}
1242//*****************************************************************************
1243// Relative displacement for branches (rel. to next instruction)
1244//*****************************************************************************
1245unsigned ParseImmBRel(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
1246{
1247 pParam->parval = DISReadByte(pCpu, lpszCodeBlock);
1248 pParam->flags |= USE_IMMEDIATE8_REL;
1249
1250 disasmAddStringF(pParam->szParam, sizeof(pParam->szParam), " (0%02Xh)", (uint32_t)pParam->parval);
1251 return sizeof(char);
1252}
1253//*****************************************************************************
1254// Relative displacement for branches (rel. to next instruction)
1255//*****************************************************************************
1256unsigned ParseImmBRel_SizeOnly(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
1257{
1258 return sizeof(char);
1259}
1260//*****************************************************************************
1261// Relative displacement for branches (rel. to next instruction)
1262//*****************************************************************************
1263unsigned ParseImmVRel(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
1264{
1265 if (pCpu->opmode == CPUMODE_32BIT)
1266 {
1267 pParam->parval = DISReadDWord(pCpu, lpszCodeBlock);
1268 pParam->flags |= USE_IMMEDIATE32_REL;
1269
1270 disasmAddStringF(pParam->szParam, sizeof(pParam->szParam), " (0%08Xh)", (uint32_t)pParam->parval);
1271 return sizeof(int32_t);
1272 }
1273 else
1274 {
1275 pParam->parval = DISReadWord(pCpu, lpszCodeBlock);
1276 pParam->flags |= USE_IMMEDIATE16_REL;
1277
1278 disasmAddStringF(pParam->szParam, sizeof(pParam->szParam), " (0%04Xh)", (uint32_t)pParam->parval);
1279 return sizeof(uint16_t);
1280 }
1281}
1282//*****************************************************************************
1283// Relative displacement for branches (rel. to next instruction)
1284//*****************************************************************************
1285unsigned ParseImmVRel_SizeOnly(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
1286{
1287 if (pCpu->opmode == CPUMODE_32BIT)
1288 return sizeof(int32_t);
1289 return sizeof(uint16_t);
1290}
1291//*****************************************************************************
1292//*****************************************************************************
1293unsigned ParseImmAddr(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
1294{
1295 disasmGetPtrString(pCpu, pOp, pParam);
1296 if (pCpu->addrmode == CPUMODE_32BIT)
1297 {
1298 if (OP_PARM_VSUBTYPE(pParam->param) == OP_PARM_p)
1299 {// far 16:32 pointer
1300 pParam->parval = DISReadDWord(pCpu, lpszCodeBlock);
1301 *((uint32_t*)&pParam->parval+1) = DISReadWord(pCpu, lpszCodeBlock+sizeof(uint32_t));
1302 pParam->flags |= USE_IMMEDIATE_ADDR_16_32;
1303
1304 disasmAddStringF(pParam->szParam, sizeof(pParam->szParam), "0%04X:0%08Xh", (uint32_t)(pParam->parval>>32), (uint32_t)pParam->parval);
1305 return sizeof(uint32_t) + sizeof(uint16_t);
1306 }
1307 else
1308 {// near 32 bits pointer
1309 /*
1310 * Note: used only in "mov al|ax|eax, [Addr]" and "mov [Addr], al|ax|eax"
1311 * so we treat it like displacement.
1312 */
1313 pParam->disp32 = DISReadDWord(pCpu, lpszCodeBlock);
1314 pParam->flags |= USE_DISPLACEMENT32;
1315
1316 disasmAddStringF(pParam->szParam, sizeof(pParam->szParam), "[0%08Xh]", pParam->disp32);
1317 return sizeof(uint32_t);
1318 }
1319 }
1320 else
1321 if (pCpu->addrmode == CPUMODE_64BIT)
1322 {
1323 Assert(OP_PARM_VSUBTYPE(pParam->param) != OP_PARM_p);
1324 /* near 64 bits pointer */
1325 /*
1326 * Note: used only in "mov al|ax|eax, [Addr]" and "mov [Addr], al|ax|eax"
1327 * so we treat it like displacement.
1328 */
1329 pParam->disp64 = DISReadQWord(pCpu, lpszCodeBlock);
1330 pParam->flags |= USE_DISPLACEMENT64;
1331
1332 disasmAddStringF(pParam->szParam, sizeof(pParam->szParam), "[0%08X%08Xh]", (uint32_t)(pParam->disp64 >> 32), (uint32_t)pParam->disp64);
1333 return sizeof(uint64_t);
1334 }
1335 else
1336 {
1337 if (OP_PARM_VSUBTYPE(pParam->param) == OP_PARM_p)
1338 {// far 16:16 pointer
1339 pParam->parval = DISReadDWord(pCpu, lpszCodeBlock);
1340 pParam->flags |= USE_IMMEDIATE_ADDR_16_16;
1341
1342 disasmAddStringF(pParam->szParam, sizeof(pParam->szParam), "0%04X:0%04Xh", (uint32_t)(pParam->parval>>16), (uint16_t)pParam->parval );
1343 return sizeof(uint32_t);
1344 }
1345 else
1346 {// near 16 bits pointer
1347 /*
1348 * Note: used only in "mov al|ax|eax, [Addr]" and "mov [Addr], al|ax|eax"
1349 * so we treat it like displacement.
1350 */
1351 pParam->disp16 = DISReadWord(pCpu, lpszCodeBlock);
1352 pParam->flags |= USE_DISPLACEMENT16;
1353
1354 disasmAddStringF(pParam->szParam, sizeof(pParam->szParam), "[0%04Xh]", (uint32_t)pParam->disp16);
1355 return sizeof(uint16_t);
1356 }
1357 }
1358}
1359//*****************************************************************************
1360//*****************************************************************************
1361unsigned ParseImmAddr_SizeOnly(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
1362{
1363 if (pCpu->addrmode == CPUMODE_32BIT)
1364 {
1365 if (OP_PARM_VSUBTYPE(pParam->param) == OP_PARM_p)
1366 {// far 16:32 pointer
1367 return sizeof(uint32_t) + sizeof(uint16_t);
1368 }
1369 else
1370 {// near 32 bits pointer
1371 return sizeof(uint32_t);
1372 }
1373 }
1374 if (pCpu->addrmode == CPUMODE_64BIT)
1375 {
1376 Assert(OP_PARM_VSUBTYPE(pParam->param) != OP_PARM_p);
1377 return sizeof(uint64_t);
1378 }
1379 else
1380 {
1381 if (OP_PARM_VSUBTYPE(pParam->param) == OP_PARM_p)
1382 {// far 16:16 pointer
1383 return sizeof(uint32_t);
1384 }
1385 else
1386 {// near 16 bits pointer
1387 return sizeof(uint16_t);
1388 }
1389 }
1390}
1391//*****************************************************************************
1392//*****************************************************************************
1393unsigned ParseFixedReg(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
1394{
1395 /*
1396 * Sets up flags for stored in OPC fixed registers.
1397 */
1398
1399 if (pParam->param == OP_PARM_NONE)
1400 {
1401 /* No parameter at all. */
1402 return 0;
1403 }
1404
1405 AssertCompile(OP_PARM_REG_GEN32_END < OP_PARM_REG_SEG_END);
1406 AssertCompile(OP_PARM_REG_SEG_END < OP_PARM_REG_GEN16_END);
1407 AssertCompile(OP_PARM_REG_GEN16_END < OP_PARM_REG_GEN8_END);
1408 AssertCompile(OP_PARM_REG_GEN8_END < OP_PARM_REG_FP_END);
1409
1410 if (pParam->param <= OP_PARM_REG_GEN32_END)
1411 {
1412 /* 32-bit EAX..EDI registers. */
1413 if (pCpu->opmode == CPUMODE_32BIT)
1414 {
1415 /* Use 32-bit registers. */
1416 pParam->base.reg_gen = pParam->param - OP_PARM_REG_GEN32_START;
1417 pParam->flags |= USE_REG_GEN32;
1418 pParam->size = 4;
1419 }
1420 else
1421 if (pCpu->opmode == CPUMODE_64BIT)
1422 {
1423 /* Use 64-bit registers. */
1424 pParam->base.reg_gen = pParam->param - OP_PARM_REG_GEN32_START;
1425 if ( (pOp->optype & OPTYPE_REXB_EXTENDS_OPREG)
1426 && pParam == &pCpu->param1 /* ugly assumption that it only applies to the first parameter */
1427 && (pCpu->prefix & PREFIX_REX)
1428 && (pCpu->prefix_rex & PREFIX_REX_FLAGS))
1429 pParam->base.reg_gen += 8;
1430
1431 pParam->flags |= USE_REG_GEN64;
1432 pParam->size = 8;
1433 }
1434 else
1435 {
1436 /* Use 16-bit registers. */
1437 pParam->base.reg_gen = pParam->param - OP_PARM_REG_GEN32_START;
1438 pParam->flags |= USE_REG_GEN16;
1439 pParam->size = 2;
1440 pParam->param = pParam->param - OP_PARM_REG_GEN32_START + OP_PARM_REG_GEN16_START;
1441 }
1442 }
1443 else
1444 if (pParam->param <= OP_PARM_REG_SEG_END)
1445 {
1446 /* Segment ES..GS registers. */
1447 pParam->base.reg_seg = pParam->param - OP_PARM_REG_SEG_START;
1448 pParam->flags |= USE_REG_SEG;
1449 pParam->size = 2;
1450 }
1451 else
1452 if (pParam->param <= OP_PARM_REG_GEN16_END)
1453 {
1454 /* 16-bit AX..DI registers. */
1455 pParam->base.reg_gen = pParam->param - OP_PARM_REG_GEN16_START;
1456 pParam->flags |= USE_REG_GEN16;
1457 pParam->size = 2;
1458 }
1459 else
1460 if (pParam->param <= OP_PARM_REG_GEN8_END)
1461 {
1462 /* 8-bit AL..DL, AH..DH registers. */
1463 pParam->base.reg_gen = pParam->param - OP_PARM_REG_GEN8_START;
1464 pParam->flags |= USE_REG_GEN8;
1465 pParam->size = 1;
1466
1467 if (pCpu->opmode == CPUMODE_64BIT)
1468 {
1469 if ( (pOp->optype & OPTYPE_REXB_EXTENDS_OPREG)
1470 && pParam == &pCpu->param1 /* ugly assumption that it only applies to the first parameter */
1471 && (pCpu->prefix & PREFIX_REX)
1472 && (pCpu->prefix_rex & PREFIX_REX_FLAGS))
1473 pParam->base.reg_gen += 8; /* least significant byte of R8-R15 */
1474 }
1475 }
1476 else
1477 if (pParam->param <= OP_PARM_REG_FP_END)
1478 {
1479 /* FPU registers. */
1480 pParam->base.reg_fp = pParam->param - OP_PARM_REG_FP_START;
1481 pParam->flags |= USE_REG_FP;
1482 pParam->size = 10;
1483 }
1484 Assert(!(pParam->param >= OP_PARM_REG_GEN64_START && pParam->param <= OP_PARM_REG_GEN64_END));
1485
1486 /* else - not supported for now registers. */
1487
1488 return 0;
1489}
1490//*****************************************************************************
1491//*****************************************************************************
1492unsigned ParseXv(RTUINTPTR pu8CodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
1493{
1494 disasmGetPtrString(pCpu, pOp, pParam);
1495 disasmAddStringF(pParam->szParam, sizeof(pParam->szParam), (pCpu->addrmode == CPUMODE_32BIT) ? "DS:ESI" : "DS:SI");
1496
1497 pParam->flags |= USE_POINTER_DS_BASED;
1498 if (pCpu->addrmode == CPUMODE_32BIT)
1499 {
1500 pParam->base.reg_gen = USE_REG_ESI;
1501 pParam->flags |= USE_REG_GEN32;
1502 }
1503 else
1504 if (pCpu->addrmode == CPUMODE_64BIT)
1505 {
1506 pParam->base.reg_gen = USE_REG_RSI;
1507 pParam->flags |= USE_REG_GEN64;
1508 }
1509 else
1510 {
1511 pParam->base.reg_gen = USE_REG_SI;
1512 pParam->flags |= USE_REG_GEN16;
1513 }
1514 return 0; //no additional opcode bytes
1515}
1516//*****************************************************************************
1517//*****************************************************************************
1518unsigned ParseXb(RTUINTPTR pu8CodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
1519{
1520 disasmAddStringF(pParam->szParam, sizeof(pParam->szParam), (pCpu->addrmode == CPUMODE_32BIT) ? "DS:ESI" : "DS:SI");
1521
1522 pParam->flags |= USE_POINTER_DS_BASED;
1523 if (pCpu->addrmode == CPUMODE_32BIT)
1524 {
1525 pParam->base.reg_gen = USE_REG_ESI;
1526 pParam->flags |= USE_REG_GEN32;
1527 }
1528 else
1529 if (pCpu->addrmode == CPUMODE_64BIT)
1530 {
1531 pParam->base.reg_gen = USE_REG_RSI;
1532 pParam->flags |= USE_REG_GEN64;
1533 }
1534 else
1535 {
1536 pParam->base.reg_gen = USE_REG_SI;
1537 pParam->flags |= USE_REG_GEN16;
1538 }
1539 return 0; //no additional opcode bytes
1540}
1541//*****************************************************************************
1542//*****************************************************************************
1543unsigned ParseYv(RTUINTPTR pu8CodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
1544{
1545 disasmGetPtrString(pCpu, pOp, pParam);
1546 disasmAddStringF(pParam->szParam, sizeof(pParam->szParam), (pCpu->addrmode == CPUMODE_32BIT) ? "ES:EDI" : "ES:DI");
1547
1548 pParam->flags |= USE_POINTER_ES_BASED;
1549 if (pCpu->addrmode == CPUMODE_32BIT)
1550 {
1551 pParam->base.reg_gen = USE_REG_EDI;
1552 pParam->flags |= USE_REG_GEN32;
1553 }
1554 else
1555 if (pCpu->addrmode == CPUMODE_64BIT)
1556 {
1557 pParam->base.reg_gen = USE_REG_RDI;
1558 pParam->flags |= USE_REG_GEN64;
1559 }
1560 else
1561 {
1562 pParam->base.reg_gen = USE_REG_DI;
1563 pParam->flags |= USE_REG_GEN16;
1564 }
1565 return 0; //no additional opcode bytes
1566}
1567//*****************************************************************************
1568//*****************************************************************************
1569unsigned ParseYb(RTUINTPTR pu8CodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
1570{
1571 disasmAddStringF(pParam->szParam, sizeof(pParam->szParam), (pCpu->addrmode == CPUMODE_32BIT) ? "ES:EDI" : "ES:DI");
1572
1573 pParam->flags |= USE_POINTER_ES_BASED;
1574 if (pCpu->addrmode == CPUMODE_32BIT)
1575 {
1576 pParam->base.reg_gen = USE_REG_EDI;
1577 pParam->flags |= USE_REG_GEN32;
1578 }
1579 else
1580 if (pCpu->addrmode == CPUMODE_64BIT)
1581 {
1582 pParam->base.reg_gen = USE_REG_RDI;
1583 pParam->flags |= USE_REG_GEN64;
1584 }
1585 else
1586 {
1587 pParam->base.reg_gen = USE_REG_DI;
1588 pParam->flags |= USE_REG_GEN16;
1589 }
1590 return 0; //no additional opcode bytes
1591}
1592//*****************************************************************************
1593//*****************************************************************************
1594unsigned ParseTwoByteEsc(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
1595{
1596 const OPCODE *pOpcode;
1597 int size = sizeof(uint8_t);
1598
1599 //2nd byte
1600 pCpu->opcode = DISReadByte(pCpu, lpszCodeBlock);
1601 pOpcode = &g_aTwoByteMapX86[pCpu->opcode];
1602
1603 /* Handle opcode table extensions that rely on the address, repe or repne prefix byte. */
1604 /** @todo Should we take the first or last prefix byte in case of multiple prefix bytes??? */
1605 if (pCpu->lastprefix)
1606 {
1607 switch (pCpu->lastprefix)
1608 {
1609 case OP_OPSIZE: /* 0x66 */
1610 if (g_aTwoByteMapX86_PF66[pCpu->opcode].opcode != OP_INVALID)
1611 {
1612 /* Table entry is valid, so use the extension table. */
1613 pOpcode = &g_aTwoByteMapX86_PF66[pCpu->opcode];
1614
1615 /* Cancel prefix changes. */
1616 pCpu->prefix &= ~PREFIX_OPSIZE;
1617 pCpu->opmode = pCpu->mode;
1618 }
1619 break;
1620
1621 case OP_REPNE: /* 0xF2 */
1622 if (g_aTwoByteMapX86_PFF2[pCpu->opcode].opcode != OP_INVALID)
1623 {
1624 /* Table entry is valid, so use the extension table. */
1625 pOpcode = &g_aTwoByteMapX86_PFF2[pCpu->opcode];
1626
1627 /* Cancel prefix changes. */
1628 pCpu->prefix &= ~PREFIX_REPNE;
1629 }
1630 break;
1631
1632 case OP_REPE: /* 0xF3 */
1633 if (g_aTwoByteMapX86_PFF3[pCpu->opcode].opcode != OP_INVALID)
1634 {
1635 /* Table entry is valid, so use the extension table. */
1636 pOpcode = &g_aTwoByteMapX86_PFF3[pCpu->opcode];
1637
1638 /* Cancel prefix changes. */
1639 pCpu->prefix &= ~PREFIX_REP;
1640 }
1641 break;
1642 }
1643 }
1644
1645 size += ParseInstruction(lpszCodeBlock+size, pOpcode, pCpu);
1646 return size;
1647}
1648//*****************************************************************************
1649//*****************************************************************************
1650unsigned ParseNopPause(RTUINTPTR pu8CodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
1651{
1652 unsigned size = 0;
1653
1654 if (pCpu->prefix & PREFIX_REP)
1655 {
1656 pOp = &g_aMapX86_NopPause[1]; /* PAUSE */
1657 pCpu->prefix &= ~PREFIX_REP;
1658 }
1659 else
1660 pOp = &g_aMapX86_NopPause[0]; /* NOP */
1661
1662 size += ParseInstruction(pu8CodeBlock, pOp, pCpu);
1663 return size;
1664}
1665//*****************************************************************************
1666//*****************************************************************************
1667unsigned ParseImmGrpl(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
1668{
1669 int idx = (pCpu->opcode - 0x80) * 8;
1670 unsigned size = 0, modrm, reg;
1671
1672 modrm = DISReadByte(pCpu, lpszCodeBlock);
1673 reg = MODRM_REG(modrm);
1674
1675 pOp = (PCOPCODE)&g_aMapX86_Group1[idx+reg];
1676 //little hack to make sure the ModRM byte is included in the returned size
1677 if (pOp->idxParse1 != IDX_ParseModRM && pOp->idxParse2 != IDX_ParseModRM)
1678 size = sizeof(uint8_t); //ModRM byte
1679
1680 size += ParseInstruction(lpszCodeBlock, pOp, pCpu);
1681
1682 return size;
1683}
1684//*****************************************************************************
1685//*****************************************************************************
1686unsigned ParseShiftGrp2(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
1687{
1688 int idx;
1689 unsigned size = 0, modrm, reg;
1690
1691 switch (pCpu->opcode)
1692 {
1693 case 0xC0:
1694 case 0xC1:
1695 idx = (pCpu->opcode - 0xC0)*8;
1696 break;
1697
1698 case 0xD0:
1699 case 0xD1:
1700 case 0xD2:
1701 case 0xD3:
1702 idx = (pCpu->opcode - 0xD0 + 2)*8;
1703 break;
1704
1705 default:
1706 AssertMsgFailed(("Oops\n"));
1707 return sizeof(uint8_t);
1708 }
1709
1710 modrm = DISReadByte(pCpu, lpszCodeBlock);
1711 reg = MODRM_REG(modrm);
1712
1713 pOp = (PCOPCODE)&g_aMapX86_Group2[idx+reg];
1714
1715 //little hack to make sure the ModRM byte is included in the returned size
1716 if (pOp->idxParse1 != IDX_ParseModRM && pOp->idxParse2 != IDX_ParseModRM)
1717 size = sizeof(uint8_t); //ModRM byte
1718
1719 size += ParseInstruction(lpszCodeBlock, pOp, pCpu);
1720
1721 return size;
1722}
1723//*****************************************************************************
1724//*****************************************************************************
1725unsigned ParseGrp3(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
1726{
1727 int idx = (pCpu->opcode - 0xF6) * 8;
1728 unsigned size = 0, modrm, reg;
1729
1730 modrm = DISReadByte(pCpu, lpszCodeBlock);
1731 reg = MODRM_REG(modrm);
1732
1733 pOp = (PCOPCODE)&g_aMapX86_Group3[idx+reg];
1734
1735 //little hack to make sure the ModRM byte is included in the returned size
1736 if (pOp->idxParse1 != IDX_ParseModRM && pOp->idxParse2 != IDX_ParseModRM)
1737 size = sizeof(uint8_t); //ModRM byte
1738
1739 size += ParseInstruction(lpszCodeBlock, pOp, pCpu);
1740
1741 return size;
1742}
1743//*****************************************************************************
1744//*****************************************************************************
1745unsigned ParseGrp4(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
1746{
1747 unsigned size = 0, modrm, reg;
1748
1749 modrm = DISReadByte(pCpu, lpszCodeBlock);
1750 reg = MODRM_REG(modrm);
1751
1752 pOp = (PCOPCODE)&g_aMapX86_Group4[reg];
1753
1754 //little hack to make sure the ModRM byte is included in the returned size
1755 if (pOp->idxParse1 != IDX_ParseModRM && pOp->idxParse2 != IDX_ParseModRM)
1756 size = sizeof(uint8_t); //ModRM byte
1757
1758 size += ParseInstruction(lpszCodeBlock, pOp, pCpu);
1759
1760 return size;
1761}
1762//*****************************************************************************
1763//*****************************************************************************
1764unsigned ParseGrp5(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
1765{
1766 unsigned size = 0, modrm, reg;
1767
1768 modrm = DISReadByte(pCpu, lpszCodeBlock);
1769 reg = MODRM_REG(modrm);
1770
1771 pOp = (PCOPCODE)&g_aMapX86_Group5[reg];
1772
1773 //little hack to make sure the ModRM byte is included in the returned size
1774 if (pOp->idxParse1 != IDX_ParseModRM && pOp->idxParse2 != IDX_ParseModRM)
1775 size = sizeof(uint8_t); //ModRM byte
1776
1777 size += ParseInstruction(lpszCodeBlock, pOp, pCpu);
1778
1779 return size;
1780}
1781//*****************************************************************************
1782// 0xF 0xF [ModRM] [SIB] [displacement] imm8_opcode
1783// It would appear the ModRM byte must always be present. How else can you
1784// determine the offset of the imm8_opcode byte otherwise?
1785//
1786//*****************************************************************************
1787unsigned Parse3DNow(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
1788{
1789 unsigned size = 0, modrmsize;
1790
1791#ifdef DEBUG_Sander
1792 //needs testing
1793 AssertMsgFailed(("Test me\n"));
1794#endif
1795
1796 unsigned ModRM = DISReadByte(pCpu, lpszCodeBlock);
1797 pCpu->ModRM.Bits.Rm = MODRM_RM(ModRM);
1798 pCpu->ModRM.Bits.Mod = MODRM_MOD(ModRM);
1799 pCpu->ModRM.Bits.Reg = MODRM_REG(ModRM);
1800
1801 modrmsize = QueryModRM(lpszCodeBlock+sizeof(uint8_t), pOp, pParam, pCpu);
1802
1803 uint8_t opcode = DISReadByte(pCpu, lpszCodeBlock+sizeof(uint8_t)+modrmsize);
1804
1805 pOp = (PCOPCODE)&g_aTwoByteMapX86_3DNow[opcode];
1806
1807 //little hack to make sure the ModRM byte is included in the returned size
1808 if (pOp->idxParse1 != IDX_ParseModRM && pOp->idxParse2 != IDX_ParseModRM)
1809 {
1810#ifdef DEBUG_Sander /* bird, 2005-06-28: Alex is getting this during full installation of win2ksp4. */
1811 AssertMsgFailed(("Oops!\n")); //shouldn't happen!
1812#endif
1813 size = sizeof(uint8_t); //ModRM byte
1814 }
1815
1816 size += ParseInstruction(lpszCodeBlock, pOp, pCpu);
1817 size += sizeof(uint8_t); //imm8_opcode uint8_t
1818
1819 return size;
1820}
1821//*****************************************************************************
1822//*****************************************************************************
1823unsigned ParseGrp6(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
1824{
1825 unsigned size = 0, modrm, reg;
1826
1827 modrm = DISReadByte(pCpu, lpszCodeBlock);
1828 reg = MODRM_REG(modrm);
1829
1830 pOp = (PCOPCODE)&g_aMapX86_Group6[reg];
1831
1832 //little hack to make sure the ModRM byte is included in the returned size
1833 if (pOp->idxParse1 != IDX_ParseModRM && pOp->idxParse2 != IDX_ParseModRM)
1834 size = sizeof(uint8_t); //ModRM byte
1835
1836 size += ParseInstruction(lpszCodeBlock, pOp, pCpu);
1837
1838 return size;
1839}
1840//*****************************************************************************
1841//*****************************************************************************
1842unsigned ParseGrp7(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
1843{
1844 unsigned size = 0, modrm, reg, rm, mod;
1845
1846 modrm = DISReadByte(pCpu, lpszCodeBlock);
1847 mod = MODRM_MOD(modrm);
1848 reg = MODRM_REG(modrm);
1849 rm = MODRM_RM(modrm);
1850
1851 if (mod == 3 && rm == 0)
1852 pOp = (PCOPCODE)&g_aMapX86_Group7_mod11_rm000[reg];
1853 else
1854 if (mod == 3 && rm == 1)
1855 pOp = (PCOPCODE)&g_aMapX86_Group7_mod11_rm001[reg];
1856 else
1857 pOp = (PCOPCODE)&g_aMapX86_Group7_mem[reg];
1858
1859 //little hack to make sure the ModRM byte is included in the returned size
1860 if (pOp->idxParse1 != IDX_ParseModRM && pOp->idxParse2 != IDX_ParseModRM)
1861 size = sizeof(uint8_t); //ModRM byte
1862
1863 size += ParseInstruction(lpszCodeBlock, pOp, pCpu);
1864
1865 return size;
1866}
1867//*****************************************************************************
1868//*****************************************************************************
1869unsigned ParseGrp8(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
1870{
1871 unsigned size = 0, modrm, reg;
1872
1873 modrm = DISReadByte(pCpu, lpszCodeBlock);
1874 reg = MODRM_REG(modrm);
1875
1876 pOp = (PCOPCODE)&g_aMapX86_Group8[reg];
1877
1878 //little hack to make sure the ModRM byte is included in the returned size
1879 if (pOp->idxParse1 != IDX_ParseModRM && pOp->idxParse2 != IDX_ParseModRM)
1880 size = sizeof(uint8_t); //ModRM byte
1881
1882 size += ParseInstruction(lpszCodeBlock, pOp, pCpu);
1883
1884 return size;
1885}
1886//*****************************************************************************
1887//*****************************************************************************
1888unsigned ParseGrp9(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
1889{
1890 unsigned size = 0, modrm, reg;
1891
1892 modrm = DISReadByte(pCpu, lpszCodeBlock);
1893 reg = MODRM_REG(modrm);
1894
1895 pOp = (PCOPCODE)&g_aMapX86_Group9[reg];
1896
1897 //little hack to make sure the ModRM byte is included in the returned size
1898 if (pOp->idxParse1 != IDX_ParseModRM && pOp->idxParse2 != IDX_ParseModRM)
1899 size = sizeof(uint8_t); //ModRM byte
1900
1901 size += ParseInstruction(lpszCodeBlock, pOp, pCpu);
1902
1903 return size;
1904}
1905//*****************************************************************************
1906//*****************************************************************************
1907unsigned ParseGrp10(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
1908{
1909 unsigned size = 0, modrm, reg;
1910
1911 modrm = DISReadByte(pCpu, lpszCodeBlock);
1912 reg = MODRM_REG(modrm);
1913
1914 pOp = (PCOPCODE)&g_aMapX86_Group10[reg];
1915
1916 //little hack to make sure the ModRM byte is included in the returned size
1917 if (pOp->idxParse1 != IDX_ParseModRM && pOp->idxParse2 != IDX_ParseModRM)
1918 size = sizeof(uint8_t); //ModRM byte
1919
1920 size += ParseInstruction(lpszCodeBlock, pOp, pCpu);
1921
1922 return size;
1923}
1924//*****************************************************************************
1925//*****************************************************************************
1926unsigned ParseGrp12(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
1927{
1928 unsigned size = 0, modrm, reg;
1929
1930 modrm = DISReadByte(pCpu, lpszCodeBlock);
1931 reg = MODRM_REG(modrm);
1932
1933 if (pCpu->prefix & PREFIX_OPSIZE)
1934 reg += 8; //2nd table
1935
1936 pOp = (PCOPCODE)&g_aMapX86_Group12[reg];
1937
1938 //little hack to make sure the ModRM byte is included in the returned size
1939 if (pOp->idxParse1 != IDX_ParseModRM && pOp->idxParse2 != IDX_ParseModRM)
1940 size = sizeof(uint8_t); //ModRM byte
1941
1942 size += ParseInstruction(lpszCodeBlock, pOp, pCpu);
1943 return size;
1944}
1945//*****************************************************************************
1946//*****************************************************************************
1947unsigned ParseGrp13(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
1948{
1949 unsigned size = 0, modrm, reg;
1950
1951 modrm = DISReadByte(pCpu, lpszCodeBlock);
1952 reg = MODRM_REG(modrm);
1953 if (pCpu->prefix & PREFIX_OPSIZE)
1954 reg += 8; //2nd table
1955
1956 pOp = (PCOPCODE)&g_aMapX86_Group13[reg];
1957
1958 //little hack to make sure the ModRM byte is included in the returned size
1959 if (pOp->idxParse1 != IDX_ParseModRM && pOp->idxParse2 != IDX_ParseModRM)
1960 size = sizeof(uint8_t); //ModRM byte
1961
1962 size += ParseInstruction(lpszCodeBlock, pOp, pCpu);
1963
1964 return size;
1965}
1966//*****************************************************************************
1967//*****************************************************************************
1968unsigned ParseGrp14(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
1969{
1970 unsigned size = 0, modrm, reg;
1971
1972 modrm = DISReadByte(pCpu, lpszCodeBlock);
1973 reg = MODRM_REG(modrm);
1974 if (pCpu->prefix & PREFIX_OPSIZE)
1975 reg += 8; //2nd table
1976
1977 pOp = (PCOPCODE)&g_aMapX86_Group14[reg];
1978
1979 //little hack to make sure the ModRM byte is included in the returned size
1980 if (pOp->idxParse1 != IDX_ParseModRM && pOp->idxParse2 != IDX_ParseModRM)
1981 size = sizeof(uint8_t); //ModRM byte
1982
1983 size += ParseInstruction(lpszCodeBlock, pOp, pCpu);
1984
1985 return size;
1986}
1987//*****************************************************************************
1988//*****************************************************************************
1989unsigned ParseGrp15(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
1990{
1991 unsigned size = 0, modrm, reg, mod, rm;
1992
1993 modrm = DISReadByte(pCpu, lpszCodeBlock);
1994 mod = MODRM_MOD(modrm);
1995 reg = MODRM_REG(modrm);
1996 rm = MODRM_RM(modrm);
1997
1998 if (mod == 3 && rm == 0)
1999 pOp = (PCOPCODE)&g_aMapX86_Group15_mod11_rm000[reg];
2000 else
2001 pOp = (PCOPCODE)&g_aMapX86_Group15_mem[reg];
2002
2003 //little hack to make sure the ModRM byte is included in the returned size
2004 if (pOp->idxParse1 != IDX_ParseModRM && pOp->idxParse2 != IDX_ParseModRM)
2005 size = sizeof(uint8_t); //ModRM byte
2006
2007 size += ParseInstruction(lpszCodeBlock, pOp, pCpu);
2008 return size;
2009}
2010//*****************************************************************************
2011//*****************************************************************************
2012unsigned ParseGrp16(RTUINTPTR lpszCodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu)
2013{
2014 unsigned size = 0, modrm, reg;
2015
2016 modrm = DISReadByte(pCpu, lpszCodeBlock);
2017 reg = MODRM_REG(modrm);
2018
2019 pOp = (PCOPCODE)&g_aMapX86_Group16[reg];
2020
2021 //little hack to make sure the ModRM byte is included in the returned size
2022 if (pOp->idxParse1 != IDX_ParseModRM && pOp->idxParse2 != IDX_ParseModRM)
2023 size = sizeof(uint8_t); //ModRM byte
2024
2025 size += ParseInstruction(lpszCodeBlock, pOp, pCpu);
2026 return size;
2027}
2028//*****************************************************************************
2029#if !defined(DIS_CORE_ONLY) && defined(LOG_ENABLED)
2030static const char *szModRMReg8[] = {"AL", "CL", "DL", "BL", "AH", "CH", "DH", "BH"};
2031static const char *szModRMReg8_64[] = {"AL", "CL", "DL", "BL", "AH", "CH", "DH", "BH", "R8L", "R9L", "R10L", "R11L", "R12L", "R13L", "R14L", "R15L"};
2032static const char *szModRMReg16[] = {"AX", "CX", "DX", "BX", "SP", "BP", "SI", "DI"};
2033static const char *szModRMReg32[] = {"EAX", "ECX", "EDX", "EBX", "ESP", "EBP", "ESI", "EDI"};
2034static const char *szModRMReg64[] = {"RAX", "RCX", "RDX", "RBX", "RSP", "RBP", "RSI", "RDI", "R8", "R9", "R10", "R11", "R12", "R13", "R14", "R15"};
2035static const char *szModRMReg1616[8] = {"BX+SI", "BX+DI", "BP+SI", "BP+DI", "SI", "DI", "BP", "BX"};
2036#endif
2037static const char *szModRMSegReg[6] = {"ES", "CS", "SS", "DS", "FS", "GS"};
2038static const int BaseModRMReg16[8] = { USE_REG_BX, USE_REG_BX, USE_REG_BP, USE_REG_BP, USE_REG_SI, USE_REG_DI, USE_REG_BP, USE_REG_BX};
2039static const int IndexModRMReg16[4] = { USE_REG_SI, USE_REG_DI, USE_REG_SI, USE_REG_DI};
2040//*****************************************************************************
2041void disasmModRMReg(PDISCPUSTATE pCpu, PCOPCODE pOp, int idx, POP_PARAMETER pParam, int fRegAddr)
2042{
2043 int subtype, type, mod;
2044
2045 mod = pCpu->ModRM.Bits.Mod;
2046
2047 type = OP_PARM_VTYPE(pParam->param);
2048 subtype = OP_PARM_VSUBTYPE(pParam->param);
2049 if (fRegAddr)
2050 subtype = (pCpu->addrmode == CPUMODE_64BIT) ? OP_PARM_q : OP_PARM_d;
2051 else
2052 if (subtype == OP_PARM_v || subtype == OP_PARM_NONE)
2053 {
2054 switch(pCpu->opmode)
2055 {
2056 case CPUMODE_32BIT:
2057 subtype = OP_PARM_d;
2058 break;
2059 case CPUMODE_64BIT:
2060 subtype = OP_PARM_q;
2061 break;
2062 case CPUMODE_16BIT:
2063 subtype = OP_PARM_w;
2064 break;
2065 default:
2066 /* make gcc happy */
2067 break;
2068 }
2069 }
2070
2071 switch (subtype)
2072 {
2073 case OP_PARM_b:
2074#if !defined(DIS_CORE_ONLY) && defined(LOG_ENABLED)
2075 if (idx > RT_ELEMENTS(szModRMReg8))
2076 disasmAddString(pParam->szParam, szModRMReg8_64[idx]);
2077 else
2078 disasmAddString(pParam->szParam, szModRMReg8[idx]);
2079#endif
2080 pParam->flags |= USE_REG_GEN8;
2081 pParam->base.reg_gen = idx;
2082 break;
2083
2084 case OP_PARM_w:
2085 disasmAddString(pParam->szParam, szModRMReg16[idx]);
2086 pParam->flags |= USE_REG_GEN16;
2087 pParam->base.reg_gen = idx;
2088 break;
2089
2090 case OP_PARM_d:
2091 disasmAddString(pParam->szParam, szModRMReg32[idx]);
2092 pParam->flags |= USE_REG_GEN32;
2093 pParam->base.reg_gen = idx;
2094 break;
2095
2096 case OP_PARM_q:
2097 disasmAddString(pParam->szParam, szModRMReg64[idx]);
2098 pParam->flags |= USE_REG_GEN64;
2099 pParam->base.reg_gen = idx;
2100 break;
2101
2102 default:
2103#ifdef IN_RING3
2104 Log(("disasmModRMReg %x:%x failed!!\n", type, subtype));
2105 DIS_THROW(ExceptionInvalidModRM);
2106#else
2107 AssertMsgFailed(("Oops!\n"));
2108#endif
2109 break;
2110 }
2111}
2112//*****************************************************************************
2113//*****************************************************************************
2114void disasmModRMReg16(PDISCPUSTATE pCpu, PCOPCODE pOp, int idx, POP_PARAMETER pParam)
2115{
2116 disasmAddString(pParam->szParam, szModRMReg1616[idx]);
2117 pParam->flags |= USE_REG_GEN16;
2118 pParam->base.reg_gen = BaseModRMReg16[idx];
2119 if (idx < 4)
2120 {
2121 pParam->flags |= USE_INDEX;
2122 pParam->index.reg_gen = IndexModRMReg16[idx];
2123 }
2124}
2125//*****************************************************************************
2126//*****************************************************************************
2127void disasmModRMSReg(PDISCPUSTATE pCpu, PCOPCODE pOp, int idx, POP_PARAMETER pParam)
2128{
2129#if 0 //def DEBUG_Sander
2130 AssertMsg(idx < (int)ELEMENTS(szModRMSegReg), ("idx=%d\n", idx));
2131#endif
2132#ifdef IN_RING3
2133 if (idx >= (int)ELEMENTS(szModRMSegReg))
2134 {
2135 Log(("disasmModRMSReg %d failed!!\n", idx));
2136 DIS_THROW(ExceptionInvalidParameter);
2137 }
2138#endif
2139
2140 idx = RT_MIN(idx, (int)ELEMENTS(szModRMSegReg)-1);
2141 disasmAddString(pParam->szParam, szModRMSegReg[idx]);
2142 pParam->flags |= USE_REG_SEG;
2143 pParam->base.reg_seg = idx;
2144}
2145//*****************************************************************************
2146//*****************************************************************************
2147void disasmPrintAbs32(POP_PARAMETER pParam)
2148{
2149 disasmAddStringF(pParam->szParam, sizeof(pParam->szParam), "%08Xh", pParam->disp32);
2150}
2151//*****************************************************************************
2152//*****************************************************************************
2153void disasmPrintDisp32(POP_PARAMETER pParam)
2154{
2155 disasmAddStringF(pParam->szParam, sizeof(pParam->szParam), "%08Xh", pParam->disp32);
2156}
2157//*****************************************************************************
2158//*****************************************************************************
2159void disasmPrintDisp8(POP_PARAMETER pParam)
2160{
2161 disasmAddStringF(pParam->szParam, sizeof(pParam->szParam), "%d", pParam->disp8);
2162}
2163//*****************************************************************************
2164//*****************************************************************************
2165void disasmPrintDisp16(POP_PARAMETER pParam)
2166{
2167 disasmAddStringF(pParam->szParam, sizeof(pParam->szParam), "%04Xh", pParam->disp16);
2168}
2169//*****************************************************************************
2170//*****************************************************************************
2171void disasmGetPtrString(PDISCPUSTATE pCpu, PCOPCODE pOp, POP_PARAMETER pParam)
2172{
2173 int subtype = OP_PARM_VSUBTYPE(pParam->param);
2174
2175 if (subtype == OP_PARM_v)
2176 {
2177 switch(pCpu->opmode)
2178 {
2179 case CPUMODE_32BIT:
2180 subtype = OP_PARM_d;
2181 break;
2182 case CPUMODE_64BIT:
2183 subtype = OP_PARM_q;
2184 break;
2185 case CPUMODE_16BIT:
2186 subtype = OP_PARM_w;
2187 break;
2188 default:
2189 /* make gcc happy */
2190 break;
2191 }
2192 }
2193
2194 switch (subtype)
2195 {
2196 case OP_PARM_a: //two words or dwords depending on operand size (bound only)
2197 break;
2198
2199 case OP_PARM_b:
2200 disasmAddString(pParam->szParam, "byte ptr ");
2201 break;
2202
2203 case OP_PARM_w:
2204 disasmAddString(pParam->szParam, "word ptr ");
2205 break;
2206
2207 case OP_PARM_d:
2208 disasmAddString(pParam->szParam, "dword ptr ");
2209 break;
2210
2211 case OP_PARM_q:
2212 case OP_PARM_dq:
2213 disasmAddString(pParam->szParam, "qword ptr ");
2214 break;
2215
2216 case OP_PARM_p:
2217 disasmAddString(pParam->szParam, "far ptr ");
2218 break;
2219
2220 case OP_PARM_s:
2221 break; //??
2222
2223 case OP_PARM_z:
2224 break;
2225 default:
2226 break; //no pointer type specified/necessary
2227 }
2228 if (pCpu->prefix & PREFIX_SEG)
2229 disasmAddStringF(pParam->szParam, sizeof(pParam->szParam), "%s:", szModRMSegReg[pCpu->prefix_seg]);
2230}
2231#ifndef IN_GC
2232//*****************************************************************************
2233/* Read functions for getting the opcode bytes */
2234//*****************************************************************************
2235uint8_t DISReadByte(PDISCPUSTATE pCpu, RTUINTPTR pAddress)
2236{
2237 if (pCpu->pfnReadBytes)
2238 {
2239 uint8_t temp = 0;
2240 int rc;
2241
2242 rc = pCpu->pfnReadBytes(pAddress, &temp, sizeof(temp), pCpu);
2243 if (VBOX_FAILURE(rc))
2244 {
2245 Log(("DISReadByte failed!!\n"));
2246 DIS_THROW(ExceptionMemRead);
2247 }
2248 return temp;
2249 }
2250#ifdef IN_RING0
2251 AssertMsgFailed(("DISReadByte with no read callback in ring 0!!\n"));
2252 return 0;
2253#else
2254 else return *(uint8_t *)pAddress;
2255#endif
2256}
2257//*****************************************************************************
2258//*****************************************************************************
2259uint16_t DISReadWord(PDISCPUSTATE pCpu, RTUINTPTR pAddress)
2260{
2261 if (pCpu->pfnReadBytes)
2262 {
2263 uint16_t temp = 0;
2264 int rc;
2265
2266 rc = pCpu->pfnReadBytes(pAddress, (uint8_t*)&temp, sizeof(temp), pCpu);
2267 if (VBOX_FAILURE(rc))
2268 {
2269 Log(("DISReadWord failed!!\n"));
2270 DIS_THROW(ExceptionMemRead);
2271 }
2272 return temp;
2273 }
2274#ifdef IN_RING0
2275 AssertMsgFailed(("DISReadWord with no read callback in ring 0!!\n"));
2276 return 0;
2277#else
2278 else return *(uint16_t *)pAddress;
2279#endif
2280}
2281//*****************************************************************************
2282//*****************************************************************************
2283uint32_t DISReadDWord(PDISCPUSTATE pCpu, RTUINTPTR pAddress)
2284{
2285 if (pCpu->pfnReadBytes)
2286 {
2287 uint32_t temp = 0;
2288 int rc;
2289
2290 rc = pCpu->pfnReadBytes(pAddress, (uint8_t*)&temp, sizeof(temp), pCpu);
2291 if (VBOX_FAILURE(rc))
2292 {
2293 Log(("DISReadDWord failed!!\n"));
2294 DIS_THROW(ExceptionMemRead);
2295 }
2296 return temp;
2297 }
2298#ifdef IN_RING0
2299 AssertMsgFailed(("DISReadDWord with no read callback in ring 0!!\n"));
2300 return 0;
2301#else
2302 else return *(uint32_t *)pAddress;
2303#endif
2304}
2305//*****************************************************************************
2306//*****************************************************************************
2307uint64_t DISReadQWord(PDISCPUSTATE pCpu, RTUINTPTR pAddress)
2308{
2309 if (pCpu->pfnReadBytes)
2310 {
2311 uint64_t temp = 0;
2312 int rc;
2313
2314 rc = pCpu->pfnReadBytes(pAddress, (uint8_t*)&temp, sizeof(temp), pCpu);
2315 if (VBOX_FAILURE(rc))
2316 {
2317 Log(("DISReadQWord %x failed!!\n", pAddress));
2318 DIS_THROW(ExceptionMemRead);
2319 }
2320
2321 return temp;
2322 }
2323#ifdef IN_RING0
2324 AssertMsgFailed(("DISReadQWord with no read callback in ring 0!!\n"));
2325 return 0;
2326#else
2327 else return *(uint64_t *)pAddress;
2328#endif
2329}
2330#endif /* IN_GC */
2331
2332#if !defined(DIS_CORE_ONLY) && defined(LOG_ENABLED)
2333//*****************************************************************************
2334//*****************************************************************************
2335void disasmAddString(char *psz, const char *pszAdd)
2336{
2337 strcat(psz, pszAdd);
2338}
2339//*****************************************************************************
2340//*****************************************************************************
2341void disasmAddStringF(char *psz, uint32_t size, const char *pszFormat, ...)
2342{
2343 va_list args;
2344 va_start(args, pszFormat);
2345 RTStrPrintfV(psz + strlen(psz), size, pszFormat, args);
2346 va_end(args);
2347}
2348
2349//*****************************************************************************
2350//*****************************************************************************
2351void disasmAddChar(char *psz, char ch)
2352{
2353 char sz[2];
2354
2355 sz[0] = ch;
2356 sz[1] = '\0';
2357 strcat(psz, sz);
2358}
2359#endif /* !DIS_CORE_ONLY */
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