1 | /* $Id: Virtio.h 85121 2020-07-08 19:33:26Z vboxsync $ */
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2 | /** @file
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3 | * Virtio.h - Virtio Declarations
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4 | */
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5 |
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6 | /*
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7 | * Copyright (C) 2009-2020 Oracle Corporation
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8 | *
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9 | * This file is part of VirtualBox Open Source Edition (OSE), as
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10 | * available from http://www.virtualbox.org. This file is free software;
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11 | * you can redistribute it and/or modify it under the terms of the GNU
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12 | * General Public License (GPL) as published by the Free Software
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13 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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14 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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15 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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16 | */
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17 |
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18 | #ifndef VBOX_INCLUDED_SRC_VirtIO_Virtio_h
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19 | #define VBOX_INCLUDED_SRC_VirtIO_Virtio_h
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20 | #ifndef RT_WITHOUT_PRAGMA_ONCE
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21 | # pragma once
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22 | #endif
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23 |
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24 | #include <iprt/types.h>
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25 |
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26 |
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27 | /** Pointer to the core shared state of a VirtIO PCI device */
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28 | typedef struct VPCISTATE *PVPCISTATE;
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29 | /** Pointer to the core ring-3 state of a VirtIO PCI device */
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30 | typedef struct VPCISTATER3 *PVPCISTATER3;
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31 | /** Pointer to the core ring-0 state of a VirtIO PCI device */
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32 | typedef struct VPCISTATER0 *PVPCISTATER0;
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33 | /** Pointer to the core raw-mode state of a VirtIO PCI device */
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34 | typedef struct VPCISTATERC *PVPCISTATERC;
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35 |
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36 | /** Pointer to the core current context state of a VirtIO PCI device */
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37 | typedef CTX_SUFF(PVPCISTATE) PVPCISTATECC;
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38 | /** The core current context state of a VirtIO PCI device */
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39 | typedef struct CTX_SUFF(VPCISTATE) VPCISTATECC;
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40 |
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41 |
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42 | /** @name Saved state versions.
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43 | * The saved state version is changed if either common or any of specific
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44 | * parts are changed. That is, it is perfectly possible that the version
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45 | * of saved vnet state will increase as a result of change in vblk structure
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46 | * for example.
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47 | */
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48 | #define VIRTIO_SAVEDSTATE_VERSION_3_1_BETA1 1
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49 | #define VIRTIO_SAVEDSTATE_VERSION 2
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50 | /** @} */
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51 |
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52 | #define DEVICE_PCI_VENDOR_ID 0x1AF4
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53 | #define DEVICE_PCI_BASE_ID 0x1000
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54 | #define DEVICE_PCI_SUBSYSTEM_VENDOR_ID 0x1AF4
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55 | #define DEVICE_PCI_SUBSYSTEM_BASE_ID 1
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56 |
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57 | #define VIRTIO_MAX_NQUEUES 3
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58 |
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59 | #define VPCI_HOST_FEATURES 0x0
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60 | #define VPCI_GUEST_FEATURES 0x4
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61 | #define VPCI_QUEUE_PFN 0x8
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62 | #define VPCI_QUEUE_NUM 0xC
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63 | #define VPCI_QUEUE_SEL 0xE
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64 | #define VPCI_QUEUE_NOTIFY 0x10
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65 | #define VPCI_STATUS 0x12
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66 | #define VPCI_ISR 0x13
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67 | #define VPCI_CONFIG 0x14
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68 |
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69 | #define VPCI_ISR_QUEUE 0x1
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70 | #define VPCI_ISR_CONFIG 0x3
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71 |
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72 | #define VPCI_STATUS_ACK 0x01
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73 | #define VPCI_STATUS_DRV 0x02
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74 | #define VPCI_STATUS_DRV_OK 0x04
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75 | #define VPCI_STATUS_FAILED 0x80
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76 |
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77 | #define VPCI_F_NOTIFY_ON_EMPTY UINT32_C(0x01000000)
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78 | #define VPCI_F_ANY_LAYOUT UINT32_C(0x08000000)
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79 | #define VPCI_F_RING_INDIRECT_DESC UINT32_C(0x10000000)
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80 | #define VPCI_F_RING_EVENT_IDX UINT32_C(0x20000000)
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81 | #define VPCI_F_BAD_FEATURE UINT32_C(0x40000000)
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82 |
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83 | #define VRINGDESC_MAX_SIZE (2 * 1024 * 1024)
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84 | #define VRINGDESC_F_NEXT 0x01
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85 | #define VRINGDESC_F_WRITE 0x02
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86 | #define VRINGDESC_F_INDIRECT 0x04
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87 |
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88 | typedef struct VRINGDESC
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89 | {
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90 | uint64_t u64Addr;
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91 | uint32_t uLen;
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92 | uint16_t u16Flags;
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93 | uint16_t u16Next;
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94 | } VRINGDESC;
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95 | typedef VRINGDESC *PVRINGDESC;
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96 |
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97 | #define VRINGAVAIL_F_NO_INTERRUPT 0x01
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98 |
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99 | typedef struct VRINGAVAIL
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100 | {
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101 | uint16_t uFlags;
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102 | uint16_t uNextFreeIndex;
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103 | uint16_t auRing[1];
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104 | } VRINGAVAIL;
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105 |
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106 | typedef struct VRINGUSEDELEM
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107 | {
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108 | uint32_t uId;
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109 | uint32_t uLen;
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110 | } VRINGUSEDELEM;
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111 |
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112 | #define VRINGUSED_F_NO_NOTIFY 0x01
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113 |
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114 | typedef struct VRingUsed
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115 | {
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116 | uint16_t uFlags;
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117 | uint16_t uIndex;
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118 | VRINGUSEDELEM aRing[1];
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119 | } VRINGUSED;
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120 | typedef VRINGUSED *PVRINGUSED;
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121 |
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122 | #define VRING_MAX_SIZE 1024
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123 |
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124 | typedef struct VRING
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125 | {
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126 | uint16_t uSize;
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127 | uint16_t padding[3];
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128 | RTGCPHYS addrDescriptors;
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129 | RTGCPHYS addrAvail;
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130 | RTGCPHYS addrUsed;
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131 | } VRING;
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132 | typedef VRING *PVRING;
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133 |
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134 | typedef struct VQUEUE
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135 | {
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136 | VRING VRing;
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137 | uint16_t uNextAvailIndex;
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138 | uint16_t uNextUsedIndex;
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139 | uint32_t uPageNumber;
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140 | char szName[16];
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141 | } VQUEUE;
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142 | typedef VQUEUE *PVQUEUE;
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143 |
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144 | /**
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145 | * Queue callback (consumer?).
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146 | *
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147 | * @param pDevIns The device instance.
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148 | * @param pQueue Pointer to the queue structure.
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149 | */
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150 | typedef DECLCALLBACKTYPE(void, FNVPCIQUEUECALLBACK,(PPDMDEVINS pDevIns, PVQUEUE pQueue));
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151 | /** Pointer to a VQUEUE callback function. */
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152 | typedef FNVPCIQUEUECALLBACK *PFNVPCIQUEUECALLBACK;
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153 |
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154 | typedef struct VQUEUER3
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155 | {
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156 | R3PTRTYPE(PFNVPCIQUEUECALLBACK) pfnCallback;
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157 | } VQUEUER3;
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158 | typedef VQUEUER3 *PVQUEUER3;
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159 |
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160 | typedef struct VQUEUESEG
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161 | {
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162 | RTGCPHYS addr;
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163 | void *pv;
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164 | uint32_t cb;
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165 | } VQUEUESEG;
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166 |
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167 | typedef struct VQUEUEELEM
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168 | {
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169 | uint32_t uIndex;
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170 | uint32_t cIn;
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171 | uint32_t cOut;
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172 | VQUEUESEG aSegsIn[VRING_MAX_SIZE];
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173 | VQUEUESEG aSegsOut[VRING_MAX_SIZE];
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174 | } VQUEUEELEM;
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175 | typedef VQUEUEELEM *PVQUEUEELEM;
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176 |
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177 |
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178 | enum VirtioDeviceType
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179 | {
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180 | VIRTIO_NET_ID = 0,
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181 | VIRTIO_BLK_ID = 1,
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182 | VIRTIO_32BIT_HACK = 0x7fffffff
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183 | };
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184 |
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185 |
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186 | /**
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187 | * The core shared state of a VirtIO PCI device
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188 | */
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189 | typedef struct VPCISTATE
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190 | {
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191 | PDMCRITSECT cs; /**< Critical section - what is it protecting? */
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192 | /** Read-only part, never changes after initialization. */
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193 | char szInstance[8]; /**< Instance name, e.g. VNet#1. */
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194 |
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195 | /* Read/write part, protected with critical section. */
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196 | /** Status LED. */
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197 | PDMLED led;
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198 |
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199 | uint32_t uGuestFeatures;
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200 | uint16_t uQueueSelector; /**< An index in aQueues array. */
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201 | uint8_t uStatus; /**< Device Status (bits are device-specific). */
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202 | uint8_t uISR; /**< Interrupt Status Register. */
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203 |
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204 | /** Number of queues actually used. */
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205 | uint32_t cQueues;
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206 | uint32_t u32Padding;
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207 | /** Shared queue data. */
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208 | VQUEUE Queues[VIRTIO_MAX_NQUEUES];
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209 |
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210 | STAMCOUNTER StatIntsRaised;
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211 | STAMCOUNTER StatIntsSkipped;
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212 |
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213 | #ifdef VBOX_WITH_STATISTICS
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214 | STAMPROFILEADV StatIOReadR3;
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215 | STAMPROFILEADV StatIOReadR0;
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216 | STAMPROFILEADV StatIOReadRC;
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217 | STAMPROFILEADV StatIOWriteR3;
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218 | STAMPROFILEADV StatIOWriteR0;
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219 | STAMPROFILEADV StatIOWriteRC;
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220 | STAMPROFILE StatCsR3;
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221 | STAMPROFILE StatCsR0;
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222 | STAMPROFILE StatCsRC;
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223 | #endif
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224 | } VPCISTATE;
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225 |
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226 |
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227 | /**
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228 | * The core ring-3 state of a VirtIO PCI device
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229 | *
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230 | * @implements PDMILEDPORTS
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231 | */
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232 | typedef struct VPCISTATER3
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233 | {
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234 | /** Status LUN: Base interface. */
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235 | PDMIBASE IBase;
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236 | /** Status LUN: LED port interface. */
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237 | PDMILEDPORTS ILeds;
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238 | /** Status LUN: LED connector (peer). */
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239 | R3PTRTYPE(PPDMILEDCONNECTORS) pLedsConnector;
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240 | /** Pointer to the shared state. */
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241 | R3PTRTYPE(PVPCISTATE) pShared;
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242 | /** Ring-3 per-queue data. */
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243 | VQUEUER3 Queues[VIRTIO_MAX_NQUEUES];
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244 | } VPCISTATER3;
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245 |
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246 |
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247 | /**
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248 | * The core ring-0 state of a VirtIO PCI device
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249 | */
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250 | typedef struct VPCISTATER0
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251 | {
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252 | uint64_t uUnused;
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253 | } VPCISTATER0;
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254 |
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255 |
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256 | /**
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257 | * The core raw-mode state of a VirtIO PCI device
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258 | */
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259 | typedef struct VPCISTATERC
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260 | {
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261 | uint64_t uUnused;
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262 | } VPCISTATERC;
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263 |
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264 |
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265 | /** @name VirtIO port I/O callbacks.
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266 | * @{ */
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267 | typedef struct VPCIIOCALLBACKS
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268 | {
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269 | DECLCALLBACKMEMBER(uint32_t, pfnGetHostFeatures,(PVPCISTATE pVPciState));
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270 | DECLCALLBACKMEMBER(uint32_t, pfnGetHostMinimalFeatures,(PVPCISTATE pVPciState));
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271 | DECLCALLBACKMEMBER(void, pfnSetHostFeatures,(PVPCISTATE pVPciState, uint32_t fFeatures));
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272 | DECLCALLBACKMEMBER(int, pfnGetConfig,(PVPCISTATE pVPciState, uint32_t offCfg, uint32_t cb, void *pvData));
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273 | DECLCALLBACKMEMBER(int, pfnSetConfig,(PVPCISTATE pVPciState, uint32_t offCfg, uint32_t cb, void *pvData));
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274 | DECLCALLBACKMEMBER(int, pfnReset,(PPDMDEVINS pDevIns));
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275 | DECLCALLBACKMEMBER(void, pfnReady,(PPDMDEVINS pDevIns));
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276 | } VPCIIOCALLBACKS;
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277 | /** Pointer to a const VirtIO port I/O callback structure. */
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278 | typedef const VPCIIOCALLBACKS *PCVPCIIOCALLBACKS;
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279 | /** @} */
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280 |
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281 | int vpciR3Init(PPDMDEVINS pDevIns, PVPCISTATE pThis, PVPCISTATECC pThisCC, uint16_t uDeviceId, uint16_t uClass, uint32_t cQueues);
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282 | int vpciRZInit(PPDMDEVINS pDevIns, PVPCISTATE pThis, PVPCISTATECC pThisCC);
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283 | int vpciR3Term(PPDMDEVINS pDevIns, PVPCISTATE pThis);
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284 | PVQUEUE vpciR3AddQueue(PVPCISTATE pThis, PVPCISTATECC pThisCC, unsigned uSize, PFNVPCIQUEUECALLBACK pfnCallback, const char *pcszName);
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285 | void *vpciR3QueryInterface(PVPCISTATECC pThisCC, const char *pszIID);
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286 | void vpciR3SetWriteLed(PVPCISTATE pThis, bool fOn);
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287 | void vpciR3SetReadLed(PVPCISTATE pThis, bool fOn);
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288 | int vpciR3SaveExec(PCPDMDEVHLPR3 pHlp, PVPCISTATE pThis, PSSMHANDLE pSSM);
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289 | int vpciR3LoadExec(PCPDMDEVHLPR3 pHlp, PVPCISTATE pThis, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass, uint32_t cQueues);
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290 | void vpciR3DumpStateWorker(PVPCISTATE pThis, PCDBGFINFOHLP pHlp);
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291 |
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292 | void vpciReset(PPDMDEVINS pDevIns, PVPCISTATE pThis);
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293 | int vpciRaiseInterrupt(PPDMDEVINS pDevIns, PVPCISTATE pThis, int rcBusy, uint8_t u8IntCause);
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294 | int vpciIOPortIn(PPDMDEVINS pDevIns, PVPCISTATE pThis, RTIOPORT offPort,
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295 | uint32_t *pu32, unsigned cb,PCVPCIIOCALLBACKS pCallbacks);
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296 | int vpciIOPortOut(PPDMDEVINS pDevIns, PVPCISTATE pThis, PVPCISTATECC pThisCC, RTIOPORT offPort,
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297 | uint32_t u32, unsigned cb, PCVPCIIOCALLBACKS pCallbacks);
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298 |
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299 | #define VPCI_CS
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300 | DECLINLINE(int) vpciCsEnter(PPDMDEVINS pDevIns, PVPCISTATE pThis, int rcBusy)
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301 | {
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302 | #ifdef VPCI_CS
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303 | STAM_PROFILE_START(&pThis->CTX_SUFF(StatCs), a);
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304 | int rc = PDMDevHlpCritSectEnter(pDevIns, &pThis->cs, rcBusy);
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305 | STAM_PROFILE_STOP(&pThis->CTX_SUFF(StatCs), a);
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306 | return rc;
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307 | #else
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308 | RT_NOREF(pDevIns, pThis, rcBusy);
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309 | return VINF_SUCCESS;
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310 | #endif
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311 | }
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312 |
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313 | DECLINLINE(void) vpciCsLeave(PPDMDEVINS pDevIns, PVPCISTATE pThis)
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314 | {
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315 | #ifdef VPCI_CS
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316 | PDMDevHlpCritSectLeave(pDevIns, &pThis->cs);
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317 | #endif
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318 | }
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319 |
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320 | void vringSetNotification(PPDMDEVINS pDevIns, PVRING pVRing, bool fEnabled);
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321 |
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322 | DECLINLINE(uint16_t) vringReadAvailIndex(PPDMDEVINS pDevIns, PVRING pVRing)
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323 | {
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324 | uint16_t idx = 0;
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325 | PDMDevHlpPhysRead(pDevIns, pVRing->addrAvail + RT_UOFFSETOF(VRINGAVAIL, uNextFreeIndex), &idx, sizeof(idx));
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326 | return idx;
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327 | }
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328 |
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329 | bool vqueueSkip(PPDMDEVINS pDevIns, PVPCISTATE pThis, PVQUEUE pQueue);
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330 | bool vqueueGet(PPDMDEVINS pDevIns, PVPCISTATE pThis, PVQUEUE pQueue, PVQUEUEELEM pElem, bool fRemove = true);
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331 | void vqueuePut(PPDMDEVINS pDevIns, PVPCISTATE pThis, PVQUEUE pQueue, PVQUEUEELEM pElem, uint32_t uLen, uint32_t uReserved = 0);
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332 | void vqueueSync(PPDMDEVINS pDevIns, PVPCISTATE pThis, PVQUEUE pQueue);
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333 |
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334 | DECLINLINE(bool) vqueuePeek(PPDMDEVINS pDevIns, PVPCISTATE pThis, PVQUEUE pQueue, PVQUEUEELEM pElem)
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335 | {
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336 | return vqueueGet(pDevIns, pThis, pQueue, pElem, /* fRemove */ false);
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337 | }
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338 |
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339 | DECLINLINE(bool) vqueueIsReady(PVQUEUE pQueue)
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340 | {
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341 | return !!pQueue->VRing.addrAvail;
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342 | }
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343 |
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344 | DECLINLINE(bool) vqueueIsEmpty(PPDMDEVINS pDevIns, PVQUEUE pQueue)
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345 | {
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346 | return vringReadAvailIndex(pDevIns, &pQueue->VRing) == pQueue->uNextAvailIndex;
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347 | }
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348 |
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349 | #endif /* !VBOX_INCLUDED_SRC_VirtIO_Virtio_h */
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350 |
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